diff options
Diffstat (limited to 'include/linux/ssb/ssb_regs.h')
| -rw-r--r-- | include/linux/ssb/ssb_regs.h | 49 |
1 files changed, 28 insertions, 21 deletions
diff --git a/include/linux/ssb/ssb_regs.h b/include/linux/ssb/ssb_regs.h index 96bba69b1271..30222e89ad16 100644 --- a/include/linux/ssb/ssb_regs.h +++ b/include/linux/ssb/ssb_regs.h @@ -175,6 +175,7 @@ #define SSB_SPROM_REVISION_REV 0x00FF /* SPROM Revision number */ #define SSB_SPROM_REVISION_CRC 0xFF00 /* SPROM CRC8 value */ #define SSB_SPROM_REVISION_CRC_SHIFT 8 + /* SPROM Revision 1 */ #define SSB_SPROM1_SPID 0x1004 /* Subsystem Product ID for PCI */ #define SSB_SPROM1_SVID 0x1006 /* Subsystem Vendor ID for PCI */ @@ -223,7 +224,7 @@ #define SSB_SPROM1_AGAIN_A 0x00FF /* A-PHY */ #define SSB_SPROM1_AGAIN_BG 0xFF00 /* B-PHY and G-PHY */ #define SSB_SPROM1_AGAIN_BG_SHIFT 8 -#define SSB_SPROM1_OEM 0x1076 /* 8 bytes OEM string (rev 1 only) */ + /* SPROM Revision 2 (inherits from rev 1) */ #define SSB_SPROM2_BFLHI 0x1038 /* Boardflags (high 16 bits) */ #define SSB_SPROM2_MAXP_A 0x103A /* A-PHY Max Power */ @@ -240,6 +241,7 @@ #define SSB_SPROM2_OPO_VALUE 0x00FF #define SSB_SPROM2_OPO_UNUSED 0xFF00 #define SSB_SPROM2_CCODE 0x107C /* Two char Country Code */ + /* SPROM Revision 3 (inherits most data from rev 2) */ #define SSB_SPROM3_IL0MAC 0x104A /* 6 bytes MAC address for 802.11b/g */ #define SSB_SPROM3_ET0MAC 0x1050 /* 6 bytes MAC address for Ethernet ?? */ @@ -261,11 +263,12 @@ #define SSB_SPROM3_CCKPO_11M 0xF000 /* 11M Rate PO */ #define SSB_SPROM3_CCKPO_11M_SHIFT 12 #define SSB_SPROM3_OFDMGPO 0x107A /* G-PHY OFDM Power Offset (4 bytes, BigEndian) */ + /* SPROM Revision 4 entries with ?? in comment are unknown */ -#define SSB_SPROM4_IL0MAC 0x104C /* 6 byte MAC address for b/g */ +#define SSB_SPROM4_IL0MAC 0x104C /* 6 byte MAC address for a/b/g/n */ #define SSB_SPROM4_ET0MAC 0x1018 /* 6 bytes MAC address for Ethernet ?? */ #define SSB_SPROM4_ET1MAC 0x1018 /* 6 bytes MAC address for 802.11a ?? */ -#define SSB_SPROM4_ETHPHY 0x105A /* Ethernet PHY settings */ +#define SSB_SPROM4_ETHPHY 0x105A /* Ethernet PHY settings ?? */ #define SSB_SPROM4_ETHPHY_ET0A 0x001F /* MII Address for enet0 */ #define SSB_SPROM4_ETHPHY_ET1A 0x03E0 /* MII Address for enet1 */ #define SSB_SPROM4_ETHPHY_ET1A_SHIFT 5 @@ -280,24 +283,28 @@ #define SSB_SPROM4_AGAIN_1 0xFF00 /* Antenna 1 */ #define SSB_SPROM4_AGAIN_1_SHIFT 8 #define SSB_SPROM4_BFLHI 0x1046 /* Board Flags Hi */ -#define SSB_SPROM4_MAXP_A 0x1000 /* Max Power A ?? */ -#define SSB_SPROM4_MAXP_A_HI 0x00FF /* Mask for Hi */ -#define SSB_SPROM4_MAXP_A_LO 0xFF00 /* Mask for Lo */ -#define SSB_SPROM4_MAXP_A_LO_SHIFT 16 /* Shift for Lo */ -#define SSB_SPROM4_PA1LOB0 0x1000 /* ?? */ -#define SSB_SPROM4_PA1LOB1 0x1000 /* ?? */ -#define SSB_SPROM4_PA1LOB2 0x1000 /* ?? */ -#define SSB_SPROM4_PA1HIB0 0x1000 /* ?? */ -#define SSB_SPROM4_PA1HIB1 0x1000 /* ?? */ -#define SSB_SPROM4_PA1HIB2 0x1000 /* ?? */ -#define SSB_SPROM4_OPO 0x1000 /* ?? */ -#define SSB_SPROM4_OPO_VALUE 0x0000 /* ?? */ -#define SSB_SPROM4_GPIOLDC 0x105A /* LED Powersave Duty Cycle */ -#define SSB_SPROM4_GPIOLDC_OFF 0x0000FF00 /* Off Count */ -#define SSB_SPROM4_GPIOLDC_OFF_SHIFT 8 -#define SSB_SPROM4_GPIOLDC_ON 0x00FF0000 /* On Count */ -#define SSB_SPROM4_GPIOLDC_ON_SHIFT 16 - +#define SSB_SPROM4_MAXP_BG 0x1080 /* Max Power BG in path 1 */ +#define SSB_SPROM4_MAXP_BG_MASK 0x00FF /* Mask for Max Power BG */ +#define SSB_SPROM4_ITSSI_BG 0xFF00 /* Mask for path 1 itssi_bg */ +#define SSB_SPROM4_ITSSI_BG_SHIFT 8 +#define SSB_SPROM4_MAXP_A 0x108A /* Max Power A in path 1 */ +#define SSB_SPROM4_MAXP_A_MASK 0x00FF /* Mask for Max Power A */ +#define SSB_SPROM4_ITSSI_A 0xFF00 /* Mask for path 1 itssi_a */ +#define SSB_SPROM4_ITSSI_A_SHIFT 8 +#define SSB_SPROM4_GPIOA 0x1056 /* Gen. Purpose IO # 0 and 1 */ +#define SSB_SPROM4_GPIOA_P0 0x00FF /* Pin 0 */ +#define SSB_SPROM4_GPIOA_P1 0xFF00 /* Pin 1 */ +#define SSB_SPROM4_GPIOA_P1_SHIFT 8 +#define SSB_SPROM4_GPIOB 0x1058 /* Gen. Purpose IO # 2 and 3 */ +#define SSB_SPROM4_GPIOB_P2 0x00FF /* Pin 2 */ +#define SSB_SPROM4_GPIOB_P3 0xFF00 /* Pin 3 */ +#define SSB_SPROM4_GPIOB_P3_SHIFT 8 +#define SSB_SPROM4_PA0B0 0x1082 /* The paXbY locations are */ +#define SSB_SPROM4_PA0B1 0x1084 /* only guesses */ +#define SSB_SPROM4_PA0B2 0x1086 +#define SSB_SPROM4_PA1B0 0x108E +#define SSB_SPROM4_PA1B1 0x1090 +#define SSB_SPROM4_PA1B2 0x1092 /* Values for SSB_SPROM1_BINF_CCODE */ enum { |