diff options
Diffstat (limited to 'include')
1272 files changed, 36585 insertions, 20286 deletions
diff --git a/include/asm-alpha/atomic.h b/include/asm-alpha/atomic.h index 1b383e3cb68c..6183eab006d4 100644 --- a/include/asm-alpha/atomic.h +++ b/include/asm-alpha/atomic.h @@ -1,6 +1,8 @@ #ifndef _ALPHA_ATOMIC_H #define _ALPHA_ATOMIC_H +#include <asm/barrier.h> + /* * Atomic operations that C can't guarantee us. Useful for * resource counting etc... @@ -100,77 +102,94 @@ static __inline__ void atomic64_sub(long i, atomic64_t * v) static __inline__ long atomic_add_return(int i, atomic_t * v) { long temp, result; + smp_mb(); __asm__ __volatile__( "1: ldl_l %0,%1\n" " addl %0,%3,%2\n" " addl %0,%3,%0\n" " stl_c %0,%1\n" " beq %0,2f\n" - " mb\n" ".subsection 2\n" "2: br 1b\n" ".previous" :"=&r" (temp), "=m" (v->counter), "=&r" (result) :"Ir" (i), "m" (v->counter) : "memory"); + smp_mb(); return result; } -#define atomic_add_negative(a, v) (atomic_add_return((a), (v)) < 0) - static __inline__ long atomic64_add_return(long i, atomic64_t * v) { long temp, result; + smp_mb(); __asm__ __volatile__( "1: ldq_l %0,%1\n" " addq %0,%3,%2\n" " addq %0,%3,%0\n" " stq_c %0,%1\n" " beq %0,2f\n" - " mb\n" ".subsection 2\n" "2: br 1b\n" ".previous" :"=&r" (temp), "=m" (v->counter), "=&r" (result) :"Ir" (i), "m" (v->counter) : "memory"); + smp_mb(); return result; } static __inline__ long atomic_sub_return(int i, atomic_t * v) { long temp, result; + smp_mb(); __asm__ __volatile__( "1: ldl_l %0,%1\n" " subl %0,%3,%2\n" " subl %0,%3,%0\n" " stl_c %0,%1\n" " beq %0,2f\n" - " mb\n" ".subsection 2\n" "2: br 1b\n" ".previous" :"=&r" (temp), "=m" (v->counter), "=&r" (result) :"Ir" (i), "m" (v->counter) : "memory"); + smp_mb(); return result; } static __inline__ long atomic64_sub_return(long i, atomic64_t * v) { long temp, result; + smp_mb(); __asm__ __volatile__( "1: ldq_l %0,%1\n" " subq %0,%3,%2\n" " subq %0,%3,%0\n" " stq_c %0,%1\n" " beq %0,2f\n" - " mb\n" ".subsection 2\n" "2: br 1b\n" ".previous" :"=&r" (temp), "=m" (v->counter), "=&r" (result) :"Ir" (i), "m" (v->counter) : "memory"); + smp_mb(); return result; } +#define atomic_cmpxchg(v, o, n) ((int)cmpxchg(&((v)->counter), (o), (n))) + +#define atomic_add_unless(v, a, u) \ +({ \ + int c, old; \ + c = atomic_read(v); \ + while (c != (u) && (old = atomic_cmpxchg((v), c, c + (a))) != c) \ + c = old; \ + c != (u); \ +}) +#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0) + +#define atomic_add_negative(a, v) (atomic_add_return((a), (v)) < 0) +#define atomic64_add_negative(a, v) (atomic64_add_return((a), (v)) < 0) + #define atomic_dec_return(v) atomic_sub_return(1,(v)) #define atomic64_dec_return(v) atomic64_sub_return(1,(v)) @@ -181,6 +200,8 @@ static __inline__ long atomic64_sub_return(long i, atomic64_t * v) #define atomic64_sub_and_test(i,v) (atomic64_sub_return((i), (v)) == 0) #define atomic_inc_and_test(v) (atomic_add_return(1, (v)) == 0) +#define atomic64_inc_and_test(v) (atomic64_add_return(1, (v)) == 0) + #define atomic_dec_and_test(v) (atomic_sub_return(1, (v)) == 0) #define atomic64_dec_and_test(v) (atomic64_sub_return(1, (v)) == 0) diff --git a/include/asm-alpha/barrier.h b/include/asm-alpha/barrier.h new file mode 100644 index 000000000000..681ff581afa5 --- /dev/null +++ b/include/asm-alpha/barrier.h @@ -0,0 +1,36 @@ +#ifndef __BARRIER_H +#define __BARRIER_H + +#include <asm/compiler.h> + +#define mb() \ +__asm__ __volatile__("mb": : :"memory") + +#define rmb() \ +__asm__ __volatile__("mb": : :"memory") + +#define wmb() \ +__asm__ __volatile__("wmb": : :"memory") + +#define read_barrier_depends() \ +__asm__ __volatile__("mb": : :"memory") + +#ifdef CONFIG_SMP +#define smp_mb() mb() +#define smp_rmb() rmb() +#define smp_wmb() wmb() +#define smp_read_barrier_depends() read_barrier_depends() +#else +#define smp_mb() barrier() +#define smp_rmb() barrier() +#define smp_wmb() barrier() +#define smp_read_barrier_depends() barrier() +#endif + +#define set_mb(var, value) \ +do { var = value; mb(); } while (0) + +#define set_wmb(var, value) \ +do { var = value; wmb(); } while (0) + +#endif /* __BARRIER_H */ diff --git a/include/asm-alpha/compiler.h b/include/asm-alpha/compiler.h index 399c33b7be51..0a4a8b40dfcd 100644 --- a/include/asm-alpha/compiler.h +++ b/include/asm-alpha/compiler.h @@ -98,6 +98,9 @@ #undef inline #undef __inline__ #undef __inline - +#if __GNUC__ == 3 && __GNUC_MINOR__ >= 1 || __GNUC__ > 3 +#undef __always_inline +#define __always_inline inline __attribute__((always_inline)) +#endif #endif /* __ALPHA_COMPILER_H */ diff --git a/include/asm-alpha/dma-mapping.h b/include/asm-alpha/dma-mapping.h index c675f282d6ad..680f7ecbb28f 100644 --- a/include/asm-alpha/dma-mapping.h +++ b/include/asm-alpha/dma-mapping.h @@ -31,7 +31,7 @@ #else /* no PCI - no IOMMU. */ void *dma_alloc_coherent(struct device *dev, size_t size, - dma_addr_t *dma_handle, int gfp); + dma_addr_t *dma_handle, gfp_t gfp); int dma_map_sg(struct device *dev, struct scatterlist *sg, int nents, enum dma_data_direction direction); diff --git a/include/asm-alpha/ide.h b/include/asm-alpha/ide.h index 68934a25931f..6126afe27380 100644 --- a/include/asm-alpha/ide.h +++ b/include/asm-alpha/ide.h @@ -15,10 +15,6 @@ #include <linux/config.h> -#ifndef MAX_HWIFS -#define MAX_HWIFS CONFIG_IDE_MAX_HWIFS -#endif - #define IDE_ARCH_OBSOLETE_DEFAULTS static inline int ide_default_irq(unsigned long base) diff --git a/include/asm-alpha/pgtable.h b/include/asm-alpha/pgtable.h index 8393bf374b2b..a985cd29b6db 100644 --- a/include/asm-alpha/pgtable.h +++ b/include/asm-alpha/pgtable.h @@ -17,6 +17,9 @@ #include <asm/processor.h> /* For TASK_SIZE */ #include <asm/machvec.h> +struct mm_struct; +struct vm_area_struct; + /* Certain architectures need to do special things when PTEs * within a page table are directly modified. Thus, the following * hook is made available. diff --git a/include/asm-alpha/ptrace.h b/include/asm-alpha/ptrace.h index d462c5e14c13..072375c135b4 100644 --- a/include/asm-alpha/ptrace.h +++ b/include/asm-alpha/ptrace.h @@ -67,6 +67,9 @@ struct switch_stack { }; #ifdef __KERNEL__ + +#define __ARCH_SYS_PTRACE 1 + #define user_mode(regs) (((regs)->ps & 8) != 0) #define instruction_pointer(regs) ((regs)->pc) #define profile_pc(regs) instruction_pointer(regs) diff --git a/include/asm-alpha/rwsem.h b/include/asm-alpha/rwsem.h index 8e058a67c9a4..fafdd4f7010a 100644 --- a/include/asm-alpha/rwsem.h +++ b/include/asm-alpha/rwsem.h @@ -262,5 +262,10 @@ static inline long rwsem_atomic_update(long val, struct rw_semaphore *sem) #endif } +static inline int rwsem_is_locked(struct rw_semaphore *sem) +{ + return (sem->count != 0); +} + #endif /* __KERNEL__ */ #endif /* _ALPHA_RWSEM_H */ diff --git a/include/asm-alpha/semaphore.h b/include/asm-alpha/semaphore.h index eb2cbd97d404..1a6295f2c2d4 100644 --- a/include/asm-alpha/semaphore.h +++ b/include/asm-alpha/semaphore.h @@ -26,9 +26,6 @@ struct semaphore { .wait = __WAIT_QUEUE_HEAD_INITIALIZER((name).wait), \ } -#define __MUTEX_INITIALIZER(name) \ - __SEMAPHORE_INITIALIZER(name,1) - #define __DECLARE_SEMAPHORE_GENERIC(name,count) \ struct semaphore name = __SEMAPHORE_INITIALIZER(name,count) diff --git a/include/asm-alpha/system.h b/include/asm-alpha/system.h index bdb4d66418f1..050e86d12891 100644 --- a/include/asm-alpha/system.h +++ b/include/asm-alpha/system.h @@ -4,6 +4,7 @@ #include <linux/config.h> #include <asm/pal.h> #include <asm/page.h> +#include <asm/barrier.h> /* * System defines.. Note that this is included both from .c and .S @@ -139,36 +140,6 @@ extern void halt(void) __attribute__((noreturn)); struct task_struct; extern struct task_struct *alpha_switch_to(unsigned long, struct task_struct*); -#define mb() \ -__asm__ __volatile__("mb": : :"memory") - -#define rmb() \ -__asm__ __volatile__("mb": : :"memory") - -#define wmb() \ -__asm__ __volatile__("wmb": : :"memory") - -#define read_barrier_depends() \ -__asm__ __volatile__("mb": : :"memory") - -#ifdef CONFIG_SMP -#define smp_mb() mb() -#define smp_rmb() rmb() -#define smp_wmb() wmb() -#define smp_read_barrier_depends() read_barrier_depends() -#else -#define smp_mb() barrier() -#define smp_rmb() barrier() -#define smp_wmb() barrier() -#define smp_read_barrier_depends() barrier() -#endif - -#define set_mb(var, value) \ -do { var = value; mb(); } while (0) - -#define set_wmb(var, value) \ -do { var = value; wmb(); } while (0) - #define imb() \ __asm__ __volatile__ ("call_pal %0 #imb" : : "i" (PAL_imb) : "memory") diff --git a/include/asm-arm/arch-aaec2000/aaec2000.h b/include/asm-arm/arch-aaec2000/aaec2000.h index 0e9b7e18af05..002227924b9f 100644 --- a/include/asm-arm/arch-aaec2000/aaec2000.h +++ b/include/asm-arm/arch-aaec2000/aaec2000.h @@ -17,6 +17,16 @@ #error You must include hardware.h not this file #endif /* __ASM_ARCH_HARDWARE_H */ +/* Chip selects */ +#define AAEC_CS0 0x00000000 +#define AAEC_CS1 0x10000000 +#define AAEC_CS2 0x20000000 +#define AAEC_CS3 0x30000000 + +/* Flash */ +#define AAEC_FLASH_BASE AAEC_CS0 +#define AAEC_FLASH_SIZE SZ_64M + /* Interrupt controller */ #define IRQ_BASE __REG(0x80000500) #define IRQ_INTSR __REG(0x80000500) /* Int Status Register */ @@ -148,4 +158,50 @@ #define POWER_STFCLR __REG(0x8000041c) /* NbFlg, RSTFlg, PFFlg, CLDFlg Clear */ #define POWER_CLKSET __REG(0x80000420) /* Clock Speed Control */ +/* GPIO Registers */ +#define AAEC_GPIO_PHYS 0x80000e00 + +#define AAEC_GPIO_PADR __REG(AAEC_GPIO_PHYS + 0x00) +#define AAEC_GPIO_PBDR __REG(AAEC_GPIO_PHYS + 0x04) +#define AAEC_GPIO_PCDR __REG(AAEC_GPIO_PHYS + 0x08) +#define AAEC_GPIO_PDDR __REG(AAEC_GPIO_PHYS + 0x0c) +#define AAEC_GPIO_PADDR __REG(AAEC_GPIO_PHYS + 0x10) +#define AAEC_GPIO_PBDDR __REG(AAEC_GPIO_PHYS + 0x14) +#define AAEC_GPIO_PCDDR __REG(AAEC_GPIO_PHYS + 0x18) +#define AAEC_GPIO_PDDDR __REG(AAEC_GPIO_PHYS + 0x1c) +#define AAEC_GPIO_PEDR __REG(AAEC_GPIO_PHYS + 0x20) +#define AAEC_GPIO_PEDDR __REG(AAEC_GPIO_PHYS + 0x24) +#define AAEC_GPIO_KSCAN __REG(AAEC_GPIO_PHYS + 0x28) +#define AAEC_GPIO_PINMUX __REG(AAEC_GPIO_PHYS + 0x2c) +#define AAEC_GPIO_PFDR __REG(AAEC_GPIO_PHYS + 0x30) +#define AAEC_GPIO_PFDDR __REG(AAEC_GPIO_PHYS + 0x34) +#define AAEC_GPIO_PGDR __REG(AAEC_GPIO_PHYS + 0x38) +#define AAEC_GPIO_PGDDR __REG(AAEC_GPIO_PHYS + 0x3c) +#define AAEC_GPIO_PHDR __REG(AAEC_GPIO_PHYS + 0x40) +#define AAEC_GPIO_PHDDR __REG(AAEC_GPIO_PHYS + 0x44) +#define AAEC_GPIO_RAZ __REG(AAEC_GPIO_PHYS + 0x48) +#define AAEC_GPIO_INTTYPE1 __REG(AAEC_GPIO_PHYS + 0x4c) +#define AAEC_GPIO_INTTYPE2 __REG(AAEC_GPIO_PHYS + 0x50) +#define AAEC_GPIO_FEOI __REG(AAEC_GPIO_PHYS + 0x54) +#define AAEC_GPIO_INTEN __REG(AAEC_GPIO_PHYS + 0x58) +#define AAEC_GPIO_INTSTATUS __REG(AAEC_GPIO_PHYS + 0x5c) +#define AAEC_GPIO_RAWINTSTATUS __REG(AAEC_GPIO_PHYS + 0x60) +#define AAEC_GPIO_DB __REG(AAEC_GPIO_PHYS + 0x64) +#define AAEC_GPIO_PAPINDR __REG(AAEC_GPIO_PHYS + 0x68) +#define AAEC_GPIO_PBPINDR __REG(AAEC_GPIO_PHYS + 0x6c) +#define AAEC_GPIO_PCPINDR __REG(AAEC_GPIO_PHYS + 0x70) +#define AAEC_GPIO_PDPINDR __REG(AAEC_GPIO_PHYS + 0x74) +#define AAEC_GPIO_PEPINDR __REG(AAEC_GPIO_PHYS + 0x78) +#define AAEC_GPIO_PFPINDR __REG(AAEC_GPIO_PHYS + 0x7c) +#define AAEC_GPIO_PGPINDR __REG(AAEC_GPIO_PHYS + 0x80) +#define AAEC_GPIO_PHPINDR __REG(AAEC_GPIO_PHYS + 0x84) + +#define AAEC_GPIO_PINMUX_PE0CON (1 << 0) +#define AAEC_GPIO_PINMUX_PD0CON (1 << 1) +#define AAEC_GPIO_PINMUX_CODECON (1 << 2) +#define AAEC_GPIO_PINMUX_UART3CON (1 << 3) + +/* LCD Controller */ +#define AAEC_CLCD_PHYS 0x80003000 + #endif /* __ARM_ARCH_AAEC2000_H */ diff --git a/include/asm-arm/arch-aaec2000/aaed2000.h b/include/asm-arm/arch-aaec2000/aaed2000.h new file mode 100644 index 000000000000..bc76d2badb91 --- /dev/null +++ b/include/asm-arm/arch-aaec2000/aaed2000.h @@ -0,0 +1,40 @@ +/* + * linux/include/asm-arm/arch-aaec2000/aaed2000.h + * + * AAED-2000 specific bits definition + * + * Copyright (c) 2005 Nicolas Bellido Y Ortega + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __ASM_ARCH_AAED2000_H +#define __ASM_ARCH_AAED2000_H + +/* External GPIOs. */ + +#define EXT_GPIO_PBASE AAEC_CS3 +#define EXT_GPIO_VBASE 0xf8100000 +#define EXT_GPIO_LENGTH 0x00001000 + +#define __ext_gpio_p2v(x) ((x) - EXT_GPIO_PBASE + EXT_GPIO_VBASE) +#define __ext_gpio_v2p(x) ((x) + EXT_GPIO_PBASE - EXT_GPIO_VBASE) + +#define __EXT_GPIO_REG(x) (*((volatile u32 *)__ext_gpio_p2v(x))) +#define __EXT_GPIO_PREG(x) (__ext_gpio_v2p((u32)&(x))) + +#define AAED_EXT_GPIO __EXT_GPIO_REG(EXT_GPIO_PBASE) + +#define AAED_EGPIO_KBD_SCAN 0x00003fff /* Keyboard scan data */ +#define AAED_EGPIO_PWR_INT 0x00008fff /* Smart battery charger interrupt */ +#define AAED_EGPIO_SWITCHED 0x000f0000 /* DIP Switches */ +#define AAED_EGPIO_USB_VBUS 0x00400000 /* USB Vbus sense */ +#define AAED_EGPIO_LCD_PWR_EN 0x02000000 /* LCD and backlight PWR enable */ +#define AAED_EGPIO_nLED0 0x20000000 /* LED 0 */ +#define AAED_EGPIO_nLED1 0x20000000 /* LED 1 */ +#define AAED_EGPIO_nLED2 0x20000000 /* LED 2 */ + + +#endif /* __ARM_ARCH_AAED2000_H */ diff --git a/include/asm-arm/arch-aaec2000/hardware.h b/include/asm-arm/arch-aaec2000/hardware.h index 4c37219e030e..153506fd06ed 100644 --- a/include/asm-arm/arch-aaec2000/hardware.h +++ b/include/asm-arm/arch-aaec2000/hardware.h @@ -11,7 +11,8 @@ #ifndef __ASM_ARCH_HARDWARE_H #define __ASM_ARCH_HARDWARE_H -#include <linux/config.h> +#include <asm/sizes.h> +#include <asm/arch/aaec2000.h> /* The kernel is loaded at physical address 0xf8000000. * We map the IO space a bit after diff --git a/include/asm-arm/arch-aaec2000/io.h b/include/asm-arm/arch-aaec2000/io.h index c58a8d10425a..8d67907fd4f0 100644 --- a/include/asm-arm/arch-aaec2000/io.h +++ b/include/asm-arm/arch-aaec2000/io.h @@ -6,6 +6,8 @@ #ifndef __ASM_ARM_ARCH_IO_H #define __ASM_ARM_ARCH_IO_H +#include <asm/hardware.h> + #define IO_SPACE_LIMIT 0xffffffff /* diff --git a/include/asm-arm/arch-aaec2000/memory.h b/include/asm-arm/arch-aaec2000/memory.h index 79c90813bc3e..d8209f8911d6 100644 --- a/include/asm-arm/arch-aaec2000/memory.h +++ b/include/asm-arm/arch-aaec2000/memory.h @@ -13,7 +13,7 @@ #include <linux/config.h> -#define PHYS_OFFSET (0xf0000000UL) +#define PHYS_OFFSET UL(0xf0000000) #define __virt_to_bus(x) __virt_to_phys(x) #define __bus_to_virt(x) __phys_to_virt(x) diff --git a/include/asm-arm/arch-cl7500/io.h b/include/asm-arm/arch-cl7500/io.h index f0113bc75630..89a33287f4fe 100644 --- a/include/asm-arm/arch-cl7500/io.h +++ b/include/asm-arm/arch-cl7500/io.h @@ -10,6 +10,8 @@ #ifndef __ASM_ARM_ARCH_IO_H #define __ASM_ARM_ARCH_IO_H +#include <asm/hardware.h> + #define IO_SPACE_LIMIT 0xffffffff /* diff --git a/include/asm-arm/arch-cl7500/memory.h b/include/asm-arm/arch-cl7500/memory.h index 9776bba8e585..34f40a6cec30 100644 --- a/include/asm-arm/arch-cl7500/memory.h +++ b/include/asm-arm/arch-cl7500/memory.h @@ -17,7 +17,7 @@ /* * Physical DRAM offset. */ -#define PHYS_OFFSET (0x10000000UL) +#define PHYS_OFFSET UL(0x10000000) /* * These are exactly the same on the RiscPC as the diff --git a/include/asm-arm/arch-clps711x/io.h b/include/asm-arm/arch-clps711x/io.h index 14d7e8da5453..62613b0e2d96 100644 --- a/include/asm-arm/arch-clps711x/io.h +++ b/include/asm-arm/arch-clps711x/io.h @@ -20,6 +20,8 @@ #ifndef __ASM_ARM_ARCH_IO_H #define __ASM_ARM_ARCH_IO_H +#include <asm/hardware.h> + #define IO_SPACE_LIMIT 0xffffffff #define __io(a) ((void __iomem *)(a)) diff --git a/include/asm-arm/arch-clps711x/memory.h b/include/asm-arm/arch-clps711x/memory.h index bd978947db42..61d8717406ce 100644 --- a/include/asm-arm/arch-clps711x/memory.h +++ b/include/asm-arm/arch-clps711x/memory.h @@ -25,7 +25,7 @@ /* * Physical DRAM offset. */ -#define PHYS_OFFSET (0xc0000000UL) +#define PHYS_OFFSET UL(0xc0000000) /* * Virtual view <-> DMA view memory address translations diff --git a/include/asm-arm/arch-clps711x/uncompress.h b/include/asm-arm/arch-clps711x/uncompress.h index 7d0ab791b16c..9fc4bcfa1681 100644 --- a/include/asm-arm/arch-clps711x/uncompress.h +++ b/include/asm-arm/arch-clps711x/uncompress.h @@ -19,7 +19,7 @@ */ #include <linux/config.h> #include <asm/arch/io.h> -#include <asm/arch/hardware.h> +#include <asm/hardware.h> #include <asm/hardware/clps7111.h> #undef CLPS7111_BASE diff --git a/include/asm-arm/arch-ebsa110/io.h b/include/asm-arm/arch-ebsa110/io.h index 68e04c0bb3f7..ae048441c9ed 100644 --- a/include/asm-arm/arch-ebsa110/io.h +++ b/include/asm-arm/arch-ebsa110/io.h @@ -64,7 +64,7 @@ void __writel(u32 val, void __iomem *addr); #define writew(v,b) __writew(v,b) #define writel(v,b) __writel(v,b) -#define __arch_ioremap(cookie,sz,c,a) ((void __iomem *)(cookie)) +#define __arch_ioremap(cookie,sz,c) ((void __iomem *)(cookie)) #define __arch_iounmap(cookie) do { } while (0) extern void insb(unsigned int port, void *buf, int sz); diff --git a/include/asm-arm/arch-ebsa110/memory.h b/include/asm-arm/arch-ebsa110/memory.h index 5a9493e12275..02f144520c10 100644 --- a/include/asm-arm/arch-ebsa110/memory.h +++ b/include/asm-arm/arch-ebsa110/memory.h @@ -19,7 +19,7 @@ /* * Physical DRAM offset. */ -#define PHYS_OFFSET (0x00000000UL) +#define PHYS_OFFSET UL(0x00000000) /* * We keep this 1:1 so that we don't interfere diff --git a/include/asm-arm/arch-ebsa285/io.h b/include/asm-arm/arch-ebsa285/io.h index 70576b17f922..776f9d377057 100644 --- a/include/asm-arm/arch-ebsa285/io.h +++ b/include/asm-arm/arch-ebsa285/io.h @@ -14,6 +14,8 @@ #ifndef __ASM_ARM_ARCH_IO_H #define __ASM_ARM_ARCH_IO_H +#include <asm/hardware.h> + #define IO_SPACE_LIMIT 0xffff /* diff --git a/include/asm-arm/arch-ebsa285/memory.h b/include/asm-arm/arch-ebsa285/memory.h index d0466f9987d3..09e335cd687d 100644 --- a/include/asm-arm/arch-ebsa285/memory.h +++ b/include/asm-arm/arch-ebsa285/memory.h @@ -46,14 +46,14 @@ extern unsigned long __bus_to_virt(unsigned long); #if defined(CONFIG_ARCH_FOOTBRIDGE) /* Task size and page offset at 3GB */ -#define TASK_SIZE (0xbf000000UL) -#define PAGE_OFFSET (0xc0000000UL) +#define TASK_SIZE UL(0xbf000000) +#define PAGE_OFFSET UL(0xc0000000) #elif defined(CONFIG_ARCH_CO285) /* Task size and page offset at 1.5GB */ -#define TASK_SIZE (0x5f000000UL) -#define PAGE_OFFSET (0x60000000UL) +#define TASK_SIZE UL(0x5f000000) +#define PAGE_OFFSET UL(0x60000000) #else @@ -64,7 +64,7 @@ extern unsigned long __bus_to_virt(unsigned long); /* * Physical DRAM offset. */ -#define PHYS_OFFSET (0x00000000UL) +#define PHYS_OFFSET UL(0x00000000) /* * This decides where the kernel will search for a free chunk of vm diff --git a/include/asm-arm/arch-epxa10db/io.h b/include/asm-arm/arch-epxa10db/io.h index 1f0afa257621..9fe100c9d6be 100644 --- a/include/asm-arm/arch-epxa10db/io.h +++ b/include/asm-arm/arch-epxa10db/io.h @@ -20,6 +20,8 @@ #ifndef __ASM_ARM_ARCH_IO_H #define __ASM_ARM_ARCH_IO_H +#include <asm/hardware.h> + #define IO_SPACE_LIMIT 0xffff diff --git a/include/asm-arm/arch-epxa10db/memory.h b/include/asm-arm/arch-epxa10db/memory.h index 3f86bf7f67f0..999541b6a9f5 100644 --- a/include/asm-arm/arch-epxa10db/memory.h +++ b/include/asm-arm/arch-epxa10db/memory.h @@ -23,7 +23,7 @@ /* * Physical DRAM offset. */ -#define PHYS_OFFSET (0x00000000UL) +#define PHYS_OFFSET UL(0x00000000) /* * Virtual view <-> DMA view memory address translations diff --git a/include/asm-arm/arch-epxa10db/uncompress.h b/include/asm-arm/arch-epxa10db/uncompress.h index d33ad6a93749..fdfe0e6848f8 100644 --- a/include/asm-arm/arch-epxa10db/uncompress.h +++ b/include/asm-arm/arch-epxa10db/uncompress.h @@ -19,7 +19,7 @@ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ #include "asm/arch/platform.h" -#include "asm/arch/hardware.h" +#include "asm/hardware.h" #define UART00_TYPE (volatile unsigned int*) #include "asm/arch/uart00.h" diff --git a/include/asm-arm/arch-h720x/io.h b/include/asm-arm/arch-h720x/io.h index 68814828c9a7..d3ccfd8172b7 100644 --- a/include/asm-arm/arch-h720x/io.h +++ b/include/asm-arm/arch-h720x/io.h @@ -14,7 +14,7 @@ #ifndef __ASM_ARM_ARCH_IO_H #define __ASM_ARM_ARCH_IO_H -#include <asm/arch/hardware.h> +#include <asm/hardware.h> #define IO_SPACE_LIMIT 0xffffffff diff --git a/include/asm-arm/arch-h720x/memory.h b/include/asm-arm/arch-h720x/memory.h index 5633447af268..4a1bfd78a0fe 100644 --- a/include/asm-arm/arch-h720x/memory.h +++ b/include/asm-arm/arch-h720x/memory.h @@ -11,7 +11,7 @@ * Page offset: * ( 0xc0000000UL ) */ -#define PHYS_OFFSET (0x40000000UL) +#define PHYS_OFFSET UL(0x40000000) /* * Virtual view <-> DMA view memory address translations diff --git a/include/asm-arm/arch-h720x/system.h b/include/asm-arm/arch-h720x/system.h index 0b025e227ec2..09eda84592ff 100644 --- a/include/asm-arm/arch-h720x/system.h +++ b/include/asm-arm/arch-h720x/system.h @@ -17,9 +17,11 @@ static void arch_idle(void) { CPU_REG (PMU_BASE, PMU_MODE) = PMU_MODE_IDLE; - __asm__ __volatile__( - "mov r0, r0\n\t" - "mov r0, r0"); + nop(); + nop(); + CPU_REG (PMU_BASE, PMU_MODE) = PMU_MODE_RUN; + nop(); + nop(); } diff --git a/include/asm-arm/arch-h720x/uncompress.h b/include/asm-arm/arch-h720x/uncompress.h index 2fffacf85a01..9535764bcc71 100644 --- a/include/asm-arm/arch-h720x/uncompress.h +++ b/include/asm-arm/arch-h720x/uncompress.h @@ -7,7 +7,7 @@ #ifndef __ASM_ARCH_UNCOMPRESS_H #define __ASM_ARCH_UNCOMPRESS_H -#include <asm/arch/hardware.h> +#include <asm/hardware.h> #define LSR 0x14 #define TEMPTY 0x40 diff --git a/include/asm-arm/arch-imx/imx-regs.h b/include/asm-arm/arch-imx/imx-regs.h index 93b840e8fa60..a6912b3d8671 100644 --- a/include/asm-arm/arch-imx/imx-regs.h +++ b/include/asm-arm/arch-imx/imx-regs.h @@ -76,6 +76,7 @@ #define GPIO_PIN_MASK 0x1f #define GPIO_PORT_MASK (0x3 << 5) +#define GPIO_PORT_SHIFT 5 #define GPIO_PORTA (0<<5) #define GPIO_PORTB (1<<5) #define GPIO_PORTC (2<<5) @@ -88,24 +89,37 @@ #define GPIO_PF (0<<9) #define GPIO_AF (1<<9) +#define GPIO_OCR_SHIFT 10 #define GPIO_OCR_MASK (3<<10) #define GPIO_AIN (0<<10) #define GPIO_BIN (1<<10) #define GPIO_CIN (2<<10) -#define GPIO_GPIO (3<<10) +#define GPIO_DR (3<<10) -#define GPIO_AOUT (1<<12) -#define GPIO_BOUT (1<<13) +#define GPIO_AOUT_SHIFT 12 +#define GPIO_AOUT_MASK (3<<12) +#define GPIO_AOUT (0<<12) +#define GPIO_AOUT_ISR (1<<12) +#define GPIO_AOUT_0 (2<<12) +#define GPIO_AOUT_1 (3<<12) + +#define GPIO_BOUT_SHIFT 14 +#define GPIO_BOUT_MASK (3<<14) +#define GPIO_BOUT (0<<14) +#define GPIO_BOUT_ISR (1<<14) +#define GPIO_BOUT_0 (2<<14) +#define GPIO_BOUT_1 (3<<14) + +#define GPIO_GIUS (1<<16) /* assignements for GPIO alternate/primary functions */ /* FIXME: This list is not completed. The correct directions are * missing on some (many) pins */ -#define PA0_PF_A24 ( GPIO_PORTA | GPIO_PF | 0 ) -#define PA0_AIN_SPI2_CLK ( GPIO_PORTA | GPIO_OUT | GPIO_AIN | 0 ) +#define PA0_AIN_SPI2_CLK ( GPIO_GIUS | GPIO_PORTA | GPIO_OUT | 0 ) #define PA0_AF_ETMTRACESYNC ( GPIO_PORTA | GPIO_AF | 0 ) -#define PA1_AOUT_SPI2_RXD ( GPIO_PORTA | GPIO_IN | GPIO_AOUT | 1 ) +#define PA1_AOUT_SPI2_RXD ( GPIO_GIUS | GPIO_PORTA | GPIO_IN | 1 ) #define PA1_PF_TIN ( GPIO_PORTA | GPIO_PF | 1 ) #define PA2_PF_PWM0 ( GPIO_PORTA | GPIO_OUT | GPIO_PF | 2 ) #define PA3_PF_CSI_MCLK ( GPIO_PORTA | GPIO_PF | 3 ) @@ -123,7 +137,7 @@ #define PA15_PF_I2C_SDA ( GPIO_PORTA | GPIO_OUT | GPIO_PF | 15 ) #define PA16_PF_I2C_SCL ( GPIO_PORTA | GPIO_OUT | GPIO_PF | 16 ) #define PA17_AF_ETMTRACEPKT4 ( GPIO_PORTA | GPIO_AF | 17 ) -#define PA17_AIN_SPI2_SS ( GPIO_PORTA | GPIO_AIN | 17 ) +#define PA17_AIN_SPI2_SS ( GPIO_GIUS | GPIO_PORTA | GPIO_OUT | 17 ) #define PA18_AF_ETMTRACEPKT5 ( GPIO_PORTA | GPIO_AF | 18 ) #define PA19_AF_ETMTRACEPKT6 ( GPIO_PORTA | GPIO_AF | 19 ) #define PA20_AF_ETMTRACEPKT7 ( GPIO_PORTA | GPIO_AF | 20 ) @@ -191,19 +205,27 @@ #define PC15_PF_SPI1_SS ( GPIO_PORTC | GPIO_PF | 15 ) #define PC16_PF_SPI1_MISO ( GPIO_PORTC | GPIO_PF | 16 ) #define PC17_PF_SPI1_MOSI ( GPIO_PORTC | GPIO_PF | 17 ) +#define PC24_BIN_UART3_RI ( GPIO_GIUS | GPIO_PORTC | GPIO_OUT | GPIO_BIN | 24 ) +#define PC25_BIN_UART3_DSR ( GPIO_GIUS | GPIO_PORTC | GPIO_OUT | GPIO_BIN | 25 ) +#define PC26_AOUT_UART3_DTR ( GPIO_GIUS | GPIO_PORTC | GPIO_IN | 26 ) +#define PC27_BIN_UART3_DCD ( GPIO_GIUS | GPIO_PORTC | GPIO_OUT | GPIO_BIN | 27 ) +#define PC28_BIN_UART3_CTS ( GPIO_GIUS | GPIO_PORTC | GPIO_OUT | GPIO_BIN | 28 ) +#define PC29_AOUT_UART3_RTS ( GPIO_GIUS | GPIO_PORTC | GPIO_IN | 29 ) +#define PC30_BIN_UART3_TX ( GPIO_GIUS | GPIO_PORTC | GPIO_BIN | 30 ) +#define PC31_AOUT_UART3_RX ( GPIO_GIUS | GPIO_PORTC | GPIO_IN | 31) #define PD6_PF_LSCLK ( GPIO_PORTD | GPIO_OUT | GPIO_PF | 6 ) #define PD7_PF_REV ( GPIO_PORTD | GPIO_PF | 7 ) -#define PD7_AF_UART2_DTR ( GPIO_PORTD | GPIO_IN | GPIO_AF | 7 ) -#define PD7_AIN_SPI2_SCLK ( GPIO_PORTD | GPIO_AIN | 7 ) +#define PD7_AF_UART2_DTR ( GPIO_GIUS | GPIO_PORTD | GPIO_IN | GPIO_AF | 7 ) +#define PD7_AIN_SPI2_SCLK ( GPIO_GIUS | GPIO_PORTD | GPIO_AIN | 7 ) #define PD8_PF_CLS ( GPIO_PORTD | GPIO_PF | 8 ) #define PD8_AF_UART2_DCD ( GPIO_PORTD | GPIO_OUT | GPIO_AF | 8 ) -#define PD8_AIN_SPI2_SS ( GPIO_PORTD | GPIO_AIN | 8 ) +#define PD8_AIN_SPI2_SS ( GPIO_GIUS | GPIO_PORTD | GPIO_AIN | 8 ) #define PD9_PF_PS ( GPIO_PORTD | GPIO_PF | 9 ) #define PD9_AF_UART2_RI ( GPIO_PORTD | GPIO_OUT | GPIO_AF | 9 ) -#define PD9_AOUT_SPI2_RXD ( GPIO_PORTD | GPIO_IN | GPIO_AOUT | 9 ) +#define PD9_AOUT_SPI2_RXD ( GPIO_GIUS | GPIO_PORTD | GPIO_IN | 9 ) #define PD10_PF_SPL_SPR ( GPIO_PORTD | GPIO_OUT | GPIO_PF | 10 ) #define PD10_AF_UART2_DSR ( GPIO_PORTD | GPIO_OUT | GPIO_AF | 10 ) -#define PD10_AIN_SPI2_TXD ( GPIO_PORTD | GPIO_OUT | GPIO_AIN | 10 ) +#define PD10_AIN_SPI2_TXD ( GPIO_GIUS | GPIO_PORTD | GPIO_OUT | 10 ) #define PD11_PF_CONTRAST ( GPIO_PORTD | GPIO_OUT | GPIO_PF | 11 ) #define PD12_PF_ACD_OE ( GPIO_PORTD | GPIO_OUT | GPIO_PF | 12 ) #define PD13_PF_LP_HSYNC ( GPIO_PORTD | GPIO_OUT | GPIO_PF | 13 ) @@ -225,7 +247,7 @@ #define PD29_PF_LD14 ( GPIO_PORTD | GPIO_OUT | GPIO_PF | 29 ) #define PD30_PF_LD15 ( GPIO_PORTD | GPIO_OUT | GPIO_PF | 30 ) #define PD31_PF_TMR2OUT ( GPIO_PORTD | GPIO_PF | 31 ) -#define PD31_BIN_SPI2_TXD ( GPIO_PORTD | GPIO_BIN | 31 ) +#define PD31_BIN_SPI2_TXD ( GPIO_GIUS | GPIO_PORTD | GPIO_BIN | 31 ) /* * PWM controller diff --git a/include/asm-arm/arch-imx/io.h b/include/asm-arm/arch-imx/io.h index 28a4cca6a4cb..b191cdd05576 100644 --- a/include/asm-arm/arch-imx/io.h +++ b/include/asm-arm/arch-imx/io.h @@ -20,6 +20,8 @@ #ifndef __ASM_ARM_ARCH_IO_H #define __ASM_ARM_ARCH_IO_H +#include <asm/hardware.h> + #define IO_SPACE_LIMIT 0xffffffff #define __io(a) ((void __iomem *)(a)) diff --git a/include/asm-arm/arch-imx/irqs.h b/include/asm-arm/arch-imx/irqs.h index 238197cfb9d9..f195542898e0 100644 --- a/include/asm-arm/arch-imx/irqs.h +++ b/include/asm-arm/arch-imx/irqs.h @@ -23,7 +23,7 @@ #define __ARM_IRQS_H__ /* Use the imx definitions */ -#include <asm/arch/hardware.h> +#include <asm/hardware.h> /* * IMX Interrupt numbers diff --git a/include/asm-arm/arch-imx/memory.h b/include/asm-arm/arch-imx/memory.h index 116a91fa14f1..d09ae32cd2f4 100644 --- a/include/asm-arm/arch-imx/memory.h +++ b/include/asm-arm/arch-imx/memory.h @@ -21,7 +21,7 @@ #ifndef __ASM_ARCH_MMU_H #define __ASM_ARCH_MMU_H -#define PHYS_OFFSET (0x08000000UL) +#define PHYS_OFFSET UL(0x08000000) /* * Virtual view <-> DMA view memory address translations diff --git a/include/asm-arm/arch-imx/timex.h b/include/asm-arm/arch-imx/timex.h index d65ab3cd5d5d..8c91674706b1 100644 --- a/include/asm-arm/arch-imx/timex.h +++ b/include/asm-arm/arch-imx/timex.h @@ -21,7 +21,7 @@ #ifndef __ASM_ARCH_TIMEX_H #define __ASM_ARCH_TIMEX_H -#include <asm/arch/hardware.h> +#include <asm/hardware.h> #define CLOCK_TICK_RATE (CLK32) #endif diff --git a/include/asm-arm/arch-integrator/hardware.h b/include/asm-arm/arch-integrator/hardware.h index be2716eeaa02..6f0947bc500d 100644 --- a/include/asm-arm/arch-integrator/hardware.h +++ b/include/asm-arm/arch-integrator/hardware.h @@ -33,15 +33,6 @@ #define IO_SIZE 0x0B000000 // How much? #define IO_START INTEGRATOR_HDR_BASE // PA of IO -/* - * Similar to above, but for PCI addresses (memory, IO, Config and the - * V3 chip itself). WARNING: this has to mirror definitions in platform.h - */ -#define PCI_MEMORY_VADDR 0xe8000000 -#define PCI_CONFIG_VADDR 0xec000000 -#define PCI_V3_VADDR 0xed000000 -#define PCI_IO_VADDR 0xee000000 - #define PCIO_BASE PCI_IO_VADDR #define PCIMEM_BASE PCI_MEMORY_VADDR diff --git a/include/asm-arm/arch-integrator/io.h b/include/asm-arm/arch-integrator/io.h index fbea8be67d26..31f2deab51b0 100644 --- a/include/asm-arm/arch-integrator/io.h +++ b/include/asm-arm/arch-integrator/io.h @@ -22,6 +22,14 @@ #define IO_SPACE_LIMIT 0xffff +/* + * WARNING: this has to mirror definitions in platform.h + */ +#define PCI_MEMORY_VADDR 0xe8000000 +#define PCI_CONFIG_VADDR 0xec000000 +#define PCI_V3_VADDR 0xed000000 +#define PCI_IO_VADDR 0xee000000 + #define __io(a) ((void __iomem *)(PCI_IO_VADDR + (a))) #define __mem_pci(a) (a) #define __mem_isa(a) ((a) + PCI_MEMORY_VADDR) diff --git a/include/asm-arm/arch-integrator/memory.h b/include/asm-arm/arch-integrator/memory.h index 2087ea7d28a9..1ab56d783e7c 100644 --- a/include/asm-arm/arch-integrator/memory.h +++ b/include/asm-arm/arch-integrator/memory.h @@ -23,8 +23,8 @@ /* * Physical DRAM offset. */ -#define PHYS_OFFSET (0x00000000UL) -#define BUS_OFFSET (0x80000000UL) +#define PHYS_OFFSET UL(0x00000000) +#define BUS_OFFSET UL(0x80000000) /* * Virtual view <-> DMA view memory address translations diff --git a/include/asm-arm/arch-integrator/smp.h b/include/asm-arm/arch-integrator/smp.h index 0ec7093f7c37..da6981efdc39 100644 --- a/include/asm-arm/arch-integrator/smp.h +++ b/include/asm-arm/arch-integrator/smp.h @@ -3,7 +3,7 @@ #include <linux/config.h> -#include <asm/arch/hardware.h> +#include <asm/hardware.h> #include <asm/io.h> #define hard_smp_processor_id() \ diff --git a/include/asm-arm/arch-iop3xx/io.h b/include/asm-arm/arch-iop3xx/io.h index 2761dfd8694d..f39046a6ab14 100644 --- a/include/asm-arm/arch-iop3xx/io.h +++ b/include/asm-arm/arch-iop3xx/io.h @@ -11,6 +11,8 @@ #ifndef __ASM_ARM_ARCH_IO_H #define __ASM_ARM_ARCH_IO_H +#include <asm/hardware.h> + #define IO_SPACE_LIMIT 0xffffffff #define __io(p) ((void __iomem *)(p)) diff --git a/include/asm-arm/arch-iop3xx/iop321.h b/include/asm-arm/arch-iop3xx/iop321.h index 200621ff3690..f8df778a356f 100644 --- a/include/asm-arm/arch-iop3xx/iop321.h +++ b/include/asm-arm/arch-iop3xx/iop321.h @@ -40,7 +40,7 @@ #define IOP321_PCI_UPPER_IO_BA (IOP321_PCI_LOWER_IO_BA + IOP321_PCI_IO_WINDOW_SIZE - 1) #define IOP321_PCI_IO_OFFSET (IOP321_PCI_LOWER_IO_VA - IOP321_PCI_LOWER_IO_BA) -//#define IOP321_PCI_MEM_WINDOW_SIZE (~*IOP321_IALR1 + 1) +/* #define IOP321_PCI_MEM_WINDOW_SIZE (~*IOP321_IALR1 + 1) */ #define IOP321_PCI_MEM_WINDOW_SIZE 0x04000000 /* 64M outbound window */ #define IOP321_PCI_LOWER_MEM_PA 0x80000000 #define IOP321_PCI_LOWER_MEM_BA (*IOP321_OMWTVR0) diff --git a/include/asm-arm/arch-iop3xx/iop331.h b/include/asm-arm/arch-iop3xx/iop331.h index 96adffd8bad2..fbf0cc11bdd9 100644 --- a/include/asm-arm/arch-iop3xx/iop331.h +++ b/include/asm-arm/arch-iop3xx/iop331.h @@ -42,7 +42,7 @@ /* this can be 128M if OMWTVR1 is set */ #define IOP331_PCI_MEM_WINDOW_SIZE 0x04000000 /* 64M outbound window */ -//#define IOP331_PCI_MEM_WINDOW_SIZE (~*IOP331_IALR1 + 1) +/* #define IOP331_PCI_MEM_WINDOW_SIZE (~*IOP331_IALR1 + 1) */ #define IOP331_PCI_LOWER_MEM_PA 0x80000000 #define IOP331_PCI_LOWER_MEM_BA (*IOP331_OMWTVR0) #define IOP331_PCI_UPPER_MEM_PA (IOP331_PCI_LOWER_MEM_PA + IOP331_PCI_MEM_WINDOW_SIZE - 1) diff --git a/include/asm-arm/arch-iop3xx/memory.h b/include/asm-arm/arch-iop3xx/memory.h index 45351f5cd904..bc62f4b13235 100644 --- a/include/asm-arm/arch-iop3xx/memory.h +++ b/include/asm-arm/arch-iop3xx/memory.h @@ -12,9 +12,9 @@ * Physical DRAM offset. */ #ifndef CONFIG_ARCH_IOP331 -#define PHYS_OFFSET (0xa0000000UL) +#define PHYS_OFFSET UL(0xa0000000) #else -#define PHYS_OFFSET (0x00000000UL) +#define PHYS_OFFSET UL(0x00000000) #endif /* diff --git a/include/asm-arm/arch-iop3xx/timex.h b/include/asm-arm/arch-iop3xx/timex.h index d4187fe9a85a..472badb451c4 100644 --- a/include/asm-arm/arch-iop3xx/timex.h +++ b/include/asm-arm/arch-iop3xx/timex.h @@ -4,7 +4,7 @@ * IOP3xx architecture timex specifications */ #include <linux/config.h> - +#include <asm/hardware.h> #if defined(CONFIG_ARCH_IQ80321) || defined(CONFIG_ARCH_IQ31244) diff --git a/include/asm-arm/arch-ixp2000/enp2611.h b/include/asm-arm/arch-ixp2000/enp2611.h index 31ae88674968..95128d9f5026 100644 --- a/include/asm-arm/arch-ixp2000/enp2611.h +++ b/include/asm-arm/arch-ixp2000/enp2611.h @@ -21,8 +21,20 @@ #ifndef __ENP2611_H #define __ENP2611_H -#define ENP2611_GPIO_SCL 0x07 -#define ENP2611_GPIO_SDA 0x06 +#define ENP2611_CALEB_PHYS_BASE 0xc5000000 +#define ENP2611_CALEB_VIRT_BASE 0xfe000000 +#define ENP2611_CALEB_SIZE 0x00100000 + +#define ENP2611_PM3386_0_PHYS_BASE 0xc6000000 +#define ENP2611_PM3386_0_VIRT_BASE 0xfe100000 +#define ENP2611_PM3386_0_SIZE 0x00100000 + +#define ENP2611_PM3386_1_PHYS_BASE 0xc6400000 +#define ENP2611_PM3386_1_VIRT_BASE 0xfe200000 +#define ENP2611_PM3386_1_SIZE 0x00100000 + +#define ENP2611_GPIO_SCL 7 +#define ENP2611_GPIO_SDA 6 #endif diff --git a/include/asm-arm/arch-ixp2000/io.h b/include/asm-arm/arch-ixp2000/io.h index 3241cd6f0778..7fbcdf9931ee 100644 --- a/include/asm-arm/arch-ixp2000/io.h +++ b/include/asm-arm/arch-ixp2000/io.h @@ -15,6 +15,8 @@ #ifndef __ASM_ARM_ARCH_IO_H #define __ASM_ARM_ARCH_IO_H +#include <asm/hardware.h> + #define IO_SPACE_LIMIT 0xffffffff #define __mem_pci(a) (a) diff --git a/include/asm-arm/arch-ixp2000/irqs.h b/include/asm-arm/arch-ixp2000/irqs.h index 0deb96c12adb..62f09c7ff420 100644 --- a/include/asm-arm/arch-ixp2000/irqs.h +++ b/include/asm-arm/arch-ixp2000/irqs.h @@ -67,12 +67,45 @@ #define IRQ_IXP2000_PCIA 40 #define IRQ_IXP2000_PCIB 41 -#define NR_IXP2000_IRQS 42 +/* Int sources from IRQ_ERROR_STATUS */ +#define IRQ_IXP2000_DRAM0_MIN_ERR 42 +#define IRQ_IXP2000_DRAM0_MAJ_ERR 43 +#define IRQ_IXP2000_DRAM1_MIN_ERR 44 +#define IRQ_IXP2000_DRAM1_MAJ_ERR 45 +#define IRQ_IXP2000_DRAM2_MIN_ERR 46 +#define IRQ_IXP2000_DRAM2_MAJ_ERR 47 +/* 48-57 reserved */ +#define IRQ_IXP2000_SRAM0_ERR 58 +#define IRQ_IXP2000_SRAM1_ERR 59 +#define IRQ_IXP2000_SRAM2_ERR 60 +#define IRQ_IXP2000_SRAM3_ERR 61 +/* 62-65 reserved */ +#define IRQ_IXP2000_MEDIA_ERR 66 +#define IRQ_IXP2000_PCI_ERR 67 +#define IRQ_IXP2000_SP_INT 68 + +#define NR_IXP2000_IRQS 69 #define IXP2000_BOARD_IRQ(x) (NR_IXP2000_IRQS + (x)) #define IXP2000_BOARD_IRQ_MASK(irq) (1 << (irq - NR_IXP2000_IRQS)) +#define IXP2000_ERR_IRQ_MASK(irq) ( 1 << (irq - IRQ_IXP2000_DRAM0_MIN_ERR)) +#define IXP2000_VALID_ERR_IRQ_MASK (\ + IXP2000_ERR_IRQ_MASK(IRQ_IXP2000_DRAM0_MIN_ERR) | \ + IXP2000_ERR_IRQ_MASK(IRQ_IXP2000_DRAM0_MAJ_ERR) | \ + IXP2000_ERR_IRQ_MASK(IRQ_IXP2000_DRAM1_MIN_ERR) | \ + IXP2000_ERR_IRQ_MASK(IRQ_IXP2000_DRAM1_MAJ_ERR) | \ + IXP2000_ERR_IRQ_MASK(IRQ_IXP2000_DRAM2_MIN_ERR) | \ + IXP2000_ERR_IRQ_MASK(IRQ_IXP2000_DRAM2_MAJ_ERR) | \ + IXP2000_ERR_IRQ_MASK(IRQ_IXP2000_SRAM0_ERR) | \ + IXP2000_ERR_IRQ_MASK(IRQ_IXP2000_SRAM1_ERR) | \ + IXP2000_ERR_IRQ_MASK(IRQ_IXP2000_SRAM2_ERR) | \ + IXP2000_ERR_IRQ_MASK(IRQ_IXP2000_SRAM3_ERR) | \ + IXP2000_ERR_IRQ_MASK(IRQ_IXP2000_MEDIA_ERR) | \ + IXP2000_ERR_IRQ_MASK(IRQ_IXP2000_PCI_ERR) | \ + IXP2000_ERR_IRQ_MASK(IRQ_IXP2000_SP_INT) ) + /* * This allows for all the on-chip sources plus up to 32 CPLD based * IRQs. Should be more than enough. diff --git a/include/asm-arm/arch-ixp2000/ixdp2x01.h b/include/asm-arm/arch-ixp2000/ixdp2x01.h index b768009c3a51..c6d51426e98f 100644 --- a/include/asm-arm/arch-ixp2000/ixdp2x01.h +++ b/include/asm-arm/arch-ixp2000/ixdp2x01.h @@ -22,7 +22,7 @@ #define IXDP2X01_CPLD_REGION_SIZE 0x00100000 #define IXDP2X01_CPLD_VIRT_REG(reg) (volatile unsigned long*)(IXDP2X01_VIRT_CPLD_BASE | reg) -#define IXDP2X01_CPLD_PHYS_REG(reg) (volatile u32*)(IXDP2X01_PHYS_CPLD_BASE | reg) +#define IXDP2X01_CPLD_PHYS_REG(reg) (IXDP2X01_PHYS_CPLD_BASE | reg) #define IXDP2X01_UART1_VIRT_BASE IXDP2X01_CPLD_VIRT_REG(0x40) #define IXDP2X01_UART1_PHYS_BASE IXDP2X01_CPLD_PHYS_REG(0x40) diff --git a/include/asm-arm/arch-ixp2000/ixp2000-regs.h b/include/asm-arm/arch-ixp2000/ixp2000-regs.h index 32aece069869..fc5ac6aec4f2 100644 --- a/include/asm-arm/arch-ixp2000/ixp2000-regs.h +++ b/include/asm-arm/arch-ixp2000/ixp2000-regs.h @@ -59,14 +59,15 @@ #define IXP2000_CAP_SIZE 0x00100000 /* - * Addresses for specific on-chip peripherals + * Addresses for specific on-chip peripherals. */ #define IXP2000_SLOWPORT_CSR_VIRT_BASE 0xfef80000 #define IXP2000_GLOBAL_REG_VIRT_BASE 0xfef04000 #define IXP2000_UART_PHYS_BASE 0xc0030000 #define IXP2000_UART_VIRT_BASE 0xfef30000 #define IXP2000_TIMER_VIRT_BASE 0xfef20000 -#define IXP2000_GPIO_VIRT_BASE 0Xfef10000 +#define IXP2000_UENGINE_CSR_VIRT_BASE 0xfef18000 +#define IXP2000_GPIO_VIRT_BASE 0xfef10000 /* * Devices outside of the 0xc0000000 -> 0xc0100000 range. The virtual @@ -252,7 +253,7 @@ #define IXP2000_PCI_XSCALE_INT_ENABLE IXP2000_PCI_CSR(0x15C) #define IXP2000_PCICNTL_PNR (1<<17) /* PCI not Reset bit of PCI_CONTROL */ -#define IXP2000_PCICNTL_PCF (1<<28) /* PCI Centrolfunction bit */ +#define IXP2000_PCICNTL_PCF (1<<28) /* PCI Central function bit */ #define IXP2000_XSCALE_INT (1<<1) /* Interrupt from XScale to PCI */ /* These are from the IRQ register in the PCI ISR register */ @@ -392,4 +393,47 @@ #define WDT_RESET_ENABLE 0x01000000 +/* + * MSF registers. The IXP2400 and IXP2800 have somewhat different MSF + * units, but the registers that differ between the two don't overlap, + * so we can have one register list for both. + */ +#define IXP2000_MSF_REG(x) ((volatile unsigned long*)(IXP2000_MSF_VIRT_BASE + (x))) +#define IXP2000_MSF_RX_CONTROL IXP2000_MSF_REG(0x0000) +#define IXP2000_MSF_TX_CONTROL IXP2000_MSF_REG(0x0004) +#define IXP2000_MSF_INTERRUPT_STATUS IXP2000_MSF_REG(0x0008) +#define IXP2000_MSF_INTERRUPT_ENABLE IXP2000_MSF_REG(0x000c) +#define IXP2000_MSF_CSIX_TYPE_MAP IXP2000_MSF_REG(0x0010) +#define IXP2000_MSF_FC_EGRESS_STATUS IXP2000_MSF_REG(0x0014) +#define IXP2000_MSF_FC_INGRESS_STATUS IXP2000_MSF_REG(0x0018) +#define IXP2000_MSF_HWM_CONTROL IXP2000_MSF_REG(0x0024) +#define IXP2000_MSF_FC_STATUS_OVERRIDE IXP2000_MSF_REG(0x0028) +#define IXP2000_MSF_CLOCK_CONTROL IXP2000_MSF_REG(0x002c) +#define IXP2000_MSF_RX_PORT_MAP IXP2000_MSF_REG(0x0040) +#define IXP2000_MSF_RBUF_ELEMENT_DONE IXP2000_MSF_REG(0x0044) +#define IXP2000_MSF_RX_MPHY_POLL_LIMIT IXP2000_MSF_REG(0x0048) +#define IXP2000_MSF_RX_CALENDAR_LENGTH IXP2000_MSF_REG(0x0048) +#define IXP2000_MSF_RX_THREAD_FREELIST_TIMEOUT_0 IXP2000_MSF_REG(0x0050) +#define IXP2000_MSF_RX_THREAD_FREELIST_TIMEOUT_1 IXP2000_MSF_REG(0x0054) +#define IXP2000_MSF_RX_THREAD_FREELIST_TIMEOUT_2 IXP2000_MSF_REG(0x0058) +#define IXP2000_MSF_TX_SEQUENCE_0 IXP2000_MSF_REG(0x0060) +#define IXP2000_MSF_TX_SEQUENCE_1 IXP2000_MSF_REG(0x0064) +#define IXP2000_MSF_TX_SEQUENCE_2 IXP2000_MSF_REG(0x0068) +#define IXP2000_MSF_TX_MPHY_POLL_LIMIT IXP2000_MSF_REG(0x0070) +#define IXP2000_MSF_TX_CALENDAR_LENGTH IXP2000_MSF_REG(0x0070) +#define IXP2000_MSF_RX_UP_CONTROL_0 IXP2000_MSF_REG(0x0080) +#define IXP2000_MSF_RX_UP_CONTROL_1 IXP2000_MSF_REG(0x0084) +#define IXP2000_MSF_RX_UP_CONTROL_2 IXP2000_MSF_REG(0x0088) +#define IXP2000_MSF_RX_UP_CONTROL_3 IXP2000_MSF_REG(0x008c) +#define IXP2000_MSF_TX_UP_CONTROL_0 IXP2000_MSF_REG(0x0090) +#define IXP2000_MSF_TX_UP_CONTROL_1 IXP2000_MSF_REG(0x0094) +#define IXP2000_MSF_TX_UP_CONTROL_2 IXP2000_MSF_REG(0x0098) +#define IXP2000_MSF_TX_UP_CONTROL_3 IXP2000_MSF_REG(0x009c) +#define IXP2000_MSF_TRAIN_DATA IXP2000_MSF_REG(0x00a0) +#define IXP2000_MSF_TRAIN_CALENDAR IXP2000_MSF_REG(0x00a4) +#define IXP2000_MSF_TRAIN_FLOW_CONTROL IXP2000_MSF_REG(0x00a8) +#define IXP2000_MSF_TX_CALENDAR_0 IXP2000_MSF_REG(0x1000) +#define IXP2000_MSF_RX_PORT_CALENDAR_STATUS IXP2000_MSF_REG(0x1400) + + #endif /* _IXP2000_H_ */ diff --git a/include/asm-arm/arch-ixp2000/memory.h b/include/asm-arm/arch-ixp2000/memory.h index d0f415c6dae9..21e1de51e3f6 100644 --- a/include/asm-arm/arch-ixp2000/memory.h +++ b/include/asm-arm/arch-ixp2000/memory.h @@ -13,7 +13,7 @@ #ifndef __ASM_ARCH_MEMORY_H #define __ASM_ARCH_MEMORY_H -#define PHYS_OFFSET (0x00000000UL) +#define PHYS_OFFSET UL(0x00000000) /* * Virtual view <-> DMA view memory address translations diff --git a/include/asm-arm/arch-ixp2000/platform.h b/include/asm-arm/arch-ixp2000/platform.h index abdcf51bd283..a66317ab2071 100644 --- a/include/asm-arm/arch-ixp2000/platform.h +++ b/include/asm-arm/arch-ixp2000/platform.h @@ -15,40 +15,40 @@ #ifndef __ASSEMBLY__ +static inline unsigned long ixp2000_reg_read(volatile void *reg) +{ + return *((volatile unsigned long *)reg); +} + +static inline void ixp2000_reg_write(volatile void *reg, unsigned long val) +{ + *((volatile unsigned long *)reg) = val; +} + /* - * The IXP2400 B0 silicon contains an erratum (#66) that causes writes - * to on-chip I/O register to not complete fully. What this means is - * that if you have a write to on-chip I/O followed by a back-to-back - * read or write, the first write will happen twice. OR...if it's - * not a back-to-back transaction, the read or write will generate - * incorrect data. - * - * The official work around for this is to set the on-chip I/O regions - * as XCB=101 and then force a read-back from the register. + * On the IXP2400, we can't use XCB=000 due to chip bugs. We use + * XCB=101 instead, but that makes all I/O accesses bufferable. This + * is not a problem in general, but we do have to be slightly more + * careful because I/O writes are no longer automatically flushed out + * of the write buffer. * + * In cases where we want to make sure that a write has been flushed + * out of the write buffer before we proceed, for example when masking + * a device interrupt before re-enabling IRQs in CPSR, we can use this + * function, ixp2000_reg_wrb, which performs a write, a readback, and + * issues a dummy instruction dependent on the value of the readback + * (mov rX, rX) to make sure that the readback has completed before we + * continue. */ -#if defined(CONFIG_ARCH_ENP2611) || defined(CONFIG_ARCH_IXDP2400) || defined(CONFIG_ARCH_IXDP2401) - -#include <asm/system.h> /* Pickup local_irq_ functions */ - -static inline void ixp2000_reg_write(volatile void *reg, unsigned long val) +static inline void ixp2000_reg_wrb(volatile void *reg, unsigned long val) { unsigned long dummy; - unsigned long flags; - local_irq_save(flags); *((volatile unsigned long *)reg) = val; - barrier(); + dummy = *((volatile unsigned long *)reg); - local_irq_restore(flags); -} -#else -static inline void ixp2000_reg_write(volatile void *reg, unsigned long val) -{ - *((volatile unsigned long *)reg) = val; + __asm__ __volatile__("mov %0, %0" : "+r" (dummy)); } -#endif /* IXDP2400 || IXDP2401 */ -#define ixp2000_reg_read(reg) (*((volatile unsigned long *)reg)) /* * Boards may multiplex different devices on the 2nd channel of diff --git a/include/asm-arm/arch-ixp2000/system.h b/include/asm-arm/arch-ixp2000/system.h index 4f489cc0dfa5..ddbbb34b5f95 100644 --- a/include/asm-arm/arch-ixp2000/system.h +++ b/include/asm-arm/arch-ixp2000/system.h @@ -26,29 +26,24 @@ static inline void arch_reset(char mode) * RedBoot bank. */ if (machine_is_ixdp2401()) { - *IXDP2X01_CPLD_FLASH_REG = ((0 >> IXDP2X01_FLASH_WINDOW_BITS) - | IXDP2X01_CPLD_FLASH_INTERN); - *IXDP2X01_CPLD_RESET_REG = 0xffffffff; + ixp2000_reg_write(IXDP2X01_CPLD_FLASH_REG, + ((0 >> IXDP2X01_FLASH_WINDOW_BITS) + | IXDP2X01_CPLD_FLASH_INTERN)); + ixp2000_reg_wrb(IXDP2X01_CPLD_RESET_REG, 0xffffffff); } /* * On IXDP2801 we need to write this magic sequence to the CPLD * to cause a complete reset of the CPU and all external devices - * and moves the flash bank register back to 0. + * and move the flash bank register back to 0. */ if (machine_is_ixdp2801()) { unsigned long reset_reg = *IXDP2X01_CPLD_RESET_REG; + reset_reg = 0x55AA0000 | (reset_reg & 0x0000FFFF); - *IXDP2X01_CPLD_RESET_REG = reset_reg; - mb(); - *IXDP2X01_CPLD_RESET_REG = 0x80000000; + ixp2000_reg_write(IXDP2X01_CPLD_RESET_REG, reset_reg); + ixp2000_reg_wrb(IXDP2X01_CPLD_RESET_REG, 0x80000000); } - /* - * We do a reset all if we are PCI master. We could be a slave and we - * don't want to do anything funky on the PCI bus. - */ - if (*IXP2000_STRAP_OPTIONS & CFG_PCI_BOOT_HOST) { - *(IXP2000_RESET0) |= (RSTALL); - } + ixp2000_reg_wrb(IXP2000_RESET0, RSTALL); } diff --git a/include/asm-arm/arch-ixp2000/uengine.h b/include/asm-arm/arch-ixp2000/uengine.h new file mode 100644 index 000000000000..b442d65c6593 --- /dev/null +++ b/include/asm-arm/arch-ixp2000/uengine.h @@ -0,0 +1,62 @@ +/* + * Generic library functions for the microengines found on the Intel + * IXP2000 series of network processors. + * + * Copyright (C) 2004, 2005 Lennert Buytenhek <buytenh@wantstofly.org> + * Dedicated to Marija Kulikova. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as + * published by the Free Software Foundation; either version 2.1 of the + * License, or (at your option) any later version. + */ + +#ifndef __IXP2000_UENGINE_H +#define __IXP2000_UENGINE_H + +extern u32 ixp2000_uengine_mask; + +struct ixp2000_uengine_code +{ + u32 cpu_model_bitmask; + u8 cpu_min_revision; + u8 cpu_max_revision; + + u32 uengine_parameters; + + struct ixp2000_reg_value { + int reg; + u32 value; + } *initial_reg_values; + + int num_insns; + u8 *insns; +}; + +u32 ixp2000_uengine_csr_read(int uengine, int offset); +void ixp2000_uengine_csr_write(int uengine, int offset, u32 value); +void ixp2000_uengine_reset(u32 uengine_mask); +void ixp2000_uengine_set_mode(int uengine, u32 mode); +void ixp2000_uengine_load_microcode(int uengine, u8 *ucode, int insns); +void ixp2000_uengine_init_context(int uengine, int context, int pc); +void ixp2000_uengine_start_contexts(int uengine, u8 ctx_mask); +void ixp2000_uengine_stop_contexts(int uengine, u8 ctx_mask); +int ixp2000_uengine_load(int uengine, struct ixp2000_uengine_code *c); + +#define IXP2000_UENGINE_8_CONTEXTS 0x00000000 +#define IXP2000_UENGINE_4_CONTEXTS 0x80000000 +#define IXP2000_UENGINE_PRN_UPDATE_EVERY 0x40000000 +#define IXP2000_UENGINE_PRN_UPDATE_ON_ACCESS 0x00000000 +#define IXP2000_UENGINE_NN_FROM_SELF 0x00100000 +#define IXP2000_UENGINE_NN_FROM_PREVIOUS 0x00000000 +#define IXP2000_UENGINE_ASSERT_EMPTY_AT_3 0x000c0000 +#define IXP2000_UENGINE_ASSERT_EMPTY_AT_2 0x00080000 +#define IXP2000_UENGINE_ASSERT_EMPTY_AT_1 0x00040000 +#define IXP2000_UENGINE_ASSERT_EMPTY_AT_0 0x00000000 +#define IXP2000_UENGINE_LM_ADDR1_GLOBAL 0x00020000 +#define IXP2000_UENGINE_LM_ADDR1_PER_CONTEXT 0x00000000 +#define IXP2000_UENGINE_LM_ADDR0_GLOBAL 0x00010000 +#define IXP2000_UENGINE_LM_ADDR0_PER_CONTEXT 0x00000000 + + +#endif diff --git a/include/asm-arm/arch-ixp4xx/entry-macro.S b/include/asm-arm/arch-ixp4xx/entry-macro.S index 455da64832de..323b0bc4a39c 100644 --- a/include/asm-arm/arch-ixp4xx/entry-macro.S +++ b/include/asm-arm/arch-ixp4xx/entry-macro.S @@ -15,25 +15,26 @@ ldr \irqstat, =(IXP4XX_INTC_BASE_VIRT+IXP4XX_ICIP_OFFSET) ldr \irqstat, [\irqstat] @ get interrupts cmp \irqstat, #0 - beq 1001f + beq 1001f @ upper IRQ? clz \irqnr, \irqstat mov \base, #31 - subs \irqnr, \base, \irqnr + sub \irqnr, \base, \irqnr + b 1002f @ lower IRQ being + @ handled 1001: /* * IXP465 has an upper IRQ status register */ #if defined(CONFIG_CPU_IXP46X) - bne 1002f ldr \irqstat, =(IXP4XX_INTC_BASE_VIRT+IXP4XX_ICIP2_OFFSET) ldr \irqstat, [\irqstat] @ get upper interrupts mov \irqnr, #63 clz \irqstat, \irqstat cmp \irqstat, #32 subne \irqnr, \irqnr, \irqstat -1002: #endif +1002: .endm diff --git a/include/asm-arm/arch-ixp4xx/hardware.h b/include/asm-arm/arch-ixp4xx/hardware.h index 4ac964b9078a..cfb413c845f7 100644 --- a/include/asm-arm/arch-ixp4xx/hardware.h +++ b/include/asm-arm/arch-ixp4xx/hardware.h @@ -27,7 +27,7 @@ #define pcibios_assign_all_busses() 1 -#if defined(CONFIG_CPU_IXP465) && !defined(__ASSEMBLY__) +#if defined(CONFIG_CPU_IXP46X) && !defined(__ASSEMBLY__) extern unsigned int processor_id; #define cpu_is_ixp465() ((processor_id & 0xffffffc0) == 0x69054200) #else @@ -44,5 +44,6 @@ extern unsigned int processor_id; #include "ixdp425.h" #include "coyote.h" #include "prpmc1100.h" +#include "nslu2.h" #endif /* _ASM_ARCH_HARDWARE_H */ diff --git a/include/asm-arm/arch-ixp4xx/io.h b/include/asm-arm/arch-ixp4xx/io.h index e350dcb544e8..942b622455bc 100644 --- a/include/asm-arm/arch-ixp4xx/io.h +++ b/include/asm-arm/arch-ixp4xx/io.h @@ -59,11 +59,10 @@ extern int ixp4xx_pci_write(u32 addr, u32 cmd, u32 data); * fallback to the default. */ static inline void __iomem * -__ixp4xx_ioremap(unsigned long addr, size_t size, unsigned long flags, unsigned long align) +__ixp4xx_ioremap(unsigned long addr, size_t size, unsigned long flags) { - extern void __iomem * __ioremap(unsigned long, size_t, unsigned long, unsigned long); if((addr < 0x48000000) || (addr > 0x4fffffff)) - return __ioremap(addr, size, flags, align); + return __ioremap(addr, size, flags); return (void *)addr; } @@ -71,18 +70,16 @@ __ixp4xx_ioremap(unsigned long addr, size_t size, unsigned long flags, unsigned static inline void __ixp4xx_iounmap(void __iomem *addr) { - extern void __iounmap(void __iomem *addr); - if ((u32)addr >= VMALLOC_START) __iounmap(addr); } -#define __arch_ioremap(a, s, f, x) __ixp4xx_ioremap(a, s, f, x) +#define __arch_ioremap(a, s, f) __ixp4xx_ioremap(a, s, f) #define __arch_iounmap(a) __ixp4xx_iounmap(a) -#define writeb(p, v) __ixp4xx_writeb(p, v) -#define writew(p, v) __ixp4xx_writew(p, v) -#define writel(p, v) __ixp4xx_writel(p, v) +#define writeb(v, p) __ixp4xx_writeb(v, p) +#define writew(v, p) __ixp4xx_writew(v, p) +#define writel(v, p) __ixp4xx_writel(v, p) #define writesb(p, v, l) __ixp4xx_writesb(p, v, l) #define writesw(p, v, l) __ixp4xx_writesw(p, v, l) @@ -97,8 +94,9 @@ __ixp4xx_iounmap(void __iomem *addr) #define readsl(p, v, l) __ixp4xx_readsl(p, v, l) static inline void -__ixp4xx_writeb(u8 value, u32 addr) +__ixp4xx_writeb(u8 value, volatile void __iomem *p) { + u32 addr = (u32)p; u32 n, byte_enables, data; if (addr >= VMALLOC_START) { @@ -113,15 +111,16 @@ __ixp4xx_writeb(u8 value, u32 addr) } static inline void -__ixp4xx_writesb(u32 bus_addr, u8 *vaddr, int count) +__ixp4xx_writesb(volatile void __iomem *bus_addr, const u8 *vaddr, int count) { while (count--) writeb(*vaddr++, bus_addr); } static inline void -__ixp4xx_writew(u16 value, u32 addr) +__ixp4xx_writew(u16 value, volatile void __iomem *p) { + u32 addr = (u32)p; u32 n, byte_enables, data; if (addr >= VMALLOC_START) { @@ -136,15 +135,16 @@ __ixp4xx_writew(u16 value, u32 addr) } static inline void -__ixp4xx_writesw(u32 bus_addr, u16 *vaddr, int count) +__ixp4xx_writesw(volatile void __iomem *bus_addr, const u16 *vaddr, int count) { while (count--) writew(*vaddr++, bus_addr); } static inline void -__ixp4xx_writel(u32 value, u32 addr) +__ixp4xx_writel(u32 value, volatile void __iomem *p) { + u32 addr = (u32)p; if (addr >= VMALLOC_START) { __raw_writel(value, addr); return; @@ -154,15 +154,16 @@ __ixp4xx_writel(u32 value, u32 addr) } static inline void -__ixp4xx_writesl(u32 bus_addr, u32 *vaddr, int count) +__ixp4xx_writesl(volatile void __iomem *bus_addr, const u32 *vaddr, int count) { while (count--) writel(*vaddr++, bus_addr); } static inline unsigned char -__ixp4xx_readb(u32 addr) +__ixp4xx_readb(const volatile void __iomem *p) { + u32 addr = (u32)p; u32 n, byte_enables, data; if (addr >= VMALLOC_START) @@ -177,15 +178,16 @@ __ixp4xx_readb(u32 addr) } static inline void -__ixp4xx_readsb(u32 bus_addr, u8 *vaddr, u32 count) +__ixp4xx_readsb(const volatile void __iomem *bus_addr, u8 *vaddr, u32 count) { while (count--) *vaddr++ = readb(bus_addr); } static inline unsigned short -__ixp4xx_readw(u32 addr) +__ixp4xx_readw(const volatile void __iomem *p) { + u32 addr = (u32)p; u32 n, byte_enables, data; if (addr >= VMALLOC_START) @@ -200,15 +202,16 @@ __ixp4xx_readw(u32 addr) } static inline void -__ixp4xx_readsw(u32 bus_addr, u16 *vaddr, u32 count) +__ixp4xx_readsw(const volatile void __iomem *bus_addr, u16 *vaddr, u32 count) { while (count--) *vaddr++ = readw(bus_addr); } static inline unsigned long -__ixp4xx_readl(u32 addr) +__ixp4xx_readl(const volatile void __iomem *p) { + u32 addr = (u32)p; u32 data; if (addr >= VMALLOC_START) @@ -221,7 +224,7 @@ __ixp4xx_readl(u32 addr) } static inline void -__ixp4xx_readsl(u32 bus_addr, u32 *vaddr, u32 count) +__ixp4xx_readsl(const volatile void __iomem *bus_addr, u32 *vaddr, u32 count) { while (count--) *vaddr++ = readl(bus_addr); @@ -239,7 +242,7 @@ __ixp4xx_readsl(u32 bus_addr, u32 *vaddr, u32 count) eth_copy_and_sum((s),__mem_pci(c),(l),(b)) static inline int -check_signature(unsigned long bus_addr, const unsigned char *signature, +check_signature(const unsigned char __iomem *bus_addr, const unsigned char *signature, int length) { int retval = 0; @@ -389,7 +392,7 @@ __ixp4xx_insl(u32 io_addr, u32 *vaddr, u32 count) #define __is_io_address(p) (((unsigned long)p >= PIO_OFFSET) && \ ((unsigned long)p <= (PIO_MASK + PIO_OFFSET))) static inline unsigned int -__ixp4xx_ioread8(void __iomem *addr) +__ixp4xx_ioread8(const void __iomem *addr) { unsigned long port = (unsigned long __force)addr; if (__is_io_address(port)) @@ -398,12 +401,12 @@ __ixp4xx_ioread8(void __iomem *addr) #ifndef CONFIG_IXP4XX_INDIRECT_PCI return (unsigned int)__raw_readb(port); #else - return (unsigned int)__ixp4xx_readb(port); + return (unsigned int)__ixp4xx_readb(addr); #endif } static inline void -__ixp4xx_ioread8_rep(void __iomem *addr, void *vaddr, u32 count) +__ixp4xx_ioread8_rep(const void __iomem *addr, void *vaddr, u32 count) { unsigned long port = (unsigned long __force)addr; if (__is_io_address(port)) @@ -412,12 +415,12 @@ __ixp4xx_ioread8_rep(void __iomem *addr, void *vaddr, u32 count) #ifndef CONFIG_IXP4XX_INDIRECT_PCI __raw_readsb(addr, vaddr, count); #else - __ixp4xx_readsb(port, vaddr, count); + __ixp4xx_readsb(addr, vaddr, count); #endif } static inline unsigned int -__ixp4xx_ioread16(void __iomem *addr) +__ixp4xx_ioread16(const void __iomem *addr) { unsigned long port = (unsigned long __force)addr; if (__is_io_address(port)) @@ -426,12 +429,12 @@ __ixp4xx_ioread16(void __iomem *addr) #ifndef CONFIG_IXP4XX_INDIRECT_PCI return le16_to_cpu(__raw_readw((u32)port)); #else - return (unsigned int)__ixp4xx_readw((u32)port); + return (unsigned int)__ixp4xx_readw(addr); #endif } static inline void -__ixp4xx_ioread16_rep(void __iomem *addr, void *vaddr, u32 count) +__ixp4xx_ioread16_rep(const void __iomem *addr, void *vaddr, u32 count) { unsigned long port = (unsigned long __force)addr; if (__is_io_address(port)) @@ -440,12 +443,12 @@ __ixp4xx_ioread16_rep(void __iomem *addr, void *vaddr, u32 count) #ifndef CONFIG_IXP4XX_INDIRECT_PCI __raw_readsw(addr, vaddr, count); #else - __ixp4xx_readsw(port, vaddr, count); + __ixp4xx_readsw(addr, vaddr, count); #endif } static inline unsigned int -__ixp4xx_ioread32(void __iomem *addr) +__ixp4xx_ioread32(const void __iomem *addr) { unsigned long port = (unsigned long __force)addr; if (__is_io_address(port)) @@ -454,13 +457,13 @@ __ixp4xx_ioread32(void __iomem *addr) #ifndef CONFIG_IXP4XX_INDIRECT_PCI return le32_to_cpu(__raw_readl((u32)port)); #else - return (unsigned int)__ixp4xx_readl((u32)port); + return (unsigned int)__ixp4xx_readl(addr); #endif } } static inline void -__ixp4xx_ioread32_rep(void __iomem *addr, void *vaddr, u32 count) +__ixp4xx_ioread32_rep(const void __iomem *addr, void *vaddr, u32 count) { unsigned long port = (unsigned long __force)addr; if (__is_io_address(port)) @@ -469,7 +472,7 @@ __ixp4xx_ioread32_rep(void __iomem *addr, void *vaddr, u32 count) #ifndef CONFIG_IXP4XX_INDIRECT_PCI __raw_readsl(addr, vaddr, count); #else - __ixp4xx_readsl(port, vaddr, count); + __ixp4xx_readsl(addr, vaddr, count); #endif } @@ -483,7 +486,7 @@ __ixp4xx_iowrite8(u8 value, void __iomem *addr) #ifndef CONFIG_IXP4XX_INDIRECT_PCI __raw_writeb(value, port); #else - __ixp4xx_writeb(value, port); + __ixp4xx_writeb(value, addr); #endif } @@ -497,7 +500,7 @@ __ixp4xx_iowrite8_rep(void __iomem *addr, const void *vaddr, u32 count) #ifndef CONFIG_IXP4XX_INDIRECT_PCI __raw_writesb(addr, vaddr, count); #else - __ixp4xx_writesb(port, vaddr, count); + __ixp4xx_writesb(addr, vaddr, count); #endif } @@ -511,7 +514,7 @@ __ixp4xx_iowrite16(u16 value, void __iomem *addr) #ifndef CONFIG_IXP4XX_INDIRECT_PCI __raw_writew(cpu_to_le16(value), addr); #else - __ixp4xx_writew(value, port); + __ixp4xx_writew(value, addr); #endif } @@ -525,7 +528,7 @@ __ixp4xx_iowrite16_rep(void __iomem *addr, const void *vaddr, u32 count) #ifndef CONFIG_IXP4XX_INDIRECT_PCI __raw_writesw(addr, vaddr, count); #else - __ixp4xx_writesw(port, vaddr, count); + __ixp4xx_writesw(addr, vaddr, count); #endif } @@ -539,7 +542,7 @@ __ixp4xx_iowrite32(u32 value, void __iomem *addr) #ifndef CONFIG_IXP4XX_INDIRECT_PCI __raw_writel(cpu_to_le32(value), port); #else - __ixp4xx_writel(value, port); + __ixp4xx_writel(value, addr); #endif } @@ -553,7 +556,7 @@ __ixp4xx_iowrite32_rep(void __iomem *addr, const void *vaddr, u32 count) #ifndef CONFIG_IXP4XX_INDIRECT_PCI __raw_writesl(addr, vaddr, count); #else - __ixp4xx_writesl(port, vaddr, count); + __ixp4xx_writesl(addr, vaddr, count); #endif } diff --git a/include/asm-arm/arch-ixp4xx/irqs.h b/include/asm-arm/arch-ixp4xx/irqs.h index ca808281c7f9..2cf4930372bc 100644 --- a/include/asm-arm/arch-ixp4xx/irqs.h +++ b/include/asm-arm/arch-ixp4xx/irqs.h @@ -93,4 +93,11 @@ #define IRQ_COYOTE_PCI_SLOT1 IRQ_IXP4XX_GPIO11 #define IRQ_COYOTE_IDE IRQ_IXP4XX_GPIO5 +/* + * NSLU2 board IRQs + */ +#define IRQ_NSLU2_PCI_INTA IRQ_IXP4XX_GPIO11 +#define IRQ_NSLU2_PCI_INTB IRQ_IXP4XX_GPIO10 +#define IRQ_NSLU2_PCI_INTC IRQ_IXP4XX_GPIO9 + #endif diff --git a/include/asm-arm/arch-ixp4xx/ixp4xx-regs.h b/include/asm-arm/arch-ixp4xx/ixp4xx-regs.h index 004696a95bdb..9444958bec1e 100644 --- a/include/asm-arm/arch-ixp4xx/ixp4xx-regs.h +++ b/include/asm-arm/arch-ixp4xx/ixp4xx-regs.h @@ -36,38 +36,39 @@ * * 0x6000000 0x00004000 ioremap'd QMgr * - * 0xC0000000 0x00001000 0xffbfe000 PCI CFG + * 0xC0000000 0x00001000 0xffbff000 PCI CFG * - * 0xC4000000 0x00001000 0xffbfd000 EXP CFG + * 0xC4000000 0x00001000 0xffbfe000 EXP CFG * - * 0xC8000000 0x0000C000 0xffbf2000 On-Chip Peripherals + * 0xC8000000 0x00013000 0xffbeb000 On-Chip Peripherals */ /* * Queue Manager */ #define IXP4XX_QMGR_BASE_PHYS (0x60000000) +#define IXP4XX_QMGR_REGION_SIZE (0x00004000) /* * Expansion BUS Configuration registers */ #define IXP4XX_EXP_CFG_BASE_PHYS (0xC4000000) -#define IXP4XX_EXP_CFG_BASE_VIRT (0xFFBFD000) +#define IXP4XX_EXP_CFG_BASE_VIRT (0xFFBFE000) #define IXP4XX_EXP_CFG_REGION_SIZE (0x00001000) /* * PCI Config registers */ #define IXP4XX_PCI_CFG_BASE_PHYS (0xC0000000) -#define IXP4XX_PCI_CFG_BASE_VIRT (0xFFBFE000) +#define IXP4XX_PCI_CFG_BASE_VIRT (0xFFBFF000) #define IXP4XX_PCI_CFG_REGION_SIZE (0x00001000) /* * Peripheral space */ #define IXP4XX_PERIPHERAL_BASE_PHYS (0xC8000000) -#define IXP4XX_PERIPHERAL_BASE_VIRT (0xFFBF2000) -#define IXP4XX_PERIPHERAL_REGION_SIZE (0x0000C000) +#define IXP4XX_PERIPHERAL_BASE_VIRT (0xFFBEB000) +#define IXP4XX_PERIPHERAL_REGION_SIZE (0x00013000) /* * Debug UART @@ -115,25 +116,48 @@ /* * Peripheral Space Register Region Base Addresses */ -#define IXP4XX_UART1_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0x0000) -#define IXP4XX_UART2_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0x1000) -#define IXP4XX_PMU_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0x2000) -#define IXP4XX_INTC_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0x3000) -#define IXP4XX_GPIO_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0x4000) -#define IXP4XX_TIMER_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0x5000) -#define IXP4XX_EthA_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0x9000) -#define IXP4XX_EthB_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0xA000) -#define IXP4XX_USB_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0xB000) - -#define IXP4XX_UART1_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0x0000) -#define IXP4XX_UART2_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0x1000) -#define IXP4XX_PMU_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0x2000) -#define IXP4XX_INTC_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0x3000) -#define IXP4XX_GPIO_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0x4000) -#define IXP4XX_TIMER_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0x5000) -#define IXP4XX_EthA_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0x9000) -#define IXP4XX_EthB_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0xA000) -#define IXP4XX_USB_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0xB000) +#define IXP4XX_UART1_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0x0000) +#define IXP4XX_UART2_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0x1000) +#define IXP4XX_PMU_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0x2000) +#define IXP4XX_INTC_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0x3000) +#define IXP4XX_GPIO_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0x4000) +#define IXP4XX_TIMER_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0x5000) +#define IXP4XX_NPEA_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0x6000) +#define IXP4XX_NPEB_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0x7000) +#define IXP4XX_NPEC_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0x8000) +#define IXP4XX_EthB_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0x9000) +#define IXP4XX_EthC_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0xA000) +#define IXP4XX_USB_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0xB000) +/* ixp46X only */ +#define IXP4XX_EthA_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0xC000) +#define IXP4XX_EthB1_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0xD000) +#define IXP4XX_EthB2_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0xE000) +#define IXP4XX_EthB3_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0xF000) +#define IXP4XX_TIMESYNC_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0x10000) +#define IXP4XX_I2C_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0x11000) +#define IXP4XX_SSP_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0x12000) + + +#define IXP4XX_UART1_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0x0000) +#define IXP4XX_UART2_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0x1000) +#define IXP4XX_PMU_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0x2000) +#define IXP4XX_INTC_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0x3000) +#define IXP4XX_GPIO_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0x4000) +#define IXP4XX_TIMER_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0x5000) +#define IXP4XX_NPEA_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_PHYS + 0x6000) +#define IXP4XX_NPEB_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_PHYS + 0x7000) +#define IXP4XX_NPEC_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_PHYS + 0x8000) +#define IXP4XX_EthB_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0x9000) +#define IXP4XX_EthC_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0xA000) +#define IXP4XX_USB_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0xB000) +/* ixp46X only */ +#define IXP4XX_EthA_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0xC000) +#define IXP4XX_EthB1_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0xD000) +#define IXP4XX_EthB2_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0xE000) +#define IXP4XX_EthB3_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0xF000) +#define IXP4XX_TIMESYNC_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0x10000) +#define IXP4XX_I2C_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0x11000) +#define IXP4XX_SSP_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0x12000) /* * Constants to make it easy to access Interrupt Controller registers diff --git a/include/asm-arm/arch-ixp4xx/memory.h b/include/asm-arm/arch-ixp4xx/memory.h index d348548b592b..e024d0a1a669 100644 --- a/include/asm-arm/arch-ixp4xx/memory.h +++ b/include/asm-arm/arch-ixp4xx/memory.h @@ -12,7 +12,7 @@ /* * Physical DRAM offset. */ -#define PHYS_OFFSET (0x00000000UL) +#define PHYS_OFFSET UL(0x00000000) #ifndef __ASSEMBLY__ diff --git a/include/asm-arm/arch-ixp4xx/nslu2.h b/include/asm-arm/arch-ixp4xx/nslu2.h new file mode 100644 index 000000000000..b8b347a559c7 --- /dev/null +++ b/include/asm-arm/arch-ixp4xx/nslu2.h @@ -0,0 +1,96 @@ +/* + * include/asm-arm/arch-ixp4xx/nslu2.h + * + * NSLU2 platform specific definitions + * + * Author: Mark Rakes <mrakes AT mac.com> + * Maintainers: http://www.nslu2-linux.org + * + * based on ixdp425.h: + * Copyright 2004 (c) MontaVista, Software, Inc. + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#ifndef __ASM_ARCH_HARDWARE_H__ +#error "Do not include this directly, instead #include <asm/hardware.h>" +#endif + +#define NSLU2_FLASH_BASE IXP4XX_EXP_BUS_CS0_BASE_PHYS +#define NSLU2_FLASH_SIZE IXP4XX_EXP_BUS_CSX_REGION_SIZE + +#define NSLU2_SDA_PIN 7 +#define NSLU2_SCL_PIN 6 + +/* + * NSLU2 PCI IRQs + */ +#define NSLU2_PCI_MAX_DEV 3 +#define NSLU2_PCI_IRQ_LINES 3 + + +/* PCI controller GPIO to IRQ pin mappings */ +#define NSLU2_PCI_INTA_PIN 11 +#define NSLU2_PCI_INTB_PIN 10 +#define NSLU2_PCI_INTC_PIN 9 +#define NSLU2_PCI_INTD_PIN 8 + + +/* NSLU2 Timer */ +#define NSLU2_FREQ 66000000 +#define NSLU2_CLOCK_TICK_RATE (((NSLU2_FREQ / HZ & ~IXP4XX_OST_RELOAD_MASK) + 1) * HZ) +#define NSLU2_CLOCK_TICKS_PER_USEC ((NSLU2_CLOCK_TICK_RATE + USEC_PER_SEC/2) / USEC_PER_SEC) + +/* GPIO */ + +#define NSLU2_GPIO0 0 +#define NSLU2_GPIO1 1 +#define NSLU2_GPIO2 2 +#define NSLU2_GPIO3 3 +#define NSLU2_GPIO4 4 +#define NSLU2_GPIO5 5 +#define NSLU2_GPIO6 6 +#define NSLU2_GPIO7 7 +#define NSLU2_GPIO8 8 +#define NSLU2_GPIO9 9 +#define NSLU2_GPIO10 10 +#define NSLU2_GPIO11 11 +#define NSLU2_GPIO12 12 +#define NSLU2_GPIO13 13 +#define NSLU2_GPIO14 14 +#define NSLU2_GPIO15 15 + +/* Buttons */ + +#define NSLU2_PB_GPIO NSLU2_GPIO5 +#define NSLU2_PO_GPIO NSLU2_GPIO8 /* power off */ +#define NSLU2_RB_GPIO NSLU2_GPIO12 + +#define NSLU2_PB_IRQ IRQ_IXP4XX_GPIO5 +#define NSLU2_RB_IRQ IRQ_IXP4XX_GPIO12 + +#define NSLU2_PB_BM (1L << NSLU2_PB_GPIO) +#define NSLU2_PO_BM (1L << NSLU2_PO_GPIO) +#define NSLU2_RB_BM (1L << NSLU2_RB_GPIO) + +/* Buzzer */ + +#define NSLU2_GPIO_BUZZ 4 +#define NSLU2_BZ_BM (1L << NSLU2_GPIO_BUZZ) +/* LEDs */ + +#define NSLU2_LED_RED NSLU2_GPIO0 +#define NSLU2_LED_GRN NSLU2_GPIO1 + +#define NSLU2_LED_RED_BM (1L << NSLU2_LED_RED) +#define NSLU2_LED_GRN_BM (1L << NSLU2_LED_GRN) + +#define NSLU2_LED_DISK1 NSLU2_GPIO2 +#define NSLU2_LED_DISK2 NSLU2_GPIO3 + +#define NSLU2_LED_DISK1_BM (1L << NSLU2_GPIO2) +#define NSLU2_LED_DISK2_BM (1L << NSLU2_GPIO3) + + diff --git a/include/asm-arm/arch-ixp4xx/platform.h b/include/asm-arm/arch-ixp4xx/platform.h index d13ee7f78c70..f14ed63590c3 100644 --- a/include/asm-arm/arch-ixp4xx/platform.h +++ b/include/asm-arm/arch-ixp4xx/platform.h @@ -93,7 +93,7 @@ extern struct pci_bus *ixp4xx_scan_bus(int nr, struct pci_sys_data *sys); static inline void gpio_line_config(u8 line, u32 direction) { - if (direction == IXP4XX_GPIO_OUT) + if (direction == IXP4XX_GPIO_IN) *IXP4XX_GPIO_GPOER |= (1 << line); else *IXP4XX_GPIO_GPOER &= ~(1 << line); diff --git a/include/asm-arm/arch-l7200/aux_reg.h b/include/asm-arm/arch-l7200/aux_reg.h index 762cbc76c501..5b4396de16a0 100644 --- a/include/asm-arm/arch-l7200/aux_reg.h +++ b/include/asm-arm/arch-l7200/aux_reg.h @@ -9,7 +9,7 @@ #ifndef _ASM_ARCH_AUXREG_H #define _ASM_ARCH_AUXREG_H -#include <asm/arch/hardware.h> +#include <asm/hardware.h> #define l7200aux_reg *((volatile unsigned int *) (AUX_BASE)) diff --git a/include/asm-arm/arch-l7200/gp_timers.h b/include/asm-arm/arch-l7200/gp_timers.h index 6f20962df248..9c4804d13578 100644 --- a/include/asm-arm/arch-l7200/gp_timers.h +++ b/include/asm-arm/arch-l7200/gp_timers.h @@ -10,7 +10,7 @@ #ifndef _ASM_ARCH_GPTIMERS_H #define _ASM_ARCH_GPTIMERS_H -#include <asm/arch/hardware.h> +#include <asm/hardware.h> /* * Layout of L7200 general purpose timer registers diff --git a/include/asm-arm/arch-l7200/io.h b/include/asm-arm/arch-l7200/io.h index fc012a39e2cb..cab8ad0adf09 100644 --- a/include/asm-arm/arch-l7200/io.h +++ b/include/asm-arm/arch-l7200/io.h @@ -10,7 +10,7 @@ #ifndef __ASM_ARM_ARCH_IO_H #define __ASM_ARM_ARCH_IO_H -#include <asm/arch/hardware.h> +#include <asm/hardware.h> #define IO_SPACE_LIMIT 0xffffffff diff --git a/include/asm-arm/arch-l7200/memory.h b/include/asm-arm/arch-l7200/memory.h index c5b9608cb137..9e50a171f78a 100644 --- a/include/asm-arm/arch-l7200/memory.h +++ b/include/asm-arm/arch-l7200/memory.h @@ -15,7 +15,7 @@ /* * Physical DRAM offset on the L7200 SDB. */ -#define PHYS_OFFSET (0xf0000000UL) +#define PHYS_OFFSET UL(0xf0000000) #define __virt_to_bus(x) __virt_to_phys(x) #define __bus_to_virt(x) __phys_to_virt(x) diff --git a/include/asm-arm/arch-lh7a40x/io.h b/include/asm-arm/arch-lh7a40x/io.h index c13bdd9add92..bbcd4335f441 100644 --- a/include/asm-arm/arch-lh7a40x/io.h +++ b/include/asm-arm/arch-lh7a40x/io.h @@ -11,6 +11,8 @@ #ifndef __ASM_ARCH_IO_H #define __ASM_ARCH_IO_H +#include <asm/hardware.h> + #define IO_SPACE_LIMIT 0xffffffff /* No ISA or PCI bus on this machine. */ diff --git a/include/asm-arm/arch-lh7a40x/memory.h b/include/asm-arm/arch-lh7a40x/memory.h index c650e6feb9d5..c92bcb837629 100644 --- a/include/asm-arm/arch-lh7a40x/memory.h +++ b/include/asm-arm/arch-lh7a40x/memory.h @@ -17,7 +17,7 @@ /* * Physical DRAM offset. */ -#define PHYS_OFFSET (0xc0000000UL) +#define PHYS_OFFSET UL(0xc0000000) /* * Virtual view <-> DMA view memory address translations diff --git a/include/asm-arm/arch-omap/board-h4.h b/include/asm-arm/arch-omap/board-h4.h index d64ee9211eed..33ea29a41654 100644 --- a/include/asm-arm/arch-omap/board-h4.h +++ b/include/asm-arm/arch-omap/board-h4.h @@ -34,5 +34,11 @@ #define OMAP24XX_ETHR_START 0x08000300 #define OMAP24XX_ETHR_GPIO_IRQ 92 +#define H4_CS0_BASE 0x04000000 + +#define H4_CS0_BASE 0x04000000 + +#define H4_CS0_BASE 0x04000000 + #endif /* __ASM_ARCH_OMAP_H4_H */ diff --git a/include/asm-arm/arch-omap/board-innovator.h b/include/asm-arm/arch-omap/board-innovator.h index 79574e0ed13d..b3cf33441f6e 100644 --- a/include/asm-arm/arch-omap/board-innovator.h +++ b/include/asm-arm/arch-omap/board-innovator.h @@ -26,7 +26,7 @@ #ifndef __ASM_ARCH_OMAP_INNOVATOR_H #define __ASM_ARCH_OMAP_INNOVATOR_H -#if defined (CONFIG_ARCH_OMAP1510) +#if defined (CONFIG_ARCH_OMAP15XX) #ifndef OMAP_SDRAM_DEVICE #define OMAP_SDRAM_DEVICE D256M_1X16_4B @@ -44,7 +44,7 @@ void fpga_write(unsigned char val, int reg); unsigned char fpga_read(int reg); #endif -#endif /* CONFIG_ARCH_OMAP1510 */ +#endif /* CONFIG_ARCH_OMAP15XX */ #if defined (CONFIG_ARCH_OMAP16XX) diff --git a/include/asm-arm/arch-omap/clock.h b/include/asm-arm/arch-omap/clock.h new file mode 100644 index 000000000000..740c297eb11c --- /dev/null +++ b/include/asm-arm/arch-omap/clock.h @@ -0,0 +1,91 @@ +/* + * linux/include/asm-arm/arch-omap/clock.h + * + * Copyright (C) 2004 - 2005 Nokia corporation + * Written by Tuukka Tikkanen <tuukka.tikkanen@elektrobit.com> + * Based on clocks.h by Tony Lindgren, Gordon McNutt and RidgeRun, Inc + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __ARCH_ARM_OMAP_CLOCK_H +#define __ARCH_ARM_OMAP_CLOCK_H + +struct module; + +struct clk { + struct list_head node; + struct module *owner; + const char *name; + struct clk *parent; + unsigned long rate; + __u32 flags; + void __iomem *enable_reg; + __u8 enable_bit; + __u8 rate_offset; + __u8 src_offset; + __s8 usecount; + void (*recalc)(struct clk *); + int (*set_rate)(struct clk *, unsigned long); + long (*round_rate)(struct clk *, unsigned long); + void (*init)(struct clk *); + int (*enable)(struct clk *); + void (*disable)(struct clk *); +}; + +struct clk_functions { + int (*clk_enable)(struct clk *clk); + void (*clk_disable)(struct clk *clk); + int (*clk_use)(struct clk *clk); + void (*clk_unuse)(struct clk *clk); + long (*clk_round_rate)(struct clk *clk, unsigned long rate); + int (*clk_set_rate)(struct clk *clk, unsigned long rate); + int (*clk_set_parent)(struct clk *clk, struct clk *parent); + struct clk * (*clk_get_parent)(struct clk *clk); + void (*clk_allow_idle)(struct clk *clk); + void (*clk_deny_idle)(struct clk *clk); +}; + +extern unsigned int mpurate; +extern struct list_head clocks; +extern spinlock_t clockfw_lock; + +extern int clk_init(struct clk_functions * custom_clocks); +extern int clk_register(struct clk *clk); +extern void clk_unregister(struct clk *clk); +extern void propagate_rate(struct clk *clk); +extern void followparent_recalc(struct clk * clk); +extern void clk_allow_idle(struct clk *clk); +extern void clk_deny_idle(struct clk *clk); + +/* Clock flags */ +#define RATE_CKCTL (1 << 0) /* Main fixed ratio clocks */ +#define RATE_FIXED (1 << 1) /* Fixed clock rate */ +#define RATE_PROPAGATES (1 << 2) /* Program children too */ +#define VIRTUAL_CLOCK (1 << 3) /* Composite clock from table */ +#define ALWAYS_ENABLED (1 << 4) /* Clock cannot be disabled */ +#define ENABLE_REG_32BIT (1 << 5) /* Use 32-bit access */ +#define VIRTUAL_IO_ADDRESS (1 << 6) /* Clock in virtual address */ +#define CLOCK_IDLE_CONTROL (1 << 7) +#define CLOCK_NO_IDLE_PARENT (1 << 8) +#define DELAYED_APP (1 << 9) /* Delay application of clock */ +#define CONFIG_PARTICIPANT (1 << 10) /* Fundamental clock */ +#define CM_MPU_SEL1 (1 << 11) /* Domain divider/source */ +#define CM_DSP_SEL1 (1 << 12) +#define CM_GFX_SEL1 (1 << 13) +#define CM_MODEM_SEL1 (1 << 14) +#define CM_CORE_SEL1 (1 << 15) /* Sets divider for many */ +#define CM_CORE_SEL2 (1 << 16) /* sets parent for GPT */ +#define CM_WKUP_SEL1 (1 << 17) +#define CM_PLL_SEL1 (1 << 18) +#define CM_PLL_SEL2 (1 << 19) +#define CM_SYSCLKOUT_SEL1 (1 << 20) +#define CLOCK_IN_OMAP730 (1 << 21) +#define CLOCK_IN_OMAP1510 (1 << 22) +#define CLOCK_IN_OMAP16XX (1 << 23) +#define CLOCK_IN_OMAP242X (1 << 24) +#define CLOCK_IN_OMAP243X (1 << 25) + +#endif diff --git a/include/asm-arm/arch-omap/common.h b/include/asm-arm/arch-omap/common.h index 2a676b4f13b5..08d58abd8218 100644 --- a/include/asm-arm/arch-omap/common.h +++ b/include/asm-arm/arch-omap/common.h @@ -31,6 +31,6 @@ struct sys_timer; extern void omap_map_common_io(void); extern struct sys_timer omap_timer; -extern void omap_serial_init(int ports[]); +extern void omap_serial_init(void); #endif /* __ARCH_ARM_MACH_OMAP_COMMON_H */ diff --git a/include/asm-arm/arch-omap/cpu.h b/include/asm-arm/arch-omap/cpu.h index 1119e2b53e72..ec7eb675d922 100644 --- a/include/asm-arm/arch-omap/cpu.h +++ b/include/asm-arm/arch-omap/cpu.h @@ -28,12 +28,7 @@ extern unsigned int system_rev; -#define OMAP_DIE_ID_0 0xfffe1800 -#define OMAP_DIE_ID_1 0xfffe1804 -#define OMAP_PRODUCTION_ID_0 0xfffe2000 -#define OMAP_PRODUCTION_ID_1 0xfffe2004 -#define OMAP32_ID_0 0xfffed400 -#define OMAP32_ID_1 0xfffed404 +#define omap2_cpu_rev() ((system_rev >> 8) & 0x0f) /* * Test if multicore OMAP support is needed @@ -50,7 +45,7 @@ extern unsigned int system_rev; # define OMAP_NAME omap730 # endif #endif -#ifdef CONFIG_ARCH_OMAP1510 +#ifdef CONFIG_ARCH_OMAP15XX # ifdef OMAP_NAME # undef MULTI_OMAP1 # define MULTI_OMAP1 @@ -79,9 +74,11 @@ extern unsigned int system_rev; * Macros to group OMAP into cpu classes. * These can be used in most places. * cpu_is_omap7xx(): True for OMAP730 - * cpu_is_omap15xx(): True for OMAP1510 and OMAP5910 + * cpu_is_omap15xx(): True for OMAP1510, OMAP5910 and OMAP310 * cpu_is_omap16xx(): True for OMAP1610, OMAP5912 and OMAP1710 - * cpu_is_omap24xx(): True for OMAP2420 + * cpu_is_omap24xx(): True for OMAP2420, OMAP2422, OMAP2423, OMAP2430 + * cpu_is_omap242x(): True for OMAP2420, OMAP2422, OMAP2423 + * cpu_is_omap243x(): True for OMAP2430 */ #define GET_OMAP_CLASS (system_rev & 0xff) @@ -91,22 +88,35 @@ static inline int is_omap ##class (void) \ return (GET_OMAP_CLASS == (id)) ? 1 : 0; \ } +#define GET_OMAP_SUBCLASS ((system_rev >> 20) & 0x0fff) + +#define IS_OMAP_SUBCLASS(subclass, id) \ +static inline int is_omap ##subclass (void) \ +{ \ + return (GET_OMAP_SUBCLASS == (id)) ? 1 : 0; \ +} + IS_OMAP_CLASS(7xx, 0x07) IS_OMAP_CLASS(15xx, 0x15) IS_OMAP_CLASS(16xx, 0x16) IS_OMAP_CLASS(24xx, 0x24) +IS_OMAP_SUBCLASS(242x, 0x242) +IS_OMAP_SUBCLASS(243x, 0x243) + #define cpu_is_omap7xx() 0 #define cpu_is_omap15xx() 0 #define cpu_is_omap16xx() 0 #define cpu_is_omap24xx() 0 +#define cpu_is_omap242x() 0 +#define cpu_is_omap243x() 0 #if defined(MULTI_OMAP1) # if defined(CONFIG_ARCH_OMAP730) # undef cpu_is_omap7xx # define cpu_is_omap7xx() is_omap7xx() # endif -# if defined(CONFIG_ARCH_OMAP1510) +# if defined(CONFIG_ARCH_OMAP15XX) # undef cpu_is_omap15xx # define cpu_is_omap15xx() is_omap15xx() # endif @@ -119,7 +129,7 @@ IS_OMAP_CLASS(24xx, 0x24) # undef cpu_is_omap7xx # define cpu_is_omap7xx() 1 # endif -# if defined(CONFIG_ARCH_OMAP1510) +# if defined(CONFIG_ARCH_OMAP15XX) # undef cpu_is_omap15xx # define cpu_is_omap15xx() 1 # endif @@ -129,13 +139,18 @@ IS_OMAP_CLASS(24xx, 0x24) # endif # if defined(CONFIG_ARCH_OMAP24XX) # undef cpu_is_omap24xx +# undef cpu_is_omap242x +# undef cpu_is_omap243x # define cpu_is_omap24xx() 1 +# define cpu_is_omap242x() is_omap242x() +# define cpu_is_omap243x() is_omap243x() # endif #endif /* * Macros to detect individual cpu types. * These are only rarely needed. + * cpu_is_omap330(): True for OMAP330 * cpu_is_omap730(): True for OMAP730 * cpu_is_omap1510(): True for OMAP1510 * cpu_is_omap1610(): True for OMAP1610 @@ -144,6 +159,9 @@ IS_OMAP_CLASS(24xx, 0x24) * cpu_is_omap1621(): True for OMAP1621 * cpu_is_omap1710(): True for OMAP1710 * cpu_is_omap2420(): True for OMAP2420 + * cpu_is_omap2422(): True for OMAP2422 + * cpu_is_omap2423(): True for OMAP2423 + * cpu_is_omap2430(): True for OMAP2430 */ #define GET_OMAP_TYPE ((system_rev >> 16) & 0xffff) @@ -153,6 +171,7 @@ static inline int is_omap ##type (void) \ return (GET_OMAP_TYPE == (id)) ? 1 : 0; \ } +IS_OMAP_TYPE(310, 0x0310) IS_OMAP_TYPE(730, 0x0730) IS_OMAP_TYPE(1510, 0x1510) IS_OMAP_TYPE(1610, 0x1610) @@ -161,7 +180,11 @@ IS_OMAP_TYPE(5912, 0x1611) IS_OMAP_TYPE(1621, 0x1621) IS_OMAP_TYPE(1710, 0x1710) IS_OMAP_TYPE(2420, 0x2420) +IS_OMAP_TYPE(2422, 0x2422) +IS_OMAP_TYPE(2423, 0x2423) +IS_OMAP_TYPE(2430, 0x2430) +#define cpu_is_omap310() 0 #define cpu_is_omap730() 0 #define cpu_is_omap1510() 0 #define cpu_is_omap1610() 0 @@ -170,31 +193,33 @@ IS_OMAP_TYPE(2420, 0x2420) #define cpu_is_omap1621() 0 #define cpu_is_omap1710() 0 #define cpu_is_omap2420() 0 +#define cpu_is_omap2422() 0 +#define cpu_is_omap2423() 0 +#define cpu_is_omap2430() 0 #if defined(MULTI_OMAP1) # if defined(CONFIG_ARCH_OMAP730) # undef cpu_is_omap730 # define cpu_is_omap730() is_omap730() # endif -# if defined(CONFIG_ARCH_OMAP1510) -# undef cpu_is_omap1510 -# define cpu_is_omap1510() is_omap1510() -# endif #else # if defined(CONFIG_ARCH_OMAP730) # undef cpu_is_omap730 # define cpu_is_omap730() 1 # endif -# if defined(CONFIG_ARCH_OMAP1510) -# undef cpu_is_omap1510 -# define cpu_is_omap1510() 1 -# endif #endif /* * Whether we have MULTI_OMAP1 or not, we still need to distinguish - * between 1611B/5912 and 1710. + * between 330 vs. 1510 and 1611B/5912 vs. 1710. */ +#if defined(CONFIG_ARCH_OMAP15XX) +# undef cpu_is_omap310 +# undef cpu_is_omap1510 +# define cpu_is_omap310() is_omap310() +# define cpu_is_omap1510() is_omap1510() +#endif + #if defined(CONFIG_ARCH_OMAP16XX) # undef cpu_is_omap1610 # undef cpu_is_omap1611 @@ -208,9 +233,20 @@ IS_OMAP_TYPE(2420, 0x2420) # define cpu_is_omap1710() is_omap1710() #endif -#if defined(CONFIG_ARCH_OMAP2420) -# undef cpu_is_omap2420 -# define cpu_is_omap2420() 1 +#if defined(CONFIG_ARCH_OMAP24XX) +# undef cpu_is_omap2420 +# undef cpu_is_omap2422 +# undef cpu_is_omap2423 +# undef cpu_is_omap2430 +# define cpu_is_omap2420() is_omap2420() +# define cpu_is_omap2422() is_omap2422() +# define cpu_is_omap2423() is_omap2423() +# define cpu_is_omap2430() is_omap2430() #endif +/* Macros to detect if we have OMAP1 or OMAP2 */ +#define cpu_class_is_omap1() (cpu_is_omap730() || cpu_is_omap15xx() || \ + cpu_is_omap16xx()) +#define cpu_class_is_omap2() cpu_is_omap24xx() + #endif diff --git a/include/asm-arm/arch-omap/dma.h b/include/asm-arm/arch-omap/dma.h index 04ebef5c6e95..ccbcb580a5c1 100644 --- a/include/asm-arm/arch-omap/dma.h +++ b/include/asm-arm/arch-omap/dma.h @@ -22,9 +22,109 @@ #define __ASM_ARCH_DMA_H #define MAX_DMA_ADDRESS 0xffffffff +#define MAX_DMA_CHANNELS 0 + +/* Hardware registers for omap1 */ +#define OMAP_DMA_BASE (0xfffed800) +#define OMAP_DMA_GCR (OMAP_DMA_BASE + 0x400) +#define OMAP_DMA_GSCR (OMAP_DMA_BASE + 0x404) +#define OMAP_DMA_GRST (OMAP_DMA_BASE + 0x408) +#define OMAP_DMA_HW_ID (OMAP_DMA_BASE + 0x442) +#define OMAP_DMA_PCH2_ID (OMAP_DMA_BASE + 0x444) +#define OMAP_DMA_PCH0_ID (OMAP_DMA_BASE + 0x446) +#define OMAP_DMA_PCH1_ID (OMAP_DMA_BASE + 0x448) +#define OMAP_DMA_PCHG_ID (OMAP_DMA_BASE + 0x44a) +#define OMAP_DMA_PCHD_ID (OMAP_DMA_BASE + 0x44c) +#define OMAP_DMA_CAPS_0_U (OMAP_DMA_BASE + 0x44e) +#define OMAP_DMA_CAPS_0_L (OMAP_DMA_BASE + 0x450) +#define OMAP_DMA_CAPS_1_U (OMAP_DMA_BASE + 0x452) +#define OMAP_DMA_CAPS_1_L (OMAP_DMA_BASE + 0x454) +#define OMAP_DMA_CAPS_2 (OMAP_DMA_BASE + 0x456) +#define OMAP_DMA_CAPS_3 (OMAP_DMA_BASE + 0x458) +#define OMAP_DMA_CAPS_4 (OMAP_DMA_BASE + 0x45a) +#define OMAP_DMA_PCH2_SR (OMAP_DMA_BASE + 0x460) +#define OMAP_DMA_PCH0_SR (OMAP_DMA_BASE + 0x480) +#define OMAP_DMA_PCH1_SR (OMAP_DMA_BASE + 0x482) +#define OMAP_DMA_PCHD_SR (OMAP_DMA_BASE + 0x4c0) + +/* Hardware registers for omap2 */ +#define OMAP24XX_DMA_BASE (L4_24XX_BASE + 0x56000) +#define OMAP_DMA4_REVISION (OMAP24XX_DMA_BASE + 0x00) +#define OMAP_DMA4_GCR_REG (OMAP24XX_DMA_BASE + 0x78) +#define OMAP_DMA4_IRQSTATUS_L0 (OMAP24XX_DMA_BASE + 0x08) +#define OMAP_DMA4_IRQSTATUS_L1 (OMAP24XX_DMA_BASE + 0x0c) +#define OMAP_DMA4_IRQSTATUS_L2 (OMAP24XX_DMA_BASE + 0x10) +#define OMAP_DMA4_IRQSTATUS_L3 (OMAP24XX_DMA_BASE + 0x14) +#define OMAP_DMA4_IRQENABLE_L0 (OMAP24XX_DMA_BASE + 0x18) +#define OMAP_DMA4_IRQENABLE_L1 (OMAP24XX_DMA_BASE + 0x1c) +#define OMAP_DMA4_IRQENABLE_L2 (OMAP24XX_DMA_BASE + 0x20) +#define OMAP_DMA4_IRQENABLE_L3 (OMAP24XX_DMA_BASE + 0x24) +#define OMAP_DMA4_SYSSTATUS (OMAP24XX_DMA_BASE + 0x28) +#define OMAP_DMA4_CAPS_0 (OMAP24XX_DMA_BASE + 0x64) +#define OMAP_DMA4_CAPS_2 (OMAP24XX_DMA_BASE + 0x6c) +#define OMAP_DMA4_CAPS_3 (OMAP24XX_DMA_BASE + 0x70) +#define OMAP_DMA4_CAPS_4 (OMAP24XX_DMA_BASE + 0x74) + +#ifdef CONFIG_ARCH_OMAP1 #define OMAP_LOGICAL_DMA_CH_COUNT 17 +/* Common channel specific registers for omap1 */ +#define OMAP_DMA_CSDP_REG(n) __REG16(OMAP_DMA_BASE + 0x40 * (n) + 0x00) +#define OMAP_DMA_CCR_REG(n) __REG16(OMAP_DMA_BASE + 0x40 * (n) + 0x02) +#define OMAP_DMA_CICR_REG(n) __REG16(OMAP_DMA_BASE + 0x40 * (n) + 0x04) +#define OMAP_DMA_CSR_REG(n) __REG16(OMAP_DMA_BASE + 0x40 * (n) + 0x06) +#define OMAP_DMA_CEN_REG(n) __REG16(OMAP_DMA_BASE + 0x40 * (n) + 0x10) +#define OMAP_DMA_CFN_REG(n) __REG16(OMAP_DMA_BASE + 0x40 * (n) + 0x12) +#define OMAP_DMA_CSFI_REG(n) __REG16(OMAP_DMA_BASE + 0x40 * (n) + 0x14) +#define OMAP_DMA_CSEI_REG(n) __REG16(OMAP_DMA_BASE + 0x40 * (n) + 0x16) +#define OMAP_DMA_CSAC_REG(n) __REG16(OMAP_DMA_BASE + 0x40 * (n) + 0x18) +#define OMAP_DMA_CDAC_REG(n) __REG16(OMAP_DMA_BASE + 0x40 * (n) + 0x1a) +#define OMAP_DMA_CDEI_REG(n) __REG16(OMAP_DMA_BASE + 0x40 * (n) + 0x1c) +#define OMAP_DMA_CDFI_REG(n) __REG16(OMAP_DMA_BASE + 0x40 * (n) + 0x1e) +#define OMAP_DMA_CLNK_CTRL_REG(n) __REG16(OMAP_DMA_BASE + 0x40 * (n) + 0x28) + +#else + +#define OMAP_LOGICAL_DMA_CH_COUNT 32 /* REVISIT: Is this 32 + 2? */ + +/* Common channel specific registers for omap2 */ +#define OMAP_DMA_CCR_REG(n) __REG32(OMAP24XX_DMA_BASE + 0x60 * (n) + 0x80) +#define OMAP_DMA_CLNK_CTRL_REG(n) __REG32(OMAP24XX_DMA_BASE + 0x60 * (n) + 0x84) +#define OMAP_DMA_CICR_REG(n) __REG32(OMAP24XX_DMA_BASE + 0x60 * (n) + 0x88) +#define OMAP_DMA_CSR_REG(n) __REG32(OMAP24XX_DMA_BASE + 0x60 * (n) + 0x8c) +#define OMAP_DMA_CSDP_REG(n) __REG32(OMAP24XX_DMA_BASE + 0x60 * (n) + 0x90) +#define OMAP_DMA_CEN_REG(n) __REG32(OMAP24XX_DMA_BASE + 0x60 * (n) + 0x94) +#define OMAP_DMA_CFN_REG(n) __REG32(OMAP24XX_DMA_BASE + 0x60 * (n) + 0x98) +#define OMAP_DMA_CSEI_REG(n) __REG32(OMAP24XX_DMA_BASE + 0x60 * (n) + 0xa4) +#define OMAP_DMA_CSFI_REG(n) __REG32(OMAP24XX_DMA_BASE + 0x60 * (n) + 0xa8) +#define OMAP_DMA_CDEI_REG(n) __REG32(OMAP24XX_DMA_BASE + 0x60 * (n) + 0xac) +#define OMAP_DMA_CDFI_REG(n) __REG32(OMAP24XX_DMA_BASE + 0x60 * (n) + 0xb0) +#define OMAP_DMA_CSAC_REG(n) __REG32(OMAP24XX_DMA_BASE + 0x60 * (n) + 0xb4) +#define OMAP_DMA_CDAC_REG(n) __REG32(OMAP24XX_DMA_BASE + 0x60 * (n) + 0xb8) + +#endif + +/* Channel specific registers only on omap1 */ +#define OMAP1_DMA_CSSA_L_REG(n) __REG16(OMAP_DMA_BASE + 0x40 * (n) + 0x08) +#define OMAP1_DMA_CSSA_U_REG(n) __REG16(OMAP_DMA_BASE + 0x40 * (n) + 0x0a) +#define OMAP1_DMA_CDSA_L_REG(n) __REG16(OMAP_DMA_BASE + 0x40 * (n) + 0x0c) +#define OMAP1_DMA_CDSA_U_REG(n) __REG16(OMAP_DMA_BASE + 0x40 * (n) + 0x0e) +#define OMAP1_DMA_COLOR_L_REG(n) __REG16(OMAP_DMA_BASE + 0x40 * (n) + 0x20) +#define OMAP1_DMA_CCR2_REG(n) __REG16(OMAP_DMA_BASE + 0x40 * (n) + 0x24) +#define OMAP1_DMA_COLOR_U_REG(n) __REG16(OMAP_DMA_BASE + 0x40 * (n) + 0x22) +#define OMAP1_DMA_LCH_CTRL_REG(n) __REG16(OMAP_DMA_BASE + 0x40 * (n) + 0x2a) + +/* Channel specific registers only on omap2 */ +#define OMAP2_DMA_CSSA_REG(n) __REG32(OMAP24XX_DMA_BASE + 0x60 * (n) + 0x9c) +#define OMAP2_DMA_CDSA_REG(n) __REG32(OMAP24XX_DMA_BASE + 0x60 * (n) + 0xa0) +#define OMAP2_DMA_CCEN_REG(n) __REG32(OMAP24XX_DMA_BASE + 0x60 * (n) + 0xbc) +#define OMAP2_DMA_CCFN_REG(n) __REG32(OMAP24XX_DMA_BASE + 0x60 * (n) + 0xc0) +#define OMAP2_DMA_COLOR_REG(n) __REG32(OMAP24XX_DMA_BASE + 0x60 * (n) + 0xc4) + +/*----------------------------------------------------------------------------*/ + +/* DMA channels for omap1 */ #define OMAP_DMA_NO_DEVICE 0 #define OMAP_DMA_MCSI1_TX 1 #define OMAP_DMA_MCSI1_RX 2 @@ -85,29 +185,72 @@ #define OMAP_DMA_MMC2_RX 55 #define OMAP_DMA_CRYPTO_DES_OUT 56 +/* DMA channels for 24xx */ +#define OMAP24XX_DMA_NO_DEVICE 0 +#define OMAP24XX_DMA_XTI_DMA 1 /* S_DMA_0 */ +#define OMAP24XX_DMA_EXT_NDMA_REQ0 2 /* S_DMA_1 */ +#define OMAP24XX_DMA_EXT_NDMA_REQ1 3 /* S_DMA_2 */ +#define OMAP24XX_DMA_GPMC 4 /* S_DMA_3 */ +#define OMAP24XX_DMA_GFX 5 /* S_DMA_4 */ +#define OMAP24XX_DMA_DSS 6 /* S_DMA_5 */ +#define OMAP24XX_DMA_VLYNQ_TX 7 /* S_DMA_6 */ +#define OMAP24XX_DMA_CWT 8 /* S_DMA_7 */ +#define OMAP24XX_DMA_AES_TX 9 /* S_DMA_8 */ +#define OMAP24XX_DMA_AES_RX 10 /* S_DMA_9 */ +#define OMAP24XX_DMA_DES_TX 11 /* S_DMA_10 */ +#define OMAP24XX_DMA_DES_RX 12 /* S_DMA_11 */ +#define OMAP24XX_DMA_SHA1MD5_RX 13 /* S_DMA_12 */ -#define OMAP_DMA_BASE (0xfffed800) -#define OMAP_DMA_GCR (OMAP_DMA_BASE + 0x400) -#define OMAP_DMA_GSCR (OMAP_DMA_BASE + 0x404) -#define OMAP_DMA_GRST (OMAP_DMA_BASE + 0x408) -#define OMAP_DMA_HW_ID (OMAP_DMA_BASE + 0x442) -#define OMAP_DMA_PCH2_ID (OMAP_DMA_BASE + 0x444) -#define OMAP_DMA_PCH0_ID (OMAP_DMA_BASE + 0x446) -#define OMAP_DMA_PCH1_ID (OMAP_DMA_BASE + 0x448) -#define OMAP_DMA_PCHG_ID (OMAP_DMA_BASE + 0x44a) -#define OMAP_DMA_PCHD_ID (OMAP_DMA_BASE + 0x44c) -#define OMAP_DMA_CAPS_0_U (OMAP_DMA_BASE + 0x44e) -#define OMAP_DMA_CAPS_0_L (OMAP_DMA_BASE + 0x450) -#define OMAP_DMA_CAPS_1_U (OMAP_DMA_BASE + 0x452) -#define OMAP_DMA_CAPS_1_L (OMAP_DMA_BASE + 0x454) -#define OMAP_DMA_CAPS_2 (OMAP_DMA_BASE + 0x456) -#define OMAP_DMA_CAPS_3 (OMAP_DMA_BASE + 0x458) -#define OMAP_DMA_CAPS_4 (OMAP_DMA_BASE + 0x45a) -#define OMAP_DMA_PCH2_SR (OMAP_DMA_BASE + 0x460) -#define OMAP_DMA_PCH0_SR (OMAP_DMA_BASE + 0x480) -#define OMAP_DMA_PCH1_SR (OMAP_DMA_BASE + 0x482) -#define OMAP_DMA_PCHD_SR (OMAP_DMA_BASE + 0x4c0) +#define OMAP24XX_DMA_EAC_AC_RD 17 /* S_DMA_16 */ +#define OMAP24XX_DMA_EAC_AC_WR 18 /* S_DMA_17 */ +#define OMAP24XX_DMA_EAC_MD_UL_RD 19 /* S_DMA_18 */ +#define OMAP24XX_DMA_EAC_MD_UL_WR 20 /* S_DMA_19 */ +#define OMAP24XX_DMA_EAC_MD_DL_RD 21 /* S_DMA_20 */ +#define OMAP24XX_DMA_EAC_MD_DL_WR 22 /* S_DMA_21 */ +#define OMAP24XX_DMA_EAC_BT_UL_RD 23 /* S_DMA_22 */ +#define OMAP24XX_DMA_EAC_BT_UL_WR 24 /* S_DMA_23 */ +#define OMAP24XX_DMA_EAC_BT_DL_RD 25 /* S_DMA_24 */ +#define OMAP24XX_DMA_EAC_BT_DL_WR 26 /* S_DMA_25 */ +#define OMAP24XX_DMA_I2C1_TX 27 /* S_DMA_26 */ +#define OMAP24XX_DMA_I2C1_RX 28 /* S_DMA_27 */ +#define OMAP24XX_DMA_I2C2_TX 29 /* S_DMA_28 */ +#define OMAP24XX_DMA_I2C2_RX 30 /* S_DMA_29 */ +#define OMAP24XX_DMA_MCBSP1_TX 31 /* SDMA_30 */ +#define OMAP24XX_DMA_MCBSP1_RX 32 /* SDMA_31 */ +#define OMAP24XX_DMA_MCBSP2_TX 33 /* SDMA_32 */ +#define OMAP24XX_DMA_MCBSP2_RX 34 /* SDMA_33 */ +#define OMAP24XX_DMA_SPI1_TX0 35 /* SDMA_34 */ +#define OMAP24XX_DMA_SPI1_RX0 36 /* SDMA_35 */ +#define OMAP24XX_DMA_SPI1_TX1 37 /* SDMA_36 */ +#define OMAP24XX_DMA_SPI1_RX1 38 /* SDMA_37 */ +#define OMAP24XX_DMA_SPI1_TX2 39 /* SDMA_38 */ +#define OMAP24XX_DMA_SPI1_RX2 40 /* SDMA_39 */ +#define OMAP24XX_DMA_SPI1_TX3 41 /* SDMA_40 */ +#define OMAP24XX_DMA_SPI1_RX3 42 /* SDMA_41 */ +#define OMAP24XX_DMA_SPI2_TX0 43 /* SDMA_42 */ +#define OMAP24XX_DMA_SPI2_RX0 44 /* SDMA_43 */ +#define OMAP24XX_DMA_SPI2_TX1 45 /* SDMA_44 */ +#define OMAP24XX_DMA_SPI2_RX1 46 /* SDMA_45 */ +#define OMAP24XX_DMA_UART1_TX 49 /* SDMA_48 */ +#define OMAP24XX_DMA_UART1_RX 50 /* SDMA_49 */ +#define OMAP24XX_DMA_UART2_TX 51 /* SDMA_50 */ +#define OMAP24XX_DMA_UART2_RX 52 /* SDMA_51 */ +#define OMAP24XX_DMA_UART3_TX 53 /* SDMA_52 */ +#define OMAP24XX_DMA_UART3_RX 54 /* SDMA_53 */ +#define OMAP24XX_DMA_USB_W2FC_TX0 55 /* SDMA_54 */ +#define OMAP24XX_DMA_USB_W2FC_RX0 56 /* SDMA_55 */ +#define OMAP24XX_DMA_USB_W2FC_TX1 57 /* SDMA_56 */ +#define OMAP24XX_DMA_USB_W2FC_RX1 58 /* SDMA_57 */ +#define OMAP24XX_DMA_USB_W2FC_TX2 59 /* SDMA_58 */ +#define OMAP24XX_DMA_USB_W2FC_RX2 60 /* SDMA_59 */ +#define OMAP24XX_DMA_MMC1_TX 61 /* SDMA_60 */ +#define OMAP24XX_DMA_MMC1_RX 62 /* SDMA_61 */ +#define OMAP24XX_DMA_MS 63 /* SDMA_62 */ + +/*----------------------------------------------------------------------------*/ + +/* Hardware registers for LCD DMA */ #define OMAP1510_DMA_LCD_BASE (0xfffedb00) #define OMAP1510_DMA_LCD_CTRL (OMAP1510_DMA_LCD_BASE + 0x00) #define OMAP1510_DMA_LCD_TOP_F1_L (OMAP1510_DMA_LCD_BASE + 0x02) @@ -116,7 +259,7 @@ #define OMAP1510_DMA_LCD_BOT_F1_U (OMAP1510_DMA_LCD_BASE + 0x08) #define OMAP1610_DMA_LCD_BASE (0xfffee300) -#define OMAP1610_DMA_LCD_CSDP (OMAP1610_DMA_LCD_BASE + 0xc0) +#define OMAP1610_DMA_LCD_CSDP (OMAP1610_DMA_LCD_BASE + 0xc0) #define OMAP1610_DMA_LCD_CCR (OMAP1610_DMA_LCD_BASE + 0xc2) #define OMAP1610_DMA_LCD_CTRL (OMAP1610_DMA_LCD_BASE + 0xc4) #define OMAP1610_DMA_LCD_TOP_B1_L (OMAP1610_DMA_LCD_BASE + 0xc8) @@ -134,37 +277,18 @@ #define OMAP1610_DMA_LCD_LCH_CTRL (OMAP1610_DMA_LCD_BASE + 0xea) #define OMAP1610_DMA_LCD_SRC_FI_B1_U (OMAP1610_DMA_LCD_BASE + 0xf4) - -/* Every LCh has its own set of the registers below */ -#define OMAP_DMA_CSDP(n) (OMAP_DMA_BASE + 0x40 * (n) + 0x00) -#define OMAP_DMA_CCR(n) (OMAP_DMA_BASE + 0x40 * (n) + 0x02) -#define OMAP_DMA_CICR(n) (OMAP_DMA_BASE + 0x40 * (n) + 0x04) -#define OMAP_DMA_CSR(n) (OMAP_DMA_BASE + 0x40 * (n) + 0x06) -#define OMAP_DMA_CSSA_L(n) (OMAP_DMA_BASE + 0x40 * (n) + 0x08) -#define OMAP_DMA_CSSA_U(n) (OMAP_DMA_BASE + 0x40 * (n) + 0x0a) -#define OMAP_DMA_CDSA_L(n) (OMAP_DMA_BASE + 0x40 * (n) + 0x0c) -#define OMAP_DMA_CDSA_U(n) (OMAP_DMA_BASE + 0x40 * (n) + 0x0e) -#define OMAP_DMA_CEN(n) (OMAP_DMA_BASE + 0x40 * (n) + 0x10) -#define OMAP_DMA_CFN(n) (OMAP_DMA_BASE + 0x40 * (n) + 0x12) -#define OMAP_DMA_CSFI(n) (OMAP_DMA_BASE + 0x40 * (n) + 0x14) -#define OMAP_DMA_CSEI(n) (OMAP_DMA_BASE + 0x40 * (n) + 0x16) -#define OMAP_DMA_CSAC(n) (OMAP_DMA_BASE + 0x40 * (n) + 0x18) -#define OMAP_DMA_CDAC(n) (OMAP_DMA_BASE + 0x40 * (n) + 0x1a) -#define OMAP_DMA_CDEI(n) (OMAP_DMA_BASE + 0x40 * (n) + 0x1c) -#define OMAP_DMA_CDFI(n) (OMAP_DMA_BASE + 0x40 * (n) + 0x1e) -#define OMAP_DMA_COLOR_L(n) (OMAP_DMA_BASE + 0x40 * (n) + 0x20) -#define OMAP_DMA_COLOR_U(n) (OMAP_DMA_BASE + 0x40 * (n) + 0x22) -#define OMAP_DMA_CCR2(n) (OMAP_DMA_BASE + 0x40 * (n) + 0x24) -#define OMAP_DMA_CLNK_CTRL(n) (OMAP_DMA_BASE + 0x40 * (n) + 0x28) -#define OMAP_DMA_LCH_CTRL(n) (OMAP_DMA_BASE + 0x40 * (n) + 0x2a) - -#define OMAP_DMA_TOUT_IRQ (1 << 0) +#define OMAP_DMA_TOUT_IRQ (1 << 0) /* Only on omap1 */ #define OMAP_DMA_DROP_IRQ (1 << 1) #define OMAP_DMA_HALF_IRQ (1 << 2) #define OMAP_DMA_FRAME_IRQ (1 << 3) #define OMAP_DMA_LAST_IRQ (1 << 4) #define OMAP_DMA_BLOCK_IRQ (1 << 5) -#define OMAP_DMA_SYNC_IRQ (1 << 6) +#define OMAP1_DMA_SYNC_IRQ (1 << 6) +#define OMAP2_DMA_PKT_IRQ (1 << 7) +#define OMAP2_DMA_TRANS_ERR_IRQ (1 << 8) +#define OMAP2_DMA_SECURE_ERR_IRQ (1 << 9) +#define OMAP2_DMA_SUPERVISOR_ERR_IRQ (1 << 10) +#define OMAP2_DMA_MISALIGNED_ERR_IRQ (1 << 11) #define OMAP_DMA_DATA_TYPE_S8 0x00 #define OMAP_DMA_DATA_TYPE_S16 0x01 @@ -194,6 +318,7 @@ enum { OMAP_LCD_DMA_B2_BOTTOM }; +/* REVISIT: Check if BURST_4 is really 1 (or 2) */ enum omap_dma_burst_mode { OMAP_DMA_DATA_BURST_DIS = 0, OMAP_DMA_DATA_BURST_4, @@ -206,6 +331,31 @@ enum omap_dma_color_mode { OMAP_DMA_TRANSPARENT_COPY }; +struct omap_dma_channel_params { + int data_type; /* data type 8,16,32 */ + int elem_count; /* number of elements in a frame */ + int frame_count; /* number of frames in a element */ + + int src_port; /* Only on OMAP1 REVISIT: Is this needed? */ + int src_amode; /* constant , post increment, indexed , double indexed */ + int src_start; /* source address : physical */ + int src_ei; /* source element index */ + int src_fi; /* source frame index */ + + int dst_port; /* Only on OMAP1 REVISIT: Is this needed? */ + int dst_amode; /* constant , post increment, indexed , double indexed */ + int dst_start; /* source address : physical */ + int dst_ei; /* source element index */ + int dst_fi; /* source frame index */ + + int trigger; /* trigger attached if the channel is synchronized */ + int sync_mode; /* sycn on element, frame , block or packet */ + int src_or_dst_synch; /* source synch(1) or destination synch(0) */ + + int ie; /* interrupt enabled */ +}; + + extern void omap_set_dma_priority(int dst_port, int priority); extern int omap_request_dma(int dev_id, const char *dev_name, void (* callback)(int lch, u16 ch_status, void *data), @@ -217,24 +367,30 @@ extern void omap_start_dma(int lch); extern void omap_stop_dma(int lch); extern void omap_set_dma_transfer_params(int lch, int data_type, int elem_count, int frame_count, - int sync_mode); + int sync_mode, + int dma_trigger, int src_or_dst_synch); extern void omap_set_dma_color_mode(int lch, enum omap_dma_color_mode mode, u32 color); extern void omap_set_dma_src_params(int lch, int src_port, int src_amode, - unsigned long src_start); + unsigned long src_start, + int src_ei, int src_fi); extern void omap_set_dma_src_index(int lch, int eidx, int fidx); extern void omap_set_dma_src_data_pack(int lch, int enable); extern void omap_set_dma_src_burst_mode(int lch, enum omap_dma_burst_mode burst_mode); extern void omap_set_dma_dest_params(int lch, int dest_port, int dest_amode, - unsigned long dest_start); + unsigned long dest_start, + int dst_ei, int dst_fi); extern void omap_set_dma_dest_index(int lch, int eidx, int fidx); extern void omap_set_dma_dest_data_pack(int lch, int enable); extern void omap_set_dma_dest_burst_mode(int lch, enum omap_dma_burst_mode burst_mode); +extern void omap_set_dma_params(int lch, + struct omap_dma_channel_params * params); + extern void omap_dma_link_lch (int lch_head, int lch_queue); extern void omap_dma_unlink_lch (int lch_head, int lch_queue); @@ -244,9 +400,6 @@ extern int omap_get_dma_src_addr_counter(int lch); extern void omap_clear_dma(int lch); extern int omap_dma_running(void); -/* Returns 1 if the DMA module is in OMAP1510-compatible mode, 0 otherwise */ -extern int omap_dma_in_1510_mode(void); - /* LCD DMA functions */ extern int omap_request_lcd_dma(void (* callback)(u16 status, void *data), void *data); diff --git a/include/asm-arm/arch-omap/entry-macro.S b/include/asm-arm/arch-omap/entry-macro.S index 0d29b9c56a95..f8814a84910e 100644 --- a/include/asm-arm/arch-omap/entry-macro.S +++ b/include/asm-arm/arch-omap/entry-macro.S @@ -10,6 +10,20 @@ #if defined(CONFIG_ARCH_OMAP1) +#if defined(CONFIG_ARCH_OMAP730) && \ + (defined(CONFIG_ARCH_OMAP15XX) || defined(CONFIG_ARCH_OMAP16XX)) +#error "FIXME: OMAP730 doesn't support multiple-OMAP" +#elif defined(CONFIG_ARCH_OMAP730) +#define INT_IH2_IRQ INT_730_IH2_IRQ +#elif defined(CONFIG_ARCH_OMAP15XX) +#define INT_IH2_IRQ INT_1510_IH2_IRQ +#elif defined(CONFIG_ARCH_OMAP16XX) +#define INT_IH2_IRQ INT_1610_IH2_IRQ +#else +#warning "IH2 IRQ defaulted" +#define INT_IH2_IRQ INT_1510_IH2_IRQ +#endif + .macro disable_fiq .endm diff --git a/include/asm-arm/arch-omap/fpga.h b/include/asm-arm/arch-omap/fpga.h index 676807dc50e1..6a883e0bdbb8 100644 --- a/include/asm-arm/arch-omap/fpga.h +++ b/include/asm-arm/arch-omap/fpga.h @@ -19,7 +19,7 @@ #ifndef __ASM_ARCH_OMAP_FPGA_H #define __ASM_ARCH_OMAP_FPGA_H -#if defined(CONFIG_MACH_OMAP_INNOVATOR) && defined(CONFIG_ARCH_OMAP1510) +#if defined(CONFIG_MACH_OMAP_INNOVATOR) && defined(CONFIG_ARCH_OMAP15XX) extern void omap1510_fpga_init_irq(void); #else #define omap1510_fpga_init_irq() (0) @@ -77,6 +77,8 @@ struct h2p2_dbg_fpga { #define H2P2_DBG_FPGA_LOAD_METER_SIZE 11 #define H2P2_DBG_FPGA_LOAD_METER_MASK ((1 << H2P2_DBG_FPGA_LOAD_METER_SIZE) - 1) +#define H2P2_DBG_FPGA_P2_LED_TIMER (1 << 0) +#define H2P2_DBG_FPGA_P2_LED_IDLE (1 << 1) /* * --------------------------------------------------------------------------- diff --git a/include/asm-arm/arch-omap/gpio.h b/include/asm-arm/arch-omap/gpio.h index 74cb2b93b700..f486b72070ea 100644 --- a/include/asm-arm/arch-omap/gpio.h +++ b/include/asm-arm/arch-omap/gpio.h @@ -26,7 +26,7 @@ #ifndef __ASM_ARCH_OMAP_GPIO_H #define __ASM_ARCH_OMAP_GPIO_H -#include <asm/arch/hardware.h> +#include <asm/hardware.h> #include <asm/arch/irqs.h> #include <asm/io.h> @@ -67,7 +67,7 @@ #define OMAP_GPIO_IRQ(nr) (OMAP_GPIO_IS_MPUIO(nr) ? \ IH_MPUIO_BASE + ((nr) & 0x0f) : \ - IH_GPIO_BASE + ((nr) & 0x3f)) + IH_GPIO_BASE + (nr)) extern int omap_gpio_init(void); /* Call from board init only */ extern int omap_request_gpio(int gpio); diff --git a/include/asm-arm/arch-omap/hardware.h b/include/asm-arm/arch-omap/hardware.h index 60201e1dd6ad..5406b875c422 100644 --- a/include/asm-arm/arch-omap/hardware.h +++ b/include/asm-arm/arch-omap/hardware.h @@ -267,8 +267,6 @@ #define OMAP_LPG2_LCR (OMAP_LPG2_BASE + 0x00) #define OMAP_LPG2_PMR (OMAP_LPG2_BASE + 0x04) -#ifndef __ASSEMBLER__ - /* * --------------------------------------------------------------------------- * Processor specific defines @@ -277,13 +275,11 @@ #include "omap730.h" #include "omap1510.h" - -#ifdef CONFIG_ARCH_OMAP24XX #include "omap24xx.h" -#endif - #include "omap16xx.h" +#ifndef __ASSEMBLER__ + /* * --------------------------------------------------------------------------- * Board specific defines diff --git a/include/asm-arm/arch-omap/io.h b/include/asm-arm/arch-omap/io.h index 11fbf629bf75..f5bcc9a1aed6 100644 --- a/include/asm-arm/arch-omap/io.h +++ b/include/asm-arm/arch-omap/io.h @@ -34,6 +34,8 @@ #ifndef __ASM_ARM_ARCH_IO_H #define __ASM_ARM_ARCH_IO_H +#include <asm/hardware.h> + #define IO_SPACE_LIMIT 0xffffffff /* @@ -50,23 +52,33 @@ * ---------------------------------------------------------------------------- */ +#define PCIO_BASE 0 + #if defined(CONFIG_ARCH_OMAP1) + #define IO_PHYS 0xFFFB0000 -#define IO_OFFSET -0x01000000 /* Virtual IO = 0xfefb0000 */ +#define IO_OFFSET 0x01000000 /* Virtual IO = 0xfefb0000 */ #define IO_SIZE 0x40000 +#define IO_VIRT (IO_PHYS - IO_OFFSET) +#define IO_ADDRESS(pa) ((pa) - IO_OFFSET) +#define io_p2v(pa) ((pa) - IO_OFFSET) +#define io_v2p(va) ((va) + IO_OFFSET) #elif defined(CONFIG_ARCH_OMAP2) -#define IO_PHYS 0x48000000 /* L4 peripherals; other stuff has to be mapped * - * manually. */ -#define IO_OFFSET 0x90000000 /* Virtual IO = 0xd8000000 */ -#define IO_SIZE 0x08000000 -#endif -#define IO_VIRT (IO_PHYS + IO_OFFSET) -#define IO_ADDRESS(x) ((x) + IO_OFFSET) -#define PCIO_BASE 0 -#define io_p2v(x) ((x) + IO_OFFSET) -#define io_v2p(x) ((x) - IO_OFFSET) +/* We map both L3 and L4 on OMAP2 */ +#define L3_24XX_PHYS L3_24XX_BASE /* 0x68000000 */ +#define L3_24XX_VIRT 0xf8000000 +#define L3_24XX_SIZE SZ_1M /* 44kB of 128MB used, want 1MB sect */ +#define L4_24XX_PHYS L4_24XX_BASE /* 0x48000000 */ +#define L4_24XX_VIRT 0xd8000000 +#define L4_24XX_SIZE SZ_1M /* 1MB of 128MB used, want 1MB sect */ +#define IO_OFFSET 0x90000000 +#define IO_ADDRESS(pa) ((pa) + IO_OFFSET) /* Works for L3 and L4 */ +#define io_p2v(pa) ((pa) + IO_OFFSET) /* Works for L3 and L4 */ +#define io_v2p(va) ((va) - IO_OFFSET) /* Works for L3 and L4 */ + +#endif #ifndef __ASSEMBLER__ diff --git a/include/asm-arm/arch-omap/irqs.h b/include/asm-arm/arch-omap/irqs.h index 74e108ccac16..4ffce1d77759 100644 --- a/include/asm-arm/arch-omap/irqs.h +++ b/include/asm-arm/arch-omap/irqs.h @@ -22,8 +22,8 @@ * are different. */ -#ifndef __ASM_ARCH_OMAP1510_IRQS_H -#define __ASM_ARCH_OMAP1510_IRQS_H +#ifndef __ASM_ARCH_OMAP15XX_IRQS_H +#define __ASM_ARCH_OMAP15XX_IRQS_H /* * IRQ numbers for interrupt handler 1 @@ -31,7 +31,6 @@ * NOTE: See also the OMAP-1510 and 1610 specific IRQ numbers below * */ -#define INT_IH2_IRQ 0 #define INT_CAMERA 1 #define INT_FIQ 3 #define INT_RTDX 6 @@ -60,6 +59,7 @@ /* * OMAP-1510 specific IRQ numbers for interrupt handler 1 */ +#define INT_1510_IH2_IRQ 0 #define INT_1510_RES2 2 #define INT_1510_SPI_TX 4 #define INT_1510_SPI_RX 5 @@ -71,6 +71,7 @@ /* * OMAP-1610 specific IRQ numbers for interrupt handler 1 */ +#define INT_1610_IH2_IRQ 0 #define INT_1610_IH2_FIQ 2 #define INT_1610_McBSP2_TX 4 #define INT_1610_McBSP2_RX 5 @@ -231,6 +232,12 @@ #define INT_730_DMA_CH15 (62 + IH2_BASE) #define INT_730_NAND (63 + IH2_BASE) +#define INT_24XX_SYS_NIRQ 7 +#define INT_24XX_SDMA_IRQ0 12 +#define INT_24XX_SDMA_IRQ1 13 +#define INT_24XX_SDMA_IRQ2 14 +#define INT_24XX_SDMA_IRQ3 15 +#define INT_24XX_DSS_IRQ 25 #define INT_24XX_GPIO_BANK1 29 #define INT_24XX_GPIO_BANK2 30 #define INT_24XX_GPIO_BANK3 31 @@ -253,7 +260,7 @@ extern void omap_init_irq(void); * The definition of NR_IRQS is in board-specific header file, which is * included via hardware.h */ -#include <asm/arch/hardware.h> +#include <asm/hardware.h> #ifndef NR_IRQS #define NR_IRQS IH_BOARD_BASE diff --git a/include/asm-arm/arch-omap/mcbsp.h b/include/asm-arm/arch-omap/mcbsp.h index 305bdeb16ab8..e79d98ab2ab6 100644 --- a/include/asm-arm/arch-omap/mcbsp.h +++ b/include/asm-arm/arch-omap/mcbsp.h @@ -24,7 +24,7 @@ #ifndef __ASM_ARCH_OMAP_MCBSP_H #define __ASM_ARCH_OMAP_MCBSP_H -#include <asm/arch/hardware.h> +#include <asm/hardware.h> #define OMAP730_MCBSP1_BASE 0xfffb1000 #define OMAP730_MCBSP2_BASE 0xfffb1800 diff --git a/include/asm-arm/arch-omap/memory.h b/include/asm-arm/arch-omap/memory.h index ef32d61eec7a..df50dd53e1dd 100644 --- a/include/asm-arm/arch-omap/memory.h +++ b/include/asm-arm/arch-omap/memory.h @@ -37,9 +37,9 @@ * Physical DRAM offset. */ #if defined(CONFIG_ARCH_OMAP1) -#define PHYS_OFFSET (0x10000000UL) +#define PHYS_OFFSET UL(0x10000000) #elif defined(CONFIG_ARCH_OMAP2) -#define PHYS_OFFSET (0x80000000UL) +#define PHYS_OFFSET UL(0x80000000) #endif /* @@ -61,12 +61,12 @@ * Note that the is_lbus_device() test is not very efficient on 1510 * because of the strncmp(). */ -#ifdef CONFIG_ARCH_OMAP1510 +#ifdef CONFIG_ARCH_OMAP15XX /* * OMAP-1510 Local Bus address offset */ -#define OMAP1510_LB_OFFSET (0x30000000UL) +#define OMAP1510_LB_OFFSET UL(0x30000000) #define virt_to_lbus(x) ((x) - PAGE_OFFSET + OMAP1510_LB_OFFSET) #define lbus_to_virt(x) ((x) - OMAP1510_LB_OFFSET + PAGE_OFFSET) @@ -84,7 +84,7 @@ virt_to_lbus(addr) : \ __virt_to_bus(addr);}) -#endif /* CONFIG_ARCH_OMAP1510 */ +#endif /* CONFIG_ARCH_OMAP15XX */ #endif diff --git a/include/asm-arm/arch-omap/menelaus.h b/include/asm-arm/arch-omap/menelaus.h new file mode 100644 index 000000000000..46be8b8d6346 --- /dev/null +++ b/include/asm-arm/arch-omap/menelaus.h @@ -0,0 +1,22 @@ +/* + * linux/include/asm-arm/arch-omap/menelaus.h + * + * Functions to access Menelaus power management chip + */ + +#ifndef __ASM_ARCH_MENELAUS_H +#define __ASM_ARCH_MENELAUS_H + +extern void menelaus_mmc_register(void (*callback)(u8 card_mask), + unsigned long data); +extern void menelaus_mmc_remove(void); +extern void menelaus_mmc_opendrain(int enable); + +#if defined(CONFIG_ARCH_OMAP24XX) && defined(CONFIG_MENELAUS) +#define omap_has_menelaus() 1 +#else +#define omap_has_menelaus() 0 +#endif + +#endif + diff --git a/include/asm-arm/arch-omap/mux.h b/include/asm-arm/arch-omap/mux.h index 1b1ad4105349..13415a9aab06 100644 --- a/include/asm-arm/arch-omap/mux.h +++ b/include/asm-arm/arch-omap/mux.h @@ -4,7 +4,7 @@ * Table of the Omap register configurations for the FUNC_MUX and * PULL_DWN combinations. * - * Copyright (C) 2003 Nokia Corporation + * Copyright (C) 2003 - 2005 Nokia Corporation * * Written by Tony Lindgren <tony.lindgren@nokia.com> * @@ -58,6 +58,16 @@ .pu_pd_reg = PU_PD_SEL_##reg, \ .pu_pd_val = status, +#define MUX_REG_730(reg, mode_offset, mode) .mux_reg_name = "OMAP730_IO_CONF_"#reg, \ + .mux_reg = OMAP730_IO_CONF_##reg, \ + .mask_offset = mode_offset, \ + .mask = mode, + +#define PULL_REG_730(reg, bit, status) .pull_name = "OMAP730_IO_CONF_"#reg, \ + .pull_reg = OMAP730_IO_CONF_##reg, \ + .pull_bit = bit, \ + .pull_val = status, + #else #define MUX_REG(reg, mode_offset, mode) .mux_reg = FUNC_MUX_CTRL_##reg, \ @@ -71,6 +81,15 @@ #define PU_PD_REG(reg, status) .pu_pd_reg = PU_PD_SEL_##reg, \ .pu_pd_val = status, +#define MUX_REG_730(reg, mode_offset, mode) \ + .mux_reg = OMAP730_IO_CONF_##reg, \ + .mask_offset = mode_offset, \ + .mask = mode, + +#define PULL_REG_730(reg, bit, status) .pull_reg = OMAP730_IO_CONF_##reg, \ + .pull_bit = bit, \ + .pull_val = status, + #endif /* CONFIG_OMAP_MUX_DEBUG */ #define MUX_CFG(desc, mux_reg, mode_offset, mode, \ @@ -84,13 +103,44 @@ PU_PD_REG(pu_pd_reg, pu_pd_status) \ }, + +/* + * OMAP730 has a slightly different config for the pin mux. + * - config regs are the OMAP730_IO_CONF_x regs (see omap730.h) regs and + * not the FUNC_MUX_CTRL_x regs from hardware.h + * - for pull-up/down, only has one enable bit which is is in the same register + * as mux config + */ +#define MUX_CFG_730(desc, mux_reg, mode_offset, mode, \ + pull_reg, pull_bit, pull_status, \ + pu_pd_reg, pu_pd_status, debug_status)\ +{ \ + .name = desc, \ + .debug = debug_status, \ + MUX_REG_730(mux_reg, mode_offset, mode) \ + PULL_REG_730(mux_reg, pull_bit, pull_status) \ + PU_PD_REG(pu_pd_reg, pu_pd_status) \ +}, + +#define MUX_CFG_24XX(desc, reg_offset, mode, \ + pull_en, pull_mode, dbg) \ +{ \ + .name = desc, \ + .debug = dbg, \ + .mux_reg = reg_offset, \ + .mask = mode, \ + .pull_val = pull_en, \ + .pu_pd_val = pull_mode, \ +}, + + #define PULL_DISABLED 0 #define PULL_ENABLED 1 #define PULL_DOWN 0 #define PULL_UP 1 -typedef struct { +struct pin_config { char *name; unsigned char busy; unsigned char debug; @@ -108,13 +158,23 @@ typedef struct { const char *pu_pd_name; const unsigned int pu_pd_reg; const unsigned char pu_pd_val; -} reg_cfg_set; +}; -/* - * Lookup table for FUNC_MUX and PULL_DWN register combinations for each - * device. See also reg_cfg_table below for the register values. - */ -typedef enum { +enum omap730_index { + /* OMAP 730 keyboard */ + E2_730_KBR0, + J7_730_KBR1, + E1_730_KBR2, + F3_730_KBR3, + D2_730_KBR4, + C2_730_KBC0, + D3_730_KBC1, + E4_730_KBC2, + F4_730_KBC3, + E3_730_KBC4, +}; + +enum omap1xxx_index { /* UART1 (BT_UART_GATING)*/ UART1_TX = 0, UART1_RTS, @@ -331,245 +391,34 @@ typedef enum { V10_1610_CF_IREQ, W10_1610_CF_RESET, W11_1610_CF_CD1, -} reg_cfg_t; +}; -#if defined(__MUX_C__) && defined(CONFIG_OMAP_MUX) +enum omap24xx_index { + /* 24xx I2C */ + M19_24XX_I2C1_SCL, + L15_24XX_I2C1_SDA, + J15_24XX_I2C2_SCL, + H19_24XX_I2C2_SDA, -/* - * Table of various FUNC_MUX and PULL_DWN combinations for each device. - * See also reg_cfg_t above for the lookup table. - */ -static const reg_cfg_set __initdata_or_module -reg_cfg_table[] = { -/* - * description mux mode mux pull pull pull pu_pd pu dbg - * reg offset mode reg bit ena reg - */ -MUX_CFG("UART1_TX", 9, 21, 1, 2, 3, 0, NA, 0, 0) -MUX_CFG("UART1_RTS", 9, 12, 1, 2, 0, 0, NA, 0, 0) - -/* UART2 (COM_UART_GATING), conflicts with USB2 */ -MUX_CFG("UART2_TX", C, 27, 1, 3, 3, 0, NA, 0, 0) -MUX_CFG("UART2_RX", C, 18, 0, 3, 1, 1, NA, 0, 0) -MUX_CFG("UART2_CTS", C, 21, 0, 3, 1, 1, NA, 0, 0) -MUX_CFG("UART2_RTS", C, 24, 1, 3, 2, 0, NA, 0, 0) - -/* UART3 (GIGA_UART_GATING) */ -MUX_CFG("UART3_TX", 6, 0, 1, 0, 30, 0, NA, 0, 0) -MUX_CFG("UART3_RX", 6, 3, 0, 0, 31, 1, NA, 0, 0) -MUX_CFG("UART3_CTS", 5, 12, 2, 0, 24, 0, NA, 0, 0) -MUX_CFG("UART3_RTS", 5, 15, 2, 0, 25, 0, NA, 0, 0) -MUX_CFG("UART3_CLKREQ", 9, 27, 0, 2, 5, 0, NA, 0, 0) -MUX_CFG("UART3_BCLK", A, 0, 0, 2, 6, 0, NA, 0, 0) -MUX_CFG("Y15_1610_UART3_RTS", A, 0, 1, 2, 6, 0, NA, 0, 0) - -/* PWT & PWL, conflicts with UART3 */ -MUX_CFG("PWT", 6, 0, 2, 0, 30, 0, NA, 0, 0) -MUX_CFG("PWL", 6, 3, 1, 0, 31, 1, NA, 0, 0) - -/* USB internal master generic */ -MUX_CFG("R18_USB_VBUS", 7, 9, 2, 1, 11, 0, NA, 0, 1) -MUX_CFG("R18_1510_USB_GPIO0", 7, 9, 0, 1, 11, 1, NA, 0, 1) -/* works around erratum: W4_USB_PUEN and W4_USB_PUDIS are switched! */ -MUX_CFG("W4_USB_PUEN", D, 3, 3, 3, 5, 1, NA, 0, 1) -MUX_CFG("W4_USB_CLKO", D, 3, 1, 3, 5, 0, NA, 0, 1) -MUX_CFG("W4_USB_HIGHZ", D, 3, 4, 3, 5, 0, 3, 0, 1) -MUX_CFG("W4_GPIO58", D, 3, 7, 3, 5, 0, 3, 0, 1) - -/* USB1 master */ -MUX_CFG("USB1_SUSP", 8, 27, 2, 1, 27, 0, NA, 0, 1) -MUX_CFG("USB1_SE0", 9, 0, 2, 1, 28, 0, NA, 0, 1) -MUX_CFG("W13_1610_USB1_SE0", 9, 0, 4, 1, 28, 0, NA, 0, 1) -MUX_CFG("USB1_TXEN", 9, 3, 2, 1, 29, 0, NA, 0, 1) -MUX_CFG("USB1_TXD", 9, 24, 1, 2, 4, 0, NA, 0, 1) -MUX_CFG("USB1_VP", A, 3, 1, 2, 7, 0, NA, 0, 1) -MUX_CFG("USB1_VM", A, 6, 1, 2, 8, 0, NA, 0, 1) -MUX_CFG("USB1_RCV", A, 9, 1, 2, 9, 0, NA, 0, 1) -MUX_CFG("USB1_SPEED", A, 12, 2, 2, 10, 0, NA, 0, 1) -MUX_CFG("R13_1610_USB1_SPEED", A, 12, 5, 2, 10, 0, NA, 0, 1) -MUX_CFG("R13_1710_USB1_SEO", A, 12, 5, 2, 10, 0, NA, 0, 1) - -/* USB2 master */ -MUX_CFG("USB2_SUSP", B, 3, 1, 2, 17, 0, NA, 0, 1) -MUX_CFG("USB2_VP", B, 6, 1, 2, 18, 0, NA, 0, 1) -MUX_CFG("USB2_TXEN", B, 9, 1, 2, 19, 0, NA, 0, 1) -MUX_CFG("USB2_VM", C, 18, 1, 3, 0, 0, NA, 0, 1) -MUX_CFG("USB2_RCV", C, 21, 1, 3, 1, 0, NA, 0, 1) -MUX_CFG("USB2_SE0", C, 24, 2, 3, 2, 0, NA, 0, 1) -MUX_CFG("USB2_TXD", C, 27, 2, 3, 3, 0, NA, 0, 1) - -/* OMAP-1510 GPIO */ -MUX_CFG("R18_1510_GPIO0", 7, 9, 0, 1, 11, 1, 0, 0, 1) -MUX_CFG("R19_1510_GPIO1", 7, 6, 0, 1, 10, 1, 0, 0, 1) -MUX_CFG("M14_1510_GPIO2", 7, 3, 0, 1, 9, 1, 0, 0, 1) - -/* OMAP1610 GPIO */ -MUX_CFG("P18_1610_GPIO3", 7, 0, 0, 1, 8, 0, NA, 0, 1) -MUX_CFG("Y15_1610_GPIO17", A, 0, 7, 2, 6, 0, NA, 0, 1) - -/* OMAP-1710 GPIO */ -MUX_CFG("R18_1710_GPIO0", 7, 9, 0, 1, 11, 1, 1, 1, 1) -MUX_CFG("V2_1710_GPIO10", F, 27, 1, 4, 3, 1, 4, 1, 1) -MUX_CFG("N21_1710_GPIO14", 6, 9, 0, 1, 1, 1, 1, 1, 1) -MUX_CFG("W15_1710_GPIO40", 9, 27, 7, 2, 5, 1, 2, 1, 1) - -/* MPUIO */ -MUX_CFG("MPUIO2", 7, 18, 0, 1, 14, 1, NA, 0, 1) -MUX_CFG("N15_1610_MPUIO2", 7, 18, 0, 1, 14, 1, 1, 0, 1) -MUX_CFG("MPUIO4", 7, 15, 0, 1, 13, 1, NA, 0, 1) -MUX_CFG("MPUIO5", 7, 12, 0, 1, 12, 1, NA, 0, 1) - -MUX_CFG("T20_1610_MPUIO5", 7, 12, 0, 1, 12, 0, 3, 0, 1) -MUX_CFG("W11_1610_MPUIO6", 10, 15, 2, 3, 8, 0, 3, 0, 1) -MUX_CFG("V10_1610_MPUIO7", A, 24, 2, 2, 14, 0, 2, 0, 1) -MUX_CFG("W11_1610_MPUIO9", 10, 15, 1, 3, 8, 0, 3, 0, 1) -MUX_CFG("V10_1610_MPUIO10", A, 24, 1, 2, 14, 0, 2, 0, 1) -MUX_CFG("W10_1610_MPUIO11", A, 18, 2, 2, 11, 0, 2, 0, 1) -MUX_CFG("E20_1610_MPUIO13", 3, 21, 1, 0, 7, 0, 0, 0, 1) -MUX_CFG("U20_1610_MPUIO14", 9, 6, 6, 0, 30, 0, 0, 0, 1) -MUX_CFG("E19_1610_MPUIO15", 3, 18, 1, 0, 6, 0, 0, 0, 1) - -/* MCBSP2 */ -MUX_CFG("MCBSP2_CLKR", C, 6, 0, 2, 27, 1, NA, 0, 1) -MUX_CFG("MCBSP2_CLKX", C, 9, 0, 2, 29, 1, NA, 0, 1) -MUX_CFG("MCBSP2_DR", C, 0, 0, 2, 26, 1, NA, 0, 1) -MUX_CFG("MCBSP2_DX", C, 15, 0, 2, 31, 1, NA, 0, 1) -MUX_CFG("MCBSP2_FSR", C, 12, 0, 2, 30, 1, NA, 0, 1) -MUX_CFG("MCBSP2_FSX", C, 3, 0, 2, 27, 1, NA, 0, 1) - -/* MCBSP3 NOTE: Mode must 1 for clock */ -MUX_CFG("MCBSP3_CLKX", 9, 3, 1, 1, 29, 0, NA, 0, 1) - -/* Misc ballouts */ -MUX_CFG("BALLOUT_V8_ARMIO3", B, 18, 0, 2, 25, 1, NA, 0, 1) -MUX_CFG("N20_HDQ", 6, 18, 1, 1, 4, 0, 1, 4, 0) - -/* OMAP-1610 MMC2 */ -MUX_CFG("W8_1610_MMC2_DAT0", B, 21, 6, 2, 23, 1, 2, 1, 1) -MUX_CFG("V8_1610_MMC2_DAT1", B, 27, 6, 2, 25, 1, 2, 1, 1) -MUX_CFG("W15_1610_MMC2_DAT2", 9, 12, 6, 2, 5, 1, 2, 1, 1) -MUX_CFG("R10_1610_MMC2_DAT3", B, 18, 6, 2, 22, 1, 2, 1, 1) -MUX_CFG("Y10_1610_MMC2_CLK", B, 3, 6, 2, 17, 0, 2, 0, 1) -MUX_CFG("Y8_1610_MMC2_CMD", B, 24, 6, 2, 24, 1, 2, 1, 1) -MUX_CFG("V9_1610_MMC2_CMDDIR", B, 12, 6, 2, 20, 0, 2, 1, 1) -MUX_CFG("V5_1610_MMC2_DATDIR0", B, 15, 6, 2, 21, 0, 2, 1, 1) -MUX_CFG("W19_1610_MMC2_DATDIR1", 8, 15, 6, 1, 23, 0, 1, 1, 1) -MUX_CFG("R18_1610_MMC2_CLKIN", 7, 9, 6, 1, 11, 0, 1, 11, 1) - -/* OMAP-1610 External Trace Interface */ -MUX_CFG("M19_1610_ETM_PSTAT0", 5, 27, 1, 0, 29, 0, 0, 0, 1) -MUX_CFG("L15_1610_ETM_PSTAT1", 5, 24, 1, 0, 28, 0, 0, 0, 1) -MUX_CFG("L18_1610_ETM_PSTAT2", 5, 21, 1, 0, 27, 0, 0, 0, 1) -MUX_CFG("L19_1610_ETM_D0", 5, 18, 1, 0, 26, 0, 0, 0, 1) -MUX_CFG("J19_1610_ETM_D6", 5, 0, 1, 0, 20, 0, 0, 0, 1) -MUX_CFG("J18_1610_ETM_D7", 5, 27, 1, 0, 19, 0, 0, 0, 1) - -/* OMAP16XX GPIO */ -MUX_CFG("P20_1610_GPIO4", 6, 27, 0, 1, 7, 0, 1, 1, 1) -MUX_CFG("V9_1610_GPIO7", B, 12, 1, 2, 20, 0, 2, 1, 1) -MUX_CFG("W8_1610_GPIO9", B, 21, 0, 2, 23, 0, 2, 1, 1) -MUX_CFG("N20_1610_GPIO11", 6, 18, 0, 1, 4, 0, 1, 1, 1) -MUX_CFG("N19_1610_GPIO13", 6, 12, 0, 1, 2, 0, 1, 1, 1) -MUX_CFG("P10_1610_GPIO22", C, 0, 7, 2, 26, 0, 2, 1, 1) -MUX_CFG("V5_1610_GPIO24", B, 15, 7, 2, 21, 0, 2, 1, 1) -MUX_CFG("AA20_1610_GPIO_41", 9, 9, 7, 1, 31, 0, 1, 1, 1) -MUX_CFG("W19_1610_GPIO48", 8, 15, 7, 1, 23, 1, 1, 0, 1) -MUX_CFG("M7_1610_GPIO62", 10, 0, 0, 4, 24, 0, 4, 0, 1) -MUX_CFG("V14_16XX_GPIO37", 9, 18, 7, 2, 2, 0, 2, 2, 0) -MUX_CFG("R9_16XX_GPIO18", C, 18, 7, 3, 0, 0, 3, 0, 0) -MUX_CFG("L14_16XX_GPIO49", 6, 3, 7, 0, 31, 0, 0, 31, 0) - -/* OMAP-1610 uWire */ -MUX_CFG("V19_1610_UWIRE_SCLK", 8, 6, 0, 1, 20, 0, 1, 1, 1) -MUX_CFG("U18_1610_UWIRE_SDI", 8, 0, 0, 1, 18, 0, 1, 1, 1) -MUX_CFG("W21_1610_UWIRE_SDO", 8, 3, 0, 1, 19, 0, 1, 1, 1) -MUX_CFG("N14_1610_UWIRE_CS0", 8, 9, 1, 1, 21, 0, 1, 1, 1) -MUX_CFG("P15_1610_UWIRE_CS3", 8, 12, 1, 1, 22, 0, 1, 1, 1) -MUX_CFG("N15_1610_UWIRE_CS1", 7, 18, 2, 1, 14, 0, NA, 0, 1) - -/* OMAP-1610 Flash */ -MUX_CFG("L3_1610_FLASH_CS2B_OE",10, 6, 1, NA, 0, 0, NA, 0, 1) -MUX_CFG("M8_1610_FLASH_CS2B_WE",10, 3, 1, NA, 0, 0, NA, 0, 1) - -/* First MMC interface, same on 1510, 1610 and 1710 */ -MUX_CFG("MMC_CMD", A, 27, 0, 2, 15, 1, 2, 1, 1) -MUX_CFG("MMC_DAT1", A, 24, 0, 2, 14, 1, 2, 1, 1) -MUX_CFG("MMC_DAT2", A, 18, 0, 2, 12, 1, 2, 1, 1) -MUX_CFG("MMC_DAT0", B, 0, 0, 2, 16, 1, 2, 1, 1) -MUX_CFG("MMC_CLK", A, 21, 0, NA, 0, 0, NA, 0, 1) -MUX_CFG("MMC_DAT3", 10, 15, 0, 3, 8, 1, 3, 1, 1) -MUX_CFG("M15_1710_MMC_CLKI", 6, 21, 2, 0, 0, 0, NA, 0, 1) -MUX_CFG("P19_1710_MMC_CMDDIR", 6, 24, 6, 0, 0, 0, NA, 0, 1) -MUX_CFG("P20_1710_MMC_DATDIR0", 6, 27, 5, 0, 0, 0, NA, 0, 1) - -/* OMAP-1610 USB0 alternate configuration */ -MUX_CFG("W9_USB0_TXEN", B, 9, 5, 2, 19, 0, 2, 0, 1) -MUX_CFG("AA9_USB0_VP", B, 6, 5, 2, 18, 0, 2, 0, 1) -MUX_CFG("Y5_USB0_RCV", C, 21, 5, 3, 1, 0, 1, 0, 1) -MUX_CFG("R9_USB0_VM", C, 18, 5, 3, 0, 0, 3, 0, 1) -MUX_CFG("V6_USB0_TXD", C, 27, 5, 3, 3, 0, 3, 0, 1) -MUX_CFG("W5_USB0_SE0", C, 24, 5, 3, 2, 0, 3, 0, 1) -MUX_CFG("V9_USB0_SPEED", B, 12, 5, 2, 20, 0, 2, 0, 1) -MUX_CFG("Y10_USB0_SUSP", B, 3, 5, 2, 17, 0, 2, 0, 1) - -/* USB2 interface */ -MUX_CFG("W9_USB2_TXEN", B, 9, 1, NA, 0, 0, NA, 0, 1) -MUX_CFG("AA9_USB2_VP", B, 6, 1, NA, 0, 0, NA, 0, 1) -MUX_CFG("Y5_USB2_RCV", C, 21, 1, NA, 0, 0, NA, 0, 1) -MUX_CFG("R9_USB2_VM", C, 18, 1, NA, 0, 0, NA, 0, 1) -MUX_CFG("V6_USB2_TXD", C, 27, 2, NA, 0, 0, NA, 0, 1) -MUX_CFG("W5_USB2_SE0", C, 24, 2, NA, 0, 0, NA, 0, 1) - -/* 16XX UART */ -MUX_CFG("R13_1610_UART1_TX", A, 12, 6, 2, 10, 0, 2, 10, 1) -MUX_CFG("V14_16XX_UART1_RX", 9, 18, 0, 2, 2, 0, 2, 2, 1) -MUX_CFG("R14_1610_UART1_CTS", 9, 15, 0, 2, 1, 0, 2, 1, 1) -MUX_CFG("AA15_1610_UART1_RTS", 9, 12, 1, 2, 0, 0, 2, 0, 1) -MUX_CFG("R9_16XX_UART2_RX", C, 18, 0, 3, 0, 0, 3, 0, 1) -MUX_CFG("L14_16XX_UART3_RX", 6, 3, 0, 0, 31, 0, 0, 31, 1) - -/* I2C interface */ -MUX_CFG("I2C_SCL", 7, 24, 0, NA, 0, 0, NA, 0, 0) -MUX_CFG("I2C_SDA", 7, 27, 0, NA, 0, 0, NA, 0, 0) - -/* Keypad */ -MUX_CFG("F18_1610_KBC0", 3, 15, 0, 0, 5, 1, 0, 0, 0) -MUX_CFG("D20_1610_KBC1", 3, 12, 0, 0, 4, 1, 0, 0, 0) -MUX_CFG("D19_1610_KBC2", 3, 9, 0, 0, 3, 1, 0, 0, 0) -MUX_CFG("E18_1610_KBC3", 3, 6, 0, 0, 2, 1, 0, 0, 0) -MUX_CFG("C21_1610_KBC4", 3, 3, 0, 0, 1, 1, 0, 0, 0) -MUX_CFG("G18_1610_KBR0", 4, 0, 0, 0, 10, 1, 0, 1, 0) -MUX_CFG("F19_1610_KBR1", 3, 27, 0, 0, 9, 1, 0, 1, 0) -MUX_CFG("H14_1610_KBR2", 3, 24, 0, 0, 8, 1, 0, 1, 0) -MUX_CFG("E20_1610_KBR3", 3, 21, 0, 0, 7, 1, 0, 1, 0) -MUX_CFG("E19_1610_KBR4", 3, 18, 0, 0, 6, 1, 0, 1, 0) -MUX_CFG("N19_1610_KBR5", 6, 12, 1, 1, 2, 1, 1, 1, 0) - -/* Power management */ -MUX_CFG("T20_1610_LOW_PWR", 7, 12, 1, NA, 0, 0, NA, 0, 0) - -/* MCLK Settings */ -MUX_CFG("V5_1710_MCLK_ON", B, 15, 0, NA, 0, 0, NA, 0, 0) -MUX_CFG("V5_1710_MCLK_OFF", B, 15, 6, NA, 0, 0, NA, 0, 0) -MUX_CFG("R10_1610_MCLK_ON", B, 18, 0, NA, 22, 0, NA, 1, 0) -MUX_CFG("R10_1610_MCLK_OFF", B, 18, 6, 2, 22, 1, 2, 1, 1) - -/* CompactFlash controller, conflicts with MMC1 */ -MUX_CFG("P11_1610_CF_CD2", A, 27, 3, 2, 15, 1, 2, 1, 1) -MUX_CFG("R11_1610_CF_IOIS16", B, 0, 3, 2, 16, 1, 2, 1, 1) -MUX_CFG("V10_1610_CF_IREQ", A, 24, 3, 2, 14, 0, 2, 0, 1) -MUX_CFG("W10_1610_CF_RESET", A, 18, 3, 2, 12, 1, 2, 1, 1) -MUX_CFG("W11_1610_CF_CD1", 10, 15, 3, 3, 8, 1, 3, 1, 1) -}; + /* 24xx Menelaus interrupt */ + W19_24XX_SYS_NIRQ, -#endif /* __MUX_C__ */ + /* 24xx GPIO */ + Y20_24XX_GPIO60, + M15_24XX_GPIO92, +}; #ifdef CONFIG_OMAP_MUX /* setup pin muxing in Linux */ -extern int omap_cfg_reg(reg_cfg_t reg_cfg); +extern int omap1_mux_init(void); +extern int omap2_mux_init(void); +extern int omap_mux_register(struct pin_config * pins, unsigned long size); +extern int omap_cfg_reg(unsigned long reg_cfg); #else /* boot loader does it all (no warnings from CONFIG_OMAP_MUX_WARNINGS) */ -static inline int omap_cfg_reg(reg_cfg_t reg_cfg) { return 0; } +static inline int omap1_mux_init(void) { return 0; } +static inline int omap2_mux_init(void) { return 0; } +static inline int omap_cfg_reg(unsigned long reg_cfg) { return 0; } #endif #endif diff --git a/include/asm-arm/arch-omap/omap1510.h b/include/asm-arm/arch-omap/omap1510.h index f086a3933906..c575d354850f 100644 --- a/include/asm-arm/arch-omap/omap1510.h +++ b/include/asm-arm/arch-omap/omap1510.h @@ -25,8 +25,8 @@ * 675 Mass Ave, Cambridge, MA 02139, USA. */ -#ifndef __ASM_ARCH_OMAP1510_H -#define __ASM_ARCH_OMAP1510_H +#ifndef __ASM_ARCH_OMAP15XX_H +#define __ASM_ARCH_OMAP15XX_H /* * ---------------------------------------------------------------------------- @@ -44,5 +44,5 @@ #define OMAP1510_DSPREG_SIZE SZ_128K #define OMAP1510_DSPREG_START 0xE1000000 -#endif /* __ASM_ARCH_OMAP1510_H */ +#endif /* __ASM_ARCH_OMAP15XX_H */ diff --git a/include/asm-arm/arch-omap/omap24xx.h b/include/asm-arm/arch-omap/omap24xx.h index a9105466a417..6e59805fa654 100644 --- a/include/asm-arm/arch-omap/omap24xx.h +++ b/include/asm-arm/arch-omap/omap24xx.h @@ -1,15 +1,24 @@ #ifndef __ASM_ARCH_OMAP24XX_H #define __ASM_ARCH_OMAP24XX_H -#define OMAP24XX_L4_IO_BASE 0x48000000 +/* + * Please place only base defines here and put the rest in device + * specific headers. Note also that some of these defines are needed + * for omap1 to compile without adding ifdefs. + */ + +#define L4_24XX_BASE 0x48000000 +#define L3_24XX_BASE 0x68000000 /* interrupt controller */ -#define OMAP24XX_IC_BASE (OMAP24XX_L4_IO_BASE + 0xfe000) +#define OMAP24XX_IC_BASE (L4_24XX_BASE + 0xfe000) #define VA_IC_BASE IO_ADDRESS(OMAP24XX_IC_BASE) - #define OMAP24XX_IVA_INTC_BASE 0x40000000 - #define IRQ_SIR_IRQ 0x0040 +#define OMAP24XX_32KSYNCT_BASE (L4_24XX_BASE + 0x4000) +#define OMAP24XX_PRCM_BASE (L4_24XX_BASE + 0x8000) +#define OMAP24XX_SDRC_BASE (L3_24XX_BASE + 0x9000) + #endif /* __ASM_ARCH_OMAP24XX_H */ diff --git a/include/asm-arm/arch-omap/omapfb.h b/include/asm-arm/arch-omap/omapfb.h new file mode 100644 index 000000000000..4ba2622cc142 --- /dev/null +++ b/include/asm-arm/arch-omap/omapfb.h @@ -0,0 +1,281 @@ +/* + * File: include/asm-arm/arch-omap/omapfb.h + * + * Framebuffer driver for TI OMAP boards + * + * Copyright (C) 2004 Nokia Corporation + * Author: Imre Deak <imre.deak@nokia.com> + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + */ + +#ifndef __OMAPFB_H +#define __OMAPFB_H + +/* IOCTL commands. */ + +#define OMAP_IOW(num, dtype) _IOW('O', num, dtype) +#define OMAP_IOR(num, dtype) _IOR('O', num, dtype) +#define OMAP_IOWR(num, dtype) _IOWR('O', num, dtype) +#define OMAP_IO(num) _IO('O', num) + +#define OMAPFB_MIRROR OMAP_IOW(31, int) +#define OMAPFB_SYNC_GFX OMAP_IO(37) +#define OMAPFB_VSYNC OMAP_IO(38) +#define OMAPFB_SET_UPDATE_MODE OMAP_IOW(40, enum omapfb_update_mode) +#define OMAPFB_GET_CAPS OMAP_IOR(42, unsigned long) +#define OMAPFB_GET_UPDATE_MODE OMAP_IOW(43, enum omapfb_update_mode) +#define OMAPFB_LCD_TEST OMAP_IOW(45, int) +#define OMAPFB_CTRL_TEST OMAP_IOW(46, int) +#define OMAPFB_UPDATE_WINDOW OMAP_IOW(47, struct omapfb_update_window) +#define OMAPFB_SETUP_PLANE OMAP_IOW(48, struct omapfb_setup_plane) +#define OMAPFB_ENABLE_PLANE OMAP_IOW(49, struct omapfb_enable_plane) +#define OMAPFB_SET_COLOR_KEY OMAP_IOW(50, struct omapfb_color_key) + +#define OMAPFB_CAPS_GENERIC_MASK 0x00000fff +#define OMAPFB_CAPS_LCDC_MASK 0x00fff000 +#define OMAPFB_CAPS_PANEL_MASK 0xff000000 + +#define OMAPFB_CAPS_MANUAL_UPDATE 0x00001000 +#define OMAPFB_CAPS_SET_BACKLIGHT 0x01000000 + +/* Values from DSP must map to lower 16-bits */ +#define OMAPFB_FORMAT_MASK 0x00ff +#define OMAPFB_FORMAT_FLAG_DOUBLE 0x0100 + +enum omapfb_color_format { + OMAPFB_COLOR_RGB565 = 0, + OMAPFB_COLOR_YUV422, + OMAPFB_COLOR_YUV420, + OMAPFB_COLOR_CLUT_8BPP, + OMAPFB_COLOR_CLUT_4BPP, + OMAPFB_COLOR_CLUT_2BPP, + OMAPFB_COLOR_CLUT_1BPP, +}; + +struct omapfb_update_window { + u32 x, y; + u32 width, height; + u32 format; +}; + +enum omapfb_plane { + OMAPFB_PLANE_GFX = 0, + OMAPFB_PLANE_VID1, + OMAPFB_PLANE_VID2, +}; + +enum omapfb_channel_out { + OMAPFB_CHANNEL_OUT_LCD = 0, + OMAPFB_CHANNEL_OUT_DIGIT, +}; + +struct omapfb_setup_plane { + u8 plane; + u8 channel_out; + u32 offset; + u32 pos_x, pos_y; + u32 width, height; + u32 color_mode; +}; + +struct omapfb_enable_plane { + u8 plane; + u8 enable; +}; + +enum omapfb_color_key_type { + OMAPFB_COLOR_KEY_DISABLED = 0, + OMAPFB_COLOR_KEY_GFX_DST, + OMAPFB_COLOR_KEY_VID_SRC, +}; + +struct omapfb_color_key { + u8 channel_out; + u32 background; + u32 trans_key; + u8 key_type; +}; + +enum omapfb_update_mode { + OMAPFB_UPDATE_DISABLED = 0, + OMAPFB_AUTO_UPDATE, + OMAPFB_MANUAL_UPDATE +}; + +#ifdef __KERNEL__ + +#include <linux/completion.h> +#include <linux/interrupt.h> +#include <linux/fb.h> + +#define OMAP_LCDC_INV_VSYNC 0x0001 +#define OMAP_LCDC_INV_HSYNC 0x0002 +#define OMAP_LCDC_INV_PIX_CLOCK 0x0004 +#define OMAP_LCDC_INV_OUTPUT_EN 0x0008 +#define OMAP_LCDC_HSVS_RISING_EDGE 0x0010 +#define OMAP_LCDC_HSVS_OPPOSITE 0x0020 + +#define OMAP_LCDC_SIGNAL_MASK 0x003f + +#define OMAP_LCDC_PANEL_TFT 0x0100 + +#ifdef CONFIG_ARCH_OMAP1 +#define OMAPFB_PLANE_NUM 1 +#else +#define OMAPFB_PLANE_NUM 3 +#endif + +struct omapfb_device; + +struct lcd_panel { + const char *name; + int config; /* TFT/STN, signal inversion */ + int bpp; /* Pixel format in fb mem */ + int data_lines; /* Lines on LCD HW interface */ + + int x_res, y_res; + int pixel_clock; /* In kHz */ + int hsw; /* Horizontal synchronization + pulse width */ + int hfp; /* Horizontal front porch */ + int hbp; /* Horizontal back porch */ + int vsw; /* Vertical synchronization + pulse width */ + int vfp; /* Vertical front porch */ + int vbp; /* Vertical back porch */ + int acb; /* ac-bias pin frequency */ + int pcd; /* pixel clock divider. + Obsolete use pixel_clock instead */ + + int (*init) (struct omapfb_device *fbdev); + void (*cleanup) (void); + int (*enable) (void); + void (*disable) (void); + unsigned long (*get_caps) (void); + int (*set_bklight_level)(unsigned int level); + unsigned int (*get_bklight_level)(void); + unsigned int (*get_bklight_max) (void); + int (*run_test) (int test_num); +}; + +struct omapfb_device; + +struct extif_timings { + int cs_on_time; + int cs_off_time; + int we_on_time; + int we_off_time; + int re_on_time; + int re_off_time; + int we_cycle_time; + int re_cycle_time; + int cs_pulse_width; + int access_time; +}; + +struct lcd_ctrl_extif { + int (*init) (void); + void (*cleanup) (void); + void (*set_timings) (const struct extif_timings *timings); + void (*write_command) (u32 cmd); + u32 (*read_data) (void); + void (*write_data) (u32 data); + void (*transfer_area) (int width, int height, + void (callback)(void * data), void *data); +}; + +struct lcd_ctrl { + const char *name; + void *data; + + int (*init) (struct omapfb_device *fbdev, + int ext_mode, int req_vram_size); + void (*cleanup) (void); + void (*get_vram_layout)(unsigned long *size, + void **virt_base, + dma_addr_t *phys_base); + unsigned long (*get_caps) (void); + int (*set_update_mode)(enum omapfb_update_mode mode); + enum omapfb_update_mode (*get_update_mode)(void); + int (*setup_plane) (int plane, int channel_out, + unsigned long offset, + int screen_width, + int pos_x, int pos_y, int width, + int height, int color_mode); + int (*enable_plane) (int plane, int enable); + int (*update_window) (struct omapfb_update_window *win, + void (*callback)(void *), + void *callback_data); + void (*sync) (void); + void (*suspend) (void); + void (*resume) (void); + int (*run_test) (int test_num); + int (*setcolreg) (u_int regno, u16 red, u16 green, + u16 blue, u16 transp, + int update_hw_mem); + int (*set_color_key) (struct omapfb_color_key *ck); + +}; + +enum omapfb_state { + OMAPFB_DISABLED = 0, + OMAPFB_SUSPENDED= 99, + OMAPFB_ACTIVE = 100 +}; + +struct omapfb_device { + int state; + int ext_lcdc; /* Using external + LCD controller */ + struct semaphore rqueue_sema; + + void *vram_virt_base; + dma_addr_t vram_phys_base; + unsigned long vram_size; + + int color_mode; + int palette_size; + int mirror; + u32 pseudo_palette[17]; + + struct lcd_panel *panel; /* LCD panel */ + struct lcd_ctrl *ctrl; /* LCD controller */ + struct lcd_ctrl *int_ctrl; /* internal LCD ctrl */ + struct lcd_ctrl_extif *ext_if; /* LCD ctrl external + interface */ + struct fb_info *fb_info; + + struct device *dev; +}; + +extern struct lcd_panel h3_panel; +extern struct lcd_panel h2_panel; +extern struct lcd_panel p2_panel; +extern struct lcd_panel osk_panel; +extern struct lcd_panel innovator1610_panel; +extern struct lcd_panel innovator1510_panel; + +#ifdef CONFIG_ARCH_OMAP1 +extern struct lcd_ctrl omap1_lcd_ctrl; +#else +extern struct lcd_ctrl omap2_disp_ctrl; +#endif + +extern void omapfb_write_first_pixel(struct omapfb_device *fbdev, u16 pixval); + +#endif /* __KERNEL__ */ + +#endif /* __OMAPFB_H */ diff --git a/include/asm-arm/arch-omap/pm.h b/include/asm-arm/arch-omap/pm.h index fbd742d0c499..7c790425e363 100644 --- a/include/asm-arm/arch-omap/pm.h +++ b/include/asm-arm/arch-omap/pm.h @@ -98,7 +98,14 @@ #define OMAP1610_IDLECT3 0xfffece24 #define OMAP1610_IDLE_LOOP_REQUEST 0x0400 -#if !defined(CONFIG_ARCH_OMAP1510) && \ +#define OMAP730_IDLECT1_SLEEP_VAL 0x16c7 +#define OMAP730_IDLECT2_SLEEP_VAL 0x09c7 +#define OMAP730_IDLECT3_VAL 0x3f +#define OMAP730_IDLECT3 0xfffece24 +#define OMAP730_IDLE_LOOP_REQUEST 0x0C00 + +#if !defined(CONFIG_ARCH_OMAP730) && \ + !defined(CONFIG_ARCH_OMAP15XX) && \ !defined(CONFIG_ARCH_OMAP16XX) && \ !defined(CONFIG_ARCH_OMAP24XX) #error "Power management for this processor not implemented yet" @@ -107,8 +114,10 @@ #ifndef __ASSEMBLER__ extern void omap_pm_idle(void); extern void omap_pm_suspend(void); +extern void omap730_cpu_suspend(unsigned short, unsigned short); extern void omap1510_cpu_suspend(unsigned short, unsigned short); extern void omap1610_cpu_suspend(unsigned short, unsigned short); +extern void omap730_idle_loop_suspend(void); extern void omap1510_idle_loop_suspend(void); extern void omap1610_idle_loop_suspend(void); @@ -118,6 +127,8 @@ extern void omap_serial_wake_trigger(int enable); #define omap_serial_wake_trigger(x) {} #endif /* CONFIG_OMAP_SERIAL_WAKE */ +extern unsigned int omap730_cpu_suspend_sz; +extern unsigned int omap730_idle_loop_suspend_sz; extern unsigned int omap1510_cpu_suspend_sz; extern unsigned int omap1510_idle_loop_suspend_sz; extern unsigned int omap1610_cpu_suspend_sz; @@ -131,6 +142,10 @@ extern unsigned int omap1610_idle_loop_suspend_sz; #define ULPD_RESTORE(x) omap_writew((ulpd_sleep_save[ULPD_SLEEP_SAVE_##x]), (x)) #define ULPD_SHOW(x) ulpd_sleep_save[ULPD_SLEEP_SAVE_##x] +#define MPUI730_SAVE(x) mpui730_sleep_save[MPUI730_SLEEP_SAVE_##x] = omap_readl(x) +#define MPUI730_RESTORE(x) omap_writel((mpui730_sleep_save[MPUI730_SLEEP_SAVE_##x]), (x)) +#define MPUI730_SHOW(x) mpui730_sleep_save[MPUI730_SLEEP_SAVE_##x] + #define MPUI1510_SAVE(x) mpui1510_sleep_save[MPUI1510_SLEEP_SAVE_##x] = omap_readl(x) #define MPUI1510_RESTORE(x) omap_writel((mpui1510_sleep_save[MPUI1510_SLEEP_SAVE_##x]), (x)) #define MPUI1510_SHOW(x) mpui1510_sleep_save[MPUI1510_SLEEP_SAVE_##x] @@ -188,13 +203,34 @@ enum mpui1510_save_state { MPUI1510_SLEEP_SAVE_EMIFS_CONFIG, MPUI1510_SLEEP_SAVE_OMAP_IH1_MIR, MPUI1510_SLEEP_SAVE_OMAP_IH2_MIR, -#if defined(CONFIG_ARCH_OMAP1510) +#if defined(CONFIG_ARCH_OMAP15XX) MPUI1510_SLEEP_SAVE_SIZE #else MPUI1510_SLEEP_SAVE_SIZE = 0 #endif }; +enum mpui730_save_state { + MPUI730_SLEEP_SAVE_START = 0, + /* + * MPUI registers 32 bits + */ + MPUI730_SLEEP_SAVE_MPUI_CTRL, + MPUI730_SLEEP_SAVE_MPUI_DSP_BOOT_CONFIG, + MPUI730_SLEEP_SAVE_MPUI_DSP_API_CONFIG, + MPUI730_SLEEP_SAVE_MPUI_DSP_STATUS, + MPUI730_SLEEP_SAVE_EMIFF_SDRAM_CONFIG, + MPUI730_SLEEP_SAVE_EMIFS_CONFIG, + MPUI730_SLEEP_SAVE_OMAP_IH1_MIR, + MPUI730_SLEEP_SAVE_OMAP_IH2_0_MIR, + MPUI730_SLEEP_SAVE_OMAP_IH2_1_MIR, +#if defined(CONFIG_ARCH_OMAP730) + MPUI730_SLEEP_SAVE_SIZE +#else + MPUI730_SLEEP_SAVE_SIZE = 0 +#endif +}; + enum mpui1610_save_state { MPUI1610_SLEEP_SAVE_START = 0, /* diff --git a/include/asm-arm/arch-omap/prcm.h b/include/asm-arm/arch-omap/prcm.h new file mode 100644 index 000000000000..7b48a5cbb15f --- /dev/null +++ b/include/asm-arm/arch-omap/prcm.h @@ -0,0 +1,429 @@ +/* + * prcm.h - Access definations for use in OMAP24XX clock and power management + * + * Copyright (C) 2005 Texas Instruments, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#ifndef __ASM_ARM_ARCH_DPM_PRCM_H +#define __ASM_ARM_ARCH_DPM_PRCM_H + +/* SET_PERFORMANCE_LEVEL PARAMETERS */ +#define PRCM_HALF_SPEED 1 +#define PRCM_FULL_SPEED 2 + +#ifndef __ASSEMBLER__ + +#define PRCM_REG32(offset) __REG32(OMAP24XX_PRCM_BASE + (offset)) + +#define PRCM_REVISION PRCM_REG32(0x000) +#define PRCM_SYSCONFIG PRCM_REG32(0x010) +#define PRCM_IRQSTATUS_MPU PRCM_REG32(0x018) +#define PRCM_IRQENABLE_MPU PRCM_REG32(0x01C) +#define PRCM_VOLTCTRL PRCM_REG32(0x050) +#define PRCM_VOLTST PRCM_REG32(0x054) +#define PRCM_CLKSRC_CTRL PRCM_REG32(0x060) +#define PRCM_CLKOUT_CTRL PRCM_REG32(0x070) +#define PRCM_CLKEMUL_CTRL PRCM_REG32(0x078) +#define PRCM_CLKCFG_CTRL PRCM_REG32(0x080) +#define PRCM_CLKCFG_STATUS PRCM_REG32(0x084) +#define PRCM_VOLTSETUP PRCM_REG32(0x090) +#define PRCM_CLKSSETUP PRCM_REG32(0x094) +#define PRCM_POLCTRL PRCM_REG32(0x098) + +/* GENERAL PURPOSE */ +#define GENERAL_PURPOSE1 PRCM_REG32(0x0B0) +#define GENERAL_PURPOSE2 PRCM_REG32(0x0B4) +#define GENERAL_PURPOSE3 PRCM_REG32(0x0B8) +#define GENERAL_PURPOSE4 PRCM_REG32(0x0BC) +#define GENERAL_PURPOSE5 PRCM_REG32(0x0C0) +#define GENERAL_PURPOSE6 PRCM_REG32(0x0C4) +#define GENERAL_PURPOSE7 PRCM_REG32(0x0C8) +#define GENERAL_PURPOSE8 PRCM_REG32(0x0CC) +#define GENERAL_PURPOSE9 PRCM_REG32(0x0D0) +#define GENERAL_PURPOSE10 PRCM_REG32(0x0D4) +#define GENERAL_PURPOSE11 PRCM_REG32(0x0D8) +#define GENERAL_PURPOSE12 PRCM_REG32(0x0DC) +#define GENERAL_PURPOSE13 PRCM_REG32(0x0E0) +#define GENERAL_PURPOSE14 PRCM_REG32(0x0E4) +#define GENERAL_PURPOSE15 PRCM_REG32(0x0E8) +#define GENERAL_PURPOSE16 PRCM_REG32(0x0EC) +#define GENERAL_PURPOSE17 PRCM_REG32(0x0F0) +#define GENERAL_PURPOSE18 PRCM_REG32(0x0F4) +#define GENERAL_PURPOSE19 PRCM_REG32(0x0F8) +#define GENERAL_PURPOSE20 PRCM_REG32(0x0FC) + +/* MPU */ +#define CM_CLKSEL_MPU PRCM_REG32(0x140) +#define CM_CLKSTCTRL_MPU PRCM_REG32(0x148) +#define RM_RSTST_MPU PRCM_REG32(0x158) +#define PM_WKDEP_MPU PRCM_REG32(0x1C8) +#define PM_EVGENCTRL_MPU PRCM_REG32(0x1D4) +#define PM_EVEGENONTIM_MPU PRCM_REG32(0x1D8) +#define PM_EVEGENOFFTIM_MPU PRCM_REG32(0x1DC) +#define PM_PWSTCTRL_MPU PRCM_REG32(0x1E0) +#define PM_PWSTST_MPU PRCM_REG32(0x1E4) + +/* CORE */ +#define CM_FCLKEN1_CORE PRCM_REG32(0x200) +#define CM_FCLKEN2_CORE PRCM_REG32(0x204) +#define CM_FCLKEN3_CORE PRCM_REG32(0x208) +#define CM_ICLKEN1_CORE PRCM_REG32(0x210) +#define CM_ICLKEN2_CORE PRCM_REG32(0x214) +#define CM_ICLKEN3_CORE PRCM_REG32(0x218) +#define CM_ICLKEN4_CORE PRCM_REG32(0x21C) +#define CM_IDLEST1_CORE PRCM_REG32(0x220) +#define CM_IDLEST2_CORE PRCM_REG32(0x224) +#define CM_IDLEST3_CORE PRCM_REG32(0x228) +#define CM_IDLEST4_CORE PRCM_REG32(0x22C) +#define CM_AUTOIDLE1_CORE PRCM_REG32(0x230) +#define CM_AUTOIDLE2_CORE PRCM_REG32(0x234) +#define CM_AUTOIDLE3_CORE PRCM_REG32(0x238) +#define CM_AUTOIDLE4_CORE PRCM_REG32(0x23C) +#define CM_CLKSEL1_CORE PRCM_REG32(0x240) +#define CM_CLKSEL2_CORE PRCM_REG32(0x244) +#define CM_CLKSTCTRL_CORE PRCM_REG32(0x248) +#define PM_WKEN1_CORE PRCM_REG32(0x2A0) +#define PM_WKEN2_CORE PRCM_REG32(0x2A4) +#define PM_WKST1_CORE PRCM_REG32(0x2B0) +#define PM_WKST2_CORE PRCM_REG32(0x2B4) +#define PM_WKDEP_CORE PRCM_REG32(0x2C8) +#define PM_PWSTCTRL_CORE PRCM_REG32(0x2E0) +#define PM_PWSTST_CORE PRCM_REG32(0x2E4) + +/* GFX */ +#define CM_FCLKEN_GFX PRCM_REG32(0x300) +#define CM_ICLKEN_GFX PRCM_REG32(0x310) +#define CM_IDLEST_GFX PRCM_REG32(0x320) +#define CM_CLKSEL_GFX PRCM_REG32(0x340) +#define CM_CLKSTCTRL_GFX PRCM_REG32(0x348) +#define RM_RSTCTRL_GFX PRCM_REG32(0x350) +#define RM_RSTST_GFX PRCM_REG32(0x358) +#define PM_WKDEP_GFX PRCM_REG32(0x3C8) +#define PM_PWSTCTRL_GFX PRCM_REG32(0x3E0) +#define PM_PWSTST_GFX PRCM_REG32(0x3E4) + +/* WAKE-UP */ +#define CM_FCLKEN_WKUP PRCM_REG32(0x400) +#define CM_ICLKEN_WKUP PRCM_REG32(0x410) +#define CM_IDLEST_WKUP PRCM_REG32(0x420) +#define CM_AUTOIDLE_WKUP PRCM_REG32(0x430) +#define CM_CLKSEL_WKUP PRCM_REG32(0x440) +#define RM_RSTCTRL_WKUP PRCM_REG32(0x450) +#define RM_RSTTIME_WKUP PRCM_REG32(0x454) +#define RM_RSTST_WKUP PRCM_REG32(0x458) +#define PM_WKEN_WKUP PRCM_REG32(0x4A0) +#define PM_WKST_WKUP PRCM_REG32(0x4B0) + +/* CLOCKS */ +#define CM_CLKEN_PLL PRCM_REG32(0x500) +#define CM_IDLEST_CKGEN PRCM_REG32(0x520) +#define CM_AUTOIDLE_PLL PRCM_REG32(0x530) +#define CM_CLKSEL1_PLL PRCM_REG32(0x540) +#define CM_CLKSEL2_PLL PRCM_REG32(0x544) + +/* DSP */ +#define CM_FCLKEN_DSP PRCM_REG32(0x800) +#define CM_ICLKEN_DSP PRCM_REG32(0x810) +#define CM_IDLEST_DSP PRCM_REG32(0x820) +#define CM_AUTOIDLE_DSP PRCM_REG32(0x830) +#define CM_CLKSEL_DSP PRCM_REG32(0x840) +#define CM_CLKSTCTRL_DSP PRCM_REG32(0x848) +#define RM_RSTCTRL_DSP PRCM_REG32(0x850) +#define RM_RSTST_DSP PRCM_REG32(0x858) +#define PM_WKEN_DSP PRCM_REG32(0x8A0) +#define PM_WKDEP_DSP PRCM_REG32(0x8C8) +#define PM_PWSTCTRL_DSP PRCM_REG32(0x8E0) +#define PM_PWSTST_DSP PRCM_REG32(0x8E4) +#define PRCM_IRQSTATUS_DSP PRCM_REG32(0x8F0) +#define PRCM_IRQENABLE_DSP PRCM_REG32(0x8F4) + +/* IVA */ +#define PRCM_IRQSTATUS_IVA PRCM_REG32(0x8F8) +#define PRCM_IRQENABLE_IVA PRCM_REG32(0x8FC) + +/* Modem on 2430 */ +#define CM_FCLKEN_MDM PRCM_REG32(0xC00) +#define CM_ICLKEN_MDM PRCM_REG32(0xC10) +#define CM_IDLEST_MDM PRCM_REG32(0xC20) +#define CM_CLKSEL_MDM PRCM_REG32(0xC40) + +/* FIXME: Move to header for 2430 */ +#define DISP_BASE (OMAP24XX_L4_IO_BASE+0x50000) +#define DISP_REG32(offset) __REG32(DISP_BASE + (offset)) + +#define OMAP24XX_GPMC_BASE (L3_24XX_BASE + 0xa000) +#define GPMC_BASE (OMAP24XX_GPMC_BASE) +#define GPMC_REG32(offset) __REG32(GPMC_BASE + (offset)) + +#define GPT1_BASE (OMAP24XX_GPT1) +#define GPT1_REG32(offset) __REG32(GPT1_BASE + (offset)) + +/* Misc sysconfig */ +#define DISPC_SYSCONFIG DISP_REG32(0x410) +#define SPI_BASE (OMAP24XX_L4_IO_BASE+0x98000) +#define MCSPI1_SYSCONFIG __REG32(SPI_BASE + 0x10) +#define MCSPI2_SYSCONFIG __REG32(SPI_BASE+0x2000 + 0x10) + +//#define DSP_MMU_SYSCONFIG 0x5A000010 +#define CAMERA_MMU_SYSCONFIG __REG32(DISP_BASE+0x2C10) +//#define IVA_MMU_SYSCONFIG 0x5D000010 +//#define DSP_DMA_SYSCONFIG 0x00FCC02C +#define CAMERA_DMA_SYSCONFIG __REG32(DISP_BASE+0x282C) +#define SYSTEM_DMA_SYSCONFIG __REG32(DISP_BASE+0x602C) +#define GPMC_SYSCONFIG GPMC_REG32(0x010) +#define MAILBOXES_SYSCONFIG __REG32(OMAP24XX_L4_IO_BASE+0x94010) +#define UART1_SYSCONFIG __REG32(OMAP24XX_L4_IO_BASE+0x6A054) +#define UART2_SYSCONFIG __REG32(OMAP24XX_L4_IO_BASE+0x6C054) +#define UART3_SYSCONFIG __REG32(OMAP24XX_L4_IO_BASE+0x6E054) +//#define IVA_SYSCONFIG 0x5C060010 +#define SDRC_SYSCONFIG __REG32(OMAP24XX_SDRC_BASE+0x10) +#define SMS_SYSCONFIG __REG32(OMAP24XX_SMS_BASE+0x10) +#define SSI_SYSCONFIG __REG32(DISP_BASE+0x8010) +//#define VLYNQ_SYSCONFIG 0x67FFFE10 + +/* rkw - good cannidates for PM_ to start what nm was trying */ +#define OMAP24XX_GPT2 (OMAP24XX_L4_IO_BASE+0x2A000) +#define OMAP24XX_GPT3 (OMAP24XX_L4_IO_BASE+0x78000) +#define OMAP24XX_GPT4 (OMAP24XX_L4_IO_BASE+0x7A000) +#define OMAP24XX_GPT5 (OMAP24XX_L4_IO_BASE+0x7C000) +#define OMAP24XX_GPT6 (OMAP24XX_L4_IO_BASE+0x7E000) +#define OMAP24XX_GPT7 (OMAP24XX_L4_IO_BASE+0x80000) +#define OMAP24XX_GPT8 (OMAP24XX_L4_IO_BASE+0x82000) +#define OMAP24XX_GPT9 (OMAP24XX_L4_IO_BASE+0x84000) +#define OMAP24XX_GPT10 (OMAP24XX_L4_IO_BASE+0x86000) +#define OMAP24XX_GPT11 (OMAP24XX_L4_IO_BASE+0x88000) +#define OMAP24XX_GPT12 (OMAP24XX_L4_IO_BASE+0x8A000) + +#define GPTIMER1_SYSCONFIG GPT1_REG32(0x010) +#define GPTIMER2_SYSCONFIG __REG32(OMAP24XX_GPT2 + 0x10) +#define GPTIMER3_SYSCONFIG __REG32(OMAP24XX_GPT3 + 0x10) +#define GPTIMER4_SYSCONFIG __REG32(OMAP24XX_GPT4 + 0x10) +#define GPTIMER5_SYSCONFIG __REG32(OMAP24XX_GPT5 + 0x10) +#define GPTIMER6_SYSCONFIG __REG32(OMAP24XX_GPT6 + 0x10) +#define GPTIMER7_SYSCONFIG __REG32(OMAP24XX_GPT7 + 0x10) +#define GPTIMER8_SYSCONFIG __REG32(OMAP24XX_GPT8 + 0x10) +#define GPTIMER9_SYSCONFIG __REG32(OMAP24XX_GPT9 + 0x10) +#define GPTIMER10_SYSCONFIG __REG32(OMAP24XX_GPT10 + 0x10) +#define GPTIMER11_SYSCONFIG __REG32(OMAP24XX_GPT11 + 0x10) +#define GPTIMER12_SYSCONFIG __REG32(OMAP24XX_GPT12 + 0x10) + +#define GPIOX_BASE(X) (OMAP24XX_GPIO_BASE+(0x2000*((X)-1))) + +#define GPIO1_SYSCONFIG __REG32((GPIOX_BASE(1)+0x10)) +#define GPIO2_SYSCONFIG __REG32((GPIOX_BASE(2)+0x10)) +#define GPIO3_SYSCONFIG __REG32((GPIOX_BASE(3)+0x10)) +#define GPIO4_SYSCONFIG __REG32((GPIOX_BASE(4)+0x10)) + +/* GP TIMER 1 */ +#define GPTIMER1_TISTAT GPT1_REG32(0x014) +#define GPTIMER1_TISR GPT1_REG32(0x018) +#define GPTIMER1_TIER GPT1_REG32(0x01C) +#define GPTIMER1_TWER GPT1_REG32(0x020) +#define GPTIMER1_TCLR GPT1_REG32(0x024) +#define GPTIMER1_TCRR GPT1_REG32(0x028) +#define GPTIMER1_TLDR GPT1_REG32(0x02C) +#define GPTIMER1_TTGR GPT1_REG32(0x030) +#define GPTIMER1_TWPS GPT1_REG32(0x034) +#define GPTIMER1_TMAR GPT1_REG32(0x038) +#define GPTIMER1_TCAR1 GPT1_REG32(0x03C) +#define GPTIMER1_TSICR GPT1_REG32(0x040) +#define GPTIMER1_TCAR2 GPT1_REG32(0x044) + +/* rkw -- base fix up please... */ +#define GPTIMER3_TISR __REG32(OMAP24XX_L4_IO_BASE+0x78018) + +/* SDRC */ +#define SDRC_DLLA_CTRL __REG32(OMAP24XX_SDRC_BASE+0x060) +#define SDRC_DLLA_STATUS __REG32(OMAP24XX_SDRC_BASE+0x064) +#define SDRC_DLLB_CTRL __REG32(OMAP24XX_SDRC_BASE+0x068) +#define SDRC_DLLB_STATUS __REG32(OMAP24XX_SDRC_BASE+0x06C) +#define SDRC_POWER __REG32(OMAP24XX_SDRC_BASE+0x070) +#define SDRC_MR_0 __REG32(OMAP24XX_SDRC_BASE+0x084) + +/* GPIO 1 */ +#define GPIO1_BASE GPIOX_BASE(1) +#define GPIO1_REG32(offset) __REG32(GPIO1_BASE + (offset)) +#define GPIO1_IRQENABLE1 GPIO1_REG32(0x01C) +#define GPIO1_IRQSTATUS1 GPIO1_REG32(0x018) +#define GPIO1_IRQENABLE2 GPIO1_REG32(0x02C) +#define GPIO1_IRQSTATUS2 GPIO1_REG32(0x028) +#define GPIO1_WAKEUPENABLE GPIO1_REG32(0x020) +#define GPIO1_RISINGDETECT GPIO1_REG32(0x048) +#define GPIO1_DATAIN GPIO1_REG32(0x038) +#define GPIO1_OE GPIO1_REG32(0x034) +#define GPIO1_DATAOUT GPIO1_REG32(0x03C) + +/* GPIO2 */ +#define GPIO2_BASE GPIOX_BASE(2) +#define GPIO2_REG32(offset) __REG32(GPIO2_BASE + (offset)) +#define GPIO2_IRQENABLE1 GPIO2_REG32(0x01C) +#define GPIO2_IRQSTATUS1 GPIO2_REG32(0x018) +#define GPIO2_IRQENABLE2 GPIO2_REG32(0x02C) +#define GPIO2_IRQSTATUS2 GPIO2_REG32(0x028) +#define GPIO2_WAKEUPENABLE GPIO2_REG32(0x020) +#define GPIO2_RISINGDETECT GPIO2_REG32(0x048) +#define GPIO2_DATAIN GPIO2_REG32(0x038) +#define GPIO2_OE GPIO2_REG32(0x034) +#define GPIO2_DATAOUT GPIO2_REG32(0x03C) + +/* GPIO 3 */ +#define GPIO3_BASE GPIOX_BASE(3) +#define GPIO3_REG32(offset) __REG32(GPIO3_BASE + (offset)) +#define GPIO3_IRQENABLE1 GPIO3_REG32(0x01C) +#define GPIO3_IRQSTATUS1 GPIO3_REG32(0x018) +#define GPIO3_IRQENABLE2 GPIO3_REG32(0x02C) +#define GPIO3_IRQSTATUS2 GPIO3_REG32(0x028) +#define GPIO3_WAKEUPENABLE GPIO3_REG32(0x020) +#define GPIO3_RISINGDETECT GPIO3_REG32(0x048) +#define GPIO3_FALLINGDETECT GPIO3_REG32(0x04C) +#define GPIO3_DATAIN GPIO3_REG32(0x038) +#define GPIO3_OE GPIO3_REG32(0x034) +#define GPIO3_DATAOUT GPIO3_REG32(0x03C) +#define GPIO3_DEBOUNCENABLE GPIO3_REG32(0x050) +#define GPIO3_DEBOUNCINGTIME GPIO3_REG32(0x054) + +/* GPIO 4 */ +#define GPIO4_BASE GPIOX_BASE(4) +#define GPIO4_REG32(offset) __REG32(GPIO4_BASE + (offset)) +#define GPIO4_IRQENABLE1 GPIO4_REG32(0x01C) +#define GPIO4_IRQSTATUS1 GPIO4_REG32(0x018) +#define GPIO4_IRQENABLE2 GPIO4_REG32(0x02C) +#define GPIO4_IRQSTATUS2 GPIO4_REG32(0x028) +#define GPIO4_WAKEUPENABLE GPIO4_REG32(0x020) +#define GPIO4_RISINGDETECT GPIO4_REG32(0x048) +#define GPIO4_FALLINGDETECT GPIO4_REG32(0x04C) +#define GPIO4_DATAIN GPIO4_REG32(0x038) +#define GPIO4_OE GPIO4_REG32(0x034) +#define GPIO4_DATAOUT GPIO4_REG32(0x03C) +#define GPIO4_DEBOUNCENABLE GPIO4_REG32(0x050) +#define GPIO4_DEBOUNCINGTIME GPIO4_REG32(0x054) + + +/* IO CONFIG */ +#define CONTROL_BASE (OMAP24XX_CTRL_BASE) +#define CONTROL_REG32(offset) __REG32(CONTROL_BASE + (offset)) + +#define CONTROL_PADCONF_SPI1_NCS2 CONTROL_REG32(0x104) +#define CONTROL_PADCONF_SYS_XTALOUT CONTROL_REG32(0x134) +#define CONTROL_PADCONF_UART1_RX CONTROL_REG32(0x0C8) +#define CONTROL_PADCONF_MCBSP1_DX CONTROL_REG32(0x10C) +#define CONTROL_PADCONF_GPMC_NCS4 CONTROL_REG32(0x090) +#define CONTROL_PADCONF_DSS_D5 CONTROL_REG32(0x0B8) +#define CONTROL_PADCONF_DSS_D9 CONTROL_REG32(0x0BC) +#define CONTROL_PADCONF_DSS_D13 CONTROL_REG32(0x0C0) +#define CONTROL_PADCONF_DSS_VSYNC CONTROL_REG32(0x0CC) + +/* CONTROL */ +#define CONTROL_DEVCONF CONTROL_REG32(0x274) + +/* INTERRUPT CONTROLLER */ +#define INTC_BASE (OMAP24XX_L4_IO_BASE+0xfe000) +#define INTC_REG32(offset) __REG32(INTC_BASE + (offset)) + +#define INTC1_U_BASE INTC_REG32(0x000) +#define INTC_MIR0 INTC_REG32(0x084) +#define INTC_MIR_SET0 INTC_REG32(0x08C) +#define INTC_MIR_CLEAR0 INTC_REG32(0x088) +#define INTC_ISR_CLEAR0 INTC_REG32(0x094) +#define INTC_MIR1 INTC_REG32(0x0A4) +#define INTC_MIR_SET1 INTC_REG32(0x0AC) +#define INTC_MIR_CLEAR1 INTC_REG32(0x0A8) +#define INTC_ISR_CLEAR1 INTC_REG32(0x0B4) +#define INTC_MIR2 INTC_REG32(0x0C4) +#define INTC_MIR_SET2 INTC_REG32(0x0CC) +#define INTC_MIR_CLEAR2 INTC_REG32(0x0C8) +#define INTC_ISR_CLEAR2 INTC_REG32(0x0D4) +#define INTC_SIR_IRQ INTC_REG32(0x040) +#define INTC_CONTROL INTC_REG32(0x048) +#define INTC_ILR11 INTC_REG32(0x12C) +#define INTC_ILR32 INTC_REG32(0x180) +#define INTC_ILR37 INTC_REG32(0x194) +#define INTC_SYSCONFIG INTC_REG32(0x010) + +/* RAM FIREWALL */ +#define RAMFW_BASE (0x68005000) +#define RAMFW_REG32(offset) __REG32(RAMFW_BASE + (offset)) + +#define RAMFW_REQINFOPERM0 RAMFW_REG32(0x048) +#define RAMFW_READPERM0 RAMFW_REG32(0x050) +#define RAMFW_WRITEPERM0 RAMFW_REG32(0x058) + +/* GPMC CS1 FPGA ON USER INTERFACE MODULE */ +//#define DEBUG_BOARD_LED_REGISTER 0x04000014 + +/* GPMC CS0 */ +#define GPMC_CONFIG1_0 GPMC_REG32(0x060) +#define GPMC_CONFIG2_0 GPMC_REG32(0x064) +#define GPMC_CONFIG3_0 GPMC_REG32(0x068) +#define GPMC_CONFIG4_0 GPMC_REG32(0x06C) +#define GPMC_CONFIG5_0 GPMC_REG32(0x070) +#define GPMC_CONFIG6_0 GPMC_REG32(0x074) +#define GPMC_CONFIG7_0 GPMC_REG32(0x078) + +/* GPMC CS1 */ +#define GPMC_CONFIG1_1 GPMC_REG32(0x090) +#define GPMC_CONFIG2_1 GPMC_REG32(0x094) +#define GPMC_CONFIG3_1 GPMC_REG32(0x098) +#define GPMC_CONFIG4_1 GPMC_REG32(0x09C) +#define GPMC_CONFIG5_1 GPMC_REG32(0x0a0) +#define GPMC_CONFIG6_1 GPMC_REG32(0x0a4) +#define GPMC_CONFIG7_1 GPMC_REG32(0x0a8) + +/* DSS */ +#define DSS_CONTROL DISP_REG32(0x040) +#define DISPC_CONTROL DISP_REG32(0x440) +#define DISPC_SYSSTATUS DISP_REG32(0x414) +#define DISPC_IRQSTATUS DISP_REG32(0x418) +#define DISPC_IRQENABLE DISP_REG32(0x41C) +#define DISPC_CONFIG DISP_REG32(0x444) +#define DISPC_DEFAULT_COLOR0 DISP_REG32(0x44C) +#define DISPC_DEFAULT_COLOR1 DISP_REG32(0x450) +#define DISPC_TRANS_COLOR0 DISP_REG32(0x454) +#define DISPC_TRANS_COLOR1 DISP_REG32(0x458) +#define DISPC_LINE_NUMBER DISP_REG32(0x460) +#define DISPC_TIMING_H DISP_REG32(0x464) +#define DISPC_TIMING_V DISP_REG32(0x468) +#define DISPC_POL_FREQ DISP_REG32(0x46C) +#define DISPC_DIVISOR DISP_REG32(0x470) +#define DISPC_SIZE_DIG DISP_REG32(0x478) +#define DISPC_SIZE_LCD DISP_REG32(0x47C) +#define DISPC_GFX_BA0 DISP_REG32(0x480) +#define DISPC_GFX_BA1 DISP_REG32(0x484) +#define DISPC_GFX_POSITION DISP_REG32(0x488) +#define DISPC_GFX_SIZE DISP_REG32(0x48C) +#define DISPC_GFX_ATTRIBUTES DISP_REG32(0x4A0) +#define DISPC_GFX_FIFO_THRESHOLD DISP_REG32(0x4A4) +#define DISPC_GFX_ROW_INC DISP_REG32(0x4AC) +#define DISPC_GFX_PIXEL_INC DISP_REG32(0x4B0) +#define DISPC_GFX_WINDOW_SKIP DISP_REG32(0x4B4) +#define DISPC_GFX_TABLE_BA DISP_REG32(0x4B8) +#define DISPC_DATA_CYCLE1 DISP_REG32(0x5D4) +#define DISPC_DATA_CYCLE2 DISP_REG32(0x5D8) +#define DISPC_DATA_CYCLE3 DISP_REG32(0x5DC) + +/* Wake up define for board */ +#define GPIO97 (1 << 1) +#define GPIO88 (1 << 24) + +#endif /* __ASSEMBLER__ */ + +#endif + + + + + diff --git a/include/asm-arm/arch-omap/sram.h b/include/asm-arm/arch-omap/sram.h new file mode 100644 index 000000000000..e72ccbf0fe06 --- /dev/null +++ b/include/asm-arm/arch-omap/sram.h @@ -0,0 +1,38 @@ +/* + * linux/include/asm-arm/arch-omap/sram.h + * + * Interface for functions that need to be run in internal SRAM + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __ARCH_ARM_OMAP_SRAM_H +#define __ARCH_ARM_OMAP_SRAM_H + +extern void * omap_sram_push(void * start, unsigned long size); +extern void omap_sram_reprogram_clock(u32 dpllctl, u32 ckctl); + +extern void omap2_sram_ddr_init(u32 *slow_dll_ctrl, u32 fast_dll_ctrl, + u32 base_cs, u32 force_unlock); +extern void omap2_sram_reprogram_sdrc(u32 perf_level, u32 dll_val, + u32 mem_type); +extern u32 omap2_set_prcm(u32 dpll_ctrl_val, u32 sdrc_rfr_val, int bypass); + + +/* Do not use these */ +extern void sram_reprogram_clock(u32 ckctl, u32 dpllctl); +extern unsigned long sram_reprogram_clock_sz; + +extern void sram_ddr_init(u32 *slow_dll_ctrl, u32 fast_dll_ctrl, + u32 base_cs, u32 force_unlock); +extern unsigned long sram_ddr_init_sz; + +extern u32 sram_set_prcm(u32 dpll_ctrl_val, u32 sdrc_rfr_val, int bypass); +extern unsigned long sram_set_prcm_sz; + +extern void sram_reprogram_sdrc(u32 perf_level, u32 dll_val, u32 mem_type); +extern unsigned long sram_reprogram_sdrc_sz; + +#endif diff --git a/include/asm-arm/arch-omap/system.h b/include/asm-arm/arch-omap/system.h index ff37bc27e603..9af415d2944a 100644 --- a/include/asm-arm/arch-omap/system.h +++ b/include/asm-arm/arch-omap/system.h @@ -6,18 +6,21 @@ #define __ASM_ARCH_SYSTEM_H #include <linux/config.h> #include <asm/mach-types.h> -#include <asm/arch/hardware.h> -#include <asm/mach-types.h> +#include <asm/hardware/clock.h> +#include <asm/hardware.h> +#include <asm/arch/prcm.h> + +#ifndef CONFIG_MACH_VOICEBLUE +#define voiceblue_reset() do {} while (0) +#endif static inline void arch_idle(void) { cpu_do_idle(); } -static inline void arch_reset(char mode) +static inline void omap1_arch_reset(char mode) { - -#ifdef CONFIG_ARCH_OMAP16XX /* * Workaround for 5912/1611b bug mentioned in sprz209d.pdf p. 28 * "Global Software Reset Affects Traffic Controller Frequency". @@ -27,13 +30,31 @@ static inline void arch_reset(char mode) DPLL_CTL); omap_writew(0x8, ARM_RSTCT1); } -#endif -#ifdef CONFIG_MACH_VOICEBLUE + if (machine_is_voiceblue()) voiceblue_reset(); else -#endif omap_writew(1, ARM_RSTCT1); } +static inline void omap2_arch_reset(char mode) +{ + u32 rate; + struct clk *vclk, *sclk; + + vclk = clk_get(NULL, "virt_prcm_set"); + sclk = clk_get(NULL, "sys_ck"); + rate = clk_get_rate(sclk); + clk_set_rate(vclk, rate); /* go to bypass for OMAP limitation */ + RM_RSTCTRL_WKUP |= 2; +} + +static inline void arch_reset(char mode) +{ + if (!cpu_is_omap24xx()) + omap1_arch_reset(mode); + else + omap2_arch_reset(mode); +} + #endif diff --git a/include/asm-arm/arch-omap/timex.h b/include/asm-arm/arch-omap/timex.h index b61ddb491e83..21f2e367185a 100644 --- a/include/asm-arm/arch-omap/timex.h +++ b/include/asm-arm/arch-omap/timex.h @@ -28,6 +28,14 @@ #if !defined(__ASM_ARCH_OMAP_TIMEX_H) #define __ASM_ARCH_OMAP_TIMEX_H +/* + * OMAP 32KHz timer updates time one jiffie at a time from a secondary timer, + * and that's why the CLOCK_TICK_RATE is not 32768. + */ +#ifdef CONFIG_OMAP_32K_TIMER +#define CLOCK_TICK_RATE (CONFIG_OMAP_32K_TIMER_HZ) +#else #define CLOCK_TICK_RATE (HZ * 100000UL) +#endif #endif /* __ASM_ARCH_OMAP_TIMEX_H */ diff --git a/include/asm-arm/arch-omap/uncompress.h b/include/asm-arm/arch-omap/uncompress.h index 3545c86859cc..c718264affbd 100644 --- a/include/asm-arm/arch-omap/uncompress.h +++ b/include/asm-arm/arch-omap/uncompress.h @@ -36,10 +36,14 @@ putstr(const char *s) volatile u8 * uart = 0; int shift = 2; +#ifdef CONFIG_MACH_OMAP_PALMTE + return; +#endif + #ifdef CONFIG_ARCH_OMAP #ifdef CONFIG_OMAP_LL_DEBUG_UART3 uart = (volatile u8 *)(OMAP_UART3_BASE); -#elif CONFIG_OMAP_LL_DEBUG_UART2 +#elif defined(CONFIG_OMAP_LL_DEBUG_UART2) uart = (volatile u8 *)(OMAP_UART2_BASE); #else uart = (volatile u8 *)(OMAP_UART1_BASE); diff --git a/include/asm-arm/arch-pxa/akita.h b/include/asm-arm/arch-pxa/akita.h index 4a1fbcfccc39..5d8cc1d9cb10 100644 --- a/include/asm-arm/arch-pxa/akita.h +++ b/include/asm-arm/arch-pxa/akita.h @@ -25,6 +25,8 @@ /* Default Values */ #define AKITA_IOEXP_IO_OUT (AKITA_IOEXP_IR_ON | AKITA_IOEXP_AKIN_PULLUP) +extern struct platform_device akitaioexp_device; + void akita_set_ioexp(struct device *dev, unsigned char bitmask); void akita_reset_ioexp(struct device *dev, unsigned char bitmask); diff --git a/include/asm-arm/arch-pxa/hardware.h b/include/asm-arm/arch-pxa/hardware.h index cf35721cfa45..3e70bd95472c 100644 --- a/include/asm-arm/arch-pxa/hardware.h +++ b/include/asm-arm/arch-pxa/hardware.h @@ -44,12 +44,12 @@ #ifndef __ASSEMBLY__ -# define __REG(x) (*((volatile unsigned long *)io_p2v(x))) +# define __REG(x) (*((volatile u32 *)io_p2v(x))) /* With indexed regs we don't want to feed the index through io_p2v() especially if it is a variable, otherwise horrible code will result. */ # define __REG2(x,y) \ - (*(volatile unsigned long *)((unsigned long)&__REG(x) + (y))) + (*(volatile u32 *)((u32)&__REG(x) + (y))) # define __PREG(x) (io_v2p((u32)&(x))) diff --git a/include/asm-arm/arch-pxa/io.h b/include/asm-arm/arch-pxa/io.h index c3bdbe44e21f..eb2dd58d397f 100644 --- a/include/asm-arm/arch-pxa/io.h +++ b/include/asm-arm/arch-pxa/io.h @@ -6,6 +6,8 @@ #ifndef __ASM_ARM_ARCH_IO_H #define __ASM_ARM_ARCH_IO_H +#include <asm/hardware.h> + #define IO_SPACE_LIMIT 0xffffffff /* diff --git a/include/asm-arm/arch-pxa/irda.h b/include/asm-arm/arch-pxa/irda.h new file mode 100644 index 000000000000..748406f384c2 --- /dev/null +++ b/include/asm-arm/arch-pxa/irda.h @@ -0,0 +1,17 @@ +#ifndef ASMARM_ARCH_IRDA_H +#define ASMARM_ARCH_IRDA_H + +/* board specific transceiver capabilities */ + +#define IR_OFF 1 +#define IR_SIRMODE 2 +#define IR_FIRMODE 4 + +struct pxaficp_platform_data { + int transceiver_cap; + void (*transceiver_mode)(struct device *dev, int mode); +}; + +extern void pxa_set_ficp_info(struct pxaficp_platform_data *info); + +#endif diff --git a/include/asm-arm/arch-pxa/memory.h b/include/asm-arm/arch-pxa/memory.h index 58bad9748b5c..eaf6d43939e9 100644 --- a/include/asm-arm/arch-pxa/memory.h +++ b/include/asm-arm/arch-pxa/memory.h @@ -15,7 +15,7 @@ /* * Physical DRAM offset. */ -#define PHYS_OFFSET (0xa0000000UL) +#define PHYS_OFFSET UL(0xa0000000) /* * Virtual view <-> DMA view memory address translations diff --git a/include/asm-arm/arch-pxa/pm.h b/include/asm-arm/arch-pxa/pm.h new file mode 100644 index 000000000000..7a8a1cdf430d --- /dev/null +++ b/include/asm-arm/arch-pxa/pm.h @@ -0,0 +1,12 @@ +/* + * Copyright (c) 2005 Richard Purdie + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + */ + +extern int pxa_pm_prepare(suspend_state_t state); +extern int pxa_pm_enter(suspend_state_t state); +extern int pxa_pm_finish(suspend_state_t state); diff --git a/include/asm-arm/arch-pxa/pxa-regs.h b/include/asm-arm/arch-pxa/pxa-regs.h index 939d9e5020a0..a75a2470f4f5 100644 --- a/include/asm-arm/arch-pxa/pxa-regs.h +++ b/include/asm-arm/arch-pxa/pxa-regs.h @@ -126,8 +126,8 @@ #define DRCMR12 __REG(0x40000130) /* Request to Channel Map Register for AC97 audio transmit Request */ #define DRCMR13 __REG(0x40000134) /* Request to Channel Map Register for SSP receive Request */ #define DRCMR14 __REG(0x40000138) /* Request to Channel Map Register for SSP transmit Request */ -#define DRCMR15 __REG(0x4000013c) /* Reserved */ -#define DRCMR16 __REG(0x40000140) /* Reserved */ +#define DRCMR15 __REG(0x4000013c) /* Request to Channel Map Register for SSP2 receive Request */ +#define DRCMR16 __REG(0x40000140) /* Request to Channel Map Register for SSP2 transmit Request */ #define DRCMR17 __REG(0x40000144) /* Request to Channel Map Register for ICP receive Request */ #define DRCMR18 __REG(0x40000148) /* Request to Channel Map Register for ICP transmit Request */ #define DRCMR19 __REG(0x4000014c) /* Request to Channel Map Register for STUART receive Request */ @@ -151,7 +151,8 @@ #define DRCMR37 __REG(0x40000194) /* Request to Channel Map Register for USB endpoint 13 Request */ #define DRCMR38 __REG(0x40000198) /* Request to Channel Map Register for USB endpoint 14 Request */ #define DRCMR39 __REG(0x4000019C) /* Reserved */ - +#define DRCMR66 __REG(0x40001108) /* Request to Channel Map Register for SSP3 receive Request */ +#define DRCMR67 __REG(0x4000110C) /* Request to Channel Map Register for SSP3 transmit Request */ #define DRCMR68 __REG(0x40001110) /* Request to Channel Map Register for Camera FIFO 0 Request */ #define DRCMR69 __REG(0x40001114) /* Request to Channel Map Register for Camera FIFO 1 Request */ #define DRCMR70 __REG(0x40001118) /* Request to Channel Map Register for Camera FIFO 2 Request */ @@ -325,6 +326,25 @@ #define STDLL __REG(0x40700000) /* Divisor Latch Low Register (DLAB = 1) (read/write) */ #define STDLH __REG(0x40700004) /* Divisor Latch High Register (DLAB = 1) (read/write) */ +/* Hardware UART (HWUART) */ +#define HWUART HWRBR +#define HWRBR __REG(0x41600000) /* Receive Buffer Register (read only) */ +#define HWTHR __REG(0x41600000) /* Transmit Holding Register (write only) */ +#define HWIER __REG(0x41600004) /* Interrupt Enable Register (read/write) */ +#define HWIIR __REG(0x41600008) /* Interrupt ID Register (read only) */ +#define HWFCR __REG(0x41600008) /* FIFO Control Register (write only) */ +#define HWLCR __REG(0x4160000C) /* Line Control Register (read/write) */ +#define HWMCR __REG(0x41600010) /* Modem Control Register (read/write) */ +#define HWLSR __REG(0x41600014) /* Line Status Register (read only) */ +#define HWMSR __REG(0x41600018) /* Modem Status Register (read only) */ +#define HWSPR __REG(0x4160001C) /* Scratch Pad Register (read/write) */ +#define HWISR __REG(0x41600020) /* Infrared Selection Register (read/write) */ +#define HWFOR __REG(0x41600024) /* Receive FIFO Occupancy Register (read only) */ +#define HWABR __REG(0x41600028) /* Auto-Baud Control Register (read/write) */ +#define HWACR __REG(0x4160002C) /* Auto-Baud Count Register (read only) */ +#define HWDLL __REG(0x41600000) /* Divisor Latch Low Register (DLAB = 1) (read/write) */ +#define HWDLH __REG(0x41600004) /* Divisor Latch High Register (DLAB = 1) (read/write) */ + #define IER_DMAE (1 << 7) /* DMA Requests Enable */ #define IER_UUE (1 << 6) /* UART Unit Enable */ #define IER_NRZE (1 << 5) /* NRZ coding Enable */ @@ -652,7 +672,7 @@ #define UDCCS_IO_RFS (1 << 0) /* Receive FIFO service */ #define UDCCS_IO_RPC (1 << 1) /* Receive packet complete */ -#define UDCCS_IO_ROF (1 << 3) /* Receive overflow */ +#define UDCCS_IO_ROF (1 << 2) /* Receive overflow */ #define UDCCS_IO_DME (1 << 3) /* DMA enable */ #define UDCCS_IO_RNE (1 << 6) /* Receive FIFO not empty */ #define UDCCS_IO_RSP (1 << 7) /* Receive short packet */ @@ -1012,14 +1032,12 @@ #define ICCR0_LBM (1 << 1) /* Loopback mode */ #define ICCR0_ITR (1 << 0) /* IrDA transmission */ -#ifdef CONFIG_PXA27x #define ICCR2_RXP (1 << 3) /* Receive Pin Polarity select */ #define ICCR2_TXP (1 << 2) /* Transmit Pin Polarity select */ #define ICCR2_TRIG (3 << 0) /* Receive FIFO Trigger threshold */ #define ICCR2_TRIG_8 (0 << 0) /* >= 8 bytes */ #define ICCR2_TRIG_16 (1 << 0) /* >= 16 bytes */ #define ICCR2_TRIG_32 (2 << 0) /* >= 32 bytes */ -#endif #ifdef CONFIG_PXA27x #define ICSR0_EOC (1 << 6) /* DMA End of Descriptor Chain */ @@ -1249,9 +1267,13 @@ #define GPIO40_FFDTR 40 /* FFUART data terminal Ready */ #define GPIO41_FFRTS 41 /* FFUART request to send */ #define GPIO42_BTRXD 42 /* BTUART receive data */ +#define GPIO42_HWRXD 42 /* HWUART receive data */ #define GPIO43_BTTXD 43 /* BTUART transmit data */ +#define GPIO43_HWTXD 43 /* HWUART transmit data */ #define GPIO44_BTCTS 44 /* BTUART clear to send */ +#define GPIO44_HWCTS 44 /* HWUART clear to send */ #define GPIO45_BTRTS 45 /* BTUART request to send */ +#define GPIO45_HWRTS 45 /* HWUART request to send */ #define GPIO45_AC97_SYSCLK 45 /* AC97 System Clock */ #define GPIO46_ICPRXD 46 /* ICP receive data */ #define GPIO46_STRXD 46 /* STD_UART receive data */ @@ -1377,17 +1399,26 @@ #define GPIO40_FFDTR_MD (40 | GPIO_ALT_FN_2_OUT) #define GPIO41_FFRTS_MD (41 | GPIO_ALT_FN_2_OUT) #define GPIO42_BTRXD_MD (42 | GPIO_ALT_FN_1_IN) +#define GPIO42_HWRXD_MD (42 | GPIO_ALT_FN_3_IN) #define GPIO43_BTTXD_MD (43 | GPIO_ALT_FN_2_OUT) +#define GPIO43_HWTXD_MD (43 | GPIO_ALT_FN_3_OUT) #define GPIO44_BTCTS_MD (44 | GPIO_ALT_FN_1_IN) +#define GPIO44_HWCTS_MD (44 | GPIO_ALT_FN_3_IN) #define GPIO45_BTRTS_MD (45 | GPIO_ALT_FN_2_OUT) +#define GPIO45_HWRTS_MD (45 | GPIO_ALT_FN_3_OUT) #define GPIO45_SYSCLK_AC97_MD (45 | GPIO_ALT_FN_1_OUT) #define GPIO46_ICPRXD_MD (46 | GPIO_ALT_FN_1_IN) #define GPIO46_STRXD_MD (46 | GPIO_ALT_FN_2_IN) #define GPIO47_ICPTXD_MD (47 | GPIO_ALT_FN_2_OUT) #define GPIO47_STTXD_MD (47 | GPIO_ALT_FN_1_OUT) #define GPIO48_nPOE_MD (48 | GPIO_ALT_FN_2_OUT) +#define GPIO48_HWTXD_MD (48 | GPIO_ALT_FN_1_OUT) +#define GPIO48_nPOE_MD (48 | GPIO_ALT_FN_2_OUT) +#define GPIO49_HWRXD_MD (49 | GPIO_ALT_FN_1_IN) #define GPIO49_nPWE_MD (49 | GPIO_ALT_FN_2_OUT) #define GPIO50_nPIOR_MD (50 | GPIO_ALT_FN_2_OUT) +#define GPIO50_HWCTS_MD (50 | GPIO_ALT_FN_1_IN) +#define GPIO51_HWRTS_MD (51 | GPIO_ALT_FN_1_OUT) #define GPIO51_nPIOW_MD (51 | GPIO_ALT_FN_2_OUT) #define GPIO52_nPCE_1_MD (52 | GPIO_ALT_FN_2_OUT) #define GPIO53_nPCE_2_MD (53 | GPIO_ALT_FN_2_OUT) @@ -1762,6 +1793,7 @@ #define CKEN7_BTUART (1 << 7) /* BTUART Unit Clock Enable */ #define CKEN6_FFUART (1 << 6) /* FFUART Unit Clock Enable */ #define CKEN5_STUART (1 << 5) /* STUART Unit Clock Enable */ +#define CKEN4_HWUART (1 << 4) /* HWUART Unit Clock Enable */ #define CKEN4_SSP3 (1 << 4) /* SSP3 Unit Clock Enable */ #define CKEN3_SSP (1 << 3) /* SSP Unit Clock Enable */ #define CKEN3_SSP2 (1 << 3) /* SSP2 Unit Clock Enable */ @@ -2281,4 +2313,11 @@ #endif +/* PWRMODE register M field values */ + +#define PWRMODE_IDLE 0x1 +#define PWRMODE_STANDBY 0x2 +#define PWRMODE_SLEEP 0x3 +#define PWRMODE_DEEPSLEEP 0x7 + #endif diff --git a/include/asm-arm/arch-pxa/pxafb.h b/include/asm-arm/arch-pxa/pxafb.h index 21c0e16dce5f..aba9b30f4249 100644 --- a/include/asm-arm/arch-pxa/pxafb.h +++ b/include/asm-arm/arch-pxa/pxafb.h @@ -66,4 +66,5 @@ struct pxafb_mach_info { }; void set_pxa_fb_info(struct pxafb_mach_info *hard_pxa_fb_info); +void set_pxa_fb_parent(struct device *parent_dev); unsigned long pxafb_get_hsync_time(struct device *dev); diff --git a/include/asm-arm/arch-pxa/sharpsl.h b/include/asm-arm/arch-pxa/sharpsl.h index 311f2bb5386a..0b43495d24b4 100644 --- a/include/asm-arm/arch-pxa/sharpsl.h +++ b/include/asm-arm/arch-pxa/sharpsl.h @@ -21,12 +21,18 @@ struct corgits_machinfo { void (*wait_hsync)(void); }; + /* * SharpSL Backlight */ - struct corgibl_machinfo { int max_intensity; void (*set_bl_intensity)(int intensity); }; +extern void corgibl_limit_intensity(int limit); + +/* + * SharpSL Battery/PM Driver + */ +extern void sharpsl_battery_kick(void); diff --git a/include/asm-arm/arch-pxa/ssp.h b/include/asm-arm/arch-pxa/ssp.h index 6ec67b018c09..949878c0d908 100644 --- a/include/asm-arm/arch-pxa/ssp.h +++ b/include/asm-arm/arch-pxa/ssp.h @@ -18,6 +18,11 @@ #ifndef SSP_H #define SSP_H +/* + * SSP initialisation flags + */ +#define SSP_NO_IRQ 0x1 /* don't register an irq handler in SSP driver */ + struct ssp_state { u32 cr0; u32 cr1; @@ -31,6 +36,7 @@ struct ssp_dev { u32 flags; u32 psp_flags; u32 speed; + int irq; }; int ssp_write_word(struct ssp_dev *dev, u32 data); @@ -40,7 +46,7 @@ void ssp_enable(struct ssp_dev *dev); void ssp_disable(struct ssp_dev *dev); void ssp_save_state(struct ssp_dev *dev, struct ssp_state *ssp); void ssp_restore_state(struct ssp_dev *dev, struct ssp_state *ssp); -int ssp_init(struct ssp_dev *dev, u32 port); +int ssp_init(struct ssp_dev *dev, u32 port, u32 init_flags); int ssp_config(struct ssp_dev *dev, u32 mode, u32 flags, u32 psp_flags, u32 speed); void ssp_exit(struct ssp_dev *dev); diff --git a/include/asm-arm/arch-pxa/tosa.h b/include/asm-arm/arch-pxa/tosa.h new file mode 100644 index 000000000000..c3364a2c4758 --- /dev/null +++ b/include/asm-arm/arch-pxa/tosa.h @@ -0,0 +1,166 @@ +/* + * Hardware specific definitions for Sharp SL-C6000x series of PDAs + * + * Copyright (c) 2005 Dirk Opfer + * + * Based on Sharp's 2.4 kernel patches + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + */ +#ifndef _ASM_ARCH_TOSA_H_ +#define _ASM_ARCH_TOSA_H_ 1 + +/* TOSA Chip selects */ +#define TOSA_LCDC_PHYS PXA_CS4_PHYS +/* Internel Scoop */ +#define TOSA_CF_PHYS (PXA_CS2_PHYS + 0x00800000) +/* Jacket Scoop */ +#define TOSA_SCOOP_PHYS (PXA_CS5_PHYS + 0x00800000) + +/* + * SCOOP2 internal GPIOs + */ +#define TOSA_SCOOP_PXA_VCORE1 SCOOP_GPCR_PA11 +#define TOSA_SCOOP_TC6393_REST_IN SCOOP_GPCR_PA12 +#define TOSA_SCOOP_IR_POWERDWN SCOOP_GPCR_PA13 +#define TOSA_SCOOP_SD_WP SCOOP_GPCR_PA14 +#define TOSA_SCOOP_PWR_ON SCOOP_GPCR_PA15 +#define TOSA_SCOOP_AUD_PWR_ON SCOOP_GPCR_PA16 +#define TOSA_SCOOP_BT_RESET SCOOP_GPCR_PA17 +#define TOSA_SCOOP_BT_PWR_EN SCOOP_GPCR_PA18 +#define TOSA_SCOOP_AC_IN_OL SCOOP_GPCR_PA19 + +/* GPIO Direction 1 : output mode / 0:input mode */ +#define TOSA_SCOOP_IO_DIR ( TOSA_SCOOP_PXA_VCORE1 | TOSA_SCOOP_TC6393_REST_IN | \ + TOSA_SCOOP_IR_POWERDWN | TOSA_SCOOP_PWR_ON | TOSA_SCOOP_AUD_PWR_ON |\ + TOSA_SCOOP_BT_RESET | TOSA_SCOOP_BT_PWR_EN ) +/* GPIO out put level when init 1: Hi */ +#define TOSA_SCOOP_IO_OUT ( TOSA_SCOOP_TC6393_REST_IN ) + +/* + * SCOOP2 jacket GPIOs + */ +#define TOSA_SCOOP_JC_BT_LED SCOOP_GPCR_PA11 +#define TOSA_SCOOP_JC_NOTE_LED SCOOP_GPCR_PA12 +#define TOSA_SCOOP_JC_CHRG_ERR_LED SCOOP_GPCR_PA13 +#define TOSA_SCOOP_JC_USB_PULLUP SCOOP_GPCR_PA14 +#define TOSA_SCOOP_JC_TC6393_SUSPEND SCOOP_GPCR_PA15 +#define TOSA_SCOOP_JC_TC3693_L3V_ON SCOOP_GPCR_PA16 +#define TOSA_SCOOP_JC_WLAN_DETECT SCOOP_GPCR_PA17 +#define TOSA_SCOOP_JC_WLAN_LED SCOOP_GPCR_PA18 +#define TOSA_SCOOP_JC_CARD_LIMIT_SEL SCOOP_GPCR_PA19 + +/* GPIO Direction 1 : output mode / 0:input mode */ +#define TOSA_SCOOP_JC_IO_DIR ( TOSA_SCOOP_JC_BT_LED | TOSA_SCOOP_JC_NOTE_LED | \ + TOSA_SCOOP_JC_CHRG_ERR_LED | TOSA_SCOOP_JC_USB_PULLUP | \ + TOSA_SCOOP_JC_TC6393_SUSPEND | TOSA_SCOOP_JC_TC3693_L3V_ON | \ + TOSA_SCOOP_JC_WLAN_LED | TOSA_SCOOP_JC_CARD_LIMIT_SEL ) +/* GPIO out put level when init 1: Hi */ +#define TOSA_SCOOP_JC_IO_OUT ( 0 ) + +/* + * Timing Generator + */ +#define TG_PNLCTL 0x00 +#define TG_TPOSCTL 0x01 +#define TG_DUTYCTL 0x02 +#define TG_GPOSR 0x03 +#define TG_GPODR1 0x04 +#define TG_GPODR2 0x05 +#define TG_PINICTL 0x06 +#define TG_HPOSCTL 0x07 + +/* + * LED + */ +#define TOSA_SCOOP_LED_BLUE TOSA_SCOOP_GPCR_PA11 +#define TOSA_SCOOP_LED_GREEN TOSA_SCOOP_GPCR_PA12 +#define TOSA_SCOOP_LED_ORANGE TOSA_SCOOP_GPCR_PA13 +#define TOSA_SCOOP_LED_WLAN TOSA_SCOOP_GPCR_PA18 + + +/* + * PXA GPIOs + */ +#define TOSA_GPIO_POWERON (0) +#define TOSA_GPIO_RESET (1) +#define TOSA_GPIO_AC_IN (2) +#define TOSA_GPIO_RECORD_BTN (3) +#define TOSA_GPIO_SYNC (4) /* Cradle SYNC Button */ +#define TOSA_GPIO_USB_IN (5) +#define TOSA_GPIO_JACKET_DETECT (7) +#define TOSA_GPIO_nSD_DETECT (9) +#define TOSA_GPIO_nSD_INT (10) +#define TOSA_GPIO_TC6393_CLK (11) +#define TOSA_GPIO_BAT1_CRG (12) +#define TOSA_GPIO_CF_CD (13) +#define TOSA_GPIO_BAT0_CRG (14) +#define TOSA_GPIO_TC6393_INT (15) +#define TOSA_GPIO_BAT0_LOW (17) +#define TOSA_GPIO_TC6393_RDY (18) +#define TOSA_GPIO_ON_RESET (19) +#define TOSA_GPIO_EAR_IN (20) +#define TOSA_GPIO_CF_IRQ (21) /* CF slot0 Ready */ +#define TOSA_GPIO_ON_KEY (22) +#define TOSA_GPIO_VGA_LINE (27) +#define TOSA_GPIO_TP_INT (32) /* Touch Panel pen down interrupt */ +#define TOSA_GPIO_JC_CF_IRQ (36) /* CF slot1 Ready */ +#define TOSA_GPIO_BAT_LOCKED (38) /* Battery locked */ +#define TOSA_GPIO_TG_SPI_SCLK (81) +#define TOSA_GPIO_TG_SPI_CS (82) +#define TOSA_GPIO_TG_SPI_MOSI (83) +#define TOSA_GPIO_BAT1_LOW (84) + +#define TOSA_GPIO_HP_IN GPIO_EAR_IN + +#define TOSA_GPIO_MAIN_BAT_LOW GPIO_BAT0_LOW + +#define TOSA_KEY_STROBE_NUM (11) +#define TOSA_KEY_SENSE_NUM (7) + +#define TOSA_GPIO_HIGH_STROBE_BIT (0xfc000000) +#define TOSA_GPIO_LOW_STROBE_BIT (0x0000001f) +#define TOSA_GPIO_ALL_SENSE_BIT (0x00000fe0) +#define TOSA_GPIO_ALL_SENSE_RSHIFT (5) +#define TOSA_GPIO_STROBE_BIT(a) GPIO_bit(58+(a)) +#define TOSA_GPIO_SENSE_BIT(a) GPIO_bit(69+(a)) +#define TOSA_GAFR_HIGH_STROBE_BIT (0xfff00000) +#define TOSA_GAFR_LOW_STROBE_BIT (0x000003ff) +#define TOSA_GAFR_ALL_SENSE_BIT (0x00fffc00) +#define TOSA_GPIO_KEY_SENSE(a) (69+(a)) +#define TOSA_GPIO_KEY_STROBE(a) (58+(a)) + +/* + * Interrupts + */ +#define TOSA_IRQ_GPIO_WAKEUP IRQ_GPIO(TOSA_GPIO_WAKEUP) +#define TOSA_IRQ_GPIO_AC_IN IRQ_GPIO(TOSA_GPIO_AC_IN) +#define TOSA_IRQ_GPIO_RECORD_BTN IRQ_GPIO(TOSA_GPIO_RECORD_BTN) +#define TOSA_IRQ_GPIO_SYNC IRQ_GPIO(TOSA_GPIO_SYNC) +#define TOSA_IRQ_GPIO_USB_IN IRQ_GPIO(TOSA_GPIO_USB_IN) +#define TOSA_IRQ_GPIO_JACKET_DETECT IRQ_GPIO(TOSA_GPIO_JACKET_DETECT) +#define TOSA_IRQ_GPIO_nSD_INT IRQ_GPIO(TOSA_GPIO_nSD_INT) +#define TOSA_IRQ_GPIO_nSD_DETECT IRQ_GPIO(TOSA_GPIO_nSD_DETECT) +#define TOSA_IRQ_GPIO_BAT1_CRG IRQ_GPIO(TOSA_GPIO_BAT1_CRG) +#define TOSA_IRQ_GPIO_CF_CD IRQ_GPIO(TOSA_GPIO_CF_CD) +#define TOSA_IRQ_GPIO_BAT0_CRG IRQ_GPIO(TOSA_GPIO_BAT0_CRG) +#define TOSA_IRQ_GPIO_TC6393_INT IRQ_GPIO(TOSA_GPIO_TC6393_INT) +#define TOSA_IRQ_GPIO_BAT0_LOW IRQ_GPIO(TOSA_GPIO_BAT0_LOW) +#define TOSA_IRQ_GPIO_EAR_IN IRQ_GPIO(TOSA_GPIO_EAR_IN) +#define TOSA_IRQ_GPIO_CF_IRQ IRQ_GPIO(TOSA_GPIO_CF_IRQ) +#define TOSA_IRQ_GPIO_ON_KEY IRQ_GPIO(TOSA_GPIO_ON_KEY) +#define TOSA_IRQ_GPIO_VGA_LINE IRQ_GPIO(TOSA_GPIO_VGA_LINE) +#define TOSA_IRQ_GPIO_TP_INT IRQ_GPIO(TOSA_GPIO_TP_INT) +#define TOSA_IRQ_GPIO_JC_CF_IRQ IRQ_GPIO(TOSA_GPIO_JC_CF_IRQ) +#define TOSA_IRQ_GPIO_BAT_LOCKED IRQ_GPIO(TOSA_GPIO_BAT_LOCKED) +#define TOSA_IRQ_GPIO_BAT1_LOW IRQ_GPIO(TOSA_GPIO_BAT1_LOW) +#define TOSA_IRQ_GPIO_KEY_SENSE(a) IRQ_GPIO(69+(a)) + +#define TOSA_IRQ_GPIO_MAIN_BAT_LOW IRQ_GPIO(TOSA_GPIO_MAIN_BAT_LOW) + +extern struct platform_device tosascoop_jc_device; +extern struct platform_device tosascoop_device; +#endif /* _ASM_ARCH_TOSA_H_ */ diff --git a/include/asm-arm/arch-pxa/uncompress.h b/include/asm-arm/arch-pxa/uncompress.h index 4428d3eb7432..fe38090444e0 100644 --- a/include/asm-arm/arch-pxa/uncompress.h +++ b/include/asm-arm/arch-pxa/uncompress.h @@ -12,6 +12,7 @@ #define FFUART ((volatile unsigned long *)0x40100000) #define BTUART ((volatile unsigned long *)0x40200000) #define STUART ((volatile unsigned long *)0x40700000) +#define HWUART ((volatile unsigned long *)0x41600000) #define UART FFUART diff --git a/include/asm-arm/arch-realview/debug-macro.S b/include/asm-arm/arch-realview/debug-macro.S new file mode 100644 index 000000000000..ed28bd012236 --- /dev/null +++ b/include/asm-arm/arch-realview/debug-macro.S @@ -0,0 +1,38 @@ +/* linux/include/asm-arm/arch-realview/debug-macro.S + * + * Debugging macro include header + * + * Copyright (C) 1994-1999 Russell King + * Moved from linux/arch/arm/kernel/debug.S by Ben Dooks + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * +*/ + +#include <asm/hardware/amba_serial.h> + + .macro addruart,rx + mrc p15, 0, \rx, c1, c0 + tst \rx, #1 @ MMU enabled? + moveq \rx, #0x10000000 + movne \rx, #0xf1000000 @ virtual base + orr \rx, \rx, #0x00009000 + .endm + + .macro senduart,rd,rx + strb \rd, [\rx, #UART01x_DR] + .endm + + .macro waituart,rd,rx +1001: ldr \rd, [\rx, #0x18] @ UARTFLG + tst \rd, #1 << 5 @ UARTFLGUTXFF - 1 when full + bne 1001b + .endm + + .macro busyuart,rd,rx +1001: ldr \rd, [\rx, #0x18] @ UARTFLG + tst \rd, #1 << 3 @ UARTFLGUBUSY - 1 when busy + bne 1001b + .endm diff --git a/include/asm-ppc64/pmc.h b/include/asm-arm/arch-realview/dma.h index d1d297dbccfe..744491a74bd9 100644 --- a/include/asm-ppc64/pmc.h +++ b/include/asm-arm/arch-realview/dma.h @@ -1,6 +1,8 @@ /* - * pmc.h - * Copyright (C) 2004 David Gibson, IBM Corporation + * linux/include/asm-arm/arch-realview/dma.h + * + * Copyright (C) 2003 ARM Limited. + * Copyright (C) 1997,1998 Russell King * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -14,18 +16,12 @@ * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ -#ifndef _PPC64_PMC_H -#define _PPC64_PMC_H - -#include <asm/ptrace.h> - -typedef void (*perf_irq_t)(struct pt_regs *); - -int reserve_pmc_hardware(perf_irq_t new_perf_irq); -void release_pmc_hardware(void); +#ifndef __ASM_ARCH_DMA_H +#define __ASM_ARCH_DMA_H -void power4_enable_pmcs(void); +#define MAX_DMA_ADDRESS 0xffffffff +#define MAX_DMA_CHANNELS 0 -#endif /* _PPC64_PMC_H */ +#endif /* _ASM_ARCH_DMA_H */ diff --git a/include/asm-arm/arch-realview/entry-macro.S b/include/asm-arm/arch-realview/entry-macro.S new file mode 100644 index 000000000000..6288fad0dc41 --- /dev/null +++ b/include/asm-arm/arch-realview/entry-macro.S @@ -0,0 +1,74 @@ +/* + * include/asm-arm/arch-realview/entry-macro.S + * + * Low-level IRQ helper macros for RealView platforms + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#include <asm/hardware/gic.h> + + .macro disable_fiq + .endm + + /* + * The interrupt numbering scheme is defined in the + * interrupt controller spec. To wit: + * + * Interrupts 0-15 are IPI + * 16-28 are reserved + * 29-31 are local. We allow 30 to be used for the watchdog. + * 32-1020 are global + * 1021-1022 are reserved + * 1023 is "spurious" (no interrupt) + * + * For now, we ignore all local interrupts so only return an interrupt if it's + * between 30 and 1020. The test_for_ipi routine below will pick up on IPIs. + * + * A simple read from the controller will tell us the number of the highest + * priority enabled interrupt. We then just need to check whether it is in the + * valid range for an IRQ (30-1020 inclusive). + */ + + .macro get_irqnr_and_base, irqnr, irqstat, base, tmp + + ldr \base, =IO_ADDRESS(REALVIEW_GIC_CPU_BASE) + ldr \irqstat, [\base, #GIC_CPU_INTACK] /* bits 12-10 = src CPU, 9-0 = int # */ + + ldr \tmp, =1021 + + bic \irqnr, \irqstat, #0x1c00 + + cmp \irqnr, #29 + cmpcc \irqnr, \irqnr + cmpne \irqnr, \tmp + cmpcs \irqnr, \irqnr + + .endm + + /* We assume that irqstat (the raw value of the IRQ acknowledge + * register) is preserved from the macro above. + * If there is an IPI, we immediately signal end of interrupt on the + * controller, since this requires the original irqstat value which + * we won't easily be able to recreate later. + */ + + .macro test_for_ipi, irqnr, irqstat, base, tmp + bic \irqnr, \irqstat, #0x1c00 + cmp \irqnr, #16 + strcc \irqstat, [\base, #GIC_CPU_EOI] + cmpcs \irqnr, \irqnr + .endm + + /* As above, this assumes that irqstat and base are preserved.. */ + + .macro test_for_ltirq, irqnr, irqstat, base, tmp + bic \irqnr, \irqstat, #0x1c00 + mov \tmp, #0 + cmp \irqnr, #29 + moveq \tmp, #1 + streq \irqstat, [\base, #GIC_CPU_EOI] + cmp \tmp, #0 + .endm diff --git a/include/asm-ppc64/iSeries/ItSpCommArea.h b/include/asm-arm/arch-realview/hardware.h index 5535f8271c9f..9ca76dc3a7af 100644 --- a/include/asm-ppc64/iSeries/ItSpCommArea.h +++ b/include/asm-arm/arch-realview/hardware.h @@ -1,6 +1,9 @@ /* - * ItSpCommArea.h - * Copyright (C) 2001 Mike Corrigan IBM Corporation + * linux/include/asm-arm/arch-realview/hardware.h + * + * This file contains the hardware definitions of the RealView boards. + * + * Copyright (C) 2003 ARM Limited. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -14,24 +17,16 @@ * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ +#ifndef __ASM_ARCH_HARDWARE_H +#define __ASM_ARCH_HARDWARE_H -#ifndef _ITSPCOMMAREA_H -#define _ITSPCOMMAREA_H - - -struct SpCommArea { - u32 xDesc; // Descriptor (only in new formats) 000-003 - u8 xFormat; // Format (only in new formats) 004-004 - u8 xRsvd1[11]; // Reserved 005-00F - u64 xRawTbAtIplStart; // Raw HW TB value when IPL is started 010-017 - u64 xRawTodAtIplStart; // Raw HW TOD value when IPL is started 018-01F - u64 xBcdTimeAtIplStart; // BCD time when IPL is started 020-027 - u64 xBcdTimeAtOsStart; // BCD time when OS passed control 028-02F - u8 xRsvd2[80]; // Reserved 030-07F -}; +#include <asm/sizes.h> +#include <asm/arch/platform.h> -extern struct SpCommArea xSpCommArea; +/* macro to get at IO space when running virtually */ +#define IO_ADDRESS(x) (((x) & 0x0fffffff) + (((x) >> 4) & 0x0f000000) + 0xf0000000) +#define __io_address(n) __io(IO_ADDRESS(n)) -#endif /* _ITSPCOMMAREA_H */ +#endif diff --git a/include/asm-ppc64/iSeries/HvCallSm.h b/include/asm-arm/arch-realview/io.h index 8a3dbb071a43..d444a68ac330 100644 --- a/include/asm-ppc64/iSeries/HvCallSm.h +++ b/include/asm-arm/arch-realview/io.h @@ -1,6 +1,7 @@ /* - * HvCallSm.h - * Copyright (C) 2001 Mike Corrigan IBM Corporation + * linux/include/asm-arm/arch-realview/io.h + * + * Copyright (C) 2003 ARM Limited * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -14,25 +15,20 @@ * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -#ifndef _HVCALLSM_H -#define _HVCALLSM_H - -/* - * This file contains the "hypervisor call" interface which is used to - * drive the hypervisor from the OS. + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ +#ifndef __ASM_ARM_ARCH_IO_H +#define __ASM_ARM_ARCH_IO_H -#include <asm/iSeries/HvCallSc.h> -#include <asm/iSeries/HvTypes.h> - -#define HvCallSmGet64BitsOfAccessMap HvCallSm + 11 +#define IO_SPACE_LIMIT 0xffffffff -static inline u64 HvCallSm_get64BitsOfAccessMap(HvLpIndex lpIndex, - u64 indexIntoBitMap) +static inline void __iomem *__io(unsigned long addr) { - return HvCall2(HvCallSmGet64BitsOfAccessMap, lpIndex, indexIntoBitMap); + return (void __iomem *)addr; } -#endif /* _HVCALLSM_H */ +#define __io(a) __io(a) +#define __mem_pci(a) (a) +#define __mem_isa(a) (a) + +#endif diff --git a/include/asm-arm/arch-realview/irqs.h b/include/asm-arm/arch-realview/irqs.h new file mode 100644 index 000000000000..c16223c9588d --- /dev/null +++ b/include/asm-arm/arch-realview/irqs.h @@ -0,0 +1,106 @@ +/* + * linux/include/asm-arm/arch-realview/irqs.h + * + * Copyright (C) 2003 ARM Limited + * Copyright (C) 2000 Deep Blue Solutions Ltd. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#include <asm/arch/platform.h> + +#define IRQ_LOCALTIMER 29 +#define IRQ_LOCALWDOG 30 + +/* + * IRQ interrupts definitions are the same the INT definitions + * held within platform.h + */ +#define IRQ_GIC_START 32 +#define IRQ_WDOGINT (IRQ_GIC_START + INT_WDOGINT) +#define IRQ_SOFTINT (IRQ_GIC_START + INT_SOFTINT) +#define IRQ_COMMRx (IRQ_GIC_START + INT_COMMRx) +#define IRQ_COMMTx (IRQ_GIC_START + INT_COMMTx) +#define IRQ_TIMERINT0_1 (IRQ_GIC_START + INT_TIMERINT0_1) +#define IRQ_TIMERINT2_3 (IRQ_GIC_START + INT_TIMERINT2_3) +#define IRQ_GPIOINT0 (IRQ_GIC_START + INT_GPIOINT0) +#define IRQ_GPIOINT1 (IRQ_GIC_START + INT_GPIOINT1) +#define IRQ_GPIOINT2 (IRQ_GIC_START + INT_GPIOINT2) +#define IRQ_GPIOINT3 (IRQ_GIC_START + INT_GPIOINT3) +#define IRQ_RTCINT (IRQ_GIC_START + INT_RTCINT) +#define IRQ_SSPINT (IRQ_GIC_START + INT_SSPINT) +#define IRQ_UARTINT0 (IRQ_GIC_START + INT_UARTINT0) +#define IRQ_UARTINT1 (IRQ_GIC_START + INT_UARTINT1) +#define IRQ_UARTINT2 (IRQ_GIC_START + INT_UARTINT2) +#define IRQ_UART3 (IRQ_GIC_START + INT_UARTINT3) +#define IRQ_SCIINT (IRQ_GIC_START + INT_SCIINT) +#define IRQ_CLCDINT (IRQ_GIC_START + INT_CLCDINT) +#define IRQ_DMAINT (IRQ_GIC_START + INT_DMAINT) +#define IRQ_PWRFAILINT (IRQ_GIC_START + INT_PWRFAILINT) +#define IRQ_MBXINT (IRQ_GIC_START + INT_MBXINT) +#define IRQ_GNDINT (IRQ_GIC_START + INT_GNDINT) +#define IRQ_MMCI0B (IRQ_GIC_START + INT_MMCI0B) +#define IRQ_MMCI1B (IRQ_GIC_START + INT_MMCI1B) +#define IRQ_KMI0 (IRQ_GIC_START + INT_KMI0) +#define IRQ_KMI1 (IRQ_GIC_START + INT_KMI1) +#define IRQ_SCI3 (IRQ_GIC_START + INT_SCI3) +#define IRQ_CLCD (IRQ_GIC_START + INT_CLCD) +#define IRQ_TOUCH (IRQ_GIC_START + INT_TOUCH) +#define IRQ_KEYPAD (IRQ_GIC_START + INT_KEYPAD) +#define IRQ_DoC (IRQ_GIC_START + INT_DoC) +#define IRQ_MMCI0A (IRQ_GIC_START + INT_MMCI0A) +#define IRQ_MMCI1A (IRQ_GIC_START + INT_MMCI1A) +#define IRQ_AACI (IRQ_GIC_START + INT_AACI) +#define IRQ_ETH (IRQ_GIC_START + INT_ETH) +#define IRQ_USB (IRQ_GIC_START + INT_USB) + +#define IRQMASK_WDOGINT INTMASK_WDOGINT +#define IRQMASK_SOFTINT INTMASK_SOFTINT +#define IRQMASK_COMMRx INTMASK_COMMRx +#define IRQMASK_COMMTx INTMASK_COMMTx +#define IRQMASK_TIMERINT0_1 INTMASK_TIMERINT0_1 +#define IRQMASK_TIMERINT2_3 INTMASK_TIMERINT2_3 +#define IRQMASK_GPIOINT0 INTMASK_GPIOINT0 +#define IRQMASK_GPIOINT1 INTMASK_GPIOINT1 +#define IRQMASK_GPIOINT2 INTMASK_GPIOINT2 +#define IRQMASK_GPIOINT3 INTMASK_GPIOINT3 +#define IRQMASK_RTCINT INTMASK_RTCINT +#define IRQMASK_SSPINT INTMASK_SSPINT +#define IRQMASK_UARTINT0 INTMASK_UARTINT0 +#define IRQMASK_UARTINT1 INTMASK_UARTINT1 +#define IRQMASK_UARTINT2 INTMASK_UARTINT2 +#define IRQMASK_SCIINT INTMASK_SCIINT +#define IRQMASK_CLCDINT INTMASK_CLCDINT +#define IRQMASK_DMAINT INTMASK_DMAINT +#define IRQMASK_PWRFAILINT INTMASK_PWRFAILINT +#define IRQMASK_MBXINT INTMASK_MBXINT +#define IRQMASK_GNDINT INTMASK_GNDINT +#define IRQMASK_MMCI0B INTMASK_MMCI0B +#define IRQMASK_MMCI1B INTMASK_MMCI1B +#define IRQMASK_KMI0 INTMASK_KMI0 +#define IRQMASK_KMI1 INTMASK_KMI1 +#define IRQMASK_SCI3 INTMASK_SCI3 +#define IRQMASK_UART3 INTMASK_UART3 +#define IRQMASK_CLCD INTMASK_CLCD +#define IRQMASK_TOUCH INTMASK_TOUCH +#define IRQMASK_KEYPAD INTMASK_KEYPAD +#define IRQMASK_DoC INTMASK_DoC +#define IRQMASK_MMCI0A INTMASK_MMCI0A +#define IRQMASK_MMCI1A INTMASK_MMCI1A +#define IRQMASK_AACI INTMASK_AACI +#define IRQMASK_ETH INTMASK_ETH +#define IRQMASK_USB INTMASK_USB + +#define NR_IRQS (IRQ_GIC_START + 64) diff --git a/include/asm-arm/arch-realview/memory.h b/include/asm-arm/arch-realview/memory.h new file mode 100644 index 000000000000..ed370abb638f --- /dev/null +++ b/include/asm-arm/arch-realview/memory.h @@ -0,0 +1,38 @@ +/* + * linux/include/asm-arm/arch-realview/memory.h + * + * Copyright (C) 2003 ARM Limited + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ +#ifndef __ASM_ARCH_MEMORY_H +#define __ASM_ARCH_MEMORY_H + +/* + * Physical DRAM offset. + */ +#define PHYS_OFFSET UL(0x00000000) + +/* + * Virtual view <-> DMA view memory address translations + * virt_to_bus: Used to translate the virtual address to an + * address suitable to be passed to set_dma_addr + * bus_to_virt: Used to convert an address for DMA operations + * to an address that the kernel can use. + */ +#define __virt_to_bus(x) ((x) - PAGE_OFFSET) +#define __bus_to_virt(x) ((x) + PAGE_OFFSET) + +#endif diff --git a/include/asm-arm/arch-realview/param.h b/include/asm-arm/arch-realview/param.h new file mode 100644 index 000000000000..89b1235d32bd --- /dev/null +++ b/include/asm-arm/arch-realview/param.h @@ -0,0 +1,19 @@ +/* + * linux/include/asm-arm/arch-realview/param.h + * + * Copyright (C) 2002 ARM Limited + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ diff --git a/include/asm-arm/arch-realview/platform.h b/include/asm-arm/arch-realview/platform.h new file mode 100644 index 000000000000..18d7c18b738c --- /dev/null +++ b/include/asm-arm/arch-realview/platform.h @@ -0,0 +1,450 @@ +/* + * linux/include/asm-arm/arch-realview/platform.h + * + * Copyright (c) ARM Limited 2003. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#ifndef __address_h +#define __address_h 1 + +/* + * Memory definitions + */ +#define REALVIEW_BOOT_ROM_LO 0x30000000 /* DoC Base (64Mb)...*/ +#define REALVIEW_BOOT_ROM_HI 0x30000000 +#define REALVIEW_BOOT_ROM_BASE REALVIEW_BOOT_ROM_HI /* Normal position */ +#define REALVIEW_BOOT_ROM_SIZE SZ_64M + +#define REALVIEW_SSRAM_BASE /* REALVIEW_SSMC_BASE ? */ +#define REALVIEW_SSRAM_SIZE SZ_2M + +#define REALVIEW_FLASH_BASE 0x40000000 +#define REALVIEW_FLASH_SIZE SZ_64M + +/* + * SDRAM + */ +#define REALVIEW_SDRAM_BASE 0x00000000 + +/* + * Logic expansion modules + * + */ + + +/* ------------------------------------------------------------------------ + * RealView Registers + * ------------------------------------------------------------------------ + * + */ +#define REALVIEW_SYS_ID_OFFSET 0x00 +#define REALVIEW_SYS_SW_OFFSET 0x04 +#define REALVIEW_SYS_LED_OFFSET 0x08 +#define REALVIEW_SYS_OSC0_OFFSET 0x0C + +#define REALVIEW_SYS_OSC1_OFFSET 0x10 +#define REALVIEW_SYS_OSC2_OFFSET 0x14 +#define REALVIEW_SYS_OSC3_OFFSET 0x18 +#define REALVIEW_SYS_OSC4_OFFSET 0x1C /* OSC1 for RealView/AB */ + +#define REALVIEW_SYS_LOCK_OFFSET 0x20 +#define REALVIEW_SYS_100HZ_OFFSET 0x24 +#define REALVIEW_SYS_CFGDATA1_OFFSET 0x28 +#define REALVIEW_SYS_CFGDATA2_OFFSET 0x2C +#define REALVIEW_SYS_FLAGS_OFFSET 0x30 +#define REALVIEW_SYS_FLAGSSET_OFFSET 0x30 +#define REALVIEW_SYS_FLAGSCLR_OFFSET 0x34 +#define REALVIEW_SYS_NVFLAGS_OFFSET 0x38 +#define REALVIEW_SYS_NVFLAGSSET_OFFSET 0x38 +#define REALVIEW_SYS_NVFLAGSCLR_OFFSET 0x3C +#define REALVIEW_SYS_RESETCTL_OFFSET 0x40 +#define REALVIEW_SYS_PCICTL_OFFSET 0x44 +#define REALVIEW_SYS_MCI_OFFSET 0x48 +#define REALVIEW_SYS_FLASH_OFFSET 0x4C +#define REALVIEW_SYS_CLCD_OFFSET 0x50 +#define REALVIEW_SYS_CLCDSER_OFFSET 0x54 +#define REALVIEW_SYS_BOOTCS_OFFSET 0x58 +#define REALVIEW_SYS_24MHz_OFFSET 0x5C +#define REALVIEW_SYS_MISC_OFFSET 0x60 +#define REALVIEW_SYS_IOSEL_OFFSET 0x70 +#define REALVIEW_SYS_TEST_OSC0_OFFSET 0x80 +#define REALVIEW_SYS_TEST_OSC1_OFFSET 0x84 +#define REALVIEW_SYS_TEST_OSC2_OFFSET 0x88 +#define REALVIEW_SYS_TEST_OSC3_OFFSET 0x8C +#define REALVIEW_SYS_TEST_OSC4_OFFSET 0x90 + +#define REALVIEW_SYS_BASE 0x10000000 +#define REALVIEW_SYS_ID (REALVIEW_SYS_BASE + REALVIEW_SYS_ID_OFFSET) +#define REALVIEW_SYS_SW (REALVIEW_SYS_BASE + REALVIEW_SYS_SW_OFFSET) +#define REALVIEW_SYS_LED (REALVIEW_SYS_BASE + REALVIEW_SYS_LED_OFFSET) +#define REALVIEW_SYS_OSC0 (REALVIEW_SYS_BASE + REALVIEW_SYS_OSC0_OFFSET) +#define REALVIEW_SYS_OSC1 (REALVIEW_SYS_BASE + REALVIEW_SYS_OSC1_OFFSET) + +#define REALVIEW_SYS_LOCK (REALVIEW_SYS_BASE + REALVIEW_SYS_LOCK_OFFSET) +#define REALVIEW_SYS_100HZ (REALVIEW_SYS_BASE + REALVIEW_SYS_100HZ_OFFSET) +#define REALVIEW_SYS_CFGDATA1 (REALVIEW_SYS_BASE + REALVIEW_SYS_CFGDATA1_OFFSET) +#define REALVIEW_SYS_CFGDATA2 (REALVIEW_SYS_BASE + REALVIEW_SYS_CFGDATA2_OFFSET) +#define REALVIEW_SYS_FLAGS (REALVIEW_SYS_BASE + REALVIEW_SYS_FLAGS_OFFSET) +#define REALVIEW_SYS_FLAGSSET (REALVIEW_SYS_BASE + REALVIEW_SYS_FLAGSSET_OFFSET) +#define REALVIEW_SYS_FLAGSCLR (REALVIEW_SYS_BASE + REALVIEW_SYS_FLAGSCLR_OFFSET) +#define REALVIEW_SYS_NVFLAGS (REALVIEW_SYS_BASE + REALVIEW_SYS_NVFLAGS_OFFSET) +#define REALVIEW_SYS_NVFLAGSSET (REALVIEW_SYS_BASE + REALVIEW_SYS_NVFLAGSSET_OFFSET) +#define REALVIEW_SYS_NVFLAGSCLR (REALVIEW_SYS_BASE + REALVIEW_SYS_NVFLAGSCLR_OFFSET) +#define REALVIEW_SYS_RESETCTL (REALVIEW_SYS_BASE + REALVIEW_SYS_RESETCTL_OFFSET) +#define REALVIEW_SYS_PCICTL (REALVIEW_SYS_BASE + REALVIEW_SYS_PCICTL_OFFSET) +#define REALVIEW_SYS_MCI (REALVIEW_SYS_BASE + REALVIEW_SYS_MCI_OFFSET) +#define REALVIEW_SYS_FLASH (REALVIEW_SYS_BASE + REALVIEW_SYS_FLASH_OFFSET) +#define REALVIEW_SYS_CLCD (REALVIEW_SYS_BASE + REALVIEW_SYS_CLCD_OFFSET) +#define REALVIEW_SYS_CLCDSER (REALVIEW_SYS_BASE + REALVIEW_SYS_CLCDSER_OFFSET) +#define REALVIEW_SYS_BOOTCS (REALVIEW_SYS_BASE + REALVIEW_SYS_BOOTCS_OFFSET) +#define REALVIEW_SYS_24MHz (REALVIEW_SYS_BASE + REALVIEW_SYS_24MHz_OFFSET) +#define REALVIEW_SYS_MISC (REALVIEW_SYS_BASE + REALVIEW_SYS_MISC_OFFSET) +#define REALVIEW_SYS_IOSEL (REALVIEW_SYS_BASE + REALVIEW_SYS_IOSEL_OFFSET) +#define REALVIEW_SYS_TEST_OSC0 (REALVIEW_SYS_BASE + REALVIEW_SYS_TEST_OSC0_OFFSET) +#define REALVIEW_SYS_TEST_OSC1 (REALVIEW_SYS_BASE + REALVIEW_SYS_TEST_OSC1_OFFSET) +#define REALVIEW_SYS_TEST_OSC2 (REALVIEW_SYS_BASE + REALVIEW_SYS_TEST_OSC2_OFFSET) +#define REALVIEW_SYS_TEST_OSC3 (REALVIEW_SYS_BASE + REALVIEW_SYS_TEST_OSC3_OFFSET) +#define REALVIEW_SYS_TEST_OSC4 (REALVIEW_SYS_BASE + REALVIEW_SYS_TEST_OSC4_OFFSET) + +/* + * Values for REALVIEW_SYS_RESET_CTRL + */ +#define REALVIEW_SYS_CTRL_RESET_CONFIGCLR 0x01 +#define REALVIEW_SYS_CTRL_RESET_CONFIGINIT 0x02 +#define REALVIEW_SYS_CTRL_RESET_DLLRESET 0x03 +#define REALVIEW_SYS_CTRL_RESET_PLLRESET 0x04 +#define REALVIEW_SYS_CTRL_RESET_POR 0x05 +#define REALVIEW_SYS_CTRL_RESET_DoC 0x06 + +#define REALVIEW_SYS_CTRL_LED (1 << 0) + + +/* ------------------------------------------------------------------------ + * RealView control registers + * ------------------------------------------------------------------------ + */ + +/* + * REALVIEW_IDFIELD + * + * 31:24 = manufacturer (0x41 = ARM) + * 23:16 = architecture (0x08 = AHB system bus, ASB processor bus) + * 15:12 = FPGA (0x3 = XVC600 or XVC600E) + * 11:4 = build value + * 3:0 = revision number (0x1 = rev B (AHB)) + */ + +/* + * REALVIEW_SYS_LOCK + * control access to SYS_OSCx, SYS_CFGDATAx, SYS_RESETCTL, + * SYS_CLD, SYS_BOOTCS + */ +#define REALVIEW_SYS_LOCK_LOCKED (1 << 16) +#define REALVIEW_SYS_LOCKVAL_MASK 0xFFFF /* write 0xA05F to enable write access */ + +/* + * REALVIEW_SYS_FLASH + */ +#define REALVIEW_FLASHPROG_FLVPPEN (1 << 0) /* Enable writing to flash */ + +/* + * REALVIEW_INTREG + * - used to acknowledge and control MMCI and UART interrupts + */ +#define REALVIEW_INTREG_WPROT 0x00 /* MMC protection status (no interrupt generated) */ +#define REALVIEW_INTREG_RI0 0x01 /* Ring indicator UART0 is asserted, */ +#define REALVIEW_INTREG_CARDIN 0x08 /* MMCI card in detect */ + /* write 1 to acknowledge and clear */ +#define REALVIEW_INTREG_RI1 0x02 /* Ring indicator UART1 is asserted, */ +#define REALVIEW_INTREG_CARDINSERT 0x03 /* Signal insertion of MMC card */ + +/* + * REALVIEW peripheral addresses + */ +#define REALVIEW_SCTL_BASE 0x10001000 /* System controller */ +#define REALVIEW_I2C_BASE 0x10002000 /* I2C control */ + /* Reserved 0x10003000 */ +#define REALVIEW_AACI_BASE 0x10004000 /* Audio */ +#define REALVIEW_MMCI0_BASE 0x10005000 /* MMC interface */ +#define REALVIEW_KMI0_BASE 0x10006000 /* KMI interface */ +#define REALVIEW_KMI1_BASE 0x10007000 /* KMI 2nd interface */ +#define REALVIEW_CHAR_LCD_BASE 0x10008000 /* Character LCD */ +#define REALVIEW_UART0_BASE 0x10009000 /* UART 0 */ +#define REALVIEW_UART1_BASE 0x1000A000 /* UART 1 */ +#define REALVIEW_UART2_BASE 0x1000B000 /* UART 2 */ +#define REALVIEW_UART3_BASE 0x1000C000 /* UART 3 */ +#define REALVIEW_SSP_BASE 0x1000D000 /* Synchronous Serial Port */ +#define REALVIEW_SCI_BASE 0x1000E000 /* Smart card controller */ + /* Reserved 0x1000F000 */ +#define REALVIEW_WATCHDOG_BASE 0x10010000 /* watchdog interface */ +#define REALVIEW_TIMER0_1_BASE 0x10011000 /* Timer 0 and 1 */ +#define REALVIEW_TIMER2_3_BASE 0x10012000 /* Timer 2 and 3 */ +#define REALVIEW_GPIO0_BASE 0x10013000 /* GPIO port 0 */ +#define REALVIEW_GPIO1_BASE 0x10014000 /* GPIO port 1 */ +#define REALVIEW_GPIO2_BASE 0x10015000 /* GPIO port 2 */ + /* Reserved 0x10016000 */ +#define REALVIEW_RTC_BASE 0x10017000 /* Real Time Clock */ +#define REALVIEW_DMC_BASE 0x10018000 /* DMC configuration */ +#define REALVIEW_PCI_CORE_BASE 0x10019000 /* PCI configuration */ + /* Reserved 0x1001A000 - 0x1001FFFF */ +#define REALVIEW_CLCD_BASE 0x10020000 /* CLCD */ +#define REALVIEW_DMAC_BASE 0x10030000 /* DMA controller */ +#ifndef CONFIG_REALVIEW_MPCORE +#define REALVIEW_GIC_CPU_BASE 0x10040000 /* Generic interrupt controller CPU interface */ +#define REALVIEW_GIC_DIST_BASE 0x10041000 /* Generic interrupt controller distributor */ +#else +#define REALVIEW_MPCORE_SCU_BASE 0x10100000 /* SCU registers */ +#define REALVIEW_GIC_CPU_BASE 0x10100100 /* Generic interrupt controller CPU interface */ +#define REALVIEW_TWD_BASE 0x10100700 +#define REALVIEW_TWD_SIZE 0x00000100 +#define REALVIEW_GIC_DIST_BASE 0x10101000 /* Generic interrupt controller distributor */ +#endif +#define REALVIEW_SMC_BASE 0x10080000 /* SMC */ + /* Reserved 0x10090000 - 0x100EFFFF */ + +#define REALVIEW_ETH_BASE 0x4E000000 /* Ethernet */ + +/* PCI space */ +#define REALVIEW_PCI_BASE 0x41000000 /* PCI Interface */ +#define REALVIEW_PCI_CFG_BASE 0x42000000 +#define REALVIEW_PCI_MEM_BASE0 0x44000000 +#define REALVIEW_PCI_MEM_BASE1 0x50000000 +#define REALVIEW_PCI_MEM_BASE2 0x60000000 +/* Sizes of above maps */ +#define REALVIEW_PCI_BASE_SIZE 0x01000000 +#define REALVIEW_PCI_CFG_BASE_SIZE 0x02000000 +#define REALVIEW_PCI_MEM_BASE0_SIZE 0x0c000000 /* 32Mb */ +#define REALVIEW_PCI_MEM_BASE1_SIZE 0x10000000 /* 256Mb */ +#define REALVIEW_PCI_MEM_BASE2_SIZE 0x10000000 /* 256Mb */ + +#define REALVIEW_SDRAM67_BASE 0x70000000 /* SDRAM banks 6 and 7 */ +#define REALVIEW_LT_BASE 0x80000000 /* Logic Tile expansion */ + +/* + * Disk on Chip + */ +#define REALVIEW_DOC_BASE 0x2C000000 +#define REALVIEW_DOC_SIZE (16 << 20) +#define REALVIEW_DOC_PAGE_SIZE 512 +#define REALVIEW_DOC_TOTAL_PAGES (DOC_SIZE / PAGE_SIZE) + +#define ERASE_UNIT_PAGES 32 +#define START_PAGE 0x80 + +/* + * LED settings, bits [7:0] + */ +#define REALVIEW_SYS_LED0 (1 << 0) +#define REALVIEW_SYS_LED1 (1 << 1) +#define REALVIEW_SYS_LED2 (1 << 2) +#define REALVIEW_SYS_LED3 (1 << 3) +#define REALVIEW_SYS_LED4 (1 << 4) +#define REALVIEW_SYS_LED5 (1 << 5) +#define REALVIEW_SYS_LED6 (1 << 6) +#define REALVIEW_SYS_LED7 (1 << 7) + +#define ALL_LEDS 0xFF + +#define LED_BANK REALVIEW_SYS_LED + +/* + * Control registers + */ +#define REALVIEW_IDFIELD_OFFSET 0x0 /* RealView build information */ +#define REALVIEW_FLASHPROG_OFFSET 0x4 /* Flash devices */ +#define REALVIEW_INTREG_OFFSET 0x8 /* Interrupt control */ +#define REALVIEW_DECODE_OFFSET 0xC /* Fitted logic modules */ + +/* ------------------------------------------------------------------------ + * Interrupts - bit assignment (primary) + * ------------------------------------------------------------------------ + */ +#ifndef CONFIG_REALVIEW_MPCORE +#define INT_WDOGINT 0 /* Watchdog timer */ +#define INT_SOFTINT 1 /* Software interrupt */ +#define INT_COMMRx 2 /* Debug Comm Rx interrupt */ +#define INT_COMMTx 3 /* Debug Comm Tx interrupt */ +#define INT_TIMERINT0_1 4 /* Timer 0 and 1 */ +#define INT_TIMERINT2_3 5 /* Timer 2 and 3 */ +#define INT_GPIOINT0 6 /* GPIO 0 */ +#define INT_GPIOINT1 7 /* GPIO 1 */ +#define INT_GPIOINT2 8 /* GPIO 2 */ +/* 9 reserved */ +#define INT_RTCINT 10 /* Real Time Clock */ +#define INT_SSPINT 11 /* Synchronous Serial Port */ +#define INT_UARTINT0 12 /* UART 0 on development chip */ +#define INT_UARTINT1 13 /* UART 1 on development chip */ +#define INT_UARTINT2 14 /* UART 2 on development chip */ +#define INT_UARTINT3 15 /* UART 3 on development chip */ +#define INT_SCIINT 16 /* Smart Card Interface */ +#define INT_MMCI0A 17 /* Multimedia Card 0A */ +#define INT_MMCI0B 18 /* Multimedia Card 0B */ +#define INT_AACI 19 /* Audio Codec */ +#define INT_KMI0 20 /* Keyboard/Mouse port 0 */ +#define INT_KMI1 21 /* Keyboard/Mouse port 1 */ +#define INT_CHARLCD 22 /* Character LCD */ +#define INT_CLCDINT 23 /* CLCD controller */ +#define INT_DMAINT 24 /* DMA controller */ +#define INT_PWRFAILINT 25 /* Power failure */ +#define INT_PISMO 26 +#define INT_DoC 27 /* Disk on Chip memory controller */ +#define INT_ETH 28 /* Ethernet controller */ +#define INT_USB 29 /* USB controller */ +#define INT_TSPENINT 30 /* Touchscreen pen */ +#define INT_TSKPADINT 31 /* Touchscreen keypad */ +#else +#define INT_AACI 0 +#define INT_TIMERINT0_1 1 +#define INT_TIMERINT2_3 2 +#define INT_USB 3 +#define INT_UARTINT0 4 +#define INT_UARTINT1 5 +#define INT_RTCINT 6 +#define INT_KMI0 7 +#define INT_KMI1 8 +#define INT_ETH 9 +#define INT_EB_IRQ1 10 /* main GIC */ +#define INT_EB_IRQ2 11 /* tile GIC */ +#define INT_EB_FIQ1 12 /* main GIC */ +#define INT_EB_FIQ2 13 /* tile GIC */ +#define INT_MMCI0A 14 +#define INT_MMCI0B 15 + +#define INT_PMU_CPU0 17 +#define INT_PMU_CPU1 18 +#define INT_PMU_CPU2 19 +#define INT_PMU_CPU3 20 +#define INT_PMU_SCU0 21 +#define INT_PMU_SCU1 22 +#define INT_PMU_SCU2 23 +#define INT_PMU_SCU3 24 +#define INT_PMU_SCU4 25 +#define INT_PMU_SCU5 26 +#define INT_PMU_SCU6 27 +#define INT_PMU_SCU7 28 + +#define INT_L220_EVENT 29 +#define INT_L220_SLAVE 30 +#define INT_L220_DECODE 31 + +#define INT_UARTINT2 -1 +#define INT_UARTINT3 -1 +#define INT_CLCDINT -1 +#define INT_DMAINT -1 +#define INT_WDOGINT -1 +#define INT_GPIOINT0 -1 +#define INT_GPIOINT1 -1 +#define INT_GPIOINT2 -1 +#define INT_SCIINT -1 +#define INT_SSPINT -1 +#endif + +/* + * Interrupt bit positions + * + */ +#define INTMASK_WDOGINT (1 << INT_WDOGINT) +#define INTMASK_SOFTINT (1 << INT_SOFTINT) +#define INTMASK_COMMRx (1 << INT_COMMRx) +#define INTMASK_COMMTx (1 << INT_COMMTx) +#define INTMASK_TIMERINT0_1 (1 << INT_TIMERINT0_1) +#define INTMASK_TIMERINT2_3 (1 << INT_TIMERINT2_3) +#define INTMASK_GPIOINT0 (1 << INT_GPIOINT0) +#define INTMASK_GPIOINT1 (1 << INT_GPIOINT1) +#define INTMASK_GPIOINT2 (1 << INT_GPIOINT2) +#define INTMASK_RTCINT (1 << INT_RTCINT) +#define INTMASK_SSPINT (1 << INT_SSPINT) +#define INTMASK_UARTINT0 (1 << INT_UARTINT0) +#define INTMASK_UARTINT1 (1 << INT_UARTINT1) +#define INTMASK_UARTINT2 (1 << INT_UARTINT2) +#define INTMASK_UARTINT3 (1 << INT_UARTINT3) +#define INTMASK_SCIINT (1 << INT_SCIINT) +#define INTMASK_MMCI0A (1 << INT_MMCI0A) +#define INTMASK_MMCI0B (1 << INT_MMCI0B) +#define INTMASK_AACI (1 << INT_AACI) +#define INTMASK_KMI0 (1 << INT_KMI0) +#define INTMASK_KMI1 (1 << INT_KMI1) +#define INTMASK_CHARLCD (1 << INT_CHARLCD) +#define INTMASK_CLCDINT (1 << INT_CLCDINT) +#define INTMASK_DMAINT (1 << INT_DMAINT) +#define INTMASK_PWRFAILINT (1 << INT_PWRFAILINT) +#define INTMASK_PISMO (1 << INT_PISMO) +#define INTMASK_DoC (1 << INT_DoC) +#define INTMASK_ETH (1 << INT_ETH) +#define INTMASK_USB (1 << INT_USB) +#define INTMASK_TSPENINT (1 << INT_TSPENINT) +#define INTMASK_TSKPADINT (1 << INT_TSKPADINT) + +#define MAXIRQNUM 31 +#define MAXFIQNUM 31 +#define MAXSWINUM 31 + +/* + * Application Flash + * + */ +#define FLASH_BASE REALVIEW_FLASH_BASE +#define FLASH_SIZE REALVIEW_FLASH_SIZE +#define FLASH_END (FLASH_BASE + FLASH_SIZE - 1) +#define FLASH_BLOCK_SIZE SZ_128K + +/* + * Boot Flash + * + */ +#define EPROM_BASE REALVIEW_BOOT_ROM_HI +#define EPROM_SIZE REALVIEW_BOOT_ROM_SIZE +#define EPROM_END (EPROM_BASE + EPROM_SIZE - 1) + +/* + * Clean base - dummy + * + */ +#define CLEAN_BASE EPROM_BASE + +/* + * System controller bit assignment + */ +#define REALVIEW_REFCLK 0 +#define REALVIEW_TIMCLK 1 + +#define REALVIEW_TIMER1_EnSel 15 +#define REALVIEW_TIMER2_EnSel 17 +#define REALVIEW_TIMER3_EnSel 19 +#define REALVIEW_TIMER4_EnSel 21 + + +#define MAX_TIMER 2 +#define MAX_PERIOD 699050 +#define TICKS_PER_uSEC 1 + +/* + * These are useconds NOT ticks. + * + */ +#define mSEC_1 1000 +#define mSEC_5 (mSEC_1 * 5) +#define mSEC_10 (mSEC_1 * 10) +#define mSEC_25 (mSEC_1 * 25) +#define SEC_1 (mSEC_1 * 1000) + +#define REALVIEW_CSR_BASE 0x10000000 +#define REALVIEW_CSR_SIZE 0x10000000 + +#endif + +/* END */ diff --git a/include/asm-arm/arch-realview/smp.h b/include/asm-arm/arch-realview/smp.h new file mode 100644 index 000000000000..fc87783e8e8b --- /dev/null +++ b/include/asm-arm/arch-realview/smp.h @@ -0,0 +1,31 @@ +#ifndef ASMARM_ARCH_SMP_H +#define ASMARM_ARCH_SMP_H + +#include <linux/config.h> + +#include <asm/hardware/gic.h> + +#define hard_smp_processor_id() \ + ({ \ + unsigned int cpunum; \ + __asm__("mrc p15, 0, %0, c0, c0, 5" \ + : "=r" (cpunum)); \ + cpunum &= 0x0F; \ + }) + +/* + * We use IRQ1 as the IPI + */ +static inline void smp_cross_call(cpumask_t callmap) +{ + gic_raise_softirq(callmap, 1); +} + +/* + * Do nothing on MPcore. + */ +static inline void smp_cross_call_done(cpumask_t callmap) +{ +} + +#endif diff --git a/include/asm-arm/arch-realview/system.h b/include/asm-arm/arch-realview/system.h new file mode 100644 index 000000000000..6f3d0ce0ca1e --- /dev/null +++ b/include/asm-arm/arch-realview/system.h @@ -0,0 +1,51 @@ +/* + * linux/include/asm-arm/arch-realview/system.h + * + * Copyright (C) 2003 ARM Limited + * Copyright (C) 2000 Deep Blue Solutions Ltd + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ +#ifndef __ASM_ARCH_SYSTEM_H +#define __ASM_ARCH_SYSTEM_H + +#include <asm/hardware.h> +#include <asm/io.h> +#include <asm/arch/platform.h> + +static inline void arch_idle(void) +{ + /* + * This should do all the clock switching + * and wait for interrupt tricks + */ + cpu_do_idle(); +} + +static inline void arch_reset(char mode) +{ + void __iomem *hdr_ctrl = __io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_RESETCTL_OFFSET; + unsigned int val; + + /* + * To reset, we hit the on-board reset register + * in the system FPGA + */ + val = __raw_readl(hdr_ctrl); + val |= REALVIEW_SYS_CTRL_RESET_CONFIGCLR; + __raw_writel(val, hdr_ctrl); +} + +#endif diff --git a/include/asm-arm/arch-realview/timex.h b/include/asm-arm/arch-realview/timex.h new file mode 100644 index 000000000000..5b9d82d0a5e0 --- /dev/null +++ b/include/asm-arm/arch-realview/timex.h @@ -0,0 +1,23 @@ +/* + * linux/include/asm-arm/arch-realview/timex.h + * + * RealView architecture timex specifications + * + * Copyright (C) 2003 ARM Limited + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#define CLOCK_TICK_RATE (50000000 / 16) diff --git a/include/asm-arm/arch-realview/uncompress.h b/include/asm-arm/arch-realview/uncompress.h new file mode 100644 index 000000000000..b5e4d360665b --- /dev/null +++ b/include/asm-arm/arch-realview/uncompress.h @@ -0,0 +1,54 @@ +/* + * linux/include/asm-arm/arch-realview/uncompress.h + * + * Copyright (C) 2003 ARM Limited + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ +#include <asm/hardware.h> + +#define AMBA_UART_DR (*(volatile unsigned char *) (REALVIEW_UART0_BASE + 0x00)) +#define AMBA_UART_LCRH (*(volatile unsigned char *) (REALVIEW_UART0_BASE + 0x2c)) +#define AMBA_UART_CR (*(volatile unsigned char *) (REALVIEW_UART0_BASE + 0x30)) +#define AMBA_UART_FR (*(volatile unsigned char *) (REALVIEW_UART0_BASE + 0x18)) + +/* + * This does not append a newline + */ +static void putstr(const char *s) +{ + while (*s) { + while (AMBA_UART_FR & (1 << 5)) + barrier(); + + AMBA_UART_DR = *s; + + if (*s == '\n') { + while (AMBA_UART_FR & (1 << 5)) + barrier(); + + AMBA_UART_DR = '\r'; + } + s++; + } + while (AMBA_UART_FR & (1 << 3)) + barrier(); +} + +/* + * nothing to do + */ +#define arch_decomp_setup() +#define arch_decomp_wdog() diff --git a/include/asm-arm/arch-realview/vmalloc.h b/include/asm-arm/arch-realview/vmalloc.h new file mode 100644 index 000000000000..0ad49af186af --- /dev/null +++ b/include/asm-arm/arch-realview/vmalloc.h @@ -0,0 +1,21 @@ +/* + * linux/include/asm-arm/arch-realview/vmalloc.h + * + * Copyright (C) 2003 ARM Limited + * Copyright (C) 2000 Russell King. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ +#define VMALLOC_END (PAGE_OFFSET + 0x18000000) diff --git a/include/asm-arm/arch-rpc/hardware.h b/include/asm-arm/arch-rpc/hardware.h index be9754a05c19..9d7f87375aa7 100644 --- a/include/asm-arm/arch-rpc/hardware.h +++ b/include/asm-arm/arch-rpc/hardware.h @@ -15,7 +15,7 @@ #include <asm/arch/memory.h> #ifndef __ASSEMBLY__ -#define IOMEM(x) ((void __iomem *)(x)) +#define IOMEM(x) ((void __iomem *)(unsigned long)(x)) #else #define IOMEM(x) x #endif /* __ASSEMBLY__ */ @@ -52,7 +52,7 @@ /* * IO Addresses */ -#define VIDC_BASE (void __iomem *)0xe0400000 +#define VIDC_BASE IOMEM(0xe0400000) #define EXPMASK_BASE 0xe0360000 #define IOMD_BASE IOMEM(0xe0200000) #define IOC_BASE IOMEM(0xe0200000) diff --git a/include/asm-arm/arch-rpc/io.h b/include/asm-arm/arch-rpc/io.h index 24453c405a87..b4da08d7a336 100644 --- a/include/asm-arm/arch-rpc/io.h +++ b/include/asm-arm/arch-rpc/io.h @@ -13,6 +13,8 @@ #ifndef __ASM_ARM_ARCH_IO_H #define __ASM_ARM_ARCH_IO_H +#include <asm/hardware.h> + #define IO_SPACE_LIMIT 0xffffffff /* diff --git a/include/asm-arm/arch-rpc/memory.h b/include/asm-arm/arch-rpc/memory.h index 33fc75cdead0..0592cb3f0c74 100644 --- a/include/asm-arm/arch-rpc/memory.h +++ b/include/asm-arm/arch-rpc/memory.h @@ -21,7 +21,7 @@ /* * Physical DRAM offset. */ -#define PHYS_OFFSET (0x10000000UL) +#define PHYS_OFFSET UL(0x10000000) /* * These are exactly the same on the RiscPC as the diff --git a/include/asm-arm/arch-rpc/system.h b/include/asm-arm/arch-rpc/system.h index ca3277d1d5ea..729c2ae4b513 100644 --- a/include/asm-arm/arch-rpc/system.h +++ b/include/asm-arm/arch-rpc/system.h @@ -7,7 +7,7 @@ * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ -#include <asm/arch/hardware.h> +#include <asm/hardware.h> #include <asm/hardware/iomd.h> #include <asm/io.h> diff --git a/include/asm-arm/arch-s3c2410/anubis-map.h b/include/asm-arm/arch-s3c2410/anubis-map.h index 97741d6e506a..d529ffda8599 100644 --- a/include/asm-arm/arch-s3c2410/anubis-map.h +++ b/include/asm-arm/arch-s3c2410/anubis-map.h @@ -20,22 +20,22 @@ /* start peripherals off after the S3C2410 */ -#define ANUBIS_IOADDR(x) (S3C2410_ADDR((x) + 0x02000000)) +#define ANUBIS_IOADDR(x) (S3C2410_ADDR((x) + 0x01800000)) #define ANUBIS_PA_CPLD (S3C2410_CS1 | (1<<26)) /* we put the CPLD registers next, to get them out of the way */ -#define ANUBIS_VA_CTRL1 ANUBIS_IOADDR(0x00000000) /* 0x01300000 */ +#define ANUBIS_VA_CTRL1 ANUBIS_IOADDR(0x00000000) /* 0x01800000 */ #define ANUBIS_PA_CTRL1 (ANUBIS_PA_CPLD) -#define ANUBIS_VA_CTRL2 ANUBIS_IOADDR(0x00100000) /* 0x01400000 */ +#define ANUBIS_VA_CTRL2 ANUBIS_IOADDR(0x00100000) /* 0x01900000 */ #define ANUBIS_PA_CTRL2 (ANUBIS_PA_CPLD) -#define ANUBIS_VA_CTRL3 ANUBIS_IOADDR(0x00200000) /* 0x01500000 */ +#define ANUBIS_VA_CTRL3 ANUBIS_IOADDR(0x00200000) /* 0x01A00000 */ #define ANUBIS_PA_CTRL3 (ANUBIS_PA_CPLD) -#define ANUBIS_VA_CTRL4 ANUBIS_IOADDR(0x00300000) /* 0x01600000 */ +#define ANUBIS_VA_CTRL4 ANUBIS_IOADDR(0x00300000) /* 0x01B00000 */ #define ANUBIS_PA_CTRL4 (ANUBIS_PA_CPLD) #define ANUBIS_IDEPRI ANUBIS_IOADDR(0x01000000) diff --git a/include/asm-arm/arch-s3c2410/fb.h b/include/asm-arm/arch-s3c2410/fb.h index ac57bc887d82..4790491ba9d0 100644 --- a/include/asm-arm/arch-s3c2410/fb.h +++ b/include/asm-arm/arch-s3c2410/fb.h @@ -13,6 +13,7 @@ * 07-Sep-2004 RTP Created file * 03-Nov-2004 BJD Updated and minor cleanups * 03-Aug-2005 RTP Renamed to fb.h + * 26-Oct-2005 BJD Changed name of platdata init */ #ifndef __ASM_ARM_FB_H @@ -64,6 +65,6 @@ struct s3c2410fb_mach_info { unsigned long lpcsel; }; -void __init set_s3c2410fb_info(struct s3c2410fb_mach_info *hard_s3c2410fb_info); +extern void __init s3c24xx_fb_set_platdata(struct s3c2410fb_mach_info *); #endif /* __ASM_ARM_FB_H */ diff --git a/include/asm-arm/arch-s3c2410/hardware.h b/include/asm-arm/arch-s3c2410/hardware.h index 48a39918a760..1c9de29cafef 100644 --- a/include/asm-arm/arch-s3c2410/hardware.h +++ b/include/asm-arm/arch-s3c2410/hardware.h @@ -92,6 +92,13 @@ extern unsigned int s3c2410_gpio_getpin(unsigned int pin); extern unsigned int s3c2410_modify_misccr(unsigned int clr, unsigned int chg); +#ifdef CONFIG_CPU_S3C2440 + +extern int s3c2440_set_dsc(unsigned int pin, unsigned int value); + +#endif /* CONFIG_CPU_S3C2440 */ + + #endif /* __ASSEMBLY__ */ #include <asm/sizes.h> diff --git a/include/asm-arm/arch-s3c2410/io.h b/include/asm-arm/arch-s3c2410/io.h index 418233a7ee6f..16fbc8afffd9 100644 --- a/include/asm-arm/arch-s3c2410/io.h +++ b/include/asm-arm/arch-s3c2410/io.h @@ -9,12 +9,14 @@ * 06-Dec-1997 RMK Created. * 02-Sep-2003 BJD Modified for S3C2410 * 10-Mar-2005 LCVR Changed S3C2410_VA to S3C24XX_VA - * + * 13-Oct-2005 BJD Fixed problems with LDRH/STRH offset range */ #ifndef __ASM_ARM_ARCH_IO_H #define __ASM_ARM_ARCH_IO_H +#include <asm/hardware.h> + #define IO_SPACE_LIMIT 0xffffffff /* @@ -97,7 +99,7 @@ DECLARE_IO(int,l,"") else \ __asm__ __volatile__( \ "strb %0, [%1, #0] @ outbc" \ - : : "r" (value), "r" ((port))); \ + : : "r" (value), "r" ((port))); \ }) #define __inbc(port) \ @@ -110,35 +112,61 @@ DECLARE_IO(int,l,"") else \ __asm__ __volatile__( \ "ldrb %0, [%1, #0] @ inbc" \ - : "=r" (result) : "r" ((port))); \ + : "=r" (result) : "r" ((port))); \ result; \ }) #define __outwc(value,port) \ ({ \ unsigned long v = value; \ - if (__PORT_PCIO((port))) \ - __asm__ __volatile__( \ - "strh %0, [%1, %2] @ outwc" \ - : : "r" (v), "r" (PCIO_BASE), "Jr" ((port))); \ - else \ + if (__PORT_PCIO((port))) { \ + if ((port) < 256 && (port) > -256) \ + __asm__ __volatile__( \ + "strh %0, [%1, %2] @ outwc" \ + : : "r" (v), "r" (PCIO_BASE), "Jr" ((port))); \ + else if ((port) > 0) \ + __asm__ __volatile__( \ + "strh %0, [%1, %2] @ outwc" \ + : : "r" (v), \ + "r" (PCIO_BASE + ((port) & ~0xff)), \ + "Jr" (((port) & 0xff))); \ + else \ + __asm__ __volatile__( \ + "strh %0, [%1, #0] @ outwc" \ + : : "r" (v), \ + "r" (PCIO_BASE + (port))); \ + } else \ __asm__ __volatile__( \ "strh %0, [%1, #0] @ outwc" \ - : : "r" (v), "r" ((port))); \ + : : "r" (v), "r" ((port))); \ }) #define __inwc(port) \ ({ \ unsigned short result; \ - if (__PORT_PCIO((port))) \ - __asm__ __volatile__( \ - "ldrh %0, [%1, %2] @ inwc" \ - : "=r" (result) : "r" (PCIO_BASE), "Jr" ((port))); \ - else \ + if (__PORT_PCIO((port))) { \ + if ((port) < 256 && (port) > -256 ) \ + __asm__ __volatile__( \ + "ldrh %0, [%1, %2] @ inwc" \ + : "=r" (result) \ + : "r" (PCIO_BASE), \ + "Jr" ((port))); \ + else if ((port) > 0) \ + __asm__ __volatile__( \ + "ldrh %0, [%1, %2] @ inwc" \ + : "=r" (result) \ + : "r" (PCIO_BASE + ((port) & ~0xff)), \ + "Jr" (((port) & 0xff))); \ + else \ + __asm__ __volatile__( \ + "ldrh %0, [%1, #0] @ inwc" \ + : "=r" (result) \ + : "r" (PCIO_BASE + ((port)))); \ + } else \ __asm__ __volatile__( \ "ldrh %0, [%1, #0] @ inwc" \ - : "=r" (result) : "r" ((port))); \ - result; \ + : "=r" (result) : "r" ((port))); \ + result; \ }) #define __outlc(value,port) \ diff --git a/include/asm-arm/arch-s3c2410/memory.h b/include/asm-arm/arch-s3c2410/memory.h index 3380ab1d0749..6ab834a14c8e 100644 --- a/include/asm-arm/arch-s3c2410/memory.h +++ b/include/asm-arm/arch-s3c2410/memory.h @@ -28,9 +28,9 @@ * and at 0x0C000000 for S3C2400 */ #ifdef CONFIG_CPU_S3C2400 -#define PHYS_OFFSET (0x0C000000UL) +#define PHYS_OFFSET UL(0x0C000000) #else -#define PHYS_OFFSET (0x30000000UL) +#define PHYS_OFFSET UL(0x30000000) #endif /* diff --git a/include/asm-arm/arch-s3c2410/regs-clock.h b/include/asm-arm/arch-s3c2410/regs-clock.h index 16f4c3cc1388..34360706e016 100644 --- a/include/asm-arm/arch-s3c2410/regs-clock.h +++ b/include/asm-arm/arch-s3c2410/regs-clock.h @@ -18,7 +18,9 @@ * 10-Feb-2005 Ben Dooks Fixed CAMDIVN address (Guillaume Gourat) * 10-Mar-2005 Lucas Villa Real Changed S3C2410_VA to S3C24XX_VA * 27-Aug-2005 Ben Dooks Add clock-slow info - */ + * 20-Oct-2005 Ben Dooks Fixed overflow in PLL (Guillaume Gourat) + * 20-Oct-2005 Ben Dooks Add masks for DCLK (Guillaume Gourat) +*/ #ifndef __ASM_ARM_REGS_CLOCK #define __ASM_ARM_REGS_CLOCK "$Id: clock.h,v 1.4 2003/04/30 14:50:51 ben Exp $" @@ -66,11 +68,16 @@ #define S3C2410_DCLKCON_DCLK0_UCLK (1<<1) #define S3C2410_DCLKCON_DCLK0_DIV(x) (((x) - 1 )<<4) #define S3C2410_DCLKCON_DCLK0_CMP(x) (((x) - 1 )<<8) +#define S3C2410_DCLKCON_DCLK0_DIV_MASK ((0xf)<<4) +#define S3C2410_DCLKCON_DCLK0_CMP_MASK ((0xf)<<8) #define S3C2410_DCLKCON_DCLK1EN (1<<16) #define S3C2410_DCLKCON_DCLK1_PCLK (0<<17) #define S3C2410_DCLKCON_DCLK1_UCLK (1<<17) #define S3C2410_DCLKCON_DCLK1_DIV(x) (((x) - 1) <<20) +#define S3C2410_DCLKCON_DCLK1_CMP(x) (((x) - 1) <<24) +#define S3C2410_DCLKCON_DCLK1_DIV_MASK ((0xf) <<20) +#define S3C2410_DCLKCON_DCLK1_CMP_MASK ((0xf) <<24) #define S3C2410_CLKDIVN_PDIVN (1<<0) #define S3C2410_CLKDIVN_HDIVN (1<<1) @@ -83,10 +90,13 @@ #ifndef __ASSEMBLY__ +#include <asm/div64.h> + static inline unsigned int -s3c2410_get_pll(int pllval, int baseclk) +s3c2410_get_pll(unsigned int pllval, unsigned int baseclk) { - int mdiv, pdiv, sdiv; + unsigned int mdiv, pdiv, sdiv; + uint64_t fvco; mdiv = pllval >> S3C2410_PLLCON_MDIVSHIFT; pdiv = pllval >> S3C2410_PLLCON_PDIVSHIFT; @@ -96,7 +106,10 @@ s3c2410_get_pll(int pllval, int baseclk) pdiv &= S3C2410_PLLCON_PDIVMASK; sdiv &= S3C2410_PLLCON_SDIVMASK; - return (baseclk * (mdiv + 8)) / ((pdiv + 2) << sdiv); + fvco = (uint64_t)baseclk * (mdiv + 8); + do_div(fvco, (pdiv + 2) << sdiv); + + return (unsigned int)fvco; } #endif /* __ASSEMBLY__ */ diff --git a/include/asm-arm/arch-s3c2410/regs-gpio.h b/include/asm-arm/arch-s3c2410/regs-gpio.h index 2053cbacffc3..7f1be48ad67e 100644 --- a/include/asm-arm/arch-s3c2410/regs-gpio.h +++ b/include/asm-arm/arch-s3c2410/regs-gpio.h @@ -20,6 +20,8 @@ * 18-11-2004 BJD Added S3C2440 AC97 controls * 10-Mar-2005 LCVR Changed S3C2410_VA to S3C24XX_VA * 28-Mar-2005 LCVR Fixed definition of GPB10 + * 26-Oct-2005 BJD Added generic configuration types + * 27-Nov-2005 LCVR Added definitions to S3C2400 registers */ @@ -43,17 +45,26 @@ /* general configuration options */ #define S3C2410_GPIO_LEAVE (0xFFFFFFFF) +#define S3C2410_GPIO_INPUT (0xFFFFFFF0) +#define S3C2410_GPIO_OUTPUT (0xFFFFFFF1) +#define S3C2410_GPIO_IRQ (0xFFFFFFF2) /* not available for all */ +#define S3C2410_GPIO_SFN2 (0xFFFFFFF2) /* not available on A */ +#define S3C2410_GPIO_SFN3 (0xFFFFFFF3) /* not available on A */ /* configure GPIO ports A..G */ #define S3C2410_GPIOREG(x) ((x) + S3C24XX_VA_GPIO) -/* port A - 22bits, zero in bit X makes pin X output +/* port A - S3C2410: 22bits, zero in bit X makes pin X output + * S3C2400: 18bits, zero in bit X makes pin X output * 1 makes port special function, this is default */ #define S3C2410_GPACON S3C2410_GPIOREG(0x00) #define S3C2410_GPADAT S3C2410_GPIOREG(0x04) +#define S3C2400_GPACON S3C2410_GPIOREG(0x00) +#define S3C2400_GPADAT S3C2410_GPIOREG(0x04) + #define S3C2410_GPA0 S3C2410_GPIONO(S3C2410_GPIO_BANKA, 0) #define S3C2410_GPA0_OUT (0<<0) #define S3C2410_GPA0_ADDR0 (1<<0) @@ -97,34 +108,42 @@ #define S3C2410_GPA10 S3C2410_GPIONO(S3C2410_GPIO_BANKA, 10) #define S3C2410_GPA10_OUT (0<<10) #define S3C2410_GPA10_ADDR25 (1<<10) +#define S3C2400_GPA10_SCKE (1<<10) #define S3C2410_GPA11 S3C2410_GPIONO(S3C2410_GPIO_BANKA, 11) #define S3C2410_GPA11_OUT (0<<11) #define S3C2410_GPA11_ADDR26 (1<<11) +#define S3C2400_GPA11_nCAS0 (1<<11) #define S3C2410_GPA12 S3C2410_GPIONO(S3C2410_GPIO_BANKA, 12) #define S3C2410_GPA12_OUT (0<<12) #define S3C2410_GPA12_nGCS1 (1<<12) +#define S3C2400_GPA12_nCAS1 (1<<12) #define S3C2410_GPA13 S3C2410_GPIONO(S3C2410_GPIO_BANKA, 13) #define S3C2410_GPA13_OUT (0<<13) #define S3C2410_GPA13_nGCS2 (1<<13) +#define S3C2400_GPA13_nGCS1 (1<<13) #define S3C2410_GPA14 S3C2410_GPIONO(S3C2410_GPIO_BANKA, 14) #define S3C2410_GPA14_OUT (0<<14) #define S3C2410_GPA14_nGCS3 (1<<14) +#define S3C2400_GPA14_nGCS2 (1<<14) #define S3C2410_GPA15 S3C2410_GPIONO(S3C2410_GPIO_BANKA, 15) #define S3C2410_GPA15_OUT (0<<15) #define S3C2410_GPA15_nGCS4 (1<<15) +#define S3C2400_GPA15_nGCS3 (1<<15) #define S3C2410_GPA16 S3C2410_GPIONO(S3C2410_GPIO_BANKA, 16) #define S3C2410_GPA16_OUT (0<<16) #define S3C2410_GPA16_nGCS5 (1<<16) +#define S3C2400_GPA16_nGCS4 (1<<16) #define S3C2410_GPA17 S3C2410_GPIONO(S3C2410_GPIO_BANKA, 17) #define S3C2410_GPA17_OUT (0<<17) #define S3C2410_GPA17_CLE (1<<17) +#define S3C2400_GPA17_nGCS5 (1<<17) #define S3C2410_GPA18 S3C2410_GPIONO(S3C2410_GPIO_BANKA, 18) #define S3C2410_GPA18_OUT (0<<18) @@ -146,10 +165,16 @@ #define S3C2410_GPA22_OUT (0<<22) #define S3C2410_GPA22_nFCE (1<<22) -/* 0x08 and 0x0c are reserved */ +/* 0x08 and 0x0c are reserved on S3C2410 */ -/* GPB is 10 IO pins, each configured by 2 bits each in GPBCON. +/* S3C2410: + * GPB is 10 IO pins, each configured by 2 bits each in GPBCON. * 00 = input, 01 = output, 10=special function, 11=reserved + + * S3C2400: + * GPB is 16 IO pins, each configured by 2 bits each in GPBCON. + * 00 = input, 01 = output, 10=data, 11=special function + * bit 0,1 = pin 0, 2,3= pin 1... * * CPBUP = pull up resistor control, 1=disabled, 0=enabled @@ -159,63 +184,113 @@ #define S3C2410_GPBDAT S3C2410_GPIOREG(0x14) #define S3C2410_GPBUP S3C2410_GPIOREG(0x18) +#define S3C2400_GPBCON S3C2410_GPIOREG(0x08) +#define S3C2400_GPBDAT S3C2410_GPIOREG(0x0C) +#define S3C2400_GPBUP S3C2410_GPIOREG(0x10) + /* no i/o pin in port b can have value 3! */ #define S3C2410_GPB0 S3C2410_GPIONO(S3C2410_GPIO_BANKB, 0) #define S3C2410_GPB0_INP (0x00 << 0) #define S3C2410_GPB0_OUTP (0x01 << 0) #define S3C2410_GPB0_TOUT0 (0x02 << 0) +#define S3C2400_GPB0_DATA16 (0x02 << 0) #define S3C2410_GPB1 S3C2410_GPIONO(S3C2410_GPIO_BANKB, 1) #define S3C2410_GPB1_INP (0x00 << 2) #define S3C2410_GPB1_OUTP (0x01 << 2) #define S3C2410_GPB1_TOUT1 (0x02 << 2) +#define S3C2400_GPB1_DATA17 (0x02 << 2) #define S3C2410_GPB2 S3C2410_GPIONO(S3C2410_GPIO_BANKB, 2) #define S3C2410_GPB2_INP (0x00 << 4) #define S3C2410_GPB2_OUTP (0x01 << 4) #define S3C2410_GPB2_TOUT2 (0x02 << 4) +#define S3C2400_GPB2_DATA18 (0x02 << 4) +#define S3C2400_GPB2_TCLK1 (0x03 << 4) #define S3C2410_GPB3 S3C2410_GPIONO(S3C2410_GPIO_BANKB, 3) #define S3C2410_GPB3_INP (0x00 << 6) #define S3C2410_GPB3_OUTP (0x01 << 6) #define S3C2410_GPB3_TOUT3 (0x02 << 6) +#define S3C2400_GPB3_DATA19 (0x02 << 6) +#define S3C2400_GPB3_TXD1 (0x03 << 6) #define S3C2410_GPB4 S3C2410_GPIONO(S3C2410_GPIO_BANKB, 4) #define S3C2410_GPB4_INP (0x00 << 8) #define S3C2410_GPB4_OUTP (0x01 << 8) #define S3C2410_GPB4_TCLK0 (0x02 << 8) +#define S3C2400_GPB4_DATA20 (0x02 << 8) #define S3C2410_GPB4_MASK (0x03 << 8) +#define S3C2400_GPB4_RXD1 (0x03 << 8) +#define S3C2400_GPB4_MASK (0x03 << 8) #define S3C2410_GPB5 S3C2410_GPIONO(S3C2410_GPIO_BANKB, 5) #define S3C2410_GPB5_INP (0x00 << 10) #define S3C2410_GPB5_OUTP (0x01 << 10) #define S3C2410_GPB5_nXBACK (0x02 << 10) +#define S3C2400_GPB5_DATA21 (0x02 << 10) +#define S3C2400_GPB5_nCTS1 (0x03 << 10) #define S3C2410_GPB6 S3C2410_GPIONO(S3C2410_GPIO_BANKB, 6) #define S3C2410_GPB6_INP (0x00 << 12) #define S3C2410_GPB6_OUTP (0x01 << 12) #define S3C2410_GPB6_nXBREQ (0x02 << 12) +#define S3C2400_GPB6_DATA22 (0x02 << 12) +#define S3C2400_GPB6_nRTS1 (0x03 << 12) #define S3C2410_GPB7 S3C2410_GPIONO(S3C2410_GPIO_BANKB, 7) #define S3C2410_GPB7_INP (0x00 << 14) #define S3C2410_GPB7_OUTP (0x01 << 14) #define S3C2410_GPB7_nXDACK1 (0x02 << 14) +#define S3C2400_GPB7_DATA23 (0x02 << 14) #define S3C2410_GPB8 S3C2410_GPIONO(S3C2410_GPIO_BANKB, 8) #define S3C2410_GPB8_INP (0x00 << 16) #define S3C2410_GPB8_OUTP (0x01 << 16) #define S3C2410_GPB8_nXDREQ1 (0x02 << 16) +#define S3C2400_GPB8_DATA24 (0x02 << 16) #define S3C2410_GPB9 S3C2410_GPIONO(S3C2410_GPIO_BANKB, 9) #define S3C2410_GPB9_INP (0x00 << 18) #define S3C2410_GPB9_OUTP (0x01 << 18) #define S3C2410_GPB9_nXDACK0 (0x02 << 18) +#define S3C2400_GPB9_DATA25 (0x02 << 18) +#define S3C2400_GPB9_I2SSDI (0x03 << 18) #define S3C2410_GPB10 S3C2410_GPIONO(S3C2410_GPIO_BANKB, 10) #define S3C2410_GPB10_INP (0x00 << 20) #define S3C2410_GPB10_OUTP (0x01 << 20) #define S3C2410_GPB10_nXDRE0 (0x02 << 20) +#define S3C2400_GPB10_DATA26 (0x02 << 20) +#define S3C2400_GPB10_nSS (0x03 << 20) + +#define S3C2400_GPB11 S3C2410_GPIONO(S3C2410_GPIO_BANKB, 11) +#define S3C2400_GPB11_INP (0x00 << 22) +#define S3C2400_GPB11_OUTP (0x01 << 22) +#define S3C2400_GPB11_DATA27 (0x02 << 22) + +#define S3C2400_GPB12 S3C2410_GPIONO(S3C2410_GPIO_BANKB, 12) +#define S3C2400_GPB12_INP (0x00 << 24) +#define S3C2400_GPB12_OUTP (0x01 << 24) +#define S3C2400_GPB12_DATA28 (0x02 << 24) + +#define S3C2400_GPB13 S3C2410_GPIONO(S3C2410_GPIO_BANKB, 13) +#define S3C2400_GPB13_INP (0x00 << 26) +#define S3C2400_GPB13_OUTP (0x01 << 26) +#define S3C2400_GPB13_DATA29 (0x02 << 26) + +#define S3C2400_GPB14 S3C2410_GPIONO(S3C2410_GPIO_BANKB, 14) +#define S3C2400_GPB14_INP (0x00 << 28) +#define S3C2400_GPB14_OUTP (0x01 << 28) +#define S3C2400_GPB14_DATA30 (0x02 << 28) + +#define S3C2400_GPB15 S3C2410_GPIONO(S3C2410_GPIO_BANKB, 15) +#define S3C2400_GPB15_INP (0x00 << 30) +#define S3C2400_GPB15_OUTP (0x01 << 30) +#define S3C2400_GPB15_DATA31 (0x02 << 30) + +#define S3C2410_GPB_PUPDIS(x) (1<<(x)) /* Port C consits of 16 GPIO/Special function * @@ -227,150 +302,193 @@ #define S3C2410_GPCDAT S3C2410_GPIOREG(0x24) #define S3C2410_GPCUP S3C2410_GPIOREG(0x28) +#define S3C2400_GPCCON S3C2410_GPIOREG(0x14) +#define S3C2400_GPCDAT S3C2410_GPIOREG(0x18) +#define S3C2400_GPCUP S3C2410_GPIOREG(0x1C) + #define S3C2410_GPC0 S3C2410_GPIONO(S3C2410_GPIO_BANKC, 0) #define S3C2410_GPC0_INP (0x00 << 0) #define S3C2410_GPC0_OUTP (0x01 << 0) #define S3C2410_GPC0_LEND (0x02 << 0) +#define S3C2400_GPC0_VD0 (0x02 << 0) #define S3C2410_GPC1 S3C2410_GPIONO(S3C2410_GPIO_BANKC, 1) #define S3C2410_GPC1_INP (0x00 << 2) #define S3C2410_GPC1_OUTP (0x01 << 2) #define S3C2410_GPC1_VCLK (0x02 << 2) +#define S3C2400_GPC1_VD1 (0x02 << 2) #define S3C2410_GPC2 S3C2410_GPIONO(S3C2410_GPIO_BANKC, 2) #define S3C2410_GPC2_INP (0x00 << 4) #define S3C2410_GPC2_OUTP (0x01 << 4) #define S3C2410_GPC2_VLINE (0x02 << 4) +#define S3C2400_GPC2_VD2 (0x02 << 4) #define S3C2410_GPC3 S3C2410_GPIONO(S3C2410_GPIO_BANKC, 3) #define S3C2410_GPC3_INP (0x00 << 6) #define S3C2410_GPC3_OUTP (0x01 << 6) #define S3C2410_GPC3_VFRAME (0x02 << 6) +#define S3C2400_GPC3_VD3 (0x02 << 6) #define S3C2410_GPC4 S3C2410_GPIONO(S3C2410_GPIO_BANKC, 4) #define S3C2410_GPC4_INP (0x00 << 8) #define S3C2410_GPC4_OUTP (0x01 << 8) #define S3C2410_GPC4_VM (0x02 << 8) +#define S3C2400_GPC4_VD4 (0x02 << 8) #define S3C2410_GPC5 S3C2410_GPIONO(S3C2410_GPIO_BANKC, 5) #define S3C2410_GPC5_INP (0x00 << 10) #define S3C2410_GPC5_OUTP (0x01 << 10) #define S3C2410_GPC5_LCDVF0 (0x02 << 10) +#define S3C2400_GPC5_VD5 (0x02 << 10) #define S3C2410_GPC6 S3C2410_GPIONO(S3C2410_GPIO_BANKC, 6) #define S3C2410_GPC6_INP (0x00 << 12) #define S3C2410_GPC6_OUTP (0x01 << 12) #define S3C2410_GPC6_LCDVF1 (0x02 << 12) +#define S3C2400_GPC6_VD6 (0x02 << 12) #define S3C2410_GPC7 S3C2410_GPIONO(S3C2410_GPIO_BANKC, 7) #define S3C2410_GPC7_INP (0x00 << 14) #define S3C2410_GPC7_OUTP (0x01 << 14) #define S3C2410_GPC7_LCDVF2 (0x02 << 14) +#define S3C2400_GPC7_VD7 (0x02 << 14) #define S3C2410_GPC8 S3C2410_GPIONO(S3C2410_GPIO_BANKC, 8) #define S3C2410_GPC8_INP (0x00 << 16) #define S3C2410_GPC8_OUTP (0x01 << 16) #define S3C2410_GPC8_VD0 (0x02 << 16) +#define S3C2400_GPC8_VD8 (0x02 << 16) #define S3C2410_GPC9 S3C2410_GPIONO(S3C2410_GPIO_BANKC, 9) #define S3C2410_GPC9_INP (0x00 << 18) #define S3C2410_GPC9_OUTP (0x01 << 18) #define S3C2410_GPC9_VD1 (0x02 << 18) +#define S3C2400_GPC9_VD9 (0x02 << 18) #define S3C2410_GPC10 S3C2410_GPIONO(S3C2410_GPIO_BANKC, 10) #define S3C2410_GPC10_INP (0x00 << 20) #define S3C2410_GPC10_OUTP (0x01 << 20) #define S3C2410_GPC10_VD2 (0x02 << 20) +#define S3C2400_GPC10_VD10 (0x02 << 20) #define S3C2410_GPC11 S3C2410_GPIONO(S3C2410_GPIO_BANKC, 11) #define S3C2410_GPC11_INP (0x00 << 22) #define S3C2410_GPC11_OUTP (0x01 << 22) #define S3C2410_GPC11_VD3 (0x02 << 22) +#define S3C2400_GPC11_VD11 (0x02 << 22) #define S3C2410_GPC12 S3C2410_GPIONO(S3C2410_GPIO_BANKC, 12) #define S3C2410_GPC12_INP (0x00 << 24) #define S3C2410_GPC12_OUTP (0x01 << 24) #define S3C2410_GPC12_VD4 (0x02 << 24) +#define S3C2400_GPC12_VD12 (0x02 << 24) #define S3C2410_GPC13 S3C2410_GPIONO(S3C2410_GPIO_BANKC, 13) #define S3C2410_GPC13_INP (0x00 << 26) #define S3C2410_GPC13_OUTP (0x01 << 26) #define S3C2410_GPC13_VD5 (0x02 << 26) +#define S3C2400_GPC13_VD13 (0x02 << 26) #define S3C2410_GPC14 S3C2410_GPIONO(S3C2410_GPIO_BANKC, 14) #define S3C2410_GPC14_INP (0x00 << 28) #define S3C2410_GPC14_OUTP (0x01 << 28) #define S3C2410_GPC14_VD6 (0x02 << 28) +#define S3C2400_GPC14_VD14 (0x02 << 28) #define S3C2410_GPC15 S3C2410_GPIONO(S3C2410_GPIO_BANKC, 15) #define S3C2410_GPC15_INP (0x00 << 30) #define S3C2410_GPC15_OUTP (0x01 << 30) #define S3C2410_GPC15_VD7 (0x02 << 30) +#define S3C2400_GPC15_VD15 (0x02 << 30) + +#define S3C2410_GPC_PUPDIS(x) (1<<(x)) -/* Port D consists of 16 GPIO/Special function +/* + * S3C2410: Port D consists of 16 GPIO/Special function * * almost identical setup to port b, but the special functions are mostly * to do with the video system's data. + * + * S3C2400: Port D consists of 11 GPIO/Special function + * + * almost identical setup to port c */ #define S3C2410_GPDCON S3C2410_GPIOREG(0x30) #define S3C2410_GPDDAT S3C2410_GPIOREG(0x34) #define S3C2410_GPDUP S3C2410_GPIOREG(0x38) +#define S3C2400_GPDCON S3C2410_GPIOREG(0x20) +#define S3C2400_GPDDAT S3C2410_GPIOREG(0x24) +#define S3C2400_GPDUP S3C2410_GPIOREG(0x28) + #define S3C2410_GPD0 S3C2410_GPIONO(S3C2410_GPIO_BANKD, 0) #define S3C2410_GPD0_INP (0x00 << 0) #define S3C2410_GPD0_OUTP (0x01 << 0) #define S3C2410_GPD0_VD8 (0x02 << 0) +#define S3C2400_GPD0_VFRAME (0x02 << 0) #define S3C2410_GPD1 S3C2410_GPIONO(S3C2410_GPIO_BANKD, 1) #define S3C2410_GPD1_INP (0x00 << 2) #define S3C2410_GPD1_OUTP (0x01 << 2) #define S3C2410_GPD1_VD9 (0x02 << 2) +#define S3C2400_GPD1_VM (0x02 << 2) #define S3C2410_GPD2 S3C2410_GPIONO(S3C2410_GPIO_BANKD, 2) #define S3C2410_GPD2_INP (0x00 << 4) #define S3C2410_GPD2_OUTP (0x01 << 4) #define S3C2410_GPD2_VD10 (0x02 << 4) +#define S3C2400_GPD2_VLINE (0x02 << 4) #define S3C2410_GPD3 S3C2410_GPIONO(S3C2410_GPIO_BANKD, 3) #define S3C2410_GPD3_INP (0x00 << 6) #define S3C2410_GPD3_OUTP (0x01 << 6) #define S3C2410_GPD3_VD11 (0x02 << 6) +#define S3C2400_GPD3_VCLK (0x02 << 6) #define S3C2410_GPD4 S3C2410_GPIONO(S3C2410_GPIO_BANKD, 4) #define S3C2410_GPD4_INP (0x00 << 8) #define S3C2410_GPD4_OUTP (0x01 << 8) #define S3C2410_GPD4_VD12 (0x02 << 8) +#define S3C2400_GPD4_LEND (0x02 << 8) #define S3C2410_GPD5 S3C2410_GPIONO(S3C2410_GPIO_BANKD, 5) #define S3C2410_GPD5_INP (0x00 << 10) #define S3C2410_GPD5_OUTP (0x01 << 10) #define S3C2410_GPD5_VD13 (0x02 << 10) +#define S3C2400_GPD5_TOUT0 (0x02 << 10) #define S3C2410_GPD6 S3C2410_GPIONO(S3C2410_GPIO_BANKD, 6) #define S3C2410_GPD6_INP (0x00 << 12) #define S3C2410_GPD6_OUTP (0x01 << 12) #define S3C2410_GPD6_VD14 (0x02 << 12) +#define S3C2400_GPD6_TOUT1 (0x02 << 12) #define S3C2410_GPD7 S3C2410_GPIONO(S3C2410_GPIO_BANKD, 7) #define S3C2410_GPD7_INP (0x00 << 14) #define S3C2410_GPD7_OUTP (0x01 << 14) #define S3C2410_GPD7_VD15 (0x02 << 14) +#define S3C2400_GPD7_TOUT2 (0x02 << 14) #define S3C2410_GPD8 S3C2410_GPIONO(S3C2410_GPIO_BANKD, 8) #define S3C2410_GPD8_INP (0x00 << 16) #define S3C2410_GPD8_OUTP (0x01 << 16) #define S3C2410_GPD8_VD16 (0x02 << 16) +#define S3C2400_GPD8_TOUT3 (0x02 << 16) #define S3C2410_GPD9 S3C2410_GPIONO(S3C2410_GPIO_BANKD, 9) #define S3C2410_GPD9_INP (0x00 << 18) #define S3C2410_GPD9_OUTP (0x01 << 18) #define S3C2410_GPD9_VD17 (0x02 << 18) +#define S3C2400_GPD9_TCLK0 (0x02 << 18) +#define S3C2410_GPD9_MASK (0x03 << 18) #define S3C2410_GPD10 S3C2410_GPIONO(S3C2410_GPIO_BANKD, 10) #define S3C2410_GPD10_INP (0x00 << 20) #define S3C2410_GPD10_OUTP (0x01 << 20) #define S3C2410_GPD10_VD18 (0x02 << 20) +#define S3C2400_GPD10_nWAIT (0x02 << 20) #define S3C2410_GPD11 S3C2410_GPIONO(S3C2410_GPIO_BANKD, 11) #define S3C2410_GPD11_INP (0x00 << 22) @@ -397,37 +515,56 @@ #define S3C2410_GPD15_OUTP (0x01 << 30) #define S3C2410_GPD15_VD23 (0x02 << 30) -/* Port E consists of 16 GPIO/Special function +#define S3C2410_GPD_PUPDIS(x) (1<<(x)) + +/* S3C2410: + * Port E consists of 16 GPIO/Special function * * again, the same as port B, but dealing with I2S, SDI, and * more miscellaneous functions + * + * S3C2400: + * Port E consists of 12 GPIO/Special function + * + * GPIO / interrupt inputs */ #define S3C2410_GPECON S3C2410_GPIOREG(0x40) #define S3C2410_GPEDAT S3C2410_GPIOREG(0x44) #define S3C2410_GPEUP S3C2410_GPIOREG(0x48) +#define S3C2400_GPECON S3C2410_GPIOREG(0x2C) +#define S3C2400_GPEDAT S3C2410_GPIOREG(0x30) +#define S3C2400_GPEUP S3C2410_GPIOREG(0x34) + #define S3C2410_GPE0 S3C2410_GPIONO(S3C2410_GPIO_BANKE, 0) #define S3C2410_GPE0_INP (0x00 << 0) #define S3C2410_GPE0_OUTP (0x01 << 0) #define S3C2410_GPE0_I2SLRCK (0x02 << 0) +#define S3C2400_GPE0_EINT0 (0x02 << 0) #define S3C2410_GPE0_MASK (0x03 << 0) #define S3C2410_GPE1 S3C2410_GPIONO(S3C2410_GPIO_BANKE, 1) #define S3C2410_GPE1_INP (0x00 << 2) #define S3C2410_GPE1_OUTP (0x01 << 2) #define S3C2410_GPE1_I2SSCLK (0x02 << 2) +#define S3C2400_GPE1_EINT1 (0x02 << 2) +#define S3C2400_GPE1_nSS (0x03 << 2) #define S3C2410_GPE1_MASK (0x03 << 2) #define S3C2410_GPE2 S3C2410_GPIONO(S3C2410_GPIO_BANKE, 2) #define S3C2410_GPE2_INP (0x00 << 4) #define S3C2410_GPE2_OUTP (0x01 << 4) #define S3C2410_GPE2_CDCLK (0x02 << 4) +#define S3C2400_GPE2_EINT2 (0x02 << 4) +#define S3C2400_GPE2_I2SSDI (0x03 << 4) #define S3C2410_GPE3 S3C2410_GPIONO(S3C2410_GPIO_BANKE, 3) #define S3C2410_GPE3_INP (0x00 << 6) #define S3C2410_GPE3_OUTP (0x01 << 6) #define S3C2410_GPE3_I2SSDI (0x02 << 6) +#define S3C2400_GPE3_EINT3 (0x02 << 6) +#define S3C2400_GPE3_nCTS1 (0x03 << 6) #define S3C2410_GPE3_nSS0 (0x03 << 6) #define S3C2410_GPE3_MASK (0x03 << 6) @@ -435,6 +572,8 @@ #define S3C2410_GPE4_INP (0x00 << 8) #define S3C2410_GPE4_OUTP (0x01 << 8) #define S3C2410_GPE4_I2SSDO (0x02 << 8) +#define S3C2400_GPE4_EINT4 (0x02 << 8) +#define S3C2400_GPE4_nRTS1 (0x03 << 8) #define S3C2410_GPE4_I2SSDI (0x03 << 8) #define S3C2410_GPE4_MASK (0x03 << 8) @@ -442,36 +581,46 @@ #define S3C2410_GPE5_INP (0x00 << 10) #define S3C2410_GPE5_OUTP (0x01 << 10) #define S3C2410_GPE5_SDCLK (0x02 << 10) +#define S3C2400_GPE5_EINT5 (0x02 << 10) +#define S3C2400_GPE5_TCLK1 (0x03 << 10) #define S3C2410_GPE6 S3C2410_GPIONO(S3C2410_GPIO_BANKE, 6) #define S3C2410_GPE6_INP (0x00 << 12) #define S3C2410_GPE6_OUTP (0x01 << 12) #define S3C2410_GPE6_SDCMD (0x02 << 12) +#define S3C2400_GPE6_EINT6 (0x02 << 12) #define S3C2410_GPE7 S3C2410_GPIONO(S3C2410_GPIO_BANKE, 7) #define S3C2410_GPE7_INP (0x00 << 14) #define S3C2410_GPE7_OUTP (0x01 << 14) #define S3C2410_GPE7_SDDAT0 (0x02 << 14) +#define S3C2400_GPE7_EINT7 (0x02 << 14) #define S3C2410_GPE8 S3C2410_GPIONO(S3C2410_GPIO_BANKE, 8) #define S3C2410_GPE8_INP (0x00 << 16) #define S3C2410_GPE8_OUTP (0x01 << 16) #define S3C2410_GPE8_SDDAT1 (0x02 << 16) +#define S3C2400_GPE8_nXDACK0 (0x02 << 16) #define S3C2410_GPE9 S3C2410_GPIONO(S3C2410_GPIO_BANKE, 9) #define S3C2410_GPE9_INP (0x00 << 18) #define S3C2410_GPE9_OUTP (0x01 << 18) #define S3C2410_GPE9_SDDAT2 (0x02 << 18) +#define S3C2400_GPE9_nXDACK1 (0x02 << 18) +#define S3C2400_GPE9_nXBACK (0x03 << 18) #define S3C2410_GPE10 S3C2410_GPIONO(S3C2410_GPIO_BANKE, 10) #define S3C2410_GPE10_INP (0x00 << 20) #define S3C2410_GPE10_OUTP (0x01 << 20) #define S3C2410_GPE10_SDDAT3 (0x02 << 20) +#define S3C2400_GPE10_nXDREQ0 (0x02 << 20) #define S3C2410_GPE11 S3C2410_GPIONO(S3C2410_GPIO_BANKE, 11) #define S3C2410_GPE11_INP (0x00 << 22) #define S3C2410_GPE11_OUTP (0x01 << 22) #define S3C2410_GPE11_SPIMISO0 (0x02 << 22) +#define S3C2400_GPE11_nXDREQ1 (0x02 << 22) +#define S3C2400_GPE11_nXBREQ (0x03 << 22) #define S3C2410_GPE12 S3C2410_GPIONO(S3C2410_GPIO_BANKE, 12) #define S3C2410_GPE12_INP (0x00 << 24) @@ -503,7 +652,8 @@ #define S3C2410_GPE_PUPDIS(x) (1<<(x)) -/* Port F consists of 8 GPIO/Special function +/* S3C2410: + * Port F consists of 8 GPIO/Special function * * GPIO / interrupt inputs * @@ -511,100 +661,141 @@ * 00 = 0 input, 1 output, 2 interrupt (EINT0..7), 3 undefined * * pull up works like all other ports. + * + * S3C2400: + * Port F consists of 7 GPIO/Special function + * + * GPIO/serial/misc pins */ #define S3C2410_GPFCON S3C2410_GPIOREG(0x50) #define S3C2410_GPFDAT S3C2410_GPIOREG(0x54) #define S3C2410_GPFUP S3C2410_GPIOREG(0x58) +#define S3C2400_GPFCON S3C2410_GPIOREG(0x38) +#define S3C2400_GPFDAT S3C2410_GPIOREG(0x3C) +#define S3C2400_GPFUP S3C2410_GPIOREG(0x40) + #define S3C2410_GPF0 S3C2410_GPIONO(S3C2410_GPIO_BANKF, 0) #define S3C2410_GPF0_INP (0x00 << 0) #define S3C2410_GPF0_OUTP (0x01 << 0) #define S3C2410_GPF0_EINT0 (0x02 << 0) +#define S3C2400_GPF0_RXD0 (0x02 << 0) #define S3C2410_GPF1 S3C2410_GPIONO(S3C2410_GPIO_BANKF, 1) #define S3C2410_GPF1_INP (0x00 << 2) #define S3C2410_GPF1_OUTP (0x01 << 2) #define S3C2410_GPF1_EINT1 (0x02 << 2) +#define S3C2400_GPF1_RXD1 (0x02 << 2) +#define S3C2400_GPF1_IICSDA (0x03 << 2) #define S3C2410_GPF2 S3C2410_GPIONO(S3C2410_GPIO_BANKF, 2) #define S3C2410_GPF2_INP (0x00 << 4) #define S3C2410_GPF2_OUTP (0x01 << 4) #define S3C2410_GPF2_EINT2 (0x02 << 4) +#define S3C2400_GPF2_TXD0 (0x02 << 4) #define S3C2410_GPF3 S3C2410_GPIONO(S3C2410_GPIO_BANKF, 3) #define S3C2410_GPF3_INP (0x00 << 6) #define S3C2410_GPF3_OUTP (0x01 << 6) #define S3C2410_GPF3_EINT3 (0x02 << 6) +#define S3C2400_GPF3_TXD1 (0x02 << 6) +#define S3C2400_GPF3_IICSCL (0x03 << 6) #define S3C2410_GPF4 S3C2410_GPIONO(S3C2410_GPIO_BANKF, 4) #define S3C2410_GPF4_INP (0x00 << 8) #define S3C2410_GPF4_OUTP (0x01 << 8) #define S3C2410_GPF4_EINT4 (0x02 << 8) +#define S3C2400_GPF4_nRTS0 (0x02 << 8) +#define S3C2400_GPF4_nXBACK (0x03 << 8) #define S3C2410_GPF5 S3C2410_GPIONO(S3C2410_GPIO_BANKF, 5) #define S3C2410_GPF5_INP (0x00 << 10) #define S3C2410_GPF5_OUTP (0x01 << 10) #define S3C2410_GPF5_EINT5 (0x02 << 10) +#define S3C2400_GPF5_nCTS0 (0x02 << 10) +#define S3C2400_GPF5_nXBREQ (0x03 << 10) #define S3C2410_GPF6 S3C2410_GPIONO(S3C2410_GPIO_BANKF, 6) #define S3C2410_GPF6_INP (0x00 << 12) #define S3C2410_GPF6_OUTP (0x01 << 12) #define S3C2410_GPF6_EINT6 (0x02 << 12) +#define S3C2400_GPF6_CLKOUT (0x02 << 12) #define S3C2410_GPF7 S3C2410_GPIONO(S3C2410_GPIO_BANKF, 7) #define S3C2410_GPF7_INP (0x00 << 14) #define S3C2410_GPF7_OUTP (0x01 << 14) #define S3C2410_GPF7_EINT7 (0x02 << 14) -/* Port G consists of 8 GPIO/IRQ/Special function +#define S3C2410_GPF_PUPDIS(x) (1<<(x)) + +/* S3C2410: + * Port G consists of 8 GPIO/IRQ/Special function * * GPGCON has 2 bits for each of the input pins on port F * 00 = 0 input, 1 output, 2 interrupt (EINT0..7), 3 special func * * pull up works like all other ports. + * + * S3C2400: + * Port G consists of 10 GPIO/Special function */ #define S3C2410_GPGCON S3C2410_GPIOREG(0x60) #define S3C2410_GPGDAT S3C2410_GPIOREG(0x64) #define S3C2410_GPGUP S3C2410_GPIOREG(0x68) +#define S3C2400_GPGCON S3C2410_GPIOREG(0x44) +#define S3C2400_GPGDAT S3C2410_GPIOREG(0x48) +#define S3C2400_GPGUP S3C2410_GPIOREG(0x4C) + #define S3C2410_GPG0 S3C2410_GPIONO(S3C2410_GPIO_BANKG, 0) #define S3C2410_GPG0_INP (0x00 << 0) #define S3C2410_GPG0_OUTP (0x01 << 0) #define S3C2410_GPG0_EINT8 (0x02 << 0) +#define S3C2400_GPG0_I2SLRCK (0x02 << 0) #define S3C2410_GPG1 S3C2410_GPIONO(S3C2410_GPIO_BANKG, 1) #define S3C2410_GPG1_INP (0x00 << 2) #define S3C2410_GPG1_OUTP (0x01 << 2) #define S3C2410_GPG1_EINT9 (0x02 << 2) +#define S3C2400_GPG1_I2SSCLK (0x02 << 2) #define S3C2410_GPG2 S3C2410_GPIONO(S3C2410_GPIO_BANKG, 2) #define S3C2410_GPG2_INP (0x00 << 4) #define S3C2410_GPG2_OUTP (0x01 << 4) #define S3C2410_GPG2_EINT10 (0x02 << 4) +#define S3C2400_GPG2_CDCLK (0x02 << 4) #define S3C2410_GPG3 S3C2410_GPIONO(S3C2410_GPIO_BANKG, 3) #define S3C2410_GPG3_INP (0x00 << 6) #define S3C2410_GPG3_OUTP (0x01 << 6) #define S3C2410_GPG3_EINT11 (0x02 << 6) +#define S3C2400_GPG3_I2SSDO (0x02 << 6) +#define S3C2400_GPG3_I2SSDI (0x03 << 6) #define S3C2410_GPG4 S3C2410_GPIONO(S3C2410_GPIO_BANKG, 4) #define S3C2410_GPG4_INP (0x00 << 8) #define S3C2410_GPG4_OUTP (0x01 << 8) #define S3C2410_GPG4_EINT12 (0x02 << 8) +#define S3C2400_GPG4_MMCCLK (0x02 << 8) +#define S3C2400_GPG4_I2SSDI (0x03 << 8) #define S3C2410_GPG4_LCDPWREN (0x03 << 8) #define S3C2410_GPG5 S3C2410_GPIONO(S3C2410_GPIO_BANKG, 5) #define S3C2410_GPG5_INP (0x00 << 10) #define S3C2410_GPG5_OUTP (0x01 << 10) #define S3C2410_GPG5_EINT13 (0x02 << 10) +#define S3C2400_GPG5_MMCCMD (0x02 << 10) +#define S3C2400_GPG5_IICSDA (0x03 << 10) #define S3C2410_GPG5_SPIMISO1 (0x03 << 10) #define S3C2410_GPG6 S3C2410_GPIONO(S3C2410_GPIO_BANKG, 6) #define S3C2410_GPG6_INP (0x00 << 12) #define S3C2410_GPG6_OUTP (0x01 << 12) #define S3C2410_GPG6_EINT14 (0x02 << 12) +#define S3C2400_GPG6_MMCDAT (0x02 << 12) +#define S3C2400_GPG6_IICSCL (0x03 << 12) #define S3C2410_GPG6_SPIMOSI1 (0x03 << 12) #define S3C2410_GPG7 S3C2410_GPIONO(S3C2410_GPIO_BANKG, 7) @@ -612,16 +803,22 @@ #define S3C2410_GPG7_OUTP (0x01 << 14) #define S3C2410_GPG7_EINT15 (0x02 << 14) #define S3C2410_GPG7_SPICLK1 (0x03 << 14) +#define S3C2400_GPG7_SPIMISO (0x02 << 14) +#define S3C2400_GPG7_IICSDA (0x03 << 14) #define S3C2410_GPG8 S3C2410_GPIONO(S3C2410_GPIO_BANKG, 8) #define S3C2410_GPG8_INP (0x00 << 16) #define S3C2410_GPG8_OUTP (0x01 << 16) #define S3C2410_GPG8_EINT16 (0x02 << 16) +#define S3C2400_GPG8_SPIMOSI (0x02 << 16) +#define S3C2400_GPG8_IICSCL (0x03 << 16) #define S3C2410_GPG9 S3C2410_GPIONO(S3C2410_GPIO_BANKG, 9) #define S3C2410_GPG9_INP (0x00 << 18) #define S3C2410_GPG9_OUTP (0x01 << 18) #define S3C2410_GPG9_EINT17 (0x02 << 18) +#define S3C2400_GPG9_SPICLK (0x02 << 18) +#define S3C2400_GPG9_MMCCLK (0x03 << 18) #define S3C2410_GPG10 S3C2410_GPIONO(S3C2410_GPIO_BANKG, 10) #define S3C2410_GPG10_INP (0x00 << 20) @@ -731,19 +928,27 @@ #define S3C2410_GPH10_CLKOUT1 (0x02 << 20) /* miscellaneous control */ - +#define S3C2400_MISCCR S3C2410_GPIOREG(0x54) #define S3C2410_MISCCR S3C2410_GPIOREG(0x80) #define S3C2410_DCLKCON S3C2410_GPIOREG(0x84) /* see clock.h for dclk definitions */ /* pullup control on databus */ -#define S3C2410_MISCCR_SPUCR_HEN (0) +#define S3C2410_MISCCR_SPUCR_HEN (0<<0) #define S3C2410_MISCCR_SPUCR_HDIS (1<<0) -#define S3C2410_MISCCR_SPUCR_LEN (0) +#define S3C2410_MISCCR_SPUCR_LEN (0<<1) #define S3C2410_MISCCR_SPUCR_LDIS (1<<1) -#define S3C2410_MISCCR_USBDEV (0) +#define S3C2400_MISCCR_SPUCR_LEN (0<<0) +#define S3C2400_MISCCR_SPUCR_LDIS (1<<0) +#define S3C2400_MISCCR_SPUCR_HEN (0<<1) +#define S3C2400_MISCCR_SPUCR_HDIS (1<<1) + +#define S3C2400_MISCCR_HZ_STOPEN (0<<2) +#define S3C2400_MISCCR_HZ_STOPPREV (1<<2) + +#define S3C2410_MISCCR_USBDEV (0<<3) #define S3C2410_MISCCR_USBHOST (1<<3) #define S3C2410_MISCCR_CLK0_MPLL (0<<4) @@ -779,7 +984,7 @@ * * Samsung datasheet p9-25 */ - +#define S3C2400_EXTINT0 S3C2410_GPIOREG(0x58) #define S3C2410_EXTINT0 S3C2410_GPIOREG(0x88) #define S3C2410_EXTINT1 S3C2410_GPIOREG(0x8C) #define S3C2410_EXTINT2 S3C2410_GPIOREG(0x90) @@ -827,5 +1032,21 @@ #define S3C2410_GSTATUS2_OFFRESET (1<<1) #define S3C2410_GSTATUS2_PONRESET (1<<0) +/* open drain control register */ +#define S3C2400_OPENCR S3C2410_GPIOREG(0x50) + +#define S3C2400_OPENCR_OPC_RXD1DIS (0<<0) +#define S3C2400_OPENCR_OPC_RXD1EN (1<<0) +#define S3C2400_OPENCR_OPC_TXD1DIS (0<<1) +#define S3C2400_OPENCR_OPC_TXD1EN (1<<1) +#define S3C2400_OPENCR_OPC_CMDDIS (0<<2) +#define S3C2400_OPENCR_OPC_CMDEN (1<<2) +#define S3C2400_OPENCR_OPC_DATDIS (0<<3) +#define S3C2400_OPENCR_OPC_DATEN (1<<3) +#define S3C2400_OPENCR_OPC_MISODIS (0<<4) +#define S3C2400_OPENCR_OPC_MISOEN (1<<4) +#define S3C2400_OPENCR_OPC_MOSIDIS (0<<5) +#define S3C2400_OPENCR_OPC_MOSIEN (1<<5) + #endif /* __ASM_ARCH_REGS_GPIO_H */ diff --git a/include/asm-arm/arch-s3c2410/regs-iis.h b/include/asm-arm/arch-s3c2410/regs-iis.h index fdd62e8cd6cb..7fdde9b91cb4 100644 --- a/include/asm-arm/arch-s3c2410/regs-iis.h +++ b/include/asm-arm/arch-s3c2410/regs-iis.h @@ -55,6 +55,7 @@ #define S3C2410_IISMOD_16FS (0<<0) #define S3C2410_IISMOD_32FS (1<<0) #define S3C2410_IISMOD_48FS (2<<0) +#define S3C2410_IISMOD_FS_MASK (3<<0) #define S3C2410_IISPSR (0x08) #define S3C2410_IISPSR_INTMASK (31<<5) diff --git a/include/asm-arm/arch-s3c2410/uncompress.h b/include/asm-arm/arch-s3c2410/uncompress.h index d7a4a8354fa9..ddd1578a7ee0 100644 --- a/include/asm-arm/arch-s3c2410/uncompress.h +++ b/include/asm-arm/arch-s3c2410/uncompress.h @@ -116,6 +116,8 @@ putstr(const char *ptr) } } +#define __raw_writel(d,ad) do { *((volatile unsigned int *)(ad)) = (d); } while(0) + /* CONFIG_S3C2410_BOOT_WATCHDOG * * Simple boot-time watchdog setup, to reboot the system if there is @@ -126,8 +128,6 @@ putstr(const char *ptr) #define WDOG_COUNT (0xff00) -#define __raw_writel(d,ad) do { *((volatile unsigned int *)(ad)) = (d); } while(0) - static inline void arch_decomp_wdog(void) { __raw_writel(WDOG_COUNT, S3C2410_WTCNT); @@ -145,6 +145,24 @@ static void arch_decomp_wdog_start(void) #define arch_decomp_wdog() #endif +#ifdef CONFIG_S3C2410_BOOT_ERROR_RESET + +static void arch_decomp_error(const char *x) +{ + putstr("\n\n"); + putstr(x); + putstr("\n\n -- System resetting\n"); + + __raw_writel(0x4000, S3C2410_WTDAT); + __raw_writel(0x4000, S3C2410_WTCNT); + __raw_writel(S3C2410_WTCON_ENABLE | S3C2410_WTCON_DIV128 | S3C2410_WTCON_RSTEN | S3C2410_WTCON_PRESCALE(0x40), S3C2410_WTCON); + + while(1); +} + +#define arch_error arch_decomp_error +#endif + static void error(char *err); static void diff --git a/include/asm-arm/arch-sa1100/hardware.h b/include/asm-arm/arch-sa1100/hardware.h index 19c3b1e186bb..28711aaa4968 100644 --- a/include/asm-arm/arch-sa1100/hardware.h +++ b/include/asm-arm/arch-sa1100/hardware.h @@ -22,13 +22,6 @@ /* - * We requires absolute addresses i.e. (PCMCIA_IO_0_BASE + 0x3f8) for - * in*()/out*() macros to be usable for all cases. - */ -#define PCIO_BASE 0 - - -/* * SA1100 internal I/O mappings * * We have the following mapping: diff --git a/include/asm-arm/arch-sa1100/io.h b/include/asm-arm/arch-sa1100/io.h index 7d969ffbd3bb..040ccde7a11e 100644 --- a/include/asm-arm/arch-sa1100/io.h +++ b/include/asm-arm/arch-sa1100/io.h @@ -16,7 +16,11 @@ * We don't actually have real ISA nor PCI buses, but there is so many * drivers out there that might just work if we fake them... */ -#define __io(a) ((void __iomem *)(PCIO_BASE + (a))) +static inline void __iomem *__io(unsigned long addr) +{ + return (void __iomem *)addr; +} +#define __io(a) __io(a) #define __mem_pci(a) (a) #define __mem_isa(a) (a) diff --git a/include/asm-arm/arch-sa1100/memory.h b/include/asm-arm/arch-sa1100/memory.h index 8743ff5c1b23..018a9f0e3986 100644 --- a/include/asm-arm/arch-sa1100/memory.h +++ b/include/asm-arm/arch-sa1100/memory.h @@ -13,25 +13,15 @@ /* * Physical DRAM offset is 0xc0000000 on the SA1100 */ -#define PHYS_OFFSET (0xc0000000UL) +#define PHYS_OFFSET UL(0xc0000000) #ifndef __ASSEMBLY__ #ifdef CONFIG_SA1111 -static inline void -__arch_adjust_zones(int node, unsigned long *size, unsigned long *holes) -{ - unsigned int sz = SZ_1M >> PAGE_SHIFT; - - if (node != 0) - sz = 0; - - size[1] = size[0] - sz; - size[0] = sz; -} +void sa1111_adjust_zones(int node, unsigned long *size, unsigned long *holes); #define arch_adjust_zones(node, size, holes) \ - __arch_adjust_zones(node, size, holes) + sa1111_adjust_zones(node, size, holes) #define ISA_DMA_THRESHOLD (PHYS_OFFSET + SZ_1M - 1) diff --git a/include/asm-arm/arch-sa1100/system.h b/include/asm-arm/arch-sa1100/system.h index 6f52118ba1a4..0f0612f79b2b 100644 --- a/include/asm-arm/arch-sa1100/system.h +++ b/include/asm-arm/arch-sa1100/system.h @@ -4,6 +4,7 @@ * Copyright (c) 1999 Nicolas Pitre <nico@cam.org> */ #include <linux/config.h> +#include <asm/hardware.h> static inline void arch_idle(void) { diff --git a/include/asm-arm/arch-shark/io.h b/include/asm-arm/arch-shark/io.h index 5e6ed0038b2b..87ffa27f2962 100644 --- a/include/asm-arm/arch-shark/io.h +++ b/include/asm-arm/arch-shark/io.h @@ -11,6 +11,8 @@ #ifndef __ASM_ARM_ARCH_IO_H #define __ASM_ARM_ARCH_IO_H +#include <asm/hardware.h> + #define IO_SPACE_LIMIT 0xffffffff /* diff --git a/include/asm-arm/arch-shark/memory.h b/include/asm-arm/arch-shark/memory.h index 8ff956d25463..95a29b4bc5d0 100644 --- a/include/asm-arm/arch-shark/memory.h +++ b/include/asm-arm/arch-shark/memory.h @@ -15,7 +15,7 @@ /* * Physical DRAM offset. */ -#define PHYS_OFFSET (0x08000000UL) +#define PHYS_OFFSET UL(0x08000000) #ifndef __ASSEMBLY__ diff --git a/include/asm-arm/arch-versatile/io.h b/include/asm-arm/arch-versatile/io.h index 9f895bf61494..47e904cf25c7 100644 --- a/include/asm-arm/arch-versatile/io.h +++ b/include/asm-arm/arch-versatile/io.h @@ -22,7 +22,11 @@ #define IO_SPACE_LIMIT 0xffffffff -#define __io(a) ((void __iomem *)(a)) +static inline void __iomem *__io(unsigned long addr) +{ + return (void __iomem *)addr; +} +#define __io(a) __io(a) #define __mem_pci(a) (a) #define __mem_isa(a) (a) diff --git a/include/asm-arm/arch-versatile/memory.h b/include/asm-arm/arch-versatile/memory.h index 7b8b7cc422fa..a9370976cc5e 100644 --- a/include/asm-arm/arch-versatile/memory.h +++ b/include/asm-arm/arch-versatile/memory.h @@ -23,7 +23,7 @@ /* * Physical DRAM offset. */ -#define PHYS_OFFSET (0x00000000UL) +#define PHYS_OFFSET UL(0x00000000) /* * Virtual view <-> DMA view memory address translations diff --git a/include/asm-arm/assembler.h b/include/asm-arm/assembler.h index 69a28f96bee2..f31ac92b6c7f 100644 --- a/include/asm-arm/assembler.h +++ b/include/asm-arm/assembler.h @@ -83,10 +83,13 @@ * Save the current IRQ state and disable IRQs. Note that this macro * assumes FIQs are enabled, and that the processor is in SVC mode. */ - .macro save_and_disable_irqs, oldcpsr, temp + .macro save_and_disable_irqs, oldcpsr mrs \oldcpsr, cpsr - mov \temp, #PSR_I_BIT | MODE_SVC - msr cpsr_c, \temp +#if __LINUX_ARM_ARCH__ >= 6 + cpsid i +#else + msr cpsr_c, #PSR_I_BIT | MODE_SVC +#endif .endm /* diff --git a/include/asm-arm/atomic.h b/include/asm-arm/atomic.h index 2885972b0855..d586f65c8228 100644 --- a/include/asm-arm/atomic.h +++ b/include/asm-arm/atomic.h @@ -12,6 +12,7 @@ #define __ASM_ARM_ATOMIC_H #include <linux/config.h> +#include <linux/compiler.h> typedef struct { volatile int counter; } atomic_t; @@ -80,6 +81,24 @@ static inline int atomic_sub_return(int i, atomic_t *v) return result; } +static inline int atomic_cmpxchg(atomic_t *ptr, int old, int new) +{ + unsigned long oldval, res; + + do { + __asm__ __volatile__("@ atomic_cmpxchg\n" + "ldrex %1, [%2]\n" + "mov %0, #0\n" + "teq %1, %3\n" + "strexeq %0, %4, [%2]\n" + : "=&r" (res), "=&r" (oldval) + : "r" (&ptr->counter), "Ir" (old), "r" (new) + : "cc"); + } while (res); + + return oldval; +} + static inline void atomic_clear_mask(unsigned long mask, unsigned long *addr) { unsigned long tmp, tmp2; @@ -131,6 +150,20 @@ static inline int atomic_sub_return(int i, atomic_t *v) return val; } +static inline int atomic_cmpxchg(atomic_t *v, int old, int new) +{ + int ret; + unsigned long flags; + + local_irq_save(flags); + ret = v->counter; + if (likely(ret == old)) + v->counter = new; + local_irq_restore(flags); + + return ret; +} + static inline void atomic_clear_mask(unsigned long mask, unsigned long *addr) { unsigned long flags; @@ -142,6 +175,17 @@ static inline void atomic_clear_mask(unsigned long mask, unsigned long *addr) #endif /* __LINUX_ARM_ARCH__ */ +static inline int atomic_add_unless(atomic_t *v, int a, int u) +{ + int c, old; + + c = atomic_read(v); + while (c != u && (old = atomic_cmpxchg((v), c, c + a)) != c) + c = old; + return c != u; +} +#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0) + #define atomic_add(i, v) (void) atomic_add_return(i, v) #define atomic_inc(v) (void) atomic_add_return(1, v) #define atomic_sub(i, v) (void) atomic_sub_return(i, v) diff --git a/include/asm-arm/bitops.h b/include/asm-arm/bitops.h index aad7aad026b3..7399d431edfe 100644 --- a/include/asm-arm/bitops.h +++ b/include/asm-arm/bitops.h @@ -19,6 +19,7 @@ #ifdef __KERNEL__ +#include <linux/compiler.h> #include <asm/system.h> #define smp_mb__before_clear_bit() mb() @@ -347,7 +348,6 @@ static inline unsigned long __ffs(unsigned long word) * the clz instruction for much better code efficiency. */ -static __inline__ int generic_fls(int x); #define fls(x) \ ( __builtin_constant_p(x) ? generic_fls(x) : \ ({ int __r; asm("clz\t%0, %1" : "=r"(__r) : "r"(x) : "cc"); 32-__r; }) ) diff --git a/include/asm-arm/cpu.h b/include/asm-arm/cpu.h index fcbdd40cb667..751bc7462074 100644 --- a/include/asm-arm/cpu.h +++ b/include/asm-arm/cpu.h @@ -16,6 +16,7 @@ struct cpuinfo_arm { struct cpu cpu; #ifdef CONFIG_SMP + struct task_struct *idle; unsigned int loops_per_jiffy; #endif }; diff --git a/include/asm-arm/dma-mapping.h b/include/asm-arm/dma-mapping.h index d62ade4e4cbb..e3e8541ee63b 100644 --- a/include/asm-arm/dma-mapping.h +++ b/include/asm-arm/dma-mapping.h @@ -70,7 +70,7 @@ static inline int dma_mapping_error(dma_addr_t dma_addr) * device-viewed address. */ extern void * -dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *handle, int gfp); +dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *handle, gfp_t gfp); /** * dma_free_coherent - free memory allocated by dma_alloc_coherent @@ -117,7 +117,7 @@ int dma_mmap_coherent(struct device *dev, struct vm_area_struct *vma, * device-viewed address. */ extern void * -dma_alloc_writecombine(struct device *dev, size_t size, dma_addr_t *handle, int gfp); +dma_alloc_writecombine(struct device *dev, size_t size, dma_addr_t *handle, gfp_t gfp); #define dma_free_writecombine(dev,size,cpu_addr,handle) \ dma_free_coherent(dev,size,cpu_addr,handle) diff --git a/include/asm-arm/elf.h b/include/asm-arm/elf.h index a1696ba238d3..7da97a937548 100644 --- a/include/asm-arm/elf.h +++ b/include/asm-arm/elf.h @@ -124,6 +124,8 @@ do { \ if (((ex).e_flags & EF_ARM_EABI_MASK) || \ ((ex).e_flags & EF_ARM_SOFT_FLOAT)) \ set_thread_flag(TIF_USING_IWMMXT); \ + else \ + clear_thread_flag(TIF_USING_IWMMXT); \ } while (0) #endif diff --git a/include/asm-arm/hardirq.h b/include/asm-arm/hardirq.h index e5ccb6b8ff83..1cbb173bf5b1 100644 --- a/include/asm-arm/hardirq.h +++ b/include/asm-arm/hardirq.h @@ -8,6 +8,7 @@ typedef struct { unsigned int __softirq_pending; + unsigned int local_timer_irqs; } ____cacheline_aligned irq_cpustat_t; #include <linux/irq_cpustat.h> /* Standard mappings for irq_cpustat_t above */ diff --git a/include/asm-arm/hardware/amba_clcd.h b/include/asm-arm/hardware/amba_clcd.h index ce4cf5c1c05d..6b8d73dc1ab0 100644 --- a/include/asm-arm/hardware/amba_clcd.h +++ b/include/asm-arm/hardware/amba_clcd.h @@ -22,7 +22,7 @@ #define CLCD_UBAS 0x00000010 #define CLCD_LBAS 0x00000014 -#ifndef CONFIG_ARCH_VERSATILE +#if !defined(CONFIG_ARCH_VERSATILE) && !defined(CONFIG_ARCH_REALVIEW) #define CLCD_IENB 0x00000018 #define CLCD_CNTL 0x0000001c #else diff --git a/include/asm-arm/hardware/amba_serial.h b/include/asm-arm/hardware/amba_serial.h index 71770aa6389f..dc726ffccebd 100644 --- a/include/asm-arm/hardware/amba_serial.h +++ b/include/asm-arm/hardware/amba_serial.h @@ -50,6 +50,11 @@ #define UART011_ICR 0x44 /* Interrupt clear register. */ #define UART011_DMACR 0x48 /* DMA control register. */ +#define UART011_DR_OE (1 << 11) +#define UART011_DR_BE (1 << 10) +#define UART011_DR_PE (1 << 9) +#define UART011_DR_FE (1 << 8) + #define UART01x_RSR_OE 0x08 #define UART01x_RSR_BE 0x04 #define UART01x_RSR_PE 0x02 diff --git a/include/asm-arm/hardware/arm_scu.h b/include/asm-arm/hardware/arm_scu.h new file mode 100644 index 000000000000..9903f60c84b7 --- /dev/null +++ b/include/asm-arm/hardware/arm_scu.h @@ -0,0 +1,13 @@ +#ifndef ASMARM_HARDWARE_ARM_SCU_H +#define ASMARM_HARDWARE_ARM_SCU_H + +/* + * SCU registers + */ +#define SCU_CTRL 0x00 +#define SCU_CONFIG 0x04 +#define SCU_CPU_STATUS 0x08 +#define SCU_INVALIDATE 0x0c +#define SCU_FPGA_REVISION 0x10 + +#endif diff --git a/include/asm-arm/hardware/dec21285.h b/include/asm-arm/hardware/dec21285.h index 9049f0ddaecf..6685e3fb97b1 100644 --- a/include/asm-arm/hardware/dec21285.h +++ b/include/asm-arm/hardware/dec21285.h @@ -20,7 +20,7 @@ #include <linux/config.h> #ifndef __ASSEMBLY__ -#include <asm/arch/hardware.h> +#include <asm/hardware.h> #define DC21285_IO(x) ((volatile unsigned long *)(ARMCSR_BASE+(x))) #else #define DC21285_IO(x) (x) diff --git a/include/asm-arm/hardware/scoop.h b/include/asm-arm/hardware/scoop.h index 527404b5a8df..d37bf7443264 100644 --- a/include/asm-arm/hardware/scoop.h +++ b/include/asm-arm/hardware/scoop.h @@ -38,6 +38,8 @@ struct scoop_config { unsigned short io_out; unsigned short io_dir; + unsigned short suspend_clr; + unsigned short suspend_set; }; /* Structure for linking scoop devices to PCMCIA sockets */ @@ -50,8 +52,14 @@ struct scoop_pcmcia_dev { unsigned char keep_rd; }; -extern int scoop_num; -extern struct scoop_pcmcia_dev *scoop_devs; +struct scoop_pcmcia_config { + struct scoop_pcmcia_dev *devs; + int num_devs; + void (*pcmcia_init)(void); + void (*power_ctrl)(struct device *scoop, unsigned short cpr, int nr); +}; + +extern struct scoop_pcmcia_config *platform_scoop_config; void reset_scoop(struct device *dev); unsigned short set_scoop_gpio(struct device *dev, unsigned short bit); diff --git a/include/asm-arm/io.h b/include/asm-arm/io.h index cfa71a0dffb6..ae69db4a1010 100644 --- a/include/asm-arm/io.h +++ b/include/asm-arm/io.h @@ -26,7 +26,6 @@ #include <linux/types.h> #include <asm/byteorder.h> #include <asm/memory.h> -#include <asm/arch/hardware.h> /* * ISA I/O bus memory addresses are 1:1 with the physical address. @@ -56,6 +55,12 @@ extern void __raw_readsl(void __iomem *addr, void *data, int longlen); #define __raw_readl(a) (__chk_io_ptr(a), *(volatile unsigned int __force *)(a)) /* + * Architecture ioremap implementation. + */ +extern void __iomem * __ioremap(unsigned long, size_t, unsigned long); +extern void __iounmap(void __iomem *addr); + +/* * Bad read/write accesses... */ extern void __readwrite_bug(const char *fn); @@ -136,9 +141,9 @@ extern void __readwrite_bug(const char *fn); /* * String version of IO memory access ops: */ -extern void _memcpy_fromio(void *, void __iomem *, size_t); -extern void _memcpy_toio(void __iomem *, const void *, size_t); -extern void _memset_io(void __iomem *, int, size_t); +extern void _memcpy_fromio(void *, const volatile void __iomem *, size_t); +extern void _memcpy_toio(volatile void __iomem *, const void *, size_t); +extern void _memset_io(volatile void __iomem *, int, size_t); #define mmiowb() @@ -257,18 +262,15 @@ out: * ioremap takes a PCI memory address, as specified in * Documentation/IO-mapping.txt. */ -extern void __iomem * __ioremap(unsigned long, size_t, unsigned long, unsigned long); -extern void __iounmap(void __iomem *addr); - #ifndef __arch_ioremap -#define ioremap(cookie,size) __ioremap(cookie,size,0,1) -#define ioremap_nocache(cookie,size) __ioremap(cookie,size,0,1) -#define ioremap_cached(cookie,size) __ioremap(cookie,size,L_PTE_CACHEABLE,1) +#define ioremap(cookie,size) __ioremap(cookie,size,0) +#define ioremap_nocache(cookie,size) __ioremap(cookie,size,0) +#define ioremap_cached(cookie,size) __ioremap(cookie,size,L_PTE_CACHEABLE) #define iounmap(cookie) __iounmap(cookie) #else -#define ioremap(cookie,size) __arch_ioremap((cookie),(size),0,1) -#define ioremap_nocache(cookie,size) __arch_ioremap((cookie),(size),0,1) -#define ioremap_cached(cookie,size) __arch_ioremap((cookie),(size),L_PTE_CACHEABLE,1) +#define ioremap(cookie,size) __arch_ioremap((cookie),(size),0) +#define ioremap_nocache(cookie,size) __arch_ioremap((cookie),(size),0) +#define ioremap_cached(cookie,size) __arch_ioremap((cookie),(size),L_PTE_CACHEABLE) #define iounmap(cookie) __arch_iounmap(cookie) #endif diff --git a/include/asm-arm/irq.h b/include/asm-arm/irq.h index f97912fbb10f..59975ee43cf1 100644 --- a/include/asm-arm/irq.h +++ b/include/asm-arm/irq.h @@ -47,5 +47,6 @@ struct irqaction; struct pt_regs; int handle_IRQ_event(unsigned int, struct pt_regs *, struct irqaction *); +extern void migrate_irqs(void); #endif diff --git a/include/asm-arm/locks.h b/include/asm-arm/locks.h index f08dc8447913..852220eecdbc 100644 --- a/include/asm-arm/locks.h +++ b/include/asm-arm/locks.h @@ -103,7 +103,7 @@ ({ \ smp_mb(); \ __asm__ __volatile__( \ - "@ up_op_read\n" \ + "@ up_op_write\n" \ "1: ldrex lr, [%0]\n" \ " adds lr, lr, %1\n" \ " strex ip, lr, [%0]\n" \ @@ -231,7 +231,7 @@ #define __up_op_write(ptr,wake) \ ({ \ __asm__ __volatile__( \ - "@ up_op_read\n" \ + "@ up_op_write\n" \ " mrs ip, cpsr\n" \ " orr lr, ip, #128\n" \ " msr cpsr_c, lr\n" \ diff --git a/include/asm-arm/mach/arch.h b/include/asm-arm/mach/arch.h index 4fa95084a8c0..eb262e078c46 100644 --- a/include/asm-arm/mach/arch.h +++ b/include/asm-arm/mach/arch.h @@ -48,10 +48,11 @@ struct machine_desc { * Set of macros to define architecture features. This is built into * a table by the linker. */ -#define MACHINE_START(_type,_name) \ -const struct machine_desc __mach_desc_##_type \ +#define MACHINE_START(_type,_name) \ +static const struct machine_desc __mach_desc_##_type \ + __attribute_used__ \ __attribute__((__section__(".arch.info.init"))) = { \ - .nr = MACH_TYPE_##_type, \ + .nr = MACH_TYPE_##_type, \ .name = _name, #define MACHINE_END \ diff --git a/include/asm-arm/mach/flash.h b/include/asm-arm/mach/flash.h index a92887d4b2cb..05b029ef6371 100644 --- a/include/asm-arm/mach/flash.h +++ b/include/asm-arm/mach/flash.h @@ -11,22 +11,27 @@ #define ASMARM_MACH_FLASH_H struct mtd_partition; +struct mtd_info; /* * map_name: the map probe function name + * name: flash device name (eg, as used with mtdparts=) * width: width of mapped device * init: method called at driver/device initialisation * exit: method called at driver/device removal * set_vpp: method called to enable or disable VPP + * mmcontrol: method called to enable or disable Sync. Burst Read in OneNAND * parts: optional array of mtd_partitions for static partitioning * nr_parts: number of mtd_partitions for static partitoning */ struct flash_platform_data { const char *map_name; + const char *name; unsigned int width; int (*init)(void); void (*exit)(void); void (*set_vpp)(int on); + void (*mmcontrol)(struct mtd_info *mtd, int sync_read); struct mtd_partition *parts; unsigned int nr_parts; }; diff --git a/include/asm-arm/mach/map.h b/include/asm-arm/mach/map.h index 9ac47cf8d2e4..b338936bde4f 100644 --- a/include/asm-arm/mach/map.h +++ b/include/asm-arm/mach/map.h @@ -11,7 +11,7 @@ */ struct map_desc { unsigned long virtual; - unsigned long physical; + unsigned long pfn; unsigned long length; unsigned int type; }; @@ -27,6 +27,9 @@ struct meminfo; #define MT_ROM 6 #define MT_IXP2000_DEVICE 7 +#define __phys_to_pfn(paddr) ((paddr) >> PAGE_SHIFT) +#define __pfn_to_phys(pfn) ((pfn) << PAGE_SHIFT) + extern void create_memmap_holes(struct meminfo *); extern void memtable_init(struct meminfo *); extern void iotable_init(struct map_desc *, int); diff --git a/include/asm-arm/memory.h b/include/asm-arm/memory.h index a8a933a775db..a547ee598c6c 100644 --- a/include/asm-arm/memory.h +++ b/include/asm-arm/memory.h @@ -12,6 +12,16 @@ #ifndef __ASM_ARM_MEMORY_H #define __ASM_ARM_MEMORY_H +/* + * Allow for constants defined here to be used from assembly code + * by prepending the UL suffix only with actual C code compilation. + */ +#ifndef __ASSEMBLY__ +#define UL(x) (x##UL) +#else +#define UL(x) (x) +#endif + #include <linux/config.h> #include <linux/compiler.h> #include <asm/arch/memory.h> @@ -21,20 +31,20 @@ * TASK_SIZE - the maximum size of a user space task. * TASK_UNMAPPED_BASE - the lower boundary of the mmap VM area */ -#define TASK_SIZE (0xbf000000UL) -#define TASK_UNMAPPED_BASE (0x40000000UL) +#define TASK_SIZE UL(0xbf000000) +#define TASK_UNMAPPED_BASE UL(0x40000000) #endif /* * The maximum size of a 26-bit user space task. */ -#define TASK_SIZE_26 (0x04000000UL) +#define TASK_SIZE_26 UL(0x04000000) /* * Page offset: 3GB */ #ifndef PAGE_OFFSET -#define PAGE_OFFSET (0xc0000000UL) +#define PAGE_OFFSET UL(0xc0000000) #endif /* @@ -58,6 +68,13 @@ #error Top of user space clashes with start of module space #endif +/* + * The XIP kernel gets mapped at the bottom of the module vm area. + * Since we use sections to map it, this macro replaces the physical address + * with its virtual address while keeping offset from the base section. + */ +#define XIP_VIRT_ADDR(physaddr) (MODULE_START + ((physaddr) & 0x000fffff)) + #ifndef __ASSEMBLY__ /* diff --git a/include/asm-arm/mmu_context.h b/include/asm-arm/mmu_context.h index 4af9c411c617..81c59facea3b 100644 --- a/include/asm-arm/mmu_context.h +++ b/include/asm-arm/mmu_context.h @@ -13,6 +13,8 @@ #ifndef __ASM_ARM_MMU_CONTEXT_H #define __ASM_ARM_MMU_CONTEXT_H +#include <linux/compiler.h> +#include <asm/cacheflush.h> #include <asm/proc-fns.h> #if __LINUX_ARM_ARCH__ >= 6 @@ -86,7 +88,8 @@ switch_mm(struct mm_struct *prev, struct mm_struct *next, cpu_set(cpu, next->cpu_vm_mask); check_context(next); cpu_switch_mm(next->pgd, next); - cpu_clear(cpu, prev->cpu_vm_mask); + if (cache_is_vivt()) + cpu_clear(cpu, prev->cpu_vm_mask); } } diff --git a/include/asm-arm/numnodes.h b/include/asm-arm/numnodes.h index 5d2a1034a02e..8df36818ebc9 100644 --- a/include/asm-arm/numnodes.h +++ b/include/asm-arm/numnodes.h @@ -17,6 +17,8 @@ #ifndef __ASM_ARM_NUMNODES_H #define __ASM_ARM_NUMNODES_H +#include <asm/memory.h> + #ifndef NODES_SHIFT # define NODES_SHIFT 2 /* Normally, Max 4 Nodes */ #endif diff --git a/include/asm-arm/pgtable.h b/include/asm-arm/pgtable.h index 366bafbdfbb1..5a0d19b466b0 100644 --- a/include/asm-arm/pgtable.h +++ b/include/asm-arm/pgtable.h @@ -397,9 +397,6 @@ static inline pte_t *pmd_page_kernel(pmd_t pmd) #define pgd_clear(pgdp) do { } while (0) #define set_pgd(pgd,pgdp) do { } while (0) -#define page_pte_prot(page,prot) mk_pte(page, prot) -#define page_pte(page) mk_pte(page, __pgprot(0)) - /* to find an entry in a page-table-directory */ #define pgd_index(addr) ((addr) >> PGDIR_SHIFT) diff --git a/include/asm-arm/semaphore.h b/include/asm-arm/semaphore.h index 60f33e6eb800..d5dc624f452a 100644 --- a/include/asm-arm/semaphore.h +++ b/include/asm-arm/semaphore.h @@ -24,8 +24,6 @@ struct semaphore { .wait = __WAIT_QUEUE_HEAD_INITIALIZER((name).wait), \ } -#define __MUTEX_INITIALIZER(name) __SEMAPHORE_INIT(name,1) - #define __DECLARE_SEMAPHORE_GENERIC(name,count) \ struct semaphore name = __SEMAPHORE_INIT(name,count) @@ -49,11 +47,6 @@ static inline void init_MUTEX_LOCKED(struct semaphore *sem) sema_init(sem, 0); } -static inline int sema_count(struct semaphore *sem) -{ - return atomic_read(&sem->count); -} - /* * special register calling convention */ diff --git a/include/asm-arm/signal.h b/include/asm-arm/signal.h index 760f6e65af05..ced69161917b 100644 --- a/include/asm-arm/signal.h +++ b/include/asm-arm/signal.h @@ -115,7 +115,6 @@ typedef unsigned long sigset_t; #ifdef __KERNEL__ #define SA_TIMER 0x40000000 -#define SA_IRQNOMASK 0x08000000 #endif #include <asm-generic/signal.h> diff --git a/include/asm-arm/smp.h b/include/asm-arm/smp.h index dbb4d859c586..5a72e50ca9fc 100644 --- a/include/asm-arm/smp.h +++ b/include/asm-arm/smp.h @@ -37,6 +37,11 @@ struct seq_file; extern void show_ipi_list(struct seq_file *p); /* + * Called from assembly code, this handles an IPI. + */ +asmlinkage void do_IPI(struct pt_regs *regs); + +/* * Move global data into per-processor storage. */ extern void smp_store_cpu_info(unsigned int cpuid); @@ -47,12 +52,23 @@ extern void smp_store_cpu_info(unsigned int cpuid); extern void smp_cross_call(cpumask_t callmap); /* + * Broadcast a timer interrupt to the other CPUs. + */ +extern void smp_send_timer(void); + +/* * Boot a secondary CPU, and assign it the specified idle task. * This also gives us the initial stack to use for this CPU. */ extern int boot_secondary(unsigned int cpu, struct task_struct *); /* + * Called from platform specific assembly code, this is the + * secondary CPU entry point. + */ +asmlinkage void secondary_start_kernel(void); + +/* * Perform platform specific initialisation of the specified CPU. */ extern void platform_secondary_init(unsigned int cpu); @@ -66,4 +82,52 @@ struct secondary_data { }; extern struct secondary_data secondary_data; +extern int __cpu_disable(void); +extern int mach_cpu_disable(unsigned int cpu); + +extern void __cpu_die(unsigned int cpu); +extern void cpu_die(void); + +extern void platform_cpu_die(unsigned int cpu); +extern int platform_cpu_kill(unsigned int cpu); +extern void platform_cpu_enable(unsigned int cpu); + +#ifdef CONFIG_LOCAL_TIMERS +/* + * Setup a local timer interrupt for a CPU. + */ +extern void local_timer_setup(unsigned int cpu); + +/* + * Stop a local timer interrupt. + */ +extern void local_timer_stop(unsigned int cpu); + +/* + * Platform provides this to acknowledge a local timer IRQ + */ +extern int local_timer_ack(void); + +#else + +static inline void local_timer_setup(unsigned int cpu) +{ +} + +static inline void local_timer_stop(unsigned int cpu) +{ +} + +#endif + +/* + * show local interrupt info + */ +extern void show_local_irqs(struct seq_file *); + +/* + * Called from assembly, this is the local timer IRQ handler + */ +asmlinkage void do_local_timer(struct pt_regs *); + #endif /* ifndef __ASM_ARM_SMP_H */ diff --git a/include/asm-arm/spinlock.h b/include/asm-arm/spinlock.h index cb4906b45555..43ad4e55878c 100644 --- a/include/asm-arm/spinlock.h +++ b/include/asm-arm/spinlock.h @@ -30,6 +30,9 @@ static inline void __raw_spin_lock(raw_spinlock_t *lock) __asm__ __volatile__( "1: ldrex %0, [%1]\n" " teq %0, #0\n" +#ifdef CONFIG_CPU_32v6K +" wfene\n" +#endif " strexeq %0, %2, [%1]\n" " teqeq %0, #0\n" " bne 1b" @@ -65,7 +68,11 @@ static inline void __raw_spin_unlock(raw_spinlock_t *lock) smp_mb(); __asm__ __volatile__( -" str %1, [%0]" +" str %1, [%0]\n" +#ifdef CONFIG_CPU_32v6K +" mcr p15, 0, %1, c7, c10, 4\n" /* DSB */ +" sev" +#endif : : "r" (&lock->lock), "r" (0) : "cc"); @@ -80,13 +87,16 @@ static inline void __raw_spin_unlock(raw_spinlock_t *lock) */ #define rwlock_is_locked(x) (*((volatile unsigned int *)(x)) != 0) -static inline void __raw_write_lock(rwlock_t *rw) +static inline void __raw_write_lock(raw_rwlock_t *rw) { unsigned long tmp; __asm__ __volatile__( "1: ldrex %0, [%1]\n" " teq %0, #0\n" +#ifdef CONFIG_CPU_32v6K +" wfene\n" +#endif " strexeq %0, %2, [%1]\n" " teq %0, #0\n" " bne 1b" @@ -97,7 +107,7 @@ static inline void __raw_write_lock(rwlock_t *rw) smp_mb(); } -static inline int __raw_write_trylock(rwlock_t *rw) +static inline int __raw_write_trylock(raw_rwlock_t *rw) { unsigned long tmp; @@ -122,7 +132,11 @@ static inline void __raw_write_unlock(raw_rwlock_t *rw) smp_mb(); __asm__ __volatile__( - "str %1, [%0]" + "str %1, [%0]\n" +#ifdef CONFIG_CPU_32v6K +" mcr p15, 0, %1, c7, c10, 4\n" /* DSB */ +" sev\n" +#endif : : "r" (&rw->lock), "r" (0) : "cc"); @@ -148,6 +162,9 @@ static inline void __raw_read_lock(raw_rwlock_t *rw) "1: ldrex %0, [%2]\n" " adds %0, %0, #1\n" " strexpl %1, %0, [%2]\n" +#ifdef CONFIG_CPU_32v6K +" wfemi\n" +#endif " rsbpls %0, %1, #0\n" " bmi 1b" : "=&r" (tmp), "=&r" (tmp2) @@ -157,7 +174,7 @@ static inline void __raw_read_lock(raw_rwlock_t *rw) smp_mb(); } -static inline void __raw_read_unlock(rwlock_t *rw) +static inline void __raw_read_unlock(raw_rwlock_t *rw) { unsigned long tmp, tmp2; @@ -169,6 +186,11 @@ static inline void __raw_read_unlock(rwlock_t *rw) " strex %1, %0, [%2]\n" " teq %1, #0\n" " bne 1b" +#ifdef CONFIG_CPU_32v6K +"\n cmp %0, #0\n" +" mcreq p15, 0, %0, c7, c10, 4\n" +" seveq" +#endif : "=&r" (tmp), "=&r" (tmp2) : "r" (&rw->lock) : "cc"); diff --git a/include/asm-arm/system.h b/include/asm-arm/system.h index 8efa4ebdcacb..5621d61ebc07 100644 --- a/include/asm-arm/system.h +++ b/include/asm-arm/system.h @@ -93,8 +93,6 @@ void hook_fault_code(int nr, int (*fn)(unsigned long, unsigned int, struct pt_regs *), int sig, const char *name); -#include <asm/proc-fns.h> - #define xchg(ptr,x) \ ((__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr)))) @@ -102,6 +100,8 @@ void hook_fault_code(int nr, int (*fn)(unsigned long, unsigned int, extern asmlinkage void __backtrace(void); extern asmlinkage void c_backtrace(unsigned long fp, int pmode); + +struct mm_struct; extern void show_pte(struct mm_struct *mm, unsigned long addr); extern void __show_regs(struct pt_regs *); diff --git a/include/asm-arm/thread_info.h b/include/asm-arm/thread_info.h index 8252a4cd860f..7c98557b717f 100644 --- a/include/asm-arm/thread_info.h +++ b/include/asm-arm/thread_info.h @@ -12,6 +12,7 @@ #ifdef __KERNEL__ +#include <linux/compiler.h> #include <asm/fpstate.h> #define THREAD_SIZE_ORDER 1 diff --git a/include/asm-arm/tlb.h b/include/asm-arm/tlb.h index 9bb325c54645..f49bfb78c221 100644 --- a/include/asm-arm/tlb.h +++ b/include/asm-arm/tlb.h @@ -27,11 +27,7 @@ */ struct mmu_gather { struct mm_struct *mm; - unsigned int freed; unsigned int fullmm; - - unsigned int flushes; - unsigned int avoided_flushes; }; DECLARE_PER_CPU(struct mmu_gather, mmu_gathers); @@ -39,11 +35,9 @@ DECLARE_PER_CPU(struct mmu_gather, mmu_gathers); static inline struct mmu_gather * tlb_gather_mmu(struct mm_struct *mm, unsigned int full_mm_flush) { - int cpu = smp_processor_id(); - struct mmu_gather *tlb = &per_cpu(mmu_gathers, cpu); + struct mmu_gather *tlb = &get_cpu_var(mmu_gathers); tlb->mm = mm; - tlb->freed = 0; tlb->fullmm = full_mm_flush; return tlb; @@ -52,24 +46,13 @@ tlb_gather_mmu(struct mm_struct *mm, unsigned int full_mm_flush) static inline void tlb_finish_mmu(struct mmu_gather *tlb, unsigned long start, unsigned long end) { - struct mm_struct *mm = tlb->mm; - unsigned long freed = tlb->freed; - int rss = get_mm_counter(mm, rss); - - if (rss < freed) - freed = rss; - add_mm_counter(mm, rss, -freed); - if (tlb->fullmm) - flush_tlb_mm(mm); + flush_tlb_mm(tlb->mm); /* keep the page table cache within bounds */ check_pgt_cache(); -} -static inline unsigned int tlb_is_full_mm(struct mmu_gather *tlb) -{ - return tlb->fullmm; + put_cpu_var(mmu_gathers); } #define tlb_remove_tlb_entry(tlb,ptep,address) do { } while (0) diff --git a/include/asm-arm/uaccess.h b/include/asm-arm/uaccess.h index a2fdad0138b3..064f0f5e8e2b 100644 --- a/include/asm-arm/uaccess.h +++ b/include/asm-arm/uaccess.h @@ -100,7 +100,6 @@ static inline void set_fs (mm_segment_t fs) extern int __get_user_1(void *); extern int __get_user_2(void *); extern int __get_user_4(void *); -extern int __get_user_8(void *); extern int __get_user_bad(void); #define __get_user_x(__r2,__p,__e,__s,__i...) \ @@ -114,7 +113,7 @@ extern int __get_user_bad(void); #define get_user(x,p) \ ({ \ const register typeof(*(p)) __user *__p asm("r0") = (p);\ - register typeof(*(p)) __r2 asm("r2"); \ + register unsigned int __r2 asm("r2"); \ register int __e asm("r0"); \ switch (sizeof(*(__p))) { \ case 1: \ @@ -126,12 +125,9 @@ extern int __get_user_bad(void); case 4: \ __get_user_x(__r2, __p, __e, 4, "lr"); \ break; \ - case 8: \ - __get_user_x(__r2, __p, __e, 8, "lr"); \ - break; \ default: __e = __get_user_bad(); break; \ } \ - x = __r2; \ + x = (typeof(*(p))) __r2; \ __e; \ }) diff --git a/include/asm-arm/unistd.h b/include/asm-arm/unistd.h index c49df635a80f..d626e70faded 100644 --- a/include/asm-arm/unistd.h +++ b/include/asm-arm/unistd.h @@ -544,7 +544,6 @@ asmlinkage int sys_clone(unsigned long clone_flags, unsigned long newsp, asmlinkage int sys_fork(struct pt_regs *regs); asmlinkage int sys_vfork(struct pt_regs *regs); asmlinkage int sys_pipe(unsigned long *fildes); -asmlinkage int sys_ptrace(long request, long pid, long addr, long data); struct sigaction; asmlinkage long sys_rt_sigaction(int sig, const struct sigaction __user *act, diff --git a/include/asm-arm26/atomic.h b/include/asm-arm26/atomic.h index 4a88235c0e76..a47cadc59686 100644 --- a/include/asm-arm26/atomic.h +++ b/include/asm-arm26/atomic.h @@ -62,6 +62,35 @@ static inline int atomic_sub_return(int i, atomic_t *v) return val; } +static inline int atomic_cmpxchg(atomic_t *v, int old, int new) +{ + int ret; + unsigned long flags; + + local_irq_save(flags); + ret = v->counter; + if (likely(ret == old)) + v->counter = new; + local_irq_restore(flags); + + return ret; +} + +static inline int atomic_add_unless(atomic_t *v, int a, int u) +{ + int ret; + unsigned long flags; + + local_irq_save(flags); + ret = v->counter; + if (ret != u) + v->counter += a; + local_irq_restore(flags); + + return ret != u; +} +#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0) + static inline void atomic_clear_mask(unsigned long mask, unsigned long *addr) { unsigned long flags; diff --git a/include/asm-arm26/pgtable.h b/include/asm-arm26/pgtable.h index f602cf572411..a590250277f8 100644 --- a/include/asm-arm26/pgtable.h +++ b/include/asm-arm26/pgtable.h @@ -98,8 +98,6 @@ extern struct page *empty_zero_page; #define pfn_pte(pfn,prot) (__pte(((pfn) << PAGE_SHIFT) | pgprot_val(prot))) #define pages_to_mb(x) ((x) >> (20 - PAGE_SHIFT)) #define mk_pte(page,prot) pfn_pte(page_to_pfn(page),prot) -#define page_pte_prot(page,prot) mk_pte(page, prot) -#define page_pte(page) mk_pte(page, __pgprot(0)) /* * Terminology: PGD = Page Directory, PMD = Page Middle Directory, diff --git a/include/asm-arm26/semaphore.h b/include/asm-arm26/semaphore.h index c1b6a1edad92..ccf15e704109 100644 --- a/include/asm-arm26/semaphore.h +++ b/include/asm-arm26/semaphore.h @@ -25,9 +25,6 @@ struct semaphore { .wait = __WAIT_QUEUE_HEAD_INITIALIZER((name).wait), \ } -#define __MUTEX_INITIALIZER(name) \ - __SEMAPHORE_INIT(name,1) - #define __DECLARE_SEMAPHORE_GENERIC(name,count) \ struct semaphore name = __SEMAPHORE_INIT(name,count) diff --git a/include/asm-arm26/tlb.h b/include/asm-arm26/tlb.h index 1316352a58f3..08ddd85b8d35 100644 --- a/include/asm-arm26/tlb.h +++ b/include/asm-arm26/tlb.h @@ -10,24 +10,20 @@ */ struct mmu_gather { struct mm_struct *mm; - unsigned int freed; - unsigned int fullmm; - - unsigned int flushes; - unsigned int avoided_flushes; + unsigned int need_flush; + unsigned int fullmm; }; -extern struct mmu_gather mmu_gathers[NR_CPUS]; +DECLARE_PER_CPU(struct mmu_gather, mmu_gathers); static inline struct mmu_gather * tlb_gather_mmu(struct mm_struct *mm, unsigned int full_mm_flush) { - int cpu = smp_processor_id(); - struct mmu_gather *tlb = &mmu_gathers[cpu]; + struct mmu_gather *tlb = &get_cpu_var(mmu_gathers); tlb->mm = mm; - tlb->freed = 0; - tlb->fullmm = full_mm_flush; + tlb->need_flush = 0; + tlb->fullmm = full_mm_flush; return tlb; } @@ -35,30 +31,13 @@ tlb_gather_mmu(struct mm_struct *mm, unsigned int full_mm_flush) static inline void tlb_finish_mmu(struct mmu_gather *tlb, unsigned long start, unsigned long end) { - struct mm_struct *mm = tlb->mm; - unsigned long freed = tlb->freed; - int rss = get_mm_counter(mm, rss); - - if (rss < freed) - freed = rss; - add_mm_counter(mm, rss, -freed); - - if (freed) { - flush_tlb_mm(mm); - tlb->flushes++; - } else { - tlb->avoided_flushes++; - } + if (tlb->need_flush) + flush_tlb_mm(tlb->mm); /* keep the page table cache within bounds */ check_pgt_cache(); -} - -static inline unsigned int -tlb_is_full_mm(struct mmu_gather *tlb) -{ - return tlb->fullmm; + put_cpu_var(mmu_gathers); } #define tlb_remove_tlb_entry(tlb,ptep,address) do { } while (0) @@ -71,7 +50,13 @@ tlb_is_full_mm(struct mmu_gather *tlb) } while (0) #define tlb_end_vma(tlb,vma) do { } while (0) -#define tlb_remove_page(tlb,page) free_page_and_swap_cache(page) +static inline void +tlb_remove_page(struct mmu_gather *tlb, struct page *page) +{ + tlb->need_flush = 1; + free_page_and_swap_cache(page); +} + #define pte_free_tlb(tlb,ptep) pte_free(ptep) #define pmd_free_tlb(tlb,pmdp) pmd_free(pmdp) diff --git a/include/asm-arm26/unistd.h b/include/asm-arm26/unistd.h index dfa0b0c30aa3..be4c2fb9c049 100644 --- a/include/asm-arm26/unistd.h +++ b/include/asm-arm26/unistd.h @@ -480,7 +480,6 @@ asmlinkage int sys_clone(unsigned long clone_flags, unsigned long newsp, asmlinkage int sys_fork(struct pt_regs *regs); asmlinkage int sys_vfork(struct pt_regs *regs); asmlinkage int sys_pipe(unsigned long *fildes); -asmlinkage int sys_ptrace(long request, long pid, long addr, long data); struct sigaction; asmlinkage long sys_rt_sigaction(int sig, const struct sigaction __user *act, diff --git a/include/asm-cris/arch-v10/byteorder.h b/include/asm-cris/arch-v10/byteorder.h index e24465d1f40d..255b646b7fa8 100644 --- a/include/asm-cris/arch-v10/byteorder.h +++ b/include/asm-cris/arch-v10/byteorder.h @@ -9,14 +9,14 @@ * them together into ntohl etc. */ -extern __inline__ __attribute_const__ __u32 ___arch__swab32(__u32 x) +static inline __attribute_const__ __u32 ___arch__swab32(__u32 x) { __asm__ ("swapwb %0" : "=r" (x) : "0" (x)); return(x); } -extern __inline__ __attribute_const__ __u16 ___arch__swab16(__u16 x) +static inline __attribute_const__ __u16 ___arch__swab16(__u16 x) { __asm__ ("swapb %0" : "=r" (x) : "0" (x)); diff --git a/include/asm-cris/arch-v10/checksum.h b/include/asm-cris/arch-v10/checksum.h index fde1d00aaa90..633f234f336b 100644 --- a/include/asm-cris/arch-v10/checksum.h +++ b/include/asm-cris/arch-v10/checksum.h @@ -8,7 +8,7 @@ * to split all of those into 16-bit components, then add. */ -extern inline unsigned int +static inline unsigned int csum_tcpudp_nofold(unsigned long saddr, unsigned long daddr, unsigned short len, unsigned short proto, unsigned int sum) { diff --git a/include/asm-cris/arch-v10/delay.h b/include/asm-cris/arch-v10/delay.h index cfedae0d2f53..39481f6e0c30 100644 --- a/include/asm-cris/arch-v10/delay.h +++ b/include/asm-cris/arch-v10/delay.h @@ -1,7 +1,7 @@ #ifndef _CRIS_ARCH_DELAY_H #define _CRIS_ARCH_DELAY_H -extern __inline__ void __delay(int loops) +static inline void __delay(int loops) { __asm__ __volatile__ ( "move.d %0,$r9\n\t" diff --git a/include/asm-cris/arch-v10/ide.h b/include/asm-cris/arch-v10/ide.h index 8cf2d7cb22ac..78b301ed7b12 100644 --- a/include/asm-cris/arch-v10/ide.h +++ b/include/asm-cris/arch-v10/ide.h @@ -25,7 +25,7 @@ #define MAX_HWIFS 4 -extern __inline__ int ide_default_irq(unsigned long base) +static inline int ide_default_irq(unsigned long base) { /* all IDE busses share the same IRQ, number 4. * this has the side-effect that ide-probe.c will cluster our 4 interfaces @@ -35,7 +35,7 @@ extern __inline__ int ide_default_irq(unsigned long base) return 4; } -extern __inline__ unsigned long ide_default_io_base(int index) +static inline unsigned long ide_default_io_base(int index) { /* we have no real I/O base address per interface, since all go through the * same register. but in a bitfield in that register, we have the i/f number. @@ -54,7 +54,7 @@ extern __inline__ unsigned long ide_default_io_base(int index) * of the ide_default_io_base call above. ctrl_port will be 0, but that is don't care for us. */ -extern __inline__ void ide_init_hwif_ports(hw_regs_t *hw, unsigned long data_port, unsigned long ctrl_port, int *irq) +static inline void ide_init_hwif_ports(hw_regs_t *hw, unsigned long data_port, unsigned long ctrl_port, int *irq) { int i; @@ -77,7 +77,7 @@ extern __inline__ void ide_init_hwif_ports(hw_regs_t *hw, unsigned long data_por hw->io_ports[IDE_IRQ_OFFSET] = 0; } -extern __inline__ void ide_init_default_hwifs(void) +static inline void ide_init_default_hwifs(void) { hw_regs_t hw; int index; diff --git a/include/asm-cris/arch-v10/system.h b/include/asm-cris/arch-v10/system.h index 6cc35642b8ab..1ac7b639b1b0 100644 --- a/include/asm-cris/arch-v10/system.h +++ b/include/asm-cris/arch-v10/system.h @@ -5,7 +5,7 @@ /* read the CPU version register */ -extern inline unsigned long rdvr(void) { +static inline unsigned long rdvr(void) { unsigned char vr; __asm__ volatile ("move $vr,%0" : "=rm" (vr)); return vr; @@ -15,7 +15,7 @@ extern inline unsigned long rdvr(void) { /* read/write the user-mode stackpointer */ -extern inline unsigned long rdusp(void) { +static inline unsigned long rdusp(void) { unsigned long usp; __asm__ __volatile__("move $usp,%0" : "=rm" (usp)); return usp; @@ -26,13 +26,13 @@ extern inline unsigned long rdusp(void) { /* read the current stackpointer */ -extern inline unsigned long rdsp(void) { +static inline unsigned long rdsp(void) { unsigned long sp; __asm__ __volatile__("move.d $sp,%0" : "=rm" (sp)); return sp; } -extern inline unsigned long _get_base(char * addr) +static inline unsigned long _get_base(char * addr) { return 0; } diff --git a/include/asm-cris/arch-v10/thread_info.h b/include/asm-cris/arch-v10/thread_info.h index 357f5df0c907..218f4152d3e5 100644 --- a/include/asm-cris/arch-v10/thread_info.h +++ b/include/asm-cris/arch-v10/thread_info.h @@ -2,7 +2,7 @@ #define _ASM_ARCH_THREAD_INFO_H /* how to get the thread information struct from C */ -extern inline struct thread_info *current_thread_info(void) +static inline struct thread_info *current_thread_info(void) { struct thread_info *ti; __asm__("and.d $sp,%0; ":"=r" (ti) : "0" (~8191UL)); diff --git a/include/asm-cris/arch-v10/timex.h b/include/asm-cris/arch-v10/timex.h index ecfc553c06a5..e48447d94faf 100644 --- a/include/asm-cris/arch-v10/timex.h +++ b/include/asm-cris/arch-v10/timex.h @@ -22,7 +22,7 @@ unsigned long get_ns_in_jiffie(void); -extern inline unsigned long get_us_in_jiffie_highres(void) +static inline unsigned long get_us_in_jiffie_highres(void) { return get_ns_in_jiffie()/1000; } diff --git a/include/asm-cris/arch-v10/uaccess.h b/include/asm-cris/arch-v10/uaccess.h index 787d2e60c83c..65b02d9b605a 100644 --- a/include/asm-cris/arch-v10/uaccess.h +++ b/include/asm-cris/arch-v10/uaccess.h @@ -87,7 +87,7 @@ * bytes copied if we hit a null byte * (without the null byte) */ -extern inline long +static inline long __do_strncpy_from_user(char *dst, const char *src, long count) { long res; @@ -602,7 +602,7 @@ __do_strncpy_from_user(char *dst, const char *src, long count) * or 0 for error. Return a value greater than N if too long. */ -extern inline long +static inline long strnlen_user(const char *s, long n) { long res, tmp1; diff --git a/include/asm-cris/arch-v32/bitops.h b/include/asm-cris/arch-v32/bitops.h index e40a58d3b862..147689d6b624 100644 --- a/include/asm-cris/arch-v32/bitops.h +++ b/include/asm-cris/arch-v32/bitops.h @@ -8,7 +8,7 @@ * inverts all bits in the input. */ -extern inline unsigned long +static inline unsigned long cris_swapnwbrlz(unsigned long w) { unsigned long res; @@ -20,7 +20,7 @@ cris_swapnwbrlz(unsigned long w) return res; } -extern inline unsigned long +static inline unsigned long cris_swapwbrlz(unsigned long w) { unsigned long res; @@ -36,7 +36,7 @@ cris_swapwbrlz(unsigned long w) * Find First Zero in word. Undefined if no zero exist, so the caller should * check against ~0 first. */ -extern inline unsigned long +static inline unsigned long ffz(unsigned long w) { return cris_swapnwbrlz(w); @@ -46,7 +46,7 @@ ffz(unsigned long w) * Find First Set bit in word. Undefined if no 1 exist, so the caller * should check against 0 first. */ -extern inline unsigned long +static inline unsigned long __ffs(unsigned long w) { return cris_swapnwbrlz(~w); @@ -55,7 +55,7 @@ __ffs(unsigned long w) /* * Find First Bit that is set. */ -extern inline unsigned long +static inline unsigned long kernel_ffs(unsigned long w) { return w ? cris_swapwbrlz (w) + 1 : 0; diff --git a/include/asm-cris/arch-v32/byteorder.h b/include/asm-cris/arch-v32/byteorder.h index 74846ee6cf99..6ef8fb4a35f2 100644 --- a/include/asm-cris/arch-v32/byteorder.h +++ b/include/asm-cris/arch-v32/byteorder.h @@ -3,14 +3,14 @@ #include <asm/types.h> -extern __inline__ __const__ __u32 +static inline __const__ __u32 ___arch__swab32(__u32 x) { __asm__ __volatile__ ("swapwb %0" : "=r" (x) : "0" (x)); return (x); } -extern __inline__ __const__ __u16 +static inline __const__ __u16 ___arch__swab16(__u16 x) { __asm__ __volatile__ ("swapb %0" : "=r" (x) : "0" (x)); diff --git a/include/asm-cris/arch-v32/checksum.h b/include/asm-cris/arch-v32/checksum.h index a1d6b2a6cc44..97ef89efea62 100644 --- a/include/asm-cris/arch-v32/checksum.h +++ b/include/asm-cris/arch-v32/checksum.h @@ -9,7 +9,7 @@ * checksum. Which means it would be necessary to split all those into * 16-bit components and then add. */ -extern inline unsigned int +static inline unsigned int csum_tcpudp_nofold(unsigned long saddr, unsigned long daddr, unsigned short len, unsigned short proto, unsigned int sum) { diff --git a/include/asm-cris/arch-v32/delay.h b/include/asm-cris/arch-v32/delay.h index f36f7f760e89..b6e941e637de 100644 --- a/include/asm-cris/arch-v32/delay.h +++ b/include/asm-cris/arch-v32/delay.h @@ -1,7 +1,7 @@ #ifndef _ASM_CRIS_ARCH_DELAY_H #define _ASM_CRIS_ARCH_DELAY_H -extern __inline__ void +static inline void __delay(int loops) { __asm__ __volatile__ ( diff --git a/include/asm-cris/arch-v32/ide.h b/include/asm-cris/arch-v32/ide.h index 24f5604f566a..6590f657500d 100644 --- a/include/asm-cris/arch-v32/ide.h +++ b/include/asm-cris/arch-v32/ide.h @@ -26,7 +26,7 @@ #define MAX_HWIFS 4 -extern __inline__ int ide_default_irq(unsigned long base) +static inline int ide_default_irq(unsigned long base) { /* all IDE busses share the same IRQ, * this has the side-effect that ide-probe.c will cluster our 4 interfaces @@ -36,7 +36,7 @@ extern __inline__ int ide_default_irq(unsigned long base) return ATA_INTR_VECT; } -extern __inline__ unsigned long ide_default_io_base(int index) +static inline unsigned long ide_default_io_base(int index) { reg_ata_rw_ctrl2 ctrl2 = {.sel = index}; /* we have no real I/O base address per interface, since all go through the diff --git a/include/asm-cris/arch-v32/io.h b/include/asm-cris/arch-v32/io.h index 4c80263ec634..043c9ce5294e 100644 --- a/include/asm-cris/arch-v32/io.h +++ b/include/asm-cris/arch-v32/io.h @@ -35,7 +35,7 @@ extern struct crisv32_iopin crisv32_led2_red; extern struct crisv32_iopin crisv32_led3_green; extern struct crisv32_iopin crisv32_led3_red; -extern inline void crisv32_io_set(struct crisv32_iopin* iopin, +static inline void crisv32_io_set(struct crisv32_iopin* iopin, int val) { if (val) @@ -44,7 +44,7 @@ extern inline void crisv32_io_set(struct crisv32_iopin* iopin, *iopin->port->data &= ~iopin->bit; } -extern inline void crisv32_io_set_dir(struct crisv32_iopin* iopin, +static inline void crisv32_io_set_dir(struct crisv32_iopin* iopin, enum crisv32_io_dir dir) { if (dir == crisv32_io_dir_in) @@ -53,7 +53,7 @@ extern inline void crisv32_io_set_dir(struct crisv32_iopin* iopin, *iopin->port->oe |= iopin->bit; } -extern inline int crisv32_io_rd(struct crisv32_iopin* iopin) +static inline int crisv32_io_rd(struct crisv32_iopin* iopin) { return ((*iopin->port->data_in & iopin->bit) ? 1 : 0); } diff --git a/include/asm-cris/arch-v32/system.h b/include/asm-cris/arch-v32/system.h index b9afbb95e0bb..a3d75d581e2f 100644 --- a/include/asm-cris/arch-v32/system.h +++ b/include/asm-cris/arch-v32/system.h @@ -4,7 +4,7 @@ #include <linux/config.h> /* Read the CPU version register. */ -extern inline unsigned long rdvr(void) +static inline unsigned long rdvr(void) { unsigned char vr; @@ -15,7 +15,7 @@ extern inline unsigned long rdvr(void) #define cris_machine_name "crisv32" /* Read the user-mode stack pointer. */ -extern inline unsigned long rdusp(void) +static inline unsigned long rdusp(void) { unsigned long usp; @@ -24,7 +24,7 @@ extern inline unsigned long rdusp(void) } /* Read the current stack pointer. */ -extern inline unsigned long rdsp(void) +static inline unsigned long rdsp(void) { unsigned long sp; diff --git a/include/asm-cris/arch-v32/thread_info.h b/include/asm-cris/arch-v32/thread_info.h index a7a182307da0..d6936956a3c6 100644 --- a/include/asm-cris/arch-v32/thread_info.h +++ b/include/asm-cris/arch-v32/thread_info.h @@ -2,7 +2,7 @@ #define _ASM_CRIS_ARCH_THREAD_INFO_H /* Return a thread_info struct. */ -extern inline struct thread_info *current_thread_info(void) +static inline struct thread_info *current_thread_info(void) { struct thread_info *ti; diff --git a/include/asm-cris/arch-v32/timex.h b/include/asm-cris/arch-v32/timex.h index 4d0fd23b21e9..5a4aa285d5fd 100644 --- a/include/asm-cris/arch-v32/timex.h +++ b/include/asm-cris/arch-v32/timex.h @@ -22,7 +22,7 @@ extern unsigned long get_ns_in_jiffie(void); -extern inline unsigned long get_us_in_jiffie_highres(void) +static inline unsigned long get_us_in_jiffie_highres(void) { return get_ns_in_jiffie() / 1000; } diff --git a/include/asm-cris/arch-v32/uaccess.h b/include/asm-cris/arch-v32/uaccess.h index 055a0bdbe835..6b207f1b6622 100644 --- a/include/asm-cris/arch-v32/uaccess.h +++ b/include/asm-cris/arch-v32/uaccess.h @@ -93,7 +93,7 @@ * bytes copied if we hit a null byte * (without the null byte) */ -extern inline long +static inline long __do_strncpy_from_user(char *dst, const char *src, long count) { long res; @@ -695,7 +695,7 @@ __do_strncpy_from_user(char *dst, const char *src, long count) * or 0 for error. Return a value greater than N if too long. */ -extern inline long +static inline long strnlen_user(const char *s, long n) { long res, tmp1; diff --git a/include/asm-cris/atomic.h b/include/asm-cris/atomic.h index 70605b09e8b7..683b05a57d88 100644 --- a/include/asm-cris/atomic.h +++ b/include/asm-cris/atomic.h @@ -20,7 +20,7 @@ typedef struct { volatile int counter; } atomic_t; /* These should be written in asm but we do it in C for now. */ -extern __inline__ void atomic_add(int i, volatile atomic_t *v) +static inline void atomic_add(int i, volatile atomic_t *v) { unsigned long flags; cris_atomic_save(v, flags); @@ -28,7 +28,7 @@ extern __inline__ void atomic_add(int i, volatile atomic_t *v) cris_atomic_restore(v, flags); } -extern __inline__ void atomic_sub(int i, volatile atomic_t *v) +static inline void atomic_sub(int i, volatile atomic_t *v) { unsigned long flags; cris_atomic_save(v, flags); @@ -36,7 +36,7 @@ extern __inline__ void atomic_sub(int i, volatile atomic_t *v) cris_atomic_restore(v, flags); } -extern __inline__ int atomic_add_return(int i, volatile atomic_t *v) +static inline int atomic_add_return(int i, volatile atomic_t *v) { unsigned long flags; int retval; @@ -48,7 +48,7 @@ extern __inline__ int atomic_add_return(int i, volatile atomic_t *v) #define atomic_add_negative(a, v) (atomic_add_return((a), (v)) < 0) -extern __inline__ int atomic_sub_return(int i, volatile atomic_t *v) +static inline int atomic_sub_return(int i, volatile atomic_t *v) { unsigned long flags; int retval; @@ -58,7 +58,7 @@ extern __inline__ int atomic_sub_return(int i, volatile atomic_t *v) return retval; } -extern __inline__ int atomic_sub_and_test(int i, volatile atomic_t *v) +static inline int atomic_sub_and_test(int i, volatile atomic_t *v) { int retval; unsigned long flags; @@ -68,7 +68,7 @@ extern __inline__ int atomic_sub_and_test(int i, volatile atomic_t *v) return retval; } -extern __inline__ void atomic_inc(volatile atomic_t *v) +static inline void atomic_inc(volatile atomic_t *v) { unsigned long flags; cris_atomic_save(v, flags); @@ -76,7 +76,7 @@ extern __inline__ void atomic_inc(volatile atomic_t *v) cris_atomic_restore(v, flags); } -extern __inline__ void atomic_dec(volatile atomic_t *v) +static inline void atomic_dec(volatile atomic_t *v) { unsigned long flags; cris_atomic_save(v, flags); @@ -84,7 +84,7 @@ extern __inline__ void atomic_dec(volatile atomic_t *v) cris_atomic_restore(v, flags); } -extern __inline__ int atomic_inc_return(volatile atomic_t *v) +static inline int atomic_inc_return(volatile atomic_t *v) { unsigned long flags; int retval; @@ -94,7 +94,7 @@ extern __inline__ int atomic_inc_return(volatile atomic_t *v) return retval; } -extern __inline__ int atomic_dec_return(volatile atomic_t *v) +static inline int atomic_dec_return(volatile atomic_t *v) { unsigned long flags; int retval; @@ -103,7 +103,7 @@ extern __inline__ int atomic_dec_return(volatile atomic_t *v) cris_atomic_restore(v, flags); return retval; } -extern __inline__ int atomic_dec_and_test(volatile atomic_t *v) +static inline int atomic_dec_and_test(volatile atomic_t *v) { int retval; unsigned long flags; @@ -113,7 +113,7 @@ extern __inline__ int atomic_dec_and_test(volatile atomic_t *v) return retval; } -extern __inline__ int atomic_inc_and_test(volatile atomic_t *v) +static inline int atomic_inc_and_test(volatile atomic_t *v) { int retval; unsigned long flags; @@ -123,6 +123,33 @@ extern __inline__ int atomic_inc_and_test(volatile atomic_t *v) return retval; } +static inline int atomic_cmpxchg(atomic_t *v, int old, int new) +{ + int ret; + unsigned long flags; + + cris_atomic_save(v, flags); + ret = v->counter; + if (likely(ret == old)) + v->counter = new; + cris_atomic_restore(v, flags); + return ret; +} + +static inline int atomic_add_unless(atomic_t *v, int a, int u) +{ + int ret; + unsigned long flags; + + cris_atomic_save(v, flags); + ret = v->counter; + if (ret != u) + v->counter += a; + cris_atomic_restore(v, flags); + return ret != u; +} +#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0) + /* Atomic operations are already serializing */ #define smp_mb__before_atomic_dec() barrier() #define smp_mb__after_atomic_dec() barrier() diff --git a/include/asm-cris/bitops.h b/include/asm-cris/bitops.h index e3da57f97964..1bddb3f3a289 100644 --- a/include/asm-cris/bitops.h +++ b/include/asm-cris/bitops.h @@ -89,7 +89,7 @@ struct __dummy { unsigned long a[100]; }; * It also implies a memory barrier. */ -extern inline int test_and_set_bit(int nr, volatile unsigned long *addr) +static inline int test_and_set_bit(int nr, volatile unsigned long *addr) { unsigned int mask, retval; unsigned long flags; @@ -105,7 +105,7 @@ extern inline int test_and_set_bit(int nr, volatile unsigned long *addr) return retval; } -extern inline int __test_and_set_bit(int nr, volatile unsigned long *addr) +static inline int __test_and_set_bit(int nr, volatile unsigned long *addr) { unsigned int mask, retval; unsigned int *adr = (unsigned int *)addr; @@ -132,7 +132,7 @@ extern inline int __test_and_set_bit(int nr, volatile unsigned long *addr) * It also implies a memory barrier. */ -extern inline int test_and_clear_bit(int nr, volatile unsigned long *addr) +static inline int test_and_clear_bit(int nr, volatile unsigned long *addr) { unsigned int mask, retval; unsigned long flags; @@ -157,7 +157,7 @@ extern inline int test_and_clear_bit(int nr, volatile unsigned long *addr) * but actually fail. You must protect multiple accesses with a lock. */ -extern inline int __test_and_clear_bit(int nr, volatile unsigned long *addr) +static inline int __test_and_clear_bit(int nr, volatile unsigned long *addr) { unsigned int mask, retval; unsigned int *adr = (unsigned int *)addr; @@ -177,7 +177,7 @@ extern inline int __test_and_clear_bit(int nr, volatile unsigned long *addr) * It also implies a memory barrier. */ -extern inline int test_and_change_bit(int nr, volatile unsigned long *addr) +static inline int test_and_change_bit(int nr, volatile unsigned long *addr) { unsigned int mask, retval; unsigned long flags; @@ -193,7 +193,7 @@ extern inline int test_and_change_bit(int nr, volatile unsigned long *addr) /* WARNING: non atomic and it can be reordered! */ -extern inline int __test_and_change_bit(int nr, volatile unsigned long *addr) +static inline int __test_and_change_bit(int nr, volatile unsigned long *addr) { unsigned int mask, retval; unsigned int *adr = (unsigned int *)addr; @@ -214,7 +214,7 @@ extern inline int __test_and_change_bit(int nr, volatile unsigned long *addr) * This routine doesn't need to be atomic. */ -extern inline int test_bit(int nr, const volatile unsigned long *addr) +static inline int test_bit(int nr, const volatile unsigned long *addr) { unsigned int mask; unsigned int *adr = (unsigned int *)addr; @@ -258,7 +258,7 @@ extern inline int test_bit(int nr, const volatile unsigned long *addr) * @offset: The bitnumber to start searching at * @size: The maximum size to search */ -extern inline int find_next_zero_bit (const unsigned long * addr, int size, int offset) +static inline int find_next_zero_bit (const unsigned long * addr, int size, int offset) { unsigned long *p = ((unsigned long *) addr) + (offset >> 5); unsigned long result = offset & ~31UL; @@ -366,7 +366,7 @@ found_middle: #define minix_test_bit(nr,addr) test_bit(nr,addr) #define minix_find_first_zero_bit(addr,size) find_first_zero_bit(addr,size) -extern inline int sched_find_first_bit(const unsigned long *b) +static inline int sched_find_first_bit(const unsigned long *b) { if (unlikely(b[0])) return __ffs(b[0]); diff --git a/include/asm-cris/checksum.h b/include/asm-cris/checksum.h index 15ca8aec5c63..26a7719bbb84 100644 --- a/include/asm-cris/checksum.h +++ b/include/asm-cris/checksum.h @@ -34,7 +34,7 @@ unsigned int csum_partial_copy_nocheck(const char *src, char *dst, * Fold a partial checksum into a word */ -extern inline unsigned int csum_fold(unsigned int sum) +static inline unsigned int csum_fold(unsigned int sum) { /* the while loop is unnecessary really, it's always enough with two iterations */ @@ -55,7 +55,7 @@ extern unsigned int csum_partial_copy_from_user(const char *src, char *dst, * */ -extern inline unsigned short ip_fast_csum(unsigned char * iph, +static inline unsigned short ip_fast_csum(unsigned char * iph, unsigned int ihl) { return csum_fold(csum_partial(iph, ihl * 4, 0)); @@ -66,7 +66,7 @@ extern inline unsigned short ip_fast_csum(unsigned char * iph, * returns a 16-bit checksum, already complemented */ -extern inline unsigned short int csum_tcpudp_magic(unsigned long saddr, +static inline unsigned short int csum_tcpudp_magic(unsigned long saddr, unsigned long daddr, unsigned short len, unsigned short proto, @@ -80,7 +80,7 @@ extern inline unsigned short int csum_tcpudp_magic(unsigned long saddr, * in icmp.c */ -extern inline unsigned short ip_compute_csum(unsigned char * buff, int len) { +static inline unsigned short ip_compute_csum(unsigned char * buff, int len) { return csum_fold (csum_partial(buff, len, 0)); } diff --git a/include/asm-cris/current.h b/include/asm-cris/current.h index dce69c99da39..5f5c0efd00be 100644 --- a/include/asm-cris/current.h +++ b/include/asm-cris/current.h @@ -5,7 +5,7 @@ struct task_struct; -extern inline struct task_struct * get_current(void) +static inline struct task_struct * get_current(void) { return current_thread_info()->task; } diff --git a/include/asm-cris/delay.h b/include/asm-cris/delay.h index efc41aad4845..d3a397803719 100644 --- a/include/asm-cris/delay.h +++ b/include/asm-cris/delay.h @@ -13,7 +13,7 @@ extern unsigned long loops_per_usec; /* arch/cris/mm/init.c */ -extern __inline__ void udelay(unsigned long usecs) +static inline void udelay(unsigned long usecs) { __delay(usecs * loops_per_usec); } diff --git a/include/asm-cris/dma-mapping.h b/include/asm-cris/dma-mapping.h index 0b5c3fdaefe1..8eff51349ae7 100644 --- a/include/asm-cris/dma-mapping.h +++ b/include/asm-cris/dma-mapping.h @@ -15,14 +15,14 @@ #ifdef CONFIG_PCI void *dma_alloc_coherent(struct device *dev, size_t size, - dma_addr_t *dma_handle, int flag); + dma_addr_t *dma_handle, gfp_t flag); void dma_free_coherent(struct device *dev, size_t size, void *vaddr, dma_addr_t dma_handle); #else static inline void * dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *dma_handle, - int flag) + gfp_t flag) { BUG(); return NULL; diff --git a/include/asm-cris/io.h b/include/asm-cris/io.h index 16e791b3c721..716c69bc58f8 100644 --- a/include/asm-cris/io.h +++ b/include/asm-cris/io.h @@ -23,12 +23,12 @@ extern struct cris_io_operations *cris_iops; * Change virtual addresses to physical addresses and vv. */ -extern inline unsigned long virt_to_phys(volatile void * address) +static inline unsigned long virt_to_phys(volatile void * address) { return __pa(address); } -extern inline void * phys_to_virt(unsigned long address) +static inline void * phys_to_virt(unsigned long address) { return __va(address); } @@ -36,7 +36,7 @@ extern inline void * phys_to_virt(unsigned long address) extern void __iomem * __ioremap(unsigned long offset, unsigned long size, unsigned long flags); extern void __iomem * __ioremap_prot(unsigned long phys_addr, unsigned long size, pgprot_t prot); -extern inline void __iomem * ioremap (unsigned long offset, unsigned long size) +static inline void __iomem * ioremap (unsigned long offset, unsigned long size) { return __ioremap(offset, size, 0); } diff --git a/include/asm-cris/irq.h b/include/asm-cris/irq.h index 4fab5c3b2e15..4b338792218b 100644 --- a/include/asm-cris/irq.h +++ b/include/asm-cris/irq.h @@ -8,7 +8,7 @@ #include <asm/arch/irq.h> -extern __inline__ int irq_canonicalize(int irq) +static inline int irq_canonicalize(int irq) { return irq; } diff --git a/include/asm-cris/pgalloc.h b/include/asm-cris/pgalloc.h index a131776edf41..deaddfe79bbc 100644 --- a/include/asm-cris/pgalloc.h +++ b/include/asm-cris/pgalloc.h @@ -11,35 +11,35 @@ * Allocate and free page tables. */ -extern inline pgd_t *pgd_alloc (struct mm_struct *mm) +static inline pgd_t *pgd_alloc (struct mm_struct *mm) { return (pgd_t *)get_zeroed_page(GFP_KERNEL); } -extern inline void pgd_free (pgd_t *pgd) +static inline void pgd_free (pgd_t *pgd) { free_page((unsigned long)pgd); } -extern inline pte_t *pte_alloc_one_kernel(struct mm_struct *mm, unsigned long address) +static inline pte_t *pte_alloc_one_kernel(struct mm_struct *mm, unsigned long address) { pte_t *pte = (pte_t *)__get_free_page(GFP_KERNEL|__GFP_REPEAT|__GFP_ZERO); return pte; } -extern inline struct page *pte_alloc_one(struct mm_struct *mm, unsigned long address) +static inline struct page *pte_alloc_one(struct mm_struct *mm, unsigned long address) { struct page *pte; pte = alloc_pages(GFP_KERNEL|__GFP_REPEAT|__GFP_ZERO, 0); return pte; } -extern inline void pte_free_kernel(pte_t *pte) +static inline void pte_free_kernel(pte_t *pte) { free_page((unsigned long)pte); } -extern inline void pte_free(struct page *pte) +static inline void pte_free(struct page *pte) { __free_page(pte); } diff --git a/include/asm-cris/pgtable.h b/include/asm-cris/pgtable.h index a9143bed99db..70a832514f62 100644 --- a/include/asm-cris/pgtable.h +++ b/include/asm-cris/pgtable.h @@ -112,44 +112,44 @@ extern unsigned long empty_zero_page; * Undefined behaviour if not.. */ -extern inline int pte_read(pte_t pte) { return pte_val(pte) & _PAGE_READ; } -extern inline int pte_write(pte_t pte) { return pte_val(pte) & _PAGE_WRITE; } -extern inline int pte_exec(pte_t pte) { return pte_val(pte) & _PAGE_READ; } -extern inline int pte_dirty(pte_t pte) { return pte_val(pte) & _PAGE_MODIFIED; } -extern inline int pte_young(pte_t pte) { return pte_val(pte) & _PAGE_ACCESSED; } -extern inline int pte_file(pte_t pte) { return pte_val(pte) & _PAGE_FILE; } - -extern inline pte_t pte_wrprotect(pte_t pte) +static inline int pte_read(pte_t pte) { return pte_val(pte) & _PAGE_READ; } +static inline int pte_write(pte_t pte) { return pte_val(pte) & _PAGE_WRITE; } +static inline int pte_exec(pte_t pte) { return pte_val(pte) & _PAGE_READ; } +static inline int pte_dirty(pte_t pte) { return pte_val(pte) & _PAGE_MODIFIED; } +static inline int pte_young(pte_t pte) { return pte_val(pte) & _PAGE_ACCESSED; } +static inline int pte_file(pte_t pte) { return pte_val(pte) & _PAGE_FILE; } + +static inline pte_t pte_wrprotect(pte_t pte) { pte_val(pte) &= ~(_PAGE_WRITE | _PAGE_SILENT_WRITE); return pte; } -extern inline pte_t pte_rdprotect(pte_t pte) +static inline pte_t pte_rdprotect(pte_t pte) { pte_val(pte) &= ~(_PAGE_READ | _PAGE_SILENT_READ); return pte; } -extern inline pte_t pte_exprotect(pte_t pte) +static inline pte_t pte_exprotect(pte_t pte) { pte_val(pte) &= ~(_PAGE_READ | _PAGE_SILENT_READ); return pte; } -extern inline pte_t pte_mkclean(pte_t pte) +static inline pte_t pte_mkclean(pte_t pte) { pte_val(pte) &= ~(_PAGE_MODIFIED | _PAGE_SILENT_WRITE); return pte; } -extern inline pte_t pte_mkold(pte_t pte) +static inline pte_t pte_mkold(pte_t pte) { pte_val(pte) &= ~(_PAGE_ACCESSED | _PAGE_SILENT_READ); return pte; } -extern inline pte_t pte_mkwrite(pte_t pte) +static inline pte_t pte_mkwrite(pte_t pte) { pte_val(pte) |= _PAGE_WRITE; if (pte_val(pte) & _PAGE_MODIFIED) @@ -157,7 +157,7 @@ extern inline pte_t pte_mkwrite(pte_t pte) return pte; } -extern inline pte_t pte_mkread(pte_t pte) +static inline pte_t pte_mkread(pte_t pte) { pte_val(pte) |= _PAGE_READ; if (pte_val(pte) & _PAGE_ACCESSED) @@ -165,7 +165,7 @@ extern inline pte_t pte_mkread(pte_t pte) return pte; } -extern inline pte_t pte_mkexec(pte_t pte) +static inline pte_t pte_mkexec(pte_t pte) { pte_val(pte) |= _PAGE_READ; if (pte_val(pte) & _PAGE_ACCESSED) @@ -173,7 +173,7 @@ extern inline pte_t pte_mkexec(pte_t pte) return pte; } -extern inline pte_t pte_mkdirty(pte_t pte) +static inline pte_t pte_mkdirty(pte_t pte) { pte_val(pte) |= _PAGE_MODIFIED; if (pte_val(pte) & _PAGE_WRITE) @@ -181,7 +181,7 @@ extern inline pte_t pte_mkdirty(pte_t pte) return pte; } -extern inline pte_t pte_mkyoung(pte_t pte) +static inline pte_t pte_mkyoung(pte_t pte) { pte_val(pte) |= _PAGE_ACCESSED; if (pte_val(pte) & _PAGE_READ) @@ -205,7 +205,7 @@ extern inline pte_t pte_mkyoung(pte_t pte) * addresses (the 0xc0xxxxxx's) goes as void *'s. */ -extern inline pte_t __mk_pte(void * page, pgprot_t pgprot) +static inline pte_t __mk_pte(void * page, pgprot_t pgprot) { pte_t pte; /* the PTE needs a physical address */ @@ -223,7 +223,7 @@ extern inline pte_t __mk_pte(void * page, pgprot_t pgprot) __pte; \ }) -extern inline pte_t pte_modify(pte_t pte, pgprot_t newprot) +static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) { pte_val(pte) = (pte_val(pte) & _PAGE_CHG_MASK) | pgprot_val(newprot); return pte; } @@ -232,7 +232,7 @@ extern inline pte_t pte_modify(pte_t pte, pgprot_t newprot) * pte_pagenr refers to the page-number counted starting from the virtual DRAM start */ -extern inline unsigned long __pte_page(pte_t pte) +static inline unsigned long __pte_page(pte_t pte) { /* the PTE contains a physical address */ return (unsigned long)__va(pte_val(pte) & PAGE_MASK); @@ -250,7 +250,7 @@ extern inline unsigned long __pte_page(pte_t pte) * don't need the __pa and __va transformations. */ -extern inline void pmd_set(pmd_t * pmdp, pte_t * ptep) +static inline void pmd_set(pmd_t * pmdp, pte_t * ptep) { pmd_val(*pmdp) = _PAGE_TABLE | (unsigned long) ptep; } #define pmd_page(pmd) (pfn_to_page(pmd_val(pmd) >> PAGE_SHIFT)) @@ -260,7 +260,7 @@ extern inline void pmd_set(pmd_t * pmdp, pte_t * ptep) #define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD-1)) /* to find an entry in a page-table-directory */ -extern inline pgd_t * pgd_offset(struct mm_struct * mm, unsigned long address) +static inline pgd_t * pgd_offset(struct mm_struct * mm, unsigned long address) { return mm->pgd + pgd_index(address); } @@ -296,7 +296,7 @@ extern pgd_t swapper_pg_dir[PTRS_PER_PGD]; /* defined in head.S */ * * Actually I am not sure on what this could be used for. */ -extern inline void update_mmu_cache(struct vm_area_struct * vma, +static inline void update_mmu_cache(struct vm_area_struct * vma, unsigned long address, pte_t pte) { } diff --git a/include/asm-cris/processor.h b/include/asm-cris/processor.h index 0dc218117bd8..dce41009eeb0 100644 --- a/include/asm-cris/processor.h +++ b/include/asm-cris/processor.h @@ -16,6 +16,8 @@ #include <asm/ptrace.h> #include <asm/arch/processor.h> +struct task_struct; + /* This decides where the kernel will search for a free chunk of vm * space during mmap's. */ @@ -45,7 +47,7 @@ #define current_regs() user_regs(current->thread_info) -extern inline void prepare_to_copy(struct task_struct *tsk) +static inline void prepare_to_copy(struct task_struct *tsk) { } @@ -58,7 +60,7 @@ unsigned long get_wchan(struct task_struct *p); extern unsigned long thread_saved_pc(struct task_struct *tsk); /* Free all resources held by a thread. */ -extern inline void release_thread(struct task_struct *dead_task) +static inline void release_thread(struct task_struct *dead_task) { /* Nothing needs to be done. */ } diff --git a/include/asm-cris/semaphore.h b/include/asm-cris/semaphore.h index 8ed7636ab311..53f548b791c1 100644 --- a/include/asm-cris/semaphore.h +++ b/include/asm-cris/semaphore.h @@ -18,8 +18,6 @@ * CRIS semaphores, implemented in C-only so far. */ -int printk(const char *fmt, ...); - struct semaphore { atomic_t count; atomic_t waking; @@ -33,26 +31,23 @@ struct semaphore { .wait = __WAIT_QUEUE_HEAD_INITIALIZER((name).wait) \ } -#define __MUTEX_INITIALIZER(name) \ - __SEMAPHORE_INITIALIZER(name,1) - #define __DECLARE_SEMAPHORE_GENERIC(name,count) \ struct semaphore name = __SEMAPHORE_INITIALIZER(name,count) #define DECLARE_MUTEX(name) __DECLARE_SEMAPHORE_GENERIC(name,1) #define DECLARE_MUTEX_LOCKED(name) __DECLARE_SEMAPHORE_GENERIC(name,0) -extern inline void sema_init(struct semaphore *sem, int val) +static inline void sema_init(struct semaphore *sem, int val) { *sem = (struct semaphore)__SEMAPHORE_INITIALIZER((*sem),val); } -extern inline void init_MUTEX (struct semaphore *sem) +static inline void init_MUTEX (struct semaphore *sem) { sema_init(sem, 1); } -extern inline void init_MUTEX_LOCKED (struct semaphore *sem) +static inline void init_MUTEX_LOCKED (struct semaphore *sem) { sema_init(sem, 0); } @@ -64,7 +59,7 @@ extern void __up(struct semaphore * sem); /* notice - we probably can do cli/sti here instead of saving */ -extern inline void down(struct semaphore * sem) +static inline void down(struct semaphore * sem) { unsigned long flags; int failed; @@ -86,7 +81,7 @@ extern inline void down(struct semaphore * sem) * returns negative for signalled and zero for semaphore acquired. */ -extern inline int down_interruptible(struct semaphore * sem) +static inline int down_interruptible(struct semaphore * sem) { unsigned long flags; int failed; @@ -102,7 +97,7 @@ extern inline int down_interruptible(struct semaphore * sem) return(failed); } -extern inline int down_trylock(struct semaphore * sem) +static inline int down_trylock(struct semaphore * sem) { unsigned long flags; int failed; @@ -122,7 +117,7 @@ extern inline int down_trylock(struct semaphore * sem) * The default case (no contention) will result in NO * jumps for both down() and up(). */ -extern inline void up(struct semaphore * sem) +static inline void up(struct semaphore * sem) { unsigned long flags; int wakeup; diff --git a/include/asm-cris/system.h b/include/asm-cris/system.h index e06739806d4e..d48670107a85 100644 --- a/include/asm-cris/system.h +++ b/include/asm-cris/system.h @@ -41,7 +41,7 @@ extern struct task_struct *resume(struct task_struct *prev, struct task_struct * void disable_hlt(void); void enable_hlt(void); -extern inline unsigned long __xchg(unsigned long x, volatile void * ptr, int size) +static inline unsigned long __xchg(unsigned long x, volatile void * ptr, int size) { /* since Etrax doesn't have any atomic xchg instructions, we need to disable irq's (if enabled) and do it with move.d's */ diff --git a/include/asm-cris/timex.h b/include/asm-cris/timex.h index 3fb069a37717..b92e0e80fe86 100644 --- a/include/asm-cris/timex.h +++ b/include/asm-cris/timex.h @@ -16,7 +16,7 @@ typedef unsigned long long cycles_t; -extern inline cycles_t get_cycles(void) +static inline cycles_t get_cycles(void) { return 0; } diff --git a/include/asm-cris/tlbflush.h b/include/asm-cris/tlbflush.h index 6ed7d9ae90db..c52238005b55 100644 --- a/include/asm-cris/tlbflush.h +++ b/include/asm-cris/tlbflush.h @@ -39,14 +39,14 @@ static inline void flush_tlb_range(struct vm_area_struct * vma, unsigned long st flush_tlb_mm(vma->vm_mm); } -extern inline void flush_tlb_pgtables(struct mm_struct *mm, +static inline void flush_tlb_pgtables(struct mm_struct *mm, unsigned long start, unsigned long end) { /* CRIS does not keep any page table caches in TLB */ } -extern inline void flush_tlb(void) +static inline void flush_tlb(void) { flush_tlb_mm(current->mm); } diff --git a/include/asm-cris/uaccess.h b/include/asm-cris/uaccess.h index 7d50086eb5ea..69d48a2dc8e1 100644 --- a/include/asm-cris/uaccess.h +++ b/include/asm-cris/uaccess.h @@ -213,7 +213,7 @@ extern unsigned long __copy_user(void *to, const void *from, unsigned long n); extern unsigned long __copy_user_zeroing(void *to, const void *from, unsigned long n); extern unsigned long __do_clear_user(void *to, unsigned long n); -extern inline unsigned long +static inline unsigned long __generic_copy_to_user(void __user *to, const void *from, unsigned long n) { if (access_ok(VERIFY_WRITE, to, n)) @@ -221,7 +221,7 @@ __generic_copy_to_user(void __user *to, const void *from, unsigned long n) return n; } -extern inline unsigned long +static inline unsigned long __generic_copy_from_user(void *to, const void __user *from, unsigned long n) { if (access_ok(VERIFY_READ, from, n)) @@ -229,7 +229,7 @@ __generic_copy_from_user(void *to, const void __user *from, unsigned long n) return n; } -extern inline unsigned long +static inline unsigned long __generic_clear_user(void __user *to, unsigned long n) { if (access_ok(VERIFY_WRITE, to, n)) @@ -237,13 +237,13 @@ __generic_clear_user(void __user *to, unsigned long n) return n; } -extern inline long +static inline long __strncpy_from_user(char *dst, const char __user *src, long count) { return __do_strncpy_from_user(dst, src, count); } -extern inline long +static inline long strncpy_from_user(char *dst, const char __user *src, long count) { long res = -EFAULT; @@ -256,7 +256,7 @@ strncpy_from_user(char *dst, const char __user *src, long count) /* Note that if these expand awfully if made into switch constructs, so don't do that. */ -extern inline unsigned long +static inline unsigned long __constant_copy_from_user(void *to, const void __user *from, unsigned long n) { unsigned long ret = 0; @@ -306,7 +306,7 @@ __constant_copy_from_user(void *to, const void __user *from, unsigned long n) /* Ditto, don't make a switch out of this. */ -extern inline unsigned long +static inline unsigned long __constant_copy_to_user(void __user *to, const void *from, unsigned long n) { unsigned long ret = 0; @@ -356,7 +356,7 @@ __constant_copy_to_user(void __user *to, const void *from, unsigned long n) /* No switch, please. */ -extern inline unsigned long +static inline unsigned long __constant_clear_user(void __user *to, unsigned long n) { unsigned long ret = 0; @@ -406,19 +406,19 @@ __constant_clear_user(void __user *to, unsigned long n) * used in fast paths and have only a small space overhead. */ -extern inline unsigned long +static inline unsigned long __generic_copy_from_user_nocheck(void *to, const void *from, unsigned long n) { return __copy_user_zeroing(to,from,n); } -extern inline unsigned long +static inline unsigned long __generic_copy_to_user_nocheck(void *to, const void *from, unsigned long n) { return __copy_user(to,from,n); } -extern inline unsigned long +static inline unsigned long __generic_clear_user_nocheck(void *to, unsigned long n) { return __do_clear_user(to,n); diff --git a/include/asm-cris/unistd.h b/include/asm-cris/unistd.h index 28232ad2ff34..2627bbdf8a11 100644 --- a/include/asm-cris/unistd.h +++ b/include/asm-cris/unistd.h @@ -343,14 +343,14 @@ * some others too. */ #define __NR__exit __NR_exit -extern inline _syscall0(pid_t,setsid) -extern inline _syscall3(int,write,int,fd,const char *,buf,off_t,count) -extern inline _syscall3(int,read,int,fd,char *,buf,off_t,count) -extern inline _syscall3(off_t,lseek,int,fd,off_t,offset,int,count) -extern inline _syscall1(int,dup,int,fd) -extern inline _syscall3(int,execve,const char *,file,char **,argv,char **,envp) -extern inline _syscall3(int,open,const char *,file,int,flag,int,mode) -extern inline _syscall1(int,close,int,fd) +static inline _syscall0(pid_t,setsid) +static inline _syscall3(int,write,int,fd,const char *,buf,off_t,count) +static inline _syscall3(int,read,int,fd,char *,buf,off_t,count) +static inline _syscall3(off_t,lseek,int,fd,off_t,offset,int,count) +static inline _syscall1(int,dup,int,fd) +static inline _syscall3(int,execve,const char *,file,char **,argv,char **,envp) +static inline _syscall3(int,open,const char *,file,int,flag,int,mode) +static inline _syscall1(int,close,int,fd) struct pt_regs; asmlinkage long sys_mmap2( @@ -367,7 +367,6 @@ asmlinkage int sys_fork(long r10, long r11, long r12, long r13, asmlinkage int sys_vfork(long r10, long r11, long r12, long r13, long mof, long srp, struct pt_regs *regs); asmlinkage int sys_pipe(unsigned long __user *fildes); -asmlinkage int sys_ptrace(long request, long pid, long addr, long data); struct sigaction; asmlinkage long sys_rt_sigaction(int sig, const struct sigaction __user *act, @@ -383,8 +382,8 @@ asmlinkage long sys_rt_sigaction(int sig, #ifdef __KERNEL__ #define _exit kernel_syscall_exit #endif -extern inline _syscall1(int,_exit,int,exitcode) -extern inline _syscall3(pid_t,waitpid,pid_t,pid,int *,wait_stat,int,options) +static inline _syscall1(int,_exit,int,exitcode) +static inline _syscall3(pid_t,waitpid,pid_t,pid,int *,wait_stat,int,options) #endif diff --git a/include/asm-frv/atomic.h b/include/asm-frv/atomic.h index e75968463428..f6539ff569c5 100644 --- a/include/asm-frv/atomic.h +++ b/include/asm-frv/atomic.h @@ -414,4 +414,16 @@ extern uint32_t __cmpxchg_32(uint32_t *v, uint32_t test, uint32_t new); #endif +#define atomic_cmpxchg(v, old, new) ((int)cmpxchg(&((v)->counter), old, new)) + +#define atomic_add_unless(v, a, u) \ +({ \ + int c, old; \ + c = atomic_read(v); \ + while (c != (u) && (old = atomic_cmpxchg((v), c, c + (a))) != c) \ + c = old; \ + c != (u); \ +}) +#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0) + #endif /* _ASM_ATOMIC_H */ diff --git a/include/asm-frv/dma-mapping.h b/include/asm-frv/dma-mapping.h index 0206ab35eae0..5003e017fd1e 100644 --- a/include/asm-frv/dma-mapping.h +++ b/include/asm-frv/dma-mapping.h @@ -13,7 +13,7 @@ extern unsigned long __nongprelbss dma_coherent_mem_start; extern unsigned long __nongprelbss dma_coherent_mem_end; -void *dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *dma_handle, int gfp); +void *dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *dma_handle, gfp_t gfp); void dma_free_coherent(struct device *dev, size_t size, void *vaddr, dma_addr_t dma_handle); /* diff --git a/include/asm-frv/hardirq.h b/include/asm-frv/hardirq.h index 5248ca054909..685123981e8b 100644 --- a/include/asm-frv/hardirq.h +++ b/include/asm-frv/hardirq.h @@ -14,6 +14,7 @@ #include <linux/config.h> #include <linux/threads.h> +#include <linux/irq.h> typedef struct { unsigned int __softirq_pending; diff --git a/include/asm-frv/ide.h b/include/asm-frv/ide.h index f9caecf7e3c0..ae031eaa3dd2 100644 --- a/include/asm-frv/ide.h +++ b/include/asm-frv/ide.h @@ -33,10 +33,10 @@ /* * some bits needed for parts of the IDE subsystem to compile */ -#define __ide_mm_insw(port, addr, n) insw(port, addr, n) -#define __ide_mm_insl(port, addr, n) insl(port, addr, n) -#define __ide_mm_outsw(port, addr, n) outsw(port, addr, n) -#define __ide_mm_outsl(port, addr, n) outsl(port, addr, n) +#define __ide_mm_insw(port, addr, n) insw((unsigned long) (port), addr, n) +#define __ide_mm_insl(port, addr, n) insl((unsigned long) (port), addr, n) +#define __ide_mm_outsw(port, addr, n) outsw((unsigned long) (port), addr, n) +#define __ide_mm_outsl(port, addr, n) outsl((unsigned long) (port), addr, n) #endif /* __KERNEL__ */ diff --git a/include/asm-frv/page.h b/include/asm-frv/page.h index 4feba567e7fd..b8221b611b5c 100644 --- a/include/asm-frv/page.h +++ b/include/asm-frv/page.h @@ -47,8 +47,8 @@ typedef struct { unsigned long pgprot; } pgprot_t; #define devmem_is_allowed(pfn) 1 -#define __pa(vaddr) virt_to_phys((void *) vaddr) -#define __va(paddr) phys_to_virt((unsigned long) paddr) +#define __pa(vaddr) virt_to_phys((void *) (unsigned long) (vaddr)) +#define __va(paddr) phys_to_virt((unsigned long) (paddr)) #define pfn_to_kaddr(pfn) __va((pfn) << PAGE_SHIFT) diff --git a/include/asm-frv/pci.h b/include/asm-frv/pci.h index b4efe5e3591a..1168451c275f 100644 --- a/include/asm-frv/pci.h +++ b/include/asm-frv/pci.h @@ -32,7 +32,7 @@ extern void pcibios_set_master(struct pci_dev *dev); extern void pcibios_penalize_isa_irq(int irq); #ifdef CONFIG_MMU -extern void *consistent_alloc(int gfp, size_t size, dma_addr_t *dma_handle); +extern void *consistent_alloc(gfp_t gfp, size_t size, dma_addr_t *dma_handle); extern void consistent_free(void *vaddr); extern void consistent_sync(void *vaddr, size_t size, int direction); extern void consistent_sync_page(struct page *page, unsigned long offset, diff --git a/include/asm-frv/pgtable.h b/include/asm-frv/pgtable.h index 473fb4bb6329..844666377dcb 100644 --- a/include/asm-frv/pgtable.h +++ b/include/asm-frv/pgtable.h @@ -26,6 +26,8 @@ #include <linux/slab.h> #include <linux/list.h> #include <linux/spinlock.h> +struct mm_struct; +struct vm_area_struct; #endif #ifndef __ASSEMBLY__ @@ -436,8 +438,6 @@ static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) return pte; } -#define page_pte(page) page_pte_prot((page), __pgprot(0)) - /* to find an entry in a page-table-directory. */ #define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD - 1)) #define pgd_index_k(addr) pgd_index(addr) diff --git a/include/asm-frv/semaphore.h b/include/asm-frv/semaphore.h index 393545630806..907c5c3643cc 100644 --- a/include/asm-frv/semaphore.h +++ b/include/asm-frv/semaphore.h @@ -20,7 +20,7 @@ #include <linux/spinlock.h> #include <linux/rwsem.h> -#define SEMAPHORE_DEBUG WAITQUEUE_DEBUG +#define SEMAPHORE_DEBUG 0 /* * the semaphore definition @@ -47,9 +47,6 @@ struct semaphore { #define __SEMAPHORE_INITIALIZER(name,count) \ { count, SPIN_LOCK_UNLOCKED, LIST_HEAD_INIT((name).wait_list) __SEM_DEBUG_INIT(name) } -#define __MUTEX_INITIALIZER(name) \ - __SEMAPHORE_INITIALIZER(name,1) - #define __DECLARE_SEMAPHORE_GENERIC(name,count) \ struct semaphore name = __SEMAPHORE_INITIALIZER(name,count) diff --git a/include/asm-frv/thread_info.h b/include/asm-frv/thread_info.h index c8cba7836f0d..60f6b2aee76d 100644 --- a/include/asm-frv/thread_info.h +++ b/include/asm-frv/thread_info.h @@ -58,7 +58,7 @@ struct thread_info { #endif -#define PREEMPT_ACTIVE 0x4000000 +#define PREEMPT_ACTIVE 0x10000000 /* * macros/functions for gaining access to the thread information structure diff --git a/include/asm-generic/4level-fixup.h b/include/asm-generic/4level-fixup.h index c20ec257ecc0..68c6fea994d9 100644 --- a/include/asm-generic/4level-fixup.h +++ b/include/asm-generic/4level-fixup.h @@ -10,14 +10,9 @@ #define pud_t pgd_t -#define pmd_alloc(mm, pud, address) \ -({ pmd_t *ret; \ - if (pgd_none(*pud)) \ - ret = __pmd_alloc(mm, pud, address); \ - else \ - ret = pmd_offset(pud, address); \ - ret; \ -}) +#define pmd_alloc(mm, pud, address) \ + ((unlikely(pgd_none(*(pud))) && __pmd_alloc(mm, pud, address))? \ + NULL: pmd_offset(pud, address)) #define pud_alloc(mm, pgd, address) (pgd) #define pud_offset(pgd, start) (pgd) diff --git a/include/asm-generic/dma-mapping-broken.h b/include/asm-generic/dma-mapping-broken.h index fd9de9502dff..a7f1a55ce6b0 100644 --- a/include/asm-generic/dma-mapping-broken.h +++ b/include/asm-generic/dma-mapping-broken.h @@ -6,7 +6,7 @@ static inline void * dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *dma_handle, - int flag) + gfp_t flag) { BUG(); return NULL; diff --git a/include/asm-generic/dma-mapping.h b/include/asm-generic/dma-mapping.h index 8cef663c5cd9..747d790295f3 100644 --- a/include/asm-generic/dma-mapping.h +++ b/include/asm-generic/dma-mapping.h @@ -35,7 +35,7 @@ dma_set_mask(struct device *dev, u64 dma_mask) static inline void * dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *dma_handle, - unsigned int __nocast flag) + gfp_t flag) { BUG_ON(dev->bus != &pci_bus_type); @@ -168,7 +168,7 @@ dma_set_mask(struct device *dev, u64 dma_mask) static inline void * dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *dma_handle, - unsigned int __nocast flag) + gfp_t flag) { BUG(); return NULL; diff --git a/include/asm-generic/pgtable.h b/include/asm-generic/pgtable.h index f86c1e549466..358e4d309ceb 100644 --- a/include/asm-generic/pgtable.h +++ b/include/asm-generic/pgtable.h @@ -8,7 +8,7 @@ * - update the page tables * - inform the TLB about the new one * - * We hold the mm semaphore for reading and vma->vm_mm->page_table_lock. + * We hold the mm semaphore for reading, and the pte lock. * * Note: the old pte is known to not be writable, so we don't need to * worry about dirty bits etc getting lost. @@ -128,6 +128,7 @@ do { \ #endif #ifndef __HAVE_ARCH_PTEP_SET_WRPROTECT +struct mm_struct; static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long address, pte_t *ptep) { pte_t old_pte = *ptep; @@ -158,6 +159,19 @@ static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long addres #define lazy_mmu_prot_update(pte) do { } while (0) #endif +#ifndef __HAVE_ARCH_MULTIPLE_ZERO_PAGE +#define move_pte(pte, prot, old_addr, new_addr) (pte) +#else +#define move_pte(pte, prot, old_addr, new_addr) \ +({ \ + pte_t newpte = (pte); \ + if (pte_present(pte) && pfn_valid(pte_pfn(pte)) && \ + pte_page(pte) == ZERO_PAGE(old_addr)) \ + newpte = mk_pte(ZERO_PAGE(new_addr), (prot)); \ + newpte; \ +}) +#endif + /* * When walking page tables, get the address of the next boundary, * or the end address of the range if that comes earlier. Although no diff --git a/include/asm-generic/sections.h b/include/asm-generic/sections.h index 886dbd116899..0b49f9e070f1 100644 --- a/include/asm-generic/sections.h +++ b/include/asm-generic/sections.h @@ -13,5 +13,6 @@ extern char _eextratext[] __attribute__((weak)); extern char _end[]; extern char __per_cpu_start[], __per_cpu_end[]; extern char __kprobes_text_start[], __kprobes_text_end[]; +extern char __initdata_begin[], __initdata_end[]; #endif /* _ASM_GENERIC_SECTIONS_H_ */ diff --git a/include/asm-generic/tlb.h b/include/asm-generic/tlb.h index 7d0298347ee7..cdd4145243cd 100644 --- a/include/asm-generic/tlb.h +++ b/include/asm-generic/tlb.h @@ -35,16 +35,13 @@ #endif /* struct mmu_gather is an opaque type used by the mm code for passing around - * any data needed by arch specific code for tlb_remove_page. This structure - * can be per-CPU or per-MM as the page table lock is held for the duration of - * TLB shootdown. + * any data needed by arch specific code for tlb_remove_page. */ struct mmu_gather { struct mm_struct *mm; unsigned int nr; /* set to ~0U means fast mode */ unsigned int need_flush;/* Really unmapped some ptes? */ unsigned int fullmm; /* non-zero means full mm flush */ - unsigned long freed; struct page * pages[FREE_PTE_NR]; }; @@ -57,7 +54,7 @@ DECLARE_PER_CPU(struct mmu_gather, mmu_gathers); static inline struct mmu_gather * tlb_gather_mmu(struct mm_struct *mm, unsigned int full_mm_flush) { - struct mmu_gather *tlb = &per_cpu(mmu_gathers, smp_processor_id()); + struct mmu_gather *tlb = &get_cpu_var(mmu_gathers); tlb->mm = mm; @@ -65,7 +62,6 @@ tlb_gather_mmu(struct mm_struct *mm, unsigned int full_mm_flush) tlb->nr = num_online_cpus() > 1 ? 0U : ~0U; tlb->fullmm = full_mm_flush; - tlb->freed = 0; return tlb; } @@ -85,28 +81,17 @@ tlb_flush_mmu(struct mmu_gather *tlb, unsigned long start, unsigned long end) /* tlb_finish_mmu * Called at the end of the shootdown operation to free up any resources - * that were required. The page table lock is still held at this point. + * that were required. */ static inline void tlb_finish_mmu(struct mmu_gather *tlb, unsigned long start, unsigned long end) { - int freed = tlb->freed; - struct mm_struct *mm = tlb->mm; - int rss = get_mm_counter(mm, rss); - - if (rss < freed) - freed = rss; - add_mm_counter(mm, rss, -freed); tlb_flush_mmu(tlb, start, end); /* keep the page table cache within bounds */ check_pgt_cache(); -} -static inline unsigned int -tlb_is_full_mm(struct mmu_gather *tlb) -{ - return tlb->fullmm; + put_cpu_var(mmu_gathers); } /* tlb_remove_page diff --git a/include/asm-generic/vmlinux.lds.h b/include/asm-generic/vmlinux.lds.h index a9c55490fb82..094d4917c1a9 100644 --- a/include/asm-generic/vmlinux.lds.h +++ b/include/asm-generic/vmlinux.lds.h @@ -35,6 +35,13 @@ VMLINUX_SYMBOL(__end_pci_fixups_enable) = .; \ } \ \ + /* RapidIO route ops */ \ + .rio_route : AT(ADDR(.rio_route) - LOAD_OFFSET) { \ + VMLINUX_SYMBOL(__start_rio_route_ops) = .; \ + *(.rio_route_ops) \ + VMLINUX_SYMBOL(__end_rio_route_ops) = .; \ + } \ + \ /* Kernel symbol table: Normal symbols */ \ __ksymtab : AT(ADDR(__ksymtab) - LOAD_OFFSET) { \ VMLINUX_SYMBOL(__start___ksymtab) = .; \ diff --git a/include/asm-h8300/atomic.h b/include/asm-h8300/atomic.h index 7230f6507995..f23d86819ea8 100644 --- a/include/asm-h8300/atomic.h +++ b/include/asm-h8300/atomic.h @@ -82,6 +82,33 @@ static __inline__ int atomic_dec_and_test(atomic_t *v) return ret == 0; } +static inline int atomic_cmpxchg(atomic_t *v, int old, int new) +{ + int ret; + unsigned long flags; + + local_irq_save(flags); + ret = v->counter; + if (likely(ret == old)) + v->counter = new; + local_irq_restore(flags); + return ret; +} + +static inline int atomic_add_unless(atomic_t *v, int a, int u) +{ + int ret; + unsigned long flags; + + local_irq_save(flags); + ret = v->counter; + if (ret != u) + v->counter += a; + local_irq_restore(flags); + return ret != u; +} +#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0) + static __inline__ void atomic_clear_mask(unsigned long mask, unsigned long *v) { __asm__ __volatile__("stc ccr,r1l\n\t" diff --git a/include/asm-h8300/semaphore.h b/include/asm-h8300/semaphore.h index fe6ef3774297..81bae2a99192 100644 --- a/include/asm-h8300/semaphore.h +++ b/include/asm-h8300/semaphore.h @@ -35,9 +35,6 @@ struct semaphore { .wait = __WAIT_QUEUE_HEAD_INITIALIZER((name).wait) \ } -#define __MUTEX_INITIALIZER(name) \ - __SEMAPHORE_INITIALIZER(name,1) - #define __DECLARE_SEMAPHORE_GENERIC(name,count) \ struct semaphore name = __SEMAPHORE_INITIALIZER(name,count) diff --git a/include/asm-h8300/unistd.h b/include/asm-h8300/unistd.h index 56a6401886fa..56a4a5686c88 100644 --- a/include/asm-h8300/unistd.h +++ b/include/asm-h8300/unistd.h @@ -528,7 +528,6 @@ asmlinkage long sys_mmap2(unsigned long addr, unsigned long len, asmlinkage int sys_execve(char *name, char **argv, char **envp, int dummy, ...); asmlinkage int sys_pipe(unsigned long *fildes); -asmlinkage int sys_ptrace(long request, long pid, long addr, long data); struct sigaction; asmlinkage long sys_rt_sigaction(int sig, const struct sigaction __user *act, diff --git a/include/asm-i386/atomic.h b/include/asm-i386/atomic.h index 509720be772a..c68557aa04b2 100644 --- a/include/asm-i386/atomic.h +++ b/include/asm-i386/atomic.h @@ -215,6 +215,27 @@ static __inline__ int atomic_sub_return(int i, atomic_t *v) return atomic_add_return(-i,v); } +#define atomic_cmpxchg(v, old, new) ((int)cmpxchg(&((v)->counter), old, new)) + +/** + * atomic_add_unless - add unless the number is a given value + * @v: pointer of type atomic_t + * @a: the amount to add to v... + * @u: ...unless v is equal to u. + * + * Atomically adds @a to @v, so long as it was not @u. + * Returns non-zero if @v was not @u, and zero otherwise. + */ +#define atomic_add_unless(v, a, u) \ +({ \ + int c, old; \ + c = atomic_read(v); \ + while (c != (u) && (old = atomic_cmpxchg((v), c, c + (a))) != c) \ + c = old; \ + c != (u); \ +}) +#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0) + #define atomic_inc_return(v) (atomic_add_return(1,v)) #define atomic_dec_return(v) (atomic_sub_return(1,v)) diff --git a/include/asm-i386/desc.h b/include/asm-i386/desc.h index 6df1a53c190e..29b851a18c6e 100644 --- a/include/asm-i386/desc.h +++ b/include/asm-i386/desc.h @@ -17,6 +17,8 @@ extern struct desc_struct cpu_gdt_table[GDT_ENTRIES]; DECLARE_PER_CPU(struct desc_struct, cpu_gdt_table[GDT_ENTRIES]); +#define get_cpu_gdt_table(_cpu) (per_cpu(cpu_gdt_table,_cpu)) + DECLARE_PER_CPU(unsigned char, cpu_16bit_stack[CPU_16BIT_STACK_SIZE]); struct Xgt_desc_struct { @@ -60,7 +62,7 @@ __asm__ __volatile__ ("movw %w3,0(%2)\n\t" \ static inline void __set_tss_desc(unsigned int cpu, unsigned int entry, void *addr) { - _set_tssldt_desc(&per_cpu(cpu_gdt_table, cpu)[entry], (int)addr, + _set_tssldt_desc(&get_cpu_gdt_table(cpu)[entry], (int)addr, offsetof(struct tss_struct, __cacheline_filler) - 1, 0x89); } @@ -68,7 +70,7 @@ static inline void __set_tss_desc(unsigned int cpu, unsigned int entry, void *ad static inline void set_ldt_desc(unsigned int cpu, void *addr, unsigned int size) { - _set_tssldt_desc(&per_cpu(cpu_gdt_table, cpu)[GDT_ENTRY_LDT], (int)addr, ((size << 3)-1), 0x82); + _set_tssldt_desc(&get_cpu_gdt_table(cpu)[GDT_ENTRY_LDT], (int)addr, ((size << 3)-1), 0x82); } #define LDT_entry_a(info) \ @@ -109,7 +111,7 @@ static inline void write_ldt_entry(void *ldt, int entry, __u32 entry_a, __u32 en static inline void load_TLS(struct thread_struct *t, unsigned int cpu) { -#define C(i) per_cpu(cpu_gdt_table, cpu)[GDT_ENTRY_TLS_MIN + i] = t->tls_array[i] +#define C(i) get_cpu_gdt_table(cpu)[GDT_ENTRY_TLS_MIN + i] = t->tls_array[i] C(0); C(1); C(2); #undef C } diff --git a/include/asm-i386/dma-mapping.h b/include/asm-i386/dma-mapping.h index 563964b2995b..e56c335f8ef9 100644 --- a/include/asm-i386/dma-mapping.h +++ b/include/asm-i386/dma-mapping.h @@ -11,7 +11,7 @@ #define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h) void *dma_alloc_coherent(struct device *dev, size_t size, - dma_addr_t *dma_handle, unsigned int __nocast flag); + dma_addr_t *dma_handle, gfp_t flag); void dma_free_coherent(struct device *dev, size_t size, void *vaddr, dma_addr_t dma_handle); diff --git a/include/asm-i386/elf.h b/include/asm-i386/elf.h index fa11117d3cfa..4153d80e4d2b 100644 --- a/include/asm-i386/elf.h +++ b/include/asm-i386/elf.h @@ -119,6 +119,8 @@ typedef struct user_fxsr_struct elf_fpxregset_t; */ #define elf_read_implies_exec(ex, executable_stack) (executable_stack != EXSTACK_DISABLE_X) +struct task_struct; + extern int dump_task_regs (struct task_struct *, elf_gregset_t *); extern int dump_task_fpu (struct task_struct *, elf_fpregset_t *); extern int dump_task_extended_fpu (struct task_struct *, struct user_fxsr_struct *); diff --git a/include/asm-i386/hw_irq.h b/include/asm-i386/hw_irq.h index 4ac84cc6f01a..622815bf3243 100644 --- a/include/asm-i386/hw_irq.h +++ b/include/asm-i386/hw_irq.h @@ -18,6 +18,8 @@ #include <asm/irq.h> #include <asm/sections.h> +struct hw_interrupt_type; + /* * Various low-level irq details needed by irq.c, process.c, * time.c, io_apic.c and smp.c diff --git a/include/asm-i386/ide.h b/include/asm-i386/ide.h index 79dfab87135d..454440193eac 100644 --- a/include/asm-i386/ide.h +++ b/include/asm-i386/ide.h @@ -41,6 +41,12 @@ static __inline__ int ide_default_irq(unsigned long base) static __inline__ unsigned long ide_default_io_base(int index) { + /* + * If PCI is present then it is not safe to poke around + * the other legacy IDE ports. Only 0x1f0 and 0x170 are + * defined compatibility mode ports for PCI. A user can + * override this using ide= but we must default safe. + */ if (pci_find_device(PCI_ANY_ID, PCI_ANY_ID, NULL) == NULL) { switch(index) { case 2: return 0x1e8; diff --git a/include/asm-i386/kprobes.h b/include/asm-i386/kprobes.h index 8b6d3a90cd78..ca916a892877 100644 --- a/include/asm-i386/kprobes.h +++ b/include/asm-i386/kprobes.h @@ -49,6 +49,23 @@ struct arch_specific_insn { kprobe_opcode_t insn[MAX_INSN_SIZE]; }; +struct prev_kprobe { + struct kprobe *kp; + unsigned long status; + unsigned long old_eflags; + unsigned long saved_eflags; +}; + +/* per-cpu kprobe control block */ +struct kprobe_ctlblk { + unsigned long kprobe_status; + unsigned long kprobe_old_eflags; + unsigned long kprobe_saved_eflags; + long *jprobe_saved_esp; + struct pt_regs jprobe_saved_regs; + kprobe_opcode_t jprobes_stack[MAX_STACK_SIZE]; + struct prev_kprobe prev_kprobe; +}; /* trap3/1 are intr gates for kprobes. So, restore the status of IF, * if necessary, before executing the original int3/1 (trap) handler. diff --git a/include/asm-i386/mach-default/mach_reboot.h b/include/asm-i386/mach-default/mach_reboot.h index 06ae4d81ba6a..a955e57ad016 100644 --- a/include/asm-i386/mach-default/mach_reboot.h +++ b/include/asm-i386/mach-default/mach_reboot.h @@ -19,7 +19,7 @@ static inline void kb_wait(void) static inline void mach_reboot(void) { int i; - for (i = 0; i < 100; i++) { + for (i = 0; i < 10; i++) { kb_wait(); udelay(50); outb(0x60, 0x64); /* write Controller Command Byte */ diff --git a/include/asm-i386/mach-es7000/mach_mpparse.h b/include/asm-i386/mach-es7000/mach_mpparse.h index 28a84f6185a7..4a0637a3e208 100644 --- a/include/asm-i386/mach-es7000/mach_mpparse.h +++ b/include/asm-i386/mach-es7000/mach_mpparse.h @@ -16,7 +16,7 @@ static inline void mpc_oem_pci_bus(struct mpc_config_bus *m, extern int parse_unisys_oem (char *oemptr); extern int find_unisys_acpi_oem_table(unsigned long *oem_addr); -extern void setup_unisys(); +extern void setup_unisys(void); static inline int mps_oem_check(struct mp_config_table *mpc, char *oem, char *productid) diff --git a/include/asm-i386/mach-summit/mach_mpparse.h b/include/asm-i386/mach-summit/mach_mpparse.h index 2b9e6d55bef1..1cce2b924a80 100644 --- a/include/asm-i386/mach-summit/mach_mpparse.h +++ b/include/asm-i386/mach-summit/mach_mpparse.h @@ -22,7 +22,6 @@ static inline void mpc_oem_pci_bus(struct mpc_config_bus *m, { } -extern int usb_early_handoff; static inline int mps_oem_check(struct mp_config_table *mpc, char *oem, char *productid) { @@ -32,7 +31,6 @@ static inline int mps_oem_check(struct mp_config_table *mpc, char *oem, || !strncmp(productid, "RUTHLESS SMP", 12))){ use_cyclone = 1; /*enable cyclone-timer*/ setup_summit(); - usb_early_handoff = 1; return 1; } return 0; @@ -46,7 +44,6 @@ static inline int acpi_madt_oem_check(char *oem_id, char *oem_table_id) || !strncmp(oem_table_id, "EXA", 3))){ use_cyclone = 1; /*enable cyclone-timer*/ setup_summit(); - usb_early_handoff = 1; return 1; } return 0; diff --git a/include/asm-i386/mmzone.h b/include/asm-i386/mmzone.h index 348fe3a4879d..620a90641ea8 100644 --- a/include/asm-i386/mmzone.h +++ b/include/asm-i386/mmzone.h @@ -88,12 +88,6 @@ static inline int pfn_to_nid(unsigned long pfn) __pgdat->node_start_pfn + __pgdat->node_spanned_pages; \ }) -#define local_mapnr(kvaddr) \ -({ \ - unsigned long __pfn = __pa(kvaddr) >> PAGE_SHIFT; \ - (__pfn - node_start_pfn(pfn_to_nid(__pfn))); \ -}) - /* XXX: FIXME -- wli */ #define kern_addr_valid(kaddr) (0) diff --git a/include/asm-i386/msi.h b/include/asm-i386/msi.h index b85393094c83..f041d4495faf 100644 --- a/include/asm-i386/msi.h +++ b/include/asm-i386/msi.h @@ -10,13 +10,6 @@ #include <mach_apic.h> #define LAST_DEVICE_VECTOR 232 -#define MSI_DEST_MODE MSI_LOGICAL_MODE -#define MSI_TARGET_CPU_SHIFT 12 - -#ifdef CONFIG_SMP -#define MSI_TARGET_CPU logical_smp_processor_id() -#else -#define MSI_TARGET_CPU cpu_to_logical_apicid(first_cpu(cpu_online_map)) -#endif +#define MSI_TARGET_CPU_SHIFT 12 #endif /* ASM_MSI_H */ diff --git a/include/asm-i386/pgtable-2level.h b/include/asm-i386/pgtable-2level.h index fa07bd6c7529..74ef721b534d 100644 --- a/include/asm-i386/pgtable-2level.h +++ b/include/asm-i386/pgtable-2level.h @@ -26,11 +26,6 @@ #define pfn_pte(pfn, prot) __pte(((pfn) << PAGE_SHIFT) | pgprot_val(prot)) #define pfn_pmd(pfn, prot) __pmd(((pfn) << PAGE_SHIFT) | pgprot_val(prot)) -#define pmd_page(pmd) (pfn_to_page(pmd_val(pmd) >> PAGE_SHIFT)) - -#define pmd_page_kernel(pmd) \ -((unsigned long) __va(pmd_val(pmd) & PAGE_MASK)) - /* * All present user pages are user-executable: */ diff --git a/include/asm-i386/pgtable-3level.h b/include/asm-i386/pgtable-3level.h index 2e3f4a344a2d..f1a8b454920a 100644 --- a/include/asm-i386/pgtable-3level.h +++ b/include/asm-i386/pgtable-3level.h @@ -74,11 +74,6 @@ static inline void set_pte(pte_t *ptep, pte_t pte) */ static inline void pud_clear (pud_t * pud) { } -#define pmd_page(pmd) (pfn_to_page(pmd_val(pmd) >> PAGE_SHIFT)) - -#define pmd_page_kernel(pmd) \ -((unsigned long) __va(pmd_val(pmd) & PAGE_MASK)) - #define pud_page(pud) \ ((struct page *) __va(pud_val(pud) & PAGE_MASK)) diff --git a/include/asm-i386/pgtable.h b/include/asm-i386/pgtable.h index d101ac414f07..088a945bf26b 100644 --- a/include/asm-i386/pgtable.h +++ b/include/asm-i386/pgtable.h @@ -25,6 +25,9 @@ #include <linux/list.h> #include <linux/spinlock.h> +struct mm_struct; +struct vm_area_struct; + /* * ZERO_PAGE is a global shared page that is always zero: used * for zero-mapped memory areas etc.. @@ -203,7 +206,8 @@ extern unsigned long pg0[]; #define pte_present(x) ((x).pte_low & (_PAGE_PRESENT | _PAGE_PROTNONE)) #define pte_clear(mm,addr,xp) do { set_pte_at(mm, addr, xp, __pte(0)); } while (0) -#define pmd_none(x) (!pmd_val(x)) +/* To avoid harmful races, pmd_none(x) should check only the lower when PAE */ +#define pmd_none(x) (!(unsigned long)pmd_val(x)) #define pmd_present(x) (pmd_val(x) & _PAGE_PRESENT) #define pmd_clear(xp) do { set_pmd(xp, __pmd(0)); } while (0) #define pmd_bad(x) ((pmd_val(x) & (~PAGE_MASK & ~_PAGE_USER)) != _KERNPG_TABLE) @@ -322,8 +326,6 @@ static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) return pte; } -#define page_pte(page) page_pte_prot(page, __pgprot(0)) - #define pmd_large(pmd) \ ((pmd_val(pmd) & (_PAGE_PSE|_PAGE_PRESENT)) == (_PAGE_PSE|_PAGE_PRESENT)) @@ -368,6 +370,11 @@ static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) #define pte_offset_kernel(dir, address) \ ((pte_t *) pmd_page_kernel(*(dir)) + pte_index(address)) +#define pmd_page(pmd) (pfn_to_page(pmd_val(pmd) >> PAGE_SHIFT)) + +#define pmd_page_kernel(pmd) \ + ((unsigned long) __va(pmd_val(pmd) & PAGE_MASK)) + /* * Helper function that returns the kernel pagetable entry controlling * the virtual address 'address'. NULL means no pagetable entry present. diff --git a/include/asm-i386/processor.h b/include/asm-i386/processor.h index 0a4ec764377c..5c96cf6dcb39 100644 --- a/include/asm-i386/processor.h +++ b/include/asm-i386/processor.h @@ -65,7 +65,9 @@ struct cpuinfo_x86 { int f00f_bug; int coma_bug; unsigned long loops_per_jiffy; - unsigned char x86_num_cores; + unsigned char x86_max_cores; /* cpuid returned max cores value */ + unsigned char booted_cores; /* number of cores as seen by OS */ + unsigned char apicid; } __attribute__((__aligned__(SMP_CACHE_BYTES))); #define X86_VENDOR_INTEL 0 @@ -718,4 +720,10 @@ extern void mtrr_bp_init(void); #define mtrr_bp_init() do {} while (0) #endif +#ifdef CONFIG_X86_MCE +extern void mcheck_init(struct cpuinfo_x86 *c); +#else +#define mcheck_init(c) do {} while(0) +#endif + #endif /* __ASM_I386_PROCESSOR_H */ diff --git a/include/asm-i386/rwsem.h b/include/asm-i386/rwsem.h index 7625a675852f..be4ab859238e 100644 --- a/include/asm-i386/rwsem.h +++ b/include/asm-i386/rwsem.h @@ -284,5 +284,10 @@ LOCK_PREFIX "xadd %0,(%2)" return tmp+delta; } +static inline int rwsem_is_locked(struct rw_semaphore *sem) +{ + return (sem->count != 0); +} + #endif /* __KERNEL__ */ #endif /* _I386_RWSEM_H */ diff --git a/include/asm-i386/semaphore.h b/include/asm-i386/semaphore.h index ea563da63e24..6a42b2142fd6 100644 --- a/include/asm-i386/semaphore.h +++ b/include/asm-i386/semaphore.h @@ -55,9 +55,6 @@ struct semaphore { .wait = __WAIT_QUEUE_HEAD_INITIALIZER((name).wait) \ } -#define __MUTEX_INITIALIZER(name) \ - __SEMAPHORE_INITIALIZER(name,1) - #define __DECLARE_SEMAPHORE_GENERIC(name,count) \ struct semaphore name = __SEMAPHORE_INITIALIZER(name,count) diff --git a/include/asm-i386/signal.h b/include/asm-i386/signal.h index cbb47d34aa31..76524b4052ac 100644 --- a/include/asm-i386/signal.h +++ b/include/asm-i386/signal.h @@ -159,14 +159,37 @@ typedef struct sigaltstack { #define __HAVE_ARCH_SIG_BITOPS -static __inline__ void sigaddset(sigset_t *set, int _sig) +#define sigaddset(set,sig) \ + (__builtin_constant_p(sig) ? \ + __const_sigaddset((set),(sig)) : \ + __gen_sigaddset((set),(sig))) + +static __inline__ void __gen_sigaddset(sigset_t *set, int _sig) { - __asm__("btsl %1,%0" : "=m"(*set) : "Ir"(_sig - 1) : "cc"); + __asm__("btsl %1,%0" : "+m"(*set) : "Ir"(_sig - 1) : "cc"); } -static __inline__ void sigdelset(sigset_t *set, int _sig) +static __inline__ void __const_sigaddset(sigset_t *set, int _sig) { - __asm__("btrl %1,%0" : "=m"(*set) : "Ir"(_sig - 1) : "cc"); + unsigned long sig = _sig - 1; + set->sig[sig / _NSIG_BPW] |= 1 << (sig % _NSIG_BPW); +} + +#define sigdelset(set,sig) \ + (__builtin_constant_p(sig) ? \ + __const_sigdelset((set),(sig)) : \ + __gen_sigdelset((set),(sig))) + + +static __inline__ void __gen_sigdelset(sigset_t *set, int _sig) +{ + __asm__("btrl %1,%0" : "+m"(*set) : "Ir"(_sig - 1) : "cc"); +} + +static __inline__ void __const_sigdelset(sigset_t *set, int _sig) +{ + unsigned long sig = _sig - 1; + set->sig[sig / _NSIG_BPW] &= ~(1 << (sig % _NSIG_BPW)); } static __inline__ int __const_sigismember(sigset_t *set, int _sig) diff --git a/include/asm-i386/smp.h b/include/asm-i386/smp.h index 13250199976d..61d3ab9db70c 100644 --- a/include/asm-i386/smp.h +++ b/include/asm-i386/smp.h @@ -45,6 +45,8 @@ extern void unlock_ipi_call_lock(void); #define MAX_APICID 256 extern u8 x86_cpu_to_apicid[]; +#define cpu_physical_id(cpu) x86_cpu_to_apicid[cpu] + #ifdef CONFIG_HOTPLUG_CPU extern void cpu_exit_clear(void); extern void cpu_uninit(void); @@ -92,6 +94,10 @@ extern int __cpu_disable(void); extern void __cpu_die(unsigned int cpu); #endif /* !__ASSEMBLY__ */ +#else /* CONFIG_SMP */ + +#define cpu_physical_id(cpu) boot_cpu_physical_apicid + #define NO_PROC_ID 0xFF /* No processor magic marker */ #endif diff --git a/include/asm-i386/system.h b/include/asm-i386/system.h index acd5c26b69ba..772f85da1206 100644 --- a/include/asm-i386/system.h +++ b/include/asm-i386/system.h @@ -167,6 +167,8 @@ struct __xchg_dummy { unsigned long a[100]; }; #define __xg(x) ((struct __xchg_dummy *)(x)) +#ifdef CONFIG_X86_CMPXCHG64 + /* * The semantics of XCHGCMP8B are a bit strange, this is why * there is a loop and the loading of %%eax and %%edx has to @@ -221,6 +223,8 @@ static inline void __set_64bit_var (unsigned long long *ptr, __set_64bit(ptr, (unsigned int)(value), (unsigned int)((value)>>32ULL) ) : \ __set_64bit(ptr, ll_low(value), ll_high(value)) ) +#endif + /* * Note: no "lock" prefix even on SMP: xchg always implies lock anyway * Note 2: xchg has side effect, so that attribute volatile is necessary, @@ -259,6 +263,9 @@ static inline unsigned long __xchg(unsigned long x, volatile void * ptr, int siz #ifdef CONFIG_X86_CMPXCHG #define __HAVE_ARCH_CMPXCHG 1 +#define cmpxchg(ptr,o,n)\ + ((__typeof__(*(ptr)))__cmpxchg((ptr),(unsigned long)(o),\ + (unsigned long)(n),sizeof(*(ptr)))) #endif static inline unsigned long __cmpxchg(volatile void *ptr, unsigned long old, @@ -275,22 +282,78 @@ static inline unsigned long __cmpxchg(volatile void *ptr, unsigned long old, case 2: __asm__ __volatile__(LOCK_PREFIX "cmpxchgw %w1,%2" : "=a"(prev) - : "q"(new), "m"(*__xg(ptr)), "0"(old) + : "r"(new), "m"(*__xg(ptr)), "0"(old) : "memory"); return prev; case 4: __asm__ __volatile__(LOCK_PREFIX "cmpxchgl %1,%2" : "=a"(prev) - : "q"(new), "m"(*__xg(ptr)), "0"(old) + : "r"(new), "m"(*__xg(ptr)), "0"(old) : "memory"); return prev; } return old; } -#define cmpxchg(ptr,o,n)\ - ((__typeof__(*(ptr)))__cmpxchg((ptr),(unsigned long)(o),\ - (unsigned long)(n),sizeof(*(ptr)))) +#ifndef CONFIG_X86_CMPXCHG +/* + * Building a kernel capable running on 80386. It may be necessary to + * simulate the cmpxchg on the 80386 CPU. For that purpose we define + * a function for each of the sizes we support. + */ + +extern unsigned long cmpxchg_386_u8(volatile void *, u8, u8); +extern unsigned long cmpxchg_386_u16(volatile void *, u16, u16); +extern unsigned long cmpxchg_386_u32(volatile void *, u32, u32); + +static inline unsigned long cmpxchg_386(volatile void *ptr, unsigned long old, + unsigned long new, int size) +{ + switch (size) { + case 1: + return cmpxchg_386_u8(ptr, old, new); + case 2: + return cmpxchg_386_u16(ptr, old, new); + case 4: + return cmpxchg_386_u32(ptr, old, new); + } + return old; +} + +#define cmpxchg(ptr,o,n) \ +({ \ + __typeof__(*(ptr)) __ret; \ + if (likely(boot_cpu_data.x86 > 3)) \ + __ret = __cmpxchg((ptr), (unsigned long)(o), \ + (unsigned long)(n), sizeof(*(ptr))); \ + else \ + __ret = cmpxchg_386((ptr), (unsigned long)(o), \ + (unsigned long)(n), sizeof(*(ptr))); \ + __ret; \ +}) +#endif + +#ifdef CONFIG_X86_CMPXCHG64 + +static inline unsigned long long __cmpxchg64(volatile void *ptr, unsigned long long old, + unsigned long long new) +{ + unsigned long long prev; + __asm__ __volatile__(LOCK_PREFIX "cmpxchg8b %3" + : "=A"(prev) + : "b"((unsigned long)new), + "c"((unsigned long)(new >> 32)), + "m"(*__xg(ptr)), + "0"(old) + : "memory"); + return prev; +} + +#define cmpxchg64(ptr,o,n)\ + ((__typeof__(*(ptr)))__cmpxchg64((ptr),(unsigned long long)(o),\ + (unsigned long long)(n))) + +#endif #ifdef __KERNEL__ struct alt_instr { diff --git a/include/asm-i386/unistd.h b/include/asm-i386/unistd.h index fbaf90a3968c..0f92e78dfea1 100644 --- a/include/asm-i386/unistd.h +++ b/include/asm-i386/unistd.h @@ -448,7 +448,6 @@ asmlinkage int sys_clone(struct pt_regs regs); asmlinkage int sys_fork(struct pt_regs regs); asmlinkage int sys_vfork(struct pt_regs regs); asmlinkage int sys_pipe(unsigned long __user *fildes); -asmlinkage int sys_ptrace(long request, long pid, long addr, long data); asmlinkage long sys_iopl(unsigned long unused); struct sigaction; asmlinkage long sys_rt_sigaction(int sig, diff --git a/include/asm-ia64/atomic.h b/include/asm-ia64/atomic.h index 874a6f890e75..2fbebf85c31d 100644 --- a/include/asm-ia64/atomic.h +++ b/include/asm-ia64/atomic.h @@ -88,6 +88,18 @@ ia64_atomic64_sub (__s64 i, atomic64_t *v) return new; } +#define atomic_cmpxchg(v, old, new) ((int)cmpxchg(&((v)->counter), old, new)) + +#define atomic_add_unless(v, a, u) \ +({ \ + int c, old; \ + c = atomic_read(v); \ + while (c != (u) && (old = atomic_cmpxchg((v), c, c + (a))) != c) \ + c = old; \ + c != (u); \ +}) +#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0) + #define atomic_add_return(i,v) \ ({ \ int __ia64_aar_i = (i); \ diff --git a/include/asm-ia64/dma-mapping.h b/include/asm-ia64/dma-mapping.h index 6347c9845642..df67d40801de 100644 --- a/include/asm-ia64/dma-mapping.h +++ b/include/asm-ia64/dma-mapping.h @@ -48,12 +48,7 @@ dma_set_mask (struct device *dev, u64 mask) return 0; } -static inline int -dma_get_cache_alignment (void) -{ - extern int ia64_max_cacheline_size; - return ia64_max_cacheline_size; -} +extern int dma_get_cache_alignment(void); static inline void dma_cache_sync (void *vaddr, size_t size, enum dma_data_direction dir) diff --git a/include/asm-ia64/kdebug.h b/include/asm-ia64/kdebug.h index 4d376e1663f7..8b01a083dde6 100644 --- a/include/asm-ia64/kdebug.h +++ b/include/asm-ia64/kdebug.h @@ -22,6 +22,9 @@ * 2005-Apr Rusty Lynch <rusty.lynch@intel.com> and Anil S Keshavamurthy * <anil.s.keshavamurthy@intel.com> adopted from * include/asm-x86_64/kdebug.h + * + * 2005-Oct Keith Owens <kaos@sgi.com>. Expand notify_die to cover more + * events. */ #include <linux/notifier.h> @@ -35,13 +38,36 @@ struct die_args { int signr; }; -int register_die_notifier(struct notifier_block *nb); +extern int register_die_notifier(struct notifier_block *); +extern int unregister_die_notifier(struct notifier_block *); extern struct notifier_block *ia64die_chain; enum die_val { DIE_BREAK = 1, - DIE_SS, + DIE_FAULT, + DIE_OOPS, DIE_PAGE_FAULT, + DIE_MACHINE_HALT, + DIE_MACHINE_RESTART, + DIE_MCA_MONARCH_ENTER, + DIE_MCA_MONARCH_PROCESS, + DIE_MCA_MONARCH_LEAVE, + DIE_MCA_SLAVE_ENTER, + DIE_MCA_SLAVE_PROCESS, + DIE_MCA_SLAVE_LEAVE, + DIE_MCA_RENDZVOUS_ENTER, + DIE_MCA_RENDZVOUS_PROCESS, + DIE_MCA_RENDZVOUS_LEAVE, + DIE_INIT_MONARCH_ENTER, + DIE_INIT_MONARCH_PROCESS, + DIE_INIT_MONARCH_LEAVE, + DIE_INIT_SLAVE_ENTER, + DIE_INIT_SLAVE_PROCESS, + DIE_INIT_SLAVE_LEAVE, + DIE_KDEBUG_ENTER, + DIE_KDEBUG_LEAVE, + DIE_KDUMP_ENTER, + DIE_KDUMP_LEAVE, }; static inline int notify_die(enum die_val val, char *str, struct pt_regs *regs, diff --git a/include/asm-ia64/kprobes.h b/include/asm-ia64/kprobes.h index 573a3574a24f..592abb000e29 100644 --- a/include/asm-ia64/kprobes.h +++ b/include/asm-ia64/kprobes.h @@ -26,6 +26,7 @@ */ #include <linux/types.h> #include <linux/ptrace.h> +#include <linux/percpu.h> #include <asm/break.h> #define MAX_INSN_SIZE 16 @@ -62,6 +63,18 @@ typedef struct _bundle { } quad1; } __attribute__((__aligned__(16))) bundle_t; +struct prev_kprobe { + struct kprobe *kp; + unsigned long status; +}; + +/* per-cpu kprobe control block */ +struct kprobe_ctlblk { + unsigned long kprobe_status; + struct pt_regs jprobe_saved_regs; + struct prev_kprobe prev_kprobe; +}; + #define JPROBE_ENTRY(pentry) (kprobe_opcode_t *)pentry #define ARCH_SUPPORTS_KRETPROBES diff --git a/include/asm-ia64/machvec.h b/include/asm-ia64/machvec.h index 79e89a7db566..ca5ea994d688 100644 --- a/include/asm-ia64/machvec.h +++ b/include/asm-ia64/machvec.h @@ -26,7 +26,7 @@ typedef void ia64_mv_cpu_init_t (void); typedef void ia64_mv_irq_init_t (void); typedef void ia64_mv_send_ipi_t (int, int, int, int); typedef void ia64_mv_timer_interrupt_t (int, void *, struct pt_regs *); -typedef void ia64_mv_global_tlb_purge_t (unsigned long, unsigned long, unsigned long); +typedef void ia64_mv_global_tlb_purge_t (struct mm_struct *, unsigned long, unsigned long, unsigned long); typedef void ia64_mv_tlb_migrate_finish_t (struct mm_struct *); typedef unsigned int ia64_mv_local_vector_to_irq (u8); typedef char *ia64_mv_pci_get_legacy_mem_t (struct pci_bus *); @@ -37,7 +37,7 @@ typedef int ia64_mv_pci_legacy_write_t (struct pci_bus *, u16 port, u32 val, /* DMA-mapping interface: */ typedef void ia64_mv_dma_init (void); -typedef void *ia64_mv_dma_alloc_coherent (struct device *, size_t, dma_addr_t *, int); +typedef void *ia64_mv_dma_alloc_coherent (struct device *, size_t, dma_addr_t *, gfp_t); typedef void ia64_mv_dma_free_coherent (struct device *, size_t, void *, dma_addr_t); typedef dma_addr_t ia64_mv_dma_map_single (struct device *, void *, size_t, int); typedef void ia64_mv_dma_unmap_single (struct device *, dma_addr_t, size_t, int); diff --git a/include/asm-ia64/machvec_hpzx1.h b/include/asm-ia64/machvec_hpzx1.h index daafe504c5f4..e90daf9ce340 100644 --- a/include/asm-ia64/machvec_hpzx1.h +++ b/include/asm-ia64/machvec_hpzx1.h @@ -1,8 +1,7 @@ #ifndef _ASM_IA64_MACHVEC_HPZX1_h #define _ASM_IA64_MACHVEC_HPZX1_h -extern ia64_mv_setup_t dig_setup; -extern ia64_mv_setup_t sba_setup; +extern ia64_mv_setup_t dig_setup; extern ia64_mv_dma_alloc_coherent sba_alloc_coherent; extern ia64_mv_dma_free_coherent sba_free_coherent; extern ia64_mv_dma_map_single sba_map_single; @@ -19,15 +18,15 @@ extern ia64_mv_dma_mapping_error sba_dma_mapping_error; * platform's machvec structure. When compiling a non-generic kernel, * the macros are used directly. */ -#define platform_name "hpzx1" -#define platform_setup sba_setup -#define platform_dma_init machvec_noop -#define platform_dma_alloc_coherent sba_alloc_coherent -#define platform_dma_free_coherent sba_free_coherent -#define platform_dma_map_single sba_map_single -#define platform_dma_unmap_single sba_unmap_single -#define platform_dma_map_sg sba_map_sg -#define platform_dma_unmap_sg sba_unmap_sg +#define platform_name "hpzx1" +#define platform_setup dig_setup +#define platform_dma_init machvec_noop +#define platform_dma_alloc_coherent sba_alloc_coherent +#define platform_dma_free_coherent sba_free_coherent +#define platform_dma_map_single sba_map_single +#define platform_dma_unmap_single sba_unmap_single +#define platform_dma_map_sg sba_map_sg +#define platform_dma_unmap_sg sba_unmap_sg #define platform_dma_sync_single_for_cpu machvec_dma_sync_single #define platform_dma_sync_sg_for_cpu machvec_dma_sync_sg #define platform_dma_sync_single_for_device machvec_dma_sync_single diff --git a/include/asm-ia64/machvec_hpzx1_swiotlb.h b/include/asm-ia64/machvec_hpzx1_swiotlb.h index 9924b1b00a6c..f00a34a148ff 100644 --- a/include/asm-ia64/machvec_hpzx1_swiotlb.h +++ b/include/asm-ia64/machvec_hpzx1_swiotlb.h @@ -2,7 +2,6 @@ #define _ASM_IA64_MACHVEC_HPZX1_SWIOTLB_h extern ia64_mv_setup_t dig_setup; -extern ia64_mv_dma_init hwsw_init; extern ia64_mv_dma_alloc_coherent hwsw_alloc_coherent; extern ia64_mv_dma_free_coherent hwsw_free_coherent; extern ia64_mv_dma_map_single hwsw_map_single; @@ -26,7 +25,7 @@ extern ia64_mv_dma_sync_sg_for_device hwsw_sync_sg_for_device; #define platform_name "hpzx1_swiotlb" #define platform_setup dig_setup -#define platform_dma_init hwsw_init +#define platform_dma_init machvec_noop #define platform_dma_alloc_coherent hwsw_alloc_coherent #define platform_dma_free_coherent hwsw_free_coherent #define platform_dma_map_single hwsw_map_single diff --git a/include/asm-ia64/mca.h b/include/asm-ia64/mca.h index 97a28b8b2ddd..c7d9c9ed38ba 100644 --- a/include/asm-ia64/mca.h +++ b/include/asm-ia64/mca.h @@ -80,7 +80,12 @@ struct ia64_sal_os_state { u64 sal_ra; /* Return address in SAL, physical */ u64 sal_gp; /* GP of the SAL - physical */ pal_min_state_area_t *pal_min_state; /* from R17. physical in asm, virtual in C */ + /* Previous values of IA64_KR(CURRENT) and IA64_KR(CURRENT_STACK). + * Note: if the MCA/INIT recovery code wants to resume to a new context + * then it must change these values to reflect the new kernel stack. + */ u64 prev_IA64_KR_CURRENT; /* previous value of IA64_KR(CURRENT) */ + u64 prev_IA64_KR_CURRENT_STACK; struct task_struct *prev_task; /* previous task, NULL if it is not useful */ /* Some interrupt registers are not saved in minstate, pt_regs or * switch_stack. Because MCA/INIT can occur when interrupts are diff --git a/include/asm-ia64/meminit.h b/include/asm-ia64/meminit.h index 1590dc65b30b..46501b01a5c5 100644 --- a/include/asm-ia64/meminit.h +++ b/include/asm-ia64/meminit.h @@ -16,10 +16,11 @@ * - initrd (optional) * - command line string * - kernel code & data + * - Kernel memory map built from EFI memory map * * More could be added if necessary */ -#define IA64_MAX_RSVD_REGIONS 5 +#define IA64_MAX_RSVD_REGIONS 6 struct rsvd_region { unsigned long start; /* virtual address of beginning of element */ @@ -33,6 +34,7 @@ extern void find_memory (void); extern void reserve_memory (void); extern void find_initrd (void); extern int filter_rsvd_memory (unsigned long start, unsigned long end, void *arg); +extern void efi_memmap_init(unsigned long *, unsigned long *); /* * For rounding an address to the next IA64_GRANULE_SIZE or order @@ -41,7 +43,7 @@ extern int filter_rsvd_memory (unsigned long start, unsigned long end, void *arg #define GRANULEROUNDUP(n) (((n)+IA64_GRANULE_SIZE-1) & ~(IA64_GRANULE_SIZE-1)) #define ORDERROUNDDOWN(n) ((n) & ~((PAGE_SIZE<<MAX_ORDER)-1)) -#ifdef CONFIG_DISCONTIGMEM +#ifdef CONFIG_NUMA extern void call_pernode_memory (unsigned long start, unsigned long len, void *func); #else # define call_pernode_memory(start, len, func) (*func)(start, len, 0) diff --git a/include/asm-ia64/mmu_context.h b/include/asm-ia64/mmu_context.h index 8d6e72f7b08e..b5c65081a3aa 100644 --- a/include/asm-ia64/mmu_context.h +++ b/include/asm-ia64/mmu_context.h @@ -7,12 +7,13 @@ */ /* - * Routines to manage the allocation of task context numbers. Task context numbers are - * used to reduce or eliminate the need to perform TLB flushes due to context switches. - * Context numbers are implemented using ia-64 region ids. Since the IA-64 TLB does not - * consider the region number when performing a TLB lookup, we need to assign a unique - * region id to each region in a process. We use the least significant three bits in a - * region id for this purpose. + * Routines to manage the allocation of task context numbers. Task context + * numbers are used to reduce or eliminate the need to perform TLB flushes + * due to context switches. Context numbers are implemented using ia-64 + * region ids. Since the IA-64 TLB does not consider the region number when + * performing a TLB lookup, we need to assign a unique region id to each + * region in a process. We use the least significant three bits in aregion + * id for this purpose. */ #define IA64_REGION_ID_KERNEL 0 /* the kernel's region id (tlb.c depends on this being 0) */ @@ -32,13 +33,17 @@ struct ia64_ctx { spinlock_t lock; unsigned int next; /* next context number to use */ - unsigned int limit; /* next >= limit => must call wrap_mmu_context() */ - unsigned int max_ctx; /* max. context value supported by all CPUs */ + unsigned int limit; /* available free range */ + unsigned int max_ctx; /* max. context value supported by all CPUs */ + /* call wrap_mmu_context when next >= max */ + unsigned long *bitmap; /* bitmap size is max_ctx+1 */ + unsigned long *flushmap;/* pending rid to be flushed */ }; extern struct ia64_ctx ia64_ctx; DECLARE_PER_CPU(u8, ia64_need_tlb_flush); +extern void mmu_context_init (void); extern void wrap_mmu_context (struct mm_struct *mm); static inline void @@ -47,10 +52,10 @@ enter_lazy_tlb (struct mm_struct *mm, struct task_struct *tsk) } /* - * When the context counter wraps around all TLBs need to be flushed because an old - * context number might have been reused. This is signalled by the ia64_need_tlb_flush - * per-CPU variable, which is checked in the routine below. Called by activate_mm(). - * <efocht@ess.nec.de> + * When the context counter wraps around all TLBs need to be flushed because + * an old context number might have been reused. This is signalled by the + * ia64_need_tlb_flush per-CPU variable, which is checked in the routine + * below. Called by activate_mm(). <efocht@ess.nec.de> */ static inline void delayed_tlb_flush (void) @@ -60,11 +65,9 @@ delayed_tlb_flush (void) if (unlikely(__ia64_per_cpu_var(ia64_need_tlb_flush))) { spin_lock_irqsave(&ia64_ctx.lock, flags); - { - if (__ia64_per_cpu_var(ia64_need_tlb_flush)) { - local_flush_tlb_all(); - __ia64_per_cpu_var(ia64_need_tlb_flush) = 0; - } + if (__ia64_per_cpu_var(ia64_need_tlb_flush)) { + local_flush_tlb_all(); + __ia64_per_cpu_var(ia64_need_tlb_flush) = 0; } spin_unlock_irqrestore(&ia64_ctx.lock, flags); } @@ -76,20 +79,27 @@ get_mmu_context (struct mm_struct *mm) unsigned long flags; nv_mm_context_t context = mm->context; - if (unlikely(!context)) { - spin_lock_irqsave(&ia64_ctx.lock, flags); - { - /* re-check, now that we've got the lock: */ - context = mm->context; - if (context == 0) { - cpus_clear(mm->cpu_vm_mask); - if (ia64_ctx.next >= ia64_ctx.limit) - wrap_mmu_context(mm); - mm->context = context = ia64_ctx.next++; - } + if (likely(context)) + goto out; + + spin_lock_irqsave(&ia64_ctx.lock, flags); + /* re-check, now that we've got the lock: */ + context = mm->context; + if (context == 0) { + cpus_clear(mm->cpu_vm_mask); + if (ia64_ctx.next >= ia64_ctx.limit) { + ia64_ctx.next = find_next_zero_bit(ia64_ctx.bitmap, + ia64_ctx.max_ctx, ia64_ctx.next); + ia64_ctx.limit = find_next_bit(ia64_ctx.bitmap, + ia64_ctx.max_ctx, ia64_ctx.next); + if (ia64_ctx.next >= ia64_ctx.max_ctx) + wrap_mmu_context(mm); } - spin_unlock_irqrestore(&ia64_ctx.lock, flags); + mm->context = context = ia64_ctx.next++; + __set_bit(context, ia64_ctx.bitmap); } + spin_unlock_irqrestore(&ia64_ctx.lock, flags); +out: /* * Ensure we're not starting to use "context" before any old * uses of it are gone from our TLB. @@ -100,8 +110,8 @@ get_mmu_context (struct mm_struct *mm) } /* - * Initialize context number to some sane value. MM is guaranteed to be a brand-new - * address-space, so no TLB flushing is needed, ever. + * Initialize context number to some sane value. MM is guaranteed to be a + * brand-new address-space, so no TLB flushing is needed, ever. */ static inline int init_new_context (struct task_struct *p, struct mm_struct *mm) @@ -162,7 +172,10 @@ activate_context (struct mm_struct *mm) if (!cpu_isset(smp_processor_id(), mm->cpu_vm_mask)) cpu_set(smp_processor_id(), mm->cpu_vm_mask); reload_context(context); - /* in the unlikely event of a TLB-flush by another thread, redo the load: */ + /* + * in the unlikely event of a TLB-flush by another thread, + * redo the load. + */ } while (unlikely(context != mm->context)); } @@ -175,8 +188,8 @@ static inline void activate_mm (struct mm_struct *prev, struct mm_struct *next) { /* - * We may get interrupts here, but that's OK because interrupt handlers cannot - * touch user-space. + * We may get interrupts here, but that's OK because interrupt + * handlers cannot touch user-space. */ ia64_set_kr(IA64_KR_PT_BASE, __pa(next->pgd)); activate_context(next); diff --git a/include/asm-ia64/mmzone.h b/include/asm-ia64/mmzone.h index d32f51e3d6c2..34efe88eb849 100644 --- a/include/asm-ia64/mmzone.h +++ b/include/asm-ia64/mmzone.h @@ -15,7 +15,7 @@ #include <asm/page.h> #include <asm/meminit.h> -#ifdef CONFIG_DISCONTIGMEM +#ifdef CONFIG_NUMA static inline int pfn_to_nid(unsigned long pfn) { @@ -31,6 +31,10 @@ static inline int pfn_to_nid(unsigned long pfn) #endif } +#ifdef CONFIG_HAVE_ARCH_EARLY_PFN_TO_NID +extern int early_pfn_to_nid(unsigned long pfn); +#endif + #ifdef CONFIG_IA64_DIG /* DIG systems are small */ # define MAX_PHYSNODE_ID 8 # define NR_NODE_MEMBLKS (MAX_NUMNODES * 8) @@ -39,8 +43,8 @@ static inline int pfn_to_nid(unsigned long pfn) # define NR_NODE_MEMBLKS (MAX_NUMNODES * 4) #endif -#else /* CONFIG_DISCONTIGMEM */ +#else /* CONFIG_NUMA */ # define NR_NODE_MEMBLKS (MAX_NUMNODES * 4) -#endif /* CONFIG_DISCONTIGMEM */ +#endif /* CONFIG_NUMA */ #endif /* _ASM_IA64_MMZONE_H */ diff --git a/include/asm-ia64/msi.h b/include/asm-ia64/msi.h index 60f2137f9278..97890f7762b3 100644 --- a/include/asm-ia64/msi.h +++ b/include/asm-ia64/msi.h @@ -12,9 +12,6 @@ static inline void set_intr_gate (int nr, void *func) {} #define IO_APIC_VECTOR(irq) (irq) #define ack_APIC_irq ia64_eoi -#define cpu_mask_to_apicid(mask) cpu_physical_id(first_cpu(mask)) -#define MSI_DEST_MODE MSI_PHYSICAL_MODE -#define MSI_TARGET_CPU ((ia64_getreg(_IA64_REG_CR_LID) >> 16) & 0xffff) #define MSI_TARGET_CPU_SHIFT 4 #endif /* ASM_MSI_H */ diff --git a/include/asm-ia64/nodedata.h b/include/asm-ia64/nodedata.h index 6b0f3ed89b7e..9978c7ce7549 100644 --- a/include/asm-ia64/nodedata.h +++ b/include/asm-ia64/nodedata.h @@ -17,7 +17,7 @@ #include <asm/percpu.h> #include <asm/mmzone.h> -#ifdef CONFIG_DISCONTIGMEM +#ifdef CONFIG_NUMA /* * Node Data. One of these structures is located on each node of a NUMA system. @@ -47,6 +47,6 @@ struct ia64_node_data { */ #define NODE_DATA(nid) (local_node_data->pg_data_ptrs[nid]) -#endif /* CONFIG_DISCONTIGMEM */ +#endif /* CONFIG_NUMA */ #endif /* _ASM_IA64_NODEDATA_H */ diff --git a/include/asm-ia64/page.h b/include/asm-ia64/page.h index 9edffad8c28b..5e6362a786b7 100644 --- a/include/asm-ia64/page.h +++ b/include/asm-ia64/page.h @@ -47,8 +47,6 @@ #define PERCPU_PAGE_SHIFT 16 /* log2() of max. size of per-CPU area */ #define PERCPU_PAGE_SIZE (__IA64_UL_CONST(1) << PERCPU_PAGE_SHIFT) -#define RGN_MAP_LIMIT ((1UL << (4*PAGE_SHIFT - 12)) - PAGE_SIZE) /* per region addr limit */ - #ifdef CONFIG_HUGETLB_PAGE # define HPAGE_REGION_BASE RGN_BASE(RGN_HPAGE) @@ -102,24 +100,26 @@ do { \ #ifdef CONFIG_VIRTUAL_MEM_MAP extern int ia64_pfn_valid (unsigned long pfn); -#else +#elif defined(CONFIG_FLATMEM) # define ia64_pfn_valid(pfn) 1 #endif -#ifndef CONFIG_DISCONTIGMEM +#ifdef CONFIG_FLATMEM # define pfn_valid(pfn) (((pfn) < max_mapnr) && ia64_pfn_valid(pfn)) # define page_to_pfn(page) ((unsigned long) (page - mem_map)) # define pfn_to_page(pfn) (mem_map + (pfn)) -#else +#elif defined(CONFIG_DISCONTIGMEM) extern struct page *vmem_map; +extern unsigned long min_low_pfn; extern unsigned long max_low_pfn; -# define pfn_valid(pfn) (((pfn) < max_low_pfn) && ia64_pfn_valid(pfn)) +# define pfn_valid(pfn) (((pfn) >= min_low_pfn) && ((pfn) < max_low_pfn) && ia64_pfn_valid(pfn)) # define page_to_pfn(page) ((unsigned long) (page - vmem_map)) # define pfn_to_page(pfn) (vmem_map + (pfn)) #endif #define page_to_phys(page) (page_to_pfn(page) << PAGE_SHIFT) #define virt_to_page(kaddr) pfn_to_page(__pa(kaddr) >> PAGE_SHIFT) +#define pfn_to_kaddr(pfn) __va((pfn) << PAGE_SHIFT) typedef union ia64_va { struct { @@ -174,11 +174,17 @@ get_order (unsigned long size) */ typedef struct { unsigned long pte; } pte_t; typedef struct { unsigned long pmd; } pmd_t; +#ifdef CONFIG_PGTABLE_4 + typedef struct { unsigned long pud; } pud_t; +#endif typedef struct { unsigned long pgd; } pgd_t; typedef struct { unsigned long pgprot; } pgprot_t; # define pte_val(x) ((x).pte) # define pmd_val(x) ((x).pmd) +#ifdef CONFIG_PGTABLE_4 +# define pud_val(x) ((x).pud) +#endif # define pgd_val(x) ((x).pgd) # define pgprot_val(x) ((x).pgprot) diff --git a/include/asm-ia64/pgalloc.h b/include/asm-ia64/pgalloc.h index a5f214554afd..f2f233846476 100644 --- a/include/asm-ia64/pgalloc.h +++ b/include/asm-ia64/pgalloc.h @@ -86,6 +86,25 @@ static inline void pgd_free(pgd_t * pgd) pgtable_quicklist_free(pgd); } +#ifdef CONFIG_PGTABLE_4 +static inline void +pgd_populate(struct mm_struct *mm, pgd_t * pgd_entry, pud_t * pud) +{ + pgd_val(*pgd_entry) = __pa(pud); +} + +static inline pud_t *pud_alloc_one(struct mm_struct *mm, unsigned long addr) +{ + return pgtable_quicklist_alloc(); +} + +static inline void pud_free(pud_t * pud) +{ + pgtable_quicklist_free(pud); +} +#define __pud_free_tlb(tlb, pud) pud_free(pud) +#endif /* CONFIG_PGTABLE_4 */ + static inline void pud_populate(struct mm_struct *mm, pud_t * pud_entry, pmd_t * pmd) { diff --git a/include/asm-ia64/pgtable.h b/include/asm-ia64/pgtable.h index 3339c7b55a6f..e2560c58384b 100644 --- a/include/asm-ia64/pgtable.h +++ b/include/asm-ia64/pgtable.h @@ -84,32 +84,55 @@ #define __DIRTY_BITS _PAGE_ED | __DIRTY_BITS_NO_ED /* - * Definitions for first level: - * - * PGDIR_SHIFT determines what a first-level page table entry can map. + * How many pointers will a page table level hold expressed in shift */ -#define PGDIR_SHIFT (PAGE_SHIFT + 2*(PAGE_SHIFT-3)) -#define PGDIR_SIZE (__IA64_UL(1) << PGDIR_SHIFT) -#define PGDIR_MASK (~(PGDIR_SIZE-1)) -#define PTRS_PER_PGD (1UL << (PAGE_SHIFT-3)) -#define USER_PTRS_PER_PGD (5*PTRS_PER_PGD/8) /* regions 0-4 are user regions */ -#define FIRST_USER_ADDRESS 0 +#define PTRS_PER_PTD_SHIFT (PAGE_SHIFT-3) /* - * Definitions for second level: + * Definitions for fourth level: + */ +#define PTRS_PER_PTE (__IA64_UL(1) << (PTRS_PER_PTD_SHIFT)) + +/* + * Definitions for third level: * - * PMD_SHIFT determines the size of the area a second-level page table + * PMD_SHIFT determines the size of the area a third-level page table * can map. */ -#define PMD_SHIFT (PAGE_SHIFT + (PAGE_SHIFT-3)) +#define PMD_SHIFT (PAGE_SHIFT + (PTRS_PER_PTD_SHIFT)) #define PMD_SIZE (1UL << PMD_SHIFT) #define PMD_MASK (~(PMD_SIZE-1)) -#define PTRS_PER_PMD (1UL << (PAGE_SHIFT-3)) +#define PTRS_PER_PMD (1UL << (PTRS_PER_PTD_SHIFT)) +#ifdef CONFIG_PGTABLE_4 /* - * Definitions for third level: + * Definitions for second level: + * + * PUD_SHIFT determines the size of the area a second-level page table + * can map. + */ +#define PUD_SHIFT (PMD_SHIFT + (PTRS_PER_PTD_SHIFT)) +#define PUD_SIZE (1UL << PUD_SHIFT) +#define PUD_MASK (~(PUD_SIZE-1)) +#define PTRS_PER_PUD (1UL << (PTRS_PER_PTD_SHIFT)) +#endif + +/* + * Definitions for first level: + * + * PGDIR_SHIFT determines what a first-level page table entry can map. */ -#define PTRS_PER_PTE (__IA64_UL(1) << (PAGE_SHIFT-3)) +#ifdef CONFIG_PGTABLE_4 +#define PGDIR_SHIFT (PUD_SHIFT + (PTRS_PER_PTD_SHIFT)) +#else +#define PGDIR_SHIFT (PMD_SHIFT + (PTRS_PER_PTD_SHIFT)) +#endif +#define PGDIR_SIZE (__IA64_UL(1) << PGDIR_SHIFT) +#define PGDIR_MASK (~(PGDIR_SIZE-1)) +#define PTRS_PER_PGD_SHIFT PTRS_PER_PTD_SHIFT +#define PTRS_PER_PGD (1UL << PTRS_PER_PGD_SHIFT) +#define USER_PTRS_PER_PGD (5*PTRS_PER_PGD/8) /* regions 0-4 are user regions */ +#define FIRST_USER_ADDRESS 0 /* * All the normal masks have the "page accessed" bits on, as any time @@ -127,6 +150,7 @@ # ifndef __ASSEMBLY__ +#include <linux/sched.h> /* for mm_struct */ #include <asm/bitops.h> #include <asm/cacheflush.h> #include <asm/mmu_context.h> @@ -160,6 +184,9 @@ #define __S111 __pgprot(__ACCESS_BITS | _PAGE_PL_3 | _PAGE_AR_RWX) #define pgd_ERROR(e) printk("%s:%d: bad pgd %016lx.\n", __FILE__, __LINE__, pgd_val(e)) +#ifdef CONFIG_PGTABLE_4 +#define pud_ERROR(e) printk("%s:%d: bad pud %016lx.\n", __FILE__, __LINE__, pud_val(e)) +#endif #define pmd_ERROR(e) printk("%s:%d: bad pmd %016lx.\n", __FILE__, __LINE__, pmd_val(e)) #define pte_ERROR(e) printk("%s:%d: bad pte %016lx.\n", __FILE__, __LINE__, pte_val(e)) @@ -217,6 +244,9 @@ ia64_phys_addr_valid (unsigned long addr) #define kc_vaddr_to_offset(v) ((v) - RGN_BASE(RGN_GATE)) #define kc_offset_to_vaddr(o) ((o) + RGN_BASE(RGN_GATE)) +#define RGN_MAP_SHIFT (PGDIR_SHIFT + PTRS_PER_PGD_SHIFT - 3) +#define RGN_MAP_LIMIT ((1UL << RGN_MAP_SHIFT) - PAGE_SIZE) /* per region addr limit */ + /* * Conversion functions: convert page frame number (pfn) and a protection value to a page * table entry (pte). @@ -236,9 +266,6 @@ ia64_phys_addr_valid (unsigned long addr) #define pte_modify(_pte, newprot) \ (__pte((pte_val(_pte) & ~_PAGE_CHG_MASK) | (pgprot_val(newprot) & _PAGE_CHG_MASK))) -#define page_pte_prot(page,prot) mk_pte(page, prot) -#define page_pte(page) page_pte_prot(page, __pgprot(0)) - #define pte_none(pte) (!pte_val(pte)) #define pte_present(pte) (pte_val(pte) & (_PAGE_P | _PAGE_PROTNONE)) #define pte_clear(mm,addr,pte) (pte_val(*(pte)) = 0UL) @@ -256,9 +283,16 @@ ia64_phys_addr_valid (unsigned long addr) #define pud_bad(pud) (!ia64_phys_addr_valid(pud_val(pud))) #define pud_present(pud) (pud_val(pud) != 0UL) #define pud_clear(pudp) (pud_val(*(pudp)) = 0UL) - #define pud_page(pud) ((unsigned long) __va(pud_val(pud) & _PFN_MASK)) +#ifdef CONFIG_PGTABLE_4 +#define pgd_none(pgd) (!pgd_val(pgd)) +#define pgd_bad(pgd) (!ia64_phys_addr_valid(pgd_val(pgd))) +#define pgd_present(pgd) (pgd_val(pgd) != 0UL) +#define pgd_clear(pgdp) (pgd_val(*(pgdp)) = 0UL) +#define pgd_page(pgd) ((unsigned long) __va(pgd_val(pgd) & _PFN_MASK)) +#endif + /* * The following have defined behavior only work if pte_present() is true. */ @@ -326,7 +360,13 @@ pgd_offset (struct mm_struct *mm, unsigned long address) here. */ #define pgd_offset_gate(mm, addr) pgd_offset_k(addr) +#ifdef CONFIG_PGTABLE_4 /* Find an entry in the second-level page table.. */ +#define pud_offset(dir,addr) \ + ((pud_t *) pgd_page(*(dir)) + (((addr) >> PUD_SHIFT) & (PTRS_PER_PUD - 1))) +#endif + +/* Find an entry in the third-level page table.. */ #define pmd_offset(dir,addr) \ ((pmd_t *) pud_page(*(dir)) + (((addr) >> PMD_SHIFT) & (PTRS_PER_PMD - 1))) @@ -559,7 +599,9 @@ do { \ #define __HAVE_ARCH_PGD_OFFSET_GATE #define __HAVE_ARCH_LAZY_MMU_PROT_UPDATE +#ifndef CONFIG_PGTABLE_4 #include <asm-generic/pgtable-nopud.h> +#endif #include <asm-generic/pgtable.h> #endif /* _ASM_IA64_PGTABLE_H */ diff --git a/include/asm-ia64/ptrace.h b/include/asm-ia64/ptrace.h index a79d1a7ecc77..2c703d6e0c86 100644 --- a/include/asm-ia64/ptrace.h +++ b/include/asm-ia64/ptrace.h @@ -229,6 +229,9 @@ struct switch_stack { }; #ifdef __KERNEL__ + +#define __ARCH_SYS_PTRACE 1 + /* * We use the ia64_psr(regs)->ri to determine which of the three * instructions in bundle (16 bytes) took the sample. Generate diff --git a/include/asm-ia64/rwsem.h b/include/asm-ia64/rwsem.h index e18b5ab0cb75..1327c91ea39c 100644 --- a/include/asm-ia64/rwsem.h +++ b/include/asm-ia64/rwsem.h @@ -186,4 +186,9 @@ __downgrade_write (struct rw_semaphore *sem) #define rwsem_atomic_add(delta, sem) atomic64_add(delta, (atomic64_t *)(&(sem)->count)) #define rwsem_atomic_update(delta, sem) atomic64_add_return(delta, (atomic64_t *)(&(sem)->count)) +static inline int rwsem_is_locked(struct rw_semaphore *sem) +{ + return (sem->count != 0); +} + #endif /* _ASM_IA64_RWSEM_H */ diff --git a/include/asm-ia64/semaphore.h b/include/asm-ia64/semaphore.h index 3a2f0f3f78f3..bb8906285fab 100644 --- a/include/asm-ia64/semaphore.h +++ b/include/asm-ia64/semaphore.h @@ -24,8 +24,6 @@ struct semaphore { .wait = __WAIT_QUEUE_HEAD_INITIALIZER((name).wait) \ } -#define __MUTEX_INITIALIZER(name) __SEMAPHORE_INITIALIZER(name,1) - #define __DECLARE_SEMAPHORE_GENERIC(name,count) \ struct semaphore name = __SEMAPHORE_INITIALIZER(name, count) diff --git a/include/asm-ia64/sn/arch.h b/include/asm-ia64/sn/arch.h index ab827d298569..1a3831c04af6 100644 --- a/include/asm-ia64/sn/arch.h +++ b/include/asm-ia64/sn/arch.h @@ -18,6 +18,32 @@ #include <asm/sn/sn_cpuid.h> /* + * This is the maximum number of NUMALINK nodes that can be part of a single + * SSI kernel. This number includes C-brick, M-bricks, and TIOs. Nodes in + * remote partitions are NOT included in this number. + * The number of compact nodes cannot exceed size of a coherency domain. + * The purpose of this define is to specify a node count that includes + * all C/M/TIO nodes in an SSI system. + * + * SGI system can currently support up to 256 C/M nodes plus additional TIO nodes. + * + * Note: ACPI20 has an architectural limit of 256 nodes. When we upgrade + * to ACPI3.0, this limit will be removed. The notion of "compact nodes" + * should be deleted and TIOs should be included in MAX_NUMNODES. + */ +#define MAX_COMPACT_NODES 512 + +/* + * Maximum number of nodes in all partitions and in all coherency domains. + * This is the total number of nodes accessible in the numalink fabric. It + * includes all C & M bricks, plus all TIOs. + * + * This value is also the value of the maximum number of NASIDs in the numalink + * fabric. + */ +#define MAX_NUMALINK_NODES 16384 + +/* * The following defines attributes of the HUB chip. These attributes are * frequently referenced. They are kept in the per-cpu data areas of each cpu. * They are kept together in a struct to minimize cache misses. @@ -41,15 +67,6 @@ DECLARE_PER_CPU(struct sn_hub_info_s, __sn_hub_info); /* - * This is the maximum number of nodes that can be part of a kernel. - * Effectively, it's the maximum number of compact node ids (cnodeid_t). - * This is not necessarily the same as MAX_NASIDS. - */ -#define MAX_COMPACT_NODES 2048 -#define CPUS_PER_NODE 4 - - -/* * Compact node ID to nasid mappings kept in the per-cpu data areas of each * cpu. */ @@ -57,7 +74,6 @@ DECLARE_PER_CPU(short, __sn_cnodeid_to_nasid[MAX_NUMNODES]); #define sn_cnodeid_to_nasid (&__get_cpu_var(__sn_cnodeid_to_nasid[0])) - extern u8 sn_partition_id; extern u8 sn_system_size; extern u8 sn_sharing_domain_size; diff --git a/include/asm-ia64/sn/io.h b/include/asm-ia64/sn/io.h index 42209733f6b1..41c73a735628 100644 --- a/include/asm-ia64/sn/io.h +++ b/include/asm-ia64/sn/io.h @@ -14,7 +14,7 @@ extern void * sn_io_addr(unsigned long port) __attribute_const__; /* Forward definition */ extern void __sn_mmiowb(void); /* Forward definition */ -extern int numionodes; +extern int num_cnodes; #define __sn_mf_a() ia64_mfa() @@ -36,6 +36,15 @@ extern void sn_dma_flush(unsigned long); #define __sn_readq_relaxed ___sn_readq_relaxed /* + * Convenience macros for setting/clearing bits using the above accessors + */ + +#define __sn_setq_relaxed(addr, val) \ + writeq((__sn_readq_relaxed(addr) | (val)), (addr)) +#define __sn_clrq_relaxed(addr, val) \ + writeq((__sn_readq_relaxed(addr) & ~(val)), (addr)) + +/* * The following routines are SN Platform specific, called when * a reference is made to inX/outX set macros. SN Platform * inX set of macros ensures that Posted DMA writes on the diff --git a/include/asm-ia64/sn/klconfig.h b/include/asm-ia64/sn/klconfig.h index 9f920c70a62a..bcbf209d63be 100644 --- a/include/asm-ia64/sn/klconfig.h +++ b/include/asm-ia64/sn/klconfig.h @@ -208,19 +208,6 @@ typedef struct lboard_s { klconf_off_t brd_next_same; /* Next BOARD with same nasid */ } lboard_t; -#define KLCF_NUM_COMPS(_brd) ((_brd)->brd_numcompts) -#define NODE_OFFSET_TO_KLINFO(n,off) ((klinfo_t*) TO_NODE_CAC(n,off)) -#define KLCF_NEXT(_brd) \ - ((_brd)->brd_next_same ? \ - (NODE_OFFSET_TO_LBOARD((_brd)->brd_next_same_host, (_brd)->brd_next_same)): NULL) -#define KLCF_NEXT_ANY(_brd) \ - ((_brd)->brd_next_any ? \ - (NODE_OFFSET_TO_LBOARD(NASID_GET(_brd), (_brd)->brd_next_any)): NULL) -#define KLCF_COMP(_brd, _ndx) \ - ((((_brd)->brd_compts[(_ndx)]) == 0) ? 0 : \ - (NODE_OFFSET_TO_KLINFO(NASID_GET(_brd), (_brd)->brd_compts[(_ndx)]))) - - /* * Generic info structure. This stores common info about a * component. @@ -249,24 +236,11 @@ typedef struct klinfo_s { /* Generic info */ } klinfo_t ; -static inline lboard_t *find_lboard_any(lboard_t * start, unsigned char brd_type) +static inline lboard_t *find_lboard_next(lboard_t * brd) { - /* Search all boards stored on this node. */ - - while (start) { - if (start->brd_type == brd_type) - return start; - start = KLCF_NEXT_ANY(start); - } - /* Didn't find it. */ - return (lboard_t *) NULL; + if (brd && brd->brd_next_any) + return NODE_OFFSET_TO_LBOARD(NASID_GET(brd), brd->brd_next_any); + return NULL; } - -/* external declarations of Linux kernel functions. */ - -extern lboard_t *root_lboard[]; -extern klinfo_t *find_component(lboard_t *brd, klinfo_t *kli, unsigned char type); -extern klinfo_t *find_first_component(lboard_t *brd, unsigned char type); - #endif /* _ASM_IA64_SN_KLCONFIG_H */ diff --git a/include/asm-ia64/sn/l1.h b/include/asm-ia64/sn/l1.h index 2e5f0aa38889..e3b819110d47 100644 --- a/include/asm-ia64/sn/l1.h +++ b/include/asm-ia64/sn/l1.h @@ -35,4 +35,16 @@ #define L1_BRICKTYPE_ATHENA 0x2b /* + */ #define L1_BRICKTYPE_DAYTONA 0x7a /* z */ +/* board type response codes */ +#define L1_BOARDTYPE_IP69 0x0100 /* CA */ +#define L1_BOARDTYPE_IP63 0x0200 /* CB */ +#define L1_BOARDTYPE_BASEIO 0x0300 /* IB */ +#define L1_BOARDTYPE_PCIE2SLOT 0x0400 /* IC */ +#define L1_BOARDTYPE_PCIX3SLOT 0x0500 /* ID */ +#define L1_BOARDTYPE_PCIXPCIE4SLOT 0x0600 /* IE */ +#define L1_BOARDTYPE_ABACUS 0x0700 /* AB */ +#define L1_BOARDTYPE_DAYTONA 0x0800 /* AD */ +#define L1_BOARDTYPE_INVAL (-1) /* invalid brick type */ + + #endif /* _ASM_IA64_SN_L1_H */ diff --git a/include/asm-ia64/sn/nodepda.h b/include/asm-ia64/sn/nodepda.h index 47bb8100fd00..6f6d69e39ff5 100644 --- a/include/asm-ia64/sn/nodepda.h +++ b/include/asm-ia64/sn/nodepda.h @@ -55,7 +55,6 @@ struct nodepda_s { */ struct phys_cpuid phys_cpuid[NR_CPUS]; spinlock_t ptc_lock ____cacheline_aligned_in_smp; - spinlock_t bist_lock; }; typedef struct nodepda_s nodepda_t; diff --git a/include/asm-ia64/sn/sn_cpuid.h b/include/asm-ia64/sn/sn_cpuid.h index d2c1d34dcce4..749deb2ca6c1 100644 --- a/include/asm-ia64/sn/sn_cpuid.h +++ b/include/asm-ia64/sn/sn_cpuid.h @@ -105,7 +105,6 @@ extern short physical_node_map[]; /* indexed by nasid to get cnode */ #define cpuid_to_nasid(cpuid) (sn_nodepda->phys_cpuid[cpuid].nasid) #define cpuid_to_subnode(cpuid) (sn_nodepda->phys_cpuid[cpuid].subnode) #define cpuid_to_slice(cpuid) (sn_nodepda->phys_cpuid[cpuid].slice) -#define cpuid_to_cnodeid(cpuid) (physical_node_map[cpuid_to_nasid(cpuid)]) /* @@ -113,8 +112,6 @@ extern short physical_node_map[]; /* indexed by nasid to get cnode */ * of potentially large tables. */ extern int nasid_slice_to_cpuid(int, int); -#define nasid_slice_to_cpu_physical_id(nasid, slice) \ - cpu_physical_id(nasid_slice_to_cpuid(nasid, slice)) /* * cnodeid_to_nasid - convert a cnodeid to a NASID diff --git a/include/asm-ia64/sn/sn_sal.h b/include/asm-ia64/sn/sn_sal.h index fea35b33d4e4..2a8b0d92a5d6 100644 --- a/include/asm-ia64/sn/sn_sal.h +++ b/include/asm-ia64/sn/sn_sal.h @@ -47,6 +47,7 @@ #define SN_SAL_CONSOLE_PUTB 0x02000028 #define SN_SAL_CONSOLE_XMIT_CHARS 0x0200002a #define SN_SAL_CONSOLE_READC 0x0200002b +#define SN_SAL_SYSCTL_OP 0x02000030 #define SN_SAL_SYSCTL_MODID_GET 0x02000031 #define SN_SAL_SYSCTL_GET 0x02000032 #define SN_SAL_SYSCTL_IOBRICK_MODULE_GET 0x02000033 @@ -55,6 +56,7 @@ #define SN_SAL_BUS_CONFIG 0x02000037 #define SN_SAL_SYS_SERIAL_GET 0x02000038 #define SN_SAL_PARTITION_SERIAL_GET 0x02000039 +#define SN_SAL_SYSCTL_PARTITION_GET 0x0200003a #define SN_SAL_SYSTEM_POWER_DOWN 0x0200003b #define SN_SAL_GET_MASTER_BASEIO_NASID 0x0200003c #define SN_SAL_COHERENCE 0x0200003d @@ -67,7 +69,7 @@ #define SN_SAL_IOIF_INTERRUPT 0x0200004a #define SN_SAL_HWPERF_OP 0x02000050 // lock #define SN_SAL_IOIF_ERROR_INTERRUPT 0x02000051 - +#define SN_SAL_IOIF_PCI_SAFE 0x02000052 #define SN_SAL_IOIF_SLOT_ENABLE 0x02000053 #define SN_SAL_IOIF_SLOT_DISABLE 0x02000054 #define SN_SAL_IOIF_GET_HUBDEV_INFO 0x02000055 @@ -101,6 +103,13 @@ #define SAL_INTR_FREE 2 /* + * operations available on the generic SN_SAL_SYSCTL_OP + * runtime service + */ +#define SAL_SYSCTL_OP_IOBOARD 0x0001 /* retrieve board type */ +#define SAL_SYSCTL_OP_TIO_JLCK_RST 0x0002 /* issue TIO clock reset */ + +/* * IRouter (i.e. generalized system controller) operations */ #define SAL_IROUTER_OPEN 0 /* open a subchannel */ @@ -198,26 +207,16 @@ ia64_sn_get_master_baseio_nasid(void) return ret_stuff.v0; } -static inline char * +static inline void * ia64_sn_get_klconfig_addr(nasid_t nasid) { struct ia64_sal_retval ret_stuff; - int cnodeid; - cnodeid = nasid_to_cnodeid(nasid); ret_stuff.status = 0; ret_stuff.v0 = 0; ret_stuff.v1 = 0; ret_stuff.v2 = 0; SAL_CALL(ret_stuff, SN_SAL_GET_KLCONFIG_ADDR, (u64)nasid, 0, 0, 0, 0, 0, 0); - - /* - * We should panic if a valid cnode nasid does not produce - * a klconfig address. - */ - if (ret_stuff.status != 0) { - panic("ia64_sn_get_klconfig_addr: Returned error %lx\n", ret_stuff.status); - } return ret_stuff.v0 ? __va(ret_stuff.v0) : NULL; } @@ -583,6 +582,21 @@ sn_partition_serial_number_val(void) { } /* + * Returns the partition id of the nasid passed in as an argument, + * or INVALID_PARTID if the partition id cannot be retrieved. + */ +static inline partid_t +ia64_sn_sysctl_partition_get(nasid_t nasid) +{ + struct ia64_sal_retval ret_stuff; + SAL_CALL(ret_stuff, SN_SAL_SYSCTL_PARTITION_GET, nasid, + 0, 0, 0, 0, 0, 0); + if (ret_stuff.status != 0) + return -1; + return ((partid_t)ret_stuff.v0); +} + +/* * Returns the physical address of the partition's reserved page through * an iterative number of calls. * @@ -694,12 +708,10 @@ sn_change_memprotect(u64 paddr, u64 len, u64 perms, u64 *nasid_array) unsigned long irq_flags; cnodeid = nasid_to_cnodeid(get_node_number(paddr)); - // spin_lock(&NODEPDA(cnodeid)->bist_lock); local_irq_save(irq_flags); ia64_sal_oemcall_nolock(&ret_stuff, SN_SAL_MEMPROTECT, paddr, len, (u64)nasid_array, perms, 0, 0, 0); local_irq_restore(irq_flags); - // spin_unlock(&NODEPDA(cnodeid)->bist_lock); return ret_stuff.status; } #define SN_MEMPROT_ACCESS_CLASS_0 0x14a080 @@ -873,6 +885,41 @@ ia64_sn_sysctl_event_init(nasid_t nasid) return (int) rv.v0; } +/* + * Ask the system controller on the specified nasid to reset + * the CX corelet clock. Only valid on TIO nodes. + */ +static inline int +ia64_sn_sysctl_tio_clock_reset(nasid_t nasid) +{ + struct ia64_sal_retval rv; + SAL_CALL_REENTRANT(rv, SN_SAL_SYSCTL_OP, SAL_SYSCTL_OP_TIO_JLCK_RST, + nasid, 0, 0, 0, 0, 0); + if (rv.status != 0) + return (int)rv.status; + if (rv.v0 != 0) + return (int)rv.v0; + + return 0; +} + +/* + * Get the associated ioboard type for a given nasid. + */ +static inline int +ia64_sn_sysctl_ioboard_get(nasid_t nasid) +{ + struct ia64_sal_retval rv; + SAL_CALL_REENTRANT(rv, SN_SAL_SYSCTL_OP, SAL_SYSCTL_OP_IOBOARD, + nasid, 0, 0, 0, 0, 0); + if (rv.v0 != 0) + return (int)rv.v0; + if (rv.v1 != 0) + return (int)rv.v1; + + return 0; +} + /** * ia64_sn_get_fit_compt - read a FIT entry from the PROM header * @nasid: NASID of node to read @@ -987,6 +1034,24 @@ ia64_sn_get_sn_info(int fc, u8 *shubtype, u16 *nasid_bitmask, u8 *nasid_shift, ret_stuff.v2 = 0; SAL_CALL_NOLOCK(ret_stuff, SN_SAL_GET_SN_INFO, fc, 0, 0, 0, 0, 0, 0); +/***** BEGIN HACK - temp til old proms no longer supported ********/ + if (ret_stuff.status == SALRET_NOT_IMPLEMENTED) { + int nasid = get_sapicid() & 0xfff;; +#define SH_SHUB_ID_NODES_PER_BIT_MASK 0x001f000000000000UL +#define SH_SHUB_ID_NODES_PER_BIT_SHFT 48 + if (shubtype) *shubtype = 0; + if (nasid_bitmask) *nasid_bitmask = 0x7ff; + if (nasid_shift) *nasid_shift = 38; + if (systemsize) *systemsize = 10; + if (sharing_domain_size) *sharing_domain_size = 8; + if (partid) *partid = ia64_sn_sysctl_partition_get(nasid); + if (coher) *coher = nasid >> 9; + if (reg) *reg = (HUB_L((u64 *) LOCAL_MMR_ADDR(SH1_SHUB_ID)) & SH_SHUB_ID_NODES_PER_BIT_MASK) >> + SH_SHUB_ID_NODES_PER_BIT_SHFT; + return 0; + } +/***** END HACK *******/ + if (ret_stuff.status < 0) return ret_stuff.status; diff --git a/include/asm-ia64/sn/tioca_provider.h b/include/asm-ia64/sn/tioca_provider.h index 5ccec608d325..b532ef6148ed 100644 --- a/include/asm-ia64/sn/tioca_provider.h +++ b/include/asm-ia64/sn/tioca_provider.h @@ -182,11 +182,11 @@ tioca_tlbflush(struct tioca_kernel *tioca_kernel) * touch every CL aligned GART entry. */ - ca_base->ca_control2 &= ~(CA_GART_MEM_PARAM); - ca_base->ca_control2 |= CA_GART_FLUSH_TLB; - ca_base->ca_control2 |= - (0x2ull << CA_GART_MEM_PARAM_SHFT); - tmp = ca_base->ca_control2; + __sn_clrq_relaxed(&ca_base->ca_control2, CA_GART_MEM_PARAM); + __sn_setq_relaxed(&ca_base->ca_control2, CA_GART_FLUSH_TLB); + __sn_setq_relaxed(&ca_base->ca_control2, + (0x2ull << CA_GART_MEM_PARAM_SHFT)); + tmp = __sn_readq_relaxed(&ca_base->ca_control2); } return; @@ -196,8 +196,8 @@ tioca_tlbflush(struct tioca_kernel *tioca_kernel) * Gart in uncached mode ... need an explicit flush. */ - ca_base->ca_control2 |= CA_GART_FLUSH_TLB; - tmp = ca_base->ca_control2; + __sn_setq_relaxed(&ca_base->ca_control2, CA_GART_FLUSH_TLB); + tmp = __sn_readq_relaxed(&ca_base->ca_control2); } extern uint32_t tioca_gart_found; diff --git a/include/asm-ia64/sn/tioce.h b/include/asm-ia64/sn/tioce.h index 22879853e46c..ecaddf960086 100644 --- a/include/asm-ia64/sn/tioce.h +++ b/include/asm-ia64/sn/tioce.h @@ -1,22 +1,10 @@ -/************************************************************************** - * * - * Unpublished copyright (c) 2005, Silicon Graphics, Inc. * - * THIS IS UNPUBLISHED CONFIDENTIAL AND PROPRIETARY SOURCE CODE OF SGI. * - * * - * The copyright notice above does not evidence any actual or intended * - * publication or disclosure of this source code, which includes * - * information that is confidential and/or proprietary, and is a trade * - * secret, of Silicon Graphics, Inc. ANY REPRODUCTION, MODIFICATION, * - * DISTRIBUTION, PUBLIC PERFORMANCE, OR PUBLIC DISPLAY OF OR THROUGH * - * USE OF THIS SOURCE CODE WITHOUT THE EXPRESS WRITTEN CONSENT OF * - * SILICON GRAPHICS, INC. IS STRICTLY PROHIBITED, AND IN VIOLATION OF * - * APPLICABLE LAWS AND INTERNATIONAL TREATIES. THE RECEIPT OR * - * POSSESSION OF THIS SOURCE CODE AND/OR RELATED INFORMATION DOES NOT * - * CONVEY OR IMPLY ANY RIGHTS TO REPRODUCE, DISCLOSE OR DISTRIBUTE ITS * - * CONTENTS, OR TO MANUFACTURE, USE, OR SELL ANYTHING THAT IT MAY * - * DESCRIBE, IN WHOLE OR IN PART. * - * * - **************************************************************************/ +/* + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * + * Copyright (c) 2003-2005 Silicon Graphics, Inc. All rights reserved. + */ #ifndef __ASM_IA64_SN_TIOCE_H__ #define __ASM_IA64_SN_TIOCE_H__ diff --git a/include/asm-ia64/sn/tioce_provider.h b/include/asm-ia64/sn/tioce_provider.h index 7f63dec0a79a..cb414908671d 100644 --- a/include/asm-ia64/sn/tioce_provider.h +++ b/include/asm-ia64/sn/tioce_provider.h @@ -1,13 +1,10 @@ -/************************************************************************** - * Copyright (C) 2005, Silicon Graphics, Inc. * - * * - * These coded instructions, statements, and computer programs contain * - * unpublished proprietary information of Silicon Graphics, Inc., and * - * are protected by Federal copyright law. They may not be disclosed * - * to third parties or copied or duplicated in any form, in whole or * - * in part, without the prior written consent of Silicon Graphics, Inc. * - * * - **************************************************************************/ +/* + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * + * Copyright (c) 2003-2005 Silicon Graphics, Inc. All rights reserved. + */ #ifndef _ASM_IA64_SN_CE_PROVIDER_H #define _ASM_IA64_SN_CE_PROVIDER_H diff --git a/include/asm-ia64/sn/tiocx.h b/include/asm-ia64/sn/tiocx.h index c5447a504509..5699e75e5024 100644 --- a/include/asm-ia64/sn/tiocx.h +++ b/include/asm-ia64/sn/tiocx.h @@ -19,6 +19,7 @@ struct cx_id_s { struct cx_dev { struct cx_id_s cx_id; + int bt; /* board/blade type */ void *soft; /* driver specific */ struct hubdev_info *hubdev; struct device dev; @@ -59,7 +60,7 @@ struct cx_drv { extern struct sn_irq_info *tiocx_irq_alloc(nasid_t, int, int, nasid_t, int); extern void tiocx_irq_free(struct sn_irq_info *); extern int cx_device_unregister(struct cx_dev *); -extern int cx_device_register(nasid_t, int, int, struct hubdev_info *); +extern int cx_device_register(nasid_t, int, int, struct hubdev_info *, int); extern int cx_driver_unregister(struct cx_drv *); extern int cx_driver_register(struct cx_drv *); extern uint64_t tiocx_dma_addr(uint64_t addr); diff --git a/include/asm-ia64/sn/xp.h b/include/asm-ia64/sn/xp.h index 1df1c9f61a65..49faf8f26430 100644 --- a/include/asm-ia64/sn/xp.h +++ b/include/asm-ia64/sn/xp.h @@ -49,7 +49,7 @@ * C-brick nasids, thus the need for bitmaps which don't account for * odd-numbered (non C-brick) nasids. */ -#define XP_MAX_PHYSNODE_ID (MAX_PHYSNODE_ID / 2) +#define XP_MAX_PHYSNODE_ID (MAX_NUMALINK_NODES / 2) #define XP_NASID_MASK_BYTES ((XP_MAX_PHYSNODE_ID + 7) / 8) #define XP_NASID_MASK_WORDS ((XP_MAX_PHYSNODE_ID + 63) / 64) @@ -217,7 +217,17 @@ enum xpc_retval { xpcInvalidPartid, /* 42: invalid partition ID */ xpcLocalPartid, /* 43: local partition ID */ - xpcUnknownReason /* 44: unknown reason -- must be last in list */ + xpcOtherGoingDown, /* 44: other side going down, reason unknown */ + xpcSystemGoingDown, /* 45: system is going down, reason unknown */ + xpcSystemHalt, /* 46: system is being halted */ + xpcSystemReboot, /* 47: system is being rebooted */ + xpcSystemPoweroff, /* 48: system is being powered off */ + + xpcDisconnecting, /* 49: channel disconnecting (closing) */ + + xpcOpenCloseError, /* 50: channel open/close protocol error */ + + xpcUnknownReason /* 51: unknown reason -- must be last in list */ }; @@ -342,7 +352,7 @@ typedef void (*xpc_notify_func)(enum xpc_retval reason, partid_t partid, * * The 'func' field points to the function to call when aynchronous * notification is required for such events as: a connection established/lost, - * or an incomming message received, or an error condition encountered. A + * or an incoming message received, or an error condition encountered. A * non-NULL 'func' field indicates that there is an active registration for * the channel. */ diff --git a/include/asm-ia64/sparsemem.h b/include/asm-ia64/sparsemem.h new file mode 100644 index 000000000000..67a7c40ec27f --- /dev/null +++ b/include/asm-ia64/sparsemem.h @@ -0,0 +1,20 @@ +#ifndef _ASM_IA64_SPARSEMEM_H +#define _ASM_IA64_SPARSEMEM_H + +#ifdef CONFIG_SPARSEMEM +/* + * SECTION_SIZE_BITS 2^N: how big each section will be + * MAX_PHYSMEM_BITS 2^N: how much memory we can have in that space + */ + +#define SECTION_SIZE_BITS (30) +#define MAX_PHYSMEM_BITS (50) +#ifdef CONFIG_FORCE_MAX_ZONEORDER +#if ((CONFIG_FORCE_MAX_ZONEORDER - 1 + PAGE_SHIFT) > SECTION_SIZE_BITS) +#undef SECTION_SIZE_BITS +#define SECTION_SIZE_BITS (CONFIG_FORCE_MAX_ZONEORDER - 1 + PAGE_SHIFT) +#endif +#endif + +#endif /* CONFIG_SPARSEMEM */ +#endif /* _ASM_IA64_SPARSEMEM_H */ diff --git a/include/asm-ia64/tlb.h b/include/asm-ia64/tlb.h index 3a9a6d1be75c..834370b9dea1 100644 --- a/include/asm-ia64/tlb.h +++ b/include/asm-ia64/tlb.h @@ -60,7 +60,6 @@ struct mmu_gather { unsigned int nr; /* == ~0U => fast mode */ unsigned char fullmm; /* non-zero means full mm flush */ unsigned char need_flush; /* really unmapped some PTEs? */ - unsigned long freed; /* number of pages freed */ unsigned long start_addr; unsigned long end_addr; struct page *pages[FREE_PTE_NR]; @@ -129,7 +128,7 @@ ia64_tlb_flush_mmu (struct mmu_gather *tlb, unsigned long start, unsigned long e static inline struct mmu_gather * tlb_gather_mmu (struct mm_struct *mm, unsigned int full_mm_flush) { - struct mmu_gather *tlb = &__get_cpu_var(mmu_gathers); + struct mmu_gather *tlb = &get_cpu_var(mmu_gathers); tlb->mm = mm; /* @@ -147,25 +146,17 @@ tlb_gather_mmu (struct mm_struct *mm, unsigned int full_mm_flush) */ tlb->nr = (num_online_cpus() == 1) ? ~0U : 0; tlb->fullmm = full_mm_flush; - tlb->freed = 0; tlb->start_addr = ~0UL; return tlb; } /* * Called at the end of the shootdown operation to free up any resources that were - * collected. The page table lock is still held at this point. + * collected. */ static inline void tlb_finish_mmu (struct mmu_gather *tlb, unsigned long start, unsigned long end) { - unsigned long freed = tlb->freed; - struct mm_struct *mm = tlb->mm; - unsigned long rss = get_mm_counter(mm, rss); - - if (rss < freed) - freed = rss; - add_mm_counter(mm, rss, -freed); /* * Note: tlb->nr may be 0 at this point, so we can't rely on tlb->start_addr and * tlb->end_addr. @@ -174,12 +165,8 @@ tlb_finish_mmu (struct mmu_gather *tlb, unsigned long start, unsigned long end) /* keep the page table cache within bounds */ check_pgt_cache(); -} -static inline unsigned int -tlb_is_full_mm(struct mmu_gather *tlb) -{ - return tlb->fullmm; + put_cpu_var(mmu_gathers); } /* diff --git a/include/asm-ia64/tlbflush.h b/include/asm-ia64/tlbflush.h index b65c62702724..a35b323bae4c 100644 --- a/include/asm-ia64/tlbflush.h +++ b/include/asm-ia64/tlbflush.h @@ -51,6 +51,7 @@ flush_tlb_mm (struct mm_struct *mm) if (!mm) return; + set_bit(mm->context, ia64_ctx.flushmap); mm->context = 0; if (atomic_read(&mm->mm_users) == 0) diff --git a/include/asm-ia64/uaccess.h b/include/asm-ia64/uaccess.h index 3a7829bb5954..9adb51211c22 100644 --- a/include/asm-ia64/uaccess.h +++ b/include/asm-ia64/uaccess.h @@ -187,8 +187,8 @@ extern void __get_user_unknown (void); ({ \ const __typeof__(*(ptr)) __user *__gu_ptr = (ptr); \ __typeof__ (size) __gu_size = (size); \ - long __gu_err = -EFAULT, __gu_val = 0; \ - \ + long __gu_err = -EFAULT; \ + unsigned long __gu_val = 0; \ if (!check || __access_ok(__gu_ptr, size, segment)) \ switch (__gu_size) { \ case 1: __get_user_size(__gu_val, __gu_ptr, 1, __gu_err); break; \ @@ -240,13 +240,13 @@ extern unsigned long __must_check __copy_user (void __user *to, const void __use static inline unsigned long __copy_to_user (void __user *to, const void *from, unsigned long count) { - return __copy_user(to, (void __user *) from, count); + return __copy_user(to, (__force void __user *) from, count); } static inline unsigned long __copy_from_user (void *to, const void __user *from, unsigned long count) { - return __copy_user((void __user *) to, from, count); + return __copy_user((__force void __user *) to, from, count); } #define __copy_to_user_inatomic __copy_to_user @@ -258,7 +258,7 @@ __copy_from_user (void *to, const void __user *from, unsigned long count) long __cu_len = (n); \ \ if (__access_ok(__cu_to, __cu_len, get_fs())) \ - __cu_len = __copy_user(__cu_to, (void __user *) __cu_from, __cu_len); \ + __cu_len = __copy_user(__cu_to, (__force void __user *) __cu_from, __cu_len); \ __cu_len; \ }) @@ -270,7 +270,7 @@ __copy_from_user (void *to, const void __user *from, unsigned long count) \ __chk_user_ptr(__cu_from); \ if (__access_ok(__cu_from, __cu_len, get_fs())) \ - __cu_len = __copy_user((void __user *) __cu_to, __cu_from, __cu_len); \ + __cu_len = __copy_user((__force void __user *) __cu_to, __cu_from, __cu_len); \ __cu_len; \ }) diff --git a/include/asm-ia64/unistd.h b/include/asm-ia64/unistd.h index 3a0c69524656..6d96a67439be 100644 --- a/include/asm-ia64/unistd.h +++ b/include/asm-ia64/unistd.h @@ -383,8 +383,6 @@ struct sigaction; long sys_execve(char __user *filename, char __user * __user *argv, char __user * __user *envp, struct pt_regs *regs); asmlinkage long sys_pipe(void); -asmlinkage long sys_ptrace(long request, pid_t pid, - unsigned long addr, unsigned long data); asmlinkage long sys_rt_sigaction(int sig, const struct sigaction __user *act, struct sigaction __user *oact, diff --git a/include/asm-m32r/atomic.h b/include/asm-m32r/atomic.h index bfff69a49936..ef1fb8ea4726 100644 --- a/include/asm-m32r/atomic.h +++ b/include/asm-m32r/atomic.h @@ -242,6 +242,27 @@ static __inline__ int atomic_dec_return(atomic_t *v) */ #define atomic_add_negative(i,v) (atomic_add_return((i), (v)) < 0) +#define atomic_cmpxchg(v, o, n) ((int)cmpxchg(&((v)->counter), (o), (n))) + +/** + * atomic_add_unless - add unless the number is a given value + * @v: pointer of type atomic_t + * @a: the amount to add to v... + * @u: ...unless v is equal to u. + * + * Atomically adds @a to @v, so long as it was not @u. + * Returns non-zero if @v was not @u, and zero otherwise. + */ +#define atomic_add_unless(v, a, u) \ +({ \ + int c, old; \ + c = atomic_read(v); \ + while (c != (u) && (old = atomic_cmpxchg((v), c, c + (a))) != c) \ + c = old; \ + c != (u); \ +}) +#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0) + static __inline__ void atomic_clear_mask(unsigned long mask, atomic_t *addr) { unsigned long flags; diff --git a/include/asm-m32r/dma-mapping.h b/include/asm-m32r/dma-mapping.h index 3a2db28834b6..a7fa0302bda7 100644 --- a/include/asm-m32r/dma-mapping.h +++ b/include/asm-m32r/dma-mapping.h @@ -8,7 +8,7 @@ static inline void * dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *dma_handle, - int flag) + gfp_t flag) { return (void *)NULL; } diff --git a/include/asm-m32r/ide.h b/include/asm-m32r/ide.h index 194393bd8beb..f7aa96970d18 100644 --- a/include/asm-m32r/ide.h +++ b/include/asm-m32r/ide.h @@ -25,18 +25,21 @@ # endif #endif -#if defined(CONFIG_PLAT_M32700UT) -#include <asm/irq.h> -#include <asm/m32700ut/m32700ut_pld.h> -#endif +#include <asm/m32r.h> + #define IDE_ARCH_OBSOLETE_DEFAULTS static __inline__ int ide_default_irq(unsigned long base) { switch (base) { -#if defined(CONFIG_PLAT_M32700UT) || defined(CONFIG_PLAT_MAPPI2) || defined(CONFIG_PLAT_MAPPI3) +#if defined(CONFIG_PLAT_M32700UT) || defined(CONFIG_PLAT_MAPPI2) + case 0x1f0: return PLD_IRQ_CFIREQ; + default: + return 0; +#elif defined(CONFIG_PLAT_MAPPI3) case 0x1f0: return PLD_IRQ_CFIREQ; + case 0x170: return PLD_IRQ_IDEIREQ; default: return 0; #else diff --git a/include/asm-m32r/io.h b/include/asm-m32r/io.h index 8e9e481e6996..70ad1c949c2b 100644 --- a/include/asm-m32r/io.h +++ b/include/asm-m32r/io.h @@ -60,7 +60,7 @@ __ioremap(unsigned long offset, unsigned long size, unsigned long flags); * address. */ -static inline void * ioremap(unsigned long offset, unsigned long size) +static inline void __iomem *ioremap(unsigned long offset, unsigned long size) { return __ioremap(offset, size, 0); } diff --git a/include/asm-m32r/mappi3/mappi3_pld.h b/include/asm-m32r/mappi3/mappi3_pld.h index 3f1551f7f01f..1d3c25d61bcb 100644 --- a/include/asm-m32r/mappi3/mappi3_pld.h +++ b/include/asm-m32r/mappi3/mappi3_pld.h @@ -59,7 +59,7 @@ #define M32R_IRQ_I2C (28) /* I2C-BUS */ #define PLD_IRQ_CFIREQ (6) /* INT5 CFC Card Interrupt */ #define PLD_IRQ_CFC_INSERT (7) /* INT6 CFC Card Insert */ -#define PLD_IRQ_CFC_EJECT (8) /* INT7 CFC Card Eject */ +#define PLD_IRQ_IDEIREQ (8) /* INT7 IDE Interrupt */ #define PLD_IRQ_MMCCARD (43) /* MMC Card Insert */ #define PLD_IRQ_MMCIRQ (44) /* MMC Transfer Done */ diff --git a/include/asm-m32r/mmzone.h b/include/asm-m32r/mmzone.h index d58878ec899e..adc7970a77ec 100644 --- a/include/asm-m32r/mmzone.h +++ b/include/asm-m32r/mmzone.h @@ -21,12 +21,6 @@ extern struct pglist_data *node_data[]; __pgdat->node_start_pfn + __pgdat->node_spanned_pages - 1; \ }) -#define local_mapnr(kvaddr) \ -({ \ - unsigned long __pfn = __pa(kvaddr) >> PAGE_SHIFT; \ - (__pfn - node_start_pfn(pfn_to_nid(__pfn))); \ -}) - #define pfn_to_page(pfn) \ ({ \ unsigned long __pfn = pfn; \ diff --git a/include/asm-m32r/pgtable.h b/include/asm-m32r/pgtable.h index 388e5ee9fa27..75740debcd01 100644 --- a/include/asm-m32r/pgtable.h +++ b/include/asm-m32r/pgtable.h @@ -27,6 +27,9 @@ #include <asm/bitops.h> #include <asm/page.h> +struct mm_struct; +struct vm_area_struct; + extern pgd_t swapper_pg_dir[1024]; extern void paging_init(void); @@ -324,8 +327,6 @@ static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) return pte; } -#define page_pte(page) page_pte_prot(page, __pgprot(0)) - /* * Conversion functions: convert a page and protection to a page entry, * and a page entry and page directory to the page they refer to. diff --git a/include/asm-m32r/ptrace.h b/include/asm-m32r/ptrace.h index 976417126b2d..55cd7ecfde43 100644 --- a/include/asm-m32r/ptrace.h +++ b/include/asm-m32r/ptrace.h @@ -145,6 +145,9 @@ struct pt_regs { #define PTRACE_O_TRACESYSGOOD 0x00000001 #ifdef __KERNEL__ + +#define __ARCH_SYS_PTRACE 1 + #if defined(CONFIG_ISA_M32R2) || defined(CONFIG_CHIP_VDEC2) #define user_mode(regs) ((M32R_PSW_BPM & (regs)->psw) != 0) #elif defined(CONFIG_ISA_M32R) diff --git a/include/asm-m32r/semaphore.h b/include/asm-m32r/semaphore.h index 53e3c60f21ec..bf447c52a0a1 100644 --- a/include/asm-m32r/semaphore.h +++ b/include/asm-m32r/semaphore.h @@ -32,9 +32,6 @@ struct semaphore { .wait = __WAIT_QUEUE_HEAD_INITIALIZER((name).wait) \ } -#define __MUTEX_INITIALIZER(name) \ - __SEMAPHORE_INITIALIZER(name,1) - #define __DECLARE_SEMAPHORE_GENERIC(name,count) \ struct semaphore name = __SEMAPHORE_INITIALIZER(name,count) diff --git a/include/asm-m32r/system.h b/include/asm-m32r/system.h index 73348c3f858b..5eee832b73a0 100644 --- a/include/asm-m32r/system.h +++ b/include/asm-m32r/system.h @@ -11,6 +11,7 @@ */ #include <linux/config.h> +#include <asm/assembler.h> #ifdef __KERNEL__ @@ -132,8 +133,6 @@ static inline void local_irq_disable(void) !(flags & 0x40); \ }) -#endif /* __KERNEL__ */ - #define nop() __asm__ __volatile__ ("nop" : : ) #define xchg(ptr,x) \ @@ -213,6 +212,67 @@ static __inline__ unsigned long __xchg(unsigned long x, volatile void * ptr, return (tmp); } +#define __HAVE_ARCH_CMPXCHG 1 + +static __inline__ unsigned long +__cmpxchg_u32(volatile unsigned int *p, unsigned int old, unsigned int new) +{ + unsigned long flags; + unsigned int retval; + + local_irq_save(flags); + __asm__ __volatile__ ( + DCACHE_CLEAR("%0", "r4", "%1") + M32R_LOCK" %0, @%1; \n" + " bne %0, %2, 1f; \n" + M32R_UNLOCK" %3, @%1; \n" + " bra 2f; \n" + " .fillinsn \n" + "1:" + M32R_UNLOCK" %2, @%1; \n" + " .fillinsn \n" + "2:" + : "=&r" (retval) + : "r" (p), "r" (old), "r" (new) + : "cbit", "memory" +#ifdef CONFIG_CHIP_M32700_TS1 + , "r4" +#endif /* CONFIG_CHIP_M32700_TS1 */ + ); + local_irq_restore(flags); + + return retval; +} + +/* This function doesn't exist, so you'll get a linker error + if something tries to do an invalid cmpxchg(). */ +extern void __cmpxchg_called_with_bad_pointer(void); + +static __inline__ unsigned long +__cmpxchg(volatile void *ptr, unsigned long old, unsigned long new, int size) +{ + switch (size) { + case 4: + return __cmpxchg_u32(ptr, old, new); +#if 0 /* we don't have __cmpxchg_u64 */ + case 8: + return __cmpxchg_u64(ptr, old, new); +#endif /* 0 */ + } + __cmpxchg_called_with_bad_pointer(); + return old; +} + +#define cmpxchg(ptr,o,n) \ + ({ \ + __typeof__(*(ptr)) _o_ = (o); \ + __typeof__(*(ptr)) _n_ = (n); \ + (__typeof__(*(ptr))) __cmpxchg((ptr), (unsigned long)_o_, \ + (unsigned long)_n_, sizeof(*(ptr))); \ + }) + +#endif /* __KERNEL__ */ + /* * Memory barrier. * diff --git a/include/asm-m32r/thread_info.h b/include/asm-m32r/thread_info.h index 7a6be7727a92..0f589363f619 100644 --- a/include/asm-m32r/thread_info.h +++ b/include/asm-m32r/thread_info.h @@ -95,7 +95,7 @@ static inline struct thread_info *current_thread_info(void) } /* thread information allocation */ -#if CONFIG_DEBUG_STACK_USAGE +#ifdef CONFIG_DEBUG_STACK_USAGE #define alloc_thread_info(tsk) \ ({ \ struct thread_info *ret; \ diff --git a/include/asm-m32r/uaccess.h b/include/asm-m32r/uaccess.h index 93d863c455a1..0da7c47d2f01 100644 --- a/include/asm-m32r/uaccess.h +++ b/include/asm-m32r/uaccess.h @@ -208,7 +208,8 @@ extern void __get_user_4(void); * On error, the variable @x is set to zero. */ #define get_user(x,ptr) \ -({ int __ret_gu,__val_gu; \ +({ int __ret_gu; \ + unsigned long __val_gu; \ __chk_user_ptr(ptr); \ switch(sizeof (*(ptr))) { \ case 1: __get_user_x(1,__ret_gu,__val_gu,ptr); break; \ @@ -403,7 +404,8 @@ struct __large_struct { unsigned long buf[100]; }; #define __get_user_nocheck(x,ptr,size) \ ({ \ - long __gu_err, __gu_val; \ + long __gu_err; \ + unsigned long __gu_val; \ __get_user_size(__gu_val,(ptr),(size),__gu_err); \ (x) = (__typeof__(*(ptr)))__gu_val; \ __gu_err; \ @@ -594,8 +596,8 @@ static inline unsigned long __generic_copy_to_user_nocheck(void __user *to, return n; } -unsigned long __generic_copy_to_user(void *, const void *, unsigned long); -unsigned long __generic_copy_from_user(void *, const void *, unsigned long); +unsigned long __generic_copy_to_user(void __user *, const void *, unsigned long); +unsigned long __generic_copy_from_user(void *, const void __user *, unsigned long); /** * __copy_to_user: - Copy a block of data into user space, with less checking. diff --git a/include/asm-m32r/unistd.h b/include/asm-m32r/unistd.h index 8552d8f45ab1..ac399e1f7bc0 100644 --- a/include/asm-m32r/unistd.h +++ b/include/asm-m32r/unistd.h @@ -452,7 +452,6 @@ asmlinkage int sys_clone(struct pt_regs regs); asmlinkage int sys_fork(struct pt_regs regs); asmlinkage int sys_vfork(struct pt_regs regs); asmlinkage int sys_pipe(unsigned long __user *fildes); -asmlinkage int sys_ptrace(long request, long pid, long addr, long data); struct sigaction; asmlinkage long sys_rt_sigaction(int sig, const struct sigaction __user *act, diff --git a/include/asm-m68k/atomic.h b/include/asm-m68k/atomic.h index 38f3043e7fe1..e3c962eeabf3 100644 --- a/include/asm-m68k/atomic.h +++ b/include/asm-m68k/atomic.h @@ -139,6 +139,18 @@ static inline void atomic_set_mask(unsigned long mask, unsigned long *v) __asm__ __volatile__("orl %1,%0" : "+m" (*v) : "id" (mask)); } +#define atomic_cmpxchg(v, o, n) ((int)cmpxchg(&((v)->counter), (o), (n))) + +#define atomic_add_unless(v, a, u) \ +({ \ + int c, old; \ + c = atomic_read(v); \ + while (c != (u) && (old = atomic_cmpxchg((v), c, c + (a))) != c) \ + c = old; \ + c != (u); \ +}) +#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0) + /* Atomic operations are already serializing */ #define smp_mb__before_atomic_dec() barrier() #define smp_mb__after_atomic_dec() barrier() diff --git a/include/asm-m68k/kbio.h b/include/asm-m68k/kbio.h deleted file mode 100644 index e1fbf8fba3e8..000000000000 --- a/include/asm-m68k/kbio.h +++ /dev/null @@ -1 +0,0 @@ -#include <asm-sparc/kbio.h> diff --git a/include/asm-m68k/processor.h b/include/asm-m68k/processor.h index df1575db32af..7982285e84ed 100644 --- a/include/asm-m68k/processor.h +++ b/include/asm-m68k/processor.h @@ -14,6 +14,7 @@ #define current_text_addr() ({ __label__ _l; _l: &&_l;}) #include <linux/config.h> +#include <linux/thread_info.h> #include <asm/segment.h> #include <asm/fpu.h> #include <asm/ptrace.h> @@ -55,17 +56,6 @@ static inline void wrusp(unsigned long usp) #endif #define TASK_UNMAPPED_ALIGN(addr, off) PAGE_ALIGN(addr) -struct task_work { - unsigned char sigpending; - unsigned char notify_resume; /* request for notification on - userspace execution resumption */ - char need_resched; - unsigned char delayed_trace; /* single step a syscall */ - unsigned char syscall_trace; /* count of syscall interceptors */ - unsigned char memdie; /* task was selected to be killed */ - unsigned char pad[2]; -}; - struct thread_struct { unsigned long ksp; /* kernel stack pointer */ unsigned long usp; /* user stack pointer */ @@ -78,7 +68,7 @@ struct thread_struct { unsigned long fp[8*3]; unsigned long fpcntl[3]; /* fp control regs */ unsigned char fpstate[FPSTATESIZE]; /* floating point state */ - struct task_work work; + struct thread_info info; }; #define INIT_THREAD { \ diff --git a/include/asm-m68k/semaphore.h b/include/asm-m68k/semaphore.h index ab94cf3ed447..fd4c7cc3d3be 100644 --- a/include/asm-m68k/semaphore.h +++ b/include/asm-m68k/semaphore.h @@ -36,9 +36,6 @@ struct semaphore { .wait = __WAIT_QUEUE_HEAD_INITIALIZER((name).wait) \ } -#define __MUTEX_INITIALIZER(name) \ - __SEMAPHORE_INITIALIZER(name,1) - #define __DECLARE_SEMAPHORE_GENERIC(name,count) \ struct semaphore name = __SEMAPHORE_INITIALIZER(name,count) diff --git a/include/asm-m68k/sun3xflop.h b/include/asm-m68k/sun3xflop.h index 1ed3b787ee05..fda1eccf10aa 100644 --- a/include/asm-m68k/sun3xflop.h +++ b/include/asm-m68k/sun3xflop.h @@ -27,10 +27,8 @@ /* We don't need no stinkin' I/O port allocation crap. */ #undef release_region -#undef check_region #undef request_region #define release_region(X, Y) do { } while(0) -#define check_region(X, Y) (0) #define request_region(X, Y, Z) (1) struct sun3xflop_private { diff --git a/include/asm-m68k/thread_info.h b/include/asm-m68k/thread_info.h index 2aed24f6fd2e..9532ca3c45cb 100644 --- a/include/asm-m68k/thread_info.h +++ b/include/asm-m68k/thread_info.h @@ -2,17 +2,15 @@ #define _ASM_M68K_THREAD_INFO_H #include <asm/types.h> -#include <asm/processor.h> #include <asm/page.h> struct thread_info { struct task_struct *task; /* main task structure */ + unsigned long flags; struct exec_domain *exec_domain; /* execution domain */ int preempt_count; /* 0 => preemptable, <0 => BUG */ __u32 cpu; /* should always be 0 on m68k */ struct restart_block restart_block; - - __u8 supervisor_stack[0]; }; #define PREEMPT_ACTIVE 0x4000000 @@ -35,84 +33,29 @@ struct thread_info { #define free_thread_info(ti) free_pages((unsigned long)(ti),1) #endif /* PAGE_SHIFT == 13 */ -//#define init_thread_info (init_task.thread.info) +#define init_thread_info (init_task.thread.info) #define init_stack (init_thread_union.stack) -#define current_thread_info() (current->thread_info) - +#define task_thread_info(tsk) (&(tsk)->thread.info) +#define current_thread_info() task_thread_info(current) #define __HAVE_THREAD_FUNCTIONS -#define TIF_SYSCALL_TRACE 0 /* syscall trace active */ -#define TIF_DELAYED_TRACE 1 /* single step a syscall */ -#define TIF_NOTIFY_RESUME 2 /* resumption notification requested */ -#define TIF_SIGPENDING 3 /* signal pending */ -#define TIF_NEED_RESCHED 4 /* rescheduling necessary */ -#define TIF_MEMDIE 5 - -extern int thread_flag_fixme(void); - -/* - * flag set/clear/test wrappers - * - pass TIF_xxxx constants to these functions - */ - -#define __set_tsk_thread_flag(tsk, flag, val) ({ \ - switch (flag) { \ - case TIF_SIGPENDING: \ - tsk->thread.work.sigpending = val; \ - break; \ - case TIF_NEED_RESCHED: \ - tsk->thread.work.need_resched = val; \ - break; \ - case TIF_SYSCALL_TRACE: \ - tsk->thread.work.syscall_trace = val; \ - break; \ - case TIF_MEMDIE: \ - tsk->thread.work.memdie = val; \ - break; \ - default: \ - thread_flag_fixme(); \ - } \ +#define setup_thread_stack(p, org) ({ \ + *(struct task_struct **)(p)->thread_info = (p); \ + task_thread_info(p)->task = (p); \ }) -#define __get_tsk_thread_flag(tsk, flag) ({ \ - int ___res; \ - switch (flag) { \ - case TIF_SIGPENDING: \ - ___res = tsk->thread.work.sigpending; \ - break; \ - case TIF_NEED_RESCHED: \ - ___res = tsk->thread.work.need_resched; \ - break; \ - case TIF_SYSCALL_TRACE: \ - ___res = tsk->thread.work.syscall_trace;\ - break; \ - case TIF_MEMDIE: \ - ___res = tsk->thread.work.memdie;\ - break; \ - default: \ - ___res = thread_flag_fixme(); \ - } \ - ___res; \ -}) - -#define __get_set_tsk_thread_flag(tsk, flag, val) ({ \ - int __res = __get_tsk_thread_flag(tsk, flag); \ - __set_tsk_thread_flag(tsk, flag, val); \ - __res; \ -}) +#define end_of_stack(p) ((unsigned long *)(p)->thread_info + 1) -#define set_tsk_thread_flag(tsk, flag) __set_tsk_thread_flag(tsk, flag, ~0) -#define clear_tsk_thread_flag(tsk, flag) __set_tsk_thread_flag(tsk, flag, 0) -#define test_and_set_tsk_thread_flag(tsk, flag) __get_set_tsk_thread_flag(tsk, flag, ~0) -#define test_tsk_thread_flag(tsk, flag) __get_tsk_thread_flag(tsk, flag) - -#define set_thread_flag(flag) set_tsk_thread_flag(current, flag) -#define clear_thread_flag(flag) clear_tsk_thread_flag(current, flag) -#define test_thread_flag(flag) test_tsk_thread_flag(current, flag) - -#define set_need_resched() set_thread_flag(TIF_NEED_RESCHED) -#define clear_need_resched() clear_thread_flag(TIF_NEED_RESCHED) +/* entry.S relies on these definitions! + * bits 0-7 are tested at every exception exit + * bits 8-15 are also tested at syscall exit + */ +#define TIF_SIGPENDING 6 /* signal pending */ +#define TIF_NEED_RESCHED 7 /* rescheduling necessary */ +#define TIF_DELAYED_TRACE 14 /* single step a syscall */ +#define TIF_SYSCALL_TRACE 15 /* syscall trace active */ +#define TIF_MEMDIE 16 #endif /* _ASM_M68K_THREAD_INFO_H */ diff --git a/include/asm-m68k/unistd.h b/include/asm-m68k/unistd.h index cbabde4f8a45..c2554bcd1747 100644 --- a/include/asm-m68k/unistd.h +++ b/include/asm-m68k/unistd.h @@ -444,7 +444,6 @@ asmlinkage long sys_mmap2( unsigned long fd, unsigned long pgoff); asmlinkage int sys_execve(char *name, char **argv, char **envp); asmlinkage int sys_pipe(unsigned long *fildes); -asmlinkage int sys_ptrace(long request, long pid, long addr, long data); struct pt_regs; struct sigaction; asmlinkage long sys_rt_sigaction(int sig, diff --git a/include/asm-m68k/vuid_event.h b/include/asm-m68k/vuid_event.h deleted file mode 100644 index 52ecb521a395..000000000000 --- a/include/asm-m68k/vuid_event.h +++ /dev/null @@ -1,4 +0,0 @@ -#ifndef _M68K_VUID_EVENT_H -#define _M68K_VUID_EVENT_H -#include <asm-sparc/vuid_event.h> -#endif diff --git a/include/asm-m68knommu/anchor.h b/include/asm-m68knommu/anchor.h index 75390e0b40c9..871c0d5cfc3d 100644 --- a/include/asm-m68knommu/anchor.h +++ b/include/asm-m68knommu/anchor.h @@ -14,7 +14,7 @@ /* * Define basic addressing info. */ -#if defined(CONFIG_MOTOROLA) && defined(CONFIG_M5407) +#if defined(CONFIG_M5407C3) #define COMEM_BASE 0xFFFF0000 /* Base of CO-MEM address space */ #define COMEM_IRQ 25 /* IRQ of anchor part */ #else @@ -96,7 +96,7 @@ * The PCI bus will be limited in what slots will actually be used. * Define valid device numbers for different boards. */ -#if defined(CONFIG_MOTOROLA) && defined(CONFIG_M5407) +#if defined(CONFIG_M5407C3) #define COMEM_MINDEV 14 /* Minimum valid DEVICE */ #define COMEM_MAXDEV 14 /* Maximum valid DEVICE */ #define COMEM_BRIDGEDEV 15 /* Slot bridge is in */ diff --git a/include/asm-m68knommu/asm-offsets.h b/include/asm-m68knommu/asm-offsets.h deleted file mode 100644 index 825f6e210f19..000000000000 --- a/include/asm-m68knommu/asm-offsets.h +++ /dev/null @@ -1,49 +0,0 @@ -#ifndef __ASM_OFFSETS_H__ -#define __ASM_OFFSETS_H__ -/* - * DO NOT MODIFY. - * - * This file was generated by arch/m68knommu/Makefile - * - */ - -#define TASK_STATE 0 /* offsetof(struct task_struct, state) */ -#define TASK_FLAGS 12 /* offsetof(struct task_struct, flags) */ -#define TASK_PTRACE 16 /* offsetof(struct task_struct, ptrace) */ -#define TASK_BLOCKED 922 /* offsetof(struct task_struct, blocked) */ -#define TASK_THREAD 772 /* offsetof(struct task_struct, thread) */ -#define TASK_THREAD_INFO 4 /* offsetof(struct task_struct, thread_info) */ -#define TASK_MM 92 /* offsetof(struct task_struct, mm) */ -#define TASK_ACTIVE_MM 96 /* offsetof(struct task_struct, active_mm) */ -#define CPUSTAT_SOFTIRQ_PENDING 0 /* offsetof(irq_cpustat_t, __softirq_pending) */ -#define THREAD_KSP 0 /* offsetof(struct thread_struct, ksp) */ -#define THREAD_USP 4 /* offsetof(struct thread_struct, usp) */ -#define THREAD_SR 8 /* offsetof(struct thread_struct, sr) */ -#define THREAD_FS 10 /* offsetof(struct thread_struct, fs) */ -#define THREAD_CRP 12 /* offsetof(struct thread_struct, crp) */ -#define THREAD_ESP0 20 /* offsetof(struct thread_struct, esp0) */ -#define THREAD_FPREG 24 /* offsetof(struct thread_struct, fp) */ -#define THREAD_FPCNTL 120 /* offsetof(struct thread_struct, fpcntl) */ -#define THREAD_FPSTATE 132 /* offsetof(struct thread_struct, fpstate) */ -#define PT_D0 32 /* offsetof(struct pt_regs, d0) */ -#define PT_ORIG_D0 36 /* offsetof(struct pt_regs, orig_d0) */ -#define PT_D1 0 /* offsetof(struct pt_regs, d1) */ -#define PT_D2 4 /* offsetof(struct pt_regs, d2) */ -#define PT_D3 8 /* offsetof(struct pt_regs, d3) */ -#define PT_D4 12 /* offsetof(struct pt_regs, d4) */ -#define PT_D5 16 /* offsetof(struct pt_regs, d5) */ -#define PT_A0 20 /* offsetof(struct pt_regs, a0) */ -#define PT_A1 24 /* offsetof(struct pt_regs, a1) */ -#define PT_A2 28 /* offsetof(struct pt_regs, a2) */ -#define PT_PC 48 /* offsetof(struct pt_regs, pc) */ -#define PT_SR 46 /* offsetof(struct pt_regs, sr) */ -#define PT_VECTOR 52 /* offsetof(struct pt_regs, pc) + 4 */ -#define STAT_IRQ 5140 /* offsetof(struct kernel_stat, irqs) */ -#define SIGSEGV 11 /* SIGSEGV */ -#define SEGV_MAPERR 196609 /* SEGV_MAPERR */ -#define SIGTRAP 5 /* SIGTRAP */ -#define TRAP_TRACE 196610 /* TRAP_TRACE */ -#define PT_PTRACED 1 /* PT_PTRACED */ -#define PT_DTRACE 2 /* PT_DTRACE */ - -#endif diff --git a/include/asm-m68knommu/atomic.h b/include/asm-m68knommu/atomic.h index b1957fba083b..3c1cc153c415 100644 --- a/include/asm-m68knommu/atomic.h +++ b/include/asm-m68knommu/atomic.h @@ -100,7 +100,7 @@ static __inline__ void atomic_set_mask(unsigned long mask, unsigned long *v) #define smp_mb__before_atomic_inc() barrier() #define smp_mb__after_atomic_inc() barrier() -extern __inline__ int atomic_add_return(int i, atomic_t * v) +static inline int atomic_add_return(int i, atomic_t * v) { unsigned long temp, flags; @@ -115,7 +115,7 @@ extern __inline__ int atomic_add_return(int i, atomic_t * v) #define atomic_add_negative(a, v) (atomic_add_return((a), (v)) < 0) -extern __inline__ int atomic_sub_return(int i, atomic_t * v) +static inline int atomic_sub_return(int i, atomic_t * v) { unsigned long temp, flags; @@ -128,6 +128,18 @@ extern __inline__ int atomic_sub_return(int i, atomic_t * v) return temp; } +#define atomic_cmpxchg(v, o, n) ((int)cmpxchg(&((v)->counter), (o), (n))) + +#define atomic_add_unless(v, a, u) \ +({ \ + int c, old; \ + c = atomic_read(v); \ + while (c != (u) && (old = atomic_cmpxchg((v), c, c + (a))) != c) \ + c = old; \ + c != (u); \ +}) +#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0) + #define atomic_dec_return(v) atomic_sub_return(1,(v)) #define atomic_inc_return(v) atomic_add_return(1,(v)) diff --git a/include/asm-m68knommu/cacheflush.h b/include/asm-m68knommu/cacheflush.h index 026bbc9565b4..49925e91e89c 100644 --- a/include/asm-m68knommu/cacheflush.h +++ b/include/asm-m68knommu/cacheflush.h @@ -25,7 +25,7 @@ #define copy_from_user_page(vma, page, vaddr, dst, src, len) \ memcpy(dst, src, len) -extern inline void __flush_cache_all(void) +static inline void __flush_cache_all(void) { #ifdef CONFIG_M5407 /* @@ -64,7 +64,7 @@ extern inline void __flush_cache_all(void) "nop\n\t" : : : "d0" ); #endif /* CONFIG_M5272 */ -#if CONFIG_M5249 +#ifdef CONFIG_M5249 __asm__ __volatile__ ( "movel #0xa1000200, %%d0\n\t" "movec %%d0, %%CACR\n\t" diff --git a/include/asm-m68knommu/coldfire.h b/include/asm-m68knommu/coldfire.h index 1df3f666a28e..6190f77b1e6c 100644 --- a/include/asm-m68knommu/coldfire.h +++ b/include/asm-m68knommu/coldfire.h @@ -20,9 +20,14 @@ */ #define MCF_MBAR 0x10000000 #define MCF_MBAR2 0x80000000 +#if defined(CONFIG_M520x) +#define MCF_IPSBAR 0xFC000000 +#else #define MCF_IPSBAR 0x40000000 +#endif -#if defined(CONFIG_M523x) || defined(CONFIG_M527x) || defined(CONFIG_M528x) +#if defined(CONFIG_M523x) || defined(CONFIG_M527x) || defined(CONFIG_M528x) || \ + defined(CONFIG_M520x) #undef MCF_MBAR #define MCF_MBAR MCF_IPSBAR #endif @@ -78,7 +83,8 @@ * One some ColdFire family members the bus clock (used by internal * peripherals) is not the same as the CPU clock. */ -#if defined(CONFIG_M523x) || defined(CONFIG_M5249) || defined(CONFIG_M527x) +#if defined(CONFIG_M523x) || defined(CONFIG_M5249) || defined(CONFIG_M527x) || \ + defined(CONFIG_M520x) #define MCF_BUSCLK (MCF_CLK / 2) #else #define MCF_BUSCLK MCF_CLK diff --git a/include/asm-m68knommu/delay.h b/include/asm-m68knommu/delay.h index e3a976254672..04a20fd051cf 100644 --- a/include/asm-m68knommu/delay.h +++ b/include/asm-m68knommu/delay.h @@ -8,7 +8,7 @@ #include <asm/param.h> -extern __inline__ void __delay(unsigned long loops) +static inline void __delay(unsigned long loops) { #if defined(CONFIG_COLDFIRE) /* The coldfire runs this loop at significantly different speeds @@ -48,7 +48,7 @@ extern __inline__ void __delay(unsigned long loops) extern unsigned long loops_per_jiffy; -extern __inline__ void _udelay(unsigned long usecs) +static inline void _udelay(unsigned long usecs) { #if defined(CONFIG_M68328) || defined(CONFIG_M68EZ328) || \ defined(CONFIG_M68VZ328) || defined(CONFIG_M68360) || \ diff --git a/include/asm-m68knommu/ide.h b/include/asm-m68knommu/ide.h deleted file mode 100644 index b1cbf8bb9232..000000000000 --- a/include/asm-m68knommu/ide.h +++ /dev/null @@ -1,444 +0,0 @@ -/****************************************************************************/ -/* - * linux/include/asm-m68knommu/ide.h - * - * Copyright (C) 1994-1996 Linus Torvalds & authors - * Copyright (C) 2001 Lineo Inc., davidm@uclinux.org - */ -/****************************************************************************/ -#ifndef _M68KNOMMU_IDE_H -#define _M68KNOMMU_IDE_H - -#ifdef __KERNEL__ -/****************************************************************************/ - -#include <linux/config.h> -#include <linux/interrupt.h> - -#include <asm/setup.h> -#include <asm/io.h> -#include <asm/irq.h> - -/****************************************************************************/ -/* - * some coldfire specifics - */ - -#ifdef CONFIG_COLDFIRE -#include <asm/coldfire.h> -#include <asm/mcfsim.h> - -/* - * Save some space, only have 1 interface - */ -#define MAX_HWIFS 1 /* we only have one interface for now */ - -#ifdef CONFIG_SECUREEDGEMP3 -#define MCFSIM_LOCALCS MCFSIM_CSCR4 -#else -#define MCFSIM_LOCALCS MCFSIM_CSCR6 -#endif - -#endif /* CONFIG_COLDFIRE */ - -/****************************************************************************/ -/* - * Fix up things that may not have been provided - */ - -#ifndef MAX_HWIFS -#define MAX_HWIFS 4 /* same as the other archs */ -#endif - -#undef SUPPORT_SLOW_DATA_PORTS -#define SUPPORT_SLOW_DATA_PORTS 0 - -#undef SUPPORT_VLB_SYNC -#define SUPPORT_VLB_SYNC 0 - -/* this definition is used only on startup .. */ -#undef HD_DATA -#define HD_DATA NULL - -#define DBGIDE(fmt,a...) -// #define DBGIDE(fmt,a...) printk(fmt, ##a) -#define IDE_INLINE __inline__ -// #define IDE_INLINE - -/****************************************************************************/ - -typedef union { - unsigned all : 8; /* all of the bits together */ - struct { - unsigned bit7 : 1; /* always 1 */ - unsigned lba : 1; /* using LBA instead of CHS */ - unsigned bit5 : 1; /* always 1 */ - unsigned unit : 1; /* drive select number, 0 or 1 */ - unsigned head : 4; /* always zeros here */ - } b; -} select_t; - -/* - * our list of ports/irq's for different boards - */ - -static struct m68k_ide_defaults { - ide_ioreg_t base; - int irq; -} m68k_ide_defaults[MAX_HWIFS] = { -#if defined(CONFIG_SECUREEDGEMP3) - { ((ide_ioreg_t)0x30800000), 29 }, -#elif defined(CONFIG_eLIA) - { ((ide_ioreg_t)0x30c00000), 29 }, -#else - { ((ide_ioreg_t)0x0), 0 } -#endif -}; - -/****************************************************************************/ - -static IDE_INLINE int ide_default_irq(ide_ioreg_t base) -{ - int i; - - for (i = 0; i < MAX_HWIFS; i++) - if (m68k_ide_defaults[i].base == base) - return(m68k_ide_defaults[i].irq); - return 0; -} - -static IDE_INLINE ide_ioreg_t ide_default_io_base(int index) -{ - if (index >= 0 && index < MAX_HWIFS) - return(m68k_ide_defaults[index].base); - return 0; -} - - -/* - * Set up a hw structure for a specified data port, control port and IRQ. - * This should follow whatever the default interface uses. - */ -static IDE_INLINE void ide_init_hwif_ports( - hw_regs_t *hw, - ide_ioreg_t data_port, - ide_ioreg_t ctrl_port, - int *irq) -{ - ide_ioreg_t reg = data_port; - int i; - - for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++) { - hw->io_ports[i] = reg; - reg += 1; - } - if (ctrl_port) { - hw->io_ports[IDE_CONTROL_OFFSET] = ctrl_port; - } else { - hw->io_ports[IDE_CONTROL_OFFSET] = data_port + 0xe; - } -} - -#define ide_init_default_irq(base) ide_default_irq(base) - -static IDE_INLINE int -ide_request_irq( - unsigned int irq, - void (*handler)(int, void *, struct pt_regs *), - unsigned long flags, - const char *device, - void *dev_id) -{ -#ifdef CONFIG_COLDFIRE - mcf_autovector(irq); -#endif - return(request_irq(irq, handler, flags, device, dev_id)); -} - - -static IDE_INLINE void -ide_free_irq(unsigned int irq, void *dev_id) -{ - free_irq(irq, dev_id); -} - - -static IDE_INLINE int -ide_check_region(ide_ioreg_t from, unsigned int extent) -{ - return 0; -} - - -static IDE_INLINE void -ide_request_region(ide_ioreg_t from, unsigned int extent, const char *name) -{ -} - - -static IDE_INLINE void -ide_release_region(ide_ioreg_t from, unsigned int extent) -{ -} - - -static IDE_INLINE void -ide_fix_driveid(struct hd_driveid *id) -{ -#ifdef CONFIG_COLDFIRE - int i, n; - unsigned short *wp = (unsigned short *) id; - int avoid[] = {49, 51, 52, 59, -1 }; /* do not swap these words */ - - /* Need to byte swap shorts, but not char fields */ - for (i = n = 0; i < sizeof(*id) / sizeof(*wp); i++, wp++) { - if (avoid[n] == i) { - n++; - continue; - } - *wp = ((*wp & 0xff) << 8) | ((*wp >> 8) & 0xff); - } - /* have to word swap the one 32 bit field */ - id->lba_capacity = ((id->lba_capacity & 0xffff) << 16) | - ((id->lba_capacity >> 16) & 0xffff); -#endif -} - - -static IDE_INLINE void -ide_release_lock (int *ide_lock) -{ -} - - -static IDE_INLINE void -ide_get_lock( - int *ide_lock, - void (*handler)(int, void *, struct pt_regs *), - void *data) -{ -} - - -#define ide_ack_intr(hwif) \ - ((hwif)->hw.ack_intr ? (hwif)->hw.ack_intr(hwif) : 1) -#define ide__sti() __sti() - -/****************************************************************************/ -/* - * System specific IO requirements - */ - -#ifdef CONFIG_COLDFIRE - -#ifdef CONFIG_SECUREEDGEMP3 - -/* Replace standard IO functions for funky mapping of MP3 board */ -#undef outb -#undef outb_p -#undef inb -#undef inb_p - -#define outb(v, a) ide_outb(v, (unsigned long) (a)) -#define outb_p(v, a) ide_outb(v, (unsigned long) (a)) -#define inb(a) ide_inb((unsigned long) (a)) -#define inb_p(a) ide_inb((unsigned long) (a)) - -#define ADDR8_PTR(addr) (((addr) & 0x1) ? (0x8000 + (addr) - 1) : (addr)) -#define ADDR16_PTR(addr) (addr) -#define ADDR32_PTR(addr) (addr) -#define SWAP8(w) ((((w) & 0xffff) << 8) | (((w) & 0xffff) >> 8)) -#define SWAP16(w) (w) -#define SWAP32(w) (w) - - -static IDE_INLINE void -ide_outb(unsigned int val, unsigned int addr) -{ - volatile unsigned short *rp; - - DBGIDE("%s(val=%x,addr=%x)\n", __FUNCTION__, val, addr); - rp = (volatile unsigned short *) ADDR8_PTR(addr); - *rp = SWAP8(val); -} - - -static IDE_INLINE int -ide_inb(unsigned int addr) -{ - volatile unsigned short *rp, val; - - DBGIDE("%s(addr=%x)\n", __FUNCTION__, addr); - rp = (volatile unsigned short *) ADDR8_PTR(addr); - val = *rp; - return(SWAP8(val)); -} - - -static IDE_INLINE void -ide_outw(unsigned int val, unsigned int addr) -{ - volatile unsigned short *rp; - - DBGIDE("%s(val=%x,addr=%x)\n", __FUNCTION__, val, addr); - rp = (volatile unsigned short *) ADDR16_PTR(addr); - *rp = SWAP16(val); -} - -static IDE_INLINE void -ide_outsw(unsigned int addr, const void *vbuf, unsigned long len) -{ - volatile unsigned short *rp, val; - unsigned short *buf; - - DBGIDE("%s(addr=%x,vbuf=%p,len=%x)\n", __FUNCTION__, addr, vbuf, len); - buf = (unsigned short *) vbuf; - rp = (volatile unsigned short *) ADDR16_PTR(addr); - for (; (len > 0); len--) { - val = *buf++; - *rp = SWAP16(val); - } -} - -static IDE_INLINE int -ide_inw(unsigned int addr) -{ - volatile unsigned short *rp, val; - - DBGIDE("%s(addr=%x)\n", __FUNCTION__, addr); - rp = (volatile unsigned short *) ADDR16_PTR(addr); - val = *rp; - return(SWAP16(val)); -} - -static IDE_INLINE void -ide_insw(unsigned int addr, void *vbuf, unsigned long len) -{ - volatile unsigned short *rp; - unsigned short w, *buf; - - DBGIDE("%s(addr=%x,vbuf=%p,len=%x)\n", __FUNCTION__, addr, vbuf, len); - buf = (unsigned short *) vbuf; - rp = (volatile unsigned short *) ADDR16_PTR(addr); - for (; (len > 0); len--) { - w = *rp; - *buf++ = SWAP16(w); - } -} - -static IDE_INLINE void -ide_insl(unsigned int addr, void *vbuf, unsigned long len) -{ - volatile unsigned long *rp; - unsigned long w, *buf; - - DBGIDE("%s(addr=%x,vbuf=%p,len=%x)\n", __FUNCTION__, addr, vbuf, len); - buf = (unsigned long *) vbuf; - rp = (volatile unsigned long *) ADDR32_PTR(addr); - for (; (len > 0); len--) { - w = *rp; - *buf++ = SWAP32(w); - } -} - -static IDE_INLINE void -ide_outsl(unsigned int addr, const void *vbuf, unsigned long len) -{ - volatile unsigned long *rp, val; - unsigned long *buf; - - DBGIDE("%s(addr=%x,vbuf=%p,len=%x)\n", __FUNCTION__, addr, vbuf, len); - buf = (unsigned long *) vbuf; - rp = (volatile unsigned long *) ADDR32_PTR(addr); - for (; (len > 0); len--) { - val = *buf++; - *rp = SWAP32(val); - } -} - -#elif CONFIG_eLIA - -/* 8/16 bit acesses are controlled by flicking bits in the CS register */ -#define ACCESS_MODE_16BIT() \ - *((volatile unsigned short *) (MCF_MBAR + MCFSIM_LOCALCS)) = 0x0080 -#define ACCESS_MODE_8BIT() \ - *((volatile unsigned short *) (MCF_MBAR + MCFSIM_LOCALCS)) = 0x0040 - - -static IDE_INLINE void -ide_outw(unsigned int val, unsigned int addr) -{ - ACCESS_MODE_16BIT(); - outw(val, addr); - ACCESS_MODE_8BIT(); -} - -static IDE_INLINE void -ide_outsw(unsigned int addr, const void *vbuf, unsigned long len) -{ - ACCESS_MODE_16BIT(); - outsw(addr, vbuf, len); - ACCESS_MODE_8BIT(); -} - -static IDE_INLINE int -ide_inw(unsigned int addr) -{ - int ret; - - ACCESS_MODE_16BIT(); - ret = inw(addr); - ACCESS_MODE_8BIT(); - return(ret); -} - -static IDE_INLINE void -ide_insw(unsigned int addr, void *vbuf, unsigned long len) -{ - ACCESS_MODE_16BIT(); - insw(addr, vbuf, len); - ACCESS_MODE_8BIT(); -} - -static IDE_INLINE void -ide_insl(unsigned int addr, void *vbuf, unsigned long len) -{ - ACCESS_MODE_16BIT(); - insl(addr, vbuf, len); - ACCESS_MODE_8BIT(); -} - -static IDE_INLINE void -ide_outsl(unsigned int addr, const void *vbuf, unsigned long len) -{ - ACCESS_MODE_16BIT(); - outsl(addr, vbuf, len); - ACCESS_MODE_8BIT(); -} - -#endif /* CONFIG_SECUREEDGEMP3 */ - -#undef outw -#undef outw_p -#undef outsw -#undef inw -#undef inw_p -#undef insw -#undef insl -#undef outsl - -#define outw(v, a) ide_outw(v, (unsigned long) (a)) -#define outw_p(v, a) ide_outw(v, (unsigned long) (a)) -#define outsw(a, b, n) ide_outsw((unsigned long) (a), b, n) -#define inw(a) ide_inw((unsigned long) (a)) -#define inw_p(a) ide_inw((unsigned long) (a)) -#define insw(a, b, n) ide_insw((unsigned long) (a), b, n) -#define insl(a, b, n) ide_insl((unsigned long) (a), b, n) -#define outsl(a, b, n) ide_outsl((unsigned long) (a), b, n) - -#endif CONFIG_COLDFIRE - -/****************************************************************************/ -#endif /* __KERNEL__ */ -#endif /* _M68KNOMMU_IDE_H */ -/****************************************************************************/ diff --git a/include/asm-m68knommu/io.h b/include/asm-m68knommu/io.h index 30fade4149b8..e08f2ee4b4a2 100644 --- a/include/asm-m68knommu/io.h +++ b/include/asm-m68knommu/io.h @@ -147,19 +147,19 @@ static inline void io_insl(unsigned int addr, void *buf, int len) extern void *__ioremap(unsigned long physaddr, unsigned long size, int cacheflag); extern void __iounmap(void *addr, unsigned long size); -extern inline void *ioremap(unsigned long physaddr, unsigned long size) +static inline void *ioremap(unsigned long physaddr, unsigned long size) { return __ioremap(physaddr, size, IOMAP_NOCACHE_SER); } -extern inline void *ioremap_nocache(unsigned long physaddr, unsigned long size) +static inline void *ioremap_nocache(unsigned long physaddr, unsigned long size) { return __ioremap(physaddr, size, IOMAP_NOCACHE_SER); } -extern inline void *ioremap_writethrough(unsigned long physaddr, unsigned long size) +static inline void *ioremap_writethrough(unsigned long physaddr, unsigned long size) { return __ioremap(physaddr, size, IOMAP_WRITETHROUGH); } -extern inline void *ioremap_fullcache(unsigned long physaddr, unsigned long size) +static inline void *ioremap_fullcache(unsigned long physaddr, unsigned long size) { return __ioremap(physaddr, size, IOMAP_FULL_CACHING); } diff --git a/include/asm-m68knommu/irq.h b/include/asm-m68knommu/irq.h index 208ccd969e4b..a08fa9b958da 100644 --- a/include/asm-m68knommu/irq.h +++ b/include/asm-m68knommu/irq.h @@ -2,7 +2,6 @@ #define _M68K_IRQ_H_ #include <linux/config.h> -#include <linux/interrupt.h> #include <asm/ptrace.h> #ifdef CONFIG_COLDFIRE @@ -83,36 +82,6 @@ extern void (*mach_disable_irq)(unsigned int); #endif /* CONFIG_M68360 */ /* - * This structure is used to chain together the ISRs for a particular - * interrupt source (if it supports chaining). - */ -typedef struct irq_node { - irqreturn_t (*handler)(int, void *, struct pt_regs *); - unsigned long flags; - void *dev_id; - const char *devname; - struct irq_node *next; -} irq_node_t; - -/* - * This structure has only 4 elements for speed reasons - */ -typedef struct irq_handler { - irqreturn_t (*handler)(int, void *, struct pt_regs *); - unsigned long flags; - void *dev_id; - const char *devname; -} irq_handler_t; - -/* count of spurious interrupts */ -extern volatile unsigned int num_spurious; - -/* - * This function returns a new irq_node_t - */ -extern irq_node_t *new_irq_node(void); - -/* * Some drivers want these entry points */ #define enable_irq(x) (mach_enable_irq ? (*mach_enable_irq)(x) : 0) diff --git a/include/asm-m68knommu/irqnode.h b/include/asm-m68knommu/irqnode.h new file mode 100644 index 000000000000..a2503dfc554c --- /dev/null +++ b/include/asm-m68knommu/irqnode.h @@ -0,0 +1,36 @@ +#ifndef _M68K_IRQNODE_H_ +#define _M68K_IRQNODE_H_ + +#include <linux/interrupt.h> + +/* + * This structure is used to chain together the ISRs for a particular + * interrupt source (if it supports chaining). + */ +typedef struct irq_node { + irqreturn_t (*handler)(int, void *, struct pt_regs *); + unsigned long flags; + void *dev_id; + const char *devname; + struct irq_node *next; +} irq_node_t; + +/* + * This structure has only 4 elements for speed reasons + */ +typedef struct irq_handler { + irqreturn_t (*handler)(int, void *, struct pt_regs *); + unsigned long flags; + void *dev_id; + const char *devname; +} irq_handler_t; + +/* count of spurious interrupts */ +extern volatile unsigned int num_spurious; + +/* + * This function returns a new irq_node_t + */ +extern irq_node_t *new_irq_node(void); + +#endif /* _M68K_IRQNODE_H_ */ diff --git a/include/asm-m68knommu/m520xsim.h b/include/asm-m68knommu/m520xsim.h new file mode 100644 index 000000000000..6dc62869e62b --- /dev/null +++ b/include/asm-m68knommu/m520xsim.h @@ -0,0 +1,54 @@ +/****************************************************************************/ + +/* + * m520xsim.h -- ColdFire 5207/5208 System Integration Module support. + * + * (C) Copyright 2005, Intec Automation (mike@steroidmicros.com) + */ + +/****************************************************************************/ +#ifndef m520xsim_h +#define m520xsim_h +/****************************************************************************/ + +#include <linux/config.h> + +/* + * Define the 5282 SIM register set addresses. + */ +#define MCFICM_INTC0 0x48000 /* Base for Interrupt Ctrl 0 */ +#define MCFINTC_IPRH 0x00 /* Interrupt pending 32-63 */ +#define MCFINTC_IPRL 0x04 /* Interrupt pending 1-31 */ +#define MCFINTC_IMRH 0x08 /* Interrupt mask 32-63 */ +#define MCFINTC_IMRL 0x0c /* Interrupt mask 1-31 */ +#define MCFINTC_INTFRCH 0x10 /* Interrupt force 32-63 */ +#define MCFINTC_INTFRCL 0x14 /* Interrupt force 1-31 */ +#define MCFINTC_ICR0 0x40 /* Base ICR register */ + +#define MCFINT_VECBASE 64 +#define MCFINT_UART0 26 /* Interrupt number for UART0 */ +#define MCFINT_UART1 27 /* Interrupt number for UART1 */ +#define MCFINT_UART2 28 /* Interrupt number for UART2 */ +#define MCFINT_QSPI 31 /* Interrupt number for QSPI */ +#define MCFINT_PIT1 4 /* Interrupt number for PIT1 (PIT0 in processor) */ + + +#define MCF_GPIO_PAR_UART (0xA4036) +#define MCF_GPIO_PAR_FECI2C (0xA4033) +#define MCF_GPIO_PAR_FEC (0xA4038) + +#define MCF_GPIO_PAR_UART_PAR_URXD0 (0x0001) +#define MCF_GPIO_PAR_UART_PAR_UTXD0 (0x0002) + +#define MCF_GPIO_PAR_UART_PAR_URXD1 (0x0040) +#define MCF_GPIO_PAR_UART_PAR_UTXD1 (0x0080) + +#define MCF_GPIO_PAR_FECI2C_PAR_SDA_URXD2 (0x02) +#define MCF_GPIO_PAR_FECI2C_PAR_SCL_UTXD2 (0x04) + +#define ICR_INTRCONF 0x05 +#define MCFPIT_IMR MCFINTC_IMRL +#define MCFPIT_IMR_IBIT (1 << MCFINT_PIT1) + +/****************************************************************************/ +#endif /* m520xsim_h */ diff --git a/include/asm-m68knommu/mcfcache.h b/include/asm-m68knommu/mcfcache.h index b17cd920977f..9cb401421835 100644 --- a/include/asm-m68knommu/mcfcache.h +++ b/include/asm-m68knommu/mcfcache.h @@ -117,6 +117,20 @@ .endm #endif /* CONFIG_M5407 */ +#if defined(CONFIG_M520x) +.macro CACHE_ENABLE + move.l #0x01000000,%d0 /* invalidate whole cache */ + movec %d0,%CACR + nop + move.l #0x0000c000,%d0 /* set SDRAM cached (write-thru) */ + movec %d0,%ACR0 + move.l #0x00000000,%d0 /* no other regions cached */ + movec %d0,%ACR1 + move.l #0x80400000,%d0 /* enable 8K instruction cache */ + movec %d0,%CACR + nop +.endm +#endif /* CONFIG_M520x */ /****************************************************************************/ #endif /* __M68KNOMMU_MCFCACHE_H */ diff --git a/include/asm-m68knommu/mcfne.h b/include/asm-m68knommu/mcfne.h index 045875651e4d..a71b1c8cb4f8 100644 --- a/include/asm-m68knommu/mcfne.h +++ b/include/asm-m68knommu/mcfne.h @@ -35,7 +35,7 @@ * Define the basic hardware resources of NE2000 boards. */ -#if defined(CONFIG_M5206) && defined(CONFIG_ARNEWSH) +#if defined(CONFIG_ARN5206) #define NE2000_ADDR 0x40000300 #define NE2000_ODDOFFSET 0x00010000 #define NE2000_IRQ_VECTOR 0xf0 @@ -44,7 +44,7 @@ #define NE2000_BYTE volatile unsigned short #endif -#if defined(CONFIG_M5206e) && defined(CONFIG_MOTOROLA) +#if defined(CONFIG_M5206eC3) #define NE2000_ADDR 0x40000300 #define NE2000_ODDOFFSET 0x00010000 #define NE2000_IRQ_VECTOR 0x1c @@ -61,7 +61,7 @@ #define NE2000_BYTE volatile unsigned char #endif -#if defined(CONFIG_M5206e) && defined(CONFIG_CFV240) +#if defined(CONFIG_CFV240) #define NE2000_ADDR 0x40010000 #define NE2000_ADDR1 0x40010001 #define NE2000_ODDOFFSET 0x00000000 @@ -72,7 +72,7 @@ #define NE2000_BYTE volatile unsigned char #endif -#if defined(CONFIG_M5307) && defined(CONFIG_MOTOROLA) +#if defined(CONFIG_M5307C3) #define NE2000_ADDR 0x40000300 #define NE2000_ODDOFFSET 0x00010000 #define NE2000_IRQ_VECTOR 0x1b @@ -114,7 +114,7 @@ #define RSWAP(w) (((w) << 8) | ((w) >> 8)) #endif -#if defined(CONFIG_M5307) && defined(CONFIG_ARNEWSH) +#if defined(CONFIG_ARN5307) #define NE2000_ADDR 0xfe600300 #define NE2000_ODDOFFSET 0x00010000 #define NE2000_IRQ_VECTOR 0x1b @@ -123,7 +123,7 @@ #define NE2000_BYTE volatile unsigned short #endif -#if defined(CONFIG_M5407) +#if defined(CONFIG_M5407C3) #define NE2000_ADDR 0x40000300 #define NE2000_ODDOFFSET 0x00010000 #define NE2000_IRQ_VECTOR 0x1b @@ -264,7 +264,7 @@ void ne2000_outsw(unsigned int addr, const void *vbuf, unsigned long len) * Minor differences between the different board types. */ -#if defined(CONFIG_M5206) && defined(CONFIG_ARNEWSH) +#if defined(CONFIG_ARN5206) void ne2000_irqsetup(int irq) { volatile unsigned char *icrp; @@ -275,7 +275,7 @@ void ne2000_irqsetup(int irq) } #endif -#if defined(CONFIG_M5206e) && defined(CONFIG_MOTOROLA) +#if defined(CONFIG_M5206eC3) void ne2000_irqsetup(int irq) { volatile unsigned char *icrp; @@ -286,7 +286,7 @@ void ne2000_irqsetup(int irq) } #endif -#if defined(CONFIG_M5206e) && defined(CONFIG_CFV240) +#if defined(CONFIG_CFV240) void ne2000_irqsetup(int irq) { volatile unsigned char *icrp; diff --git a/include/asm-m68knommu/mcfpit.h b/include/asm-m68knommu/mcfpit.h index 4cc2e9fd6ad0..a685f1b45401 100644 --- a/include/asm-m68knommu/mcfpit.h +++ b/include/asm-m68knommu/mcfpit.h @@ -14,13 +14,17 @@ #include <linux/config.h> /* - * Get address specific defines for the 5270/5271 and 5280/5282. + * Get address specific defines for the 5270/5271, 5280/5282, and 5208. */ +#if defined(CONFIG_M520x) +#define MCFPIT_BASE1 0x00080000 /* Base address of TIMER1 */ +#define MCFPIT_BASE2 0x00084000 /* Base address of TIMER2 */ +#else #define MCFPIT_BASE1 0x00150000 /* Base address of TIMER1 */ #define MCFPIT_BASE2 0x00160000 /* Base address of TIMER2 */ #define MCFPIT_BASE3 0x00170000 /* Base address of TIMER3 */ #define MCFPIT_BASE4 0x00180000 /* Base address of TIMER4 */ - +#endif /* * Define the PIT timer register set addresses. diff --git a/include/asm-m68knommu/mcfsim.h b/include/asm-m68knommu/mcfsim.h index b0c7736f7a99..81d74a31dc43 100644 --- a/include/asm-m68knommu/mcfsim.h +++ b/include/asm-m68knommu/mcfsim.h @@ -22,6 +22,8 @@ #include <asm/m5204sim.h> #elif defined(CONFIG_M5206) || defined(CONFIG_M5206e) #include <asm/m5206sim.h> +#elif defined(CONFIG_M520x) +#include <asm/m520xsim.h> #elif defined(CONFIG_M523x) #include <asm/m523xsim.h> #elif defined(CONFIG_M5249) @@ -99,6 +101,19 @@ #define MCFSIM_IMR_MASKALL 0x3ffe /* All intr sources */ #endif +/* + * PIT interrupt settings, if not found in mXXXXsim.h file. + */ +#ifndef ICR_INTRCONF +#define ICR_INTRCONF 0x2b /* PIT1 level 5, priority 3 */ +#endif +#ifndef MCFPIT_IMR +#define MCFPIT_IMR MCFINTC_IMRH +#endif +#ifndef MCFPIT_IMR_IBIT +#define MCFPIT_IMR_IBIT (1 << (MCFINT_PIT1 - 32)) +#endif + #ifndef __ASSEMBLY__ /* diff --git a/include/asm-m68knommu/mcfuart.h b/include/asm-m68knommu/mcfuart.h index 9c1210613bc7..b016fad83119 100644 --- a/include/asm-m68knommu/mcfuart.h +++ b/include/asm-m68knommu/mcfuart.h @@ -41,6 +41,10 @@ #define MCFUART_BASE1 0x1c0 /* Base address of UART1 */ #define MCFUART_BASE2 0x200 /* Base address of UART2 */ #endif +#elif defined(CONFIG_M520x) +#define MCFUART_BASE1 0x60000 /* Base address of UART1 */ +#define MCFUART_BASE2 0x64000 /* Base address of UART2 */ +#define MCFUART_BASE3 0x68000 /* Base address of UART2 */ #endif diff --git a/include/asm-m68knommu/mcfwdebug.h b/include/asm-m68knommu/mcfwdebug.h index c425dd568155..6ceae103596b 100644 --- a/include/asm-m68knommu/mcfwdebug.h +++ b/include/asm-m68knommu/mcfwdebug.h @@ -90,7 +90,7 @@ * that the debug module instructions (2 longs) must be long word aligned and * some pointer fiddling is performed to ensure this. */ -extern inline void wdebug(int reg, unsigned long data) { +static inline void wdebug(int reg, unsigned long data) { unsigned short dbg_spc[6]; unsigned short *dbg; diff --git a/include/asm-m68knommu/mmu_context.h b/include/asm-m68knommu/mmu_context.h index 9bc0fd49b8aa..1e080eca9ca8 100644 --- a/include/asm-m68knommu/mmu_context.h +++ b/include/asm-m68knommu/mmu_context.h @@ -10,7 +10,7 @@ static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk) { } -extern inline int +static inline int init_new_context(struct task_struct *tsk, struct mm_struct *mm) { // mm->context = virt_to_phys(mm->pgd); @@ -25,7 +25,7 @@ static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next, str #define deactivate_mm(tsk,mm) do { } while (0) -extern inline void activate_mm(struct mm_struct *prev_mm, +static inline void activate_mm(struct mm_struct *prev_mm, struct mm_struct *next_mm) { } diff --git a/include/asm-m68knommu/processor.h b/include/asm-m68knommu/processor.h index 85a054e758b1..ba393b1a023b 100644 --- a/include/asm-m68knommu/processor.h +++ b/include/asm-m68knommu/processor.h @@ -21,7 +21,7 @@ #include <asm/ptrace.h> #include <asm/current.h> -extern inline unsigned long rdusp(void) +static inline unsigned long rdusp(void) { #ifdef CONFIG_COLDFIRE extern unsigned int sw_usp; @@ -33,7 +33,7 @@ extern inline unsigned long rdusp(void) #endif } -extern inline void wrusp(unsigned long usp) +static inline void wrusp(unsigned long usp) { #ifdef CONFIG_COLDFIRE extern unsigned int sw_usp; diff --git a/include/asm-m68knommu/semaphore.h b/include/asm-m68knommu/semaphore.h index febe85add509..5cc1fdd86f50 100644 --- a/include/asm-m68knommu/semaphore.h +++ b/include/asm-m68knommu/semaphore.h @@ -35,16 +35,13 @@ struct semaphore { .wait = __WAIT_QUEUE_HEAD_INITIALIZER((name).wait) \ } -#define __MUTEX_INITIALIZER(name) \ - __SEMAPHORE_INITIALIZER(name,1) - #define __DECLARE_SEMAPHORE_GENERIC(name,count) \ struct semaphore name = __SEMAPHORE_INITIALIZER(name,count) #define DECLARE_MUTEX(name) __DECLARE_SEMAPHORE_GENERIC(name,1) #define DECLARE_MUTEX_LOCKED(name) __DECLARE_SEMAPHORE_GENERIC(name,0) -extern inline void sema_init (struct semaphore *sem, int val) +static inline void sema_init (struct semaphore *sem, int val) { *sem = (struct semaphore)__SEMAPHORE_INITIALIZER(*sem, val); } @@ -76,7 +73,7 @@ extern spinlock_t semaphore_wake_lock; * "down_failed" is a special asm handler that calls the C * routine that actually waits. See arch/m68k/lib/semaphore.S */ -extern inline void down(struct semaphore * sem) +static inline void down(struct semaphore * sem) { might_sleep(); __asm__ __volatile__( @@ -91,7 +88,7 @@ extern inline void down(struct semaphore * sem) : "cc", "%a0", "%a1", "memory"); } -extern inline int down_interruptible(struct semaphore * sem) +static inline int down_interruptible(struct semaphore * sem) { int ret; @@ -110,7 +107,7 @@ extern inline int down_interruptible(struct semaphore * sem) return(ret); } -extern inline int down_trylock(struct semaphore * sem) +static inline int down_trylock(struct semaphore * sem) { register struct semaphore *sem1 __asm__ ("%a1") = sem; register int result __asm__ ("%d0"); @@ -138,7 +135,7 @@ extern inline int down_trylock(struct semaphore * sem) * The default case (no contention) will result in NO * jumps for both down() and up(). */ -extern inline void up(struct semaphore * sem) +static inline void up(struct semaphore * sem) { __asm__ __volatile__( "| atomic up operation\n\t" diff --git a/include/asm-m68knommu/system.h b/include/asm-m68knommu/system.h index 53cbbad0f130..6338afc850ba 100644 --- a/include/asm-m68knommu/system.h +++ b/include/asm-m68knommu/system.h @@ -312,6 +312,19 @@ cmpxchg(volatile int *p, int old, int new) moveb #0x80, (%a0); \ "); \ }) +#elif defined(CONFIG_M520x) + /* + * The MCF5208 has a bit (SOFTRST) in memory (Reset Control Register + * RCR), that when set, resets the MCF5208. + */ +#define HARD_RESET_NOW() \ +({ \ + unsigned char volatile *reset; \ + asm("move.w #0x2700, %sr"); \ + reset = ((volatile unsigned short *)(MCF_IPSBAR + 0xA0000)); \ + while(1) \ + *reset |= 0x80; \ +}) #else #define HARD_RESET_NOW() ({ \ asm(" \ diff --git a/include/asm-m68knommu/tlbflush.h b/include/asm-m68knommu/tlbflush.h index bf7004e1afe0..de858db28b00 100644 --- a/include/asm-m68knommu/tlbflush.h +++ b/include/asm-m68knommu/tlbflush.h @@ -47,12 +47,12 @@ static inline void flush_tlb_range(struct mm_struct *mm, BUG(); } -extern inline void flush_tlb_kernel_page(unsigned long addr) +static inline void flush_tlb_kernel_page(unsigned long addr) { BUG(); } -extern inline void flush_tlb_pgtables(struct mm_struct *mm, +static inline void flush_tlb_pgtables(struct mm_struct *mm, unsigned long start, unsigned long end) { BUG(); diff --git a/include/asm-m68knommu/unistd.h b/include/asm-m68knommu/unistd.h index 84b6fa14459f..5373988a7e51 100644 --- a/include/asm-m68knommu/unistd.h +++ b/include/asm-m68knommu/unistd.h @@ -504,7 +504,6 @@ asmlinkage long sys_mmap2(unsigned long addr, unsigned long len, unsigned long fd, unsigned long pgoff); asmlinkage int sys_execve(char *name, char **argv, char **envp); asmlinkage int sys_pipe(unsigned long *fildes); -asmlinkage int sys_ptrace(long request, long pid, long addr, long data); struct pt_regs; int sys_request_irq(unsigned int, irqreturn_t (*)(int, void *, struct pt_regs *), diff --git a/include/asm-mips/.gitignore b/include/asm-mips/.gitignore new file mode 100644 index 000000000000..4ec57ad5bc3c --- /dev/null +++ b/include/asm-mips/.gitignore @@ -0,0 +1 @@ +asm_offsets.h diff --git a/include/asm-mips/abi.h b/include/asm-mips/abi.h new file mode 100644 index 000000000000..2e7e651c3e3f --- /dev/null +++ b/include/asm-mips/abi.h @@ -0,0 +1,25 @@ +/* + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * + * Copyright (C) 2005 by Ralf Baechle + * Copyright (C) 2005 MIPS Technologies, Inc. + */ +#ifndef _ASM_ABI_H +#define _ASM_ABI_H + +#include <asm/signal.h> +#include <asm/siginfo.h> + +struct mips_abi { + int (* const do_signal)(sigset_t *oldset, struct pt_regs *regs); + int (* const setup_frame)(struct k_sigaction * ka, + struct pt_regs *regs, int signr, + sigset_t *set); + int (* const setup_rt_frame)(struct k_sigaction * ka, + struct pt_regs *regs, int signr, + sigset_t *set, siginfo_t *info); +}; + +#endif /* _ASM_ABI_H */ diff --git a/include/asm-mips/addrspace.h b/include/asm-mips/addrspace.h index 7dc2619f5006..42520cc84b0f 100644 --- a/include/asm-mips/addrspace.h +++ b/include/asm-mips/addrspace.h @@ -20,10 +20,12 @@ #define _ATYPE_ #define _ATYPE32_ #define _ATYPE64_ +#define _LLCONST_(x) x #else #define _ATYPE_ __PTRDIFF_TYPE__ #define _ATYPE32_ int #define _ATYPE64_ long long +#define _LLCONST_(x) x ## LL #endif /* @@ -45,8 +47,9 @@ /* * Returns the physical address of a CKSEGx / XKPHYS address */ -#define CPHYSADDR(a) ((_ACAST32_ (a)) & 0x1fffffff) -#define XPHYSADDR(a) ((_ACAST64_ (a)) & 0x000000ffffffffff) +#define CPHYSADDR(a) ((_ACAST32_(a)) & 0x1fffffff) +#define XPHYSADDR(a) ((_ACAST64_(a)) & \ + _LLCONST_(0x000000ffffffffff)) #ifdef CONFIG_64BIT @@ -55,14 +58,14 @@ * The compatibility segments use the full 64-bit sign extended value. Note * the R8000 doesn't have them so don't reference these in generic MIPS code. */ -#define XKUSEG 0x0000000000000000 -#define XKSSEG 0x4000000000000000 -#define XKPHYS 0x8000000000000000 -#define XKSEG 0xc000000000000000 -#define CKSEG0 0xffffffff80000000 -#define CKSEG1 0xffffffffa0000000 -#define CKSSEG 0xffffffffc0000000 -#define CKSEG3 0xffffffffe0000000 +#define XKUSEG _LLCONST_(0x0000000000000000) +#define XKSSEG _LLCONST_(0x4000000000000000) +#define XKPHYS _LLCONST_(0x8000000000000000) +#define XKSEG _LLCONST_(0xc000000000000000) +#define CKSEG0 _LLCONST_(0xffffffff80000000) +#define CKSEG1 _LLCONST_(0xffffffffa0000000) +#define CKSSEG _LLCONST_(0xffffffffc0000000) +#define CKSEG3 _LLCONST_(0xffffffffe0000000) #define CKSEG0ADDR(a) (CPHYSADDR(a) | CKSEG0) #define CKSEG1ADDR(a) (CPHYSADDR(a) | CKSEG1) @@ -120,7 +123,8 @@ #define PHYS_TO_XKSEG_UNCACHED(p) PHYS_TO_XKPHYS(K_CALG_UNCACHED,(p)) #define PHYS_TO_XKSEG_CACHED(p) PHYS_TO_XKPHYS(K_CALG_COH_SHAREABLE,(p)) #define XKPHYS_TO_PHYS(p) ((p) & TO_PHYS_MASK) -#define PHYS_TO_XKPHYS(cm,a) (0x8000000000000000 | ((cm)<<59) | (a)) +#define PHYS_TO_XKPHYS(cm,a) (_LLCONST_(0x8000000000000000) | \ + ((cm)<<59) | (a)) #if defined (CONFIG_CPU_R4300) \ || defined (CONFIG_CPU_R4X00) \ @@ -128,46 +132,56 @@ || defined (CONFIG_CPU_NEVADA) \ || defined (CONFIG_CPU_TX49XX) \ || defined (CONFIG_CPU_MIPS64) -#define KUSIZE 0x0000010000000000 /* 2^^40 */ -#define KUSIZE_64 0x0000010000000000 /* 2^^40 */ -#define K0SIZE 0x0000001000000000 /* 2^^36 */ -#define K1SIZE 0x0000001000000000 /* 2^^36 */ -#define K2SIZE 0x000000ff80000000 -#define KSEGSIZE 0x000000ff80000000 /* max syssegsz */ -#define TO_PHYS_MASK 0x0000000fffffffff /* 2^^36 - 1 */ +#define KUSIZE _LLCONST_(0x0000010000000000) /* 2^^40 */ +#define KUSIZE_64 _LLCONST_(0x0000010000000000) /* 2^^40 */ +#define K0SIZE _LLCONST_(0x0000001000000000) /* 2^^36 */ +#define K1SIZE _LLCONST_(0x0000001000000000) /* 2^^36 */ +#define K2SIZE _LLCONST_(0x000000ff80000000) +#define KSEGSIZE _LLCONST_(0x000000ff80000000) /* max syssegsz */ +#define TO_PHYS_MASK _LLCONST_(0x0000000fffffffff) /* 2^^36 - 1 */ #endif #if defined (CONFIG_CPU_R8000) /* We keep KUSIZE consistent with R4000 for now (2^^40) instead of (2^^48) */ -#define KUSIZE 0x0000010000000000 /* 2^^40 */ -#define KUSIZE_64 0x0000010000000000 /* 2^^40 */ -#define K0SIZE 0x0000010000000000 /* 2^^40 */ -#define K1SIZE 0x0000010000000000 /* 2^^40 */ -#define K2SIZE 0x0001000000000000 -#define KSEGSIZE 0x0000010000000000 /* max syssegsz */ -#define TO_PHYS_MASK 0x000000ffffffffff /* 2^^40 - 1 */ +#define KUSIZE _LLCONST_(0x0000010000000000) /* 2^^40 */ +#define KUSIZE_64 _LLCONST_(0x0000010000000000) /* 2^^40 */ +#define K0SIZE _LLCONST_(0x0000010000000000) /* 2^^40 */ +#define K1SIZE _LLCONST_(0x0000010000000000) /* 2^^40 */ +#define K2SIZE _LLCONST_(0x0001000000000000) +#define KSEGSIZE _LLCONST_(0x0000010000000000) /* max syssegsz */ +#define TO_PHYS_MASK _LLCONST_(0x000000ffffffffff) /* 2^^40 - 1 */ #endif #if defined (CONFIG_CPU_R10000) -#define KUSIZE 0x0000010000000000 /* 2^^40 */ -#define KUSIZE_64 0x0000010000000000 /* 2^^40 */ -#define K0SIZE 0x0000010000000000 /* 2^^40 */ -#define K1SIZE 0x0000010000000000 /* 2^^40 */ -#define K2SIZE 0x00000fff80000000 -#define KSEGSIZE 0x00000fff80000000 /* max syssegsz */ -#define TO_PHYS_MASK 0x000000ffffffffff /* 2^^40 - 1 */ +#define KUSIZE _LLCONST_(0x0000010000000000) /* 2^^40 */ +#define KUSIZE_64 _LLCONST_(0x0000010000000000) /* 2^^40 */ +#define K0SIZE _LLCONST_(0x0000010000000000) /* 2^^40 */ +#define K1SIZE _LLCONST_(0x0000010000000000) /* 2^^40 */ +#define K2SIZE _LLCONST_(0x00000fff80000000) +#define KSEGSIZE _LLCONST_(0x00000fff80000000) /* max syssegsz */ +#define TO_PHYS_MASK _LLCONST_(0x000000ffffffffff) /* 2^^40 - 1 */ +#endif + +#if defined(CONFIG_CPU_SB1) || defined(CONFIG_CPU_SB1A) +#define KUSIZE _LLCONST_(0x0000100000000000) /* 2^^44 */ +#define KUSIZE_64 _LLCONST_(0x0000100000000000) /* 2^^44 */ +#define K0SIZE _LLCONST_(0x0000100000000000) /* 2^^44 */ +#define K1SIZE _LLCONST_(0x0000100000000000) /* 2^^44 */ +#define K2SIZE _LLCONST_(0x0000ffff80000000) +#define KSEGSIZE _LLCONST_(0x0000ffff80000000) /* max syssegsz */ +#define TO_PHYS_MASK _LLCONST_(0x00000fffffffffff) /* 2^^44 - 1 */ #endif /* * Further names for SGI source compatibility. These are stolen from * IRIX's <sys/mips_addrspace.h>. */ -#define KUBASE 0 -#define KUSIZE_32 0x0000000080000000 /* KUSIZE +#define KUBASE _LLCONST_(0) +#define KUSIZE_32 _LLCONST_(0x0000000080000000) /* KUSIZE for a 32 bit proc */ -#define K0BASE_EXL_WR 0xa800000000000000 /* exclusive on write */ -#define K0BASE_NONCOH 0x9800000000000000 /* noncoherent */ -#define K0BASE_EXL 0xa000000000000000 /* exclusive */ +#define K0BASE_EXL_WR _LLCONST_(0xa800000000000000) /* exclusive on write */ +#define K0BASE_NONCOH _LLCONST_(0x9800000000000000) /* noncoherent */ +#define K0BASE_EXL _LLCONST_(0xa000000000000000) /* exclusive */ #ifndef CONFIG_CPU_R8000 @@ -176,7 +190,7 @@ * in order to catch bugs in the source code. */ -#define COMPAT_K1BASE32 0xffffffffa0000000 +#define COMPAT_K1BASE32 _LLCONST_(0xffffffffa0000000) #define PHYS_TO_COMPATK1(x) ((x) | COMPAT_K1BASE32) /* 32-bit compat k1 */ #endif diff --git a/include/asm-mips/asm.h b/include/asm-mips/asm.h index f53237772985..4b090f3142e0 100644 --- a/include/asm-mips/asm.h +++ b/include/asm-mips/asm.h @@ -107,6 +107,7 @@ symbol = value /* * Print formatted string */ +#ifdef CONFIG_PRINTK #define PRINT(string) \ .set push; \ .set reorder; \ @@ -114,6 +115,9 @@ symbol = value jal printk; \ .set pop; \ TEXT(string) +#else +#define PRINT(string) +#endif #define TEXT(msg) \ .pushsection .data; \ diff --git a/include/asm-mips/atomic.h b/include/asm-mips/atomic.h index c0bd8d014e14..55c37c106ef0 100644 --- a/include/asm-mips/atomic.h +++ b/include/asm-mips/atomic.h @@ -62,20 +62,24 @@ static __inline__ void atomic_add(int i, atomic_t * v) unsigned long temp; __asm__ __volatile__( + " .set mips3 \n" "1: ll %0, %1 # atomic_add \n" " addu %0, %2 \n" " sc %0, %1 \n" " beqzl %0, 1b \n" + " .set mips0 \n" : "=&r" (temp), "=m" (v->counter) : "Ir" (i), "m" (v->counter)); } else if (cpu_has_llsc) { unsigned long temp; __asm__ __volatile__( + " .set mips3 \n" "1: ll %0, %1 # atomic_add \n" " addu %0, %2 \n" " sc %0, %1 \n" " beqz %0, 1b \n" + " .set mips0 \n" : "=&r" (temp), "=m" (v->counter) : "Ir" (i), "m" (v->counter)); } else { @@ -100,20 +104,24 @@ static __inline__ void atomic_sub(int i, atomic_t * v) unsigned long temp; __asm__ __volatile__( + " .set mips3 \n" "1: ll %0, %1 # atomic_sub \n" " subu %0, %2 \n" " sc %0, %1 \n" " beqzl %0, 1b \n" + " .set mips0 \n" : "=&r" (temp), "=m" (v->counter) : "Ir" (i), "m" (v->counter)); } else if (cpu_has_llsc) { unsigned long temp; __asm__ __volatile__( + " .set mips3 \n" "1: ll %0, %1 # atomic_sub \n" " subu %0, %2 \n" " sc %0, %1 \n" " beqz %0, 1b \n" + " .set mips0 \n" : "=&r" (temp), "=m" (v->counter) : "Ir" (i), "m" (v->counter)); } else { @@ -136,12 +144,14 @@ static __inline__ int atomic_add_return(int i, atomic_t * v) unsigned long temp; __asm__ __volatile__( + " .set mips3 \n" "1: ll %1, %2 # atomic_add_return \n" " addu %0, %1, %3 \n" " sc %0, %2 \n" " beqzl %0, 1b \n" " addu %0, %1, %3 \n" " sync \n" + " .set mips0 \n" : "=&r" (result), "=&r" (temp), "=m" (v->counter) : "Ir" (i), "m" (v->counter) : "memory"); @@ -149,12 +159,14 @@ static __inline__ int atomic_add_return(int i, atomic_t * v) unsigned long temp; __asm__ __volatile__( + " .set mips3 \n" "1: ll %1, %2 # atomic_add_return \n" " addu %0, %1, %3 \n" " sc %0, %2 \n" " beqz %0, 1b \n" " addu %0, %1, %3 \n" " sync \n" + " .set mips0 \n" : "=&r" (result), "=&r" (temp), "=m" (v->counter) : "Ir" (i), "m" (v->counter) : "memory"); @@ -179,12 +191,14 @@ static __inline__ int atomic_sub_return(int i, atomic_t * v) unsigned long temp; __asm__ __volatile__( + " .set mips3 \n" "1: ll %1, %2 # atomic_sub_return \n" " subu %0, %1, %3 \n" " sc %0, %2 \n" " beqzl %0, 1b \n" " subu %0, %1, %3 \n" " sync \n" + " .set mips0 \n" : "=&r" (result), "=&r" (temp), "=m" (v->counter) : "Ir" (i), "m" (v->counter) : "memory"); @@ -192,12 +206,14 @@ static __inline__ int atomic_sub_return(int i, atomic_t * v) unsigned long temp; __asm__ __volatile__( + " .set mips3 \n" "1: ll %1, %2 # atomic_sub_return \n" " subu %0, %1, %3 \n" " sc %0, %2 \n" " beqz %0, 1b \n" " subu %0, %1, %3 \n" " sync \n" + " .set mips0 \n" : "=&r" (result), "=&r" (temp), "=m" (v->counter) : "Ir" (i), "m" (v->counter) : "memory"); @@ -215,11 +231,12 @@ static __inline__ int atomic_sub_return(int i, atomic_t * v) } /* - * atomic_sub_if_positive - add integer to atomic variable + * atomic_sub_if_positive - conditionally subtract integer from atomic variable + * @i: integer value to subtract * @v: pointer of type atomic_t * - * Atomically test @v and decrement if it is greater than 0. - * The function returns the old value of @v minus 1. + * Atomically test @v and subtract @i if @v is greater or equal than @i. + * The function returns the old value of @v minus @i. */ static __inline__ int atomic_sub_if_positive(int i, atomic_t * v) { @@ -229,6 +246,7 @@ static __inline__ int atomic_sub_if_positive(int i, atomic_t * v) unsigned long temp; __asm__ __volatile__( + " .set mips3 \n" "1: ll %1, %2 # atomic_sub_if_positive\n" " subu %0, %1, %3 \n" " bltz %0, 1f \n" @@ -236,6 +254,7 @@ static __inline__ int atomic_sub_if_positive(int i, atomic_t * v) " beqzl %0, 1b \n" " sync \n" "1: \n" + " .set mips0 \n" : "=&r" (result), "=&r" (temp), "=m" (v->counter) : "Ir" (i), "m" (v->counter) : "memory"); @@ -243,6 +262,7 @@ static __inline__ int atomic_sub_if_positive(int i, atomic_t * v) unsigned long temp; __asm__ __volatile__( + " .set mips3 \n" "1: ll %1, %2 # atomic_sub_if_positive\n" " subu %0, %1, %3 \n" " bltz %0, 1f \n" @@ -250,6 +270,7 @@ static __inline__ int atomic_sub_if_positive(int i, atomic_t * v) " beqz %0, 1b \n" " sync \n" "1: \n" + " .set mips0 \n" : "=&r" (result), "=&r" (temp), "=m" (v->counter) : "Ir" (i), "m" (v->counter) : "memory"); @@ -267,6 +288,27 @@ static __inline__ int atomic_sub_if_positive(int i, atomic_t * v) return result; } +#define atomic_cmpxchg(v, o, n) ((int)cmpxchg(&((v)->counter), (o), (n))) + +/** + * atomic_add_unless - add unless the number is a given value + * @v: pointer of type atomic_t + * @a: the amount to add to v... + * @u: ...unless v is equal to u. + * + * Atomically adds @a to @v, so long as it was not @u. + * Returns non-zero if @v was not @u, and zero otherwise. + */ +#define atomic_add_unless(v, a, u) \ +({ \ + int c, old; \ + c = atomic_read(v); \ + while (c != (u) && (old = atomic_cmpxchg((v), c, c + (a))) != c) \ + c = old; \ + c != (u); \ +}) +#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0) + #define atomic_dec_return(v) atomic_sub_return(1,(v)) #define atomic_inc_return(v) atomic_add_return(1,(v)) @@ -367,20 +409,24 @@ static __inline__ void atomic64_add(long i, atomic64_t * v) unsigned long temp; __asm__ __volatile__( + " .set mips3 \n" "1: lld %0, %1 # atomic64_add \n" " addu %0, %2 \n" " scd %0, %1 \n" " beqzl %0, 1b \n" + " .set mips0 \n" : "=&r" (temp), "=m" (v->counter) : "Ir" (i), "m" (v->counter)); } else if (cpu_has_llsc) { unsigned long temp; __asm__ __volatile__( + " .set mips3 \n" "1: lld %0, %1 # atomic64_add \n" " addu %0, %2 \n" " scd %0, %1 \n" " beqz %0, 1b \n" + " .set mips0 \n" : "=&r" (temp), "=m" (v->counter) : "Ir" (i), "m" (v->counter)); } else { @@ -405,20 +451,24 @@ static __inline__ void atomic64_sub(long i, atomic64_t * v) unsigned long temp; __asm__ __volatile__( + " .set mips3 \n" "1: lld %0, %1 # atomic64_sub \n" " subu %0, %2 \n" " scd %0, %1 \n" " beqzl %0, 1b \n" + " .set mips0 \n" : "=&r" (temp), "=m" (v->counter) : "Ir" (i), "m" (v->counter)); } else if (cpu_has_llsc) { unsigned long temp; __asm__ __volatile__( + " .set mips3 \n" "1: lld %0, %1 # atomic64_sub \n" " subu %0, %2 \n" " scd %0, %1 \n" " beqz %0, 1b \n" + " .set mips0 \n" : "=&r" (temp), "=m" (v->counter) : "Ir" (i), "m" (v->counter)); } else { @@ -441,12 +491,14 @@ static __inline__ long atomic64_add_return(long i, atomic64_t * v) unsigned long temp; __asm__ __volatile__( + " .set mips3 \n" "1: lld %1, %2 # atomic64_add_return \n" " addu %0, %1, %3 \n" " scd %0, %2 \n" " beqzl %0, 1b \n" " addu %0, %1, %3 \n" " sync \n" + " .set mips0 \n" : "=&r" (result), "=&r" (temp), "=m" (v->counter) : "Ir" (i), "m" (v->counter) : "memory"); @@ -454,12 +506,14 @@ static __inline__ long atomic64_add_return(long i, atomic64_t * v) unsigned long temp; __asm__ __volatile__( + " .set mips3 \n" "1: lld %1, %2 # atomic64_add_return \n" " addu %0, %1, %3 \n" " scd %0, %2 \n" " beqz %0, 1b \n" " addu %0, %1, %3 \n" " sync \n" + " .set mips0 \n" : "=&r" (result), "=&r" (temp), "=m" (v->counter) : "Ir" (i), "m" (v->counter) : "memory"); @@ -484,12 +538,14 @@ static __inline__ long atomic64_sub_return(long i, atomic64_t * v) unsigned long temp; __asm__ __volatile__( + " .set mips3 \n" "1: lld %1, %2 # atomic64_sub_return \n" " subu %0, %1, %3 \n" " scd %0, %2 \n" " beqzl %0, 1b \n" " subu %0, %1, %3 \n" " sync \n" + " .set mips0 \n" : "=&r" (result), "=&r" (temp), "=m" (v->counter) : "Ir" (i), "m" (v->counter) : "memory"); @@ -497,12 +553,14 @@ static __inline__ long atomic64_sub_return(long i, atomic64_t * v) unsigned long temp; __asm__ __volatile__( + " .set mips3 \n" "1: lld %1, %2 # atomic64_sub_return \n" " subu %0, %1, %3 \n" " scd %0, %2 \n" " beqz %0, 1b \n" " subu %0, %1, %3 \n" " sync \n" + " .set mips0 \n" : "=&r" (result), "=&r" (temp), "=m" (v->counter) : "Ir" (i), "m" (v->counter) : "memory"); @@ -520,11 +578,12 @@ static __inline__ long atomic64_sub_return(long i, atomic64_t * v) } /* - * atomic64_sub_if_positive - add integer to atomic variable + * atomic64_sub_if_positive - conditionally subtract integer from atomic variable + * @i: integer value to subtract * @v: pointer of type atomic64_t * - * Atomically test @v and decrement if it is greater than 0. - * The function returns the old value of @v minus 1. + * Atomically test @v and subtract @i if @v is greater or equal than @i. + * The function returns the old value of @v minus @i. */ static __inline__ long atomic64_sub_if_positive(long i, atomic64_t * v) { @@ -534,6 +593,7 @@ static __inline__ long atomic64_sub_if_positive(long i, atomic64_t * v) unsigned long temp; __asm__ __volatile__( + " .set mips3 \n" "1: lld %1, %2 # atomic64_sub_if_positive\n" " dsubu %0, %1, %3 \n" " bltz %0, 1f \n" @@ -541,6 +601,7 @@ static __inline__ long atomic64_sub_if_positive(long i, atomic64_t * v) " beqzl %0, 1b \n" " sync \n" "1: \n" + " .set mips0 \n" : "=&r" (result), "=&r" (temp), "=m" (v->counter) : "Ir" (i), "m" (v->counter) : "memory"); @@ -548,6 +609,7 @@ static __inline__ long atomic64_sub_if_positive(long i, atomic64_t * v) unsigned long temp; __asm__ __volatile__( + " .set mips3 \n" "1: lld %1, %2 # atomic64_sub_if_positive\n" " dsubu %0, %1, %3 \n" " bltz %0, 1f \n" @@ -555,6 +617,7 @@ static __inline__ long atomic64_sub_if_positive(long i, atomic64_t * v) " beqz %0, 1b \n" " sync \n" "1: \n" + " .set mips0 \n" : "=&r" (result), "=&r" (temp), "=m" (v->counter) : "Ir" (i), "m" (v->counter) : "memory"); diff --git a/include/asm-mips/bitops.h b/include/asm-mips/bitops.h index eb8d79dba11c..5496f9064a6a 100644 --- a/include/asm-mips/bitops.h +++ b/include/asm-mips/bitops.h @@ -12,20 +12,21 @@ #include <linux/config.h> #include <linux/compiler.h> #include <linux/types.h> +#include <asm/bug.h> #include <asm/byteorder.h> /* sigh ... */ #include <asm/cpu-features.h> #if (_MIPS_SZLONG == 32) #define SZLONG_LOG 5 #define SZLONG_MASK 31UL -#define __LL "ll " -#define __SC "sc " +#define __LL "ll " +#define __SC "sc " #define cpu_to_lelongp(x) cpu_to_le32p((__u32 *) (x)) #elif (_MIPS_SZLONG == 64) #define SZLONG_LOG 6 #define SZLONG_MASK 63UL -#define __LL "lld " -#define __SC "scd " +#define __LL "lld " +#define __SC "scd " #define cpu_to_lelongp(x) cpu_to_le64p((__u64 *) (x)) #endif @@ -72,18 +73,22 @@ static inline void set_bit(unsigned long nr, volatile unsigned long *addr) if (cpu_has_llsc && R10000_LLSC_WAR) { __asm__ __volatile__( + " .set mips3 \n" "1: " __LL "%0, %1 # set_bit \n" " or %0, %2 \n" - " "__SC "%0, %1 \n" + " " __SC "%0, %1 \n" " beqzl %0, 1b \n" + " .set mips0 \n" : "=&r" (temp), "=m" (*m) : "ir" (1UL << (nr & SZLONG_MASK)), "m" (*m)); } else if (cpu_has_llsc) { __asm__ __volatile__( + " .set mips3 \n" "1: " __LL "%0, %1 # set_bit \n" " or %0, %2 \n" - " "__SC "%0, %1 \n" + " " __SC "%0, %1 \n" " beqz %0, 1b \n" + " .set mips0 \n" : "=&r" (temp), "=m" (*m) : "ir" (1UL << (nr & SZLONG_MASK)), "m" (*m)); } else { @@ -132,18 +137,22 @@ static inline void clear_bit(unsigned long nr, volatile unsigned long *addr) if (cpu_has_llsc && R10000_LLSC_WAR) { __asm__ __volatile__( + " .set mips3 \n" "1: " __LL "%0, %1 # clear_bit \n" " and %0, %2 \n" " " __SC "%0, %1 \n" " beqzl %0, 1b \n" + " .set mips0 \n" : "=&r" (temp), "=m" (*m) : "ir" (~(1UL << (nr & SZLONG_MASK))), "m" (*m)); } else if (cpu_has_llsc) { __asm__ __volatile__( + " .set mips3 \n" "1: " __LL "%0, %1 # clear_bit \n" " and %0, %2 \n" " " __SC "%0, %1 \n" " beqz %0, 1b \n" + " .set mips0 \n" : "=&r" (temp), "=m" (*m) : "ir" (~(1UL << (nr & SZLONG_MASK))), "m" (*m)); } else { @@ -191,10 +200,12 @@ static inline void change_bit(unsigned long nr, volatile unsigned long *addr) unsigned long temp; __asm__ __volatile__( + " .set mips3 \n" "1: " __LL "%0, %1 # change_bit \n" " xor %0, %2 \n" - " "__SC "%0, %1 \n" + " " __SC "%0, %1 \n" " beqzl %0, 1b \n" + " .set mips0 \n" : "=&r" (temp), "=m" (*m) : "ir" (1UL << (nr & SZLONG_MASK)), "m" (*m)); } else if (cpu_has_llsc) { @@ -202,10 +213,12 @@ static inline void change_bit(unsigned long nr, volatile unsigned long *addr) unsigned long temp; __asm__ __volatile__( + " .set mips3 \n" "1: " __LL "%0, %1 # change_bit \n" " xor %0, %2 \n" - " "__SC "%0, %1 \n" + " " __SC "%0, %1 \n" " beqz %0, 1b \n" + " .set mips0 \n" : "=&r" (temp), "=m" (*m) : "ir" (1UL << (nr & SZLONG_MASK)), "m" (*m)); } else { @@ -253,14 +266,16 @@ static inline int test_and_set_bit(unsigned long nr, unsigned long temp, res; __asm__ __volatile__( + " .set mips3 \n" "1: " __LL "%0, %1 # test_and_set_bit \n" " or %2, %0, %3 \n" " " __SC "%2, %1 \n" " beqzl %2, 1b \n" " and %2, %0, %3 \n" #ifdef CONFIG_SMP - "sync \n" + " sync \n" #endif + " .set mips0 \n" : "=&r" (temp), "=m" (*m), "=&r" (res) : "r" (1UL << (nr & SZLONG_MASK)), "m" (*m) : "memory"); @@ -271,16 +286,18 @@ static inline int test_and_set_bit(unsigned long nr, unsigned long temp, res; __asm__ __volatile__( - " .set noreorder # test_and_set_bit \n" - "1: " __LL "%0, %1 \n" + " .set push \n" + " .set noreorder \n" + " .set mips3 \n" + "1: " __LL "%0, %1 # test_and_set_bit \n" " or %2, %0, %3 \n" " " __SC "%2, %1 \n" " beqz %2, 1b \n" " and %2, %0, %3 \n" #ifdef CONFIG_SMP - "sync \n" + " sync \n" #endif - ".set\treorder" + " .set pop \n" : "=&r" (temp), "=m" (*m), "=&r" (res) : "r" (1UL << (nr & SZLONG_MASK)), "m" (*m) : "memory"); @@ -343,15 +360,17 @@ static inline int test_and_clear_bit(unsigned long nr, unsigned long temp, res; __asm__ __volatile__( + " .set mips3 \n" "1: " __LL "%0, %1 # test_and_clear_bit \n" " or %2, %0, %3 \n" " xor %2, %3 \n" - __SC "%2, %1 \n" + " " __SC "%2, %1 \n" " beqzl %2, 1b \n" " and %2, %0, %3 \n" #ifdef CONFIG_SMP " sync \n" #endif + " .set mips0 \n" : "=&r" (temp), "=m" (*m), "=&r" (res) : "r" (1UL << (nr & SZLONG_MASK)), "m" (*m) : "memory"); @@ -362,17 +381,19 @@ static inline int test_and_clear_bit(unsigned long nr, unsigned long temp, res; __asm__ __volatile__( - " .set noreorder # test_and_clear_bit \n" - "1: " __LL "%0, %1 \n" + " .set push \n" + " .set noreorder \n" + " .set mips3 \n" + "1: " __LL "%0, %1 # test_and_clear_bit \n" " or %2, %0, %3 \n" " xor %2, %3 \n" - __SC "%2, %1 \n" + " " __SC "%2, %1 \n" " beqz %2, 1b \n" " and %2, %0, %3 \n" #ifdef CONFIG_SMP " sync \n" #endif - " .set reorder \n" + " .set pop \n" : "=&r" (temp), "=m" (*m), "=&r" (res) : "r" (1UL << (nr & SZLONG_MASK)), "m" (*m) : "memory"); @@ -435,14 +456,16 @@ static inline int test_and_change_bit(unsigned long nr, unsigned long temp, res; __asm__ __volatile__( - "1: " __LL " %0, %1 # test_and_change_bit \n" + " .set mips3 \n" + "1: " __LL "%0, %1 # test_and_change_bit \n" " xor %2, %0, %3 \n" - " "__SC "%2, %1 \n" + " " __SC "%2, %1 \n" " beqzl %2, 1b \n" " and %2, %0, %3 \n" #ifdef CONFIG_SMP " sync \n" #endif + " .set mips0 \n" : "=&r" (temp), "=m" (*m), "=&r" (res) : "r" (1UL << (nr & SZLONG_MASK)), "m" (*m) : "memory"); @@ -453,16 +476,18 @@ static inline int test_and_change_bit(unsigned long nr, unsigned long temp, res; __asm__ __volatile__( - " .set noreorder # test_and_change_bit \n" - "1: " __LL " %0, %1 \n" + " .set push \n" + " .set noreorder \n" + " .set mips3 \n" + "1: " __LL "%0, %1 # test_and_change_bit \n" " xor %2, %0, %3 \n" - " "__SC "\t%2, %1 \n" + " " __SC "\t%2, %1 \n" " beqz %2, 1b \n" " and %2, %0, %3 \n" #ifdef CONFIG_SMP " sync \n" #endif - " .set reorder \n" + " .set pop \n" : "=&r" (temp), "=m" (*m), "=&r" (res) : "r" (1UL << (nr & SZLONG_MASK)), "m" (*m) : "memory"); @@ -523,22 +548,60 @@ static inline int test_bit(unsigned long nr, const volatile unsigned long *addr) } /* - * ffz - find first zero in word. + * Return the bit position (0..63) of the most significant 1 bit in a word + * Returns -1 if no 1 bit exists + */ +static inline int __ilog2(unsigned long x) +{ + int lz; + + if (sizeof(x) == 4) { + __asm__ ( + " .set push \n" + " .set mips32 \n" + " clz %0, %1 \n" + " .set pop \n" + : "=r" (lz) + : "r" (x)); + + return 31 - lz; + } + + BUG_ON(sizeof(x) != 8); + + __asm__ ( + " .set push \n" + " .set mips64 \n" + " dclz %0, %1 \n" + " .set pop \n" + : "=r" (lz) + : "r" (x)); + + return 63 - lz; +} + +/* + * __ffs - find first bit in word. * @word: The word to search * - * Undefined if no zero exists, so code should check against ~0UL first. + * Returns 0..SZLONG-1 + * Undefined if no bit exists, so code should check against 0 first. */ -static inline unsigned long ffz(unsigned long word) +static inline unsigned long __ffs(unsigned long word) { +#if defined(CONFIG_CPU_MIPS32) || defined(CONFIG_CPU_MIPS64) + return __ilog2(word & -word); +#else int b = 0, s; - word = ~word; #ifdef CONFIG_32BIT s = 16; if (word << 16 != 0) s = 0; b += s; word >>= s; s = 8; if (word << 24 != 0) s = 0; b += s; word >>= s; s = 4; if (word << 28 != 0) s = 0; b += s; word >>= s; s = 2; if (word << 30 != 0) s = 0; b += s; word >>= s; s = 1; if (word << 31 != 0) s = 0; b += s; + + return b; #endif #ifdef CONFIG_64BIT s = 32; if (word << 32 != 0) s = 0; b += s; word >>= s; @@ -547,27 +610,92 @@ static inline unsigned long ffz(unsigned long word) s = 4; if (word << 60 != 0) s = 0; b += s; word >>= s; s = 2; if (word << 62 != 0) s = 0; b += s; word >>= s; s = 1; if (word << 63 != 0) s = 0; b += s; -#endif return b; +#endif +#endif } /* - * __ffs - find first bit in word. + * ffs - find first bit set. * @word: The word to search * - * Undefined if no bit exists, so code should check against 0 first. + * Returns 1..SZLONG + * Returns 0 if no bit exists */ -static inline unsigned long __ffs(unsigned long word) + +static inline unsigned long ffs(unsigned long word) { - return ffz(~word); + if (!word) + return 0; + + return __ffs(word) + 1; } /* - * fls: find last bit set. + * ffz - find first zero in word. + * @word: The word to search + * + * Undefined if no zero exists, so code should check against ~0UL first. + */ +static inline unsigned long ffz(unsigned long word) +{ + return __ffs (~word); +} + +/* + * flz - find last zero in word. + * @word: The word to search + * + * Returns 0..SZLONG-1 + * Undefined if no zero exists, so code should check against ~0UL first. + */ +static inline unsigned long flz(unsigned long word) +{ +#if defined(CONFIG_CPU_MIPS32) || defined(CONFIG_CPU_MIPS64) + return __ilog2(~word); +#else +#ifdef CONFIG_32BIT + int r = 31, s; + word = ~word; + s = 16; if ((word & 0xffff0000)) s = 0; r -= s; word <<= s; + s = 8; if ((word & 0xff000000)) s = 0; r -= s; word <<= s; + s = 4; if ((word & 0xf0000000)) s = 0; r -= s; word <<= s; + s = 2; if ((word & 0xc0000000)) s = 0; r -= s; word <<= s; + s = 1; if ((word & 0x80000000)) s = 0; r -= s; + + return r; +#endif +#ifdef CONFIG_64BIT + int r = 63, s; + word = ~word; + s = 32; if ((word & 0xffffffff00000000UL)) s = 0; r -= s; word <<= s; + s = 16; if ((word & 0xffff000000000000UL)) s = 0; r -= s; word <<= s; + s = 8; if ((word & 0xff00000000000000UL)) s = 0; r -= s; word <<= s; + s = 4; if ((word & 0xf000000000000000UL)) s = 0; r -= s; word <<= s; + s = 2; if ((word & 0xc000000000000000UL)) s = 0; r -= s; word <<= s; + s = 1; if ((word & 0x8000000000000000UL)) s = 0; r -= s; + + return r; +#endif +#endif +} + +/* + * fls - find last bit set. + * @word: The word to search + * + * Returns 1..SZLONG + * Returns 0 if no bit exists */ +static inline unsigned long fls(unsigned long word) +{ + if (word == 0) + return 0; + + return flz(~word) + 1; +} -#define fls(x) generic_fls(x) /* * find_next_zero_bit - find the first zero bit in a memory region @@ -704,17 +832,6 @@ static inline int sched_find_first_bit(const unsigned long *b) } /* - * ffs - find first bit set - * @x: the word to search - * - * This is defined the same way as - * the libc and compiler builtin ffs routines, therefore - * differs in spirit from the above ffz (man ffs). - */ - -#define ffs(x) generic_ffs(x) - -/* * hweightN - returns the hamming weight of a N-bit word * @x: the word to weigh * diff --git a/include/asm-mips/bootinfo.h b/include/asm-mips/bootinfo.h index b1e57d783604..14fc88f27226 100644 --- a/include/asm-mips/bootinfo.h +++ b/include/asm-mips/bootinfo.h @@ -77,6 +77,7 @@ #define MACH_SGI_IP27 1 /* Origin 200, Origin 2000, Onyx 2 */ #define MACH_SGI_IP28 2 /* Indigo2 Impact */ #define MACH_SGI_IP32 3 /* O2 */ +#define MACH_SGI_IP30 4 /* Octane, Octane2 */ /* * Valid machtype for group COBALT @@ -136,6 +137,7 @@ #define MACH_GROUP_PHILIPS 14 #define MACH_PHILIPS_NINO 0 /* Nino */ #define MACH_PHILIPS_VELO 1 /* Velo */ +#define MACH_PHILIPS_JBS 2 /* JBS */ /* * Valid machtype for group Globespan @@ -159,6 +161,7 @@ #define MACH_TOSHIBA_JMR3927 3 /* JMR-TX3927 CPU/IO board */ #define MACH_TOSHIBA_RBTX4927 4 #define MACH_TOSHIBA_RBTX4937 5 +#define MACH_TOSHIBA_RBTX4938 6 #define GROUP_TOSHIBA_NAMES { "Pallas", "TopasCE", "JMR", "JMR TX3927", \ "RBTX4927", "RBTX4937" } @@ -177,6 +180,8 @@ #define MACH_MTX1 7 /* 4G MTX-1 Au1500-based board */ #define MACH_PB1550 8 /* Au1550-based eval board */ #define MACH_DB1550 9 /* Au1550-based eval board */ +#define MACH_PB1200 10 /* Au1200-based eval board */ +#define MACH_DB1200 11 /* Au1200-based eval board */ /* * Valid machtype for group NEC_VR41XX diff --git a/include/asm-mips/break.h b/include/asm-mips/break.h index 2e6de788f207..25b980c91e7e 100644 --- a/include/asm-mips/break.h +++ b/include/asm-mips/break.h @@ -28,6 +28,7 @@ #define BRK_NORLD 10 /* No rld found - not used by Linux/MIPS */ #define _BRK_THREADBP 11 /* For threads, user bp (used by debuggers) */ #define BRK_BUG 512 /* Used by BUG() */ +#define BRK_KDB 513 /* Used in KDB_ENTER() */ #define BRK_MULOVF 1023 /* Multiply overflow */ #endif /* __ASM_BREAK_H */ diff --git a/include/asm-mips/bug.h b/include/asm-mips/bug.h index 3f594b440abc..87d49a5bdc63 100644 --- a/include/asm-mips/bug.h +++ b/include/asm-mips/bug.h @@ -1,16 +1,21 @@ #ifndef __ASM_BUG_H #define __ASM_BUG_H -#include <asm/break.h> +#include <linux/config.h> #ifdef CONFIG_BUG -#define HAVE_ARCH_BUG + +#include <asm/break.h> + #define BUG() \ do { \ __asm__ __volatile__("break %0" : : "i" (BRK_BUG)); \ } while (0) + +#define HAVE_ARCH_BUG + #endif #include <asm-generic/bug.h> -#endif +#endif /* __ASM_BUG_H */ diff --git a/include/asm-mips/bugs.h b/include/asm-mips/bugs.h index b14b961c2100..cb2ea7c15c7a 100644 --- a/include/asm-mips/bugs.h +++ b/include/asm-mips/bugs.h @@ -8,12 +8,18 @@ #define _ASM_BUGS_H #include <linux/config.h> +#include <linux/delay.h> +#include <asm/cpu.h> +#include <asm/cpu-info.h> extern void check_bugs32(void); extern void check_bugs64(void); static inline void check_bugs(void) { + unsigned int cpu = smp_processor_id(); + + cpu_data[cpu].udelay_val = loops_per_jiffy; check_bugs32(); #ifdef CONFIG_64BIT check_bugs64(); diff --git a/include/asm-mips/cache.h b/include/asm-mips/cache.h index 4517bdf20953..1a5d1a669db3 100644 --- a/include/asm-mips/cache.h +++ b/include/asm-mips/cache.h @@ -10,6 +10,7 @@ #define _ASM_CACHE_H #include <linux/config.h> +#include <kmalloc.h> #define L1_CACHE_SHIFT CONFIG_MIPS_L1_CACHE_SHIFT #define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT) @@ -18,6 +19,4 @@ #define SMP_CACHE_SHIFT L1_CACHE_SHIFT #define SMP_CACHE_BYTES L1_CACHE_BYTES -#define ARCH_KMALLOC_MINALIGN 8 - #endif /* _ASM_CACHE_H */ diff --git a/include/asm-mips/cacheflush.h b/include/asm-mips/cacheflush.h index 635f1bfb403e..a18ba2edc0b6 100644 --- a/include/asm-mips/cacheflush.h +++ b/include/asm-mips/cacheflush.h @@ -49,17 +49,29 @@ static inline void flush_dcache_page(struct page *page) extern void (*flush_icache_page)(struct vm_area_struct *vma, struct page *page); -extern void (*flush_icache_range)(unsigned long start, unsigned long end); +extern void (*flush_icache_range)(unsigned long __user start, + unsigned long __user end); #define flush_cache_vmap(start, end) flush_cache_all() #define flush_cache_vunmap(start, end) flush_cache_all() -#define copy_to_user_page(vma, page, vaddr, dst, src, len) \ -do { \ - memcpy(dst, (void *) src, len); \ - flush_icache_page(vma, page); \ -} while (0) -#define copy_from_user_page(vma, page, vaddr, dst, src, len) \ - memcpy(dst, src, len) +static inline void copy_to_user_page(struct vm_area_struct *vma, + struct page *page, unsigned long vaddr, void *dst, const void *src, + unsigned long len) +{ + if (cpu_has_dc_aliases) + flush_cache_page(vma, vaddr, page_to_pfn(page)); + memcpy(dst, src, len); + flush_icache_page(vma, page); +} + +static inline void copy_from_user_page(struct vm_area_struct *vma, + struct page *page, unsigned long vaddr, void *dst, const void *src, + unsigned long len) +{ + if (cpu_has_dc_aliases) + flush_cache_page(vma, vaddr, page_to_pfn(page)); + memcpy(dst, src, len); +} extern void (*flush_cache_sigtramp)(unsigned long addr); extern void (*flush_icache_all)(void); @@ -78,4 +90,7 @@ extern void (*flush_data_cache_page)(unsigned long addr); #define ClearPageDcacheDirty(page) \ clear_bit(PG_dcache_dirty, &(page)->flags) +/* Run kernel code uncached, useful for cache probing functions. */ +unsigned long __init run_uncached(void *func); + #endif /* _ASM_CACHEFLUSH_H */ diff --git a/include/asm-mips/checksum.h b/include/asm-mips/checksum.h index c1ea5a8714f3..b09f8971e95d 100644 --- a/include/asm-mips/checksum.h +++ b/include/asm-mips/checksum.h @@ -34,8 +34,9 @@ unsigned int csum_partial(const unsigned char *buff, int len, unsigned int sum); * this is a new version of the above that records errors it finds in *errp, * but continues and zeros the rest of the buffer. */ -unsigned int csum_partial_copy_from_user(const unsigned char *src, unsigned char *dst, int len, - unsigned int sum, int *errp); +unsigned int csum_partial_copy_from_user(const unsigned char __user *src, + unsigned char *dst, int len, + unsigned int sum, int *errp); /* * Copy and checksum to user @@ -70,14 +71,15 @@ unsigned int csum_partial_copy_nocheck(const unsigned char *src, unsigned char * static inline unsigned short int csum_fold(unsigned int sum) { __asm__( - ".set\tnoat\t\t\t# csum_fold\n\t" - "sll\t$1,%0,16\n\t" - "addu\t%0,$1\n\t" - "sltu\t$1,%0,$1\n\t" - "srl\t%0,%0,16\n\t" - "addu\t%0,$1\n\t" - "xori\t%0,0xffff\n\t" - ".set\tat" + " .set push # csum_fold\n" + " .set noat \n" + " sll $1, %0, 16 \n" + " addu %0, $1 \n" + " sltu $1, %0, $1 \n" + " srl %0, %0, 16 \n" + " addu %0, $1 \n" + " xori %0, 0xffff \n" + " .set pop" : "=r" (sum) : "0" (sum)); @@ -127,29 +129,30 @@ static inline unsigned int csum_tcpudp_nofold(unsigned long saddr, unsigned int sum) { __asm__( - ".set\tnoat\t\t\t# csum_tcpudp_nofold\n\t" + " .set push # csum_tcpudp_nofold\n" + " .set noat \n" #ifdef CONFIG_32BIT - "addu\t%0, %2\n\t" - "sltu\t$1, %0, %2\n\t" - "addu\t%0, $1\n\t" + " addu %0, %2 \n" + " sltu $1, %0, %2 \n" + " addu %0, $1 \n" - "addu\t%0, %3\n\t" - "sltu\t$1, %0, %3\n\t" - "addu\t%0, $1\n\t" + " addu %0, %3 \n" + " sltu $1, %0, %3 \n" + " addu %0, $1 \n" - "addu\t%0, %4\n\t" - "sltu\t$1, %0, %4\n\t" - "addu\t%0, $1\n\t" + " addu %0, %4 \n" + " sltu $1, %0, %4 \n" + " addu %0, $1 \n" #endif #ifdef CONFIG_64BIT - "daddu\t%0, %2\n\t" - "daddu\t%0, %3\n\t" - "daddu\t%0, %4\n\t" - "dsll32\t$1, %0, 0\n\t" - "daddu\t%0, $1\n\t" - "dsrl32\t%0, %0, 0\n\t" + " daddu %0, %2 \n" + " daddu %0, %3 \n" + " daddu %0, %4 \n" + " dsll32 $1, %0, 0 \n" + " daddu %0, $1 \n" + " dsra32 %0, %0, 0 \n" #endif - ".set\tat" + " .set pop" : "=r" (sum) : "0" (daddr), "r"(saddr), #ifdef __MIPSEL__ @@ -192,57 +195,57 @@ static __inline__ unsigned short int csum_ipv6_magic(struct in6_addr *saddr, unsigned int sum) { __asm__( - ".set\tpush\t\t\t# csum_ipv6_magic\n\t" - ".set\tnoreorder\n\t" - ".set\tnoat\n\t" - "addu\t%0, %5\t\t\t# proto (long in network byte order)\n\t" - "sltu\t$1, %0, %5\n\t" - "addu\t%0, $1\n\t" - - "addu\t%0, %6\t\t\t# csum\n\t" - "sltu\t$1, %0, %6\n\t" - "lw\t%1, 0(%2)\t\t\t# four words source address\n\t" - "addu\t%0, $1\n\t" - "addu\t%0, %1\n\t" - "sltu\t$1, %0, %1\n\t" - - "lw\t%1, 4(%2)\n\t" - "addu\t%0, $1\n\t" - "addu\t%0, %1\n\t" - "sltu\t$1, %0, %1\n\t" - - "lw\t%1, 8(%2)\n\t" - "addu\t%0, $1\n\t" - "addu\t%0, %1\n\t" - "sltu\t$1, %0, %1\n\t" - - "lw\t%1, 12(%2)\n\t" - "addu\t%0, $1\n\t" - "addu\t%0, %1\n\t" - "sltu\t$1, %0, %1\n\t" - - "lw\t%1, 0(%3)\n\t" - "addu\t%0, $1\n\t" - "addu\t%0, %1\n\t" - "sltu\t$1, %0, %1\n\t" - - "lw\t%1, 4(%3)\n\t" - "addu\t%0, $1\n\t" - "addu\t%0, %1\n\t" - "sltu\t$1, %0, %1\n\t" - - "lw\t%1, 8(%3)\n\t" - "addu\t%0, $1\n\t" - "addu\t%0, %1\n\t" - "sltu\t$1, %0, %1\n\t" - - "lw\t%1, 12(%3)\n\t" - "addu\t%0, $1\n\t" - "addu\t%0, %1\n\t" - "sltu\t$1, %0, %1\n\t" - - "addu\t%0, $1\t\t\t# Add final carry\n\t" - ".set\tpop" + " .set push # csum_ipv6_magic\n" + " .set noreorder \n" + " .set noat \n" + " addu %0, %5 # proto (long in network byte order)\n" + " sltu $1, %0, %5 \n" + " addu %0, $1 \n" + + " addu %0, %6 # csum\n" + " sltu $1, %0, %6 \n" + " lw %1, 0(%2) # four words source address\n" + " addu %0, $1 \n" + " addu %0, %1 \n" + " sltu $1, %0, %1 \n" + + " lw %1, 4(%2) \n" + " addu %0, $1 \n" + " addu %0, %1 \n" + " sltu $1, %0, %1 \n" + + " lw %1, 8(%2) \n" + " addu %0, $1 \n" + " addu %0, %1 \n" + " sltu $1, %0, %1 \n" + + " lw %1, 12(%2) \n" + " addu %0, $1 \n" + " addu %0, %1 \n" + " sltu $1, %0, %1 \n" + + " lw %1, 0(%3) \n" + " addu %0, $1 \n" + " addu %0, %1 \n" + " sltu $1, %0, %1 \n" + + " lw %1, 4(%3) \n" + " addu %0, $1 \n" + " addu %0, %1 \n" + " sltu $1, %0, %1 \n" + + " lw %1, 8(%3) \n" + " addu %0, $1 \n" + " addu %0, %1 \n" + " sltu $1, %0, %1 \n" + + " lw %1, 12(%3) \n" + " addu %0, $1 \n" + " addu %0, %1 \n" + " sltu $1, %0, %1 \n" + + " addu %0, $1 # Add final carry\n" + " .set pop" : "=r" (sum), "=r" (proto) : "r" (saddr), "r" (daddr), "0" (htonl(len)), "1" (htonl(proto)), "r" (sum)); diff --git a/include/asm-mips/cobalt/cobalt.h b/include/asm-mips/cobalt/cobalt.h index ca1fbc0579fe..78e1df2095fb 100644 --- a/include/asm-mips/cobalt/cobalt.h +++ b/include/asm-mips/cobalt/cobalt.h @@ -19,18 +19,23 @@ * 9 - PCI * 14 - IDE0 * 15 - IDE1 - * + */ +#define COBALT_QUBE_SLOT_IRQ 9 + +/* * CPU IRQs are 16 ... 23 */ -#define COBALT_TIMER_IRQ 18 -#define COBALT_SCC_IRQ 19 /* pre-production has 85C30 */ -#define COBALT_RAQ_SCSI_IRQ 19 -#define COBALT_ETH0_IRQ 19 -#define COBALT_ETH1_IRQ 20 -#define COBALT_SERIAL_IRQ 21 -#define COBALT_SCSI_IRQ 21 -#define COBALT_VIA_IRQ 22 /* Chained to VIA ISA bridge */ -#define COBALT_QUBE_SLOT_IRQ 23 +#define COBALT_CPU_IRQ 16 + +#define COBALT_GALILEO_IRQ (COBALT_CPU_IRQ + 2) +#define COBALT_SCC_IRQ (COBALT_CPU_IRQ + 3) /* pre-production has 85C30 */ +#define COBALT_RAQ_SCSI_IRQ (COBALT_CPU_IRQ + 3) +#define COBALT_ETH0_IRQ (COBALT_CPU_IRQ + 3) +#define COBALT_QUBE1_ETH0_IRQ (COBALT_CPU_IRQ + 4) +#define COBALT_ETH1_IRQ (COBALT_CPU_IRQ + 4) +#define COBALT_SERIAL_IRQ (COBALT_CPU_IRQ + 5) +#define COBALT_SCSI_IRQ (COBALT_CPU_IRQ + 5) +#define COBALT_VIA_IRQ (COBALT_CPU_IRQ + 6) /* Chained to VIA ISA bridge */ /* * PCI configuration space manifest constants. These are wired into @@ -69,16 +74,21 @@ * Most of this really should go into a separate GT64111 header file. */ #define GT64111_IO_BASE 0x10000000UL +#define GT64111_IO_END 0x11ffffffUL +#define GT64111_MEM_BASE 0x12000000UL +#define GT64111_MEM_END 0x13ffffffUL #define GT64111_BASE 0x14000000UL -#define GALILEO_REG(ofs) (KSEG0 + GT64111_BASE + (unsigned long)(ofs)) +#define GALILEO_REG(ofs) CKSEG1ADDR(GT64111_BASE + (unsigned long)(ofs)) #define GALILEO_INL(port) (*(volatile unsigned int *) GALILEO_REG(port)) #define GALILEO_OUTL(val, port) \ do { \ - *(volatile unsigned int *) GALILEO_REG(port) = (port); \ + *(volatile unsigned int *) GALILEO_REG(port) = (val); \ } while (0) -#define GALILEO_T0EXP 0x0100 +#define GALILEO_INTR_T0EXP (1 << 8) +#define GALILEO_INTR_RETRY_CTR (1 << 20) + #define GALILEO_ENTC0 0x01 #define GALILEO_SELTC0 0x02 @@ -86,5 +96,21 @@ do { \ GALILEO_OUTL((0x80000000 | (PCI_SLOT (devfn) << 11) | \ (PCI_FUNC (devfn) << 8) | (where)), GT_PCI0_CFGADDR_OFS) +#define COBALT_LED_PORT (*(volatile unsigned char *) CKSEG1ADDR(0x1c000000)) +# define COBALT_LED_BAR_LEFT (1 << 0) /* Qube */ +# define COBALT_LED_BAR_RIGHT (1 << 1) /* Qube */ +# define COBALT_LED_WEB (1 << 2) /* RaQ */ +# define COBALT_LED_POWER_OFF (1 << 3) /* RaQ */ +# define COBALT_LED_RESET 0x0f + +#define COBALT_KEY_PORT ((~*(volatile unsigned int *) CKSEG1ADDR(0x1d000000) >> 24) & COBALT_KEY_MASK) +# define COBALT_KEY_CLEAR (1 << 1) +# define COBALT_KEY_LEFT (1 << 2) +# define COBALT_KEY_UP (1 << 3) +# define COBALT_KEY_DOWN (1 << 4) +# define COBALT_KEY_RIGHT (1 << 5) +# define COBALT_KEY_ENTER (1 << 6) +# define COBALT_KEY_SELECT (1 << 7) +# define COBALT_KEY_MASK 0xfe #endif /* __ASM_COBALT_H */ diff --git a/include/asm-mips/cobalt/mach-gt64120.h b/include/asm-mips/cobalt/mach-gt64120.h new file mode 100644 index 000000000000..587fc4378f44 --- /dev/null +++ b/include/asm-mips/cobalt/mach-gt64120.h @@ -0,0 +1 @@ +/* there's something here ... in the dark */ diff --git a/include/asm-mips/compat.h b/include/asm-mips/compat.h index 2c084cd4bc0a..35d2604fe69c 100644 --- a/include/asm-mips/compat.h +++ b/include/asm-mips/compat.h @@ -15,10 +15,10 @@ typedef s32 compat_clock_t; typedef s32 compat_suseconds_t; typedef s32 compat_pid_t; -typedef u32 __compat_uid_t; -typedef u32 __compat_gid_t; -typedef u32 __compat_uid32_t; -typedef u32 __compat_gid32_t; +typedef s32 __compat_uid_t; +typedef s32 __compat_gid_t; +typedef __compat_uid_t __compat_uid32_t; +typedef __compat_gid_t __compat_gid32_t; typedef u32 compat_mode_t; typedef u32 compat_ino_t; typedef u32 compat_dev_t; @@ -54,8 +54,8 @@ struct compat_stat { compat_ino_t st_ino; compat_mode_t st_mode; compat_nlink_t st_nlink; - __compat_uid32_t st_uid; - __compat_gid32_t st_gid; + __compat_uid_t st_uid; + __compat_gid_t st_gid; compat_dev_t st_rdev; s32 st_pad2[2]; compat_off_t st_size; diff --git a/include/asm-mips/cpu-features.h b/include/asm-mips/cpu-features.h index 9a2de642eee6..03627cfb3e45 100644 --- a/include/asm-mips/cpu-features.h +++ b/include/asm-mips/cpu-features.h @@ -4,6 +4,7 @@ * for more details. * * Copyright (C) 2003, 2004 Ralf Baechle + * Copyright (C) 2004 Maciej W. Rozycki */ #ifndef __ASM_CPU_FEATURES_H #define __ASM_CPU_FEATURES_H @@ -24,8 +25,19 @@ #ifndef cpu_has_4kex #define cpu_has_4kex (cpu_data[0].options & MIPS_CPU_4KEX) #endif -#ifndef cpu_has_4ktlb -#define cpu_has_4ktlb (cpu_data[0].options & MIPS_CPU_4KTLB) +#ifndef cpu_has_3k_cache +#define cpu_has_3k_cache (cpu_data[0].options & MIPS_CPU_3K_CACHE) +#endif +#define cpu_has_6k_cache 0 +#define cpu_has_8k_cache 0 +#ifndef cpu_has_4k_cache +#define cpu_has_4k_cache (cpu_data[0].options & MIPS_CPU_4K_CACHE) +#endif +#ifndef cpu_has_tx39_cache +#define cpu_has_tx39_cache (cpu_data[0].options & MIPS_CPU_TX39_CACHE) +#endif +#ifndef cpu_has_sb1_cache +#define cpu_has_sb1_cache (cpu_data[0].options & MIPS_CPU_SB1_CACHE) #endif #ifndef cpu_has_fpu #define cpu_has_fpu (cpu_data[0].options & MIPS_CPU_FPU) @@ -39,9 +51,6 @@ #ifndef cpu_has_watch #define cpu_has_watch (cpu_data[0].options & MIPS_CPU_WATCH) #endif -#ifndef cpu_has_mips16 -#define cpu_has_mips16 (cpu_data[0].options & MIPS_CPU_MIPS16) -#endif #ifndef cpu_has_divec #define cpu_has_divec (cpu_data[0].options & MIPS_CPU_DIVEC) #endif @@ -66,6 +75,18 @@ #ifndef cpu_has_llsc #define cpu_has_llsc (cpu_data[0].options & MIPS_CPU_LLSC) #endif +#ifndef cpu_has_mips16 +#define cpu_has_mips16 (cpu_data[0].ases & MIPS_ASE_MIPS16) +#endif +#ifndef cpu_has_mdmx +#define cpu_has_mdmx (cpu_data[0].ases & MIPS_ASE_MDMX) +#endif +#ifndef cpu_has_mips3d +#define cpu_has_mips3d (cpu_data[0].ases & MIPS_ASE_MIPS3D) +#endif +#ifndef cpu_has_smartmips +#define cpu_has_smartmips (cpu_data[0].ases & MIPS_ASE_SMARTMIPS) +#endif #ifndef cpu_has_vtag_icache #define cpu_has_vtag_icache (cpu_data[0].icache.flags & MIPS_CACHE_VTAG) #endif @@ -95,15 +116,16 @@ #endif #endif -/* - * Certain CPUs may throw bizarre exceptions if not the whole cacheline - * contains valid instructions. For these we ensure proper alignment of - * signal trampolines and pad them to the size of a full cache lines with - * nops. This is also used in structure definitions so can't be a test macro - * like the others. - */ -#ifndef PLAT_TRAMPOLINE_STUFF_LINE -#define PLAT_TRAMPOLINE_STUFF_LINE 0UL +#ifndef cpu_has_dsp +#define cpu_has_dsp (cpu_data[0].ases & MIPS_ASE_DSP) +#endif + +#ifdef CONFIG_MIPS_MT +#ifndef cpu_has_mipsmt +# define cpu_has_mipsmt (cpu_data[0].ases & MIPS_ASE_MIPSMT) +#endif +#else +# define cpu_has_mipsmt 0 #endif #ifdef CONFIG_32BIT @@ -142,6 +164,22 @@ # endif #endif +#ifdef CONFIG_CPU_MIPSR2 +# if defined(CONFIG_CPU_MIPSR2_IRQ_VI) && !defined(cpu_has_vint) +# define cpu_has_vint (cpu_data[0].options & MIPS_CPU_VINT) +# else +# define cpu_has_vint 0 +# endif +# if defined(CONFIG_CPU_MIPSR2_IRQ_EI) && !defined(cpu_has_veic) +# define cpu_has_veic (cpu_data[0].options & MIPS_CPU_VEIC) +# else +# define cpu_has_veic 0 +# endif +#else +# define cpu_has_vint 0 +# define cpu_has_veic 0 +#endif + #ifndef cpu_has_subset_pcaches #define cpu_has_subset_pcaches (cpu_data[0].options & MIPS_CPU_SUBSET_CACHES) #endif diff --git a/include/asm-mips/cpu-info.h b/include/asm-mips/cpu-info.h index 20a35b15a31d..d5cf519f8fcc 100644 --- a/include/asm-mips/cpu-info.h +++ b/include/asm-mips/cpu-info.h @@ -7,6 +7,7 @@ * Copyright (C) 1995, 1996, 1997, 1998, 1999, 2001, 2002, 2003 Ralf Baechle * Copyright (C) 1996 Paul M. Antoine * Copyright (C) 1999, 2000 Silicon Graphics, Inc. + * Copyright (C) 2004 Maciej W. Rozycki */ #ifndef __ASM_CPU_INFO_H #define __ASM_CPU_INFO_H @@ -61,6 +62,7 @@ struct cpuinfo_mips { * Capability and feature descriptor structure for MIPS CPU */ unsigned long options; + unsigned long ases; unsigned int processor_id; unsigned int fpu_id; unsigned int cputype; diff --git a/include/asm-mips/cpu.h b/include/asm-mips/cpu.h index dec060b49556..48eac296060f 100644 --- a/include/asm-mips/cpu.h +++ b/include/asm-mips/cpu.h @@ -3,6 +3,7 @@ * various MIPS cpu types. * * Copyright (C) 1996 David S. Miller (dm@engr.sgi.com) + * Copyright (C) 2004 Maciej W. Rozycki */ #ifndef _ASM_CPU_H #define _ASM_CPU_H @@ -22,12 +23,17 @@ spec. */ -#define PRID_COMP_LEGACY 0x000000 -#define PRID_COMP_MIPS 0x010000 -#define PRID_COMP_BROADCOM 0x020000 -#define PRID_COMP_ALCHEMY 0x030000 -#define PRID_COMP_SIBYTE 0x040000 -#define PRID_COMP_SANDCRAFT 0x050000 +#define PRID_COMP_LEGACY 0x000000 +#define PRID_COMP_MIPS 0x010000 +#define PRID_COMP_BROADCOM 0x020000 +#define PRID_COMP_ALCHEMY 0x030000 +#define PRID_COMP_SIBYTE 0x040000 +#define PRID_COMP_SANDCRAFT 0x050000 +#define PRID_COMP_PHILIPS 0x060000 +#define PRID_COMP_TOSHIBA 0x070000 +#define PRID_COMP_LSI 0x080000 +#define PRID_COMP_LEXRA 0x0b0000 + /* * Assigned values for the product ID register. In order to detect a @@ -46,6 +52,7 @@ #define PRID_IMP_VR41XX 0x0c00 #define PRID_IMP_R12000 0x0e00 #define PRID_IMP_R8000 0x1000 +#define PRID_IMP_PR4450 0x1200 #define PRID_IMP_R4600 0x2000 #define PRID_IMP_R4700 0x2100 #define PRID_IMP_TX39 0x2200 @@ -60,6 +67,13 @@ #define PRID_IMP_RM9000 0x3400 #define PRID_IMP_R5432 0x5400 #define PRID_IMP_R5500 0x5500 + +#define PRID_IMP_UNKNOWN 0xff00 + +/* + * These are the PRID's for when 23:16 == PRID_COMP_MIPS + */ + #define PRID_IMP_4KC 0x8000 #define PRID_IMP_5KC 0x8100 #define PRID_IMP_20KC 0x8200 @@ -71,14 +85,15 @@ #define PRID_IMP_4KEMPR2 0x9100 #define PRID_IMP_4KSD 0x9200 #define PRID_IMP_24K 0x9300 - -#define PRID_IMP_UNKNOWN 0xff00 +#define PRID_IMP_34K 0x9500 +#define PRID_IMP_24KE 0x9600 /* * These are the PRID's for when 23:16 == PRID_COMP_SIBYTE */ #define PRID_IMP_SB1 0x0100 +#define PRID_IMP_SB1A 0x1100 /* * These are the PRID's for when 23:16 == PRID_COMP_SANDCRAFT @@ -177,7 +192,11 @@ #define CPU_VR4133 56 #define CPU_AU1550 57 #define CPU_24K 58 -#define CPU_LAST 58 +#define CPU_AU1200 59 +#define CPU_34K 60 +#define CPU_PR4450 61 +#define CPU_SB1A 62 +#define CPU_LAST 62 /* * ISA Level encodings @@ -200,23 +219,37 @@ * CPU Option encodings */ #define MIPS_CPU_TLB 0x00000001 /* CPU has TLB */ -/* Leave a spare bit for variant MMU types... */ -#define MIPS_CPU_4KEX 0x00000004 /* "R4K" exception model */ -#define MIPS_CPU_4KTLB 0x00000008 /* "R4K" TLB handler */ -#define MIPS_CPU_FPU 0x00000010 /* CPU has FPU */ -#define MIPS_CPU_32FPR 0x00000020 /* 32 dbl. prec. FP registers */ -#define MIPS_CPU_COUNTER 0x00000040 /* Cycle count/compare */ -#define MIPS_CPU_WATCH 0x00000080 /* watchpoint registers */ -#define MIPS_CPU_MIPS16 0x00000100 /* code compression */ -#define MIPS_CPU_DIVEC 0x00000200 /* dedicated interrupt vector */ -#define MIPS_CPU_VCE 0x00000400 /* virt. coherence conflict possible */ -#define MIPS_CPU_CACHE_CDEX_P 0x00000800 /* Create_Dirty_Exclusive CACHE op */ -#define MIPS_CPU_CACHE_CDEX_S 0x00001000 /* ... same for seconary cache ... */ -#define MIPS_CPU_MCHECK 0x00002000 /* Machine check exception */ -#define MIPS_CPU_EJTAG 0x00004000 /* EJTAG exception */ -#define MIPS_CPU_NOFPUEX 0x00008000 /* no FPU exception */ -#define MIPS_CPU_LLSC 0x00010000 /* CPU has ll/sc instructions */ -#define MIPS_CPU_SUBSET_CACHES 0x00020000 /* P-cache subset enforced */ -#define MIPS_CPU_PREFETCH 0x00040000 /* CPU has usable prefetch */ +#define MIPS_CPU_4KEX 0x00000002 /* "R4K" exception model */ +#define MIPS_CPU_3K_CACHE 0x00000004 /* R3000-style caches */ +#define MIPS_CPU_4K_CACHE 0x00000008 /* R4000-style caches */ +#define MIPS_CPU_TX39_CACHE 0x00000010 /* TX3900-style caches */ +#define MIPS_CPU_SB1_CACHE 0x00000020 /* SB1-style caches */ +#define MIPS_CPU_FPU 0x00000040 /* CPU has FPU */ +#define MIPS_CPU_32FPR 0x00000080 /* 32 dbl. prec. FP registers */ +#define MIPS_CPU_COUNTER 0x00000100 /* Cycle count/compare */ +#define MIPS_CPU_WATCH 0x00000200 /* watchpoint registers */ +#define MIPS_CPU_DIVEC 0x00000400 /* dedicated interrupt vector */ +#define MIPS_CPU_VCE 0x00000800 /* virt. coherence conflict possible */ +#define MIPS_CPU_CACHE_CDEX_P 0x00001000 /* Create_Dirty_Exclusive CACHE op */ +#define MIPS_CPU_CACHE_CDEX_S 0x00002000 /* ... same for seconary cache ... */ +#define MIPS_CPU_MCHECK 0x00004000 /* Machine check exception */ +#define MIPS_CPU_EJTAG 0x00008000 /* EJTAG exception */ +#define MIPS_CPU_NOFPUEX 0x00010000 /* no FPU exception */ +#define MIPS_CPU_LLSC 0x00020000 /* CPU has ll/sc instructions */ +#define MIPS_CPU_SUBSET_CACHES 0x00040000 /* P-cache subset enforced */ +#define MIPS_CPU_PREFETCH 0x00080000 /* CPU has usable prefetch */ +#define MIPS_CPU_VINT 0x00100000 /* CPU supports MIPSR2 vectored interrupts */ +#define MIPS_CPU_VEIC 0x00200000 /* CPU supports MIPSR2 external interrupt controller mode */ + +/* + * CPU ASE encodings + */ +#define MIPS_ASE_MIPS16 0x00000001 /* code compression */ +#define MIPS_ASE_MDMX 0x00000002 /* MIPS digital media extension */ +#define MIPS_ASE_MIPS3D 0x00000004 /* MIPS-3D */ +#define MIPS_ASE_SMARTMIPS 0x00000008 /* SmartMIPS */ +#define MIPS_ASE_DSP 0x00000010 /* Signal Processing ASE */ +#define MIPS_ASE_MIPSMT 0x00000020 /* CPU supports MIPS MT */ + #endif /* _ASM_CPU_H */ diff --git a/include/asm-mips/dec/ecc.h b/include/asm-mips/dec/ecc.h index 724908b0bf13..19495a490e72 100644 --- a/include/asm-mips/dec/ecc.h +++ b/include/asm-mips/dec/ecc.h @@ -49,7 +49,8 @@ struct pt_regs; extern void dec_ecc_be_init(void); extern int dec_ecc_be_handler(struct pt_regs *regs, int is_fixup); -extern irqreturn_t dec_ecc_be_interrupt(int irq, void *dev_id, struct pt_regs *regs); +extern irqreturn_t dec_ecc_be_interrupt(int irq, void *dev_id, + struct pt_regs *regs); #endif #endif /* __ASM_MIPS_DEC_ECC_H */ diff --git a/include/asm-mips/dec/ioasic_addrs.h b/include/asm-mips/dec/ioasic_addrs.h index 5e18a7510592..4cbc1f8a1129 100644 --- a/include/asm-mips/dec/ioasic_addrs.h +++ b/include/asm-mips/dec/ioasic_addrs.h @@ -45,7 +45,8 @@ /* - * Offsets for I/O ASIC registers (relative to (system_base + IOASIC_IOCTL)). + * Offsets for I/O ASIC registers + * (relative to (dec_kn_slot_base + IOASIC_IOCTL)). */ /* all systems */ #define IO_REG_SCSI_DMA_P 0x00 /* SCSI DMA Pointer */ diff --git a/include/asm-mips/dec/kn01.h b/include/asm-mips/dec/kn01.h index 946943502f83..eb522aa1e226 100644 --- a/include/asm-mips/dec/kn01.h +++ b/include/asm-mips/dec/kn01.h @@ -8,14 +8,12 @@ * * Copyright (C) 1995,1996 by Paul M. Antoine, some code and definitions * are by courtesy of Chris Fraser. - * Copyright (C) 2002, 2003 Maciej W. Rozycki + * Copyright (C) 2002, 2003, 2005 Maciej W. Rozycki */ #ifndef __ASM_MIPS_DEC_KN01_H #define __ASM_MIPS_DEC_KN01_H -#include <asm/addrspace.h> - -#define KN01_SLOT_BASE KSEG1ADDR(0x10000000) +#define KN01_SLOT_BASE 0x10000000 #define KN01_SLOT_SIZE 0x01000000 /* @@ -41,17 +39,9 @@ /* - * Some port addresses... - */ -#define KN01_LANCE_BASE (KN01_SLOT_BASE + KN01_LANCE) /* 0xB8000000 */ -#define KN01_DZ11_BASE (KN01_SLOT_BASE + KN01_DZ11) /* 0xBC000000 */ -#define KN01_RTC_BASE (KN01_SLOT_BASE + KN01_RTC) /* 0xBD000000 */ - - -/* * Frame buffer memory address. */ -#define KN01_VFB_MEM KSEG1ADDR(0x0fc00000) +#define KN01_VFB_MEM 0x0fc00000 /* * CPU interrupt bits. @@ -80,4 +70,22 @@ #define KN01_CSR_VRGTRB (1<<0) /* red DAC voltage over blue (r/o) */ #define KN01_CSR_LEDS (0xff<<0) /* ~diagnostic LEDs (w/o) */ + +#ifndef __ASSEMBLY__ + +#include <linux/interrupt.h> +#include <linux/spinlock.h> +#include <linux/types.h> + +struct pt_regs; + +extern u16 cached_kn01_csr; +extern spinlock_t kn01_lock; + +extern void dec_kn01_be_init(void); +extern int dec_kn01_be_handler(struct pt_regs *regs, int is_fixup); +extern irqreturn_t dec_kn01_be_interrupt(int irq, void *dev_id, + struct pt_regs *regs); +#endif + #endif /* __ASM_MIPS_DEC_KN01_H */ diff --git a/include/asm-mips/dec/kn02.h b/include/asm-mips/dec/kn02.h index f797f7045920..8319ad77b250 100644 --- a/include/asm-mips/dec/kn02.h +++ b/include/asm-mips/dec/kn02.h @@ -8,21 +8,12 @@ * * Copyright (C) 1995,1996 by Paul M. Antoine, some code and definitions * are by courtesy of Chris Fraser. - * Copyright (C) 2002, 2003 Maciej W. Rozycki + * Copyright (C) 2002, 2003, 2005 Maciej W. Rozycki */ #ifndef __ASM_MIPS_DEC_KN02_H #define __ASM_MIPS_DEC_KN02_H -#ifndef __ASSEMBLY__ -#include <linux/spinlock.h> -#include <linux/types.h> -#endif - -#include <asm/addrspace.h> -#include <asm/dec/ecc.h> - - -#define KN02_SLOT_BASE KSEG1ADDR(0x1fc00000) +#define KN02_SLOT_BASE 0x1fc00000 #define KN02_SLOT_SIZE 0x00080000 /* @@ -39,22 +30,14 @@ /* - * Some port addresses... - */ -#define KN02_DZ11_BASE (KN02_SLOT_BASE + KN02_DZ11) /* DZ11 */ -#define KN02_RTC_BASE (KN02_SLOT_BASE + KN02_RTC) /* RTC */ -#define KN02_CSR_BASE (KN02_SLOT_BASE + KN02_CSR) /* CSR */ - - -/* * System Control & Status Register bits. */ #define KN02_CSR_RES_28 (0xf<<28) /* unused */ #define KN02_CSR_PSU (1<<27) /* power supply unit warning */ #define KN02_CSR_NVRAM (1<<26) /* ~NVRAM clear jumper */ #define KN02_CSR_REFEVEN (1<<25) /* mem refresh bank toggle */ -#define KN03_CSR_NRMOD (1<<24) /* ~NRMOD manufact. jumper */ -#define KN03_CSR_IOINTEN (0xff<<16) /* IRQ mask bits */ +#define KN02_CSR_NRMOD (1<<24) /* ~NRMOD manufact. jumper */ +#define KN02_CSR_IOINTEN (0xff<<16) /* IRQ mask bits */ #define KN02_CSR_DIAGCHK (1<<15) /* diagn/norml ECC reads */ #define KN02_CSR_DIAGGEN (1<<14) /* diagn/norml ECC writes */ #define KN02_CSR_CORRECT (1<<13) /* ECC correct/check */ @@ -63,8 +46,8 @@ #define KN02_CSR_BNK32M (1<<10) /* 32M/8M stride */ #define KN02_CSR_DIAGDN (1<<9) /* DIAGDN manufact. jumper */ #define KN02_CSR_BAUD38 (1<<8) /* DZ11 38/19kbps ext. rate */ -#define KN03_CSR_IOINT (0xff<<0) /* IRQ status bits (r/o) */ -#define KN03_CSR_LEDS (0xff<<0) /* ~diagnostic LEDs (w/o) */ +#define KN02_CSR_IOINT (0xff<<0) /* IRQ status bits (r/o) */ +#define KN02_CSR_LEDS (0xff<<0) /* ~diagnostic LEDs (w/o) */ /* @@ -98,6 +81,10 @@ #ifndef __ASSEMBLY__ + +#include <linux/spinlock.h> +#include <linux/types.h> + extern u32 cached_kn02_csr; extern spinlock_t kn02_lock; extern void init_kn02_irqs(int base); diff --git a/include/asm-mips/dec/kn02xa.h b/include/asm-mips/dec/kn02xa.h index 648c4dcbba1d..a25f3d7da7f7 100644 --- a/include/asm-mips/dec/kn02xa.h +++ b/include/asm-mips/dec/kn02xa.h @@ -9,7 +9,7 @@ * * Copyright (C) 1995,1996 by Paul M. Antoine, some code and definitions * are by courtesy of Chris Fraser. - * Copyright (C) 2000, 2002, 2003 Maciej W. Rozycki + * Copyright (C) 2000, 2002, 2003, 2005 Maciej W. Rozycki * * These are addresses which have to be known early in the boot process. * For other addresses refer to tc.h, ioasic_addrs.h and friends. @@ -17,31 +17,23 @@ #ifndef __ASM_MIPS_DEC_KN02XA_H #define __ASM_MIPS_DEC_KN02XA_H -#include <asm/addrspace.h> #include <asm/dec/ioasic_addrs.h> -#define KN02XA_SLOT_BASE KSEG1ADDR(0x1c000000) - -/* - * Some port addresses... - */ -#define KN02XA_IOASIC_BASE (KN02XA_SLOT_BASE + IOASIC_IOCTL) /* I/O ASIC */ -#define KN02XA_RTC_BASE (KN02XA_SLOT_BASE + IOASIC_TOY) /* RTC */ - +#define KN02XA_SLOT_BASE 0x1c000000 /* * Memory control ASIC registers. */ -#define KN02XA_MER KSEG1ADDR(0x0c400000) /* memory error register */ -#define KN02XA_MSR KSEG1ADDR(0x0c800000) /* memory size register */ +#define KN02XA_MER 0x0c400000 /* memory error register */ +#define KN02XA_MSR 0x0c800000 /* memory size register */ /* * CPU control ASIC registers. */ -#define KN02XA_MEM_CONF KSEG1ADDR(0x0e000000) /* write timeout config */ -#define KN02XA_EAR KSEG1ADDR(0x0e000004) /* error address register */ -#define KN02XA_BOOT0 KSEG1ADDR(0x0e000008) /* boot 0 register */ -#define KN02XA_MEM_INTR KSEG1ADDR(0x0e00000c) /* write err IRQ stat & ack */ +#define KN02XA_MEM_CONF 0x0e000000 /* write timeout config */ +#define KN02XA_EAR 0x0e000004 /* error address register */ +#define KN02XA_BOOT0 0x0e000008 /* boot 0 register */ +#define KN02XA_MEM_INTR 0x0e00000c /* write err IRQ stat & ack */ /* * Memory Error Register bits, common definitions. @@ -52,8 +44,13 @@ #define KN02XA_MER_PAGERR (1<<16) /* 2k page boundary error */ #define KN02XA_MER_TRANSERR (1<<15) /* transfer length error */ #define KN02XA_MER_PARDIS (1<<14) /* parity error disable */ -#define KN02XA_MER_RES_12 (0x3<<12) /* unused */ -#define KN02XA_MER_BYTERR (0xf<<8) /* byte lane error bitmask */ +#define KN02XA_MER_SIZE (1<<13) /* r/o mirror of MSR_SIZE */ +#define KN02XA_MER_RES_12 (1<<12) /* unused */ +#define KN02XA_MER_BYTERR (0xf<<8) /* byte lane error bitmask: */ +#define KN02XA_MER_BYTERR_3 (0x8<<8) /* byte lane #3 */ +#define KN02XA_MER_BYTERR_2 (0x4<<8) /* byte lane #2 */ +#define KN02XA_MER_BYTERR_1 (0x2<<8) /* byte lane #1 */ +#define KN02XA_MER_BYTERR_0 (0x1<<8) /* byte lane #0 */ #define KN02XA_MER_RES_0 (0xff<<0) /* unused */ /* @@ -72,4 +69,17 @@ #define KN02XA_EAR_ADDRESS (0x7ffffff<<2) /* address involved */ #define KN02XA_EAR_RES_0 (0x3<<0) /* unused */ + +#ifndef __ASSEMBLY__ + +#include <linux/interrupt.h> + +struct pt_regs; + +extern void dec_kn02xa_be_init(void); +extern int dec_kn02xa_be_handler(struct pt_regs *regs, int is_fixup); +extern irqreturn_t dec_kn02xa_be_interrupt(int irq, void *dev_id, + struct pt_regs *regs); +#endif + #endif /* __ASM_MIPS_DEC_KN02XA_H */ diff --git a/include/asm-mips/dec/kn03.h b/include/asm-mips/dec/kn03.h index 676abd17c6a4..edede923ffb8 100644 --- a/include/asm-mips/dec/kn03.h +++ b/include/asm-mips/dec/kn03.h @@ -10,24 +10,15 @@ * * Copyright (C) 1995,1996 by Paul M. Antoine, some code and definitions * are by courtesy of Chris Fraser. - * Copyright (C) 2000, 2002, 2003 Maciej W. Rozycki + * Copyright (C) 2000, 2002, 2003, 2005 Maciej W. Rozycki */ #ifndef __ASM_MIPS_DEC_KN03_H #define __ASM_MIPS_DEC_KN03_H -#include <asm/addrspace.h> #include <asm/dec/ecc.h> #include <asm/dec/ioasic_addrs.h> -#define KN03_SLOT_BASE KSEG1ADDR(0x1f800000) - -/* - * Some port addresses... - */ -#define KN03_IOASIC_BASE (KN03_SLOT_BASE + IOASIC_IOCTL) /* I/O ASIC */ -#define KN03_RTC_BASE (KN03_SLOT_BASE + IOASIC_TOY) /* RTC */ -#define KN03_MCR_BASE (KN03_SLOT_BASE + IOASIC_MCR) /* MCR */ - +#define KN03_SLOT_BASE 0x1f800000 /* * CPU interrupt bits. diff --git a/include/asm-mips/dec/kn05.h b/include/asm-mips/dec/kn05.h index b120362b8f13..15fe8f881e60 100644 --- a/include/asm-mips/dec/kn05.h +++ b/include/asm-mips/dec/kn05.h @@ -1,10 +1,12 @@ /* * include/asm-mips/dec/kn05.h * - * DECstation 5000/260 (4max+ or KN05) and DECsystem 5900/260 + * DECstation/DECsystem 5000/260 (4max+ or KN05), 5000/150 (4min + * or KN04-BA), Personal DECstation/DECsystem 5000/50 (4maxine or + * KN04-CA) and DECsystem 5900/260 (KN05) R4k CPU card MB ASIC * definitions. * - * Copyright (C) 2002, 2003 Maciej W. Rozycki + * Copyright (C) 2002, 2003, 2005 Maciej W. Rozycki * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License @@ -13,8 +15,8 @@ * * WARNING! All this information is pure guesswork based on the * ROM. It is provided here in hope it will give someone some - * food for thought. No documentation for the KN05 module has - * been located so far. + * food for thought. No documentation for the KN05 nor the KN04 + * module has been located so far. */ #ifndef __ASM_MIPS_DEC_KN05_H #define __ASM_MIPS_DEC_KN05_H @@ -24,48 +26,50 @@ /* * The oncard MB (Memory Buffer) ASIC provides an additional address * decoder. Certain address ranges within the "high" 16 slots are - * passed to the I/O ASIC's decoder like with the KN03. Others are - * handled locally. "Low" slots are always passed. + * passed to the I/O ASIC's decoder like with the KN03 or KN02-BA/CA. + * Others are handled locally. "Low" slots are always passed. */ -#define KN05_MB_ROM (16*IOASIC_SLOT_SIZE) /* KN05 card ROM */ -#define KN05_IOCTL (17*IOASIC_SLOT_SIZE) /* I/O ASIC */ -#define KN05_ESAR (18*IOASIC_SLOT_SIZE) /* LANCE MAC address chip */ -#define KN05_LANCE (19*IOASIC_SLOT_SIZE) /* LANCE Ethernet */ -#define KN05_MB_INT (20*IOASIC_SLOT_SIZE) /* MB interrupt register */ -#define KN05_MB_EA (21*IOASIC_SLOT_SIZE) /* MB error address? */ -#define KN05_MB_EC (22*IOASIC_SLOT_SIZE) /* MB error ??? */ -#define KN05_MB_CSR (23*IOASIC_SLOT_SIZE) /* MB control & status */ -#define KN05_RES_24 (24*IOASIC_SLOT_SIZE) /* unused? */ -#define KN05_RES_25 (25*IOASIC_SLOT_SIZE) /* unused? */ -#define KN05_RES_26 (26*IOASIC_SLOT_SIZE) /* unused? */ -#define KN05_RES_27 (27*IOASIC_SLOT_SIZE) /* unused? */ -#define KN05_SCSI (28*IOASIC_SLOT_SIZE) /* ASC SCSI */ -#define KN05_RES_29 (29*IOASIC_SLOT_SIZE) /* unused? */ -#define KN05_RES_30 (30*IOASIC_SLOT_SIZE) /* unused? */ -#define KN05_RES_31 (31*IOASIC_SLOT_SIZE) /* unused? */ +#define KN4K_SLOT_BASE 0x1fc00000 + +#define KN4K_MB_ROM (0*IOASIC_SLOT_SIZE) /* KN05/KN04 card ROM */ +#define KN4K_IOCTL (1*IOASIC_SLOT_SIZE) /* I/O ASIC */ +#define KN4K_ESAR (2*IOASIC_SLOT_SIZE) /* LANCE MAC address chip */ +#define KN4K_LANCE (3*IOASIC_SLOT_SIZE) /* LANCE Ethernet */ +#define KN4K_MB_INT (4*IOASIC_SLOT_SIZE) /* MB interrupt register */ +#define KN4K_MB_EA (5*IOASIC_SLOT_SIZE) /* MB error address? */ +#define KN4K_MB_EC (6*IOASIC_SLOT_SIZE) /* MB error ??? */ +#define KN4K_MB_CSR (7*IOASIC_SLOT_SIZE) /* MB control & status */ +#define KN4K_RES_08 (8*IOASIC_SLOT_SIZE) /* unused? */ +#define KN4K_RES_09 (9*IOASIC_SLOT_SIZE) /* unused? */ +#define KN4K_RES_10 (10*IOASIC_SLOT_SIZE) /* unused? */ +#define KN4K_RES_11 (11*IOASIC_SLOT_SIZE) /* unused? */ +#define KN4K_SCSI (12*IOASIC_SLOT_SIZE) /* ASC SCSI */ +#define KN4K_RES_13 (13*IOASIC_SLOT_SIZE) /* unused? */ +#define KN4K_RES_14 (14*IOASIC_SLOT_SIZE) /* unused? */ +#define KN4K_RES_15 (15*IOASIC_SLOT_SIZE) /* unused? */ /* * Bits for the MB interrupt register. * The register appears read-only. */ -#define KN05_MB_INT_TC (1<<0) /* TURBOchannel? */ -#define KN05_MB_INT_RTC (1<<1) /* RTC? */ -#define KN05_MB_INT_MT (1<<3) /* ??? */ +#define KN4K_MB_INT_TC (1<<0) /* TURBOchannel? */ +#define KN4K_MB_INT_RTC (1<<1) /* RTC? */ +#define KN4K_MB_INT_MT (1<<3) /* ??? */ /* * Bits for the MB control & status register. * Set to 0x00bf8001 on my system by the ROM. */ -#define KN05_MB_CSR_PF (1<<0) /* PreFetching enable? */ -#define KN05_MB_CSR_F (1<<1) /* ??? */ -#define KN05_MB_CSR_ECC (0xff<<2) /* ??? */ -#define KN05_MB_CSR_OD (1<<10) /* ??? */ -#define KN05_MB_CSR_CP (1<<11) /* ??? */ -#define KN05_MB_CSR_UNC (1<<12) /* ??? */ -#define KN05_MB_CSR_IM (1<<13) /* ??? */ -#define KN05_MB_CSR_NC (1<<14) /* ??? */ -#define KN05_MB_CSR_EE (1<<15) /* (bus) Exception Enable? */ -#define KN05_MB_CSR_MSK (0x1f<<16) /* ??? */ -#define KN05_MB_CSR_FW (1<<21) /* ??? */ +#define KN4K_MB_CSR_PF (1<<0) /* PreFetching enable? */ +#define KN4K_MB_CSR_F (1<<1) /* ??? */ +#define KN4K_MB_CSR_ECC (0xff<<2) /* ??? */ +#define KN4K_MB_CSR_OD (1<<10) /* ??? */ +#define KN4K_MB_CSR_CP (1<<11) /* ??? */ +#define KN4K_MB_CSR_UNC (1<<12) /* ??? */ +#define KN4K_MB_CSR_IM (1<<13) /* ??? */ +#define KN4K_MB_CSR_NC (1<<14) /* ??? */ +#define KN4K_MB_CSR_EE (1<<15) /* (bus) Exception Enable? */ +#define KN4K_MB_CSR_MSK (0x1f<<16) /* ??? */ +#define KN4K_MB_CSR_FW (1<<21) /* ??? */ #endif /* __ASM_MIPS_DEC_KN05_H */ diff --git a/include/asm-mips/dec/prom.h b/include/asm-mips/dec/prom.h index a05d6d3395fe..1384dd0964b9 100644 --- a/include/asm-mips/dec/prom.h +++ b/include/asm-mips/dec/prom.h @@ -24,7 +24,7 @@ * PMAX/3MAX PROM entry points for DS2100/3100's and DS5000/2xx's. * Many of these will work for MIPSen as well! */ -#define VEC_RESET (u64 *)KSEG1ADDR(0x1fc00000) +#define VEC_RESET (u64 *)CKSEG1ADDR(0x1fc00000) /* Prom base address */ #define PMAX_PROM_ENTRY(x) (VEC_RESET + (x)) /* Prom jump table */ @@ -111,19 +111,21 @@ extern int (*__pmax_close)(int); * On MIPS64 we have to call PROM functions via a helper * dispatcher to accomodate ABI incompatibilities. */ -#define __DEC_PROM_O32 __attribute__((alias("call_o32"))) - -int _rex_bootinit(int (*)(void)) __DEC_PROM_O32; -int _rex_bootread(int (*)(void)) __DEC_PROM_O32; -int _rex_getbitmap(int (*)(memmap *), memmap *) __DEC_PROM_O32; -unsigned long *_rex_slot_address(unsigned long *(*)(int), int) __DEC_PROM_O32; -void *_rex_gettcinfo(void *(*)(void)) __DEC_PROM_O32; -int _rex_getsysid(int (*)(void)) __DEC_PROM_O32; -void _rex_clear_cache(void (*)(void)) __DEC_PROM_O32; - -int _prom_getchar(int (*)(void)) __DEC_PROM_O32; -char *_prom_getenv(char *(*)(char *), char *) __DEC_PROM_O32; -int _prom_printf(int (*)(char *, ...), char *, ...) __DEC_PROM_O32; +#define __DEC_PROM_O32(fun, arg) fun arg __asm__(#fun); \ + __asm__(#fun " = call_o32") + +int __DEC_PROM_O32(_rex_bootinit, (int (*)(void))); +int __DEC_PROM_O32(_rex_bootread, (int (*)(void))); +int __DEC_PROM_O32(_rex_getbitmap, (int (*)(memmap *), memmap *)); +unsigned long *__DEC_PROM_O32(_rex_slot_address, + (unsigned long *(*)(int), int)); +void *__DEC_PROM_O32(_rex_gettcinfo, (void *(*)(void))); +int __DEC_PROM_O32(_rex_getsysid, (int (*)(void))); +void __DEC_PROM_O32(_rex_clear_cache, (void (*)(void))); + +int __DEC_PROM_O32(_prom_getchar, (int (*)(void))); +char *__DEC_PROM_O32(_prom_getenv, (char *(*)(char *), char *)); +int __DEC_PROM_O32(_prom_printf, (int (*)(char *, ...), char *, ...)); #define rex_bootinit() _rex_bootinit(__rex_bootinit) diff --git a/include/asm-mips/dec/system.h b/include/asm-mips/dec/system.h new file mode 100644 index 000000000000..78af51fbc797 --- /dev/null +++ b/include/asm-mips/dec/system.h @@ -0,0 +1,18 @@ +/* + * include/asm-mips/dec/system.h + * + * Generic DECstation/DECsystem bits. + * + * Copyright (C) 2005 Maciej W. Rozycki + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version + * 2 of the License, or (at your option) any later version. + */ +#ifndef __ASM_DEC_SYSTEM_H +#define __ASM_DEC_SYSTEM_H + +extern unsigned long dec_kn_slot_base, dec_kn_slot_size; + +#endif /* __ASM_DEC_SYSTEM_H */ diff --git a/include/asm-mips/dec/tc.h b/include/asm-mips/dec/tc.h index d7bba43f863a..9cb51f24d42c 100644 --- a/include/asm-mips/dec/tc.h +++ b/include/asm-mips/dec/tc.h @@ -7,10 +7,8 @@ * * Copyright (c) 1998 Harald Koerfgen */ -#ifndef ASM_TC_H -#define ASM_TC_H - -extern unsigned long system_base; +#ifndef __ASM_DEC_TC_H +#define __ASM_DEC_TC_H /* * Search for a TURBOchannel Option Module @@ -36,8 +34,8 @@ extern unsigned long get_tc_base_addr(int); */ extern unsigned long get_tc_irq_nr(int); /* - * Return TURBOchannel clock frequency in hz + * Return TURBOchannel clock frequency in Hz */ extern unsigned long get_tc_speed(void); -#endif +#endif /* __ASM_DEC_TC_H */ diff --git a/include/asm-mips/delay.h b/include/asm-mips/delay.h index a606dbee0412..48d00cccdafa 100644 --- a/include/asm-mips/delay.h +++ b/include/asm-mips/delay.h @@ -12,11 +12,9 @@ #include <linux/config.h> #include <linux/param.h> - +#include <linux/smp.h> #include <asm/compiler.h> -extern unsigned long loops_per_jiffy; - static inline void __delay(unsigned long loops) { if (sizeof(long) == 4) @@ -82,12 +80,17 @@ static inline void __udelay(unsigned long usecs, unsigned long lpj) __delay(usecs); } -#ifdef CONFIG_SMP #define __udelay_val cpu_data[smp_processor_id()].udelay_val -#else -#define __udelay_val loops_per_jiffy -#endif #define udelay(usecs) __udelay((usecs),__udelay_val) +/* make sure "usecs *= ..." in udelay do not overflow. */ +#if HZ >= 1000 +#define MAX_UDELAY_MS 1 +#elif HZ <= 200 +#define MAX_UDELAY_MS 5 +#else +#define MAX_UDELAY_MS (1000 / HZ) +#endif + #endif /* _ASM_DELAY_H */ diff --git a/include/asm-mips/dma-mapping.h b/include/asm-mips/dma-mapping.h index af28dc88930b..43288634c38a 100644 --- a/include/asm-mips/dma-mapping.h +++ b/include/asm-mips/dma-mapping.h @@ -5,13 +5,13 @@ #include <asm/cache.h> void *dma_alloc_noncoherent(struct device *dev, size_t size, - dma_addr_t *dma_handle, int flag); + dma_addr_t *dma_handle, gfp_t flag); void dma_free_noncoherent(struct device *dev, size_t size, void *vaddr, dma_addr_t dma_handle); void *dma_alloc_coherent(struct device *dev, size_t size, - dma_addr_t *dma_handle, int flag); + dma_addr_t *dma_handle, gfp_t flag); void dma_free_coherent(struct device *dev, size_t size, void *vaddr, dma_addr_t dma_handle); diff --git a/include/asm-mips/dsp.h b/include/asm-mips/dsp.h new file mode 100644 index 000000000000..50f556bb4978 --- /dev/null +++ b/include/asm-mips/dsp.h @@ -0,0 +1,83 @@ +/* + * Copyright (C) 2005 Mips Technologies + * Author: Chris Dearman, chris@mips.com derived from fpu.h + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ +#ifndef _ASM_DSP_H +#define _ASM_DSP_H + +#include <asm/cpu.h> +#include <asm/cpu-features.h> +#include <asm/hazards.h> +#include <asm/mipsregs.h> + +#define DSP_DEFAULT 0x00000000 +#define DSP_MASK 0x1f + +#define __enable_dsp_hazard() \ +do { \ + asm("_ehb"); \ +} while (0) + +static inline void __init_dsp(void) +{ + mthi1(0); + mtlo1(0); + mthi2(0); + mtlo2(0); + mthi3(0); + mtlo3(0); + wrdsp(DSP_DEFAULT, DSP_MASK); +} + +static inline void init_dsp(void) +{ + if (cpu_has_dsp) + __init_dsp(); +} + +#define __save_dsp(tsk) \ +do { \ + tsk->thread.dsp.dspr[0] = mfhi1(); \ + tsk->thread.dsp.dspr[1] = mflo1(); \ + tsk->thread.dsp.dspr[2] = mfhi2(); \ + tsk->thread.dsp.dspr[3] = mflo2(); \ + tsk->thread.dsp.dspr[4] = mfhi3(); \ + tsk->thread.dsp.dspr[5] = mflo3(); \ +} while (0) + +#define save_dsp(tsk) \ +do { \ + if (cpu_has_dsp) \ + __save_dsp(tsk); \ +} while (0) + +#define __restore_dsp(tsk) \ +do { \ + mthi1(tsk->thread.dsp.dspr[0]); \ + mtlo1(tsk->thread.dsp.dspr[1]); \ + mthi2(tsk->thread.dsp.dspr[2]); \ + mtlo2(tsk->thread.dsp.dspr[3]); \ + mthi3(tsk->thread.dsp.dspr[4]); \ + mtlo3(tsk->thread.dsp.dspr[5]); \ +} while (0) + +#define restore_dsp(tsk) \ +do { \ + if (cpu_has_dsp) \ + __restore_dsp(tsk); \ +} while (0) + +#define __get_dsp_regs(tsk) \ +({ \ + if (tsk == current) \ + __save_dsp(current); \ + \ + tsk->thread.dsp.dspr; \ +}) + +#endif /* _ASM_DSP_H */ diff --git a/include/asm-mips/elf.h b/include/asm-mips/elf.h index e48811440015..d2c9a25f8459 100644 --- a/include/asm-mips/elf.h +++ b/include/asm-mips/elf.h @@ -2,6 +2,8 @@ * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive * for more details. + * + * Much of this is taken from binutils and GNU libc ... */ #ifndef _ASM_ELF_H #define _ASM_ELF_H @@ -17,6 +19,8 @@ #define EF_MIPS_ARCH_5 0x40000000 /* -mips5 code. */ #define EF_MIPS_ARCH_32 0x50000000 /* MIPS32 code. */ #define EF_MIPS_ARCH_64 0x60000000 /* MIPS64 code. */ +#define EF_MIPS_ARCH_32R2 0x70000000 /* MIPS32 R2 code. */ +#define EF_MIPS_ARCH_64R2 0x80000000 /* MIPS64 R2 code. */ /* The ABI of a file. */ #define EF_MIPS_ABI_O32 0x00001000 /* O32 ABI. */ @@ -105,7 +109,11 @@ #define R_MIPS_LOVENDOR 100 #define R_MIPS_HIVENDOR 127 -#define SHN_MIPS_ACCOMON 0xff00 +#define SHN_MIPS_ACCOMON 0xff00 /* Allocated common symbols */ +#define SHN_MIPS_TEXT 0xff01 /* Allocated test symbols. */ +#define SHN_MIPS_DATA 0xff02 /* Allocated data symbols. */ +#define SHN_MIPS_SCOMMON 0xff03 /* Small common symbols */ +#define SHN_MIPS_SUNDEFINED 0xff04 /* Small undefined symbols */ #define SHT_MIPS_LIST 0x70000000 #define SHT_MIPS_CONFLICT 0x70000002 @@ -193,50 +201,94 @@ typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG]; #ifdef __KERNEL__ +struct mips_abi; + +extern struct mips_abi mips_abi; +extern struct mips_abi mips_abi_32; +extern struct mips_abi mips_abi_n32; + #ifdef CONFIG_32BIT -#define SET_PERSONALITY(ex, ibcs2) \ -do { \ - if (ibcs2) \ - set_personality(PER_SVR4); \ - set_personality(PER_LINUX); \ +#define SET_PERSONALITY(ex, ibcs2) \ +do { \ + if (ibcs2) \ + set_personality(PER_SVR4); \ + set_personality(PER_LINUX); \ + \ + current->thread.abi = &mips_abi; \ } while (0) #endif /* CONFIG_32BIT */ #ifdef CONFIG_64BIT -#define SET_PERSONALITY(ex, ibcs2) \ -do { current->thread.mflags &= ~MF_ABI_MASK; \ - if ((ex).e_ident[EI_CLASS] == ELFCLASS32) { \ - if ((((ex).e_flags & EF_MIPS_ABI2) != 0) && \ - ((ex).e_flags & EF_MIPS_ABI) == 0) \ - current->thread.mflags |= MF_N32; \ - else \ - current->thread.mflags |= MF_O32; \ - } else \ - current->thread.mflags |= MF_N64; \ - if (ibcs2) \ - set_personality(PER_SVR4); \ - else if (current->personality != PER_LINUX32) \ - set_personality(PER_LINUX); \ +#ifdef CONFIG_MIPS32_N32 +#define __SET_PERSONALITY32_N32() \ + do { \ + current->thread.mflags |= MF_N32; \ + current->thread.abi = &mips_abi_n32; \ + } while (0) +#else +#define __SET_PERSONALITY32_N32() \ + do { } while (0) +#endif + +#ifdef CONFIG_MIPS32_O32 +#define __SET_PERSONALITY32_O32() \ + do { \ + current->thread.mflags |= MF_O32; \ + current->thread.abi = &mips_abi_32; \ + } while (0) +#else +#define __SET_PERSONALITY32_O32() \ + do { } while (0) +#endif + +#ifdef CONFIG_MIPS32_COMPAT +#define __SET_PERSONALITY32(ex) \ +do { \ + if ((((ex).e_flags & EF_MIPS_ABI2) != 0) && \ + ((ex).e_flags & EF_MIPS_ABI) == 0) \ + __SET_PERSONALITY32_N32(); \ + else \ + __SET_PERSONALITY32_O32(); \ +} while (0) +#else +#define __SET_PERSONALITY32(ex) do { } while (0) +#endif + +#define SET_PERSONALITY(ex, ibcs2) \ +do { \ + current->thread.mflags &= ~MF_ABI_MASK; \ + if ((ex).e_ident[EI_CLASS] == ELFCLASS32) \ + __SET_PERSONALITY32(ex); \ + else { \ + current->thread.mflags |= MF_N64; \ + current->thread.abi = &mips_abi; \ + } \ + \ + if (ibcs2) \ + set_personality(PER_SVR4); \ + else if (current->personality != PER_LINUX32) \ + set_personality(PER_LINUX); \ } while (0) #endif /* CONFIG_64BIT */ +struct task_struct; + extern void dump_regs(elf_greg_t *, struct pt_regs *regs); +extern int dump_task_regs (struct task_struct *, elf_gregset_t *); extern int dump_task_fpu(struct task_struct *, elf_fpregset_t *); #define ELF_CORE_COPY_REGS(elf_regs, regs) \ dump_regs((elf_greg_t *)&(elf_regs), regs); +#define ELF_CORE_COPY_TASK_REGS(tsk, elf_regs) dump_task_regs(tsk, elf_regs) #define ELF_CORE_COPY_FPREGS(tsk, elf_fpregs) \ dump_task_fpu(tsk, elf_fpregs) #endif /* __KERNEL__ */ -/* This one accepts IRIX binaries. */ -#define irix_elf_check_arch(hdr) ((hdr)->e_flags & RHF_SGI_ONLY) - #define USE_ELF_CORE_DUMP #define ELF_EXEC_PAGESIZE PAGE_SIZE diff --git a/include/asm-mips/fcntl.h b/include/asm-mips/fcntl.h index 06c5d13faf66..43d047a9a6af 100644 --- a/include/asm-mips/fcntl.h +++ b/include/asm-mips/fcntl.h @@ -3,11 +3,13 @@ * License. See the file "COPYING" in the main directory of this archive * for more details. * - * Copyright (C) 1995, 96, 97, 98, 99, 2003 Ralf Baechle + * Copyright (C) 1995, 96, 97, 98, 99, 2003, 05 Ralf Baechle */ #ifndef _ASM_FCNTL_H #define _ASM_FCNTL_H +#include <linux/config.h> + #define O_APPEND 0x0008 #define O_SYNC 0x0010 #define O_NONBLOCK 0x0080 @@ -40,13 +42,13 @@ * contain all the same fields as struct flock. */ -#ifndef __mips64 +#ifdef CONFIG_32BIT struct flock { short l_type; short l_whence; - __kernel_off_t l_start; - __kernel_off_t l_len; + off_t l_start; + off_t l_len; long l_sysid; __kernel_pid_t l_pid; long pad[4]; @@ -54,13 +56,8 @@ struct flock { #define HAVE_ARCH_STRUCT_FLOCK -#endif +#endif /* CONFIG_32BIT */ #include <asm-generic/fcntl.h> -typedef struct flock flock_t; -#ifndef __mips64 -typedef struct flock64 flock64_t; -#endif - #endif /* _ASM_FCNTL_H */ diff --git a/include/asm-mips/fixmap.h b/include/asm-mips/fixmap.h index 26b6a90a690b..73a3028dd9f9 100644 --- a/include/asm-mips/fixmap.h +++ b/include/asm-mips/fixmap.h @@ -107,4 +107,11 @@ static inline unsigned long virt_to_fix(const unsigned long vaddr) return __virt_to_fix(vaddr); } +/* + * Called from pgtable_init() + */ +extern void fixrange_init(unsigned long start, unsigned long end, + pgd_t *pgd_base); + + #endif diff --git a/include/asm-mips/fpu.h b/include/asm-mips/fpu.h index ea24e733b1bc..9c828b1f8218 100644 --- a/include/asm-mips/fpu.h +++ b/include/asm-mips/fpu.h @@ -80,9 +80,14 @@ do { \ #define clear_fpu_owner() clear_thread_flag(TIF_USEDFPU) +static inline int __is_fpu_owner(void) +{ + return test_thread_flag(TIF_USEDFPU); +} + static inline int is_fpu_owner(void) { - return cpu_has_fpu && test_thread_flag(TIF_USEDFPU); + return cpu_has_fpu && __is_fpu_owner(); } static inline void own_fpu(void) @@ -127,7 +132,7 @@ static inline void restore_fp(struct task_struct *tsk) static inline fpureg_t *get_fpu_regs(struct task_struct *tsk) { if (cpu_has_fpu) { - if ((tsk == current) && is_fpu_owner()) + if ((tsk == current) && __is_fpu_owner()) _save_fp(current); return tsk->thread.fpu.hard.fpr; } diff --git a/include/asm-mips/fpu_emulator.h b/include/asm-mips/fpu_emulator.h index 46972ae2b95d..16cb4d11dd0b 100644 --- a/include/asm-mips/fpu_emulator.h +++ b/include/asm-mips/fpu_emulator.h @@ -23,16 +23,15 @@ #ifndef _ASM_FPU_EMULATOR_H #define _ASM_FPU_EMULATOR_H -struct mips_fpu_emulator_private { - unsigned int eir; - struct { - unsigned int emulated; - unsigned int loads; - unsigned int stores; - unsigned int cp1ops; - unsigned int cp1xops; - unsigned int errors; - } stats; +struct mips_fpu_emulator_stats { + unsigned int emulated; + unsigned int loads; + unsigned int stores; + unsigned int cp1ops; + unsigned int cp1xops; + unsigned int errors; }; +extern struct mips_fpu_emulator_stats fpuemustats; + #endif /* _ASM_FPU_EMULATOR_H */ diff --git a/include/asm-mips/futex.h b/include/asm-mips/futex.h index 9feff4ce1424..2454c44a8f54 100644 --- a/include/asm-mips/futex.h +++ b/include/asm-mips/futex.h @@ -3,10 +3,45 @@ #ifdef __KERNEL__ +#include <linux/config.h> #include <linux/futex.h> #include <asm/errno.h> #include <asm/uaccess.h> +#ifdef CONFIG_SMP +#define __FUTEX_SMP_SYNC " sync \n" +#else +#define __FUTEX_SMP_SYNC +#endif + +#define __futex_atomic_op(insn, ret, oldval, uaddr, oparg) \ +{ \ + __asm__ __volatile__( \ + " .set push \n" \ + " .set noat \n" \ + " .set mips3 \n" \ + "1: ll %1, (%3) # __futex_atomic_op1 \n" \ + " .set mips0 \n" \ + " " insn " \n" \ + " .set mips3 \n" \ + "2: sc $1, (%3) \n" \ + " beqzl $1, 1b \n" \ + __FUTEX_SMP_SYNC \ + "3: \n" \ + " .set pop \n" \ + " .set mips0 \n" \ + " .section .fixup,\"ax\" \n" \ + "4: li %0, %5 \n" \ + " j 2b \n" \ + " .previous \n" \ + " .section __ex_table,\"a\" \n" \ + " "__UA_ADDR "\t1b, 4b \n" \ + " "__UA_ADDR "\t2b, 4b \n" \ + " .previous \n" \ + : "=r" (ret), "=r" (oldval) \ + : "0" (0), "r" (uaddr), "Jr" (oparg), "i" (-EFAULT)); \ +} + static inline int futex_atomic_op_inuser (int encoded_op, int __user *uaddr) { @@ -25,10 +60,25 @@ futex_atomic_op_inuser (int encoded_op, int __user *uaddr) switch (op) { case FUTEX_OP_SET: + __futex_atomic_op("move $1, %z4", ret, oldval, uaddr, oparg); + break; + case FUTEX_OP_ADD: + __futex_atomic_op("addu $1, %1, %z4", + ret, oldval, uaddr, oparg); + break; case FUTEX_OP_OR: + __futex_atomic_op("or $1, %1, %z4", + ret, oldval, uaddr, oparg); + break; case FUTEX_OP_ANDN: + __futex_atomic_op("and $1, %1, %z4", + ret, oldval, uaddr, ~oparg); + break; case FUTEX_OP_XOR: + __futex_atomic_op("xor $1, %1, %z4", + ret, oldval, uaddr, oparg); + break; default: ret = -ENOSYS; } diff --git a/include/asm-mips/hazards.h b/include/asm-mips/hazards.h index f524eaccd5f1..7517189e469f 100644 --- a/include/asm-mips/hazards.h +++ b/include/asm-mips/hazards.h @@ -74,7 +74,8 @@ #define irq_disable_hazard _ehb -#elif defined(CONFIG_CPU_R10000) || defined(CONFIG_CPU_RM9000) +#elif defined(CONFIG_CPU_R10000) || defined(CONFIG_CPU_RM9000) || \ + defined(CONFIG_CPU_SB1) /* * R10000 rocks - all hazards handled in hardware, so this becomes a nobrainer. @@ -107,6 +108,7 @@ __asm__( " .endm \n\t"); #ifdef CONFIG_CPU_RM9000 + /* * RM9000 hazards. When the JTLB is updated by tlbwi or tlbwr, a subsequent * use of the JTLB for instructions should not occur for 4 cpu cycles and use @@ -124,6 +126,9 @@ __asm__( ".set\tmips32\n\t" \ "_ssnop; _ssnop; _ssnop; _ssnop\n\t" \ ".set\tmips0") + +#define back_to_back_c0_hazard() do { } while (0) + #else /* @@ -144,15 +149,13 @@ __asm__( #endif /* - * mtc0->mfc0 hazard - * The 24K has a 2 cycle mtc0/mfc0 execution hazard. - * It is a MIPS32R2 processor so ehb will clear the hazard. + * Interrupt enable/disable hazards + * Some processors have hazards when modifying + * the status register to change the interrupt state */ #ifdef CONFIG_CPU_MIPSR2 -/* - * Use a macro for ehb unless explicit support for MIPSR2 is enabled - */ + __asm__( " .macro\tirq_enable_hazard \n\t" " _ehb \n\t" @@ -160,17 +163,26 @@ __asm__( " \n\t" " .macro\tirq_disable_hazard \n\t" " _ehb \n\t" + " .endm \n\t" + " \n\t" + " .macro\tback_to_back_c0_hazard \n\t" + " _ehb \n\t" " .endm"); #define irq_enable_hazard() \ __asm__ __volatile__( \ - "_ehb\t\t\t\t# irq_enable_hazard") + "irq_enable_hazard") #define irq_disable_hazard() \ __asm__ __volatile__( \ - "_ehb\t\t\t\t# irq_disable_hazard") + "irq_disable_hazard") + +#define back_to_back_c0_hazard() \ + __asm__ __volatile__( \ + "back_to_back_c0_hazard") -#elif defined(CONFIG_CPU_R10000) || defined(CONFIG_CPU_RM9000) +#elif defined(CONFIG_CPU_R10000) || defined(CONFIG_CPU_RM9000) || \ + defined(CONFIG_CPU_SB1) /* * R10000 rocks - all hazards handled in hardware, so this becomes a nobrainer. @@ -186,6 +198,8 @@ __asm__( #define irq_enable_hazard() do { } while (0) #define irq_disable_hazard() do { } while (0) +#define back_to_back_c0_hazard() do { } while (0) + #else /* @@ -208,10 +222,32 @@ __asm__( #define irq_enable_hazard() do { } while (0) #define irq_disable_hazard() \ __asm__ __volatile__( \ - "_ssnop; _ssnop; _ssnop;\t\t# irq_disable_hazard") + "irq_disable_hazard") + +#define back_to_back_c0_hazard() \ + __asm__ __volatile__( \ + " .set noreorder \n" \ + " nop; nop; nop \n" \ + " .set reorder \n") #endif +#ifdef CONFIG_CPU_MIPSR2 +#define instruction_hazard() \ +do { \ +__label__ __next; \ + __asm__ __volatile__( \ + " jr.hb %0 \n" \ + : \ + : "r" (&&__next)); \ +__next: \ + ; \ +} while (0) + +#else +#define instruction_hazard() do { } while (0) +#endif + #endif /* __ASSEMBLY__ */ #endif /* _ASM_HAZARDS_H */ diff --git a/include/asm-mips/highmem.h b/include/asm-mips/highmem.h index f49930d947d4..8cf598402492 100644 --- a/include/asm-mips/highmem.h +++ b/include/asm-mips/highmem.h @@ -75,6 +75,7 @@ static inline void *kmap_atomic(struct page *page, enum km_type type) } static inline void kunmap_atomic(void *kvaddr, enum km_type type) { } +#define kmap_atomic_pfn(pfn, idx) page_address(pfn_to_page(pfn)) #define kmap_atomic_to_page(ptr) virt_to_page(ptr) @@ -86,6 +87,7 @@ extern void *__kmap(struct page *page); extern void __kunmap(struct page *page); extern void *__kmap_atomic(struct page *page, enum km_type type); extern void __kunmap_atomic(void *kvaddr, enum km_type type); +extern void *kmap_atomic_pfn(unsigned long pfn, enum km_type type); extern struct page *__kmap_atomic_to_page(void *ptr); #define kmap __kmap diff --git a/include/asm-mips/inst.h b/include/asm-mips/inst.h index 6ad517241768..e0745f4ff624 100644 --- a/include/asm-mips/inst.h +++ b/include/asm-mips/inst.h @@ -28,7 +28,7 @@ enum major_op { sdl_op, sdr_op, swr_op, cache_op, ll_op, lwc1_op, lwc2_op, pref_op, lld_op, ldc1_op, ldc2_op, ld_op, - sc_op, swc1_op, swc2_op, major_3b_op, /* Opcode 0x3b is unused */ + sc_op, swc1_op, swc2_op, rdhwr_op, scd_op, sdc1_op, sdc2_op, sd_op }; @@ -62,10 +62,10 @@ enum rt_op { spimi_op, unused_rt_op_0x05, unused_rt_op_0x06, unused_rt_op_0x07, tgei_op, tgeiu_op, tlti_op, tltiu_op, teqi_op, unused_0x0d_rt_op, tnei_op, unused_0x0f_rt_op, - bltzal_op, bgezal_op, bltzall_op, bgezall_op - /* - * The others (0x14 - 0x1f) are unused. - */ + bltzal_op, bgezal_op, bltzall_op, bgezall_op, + rt_op_0x14, rt_op_0x15, rt_op_0x16, rt_op_0x17, + rt_op_0x18, rt_op_0x19, rt_op_0x1a, rt_op_0x1b, + bposge32_op, rt_op_0x1d, rt_op_0x1e, rt_op_0x1f }; /* diff --git a/include/asm-mips/interrupt.h b/include/asm-mips/interrupt.h index e8357f5379fa..a5735761f5e5 100644 --- a/include/asm-mips/interrupt.h +++ b/include/asm-mips/interrupt.h @@ -11,20 +11,25 @@ #ifndef _ASM_INTERRUPT_H #define _ASM_INTERRUPT_H +#include <linux/config.h> #include <asm/hazards.h> __asm__ ( - ".macro\tlocal_irq_enable\n\t" - ".set\tpush\n\t" - ".set\treorder\n\t" - ".set\tnoat\n\t" - "mfc0\t$1,$12\n\t" - "ori\t$1,0x1f\n\t" - "xori\t$1,0x1e\n\t" - "mtc0\t$1,$12\n\t" - "irq_enable_hazard\n\t" - ".set\tpop\n\t" - ".endm"); + " .macro local_irq_enable \n" + " .set push \n" + " .set reorder \n" + " .set noat \n" +#ifdef CONFIG_CPU_MIPSR2 + " ei \n" +#else + " mfc0 $1,$12 \n" + " ori $1,0x1f \n" + " xori $1,0x1e \n" + " mtc0 $1,$12 \n" +#endif + " irq_enable_hazard \n" + " .set pop \n" + " .endm"); static inline void local_irq_enable(void) { @@ -43,17 +48,21 @@ static inline void local_irq_enable(void) * no nops at all. */ __asm__ ( - ".macro\tlocal_irq_disable\n\t" - ".set\tpush\n\t" - ".set\tnoat\n\t" - "mfc0\t$1,$12\n\t" - "ori\t$1,1\n\t" - "xori\t$1,1\n\t" - ".set\tnoreorder\n\t" - "mtc0\t$1,$12\n\t" - "irq_disable_hazard\n\t" - ".set\tpop\n\t" - ".endm"); + " .macro local_irq_disable\n" + " .set push \n" + " .set noat \n" +#ifdef CONFIG_CPU_MIPSR2 + " di \n" +#else + " mfc0 $1,$12 \n" + " ori $1,1 \n" + " xori $1,1 \n" + " .set noreorder \n" + " mtc0 $1,$12 \n" +#endif + " irq_disable_hazard \n" + " .set pop \n" + " .endm \n"); static inline void local_irq_disable(void) { @@ -65,12 +74,12 @@ static inline void local_irq_disable(void) } __asm__ ( - ".macro\tlocal_save_flags flags\n\t" - ".set\tpush\n\t" - ".set\treorder\n\t" - "mfc0\t\\flags, $12\n\t" - ".set\tpop\n\t" - ".endm"); + " .macro local_save_flags flags \n" + " .set push \n" + " .set reorder \n" + " mfc0 \\flags, $12 \n" + " .set pop \n" + " .endm \n"); #define local_save_flags(x) \ __asm__ __volatile__( \ @@ -78,18 +87,22 @@ __asm__ __volatile__( \ : "=r" (x)) __asm__ ( - ".macro\tlocal_irq_save result\n\t" - ".set\tpush\n\t" - ".set\treorder\n\t" - ".set\tnoat\n\t" - "mfc0\t\\result, $12\n\t" - "ori\t$1, \\result, 1\n\t" - "xori\t$1, 1\n\t" - ".set\tnoreorder\n\t" - "mtc0\t$1, $12\n\t" - "irq_disable_hazard\n\t" - ".set\tpop\n\t" - ".endm"); + " .macro local_irq_save result \n" + " .set push \n" + " .set reorder \n" + " .set noat \n" +#ifdef CONFIG_CPU_MIPSR2 + " di \\result \n" +#else + " mfc0 \\result, $12 \n" + " ori $1, \\result, 1 \n" + " xori $1, 1 \n" + " .set noreorder \n" + " mtc0 $1, $12 \n" +#endif + " irq_disable_hazard \n" + " .set pop \n" + " .endm \n"); #define local_irq_save(x) \ __asm__ __volatile__( \ @@ -99,19 +112,37 @@ __asm__ __volatile__( \ : "memory") __asm__ ( - ".macro\tlocal_irq_restore flags\n\t" - ".set\tnoreorder\n\t" - ".set\tnoat\n\t" - "mfc0\t$1, $12\n\t" - "andi\t\\flags, 1\n\t" - "ori\t$1, 1\n\t" - "xori\t$1, 1\n\t" - "or\t\\flags, $1\n\t" - "mtc0\t\\flags, $12\n\t" - "irq_disable_hazard\n\t" - ".set\tat\n\t" - ".set\treorder\n\t" - ".endm"); + " .macro local_irq_restore flags \n" + " .set noreorder \n" + " .set noat \n" +#if defined(CONFIG_CPU_MIPSR2) && defined(CONFIG_IRQ_CPU) + /* + * Slow, but doesn't suffer from a relativly unlikely race + * condition we're having since days 1. + */ + " beqz \\flags, 1f \n" + " di \n" + " ei \n" + "1: \n" +#elif defined(CONFIG_CPU_MIPSR2) + /* + * Fast, dangerous. Life is fun, life is good. + */ + " mfc0 $1, $12 \n" + " ins $1, \\flags, 0, 1 \n" + " mtc0 $1, $12 \n" +#else + " mfc0 $1, $12 \n" + " andi \\flags, 1 \n" + " ori $1, 1 \n" + " xori $1, 1 \n" + " or \\flags, $1 \n" + " mtc0 \\flags, $12 \n" +#endif + " irq_disable_hazard \n" + " .set at \n" + " .set reorder \n" + " .endm \n"); #define local_irq_restore(flags) \ do { \ diff --git a/include/asm-mips/inventory.h b/include/asm-mips/inventory.h index 4cd36fe98173..92d90f75a636 100644 --- a/include/asm-mips/inventory.h +++ b/include/asm-mips/inventory.h @@ -4,6 +4,8 @@ #ifndef __ASM_INVENTORY_H #define __ASM_INVENTORY_H +#include <linux/compiler.h> + typedef struct inventory_s { struct inventory_s *inv_next; int inv_class; @@ -14,7 +16,9 @@ typedef struct inventory_s { } inventory_t; extern int inventory_items; -void add_to_inventory (int class, int type, int controller, int unit, int state); -int dump_inventory_to_user (void *userbuf, int size); + +extern void add_to_inventory (int class, int type, int controller, int unit, int state); +extern int dump_inventory_to_user (void __user *userbuf, int size); +extern int __init init_inventory(void); #endif /* __ASM_INVENTORY_H */ diff --git a/include/asm-mips/io.h b/include/asm-mips/io.h index 039845f2e6b0..d42685747e7d 100644 --- a/include/asm-mips/io.h +++ b/include/asm-mips/io.h @@ -25,7 +25,9 @@ #include <asm/page.h> #include <asm/pgtable-bits.h> #include <asm/processor.h> +#include <asm/string.h> +#include <ioremap.h> #include <mangle-port.h> /* @@ -34,7 +36,7 @@ #undef CONF_SLOWDOWN_IO /* - * Raw operations are never swapped in software. Otoh values that raw + * Raw operations are never swapped in software. OTOH values that raw * operations are working on may or may not have been swapped by the bus * hardware. An example use would be for flash memory that's used for * execute in place. @@ -43,45 +45,53 @@ # define __raw_ioswabw(x) (x) # define __raw_ioswabl(x) (x) # define __raw_ioswabq(x) (x) +# define ____raw_ioswabq(x) (x) /* * Sane hardware offers swapping of PCI/ISA I/O space accesses in hardware; * less sane hardware forces software to fiddle with this... + * + * Regardless, if the host bus endianness mismatches that of PCI/ISA, then + * you can't have the numerical value of data and byte addresses within + * multibyte quantities both preserved at the same time. Hence two + * variations of functions: non-prefixed ones that preserve the value + * and prefixed ones that preserve byte addresses. The latters are + * typically used for moving raw data between a peripheral and memory (cf. + * string I/O functions), hence the "mem_" prefix. */ #if defined(CONFIG_SWAP_IO_SPACE) # define ioswabb(x) (x) +# define mem_ioswabb(x) (x) # ifdef CONFIG_SGI_IP22 /* * IP22 seems braindead enough to swap 16bits values in hardware, but * not 32bits. Go figure... Can't tell without documentation. */ # define ioswabw(x) (x) +# define mem_ioswabw(x) le16_to_cpu(x) # else # define ioswabw(x) le16_to_cpu(x) +# define mem_ioswabw(x) (x) # endif # define ioswabl(x) le32_to_cpu(x) +# define mem_ioswabl(x) (x) # define ioswabq(x) le64_to_cpu(x) +# define mem_ioswabq(x) (x) #else # define ioswabb(x) (x) +# define mem_ioswabb(x) (x) # define ioswabw(x) (x) +# define mem_ioswabw(x) cpu_to_le16(x) # define ioswabl(x) (x) +# define mem_ioswabl(x) cpu_to_le32(x) # define ioswabq(x) (x) +# define mem_ioswabq(x) cpu_to_le32(x) #endif -/* - * Native bus accesses never swapped. - */ -#define bus_ioswabb(x) (x) -#define bus_ioswabw(x) (x) -#define bus_ioswabl(x) (x) -#define bus_ioswabq(x) (x) - -#define __bus_ioswabq bus_ioswabq - #define IO_SPACE_LIMIT 0xffff /* @@ -194,12 +204,14 @@ extern unsigned long isa_slot_offset; */ #define page_to_phys(page) ((dma_addr_t)page_to_pfn(page) << PAGE_SHIFT) -extern void * __ioremap(phys_t offset, phys_t size, unsigned long flags); +extern void __iomem * __ioremap(phys_t offset, phys_t size, unsigned long flags); extern void __iounmap(volatile void __iomem *addr); -static inline void * __ioremap_mode(phys_t offset, unsigned long size, +static inline void __iomem * __ioremap_mode(phys_t offset, unsigned long size, unsigned long flags) { +#define __IS_LOW512(addr) (!((phys_t)(addr) & (phys_t) ~0x1fffffffULL)) + if (cpu_has_64bit_addresses) { u64 base = UNCAC_BASE; @@ -209,10 +221,30 @@ static inline void * __ioremap_mode(phys_t offset, unsigned long size, */ if (flags == _CACHE_UNCACHED) base = (u64) IO_BASE; - return (void *) (unsigned long) (base + offset); + return (void __iomem *) (unsigned long) (base + offset); + } else if (__builtin_constant_p(offset) && + __builtin_constant_p(size) && __builtin_constant_p(flags)) { + phys_t phys_addr, last_addr; + + phys_addr = fixup_bigphys_addr(offset, size); + + /* Don't allow wraparound or zero size. */ + last_addr = phys_addr + size - 1; + if (!size || last_addr < phys_addr) + return NULL; + + /* + * Map uncached objects in the low 512MB of address + * space using KSEG1. + */ + if (__IS_LOW512(phys_addr) && __IS_LOW512(last_addr) && + flags == _CACHE_UNCACHED) + return (void __iomem *)CKSEG1ADDR(phys_addr); } return __ioremap(offset, size, flags); + +#undef __IS_LOW512 } /* @@ -264,12 +296,16 @@ static inline void * __ioremap_mode(phys_t offset, unsigned long size, static inline void iounmap(volatile void __iomem *addr) { - if (cpu_has_64bit_addresses) +#define __IS_KSEG1(addr) (((unsigned long)(addr) & ~0x1fffffffUL) == CKSEG1) + + if (cpu_has_64bit_addresses || + (__builtin_constant_p(addr) && __IS_KSEG1(addr))) return; __iounmap(addr); -} +#undef __IS_KSEG1 +} #define __BUILD_MEMORY_SINGLE(pfx, bwlq, type, irq) \ \ @@ -319,7 +355,8 @@ static inline type pfx##read##bwlq(volatile void __iomem *mem) \ else if (cpu_has_64bits) { \ unsigned long __flags; \ \ - local_irq_save(__flags); \ + if (irq) \ + local_irq_save(__flags); \ __asm__ __volatile__( \ ".set mips3" "\t\t# __readq" "\n\t" \ "ld %L0, %1" "\n\t" \ @@ -328,7 +365,8 @@ static inline type pfx##read##bwlq(volatile void __iomem *mem) \ ".set mips0" "\n" \ : "=r" (__val) \ : "m" (*__mem)); \ - local_irq_restore(__flags); \ + if (irq) \ + local_irq_restore(__flags); \ } else { \ __val = 0; \ BUG(); \ @@ -349,11 +387,11 @@ static inline void pfx##out##bwlq##p(type val, unsigned long port) \ \ __val = pfx##ioswab##bwlq(val); \ \ - if (sizeof(type) != sizeof(u64)) { \ - *__addr = __val; \ - slow; \ - } else \ - BUILD_BUG(); \ + /* Really, we want this to be atomic */ \ + BUILD_BUG_ON(sizeof(type) > sizeof(unsigned long)); \ + \ + *__addr = __val; \ + slow; \ } \ \ static inline type pfx##in##bwlq##p(unsigned long port) \ @@ -364,13 +402,10 @@ static inline type pfx##in##bwlq##p(unsigned long port) \ port = __swizzle_addr_##bwlq(port); \ __addr = (void *)(mips_io_port_base + port); \ \ - if (sizeof(type) != sizeof(u64)) { \ - __val = *__addr; \ - slow; \ - } else { \ - __val = 0; \ - BUILD_BUG(); \ - } \ + BUILD_BUG_ON(sizeof(type) > sizeof(unsigned long)); \ + \ + __val = *__addr; \ + slow; \ \ return pfx##ioswab##bwlq(__val); \ } @@ -379,27 +414,35 @@ static inline type pfx##in##bwlq##p(unsigned long port) \ \ __BUILD_MEMORY_SINGLE(bus, bwlq, type, 1) -#define __BUILD_IOPORT_PFX(bus, bwlq, type) \ - \ -__BUILD_IOPORT_SINGLE(bus, bwlq, type, ,) \ -__BUILD_IOPORT_SINGLE(bus, bwlq, type, _p, SLOW_DOWN_IO) - -#define BUILDIO(bwlq, type) \ +#define BUILDIO_MEM(bwlq, type) \ \ -__BUILD_MEMORY_PFX(, bwlq, type) \ __BUILD_MEMORY_PFX(__raw_, bwlq, type) \ -__BUILD_MEMORY_PFX(bus_, bwlq, type) \ -__BUILD_IOPORT_PFX(, bwlq, type) \ -__BUILD_IOPORT_PFX(__raw_, bwlq, type) +__BUILD_MEMORY_PFX(, bwlq, type) \ +__BUILD_MEMORY_PFX(mem_, bwlq, type) \ + +BUILDIO_MEM(b, u8) +BUILDIO_MEM(w, u16) +BUILDIO_MEM(l, u32) +BUILDIO_MEM(q, u64) + +#define __BUILD_IOPORT_PFX(bus, bwlq, type) \ + __BUILD_IOPORT_SINGLE(bus, bwlq, type, ,) \ + __BUILD_IOPORT_SINGLE(bus, bwlq, type, _p, SLOW_DOWN_IO) + +#define BUILDIO_IOPORT(bwlq, type) \ + __BUILD_IOPORT_PFX(, bwlq, type) \ + __BUILD_IOPORT_PFX(mem_, bwlq, type) + +BUILDIO_IOPORT(b, u8) +BUILDIO_IOPORT(w, u16) +BUILDIO_IOPORT(l, u32) +#ifdef CONFIG_64BIT +BUILDIO_IOPORT(q, u64) +#endif #define __BUILDIO(bwlq, type) \ \ -__BUILD_MEMORY_SINGLE(__bus_, bwlq, type, 0) - -BUILDIO(b, u8) -BUILDIO(w, u16) -BUILDIO(l, u32) -BUILDIO(q, u64) +__BUILD_MEMORY_SINGLE(____raw_, bwlq, type, 0) __BUILDIO(q, u64) @@ -416,13 +459,13 @@ __BUILDIO(q, u64) #define __BUILD_MEMORY_STRING(bwlq, type) \ \ -static inline void writes##bwlq(volatile void __iomem *mem, void *addr, \ - unsigned int count) \ +static inline void writes##bwlq(volatile void __iomem *mem, \ + const void *addr, unsigned int count) \ { \ - volatile type *__addr = addr; \ + const volatile type *__addr = addr; \ \ while (count--) { \ - __raw_write##bwlq(*__addr, mem); \ + mem_write##bwlq(*__addr, mem); \ __addr++; \ } \ } \ @@ -433,20 +476,20 @@ static inline void reads##bwlq(volatile void __iomem *mem, void *addr, \ volatile type *__addr = addr; \ \ while (count--) { \ - *__addr = __raw_read##bwlq(mem); \ + *__addr = mem_read##bwlq(mem); \ __addr++; \ } \ } #define __BUILD_IOPORT_STRING(bwlq, type) \ \ -static inline void outs##bwlq(unsigned long port, void *addr, \ +static inline void outs##bwlq(unsigned long port, const void *addr, \ unsigned int count) \ { \ - volatile type *__addr = addr; \ + const volatile type *__addr = addr; \ \ while (count--) { \ - __raw_out##bwlq(*__addr, port); \ + mem_out##bwlq(*__addr, port); \ __addr++; \ } \ } \ @@ -457,7 +500,7 @@ static inline void ins##bwlq(unsigned long port, void *addr, \ volatile type *__addr = addr; \ \ while (count--) { \ - *__addr = __raw_in##bwlq(port); \ + *__addr = mem_in##bwlq(port); \ __addr++; \ } \ } @@ -470,15 +513,26 @@ __BUILD_IOPORT_STRING(bwlq, type) BUILDSTRING(b, u8) BUILDSTRING(w, u16) BUILDSTRING(l, u32) +#ifdef CONFIG_64BIT BUILDSTRING(q, u64) +#endif /* Depends on MIPS II instruction set */ #define mmiowb() asm volatile ("sync" ::: "memory") -#define memset_io(a,b,c) memset((void *)(a),(b),(c)) -#define memcpy_fromio(a,b,c) memcpy((a),(void *)(b),(c)) -#define memcpy_toio(a,b,c) memcpy((void *)(a),(b),(c)) +static inline void memset_io(volatile void __iomem *addr, unsigned char val, int count) +{ + memset((void __force *) addr, val, count); +} +static inline void memcpy_fromio(void *dst, const volatile void __iomem *src, int count) +{ + memcpy(dst, (void __force *) src, count); +} +static inline void memcpy_toio(volatile void __iomem *dst, const void *src, int count) +{ + memcpy((void __force *) dst, src, count); +} /* * Memory Mapped I/O diff --git a/include/asm-mips/ip32/crime.h b/include/asm-mips/ip32/crime.h index 152879bae20f..a13702fafa85 100644 --- a/include/asm-mips/ip32/crime.h +++ b/include/asm-mips/ip32/crime.h @@ -154,7 +154,7 @@ struct sgi_crime { #define CRIME_MEM_ERROR_ECC_REPL_MASK 0xffffffff }; -extern struct sgi_crime *crime; +extern struct sgi_crime __iomem *crime; #define CRIME_HI_MEM_BASE 0x40000000 /* this is where whole 1G of RAM is mapped */ diff --git a/include/asm-mips/ip32/mace.h b/include/asm-mips/ip32/mace.h index 432011b16c26..990082c81f39 100644 --- a/include/asm-mips/ip32/mace.h +++ b/include/asm-mips/ip32/mace.h @@ -147,6 +147,39 @@ struct mace_audio { } chan[3]; }; + +/* register definitions for parallel port DMA */ +struct mace_parport { + /* 0 - do nothing, + * 1 - pulse terminal count to the device after buffer is drained */ +#define MACEPAR_CONTEXT_LASTFLAG BIT(63) + /* Should not cross 4K page boundary */ +#define MACEPAR_CONTEXT_DATA_BOUND 0x0000000000001000UL +#define MACEPAR_CONTEXT_DATALEN_MASK 0x00000fff00000000UL +#define MACEPAR_CONTEXT_DATALEN_SHIFT 32 + /* Can be arbitrarily aligned on any byte boundary on output, + * 64 byte aligned on input */ +#define MACEPAR_CONTEXT_BASEADDR_MASK 0x00000000ffffffffUL + volatile u64 context_a; + volatile u64 context_b; + /* 0 - mem->device, 1 - device->mem */ +#define MACEPAR_CTLSTAT_DIRECTION BIT(0) + /* 0 - channel frozen, 1 - channel enabled */ +#define MACEPAR_CTLSTAT_ENABLE BIT(1) + /* 0 - channel active, 1 - complete channel reset */ +#define MACEPAR_CTLSTAT_RESET BIT(2) +#define MACEPAR_CTLSTAT_CTXB_VALID BIT(3) +#define MACEPAR_CTLSTAT_CTXA_VALID BIT(4) + volatile u64 cntlstat; /* Control/Status register */ +#define MACEPAR_DIAG_CTXINUSE BIT(0) + /* 1 - Dma engine is enabled and processing something */ +#define MACEPAR_DIAG_DMACTIVE BIT(1) + /* Counter of bytes left */ +#define MACEPAR_DIAG_CTRMASK 0x0000000000003ffcUL +#define MACEPAR_DIAG_CTRSHIFT 2 + volatile u64 diagnostic; /* RO: diagnostic register */ +}; + /* ISA Control and DMA registers */ struct mace_isactrl { volatile unsigned long ringbase; @@ -199,6 +232,7 @@ struct mace_isactrl { volatile unsigned long _pad[0x2000/8 - 4]; volatile unsigned long dp_ram[0x400]; + struct mace_parport parport; }; /* Keyboard & Mouse registers @@ -277,7 +311,7 @@ struct mace_perif { */ /* Parallel port */ -struct mace_parallel { /* later... */ +struct mace_parallel { }; struct mace_ecp1284 { /* later... */ @@ -329,6 +363,6 @@ struct sgi_mace { char _pad6[0x80000 - sizeof(struct mace_isa)]; }; -extern struct sgi_mace *mace; +extern struct sgi_mace __iomem *mace; #endif /* __ASM_MACE_H__ */ diff --git a/include/asm-mips/irq.h b/include/asm-mips/irq.h index 3f2470e9e678..8a342ccb34a8 100644 --- a/include/asm-mips/irq.h +++ b/include/asm-mips/irq.h @@ -24,11 +24,9 @@ static inline int irq_canonicalize(int irq) struct pt_regs; -#ifdef CONFIG_PREEMPT - extern asmlinkage unsigned int do_IRQ(unsigned int irq, struct pt_regs *regs); -#else +#ifdef CONFIG_PREEMPT /* * do_IRQ handles all normal device IRQ's (the special diff --git a/include/asm-mips/jmr3927/jmr3927.h b/include/asm-mips/jmr3927/jmr3927.h index 86df317b4078..baf412967afa 100644 --- a/include/asm-mips/jmr3927/jmr3927.h +++ b/include/asm-mips/jmr3927/jmr3927.h @@ -202,20 +202,6 @@ static inline int jmr3927_have_isac(void) #endif /* !__ASSEMBLY__ */ /* - * UART defines for serial.h - */ - -/* use Pre-scaler T0 (1/2) */ -#define JMR3927_BASE_BAUD (JMR3927_IMCLK / 2 / 16) - -#define UART0_ADDR 0xfffef300 -#define UART1_ADDR 0xfffef400 -#define UART0_INT JMR3927_IRQ_IRC_SIO0 -#define UART1_INT JMR3927_IRQ_IRC_SIO1 -#define UART0_FLAGS ASYNC_BOOT_AUTOCONF -#define UART1_FLAGS 0 - -/* * IRQ mappings */ diff --git a/include/asm-mips/mach-au1x00/au1000.h b/include/asm-mips/mach-au1x00/au1000.h index 148bae2fa7d3..8327ec341c18 100644 --- a/include/asm-mips/mach-au1x00/au1000.h +++ b/include/asm-mips/mach-au1x00/au1000.h @@ -60,59 +60,36 @@ void static inline au_sync_delay(int ms) mdelay(ms); } -void static inline au_writeb(u8 val, int reg) +void static inline au_writeb(u8 val, unsigned long reg) { *(volatile u8 *)(reg) = val; } -void static inline au_writew(u16 val, int reg) +void static inline au_writew(u16 val, unsigned long reg) { *(volatile u16 *)(reg) = val; } -void static inline au_writel(u32 val, int reg) +void static inline au_writel(u32 val, unsigned long reg) { *(volatile u32 *)(reg) = val; } -static inline u8 au_readb(unsigned long port) +static inline u8 au_readb(unsigned long reg) { - return (*(volatile u8 *)port); + return (*(volatile u8 *)reg); } -static inline u16 au_readw(unsigned long port) +static inline u16 au_readw(unsigned long reg) { - return (*(volatile u16 *)port); + return (*(volatile u16 *)reg); } -static inline u32 au_readl(unsigned long port) +static inline u32 au_readl(unsigned long reg) { - return (*(volatile u32 *)port); + return (*(volatile u32 *)reg); } -/* These next three functions should be a generic part of the MIPS - * kernel (with the 'au_' removed from the name) and selected for - * processors that support the instructions. - * Taken from PPC tree. -- Dan - */ -/* Return the bit position of the most significant 1 bit in a word */ -static __inline__ int __ilog2(unsigned int x) -{ - int lz; - - asm volatile ( - ".set\tnoreorder\n\t" - ".set\tnoat\n\t" - ".set\tmips32\n\t" - "clz\t%0,%1\n\t" - ".set\tmips0\n\t" - ".set\tat\n\t" - ".set\treorder" - : "=r" (lz) - : "r" (x)); - - return 31 - lz; -} static __inline__ int au_ffz(unsigned int x) { @@ -162,28 +139,293 @@ extern au1xxx_irq_map_t au1xxx_irq_map[]; #define ALLINTS (IE_IRQ0 | IE_IRQ1 | IE_IRQ2 | IE_IRQ3 | IE_IRQ4 | IE_IRQ5) #endif -/* SDRAM Controller */ +/* + * SDRAM Register Offsets + */ #if defined(CONFIG_SOC_AU1000) || defined(CONFIG_SOC_AU1500) || defined(CONFIG_SOC_AU1100) -#define MEM_SDMODE0 0xB4000000 -#define MEM_SDMODE1 0xB4000004 -#define MEM_SDMODE2 0xB4000008 +#define MEM_SDMODE0 (0x0000) +#define MEM_SDMODE1 (0x0004) +#define MEM_SDMODE2 (0x0008) +#define MEM_SDADDR0 (0x000C) +#define MEM_SDADDR1 (0x0010) +#define MEM_SDADDR2 (0x0014) +#define MEM_SDREFCFG (0x0018) +#define MEM_SDPRECMD (0x001C) +#define MEM_SDAUTOREF (0x0020) +#define MEM_SDWRMD0 (0x0024) +#define MEM_SDWRMD1 (0x0028) +#define MEM_SDWRMD2 (0x002C) +#define MEM_SDSLEEP (0x0030) +#define MEM_SDSMCKE (0x0034) -#define MEM_SDADDR0 0xB400000C -#define MEM_SDADDR1 0xB4000010 -#define MEM_SDADDR2 0xB4000014 +/* + * MEM_SDMODE register content definitions + */ +#define MEM_SDMODE_F (1<<22) +#define MEM_SDMODE_SR (1<<21) +#define MEM_SDMODE_BS (1<<20) +#define MEM_SDMODE_RS (3<<18) +#define MEM_SDMODE_CS (7<<15) +#define MEM_SDMODE_TRAS (15<<11) +#define MEM_SDMODE_TMRD (3<<9) +#define MEM_SDMODE_TWR (3<<7) +#define MEM_SDMODE_TRP (3<<5) +#define MEM_SDMODE_TRCD (3<<3) +#define MEM_SDMODE_TCL (7<<0) + +#define MEM_SDMODE_BS_2Bank (0<<20) +#define MEM_SDMODE_BS_4Bank (1<<20) +#define MEM_SDMODE_RS_11Row (0<<18) +#define MEM_SDMODE_RS_12Row (1<<18) +#define MEM_SDMODE_RS_13Row (2<<18) +#define MEM_SDMODE_RS_N(N) ((N)<<18) +#define MEM_SDMODE_CS_7Col (0<<15) +#define MEM_SDMODE_CS_8Col (1<<15) +#define MEM_SDMODE_CS_9Col (2<<15) +#define MEM_SDMODE_CS_10Col (3<<15) +#define MEM_SDMODE_CS_11Col (4<<15) +#define MEM_SDMODE_CS_N(N) ((N)<<15) +#define MEM_SDMODE_TRAS_N(N) ((N)<<11) +#define MEM_SDMODE_TMRD_N(N) ((N)<<9) +#define MEM_SDMODE_TWR_N(N) ((N)<<7) +#define MEM_SDMODE_TRP_N(N) ((N)<<5) +#define MEM_SDMODE_TRCD_N(N) ((N)<<3) +#define MEM_SDMODE_TCL_N(N) ((N)<<0) -#define MEM_SDREFCFG 0xB4000018 -#define MEM_SDPRECMD 0xB400001C -#define MEM_SDAUTOREF 0xB4000020 +/* + * MEM_SDADDR register contents definitions + */ +#define MEM_SDADDR_E (1<<20) +#define MEM_SDADDR_CSBA (0x03FF<<10) +#define MEM_SDADDR_CSMASK (0x03FF<<0) +#define MEM_SDADDR_CSBA_N(N) ((N)&(0x03FF<<22)>>12) +#define MEM_SDADDR_CSMASK_N(N) ((N)&(0x03FF<<22)>>22) + +/* + * MEM_SDREFCFG register content definitions + */ +#define MEM_SDREFCFG_TRC (15<<28) +#define MEM_SDREFCFG_TRPM (3<<26) +#define MEM_SDREFCFG_E (1<<25) +#define MEM_SDREFCFG_RE (0x1ffffff<<0) +#define MEM_SDREFCFG_TRC_N(N) ((N)<<MEM_SDREFCFG_TRC) +#define MEM_SDREFCFG_TRPM_N(N) ((N)<<MEM_SDREFCFG_TRPM) +#define MEM_SDREFCFG_REF_N(N) (N) +#endif -#define MEM_SDWRMD0 0xB4000024 -#define MEM_SDWRMD1 0xB4000028 -#define MEM_SDWRMD2 0xB400002C +/***********************************************************************/ -#define MEM_SDSLEEP 0xB4000030 -#define MEM_SDSMCKE 0xB4000034 +/* + * Au1550 SDRAM Register Offsets + */ + +/***********************************************************************/ + +#if defined(CONFIG_SOC_AU1550) || defined(CONFIG_SOC_AU1200) +#define MEM_SDMODE0 (0x0800) +#define MEM_SDMODE1 (0x0808) +#define MEM_SDMODE2 (0x0810) +#define MEM_SDADDR0 (0x0820) +#define MEM_SDADDR1 (0x0828) +#define MEM_SDADDR2 (0x0830) +#define MEM_SDCONFIGA (0x0840) +#define MEM_SDCONFIGB (0x0848) +#define MEM_SDSTAT (0x0850) +#define MEM_SDERRADDR (0x0858) +#define MEM_SDSTRIDE0 (0x0860) +#define MEM_SDSTRIDE1 (0x0868) +#define MEM_SDSTRIDE2 (0x0870) +#define MEM_SDWRMD0 (0x0880) +#define MEM_SDWRMD1 (0x0888) +#define MEM_SDWRMD2 (0x0890) +#define MEM_SDPRECMD (0x08C0) +#define MEM_SDAUTOREF (0x08C8) +#define MEM_SDSREF (0x08D0) +#define MEM_SDSLEEP MEM_SDSREF + +#endif + +/* + * Physical base addresses for integrated peripherals + */ + +#ifdef CONFIG_SOC_AU1000 +#define MEM_PHYS_ADDR 0x14000000 +#define STATIC_MEM_PHYS_ADDR 0x14001000 +#define DMA0_PHYS_ADDR 0x14002000 +#define DMA1_PHYS_ADDR 0x14002100 +#define DMA2_PHYS_ADDR 0x14002200 +#define DMA3_PHYS_ADDR 0x14002300 +#define DMA4_PHYS_ADDR 0x14002400 +#define DMA5_PHYS_ADDR 0x14002500 +#define DMA6_PHYS_ADDR 0x14002600 +#define DMA7_PHYS_ADDR 0x14002700 +#define IC0_PHYS_ADDR 0x10400000 +#define IC1_PHYS_ADDR 0x11800000 +#define AC97_PHYS_ADDR 0x10000000 +#define USBH_PHYS_ADDR 0x10100000 +#define USBD_PHYS_ADDR 0x10200000 +#define IRDA_PHYS_ADDR 0x10300000 +#define MAC0_PHYS_ADDR 0x10500000 +#define MAC1_PHYS_ADDR 0x10510000 +#define MACEN_PHYS_ADDR 0x10520000 +#define MACDMA0_PHYS_ADDR 0x14004000 +#define MACDMA1_PHYS_ADDR 0x14004200 +#define I2S_PHYS_ADDR 0x11000000 +#define UART0_PHYS_ADDR 0x11100000 +#define UART1_PHYS_ADDR 0x11200000 +#define UART2_PHYS_ADDR 0x11300000 +#define UART3_PHYS_ADDR 0x11400000 +#define SSI0_PHYS_ADDR 0x11600000 +#define SSI1_PHYS_ADDR 0x11680000 +#define SYS_PHYS_ADDR 0x11900000 +#define PCMCIA_IO_PHYS_ADDR 0xF00000000ULL +#define PCMCIA_ATTR_PHYS_ADDR 0xF40000000ULL +#define PCMCIA_MEM_PHYS_ADDR 0xF80000000ULL #endif +/********************************************************************/ + +#ifdef CONFIG_SOC_AU1500 +#define MEM_PHYS_ADDR 0x14000000 +#define STATIC_MEM_PHYS_ADDR 0x14001000 +#define DMA0_PHYS_ADDR 0x14002000 +#define DMA1_PHYS_ADDR 0x14002100 +#define DMA2_PHYS_ADDR 0x14002200 +#define DMA3_PHYS_ADDR 0x14002300 +#define DMA4_PHYS_ADDR 0x14002400 +#define DMA5_PHYS_ADDR 0x14002500 +#define DMA6_PHYS_ADDR 0x14002600 +#define DMA7_PHYS_ADDR 0x14002700 +#define IC0_PHYS_ADDR 0x10400000 +#define IC1_PHYS_ADDR 0x11800000 +#define AC97_PHYS_ADDR 0x10000000 +#define USBH_PHYS_ADDR 0x10100000 +#define USBD_PHYS_ADDR 0x10200000 +#define PCI_PHYS_ADDR 0x14005000 +#define MAC0_PHYS_ADDR 0x11500000 +#define MAC1_PHYS_ADDR 0x11510000 +#define MACEN_PHYS_ADDR 0x11520000 +#define MACDMA0_PHYS_ADDR 0x14004000 +#define MACDMA1_PHYS_ADDR 0x14004200 +#define I2S_PHYS_ADDR 0x11000000 +#define UART0_PHYS_ADDR 0x11100000 +#define UART3_PHYS_ADDR 0x11400000 +#define GPIO2_PHYS_ADDR 0x11700000 +#define SYS_PHYS_ADDR 0x11900000 +#define PCI_MEM_PHYS_ADDR 0x400000000ULL +#define PCI_IO_PHYS_ADDR 0x500000000ULL +#define PCI_CONFIG0_PHYS_ADDR 0x600000000ULL +#define PCI_CONFIG1_PHYS_ADDR 0x680000000ULL +#define PCMCIA_IO_PHYS_ADDR 0xF00000000ULL +#define PCMCIA_ATTR_PHYS_ADDR 0xF40000000ULL +#define PCMCIA_MEM_PHYS_ADDR 0xF80000000ULL +#endif + +/********************************************************************/ + +#ifdef CONFIG_SOC_AU1100 +#define MEM_PHYS_ADDR 0x14000000 +#define STATIC_MEM_PHYS_ADDR 0x14001000 +#define DMA0_PHYS_ADDR 0x14002000 +#define DMA1_PHYS_ADDR 0x14002100 +#define DMA2_PHYS_ADDR 0x14002200 +#define DMA3_PHYS_ADDR 0x14002300 +#define DMA4_PHYS_ADDR 0x14002400 +#define DMA5_PHYS_ADDR 0x14002500 +#define DMA6_PHYS_ADDR 0x14002600 +#define DMA7_PHYS_ADDR 0x14002700 +#define IC0_PHYS_ADDR 0x10400000 +#define SD0_PHYS_ADDR 0x10600000 +#define SD1_PHYS_ADDR 0x10680000 +#define IC1_PHYS_ADDR 0x11800000 +#define AC97_PHYS_ADDR 0x10000000 +#define USBH_PHYS_ADDR 0x10100000 +#define USBD_PHYS_ADDR 0x10200000 +#define IRDA_PHYS_ADDR 0x10300000 +#define MAC0_PHYS_ADDR 0x10500000 +#define MACEN_PHYS_ADDR 0x10520000 +#define MACDMA0_PHYS_ADDR 0x14004000 +#define MACDMA1_PHYS_ADDR 0x14004200 +#define I2S_PHYS_ADDR 0x11000000 +#define UART0_PHYS_ADDR 0x11100000 +#define UART1_PHYS_ADDR 0x11200000 +#define UART3_PHYS_ADDR 0x11400000 +#define SSI0_PHYS_ADDR 0x11600000 +#define SSI1_PHYS_ADDR 0x11680000 +#define GPIO2_PHYS_ADDR 0x11700000 +#define SYS_PHYS_ADDR 0x11900000 +#define LCD_PHYS_ADDR 0x15000000 +#define PCMCIA_IO_PHYS_ADDR 0xF00000000ULL +#define PCMCIA_ATTR_PHYS_ADDR 0xF40000000ULL +#define PCMCIA_MEM_PHYS_ADDR 0xF80000000ULL +#endif + +/***********************************************************************/ + +#ifdef CONFIG_SOC_AU1550 +#define MEM_PHYS_ADDR 0x14000000 +#define STATIC_MEM_PHYS_ADDR 0x14001000 +#define IC0_PHYS_ADDR 0x10400000 +#define IC1_PHYS_ADDR 0x11800000 +#define USBH_PHYS_ADDR 0x14020000 +#define USBD_PHYS_ADDR 0x10200000 +#define PCI_PHYS_ADDR 0x14005000 +#define MAC0_PHYS_ADDR 0x10500000 +#define MAC1_PHYS_ADDR 0x10510000 +#define MACEN_PHYS_ADDR 0x10520000 +#define MACDMA0_PHYS_ADDR 0x14004000 +#define MACDMA1_PHYS_ADDR 0x14004200 +#define UART0_PHYS_ADDR 0x11100000 +#define UART1_PHYS_ADDR 0x11200000 +#define UART3_PHYS_ADDR 0x11400000 +#define GPIO2_PHYS_ADDR 0x11700000 +#define SYS_PHYS_ADDR 0x11900000 +#define DDMA_PHYS_ADDR 0x14002000 +#define PE_PHYS_ADDR 0x14008000 +#define PSC0_PHYS_ADDR 0x11A00000 +#define PSC1_PHYS_ADDR 0x11B00000 +#define PSC2_PHYS_ADDR 0x10A00000 +#define PSC3_PHYS_ADDR 0x10B00000 +#define PCI_MEM_PHYS_ADDR 0x400000000ULL +#define PCI_IO_PHYS_ADDR 0x500000000ULL +#define PCI_CONFIG0_PHYS_ADDR 0x600000000ULL +#define PCI_CONFIG1_PHYS_ADDR 0x680000000ULL +#define PCMCIA_IO_PHYS_ADDR 0xF00000000ULL +#define PCMCIA_ATTR_PHYS_ADDR 0xF40000000ULL +#define PCMCIA_MEM_PHYS_ADDR 0xF80000000ULL +#endif + +/***********************************************************************/ + +#ifdef CONFIG_SOC_AU1200 +#define MEM_PHYS_ADDR 0x14000000 +#define STATIC_MEM_PHYS_ADDR 0x14001000 +#define AES_PHYS_ADDR 0x10300000 +#define CIM_PHYS_ADDR 0x14004000 +#define IC0_PHYS_ADDR 0x10400000 +#define IC1_PHYS_ADDR 0x11800000 +#define USBM_PHYS_ADDR 0x14020000 +#define USBH_PHYS_ADDR 0x14020100 +#define UART0_PHYS_ADDR 0x11100000 +#define UART1_PHYS_ADDR 0x11200000 +#define GPIO2_PHYS_ADDR 0x11700000 +#define SYS_PHYS_ADDR 0x11900000 +#define DDMA_PHYS_ADDR 0x14002000 +#define PSC0_PHYS_ADDR 0x11A00000 +#define PSC1_PHYS_ADDR 0x11B00000 +#define SD0_PHYS_ADDR 0x10600000 +#define SD1_PHYS_ADDR 0x10680000 +#define LCD_PHYS_ADDR 0x15000000 +#define SWCNT_PHYS_ADDR 0x1110010C +#define MAEFE_PHYS_ADDR 0x14012000 +#define MAEBE_PHYS_ADDR 0x14010000 +#define PCMCIA_IO_PHYS_ADDR 0xF00000000ULL +#define PCMCIA_ATTR_PHYS_ADDR 0xF40000000ULL +#define PCMCIA_MEM_PHYS_ADDR 0xF80000000ULL +#endif + + /* Static Bus Controller */ #define MEM_STCFG0 0xB4001000 #define MEM_STTIME0 0xB4001004 @@ -369,7 +611,7 @@ extern au1xxx_irq_map_t au1xxx_irq_map[]; #define AU1000_MAC0_ENABLE 0xB0520000 #define AU1000_MAC1_ENABLE 0xB0520004 #define NUM_ETH_INTERFACES 2 -#endif // CONFIG_SOC_AU1000 +#endif /* CONFIG_SOC_AU1000 */ /* Au1500 */ #ifdef CONFIG_SOC_AU1500 @@ -429,6 +671,12 @@ extern au1xxx_irq_map_t au1xxx_irq_map[]; #define AU1500_GPIO_207 62 #define AU1500_GPIO_208_215 63 +/* shortcuts */ +#define INTA AU1000_PCI_INTA +#define INTB AU1000_PCI_INTB +#define INTC AU1000_PCI_INTC +#define INTD AU1000_PCI_INTD + #define UART0_ADDR 0xB1100000 #define UART3_ADDR 0xB1400000 @@ -440,7 +688,7 @@ extern au1xxx_irq_map_t au1xxx_irq_map[]; #define AU1500_MAC0_ENABLE 0xB1520000 #define AU1500_MAC1_ENABLE 0xB1520004 #define NUM_ETH_INTERFACES 2 -#endif // CONFIG_SOC_AU1500 +#endif /* CONFIG_SOC_AU1500 */ /* Au1100 */ #ifdef CONFIG_SOC_AU1100 @@ -485,6 +733,22 @@ extern au1xxx_irq_map_t au1xxx_irq_map[]; #define AU1000_GPIO_13 45 #define AU1000_GPIO_14 46 #define AU1000_GPIO_15 47 +#define AU1000_GPIO_16 48 +#define AU1000_GPIO_17 49 +#define AU1000_GPIO_18 50 +#define AU1000_GPIO_19 51 +#define AU1000_GPIO_20 52 +#define AU1000_GPIO_21 53 +#define AU1000_GPIO_22 54 +#define AU1000_GPIO_23 55 +#define AU1000_GPIO_24 56 +#define AU1000_GPIO_25 57 +#define AU1000_GPIO_26 58 +#define AU1000_GPIO_27 59 +#define AU1000_GPIO_28 60 +#define AU1000_GPIO_29 61 +#define AU1000_GPIO_30 62 +#define AU1000_GPIO_31 63 #define UART0_ADDR 0xB1100000 #define UART1_ADDR 0xB1200000 @@ -496,7 +760,7 @@ extern au1xxx_irq_map_t au1xxx_irq_map[]; #define AU1100_ETH0_BASE 0xB0500000 #define AU1100_MAC0_ENABLE 0xB0520000 #define NUM_ETH_INTERFACES 1 -#endif // CONFIG_SOC_AU1100 +#endif /* CONFIG_SOC_AU1100 */ #ifdef CONFIG_SOC_AU1550 #define AU1550_UART0_INT 0 @@ -513,14 +777,14 @@ extern au1xxx_irq_map_t au1xxx_irq_map[]; #define AU1550_PSC1_INT 11 #define AU1550_PSC2_INT 12 #define AU1550_PSC3_INT 13 -#define AU1550_TOY_INT 14 -#define AU1550_TOY_MATCH0_INT 15 -#define AU1550_TOY_MATCH1_INT 16 -#define AU1550_TOY_MATCH2_INT 17 -#define AU1550_RTC_INT 18 -#define AU1550_RTC_MATCH0_INT 19 -#define AU1550_RTC_MATCH1_INT 20 -#define AU1550_RTC_MATCH2_INT 21 +#define AU1000_TOY_INT 14 +#define AU1000_TOY_MATCH0_INT 15 +#define AU1000_TOY_MATCH1_INT 16 +#define AU1000_TOY_MATCH2_INT 17 +#define AU1000_RTC_INT 18 +#define AU1000_RTC_MATCH0_INT 19 +#define AU1000_RTC_MATCH1_INT 20 +#define AU1000_RTC_MATCH2_INT 21 #define AU1550_NAND_INT 23 #define AU1550_USB_DEV_REQ_INT 24 #define AU1550_USB_DEV_SUS_INT 25 @@ -563,6 +827,12 @@ extern au1xxx_irq_map_t au1xxx_irq_map[]; #define AU1500_GPIO_207 62 #define AU1500_GPIO_208_218 63 // Logical or of GPIO208:218 +/* shortcuts */ +#define INTA AU1550_PCI_INTA +#define INTB AU1550_PCI_INTB +#define INTC AU1550_PCI_INTC +#define INTD AU1550_PCI_INTD + #define UART0_ADDR 0xB1100000 #define UART1_ADDR 0xB1200000 #define UART3_ADDR 0xB1400000 @@ -575,7 +845,7 @@ extern au1xxx_irq_map_t au1xxx_irq_map[]; #define AU1550_MAC0_ENABLE 0xB0520000 #define AU1550_MAC1_ENABLE 0xB0520004 #define NUM_ETH_INTERFACES 2 -#endif // CONFIG_SOC_AU1550 +#endif /* CONFIG_SOC_AU1550 */ #ifdef CONFIG_SOC_AU1200 #define AU1200_UART0_INT 0 @@ -592,14 +862,14 @@ extern au1xxx_irq_map_t au1xxx_irq_map[]; #define AU1200_PSC1_INT 11 #define AU1200_AES_INT 12 #define AU1200_CAMERA_INT 13 -#define AU1200_TOY_INT 14 -#define AU1200_TOY_MATCH0_INT 15 -#define AU1200_TOY_MATCH1_INT 16 -#define AU1200_TOY_MATCH2_INT 17 -#define AU1200_RTC_INT 18 -#define AU1200_RTC_MATCH0_INT 19 -#define AU1200_RTC_MATCH1_INT 20 -#define AU1200_RTC_MATCH2_INT 21 +#define AU1000_TOY_INT 14 +#define AU1000_TOY_MATCH0_INT 15 +#define AU1000_TOY_MATCH1_INT 16 +#define AU1000_TOY_MATCH2_INT 17 +#define AU1000_RTC_INT 18 +#define AU1000_RTC_MATCH0_INT 19 +#define AU1000_RTC_MATCH1_INT 20 +#define AU1000_RTC_MATCH2_INT 21 #define AU1200_NAND_INT 23 #define AU1200_GPIO_204 24 #define AU1200_GPIO_205 25 @@ -607,6 +877,7 @@ extern au1xxx_irq_map_t au1xxx_irq_map[]; #define AU1200_GPIO_207 27 #define AU1200_GPIO_208_215 28 // Logical OR of 208:215 #define AU1200_USB_INT 29 +#define AU1000_USB_HOST_INT AU1200_USB_INT #define AU1200_LCD_INT 30 #define AU1200_MAE_BOTH_INT 31 #define AU1000_GPIO_0 32 @@ -645,20 +916,36 @@ extern au1xxx_irq_map_t au1xxx_irq_map[]; #define UART0_ADDR 0xB1100000 #define UART1_ADDR 0xB1200000 -#define USB_OHCI_BASE 0x14020000 // phys addr for ioremap -#define USB_HOST_CONFIG 0xB4027ffc - -// these are here for prototyping on au1550 (do not exist on au1200) -#define AU1200_ETH0_BASE 0xB0500000 -#define AU1200_ETH1_BASE 0xB0510000 -#define AU1200_MAC0_ENABLE 0xB0520000 -#define AU1200_MAC1_ENABLE 0xB0520004 -#define NUM_ETH_INTERFACES 2 -#endif // CONFIG_SOC_AU1200 +#define USB_UOC_BASE 0x14020020 +#define USB_UOC_LEN 0x20 +#define USB_OHCI_BASE 0x14020100 +#define USB_OHCI_LEN 0x100 +#define USB_EHCI_BASE 0x14020200 +#define USB_EHCI_LEN 0x100 +#define USB_UDC_BASE 0x14022000 +#define USB_UDC_LEN 0x2000 +#define USB_MSR_BASE 0xB4020000 +#define USB_MSR_MCFG 4 +#define USBMSRMCFG_OMEMEN 0 +#define USBMSRMCFG_OBMEN 1 +#define USBMSRMCFG_EMEMEN 2 +#define USBMSRMCFG_EBMEN 3 +#define USBMSRMCFG_DMEMEN 4 +#define USBMSRMCFG_DBMEN 5 +#define USBMSRMCFG_GMEMEN 6 +#define USBMSRMCFG_OHCCLKEN 16 +#define USBMSRMCFG_EHCCLKEN 17 +#define USBMSRMCFG_UDCCLKEN 18 +#define USBMSRMCFG_PHYPLLEN 19 +#define USBMSRMCFG_RDCOMB 30 +#define USBMSRMCFG_PFEN 31 + +#endif /* CONFIG_SOC_AU1200 */ #define AU1000_LAST_INTC0_INT 31 +#define AU1000_LAST_INTC1_INT 63 #define AU1000_MAX_INTR 63 - +#define INTX 0xFF /* not valid */ /* Programmable Counters 0 and 1 */ #define SYS_BASE 0xB1900000 @@ -730,6 +1017,8 @@ extern au1xxx_irq_map_t au1xxx_irq_map[]; #define I2S_CONTROL_D (1<<1) #define I2S_CONTROL_CE (1<<0) +#ifndef CONFIG_SOC_AU1200 + /* USB Host Controller */ #define USB_OHCI_LEN 0x00100000 @@ -775,6 +1064,8 @@ extern au1xxx_irq_map_t au1xxx_irq_map[]; #define USBDEV_ENABLE (1<<1) #define USBDEV_CE (1<<0) +#endif /* !CONFIG_SOC_AU1200 */ + /* Ethernet Controllers */ /* 4 byte offsets from AU1000_ETH_BASE */ @@ -1173,6 +1464,37 @@ extern au1xxx_irq_map_t au1xxx_irq_map[]; #define SYS_PF_PSC1_S1 (1 << 1) #define SYS_PF_MUST_BE_SET ((1 << 5) | (1 << 2)) +/* Au1200 Only */ +#ifdef CONFIG_SOC_AU1200 +#define SYS_PINFUNC_DMA (1<<31) +#define SYS_PINFUNC_S0A (1<<30) +#define SYS_PINFUNC_S1A (1<<29) +#define SYS_PINFUNC_LP0 (1<<28) +#define SYS_PINFUNC_LP1 (1<<27) +#define SYS_PINFUNC_LD16 (1<<26) +#define SYS_PINFUNC_LD8 (1<<25) +#define SYS_PINFUNC_LD1 (1<<24) +#define SYS_PINFUNC_LD0 (1<<23) +#define SYS_PINFUNC_P1A (3<<21) +#define SYS_PINFUNC_P1B (1<<20) +#define SYS_PINFUNC_FS3 (1<<19) +#define SYS_PINFUNC_P0A (3<<17) +#define SYS_PINFUNC_CS (1<<16) +#define SYS_PINFUNC_CIM (1<<15) +#define SYS_PINFUNC_P1C (1<<14) +#define SYS_PINFUNC_U1T (1<<12) +#define SYS_PINFUNC_U1R (1<<11) +#define SYS_PINFUNC_EX1 (1<<10) +#define SYS_PINFUNC_EX0 (1<<9) +#define SYS_PINFUNC_U0R (1<<8) +#define SYS_PINFUNC_MC (1<<7) +#define SYS_PINFUNC_S0B (1<<6) +#define SYS_PINFUNC_S0C (1<<5) +#define SYS_PINFUNC_P0B (1<<4) +#define SYS_PINFUNC_U0T (1<<3) +#define SYS_PINFUNC_S1B (1<<2) +#endif + #define SYS_TRIOUTRD 0xB1900100 #define SYS_TRIOUTCLR 0xB1900100 #define SYS_OUTPUTRD 0xB1900108 @@ -1239,6 +1561,12 @@ extern au1xxx_irq_map_t au1xxx_irq_map[]; #define SYS_CS_MI2_MASK (0x7<<SYS_CS_MI2_BIT) #define SYS_CS_DI2 (1<<16) #define SYS_CS_CI2 (1<<15) +#ifdef CONFIG_SOC_AU1100 + #define SYS_CS_ML_BIT 7 + #define SYS_CS_ML_MASK (0x7<<SYS_CS_ML_BIT) + #define SYS_CS_DL (1<<6) + #define SYS_CS_CL (1<<5) +#else #define SYS_CS_MUH_BIT 12 #define SYS_CS_MUH_MASK (0x7<<SYS_CS_MUH_BIT) #define SYS_CS_DUH (1<<11) @@ -1247,6 +1575,7 @@ extern au1xxx_irq_map_t au1xxx_irq_map[]; #define SYS_CS_MUD_MASK (0x7<<SYS_CS_MUD_BIT) #define SYS_CS_DUD (1<<6) #define SYS_CS_CUD (1<<5) +#endif #define SYS_CS_MIR_BIT 2 #define SYS_CS_MIR_MASK (0x7<<SYS_CS_MIR_BIT) #define SYS_CS_DIR (1<<1) @@ -1300,7 +1629,6 @@ extern au1xxx_irq_map_t au1xxx_irq_map[]; #define SD1_XMIT_FIFO 0xB0680000 #define SD1_RECV_FIFO 0xB0680004 - #if defined (CONFIG_SOC_AU1500) || defined(CONFIG_SOC_AU1550) /* Au1500 PCI Controller */ #define Au1500_CFG_BASE 0xB4005000 // virtual, kseg0 addr @@ -1363,36 +1691,77 @@ extern au1xxx_irq_map_t au1xxx_irq_map[]; _ctl_; }) -#else /* Au1000 and Au1100 */ +#else /* Au1000 and Au1100 and Au1200 */ /* don't allow any legacy ports probing */ -#define IOPORT_RESOURCE_START 0x10000000; +#define IOPORT_RESOURCE_START 0x10000000 #define IOPORT_RESOURCE_END 0xffffffff #define IOMEM_RESOURCE_START 0x10000000 #define IOMEM_RESOURCE_END 0xffffffff -#ifdef CONFIG_MIPS_PB1000 -#define PCI_IO_START 0x10000000 -#define PCI_IO_END 0x1000ffff -#define PCI_MEM_START 0x18000000 -#define PCI_MEM_END 0x18ffffff -#define PCI_FIRST_DEVFN 0 -#define PCI_LAST_DEVFN 1 -#else -/* no PCI bus controller */ #define PCI_IO_START 0 #define PCI_IO_END 0 #define PCI_MEM_START 0 #define PCI_MEM_END 0 #define PCI_FIRST_DEVFN 0 #define PCI_LAST_DEVFN 0 -#endif #endif +#ifndef _LANGUAGE_ASSEMBLY +typedef volatile struct +{ + /* 0x0000 */ u32 toytrim; + /* 0x0004 */ u32 toywrite; + /* 0x0008 */ u32 toymatch0; + /* 0x000C */ u32 toymatch1; + /* 0x0010 */ u32 toymatch2; + /* 0x0014 */ u32 cntrctrl; + /* 0x0018 */ u32 scratch0; + /* 0x001C */ u32 scratch1; + /* 0x0020 */ u32 freqctrl0; + /* 0x0024 */ u32 freqctrl1; + /* 0x0028 */ u32 clksrc; + /* 0x002C */ u32 pinfunc; + /* 0x0030 */ u32 reserved0; + /* 0x0034 */ u32 wakemsk; + /* 0x0038 */ u32 endian; + /* 0x003C */ u32 powerctrl; + /* 0x0040 */ u32 toyread; + /* 0x0044 */ u32 rtctrim; + /* 0x0048 */ u32 rtcwrite; + /* 0x004C */ u32 rtcmatch0; + /* 0x0050 */ u32 rtcmatch1; + /* 0x0054 */ u32 rtcmatch2; + /* 0x0058 */ u32 rtcread; + /* 0x005C */ u32 wakesrc; + /* 0x0060 */ u32 cpupll; + /* 0x0064 */ u32 auxpll; + /* 0x0068 */ u32 reserved1; + /* 0x006C */ u32 reserved2; + /* 0x0070 */ u32 reserved3; + /* 0x0074 */ u32 reserved4; + /* 0x0078 */ u32 slppwr; + /* 0x007C */ u32 sleep; + /* 0x0080 */ u32 reserved5[32]; + /* 0x0100 */ u32 trioutrd; +#define trioutclr trioutrd + /* 0x0104 */ u32 reserved6; + /* 0x0108 */ u32 outputrd; +#define outputset outputrd + /* 0x010C */ u32 outputclr; + /* 0x0110 */ u32 pinstaterd; +#define pininputen pinstaterd + +} AU1X00_SYS; + +static AU1X00_SYS* const sys = (AU1X00_SYS *)SYS_BASE; + +#endif /* Processor information base on prid. * Copied from PowerPC. */ +#ifndef _LANGUAGE_ASSEMBLY struct cpu_spec { /* CPU is matched via (PRID & prid_mask) == prid_value */ unsigned int prid_mask; @@ -1406,3 +1775,6 @@ struct cpu_spec { extern struct cpu_spec cpu_specs[]; extern struct cpu_spec *cur_cpu_spec[]; #endif + +#endif + diff --git a/include/asm-mips/mach-au1x00/au1xxx.h b/include/asm-mips/mach-au1x00/au1xxx.h new file mode 100644 index 000000000000..b7b46dd9b929 --- /dev/null +++ b/include/asm-mips/mach-au1x00/au1xxx.h @@ -0,0 +1,44 @@ +/* + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#ifndef _AU1XXX_H_ +#define _AU1XXX_H_ + +#include <linux/config.h> + +#include <asm/mach-au1x00/au1000.h> + +#if defined(CONFIG_MIPS_DB1000) || defined(CONFIG_MIPS_DB1100) || defined(CONFIG_MIPS_DB1500) || defined(CONFIG_MIPS_DB1550) +#include <asm/mach-db1x00/db1x00.h> + +#elif defined(CONFIG_MIPS_PB1550) +#include <asm/mach-pb1x00/pb1550.h> + +#elif defined(CONFIG_MIPS_PB1200) +#include <asm/mach-pb1x00/pb1200.h> + +#elif defined(CONFIG_MIPS_DB1200) +#include <asm/mach-db1x00/db1200.h> + +#endif + +#endif /* _AU1XXX_H_ */ diff --git a/include/asm-mips/mach-au1x00/au1xxx_dbdma.h b/include/asm-mips/mach-au1x00/au1xxx_dbdma.h index d5eb88cd7d51..b327bcd3fee1 100644 --- a/include/asm-mips/mach-au1x00/au1xxx_dbdma.h +++ b/include/asm-mips/mach-au1x00/au1xxx_dbdma.h @@ -45,7 +45,7 @@ #define DDMA_GLOBAL_BASE 0xb4003000 #define DDMA_CHANNEL_BASE 0xb4002000 -typedef struct dbdma_global { +typedef volatile struct dbdma_global { u32 ddma_config; u32 ddma_intstat; u32 ddma_throttle; @@ -62,7 +62,7 @@ typedef struct dbdma_global { /* The structure of a DMA Channel. */ -typedef struct au1xxx_dma_channel { +typedef volatile struct au1xxx_dma_channel { u32 ddma_cfg; /* See below */ u32 ddma_desptr; /* 32-byte aligned pointer to descriptor */ u32 ddma_statptr; /* word aligned pointer to status word */ @@ -98,7 +98,7 @@ typedef struct au1xxx_dma_channel { /* "Standard" DDMA Descriptor. * Must be 32-byte aligned. */ -typedef struct au1xxx_ddma_desc { +typedef volatile struct au1xxx_ddma_desc { u32 dscr_cmd0; /* See below */ u32 dscr_cmd1; /* See below */ u32 dscr_source0; /* source phys address */ @@ -107,6 +107,12 @@ typedef struct au1xxx_ddma_desc { u32 dscr_dest1; /* See below */ u32 dscr_stat; /* completion status */ u32 dscr_nxtptr; /* Next descriptor pointer (mostly) */ + /* First 32bytes are HW specific!!! + Lets have some SW data following.. make sure its 32bytes + */ + u32 sw_status; + u32 sw_context; + u32 sw_reserved[6]; } au1x_ddma_desc_t; #define DSCR_CMD0_V (1 << 31) /* Descriptor valid */ @@ -125,8 +131,11 @@ typedef struct au1xxx_ddma_desc { #define DSCR_CMD0_CV (0x1 << 2) /* Clear Valid when done */ #define DSCR_CMD0_ST_MASK (0x3 << 0) /* Status instruction */ +#define SW_STATUS_INUSE (1<<0) + /* Command 0 device IDs. */ +#ifdef CONFIG_SOC_AU1550 #define DSCR_CMD0_UART0_TX 0 #define DSCR_CMD0_UART0_RX 1 #define DSCR_CMD0_UART3_TX 2 @@ -155,9 +164,45 @@ typedef struct au1xxx_ddma_desc { #define DSCR_CMD0_MAC0_TX 25 #define DSCR_CMD0_MAC1_RX 26 #define DSCR_CMD0_MAC1_TX 27 +#endif /* CONFIG_SOC_AU1550 */ + +#ifdef CONFIG_SOC_AU1200 +#define DSCR_CMD0_UART0_TX 0 +#define DSCR_CMD0_UART0_RX 1 +#define DSCR_CMD0_UART1_TX 2 +#define DSCR_CMD0_UART1_RX 3 +#define DSCR_CMD0_DMA_REQ0 4 +#define DSCR_CMD0_DMA_REQ1 5 +#define DSCR_CMD0_MAE_BE 6 +#define DSCR_CMD0_MAE_FE 7 +#define DSCR_CMD0_SDMS_TX0 8 +#define DSCR_CMD0_SDMS_RX0 9 +#define DSCR_CMD0_SDMS_TX1 10 +#define DSCR_CMD0_SDMS_RX1 11 +#define DSCR_CMD0_AES_TX 13 +#define DSCR_CMD0_AES_RX 12 +#define DSCR_CMD0_PSC0_TX 14 +#define DSCR_CMD0_PSC0_RX 15 +#define DSCR_CMD0_PSC1_TX 16 +#define DSCR_CMD0_PSC1_RX 17 +#define DSCR_CMD0_CIM_RXA 18 +#define DSCR_CMD0_CIM_RXB 19 +#define DSCR_CMD0_CIM_RXC 20 +#define DSCR_CMD0_MAE_BOTH 21 +#define DSCR_CMD0_LCD 22 +#define DSCR_CMD0_NAND_FLASH 23 +#define DSCR_CMD0_PSC0_SYNC 24 +#define DSCR_CMD0_PSC1_SYNC 25 +#define DSCR_CMD0_CIM_SYNC 26 +#endif /* CONFIG_SOC_AU1200 */ + #define DSCR_CMD0_THROTTLE 30 #define DSCR_CMD0_ALWAYS 31 #define DSCR_NDEV_IDS 32 +/* THis macro is used to find/create custom device types */ +#define DSCR_DEV2CUSTOM_ID(x,d) (((((x)&0xFFFF)<<8)|0x32000000)|((d)&0xFF)) +#define DSCR_CUSTOM2DEV_ID(x) ((x)&0xFF) + #define DSCR_CMD0_SID(x) (((x) & 0x1f) << 25) #define DSCR_CMD0_DID(x) (((x) & 0x1f) << 20) @@ -246,6 +291,43 @@ typedef struct au1xxx_ddma_desc { */ #define NUM_DBDMA_CHANS 16 +/* + * Ddma API definitions + * FIXME: may not fit to this header file + */ +typedef struct dbdma_device_table { + u32 dev_id; + u32 dev_flags; + u32 dev_tsize; + u32 dev_devwidth; + u32 dev_physaddr; /* If FIFO */ + u32 dev_intlevel; + u32 dev_intpolarity; +} dbdev_tab_t; + + +typedef struct dbdma_chan_config { + spinlock_t lock; + + u32 chan_flags; + u32 chan_index; + dbdev_tab_t *chan_src; + dbdev_tab_t *chan_dest; + au1x_dma_chan_t *chan_ptr; + au1x_ddma_desc_t *chan_desc_base; + au1x_ddma_desc_t *get_ptr, *put_ptr, *cur_ptr; + void *chan_callparam; + void (*chan_callback)(int, void *, struct pt_regs *); +} chan_tab_t; + +#define DEV_FLAGS_INUSE (1 << 0) +#define DEV_FLAGS_ANYUSE (1 << 1) +#define DEV_FLAGS_OUT (1 << 2) +#define DEV_FLAGS_IN (1 << 3) +#define DEV_FLAGS_BURSTABLE (1 << 4) +#define DEV_FLAGS_SYNC (1 << 5) +/* end Ddma API definitions */ + /* External functions for drivers to use. */ /* Use this to allocate a dbdma channel. The device ids are one of the @@ -258,18 +340,6 @@ u32 au1xxx_dbdma_chan_alloc(u32 srcid, u32 destid, #define DBDMA_MEM_CHAN DSCR_CMD0_ALWAYS -/* ACK! These should be in a board specific description file. -*/ -#ifdef CONFIG_MIPS_PB1550 -#define DBDMA_AC97_TX_CHAN DSCR_CMD0_PSC1_TX -#define DBDMA_AC97_RX_CHAN DSCR_CMD0_PSC1_RX -#endif -#ifdef CONFIG_MIPS_DB1550 -#define DBDMA_AC97_TX_CHAN DSCR_CMD0_PSC1_TX -#define DBDMA_AC97_RX_CHAN DSCR_CMD0_PSC1_RX -#endif - - /* Set the device width of a in/out fifo. */ u32 au1xxx_dbdma_set_devwidth(u32 chanid, int bits); @@ -280,8 +350,8 @@ u32 au1xxx_dbdma_ring_alloc(u32 chanid, int entries); /* Put buffers on source/destination descriptors. */ -u32 au1xxx_dbdma_put_source(u32 chanid, void *buf, int nbytes); -u32 au1xxx_dbdma_put_dest(u32 chanid, void *buf, int nbytes); +u32 _au1xxx_dbdma_put_source(u32 chanid, void *buf, int nbytes, u32 flags); +u32 _au1xxx_dbdma_put_dest(u32 chanid, void *buf, int nbytes, u32 flags); /* Get a buffer from the destination descriptor. */ @@ -295,5 +365,29 @@ u32 au1xxx_get_dma_residue(u32 chanid); void au1xxx_dbdma_chan_free(u32 chanid); void au1xxx_dbdma_dump(u32 chanid); +u32 au1xxx_dbdma_put_dscr(u32 chanid, au1x_ddma_desc_t *dscr ); + +u32 au1xxx_ddma_add_device( dbdev_tab_t *dev ); +void * au1xxx_ddma_get_nextptr_virt(au1x_ddma_desc_t *dp); + +/* + Some compatibilty macros -- + Needed to make changes to API without breaking existing drivers +*/ +#define au1xxx_dbdma_put_source(chanid,buf,nbytes)_au1xxx_dbdma_put_source(chanid, buf, nbytes, DDMA_FLAGS_IE) +#define au1xxx_dbdma_put_source_flags(chanid,buf,nbytes,flags) _au1xxx_dbdma_put_source(chanid, buf, nbytes, flags) +#define put_source_flags(chanid,buf,nbytes,flags) au1xxx_dbdma_put_source_flags(chanid,buf,nbytes,flags) + + +#define au1xxx_dbdma_put_dest(chanid,buf,nbytes) _au1xxx_dbdma_put_dest(chanid, buf, nbytes, DDMA_FLAGS_IE) +#define au1xxx_dbdma_put_dest_flags(chanid,buf,nbytes,flags) _au1xxx_dbdma_put_dest(chanid, buf, nbytes, flags) +#define put_dest_flags(chanid,buf,nbytes,flags) au1xxx_dbdma_put_dest_flags(chanid,buf,nbytes,flags) + +/* + * Flags for the put_source/put_dest functions. + */ +#define DDMA_FLAGS_IE (1<<0) +#define DDMA_FLAGS_NOIE (1<<1) + #endif /* _LANGUAGE_ASSEMBLY */ #endif /* _AU1000_DBDMA_H_ */ diff --git a/include/asm-mips/mach-au1x00/au1xxx_gpio.h b/include/asm-mips/mach-au1x00/au1xxx_gpio.h new file mode 100644 index 000000000000..27911e054ffc --- /dev/null +++ b/include/asm-mips/mach-au1x00/au1xxx_gpio.h @@ -0,0 +1,20 @@ +#ifndef __AU1XXX_GPIO_H +#define __AU1XXX_GPIO_H + +void au1xxx_gpio1_set_inputs(void); +void au1xxx_gpio_tristate(int signal); +void au1xxx_gpio_write(int signal, int value); +int au1xxx_gpio_read(int signal); + +typedef volatile struct +{ + u32 dir; + u32 reserved; + u32 output; + u32 pinstate; + u32 inten; + u32 enable; + +} AU1X00_GPIO2; + +#endif //__AU1XXX_GPIO_H diff --git a/include/asm-mips/mach-au1x00/au1xxx_ide.h b/include/asm-mips/mach-au1x00/au1xxx_ide.h new file mode 100644 index 000000000000..33d275c3b84c --- /dev/null +++ b/include/asm-mips/mach-au1x00/au1xxx_ide.h @@ -0,0 +1,301 @@ +/* + * include/asm-mips/mach-au1x00/au1xxx_ide.h version 01.30.00 Aug. 02 2005 + * + * BRIEF MODULE DESCRIPTION + * AMD Alchemy Au1xxx IDE interface routines over the Static Bus + * + * Copyright (c) 2003-2005 AMD, Personal Connectivity Solutions + * + * This program is free software; you can redistribute it and/or modify it under + * the terms of the GNU General Public License as published by the Free Software + * Foundation; either version 2 of the License, or (at your option) any later + * version. + * + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND + * FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., + * 675 Mass Ave, Cambridge, MA 02139, USA. + * + * Note: for more information, please refer "AMD Alchemy Au1200/Au1550 IDE + * Interface and Linux Device Driver" Application Note. + */ +#include <linux/config.h> + +#ifdef CONFIG_BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA + #define DMA_WAIT_TIMEOUT 100 + #define NUM_DESCRIPTORS PRD_ENTRIES +#else /* CONFIG_BLK_DEV_IDE_AU1XXX_PIO_DBDMA */ + #define NUM_DESCRIPTORS 2 +#endif + +#ifndef AU1XXX_ATA_RQSIZE + #define AU1XXX_ATA_RQSIZE 128 +#endif + +/* Disable Burstable-Support for DBDMA */ +#ifndef CONFIG_BLK_DEV_IDE_AU1XXX_BURSTABLE_ON + #define CONFIG_BLK_DEV_IDE_AU1XXX_BURSTABLE_ON 0 +#endif + +#ifdef CONFIG_PM +/* +* This will enable the device to be powered up when write() or read() +* is called. If this is not defined, the driver will return -EBUSY. +*/ +#define WAKE_ON_ACCESS 1 + +typedef struct +{ + spinlock_t lock; /* Used to block on state transitions */ + au1xxx_power_dev_t *dev; /* Power Managers device structure */ + unsigned stopped; /* USed to signaling device is stopped */ +} pm_state; +#endif + + +typedef struct +{ + u32 tx_dev_id, rx_dev_id, target_dev_id; + u32 tx_chan, rx_chan; + void *tx_desc_head, *rx_desc_head; + ide_hwif_t *hwif; +#ifdef CONFIG_BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA + ide_drive_t *drive; + u8 white_list, black_list; + struct dbdma_cmd *dma_table_cpu; + dma_addr_t dma_table_dma; + struct scatterlist *sg_table; + int sg_nents; + int sg_dma_direction; +#endif + struct device *dev; + int irq; + u32 regbase; +#ifdef CONFIG_PM + pm_state pm; +#endif +} _auide_hwif; + +#ifdef CONFIG_BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA +struct drive_list_entry { + const char * id_model; + const char * id_firmware; +}; + +/* HD white list */ +static const struct drive_list_entry dma_white_list [] = { +/* + * Hitachi + */ + { "HITACHI_DK14FA-20" , "ALL" }, + { "HTS726060M9AT00" , "ALL" }, +/* + * Maxtor + */ + { "Maxtor 6E040L0" , "ALL" }, + { "Maxtor 6Y080P0" , "ALL" }, + { "Maxtor 6Y160P0" , "ALL" }, +/* + * Seagate + */ + { "ST3120026A" , "ALL" }, + { "ST320014A" , "ALL" }, + { "ST94011A" , "ALL" }, + { "ST340016A" , "ALL" }, +/* + * Western Digital + */ + { "WDC WD400UE-00HCT0" , "ALL" }, + { "WDC WD400JB-00JJC0" , "ALL" }, + { NULL , NULL } +}; + +/* HD black list */ +static const struct drive_list_entry dma_black_list [] = { +/* + * Western Digital + */ + { "WDC WD100EB-00CGH0" , "ALL" }, + { "WDC WD200BB-00AUA1" , "ALL" }, + { "WDC AC24300L" , "ALL" }, + { NULL , NULL } +}; +#endif + +/* function prototyping */ +u8 auide_inb(unsigned long port); +u16 auide_inw(unsigned long port); +u32 auide_inl(unsigned long port); +void auide_insw(unsigned long port, void *addr, u32 count); +void auide_insl(unsigned long port, void *addr, u32 count); +void auide_outb(u8 addr, unsigned long port); +void auide_outbsync(ide_drive_t *drive, u8 addr, unsigned long port); +void auide_outw(u16 addr, unsigned long port); +void auide_outl(u32 addr, unsigned long port); +void auide_outsw(unsigned long port, void *addr, u32 count); +void auide_outsl(unsigned long port, void *addr, u32 count); +static void auide_tune_drive(ide_drive_t *drive, byte pio); +static int auide_tune_chipset (ide_drive_t *drive, u8 speed); +static int auide_ddma_init( _auide_hwif *auide ); +static void auide_setup_ports(hw_regs_t *hw, _auide_hwif *ahwif); +int __init auide_probe(void); + +#ifdef CONFIG_PM + int au1200ide_pm_callback( au1xxx_power_dev_t *dev, + au1xxx_request_t request, void *data); + static int au1xxxide_pm_standby( au1xxx_power_dev_t *dev ); + static int au1xxxide_pm_sleep( au1xxx_power_dev_t *dev ); + static int au1xxxide_pm_resume( au1xxx_power_dev_t *dev ); + static int au1xxxide_pm_getstatus( au1xxx_power_dev_t *dev ); + static int au1xxxide_pm_access( au1xxx_power_dev_t *dev ); + static int au1xxxide_pm_idle( au1xxx_power_dev_t *dev ); + static int au1xxxide_pm_cleanup( au1xxx_power_dev_t *dev ); +#endif + + +/* + * Multi-Word DMA + DbDMA functions + */ +#ifdef CONFIG_BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA + + static int in_drive_list(struct hd_driveid *id, + const struct drive_list_entry *drive_table); + static int auide_build_sglist(ide_drive_t *drive, struct request *rq); + static int auide_build_dmatable(ide_drive_t *drive); + static int auide_dma_end(ide_drive_t *drive); + static void auide_dma_start(ide_drive_t *drive ); + ide_startstop_t auide_dma_intr (ide_drive_t *drive); + static void auide_dma_exec_cmd(ide_drive_t *drive, u8 command); + static int auide_dma_setup(ide_drive_t *drive); + static int auide_dma_check(ide_drive_t *drive); + static int auide_dma_test_irq(ide_drive_t *drive); + static int auide_dma_host_off(ide_drive_t *drive); + static int auide_dma_host_on(ide_drive_t *drive); + static int auide_dma_lostirq(ide_drive_t *drive); + static int auide_dma_on(ide_drive_t *drive); + static void auide_ddma_tx_callback(int irq, void *param, + struct pt_regs *regs); + static void auide_ddma_rx_callback(int irq, void *param, + struct pt_regs *regs); + static int auide_dma_off_quietly(ide_drive_t *drive); + static int auide_dma_timeout(ide_drive_t *drive); + +#endif /* end CONFIG_BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA */ + +/******************************************************************************* +* PIO Mode timing calculation : * +* * +* Static Bus Spec ATA Spec * +* Tcsoe = t1 * +* Toecs = t9 * +* Twcs = t9 * +* Tcsh = t2i | t2 * +* Tcsoff = t2i | t2 * +* Twp = t2 * +* Tcsw = t1 * +* Tpm = 0 * +* Ta = t1+t2 * +*******************************************************************************/ + +#define TCSOE_MASK (0x07<<29) +#define TOECS_MASK (0x07<<26) +#define TWCS_MASK (0x07<<28) +#define TCSH_MASK (0x0F<<24) +#define TCSOFF_MASK (0x07<<20) +#define TWP_MASK (0x3F<<14) +#define TCSW_MASK (0x0F<<10) +#define TPM_MASK (0x0F<<6) +#define TA_MASK (0x3F<<0) +#define TS_MASK (1<<8) + +/* Timing parameters PIO mode 0 */ +#define SBC_IDE_PIO0_TCSOE (0x04<<29) +#define SBC_IDE_PIO0_TOECS (0x01<<26) +#define SBC_IDE_PIO0_TWCS (0x02<<28) +#define SBC_IDE_PIO0_TCSH (0x08<<24) +#define SBC_IDE_PIO0_TCSOFF (0x07<<20) +#define SBC_IDE_PIO0_TWP (0x10<<14) +#define SBC_IDE_PIO0_TCSW (0x04<<10) +#define SBC_IDE_PIO0_TPM (0x0<<6) +#define SBC_IDE_PIO0_TA (0x15<<0) +/* Timing parameters PIO mode 1 */ +#define SBC_IDE_PIO1_TCSOE (0x03<<29) +#define SBC_IDE_PIO1_TOECS (0x01<<26) +#define SBC_IDE_PIO1_TWCS (0x01<<28) +#define SBC_IDE_PIO1_TCSH (0x06<<24) +#define SBC_IDE_PIO1_TCSOFF (0x06<<20) +#define SBC_IDE_PIO1_TWP (0x08<<14) +#define SBC_IDE_PIO1_TCSW (0x03<<10) +#define SBC_IDE_PIO1_TPM (0x00<<6) +#define SBC_IDE_PIO1_TA (0x0B<<0) +/* Timing parameters PIO mode 2 */ +#define SBC_IDE_PIO2_TCSOE (0x05<<29) +#define SBC_IDE_PIO2_TOECS (0x01<<26) +#define SBC_IDE_PIO2_TWCS (0x01<<28) +#define SBC_IDE_PIO2_TCSH (0x07<<24) +#define SBC_IDE_PIO2_TCSOFF (0x07<<20) +#define SBC_IDE_PIO2_TWP (0x1F<<14) +#define SBC_IDE_PIO2_TCSW (0x05<<10) +#define SBC_IDE_PIO2_TPM (0x00<<6) +#define SBC_IDE_PIO2_TA (0x22<<0) +/* Timing parameters PIO mode 3 */ +#define SBC_IDE_PIO3_TCSOE (0x05<<29) +#define SBC_IDE_PIO3_TOECS (0x01<<26) +#define SBC_IDE_PIO3_TWCS (0x01<<28) +#define SBC_IDE_PIO3_TCSH (0x0D<<24) +#define SBC_IDE_PIO3_TCSOFF (0x0D<<20) +#define SBC_IDE_PIO3_TWP (0x15<<14) +#define SBC_IDE_PIO3_TCSW (0x05<<10) +#define SBC_IDE_PIO3_TPM (0x00<<6) +#define SBC_IDE_PIO3_TA (0x1A<<0) +/* Timing parameters PIO mode 4 */ +#define SBC_IDE_PIO4_TCSOE (0x04<<29) +#define SBC_IDE_PIO4_TOECS (0x01<<26) +#define SBC_IDE_PIO4_TWCS (0x01<<28) +#define SBC_IDE_PIO4_TCSH (0x04<<24) +#define SBC_IDE_PIO4_TCSOFF (0x04<<20) +#define SBC_IDE_PIO4_TWP (0x0D<<14) +#define SBC_IDE_PIO4_TCSW (0x03<<10) +#define SBC_IDE_PIO4_TPM (0x00<<6) +#define SBC_IDE_PIO4_TA (0x12<<0) +/* Timing parameters MDMA mode 0 */ +#define SBC_IDE_MDMA0_TCSOE (0x03<<29) +#define SBC_IDE_MDMA0_TOECS (0x01<<26) +#define SBC_IDE_MDMA0_TWCS (0x01<<28) +#define SBC_IDE_MDMA0_TCSH (0x07<<24) +#define SBC_IDE_MDMA0_TCSOFF (0x07<<20) +#define SBC_IDE_MDMA0_TWP (0x0C<<14) +#define SBC_IDE_MDMA0_TCSW (0x03<<10) +#define SBC_IDE_MDMA0_TPM (0x00<<6) +#define SBC_IDE_MDMA0_TA (0x0F<<0) +/* Timing parameters MDMA mode 1 */ +#define SBC_IDE_MDMA1_TCSOE (0x05<<29) +#define SBC_IDE_MDMA1_TOECS (0x01<<26) +#define SBC_IDE_MDMA1_TWCS (0x01<<28) +#define SBC_IDE_MDMA1_TCSH (0x05<<24) +#define SBC_IDE_MDMA1_TCSOFF (0x05<<20) +#define SBC_IDE_MDMA1_TWP (0x0F<<14) +#define SBC_IDE_MDMA1_TCSW (0x05<<10) +#define SBC_IDE_MDMA1_TPM (0x00<<6) +#define SBC_IDE_MDMA1_TA (0x15<<0) +/* Timing parameters MDMA mode 2 */ +#define SBC_IDE_MDMA2_TCSOE (0x04<<29) +#define SBC_IDE_MDMA2_TOECS (0x01<<26) +#define SBC_IDE_MDMA2_TWCS (0x01<<28) +#define SBC_IDE_MDMA2_TCSH (0x04<<24) +#define SBC_IDE_MDMA2_TCSOFF (0x04<<20) +#define SBC_IDE_MDMA2_TWP (0x0D<<14) +#define SBC_IDE_MDMA2_TCSW (0x04<<10) +#define SBC_IDE_MDMA2_TPM (0x00<<6) +#define SBC_IDE_MDMA2_TA (0x12<<0) + diff --git a/include/asm-mips/mach-au1x00/au1xxx_psc.h b/include/asm-mips/mach-au1x00/au1xxx_psc.h index 283519dfdec4..8e5fb3c7da4d 100644 --- a/include/asm-mips/mach-au1x00/au1xxx_psc.h +++ b/include/asm-mips/mach-au1x00/au1xxx_psc.h @@ -33,6 +33,8 @@ #ifndef _AU1000_PSC_H_ #define _AU1000_PSC_H_ +#include <linux/config.h> + /* The PSC base addresses. */ #ifdef CONFIG_SOC_AU1550 #define PSC0_BASE_ADDR 0xb1a00000 diff --git a/include/asm-mips/mach-au1x00/ioremap.h b/include/asm-mips/mach-au1x00/ioremap.h new file mode 100644 index 000000000000..d3ec6274575a --- /dev/null +++ b/include/asm-mips/mach-au1x00/ioremap.h @@ -0,0 +1,32 @@ +/* + * include/asm-mips/mach-au1x00/ioremap.h + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version + * 2 of the License, or (at your option) any later version. + */ +#ifndef __ASM_MACH_AU1X00_IOREMAP_H +#define __ASM_MACH_AU1X00_IOREMAP_H + +#include <linux/config.h> +#include <linux/types.h> + +#ifdef CONFIG_64BIT_PHYS_ADDR +extern phys_t __fixup_bigphys_addr(phys_t, phys_t); +#else +static inline phys_t __fixup_bigphys_addr(phys_t phys_addr, phys_t size) +{ + return phys_addr; +} +#endif + +/* + * Allow physical addresses to be fixed up to help 36-bit peripherals. + */ +static inline phys_t fixup_bigphys_addr(phys_t phys_addr, phys_t size) +{ + return __fixup_bigphys_addr(phys_addr, size); +} + +#endif /* __ASM_MACH_AU1X00_IOREMAP_H */ diff --git a/include/asm-mips/mach-db1x00/db1200.h b/include/asm-mips/mach-db1x00/db1200.h new file mode 100644 index 000000000000..647fdb54cc1d --- /dev/null +++ b/include/asm-mips/mach-db1x00/db1200.h @@ -0,0 +1,227 @@ +/* + * AMD Alchemy DB1200 Referrence Board + * Board Registers defines. + * + * ######################################################################## + * + * This program is free software; you can distribute it and/or modify it + * under the terms of the GNU General Public License (Version 2) as + * published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License + * for more details. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. + * + * ######################################################################## + * + * + */ +#ifndef __ASM_DB1200_H +#define __ASM_DB1200_H + +#include <linux/types.h> + +// This is defined in au1000.h with bogus value +#undef AU1X00_EXTERNAL_INT + +#define DBDMA_AC97_TX_CHAN DSCR_CMD0_PSC1_TX +#define DBDMA_AC97_RX_CHAN DSCR_CMD0_PSC1_RX +#define DBDMA_I2S_TX_CHAN DSCR_CMD0_PSC1_TX +#define DBDMA_I2S_RX_CHAN DSCR_CMD0_PSC1_RX + +/* SPI and SMB are muxed on the Pb1200 board. + Refer to board documentation. + */ +#define SPI_PSC_BASE PSC0_BASE_ADDR +#define SMBUS_PSC_BASE PSC0_BASE_ADDR +/* AC97 and I2S are muxed on the Pb1200 board. + Refer to board documentation. + */ +#define AC97_PSC_BASE PSC1_BASE_ADDR +#define I2S_PSC_BASE PSC1_BASE_ADDR + +#define BCSR_KSEG1_ADDR 0xB9800000 + +typedef volatile struct +{ + /*00*/ u16 whoami; + u16 reserved0; + /*04*/ u16 status; + u16 reserved1; + /*08*/ u16 switches; + u16 reserved2; + /*0C*/ u16 resets; + u16 reserved3; + + /*10*/ u16 pcmcia; + u16 reserved4; + /*14*/ u16 board; + u16 reserved5; + /*18*/ u16 disk_leds; + u16 reserved6; + /*1C*/ u16 system; + u16 reserved7; + + /*20*/ u16 intclr; + u16 reserved8; + /*24*/ u16 intset; + u16 reserved9; + /*28*/ u16 intclr_mask; + u16 reserved10; + /*2C*/ u16 intset_mask; + u16 reserved11; + + /*30*/ u16 sig_status; + u16 reserved12; + /*34*/ u16 int_status; + u16 reserved13; + /*38*/ u16 reserved14; + u16 reserved15; + /*3C*/ u16 reserved16; + u16 reserved17; + +} BCSR; + +static BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR; + +/* + * Register bit definitions for the BCSRs + */ +#define BCSR_WHOAMI_DCID 0x000F +#define BCSR_WHOAMI_CPLD 0x00F0 +#define BCSR_WHOAMI_BOARD 0x0F00 + +#define BCSR_STATUS_PCMCIA0VS 0x0003 +#define BCSR_STATUS_PCMCIA1VS 0x000C +#define BCSR_STATUS_SWAPBOOT 0x0040 +#define BCSR_STATUS_FLASHBUSY 0x0100 +#define BCSR_STATUS_IDECBLID 0x0200 +#define BCSR_STATUS_SD0WP 0x0400 +#define BCSR_STATUS_U0RXD 0x1000 +#define BCSR_STATUS_U1RXD 0x2000 + +#define BCSR_SWITCHES_OCTAL 0x00FF +#define BCSR_SWITCHES_DIP_1 0x0080 +#define BCSR_SWITCHES_DIP_2 0x0040 +#define BCSR_SWITCHES_DIP_3 0x0020 +#define BCSR_SWITCHES_DIP_4 0x0010 +#define BCSR_SWITCHES_DIP_5 0x0008 +#define BCSR_SWITCHES_DIP_6 0x0004 +#define BCSR_SWITCHES_DIP_7 0x0002 +#define BCSR_SWITCHES_DIP_8 0x0001 +#define BCSR_SWITCHES_ROTARY 0x0F00 + +#define BCSR_RESETS_ETH 0x0001 +#define BCSR_RESETS_CAMERA 0x0002 +#define BCSR_RESETS_DC 0x0004 +#define BCSR_RESETS_IDE 0x0008 +#define BCSR_RESETS_TV 0x0010 +/* not resets but in the same register */ +#define BCSR_RESETS_PWMR1mUX 0x0800 +#define BCSR_RESETS_PCS0MUX 0x1000 +#define BCSR_RESETS_PCS1MUX 0x2000 +#define BCSR_RESETS_SPISEL 0x4000 + +#define BCSR_PCMCIA_PC0VPP 0x0003 +#define BCSR_PCMCIA_PC0VCC 0x000C +#define BCSR_PCMCIA_PC0DRVEN 0x0010 +#define BCSR_PCMCIA_PC0RST 0x0080 +#define BCSR_PCMCIA_PC1VPP 0x0300 +#define BCSR_PCMCIA_PC1VCC 0x0C00 +#define BCSR_PCMCIA_PC1DRVEN 0x1000 +#define BCSR_PCMCIA_PC1RST 0x8000 + +#define BCSR_BOARD_LCDVEE 0x0001 +#define BCSR_BOARD_LCDVDD 0x0002 +#define BCSR_BOARD_LCDBL 0x0004 +#define BCSR_BOARD_CAMSNAP 0x0010 +#define BCSR_BOARD_CAMPWR 0x0020 +#define BCSR_BOARD_SD0PWR 0x0040 + +#define BCSR_LEDS_DECIMALS 0x0003 +#define BCSR_LEDS_LED0 0x0100 +#define BCSR_LEDS_LED1 0x0200 +#define BCSR_LEDS_LED2 0x0400 +#define BCSR_LEDS_LED3 0x0800 + +#define BCSR_SYSTEM_POWEROFF 0x4000 +#define BCSR_SYSTEM_RESET 0x8000 + +/* Bit positions for the different interrupt sources */ +#define BCSR_INT_IDE 0x0001 +#define BCSR_INT_ETH 0x0002 +#define BCSR_INT_PC0 0x0004 +#define BCSR_INT_PC0STSCHG 0x0008 +#define BCSR_INT_PC1 0x0010 +#define BCSR_INT_PC1STSCHG 0x0020 +#define BCSR_INT_DC 0x0040 +#define BCSR_INT_FLASHBUSY 0x0080 +#define BCSR_INT_PC0INSERT 0x0100 +#define BCSR_INT_PC0EJECT 0x0200 +#define BCSR_INT_PC1INSERT 0x0400 +#define BCSR_INT_PC1EJECT 0x0800 +#define BCSR_INT_SD0INSERT 0x1000 +#define BCSR_INT_SD0EJECT 0x2000 + +#define AU1XXX_SMC91111_PHYS_ADDR (0x19000300) +#define AU1XXX_SMC91111_IRQ DB1200_ETH_INT + +#define AU1XXX_ATA_PHYS_ADDR (0x18800000) +#define AU1XXX_ATA_PHYS_LEN (0x100) +#define AU1XXX_ATA_REG_OFFSET (5) +#define AU1XXX_ATA_INT DB1200_IDE_INT +#define AU1XXX_ATA_DDMA_REQ DSCR_CMD0_DMA_REQ1; +#define AU1XXX_ATA_RQSIZE 128 + +#define NAND_PHYS_ADDR 0x20000000 + +/* + * External Interrupts for Pb1200 as of 8/6/2004. + * Bit positions in the CPLD registers can be calculated by taking + * the interrupt define and subtracting the DB1200_INT_BEGIN value. + * *example: IDE bis pos is = 64 - 64 + ETH bit pos is = 65 - 64 + */ +#define DB1200_INT_BEGIN (AU1000_LAST_INTC1_INT + 1) +#define DB1200_IDE_INT (DB1200_INT_BEGIN + 0) +#define DB1200_ETH_INT (DB1200_INT_BEGIN + 1) +#define DB1200_PC0_INT (DB1200_INT_BEGIN + 2) +#define DB1200_PC0_STSCHG_INT (DB1200_INT_BEGIN + 3) +#define DB1200_PC1_INT (DB1200_INT_BEGIN + 4) +#define DB1200_PC1_STSCHG_INT (DB1200_INT_BEGIN + 5) +#define DB1200_DC_INT (DB1200_INT_BEGIN + 6) +#define DB1200_FLASHBUSY_INT (DB1200_INT_BEGIN + 7) +#define DB1200_PC0_INSERT_INT (DB1200_INT_BEGIN + 8) +#define DB1200_PC0_EJECT_INT (DB1200_INT_BEGIN + 9) +#define DB1200_PC1_INSERT_INT (DB1200_INT_BEGIN + 10) +#define DB1200_PC1_EJECT_INT (DB1200_INT_BEGIN + 11) +#define DB1200_SD0_INSERT_INT (DB1200_INT_BEGIN + 12) +#define DB1200_SD0_EJECT_INT (DB1200_INT_BEGIN + 13) + +#define DB1200_INT_END (DB1200_INT_BEGIN + 15) + +/* For drivers/pcmcia/au1000_db1x00.c */ + +/* PCMCIA Db1x00 specific defines */ + +#define PCMCIA_MAX_SOCK 1 +#define PCMCIA_NUM_SOCKS (PCMCIA_MAX_SOCK+1) + +/* VPP/VCC */ +#define SET_VCC_VPP(VCC, VPP, SLOT)\ + ((((VCC)<<2) | ((VPP)<<0)) << ((SLOT)*8)) + +#define BOARD_PC0_INT DB1200_PC0_INT +#define BOARD_PC1_INT DB1200_PC1_INT +#define BOARD_CARD_INSERTED(SOCKET) bcsr->sig_status & (1<<(8+(2*SOCKET))) + +/* Nand chip select */ +#define NAND_CS 1 + +#endif /* __ASM_DB1200_H */ + diff --git a/include/asm-mips/mach-db1x00/db1x00.h b/include/asm-mips/mach-db1x00/db1x00.h index efafe65258b6..7b28b23f91ce 100644 --- a/include/asm-mips/mach-db1x00/db1x00.h +++ b/include/asm-mips/mach-db1x00/db1x00.h @@ -200,6 +200,12 @@ typedef volatile struct ((NAND_T_PUL & 0xF) << NAND_T_PUL_SHIFT) | \ ((NAND_T_SU & 0xF) << NAND_T_SU_SHIFT) | \ ((NAND_T_WH & 0xF) << NAND_T_WH_SHIFT) +#define NAND_CS 1 + +/* should be done by yamon */ +#define NAND_STCFG 0x00400005 /* 8-bit NAND */ +#define NAND_STTIME 0x00007774 /* valid for 396MHz SD=2 only */ +#define NAND_STADDR 0x12000FFF /* physical address 0x20000000 */ #endif /* __ASM_DB1X00_H */ diff --git a/include/asm-mips/mach-dec/mc146818rtc.h b/include/asm-mips/mach-dec/mc146818rtc.h index a326f451253b..6d37a5675803 100644 --- a/include/asm-mips/mach-dec/mc146818rtc.h +++ b/include/asm-mips/mach-dec/mc146818rtc.h @@ -3,7 +3,7 @@ * * Copyright (C) 1998, 2001 by Ralf Baechle * Copyright (C) 1998 by Harald Koerfgen - * Copyright (C) 2002 Maciej W. Rozycki + * Copyright (C) 2002, 2005 Maciej W. Rozycki * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License @@ -14,23 +14,18 @@ #define __ASM_MIPS_DEC_RTC_DEC_H #include <linux/types.h> - #include <asm/addrspace.h> +#include <asm/dec/system.h> extern volatile u8 *dec_rtc_base; -extern unsigned long dec_kn_slot_size; -#define RTC_PORT(x) CPHYSADDR(dec_rtc_base) +#define RTC_PORT(x) CPHYSADDR((long)dec_rtc_base) #define RTC_IO_EXTENT dec_kn_slot_size #define RTC_IOMAPPED 0 #undef RTC_IRQ #define RTC_DEC_YEAR 0x3f /* Where we store the real year on DECs. */ -#include <linux/mc146818rtc.h> -#include <linux/module.h> -#include <linux/types.h> - static inline unsigned char CMOS_READ(unsigned long addr) { return dec_rtc_base[addr * 4]; diff --git a/include/asm-mips/mach-generic/cpu-feature-overrides.h b/include/asm-mips/mach-generic/cpu-feature-overrides.h index 0aecfd08e39a..7c185bb06f13 100644 --- a/include/asm-mips/mach-generic/cpu-feature-overrides.h +++ b/include/asm-mips/mach-generic/cpu-feature-overrides.h @@ -8,6 +8,6 @@ #ifndef __ASM_MACH_GENERIC_CPU_FEATURE_OVERRIDES_H #define __ASM_MACH_GENERIC_CPU_FEATURE_OVERRIDES_H -/* Intensionally empty file ... */ +/* Intentionally empty file ... */ #endif /* __ASM_MACH_GENERIC_CPU_FEATURE_OVERRIDES_H */ diff --git a/include/asm-mips/mach-generic/ide.h b/include/asm-mips/mach-generic/ide.h index cb2edd018ad6..550979a9ea9d 100644 --- a/include/asm-mips/mach-generic/ide.h +++ b/include/asm-mips/mach-generic/ide.h @@ -18,6 +18,7 @@ #include <linux/config.h> #include <linux/pci.h> #include <linux/stddef.h> +#include <asm/processor.h> #ifndef MAX_HWIFS # ifdef CONFIG_BLK_DEV_IDEPCI @@ -104,15 +105,75 @@ static __inline__ unsigned long ide_default_io_base(int index) /* MIPS port and memory-mapped I/O string operations. */ -#define __ide_insw insw -#define __ide_insl insl -#define __ide_outsw outsw -#define __ide_outsl outsl +static inline void __ide_flush_dcache_range(unsigned long addr, unsigned long size) +{ + if (cpu_has_dc_aliases) { + unsigned long end = addr + size; + for (; addr < end; addr += PAGE_SIZE) + flush_dcache_page(virt_to_page(addr)); + } +} + +static inline void __ide_insw(unsigned long port, void *addr, + unsigned int count) +{ + insw(port, addr, count); + __ide_flush_dcache_range((unsigned long)addr, count * 2); +} + +static inline void __ide_insl(unsigned long port, void *addr, unsigned int count) +{ + insl(port, addr, count); + __ide_flush_dcache_range((unsigned long)addr, count * 4); +} + +static inline void __ide_outsw(unsigned long port, const void *addr, + unsigned long count) +{ + outsw(port, addr, count); + __ide_flush_dcache_range((unsigned long)addr, count * 2); +} + +static inline void __ide_outsl(unsigned long port, const void *addr, + unsigned long count) +{ + outsl(port, addr, count); + __ide_flush_dcache_range((unsigned long)addr, count * 4); +} + +static inline void __ide_mm_insw(void __iomem *port, void *addr, u32 count) +{ + readsw(port, addr, count); + __ide_flush_dcache_range((unsigned long)addr, count * 2); +} + +static inline void __ide_mm_insl(void __iomem *port, void *addr, u32 count) +{ + readsl(port, addr, count); + __ide_flush_dcache_range((unsigned long)addr, count * 4); +} + +static inline void __ide_mm_outsw(void __iomem *port, void *addr, u32 count) +{ + writesw(port, addr, count); + __ide_flush_dcache_range((unsigned long)addr, count * 2); +} + +static inline void __ide_mm_outsl(void __iomem * port, void *addr, u32 count) +{ + writesl(port, addr, count); + __ide_flush_dcache_range((unsigned long)addr, count * 4); +} -#define __ide_mm_insw readsw -#define __ide_mm_insl readsl -#define __ide_mm_outsw writesw -#define __ide_mm_outsl writesl +/* ide_insw calls insw, not __ide_insw. Why? */ +#undef insw +#undef insl +#undef outsw +#undef outsl +#define insw(port, addr, count) __ide_insw(port, addr, count) +#define insl(port, addr, count) __ide_insl(port, addr, count) +#define outsw(port, addr, count) __ide_outsw(port, addr, count) +#define outsl(port, addr, count) __ide_outsl(port, addr, count) #endif /* __KERNEL__ */ diff --git a/include/asm-mips/mach-generic/ioremap.h b/include/asm-mips/mach-generic/ioremap.h new file mode 100644 index 000000000000..9b64ff6e485d --- /dev/null +++ b/include/asm-mips/mach-generic/ioremap.h @@ -0,0 +1,23 @@ +/* + * include/asm-mips/mach-generic/ioremap.h + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version + * 2 of the License, or (at your option) any later version. + */ +#ifndef __ASM_MACH_GENERIC_IOREMAP_H +#define __ASM_MACH_GENERIC_IOREMAP_H + +#include <linux/types.h> + +/* + * Allow physical addresses to be fixed up to help peripherals located + * outside the low 32-bit range -- generic pass-through version. + */ +static inline phys_t fixup_bigphys_addr(phys_t phys_addr, phys_t size) +{ + return phys_addr; +} + +#endif /* __ASM_MACH_GENERIC_IOREMAP_H */ diff --git a/include/asm-mips/mach-generic/kernel-entry-init.h b/include/asm-mips/mach-generic/kernel-entry-init.h new file mode 100644 index 000000000000..7e66505fa574 --- /dev/null +++ b/include/asm-mips/mach-generic/kernel-entry-init.h @@ -0,0 +1,25 @@ +/* + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * + * Copyright (C) 2005 Embedded Alley Solutions, Inc + * Copyright (C) 2005 Ralf Baechle (ralf@linux-mips.org) + */ +#ifndef __ASM_MACH_GENERIC_KERNEL_ENTRY_H +#define __ASM_MACH_GENERIC_KERNEL_ENTRY_H + +/* Intentionally empty macro, used in head.S. Override in + * arch/mips/mach-xxx/kernel-entry-init.h when necessary. + */ +.macro kernel_entry_setup +.endm + +/* + * Do SMP slave processor setup necessary before we can savely execute C code. + */ + .macro smp_slave_setup + .endm + + +#endif /* __ASM_MACH_GENERIC_KERNEL_ENTRY_H */ diff --git a/include/asm-mips/mach-generic/kmalloc.h b/include/asm-mips/mach-generic/kmalloc.h new file mode 100644 index 000000000000..373d66dee9d7 --- /dev/null +++ b/include/asm-mips/mach-generic/kmalloc.h @@ -0,0 +1,13 @@ +#ifndef __ASM_MACH_GENERIC_KMALLOC_H +#define __ASM_MACH_GENERIC_KMALLOC_H + +#include <linux/config.h> + +#ifndef CONFIG_DMA_COHERENT +/* + * Total overkill for most systems but need as a safe default. + */ +#define ARCH_KMALLOC_MINALIGN 128 +#endif + +#endif /* __ASM_MACH_GENERIC_KMALLOC_H */ diff --git a/include/asm-mips/mach-generic/spaces.h b/include/asm-mips/mach-generic/spaces.h index 5a2c1efb4eb7..b849d8dd7e78 100644 --- a/include/asm-mips/mach-generic/spaces.h +++ b/include/asm-mips/mach-generic/spaces.h @@ -55,13 +55,13 @@ #endif #ifdef CONFIG_DMA_NONCOHERENT -#define CAC_BASE 0x9800000000000000 +#define CAC_BASE 0x9800000000000000UL #else -#define CAC_BASE 0xa800000000000000 +#define CAC_BASE 0xa800000000000000UL #endif -#define IO_BASE 0x9000000000000000 -#define UNCAC_BASE 0x9000000000000000 -#define MAP_BASE 0xc000000000000000 +#define IO_BASE 0x9000000000000000UL +#define UNCAC_BASE 0x9000000000000000UL +#define MAP_BASE 0xc000000000000000UL #define TO_PHYS(x) ( ((x) & TO_PHYS_MASK)) #define TO_CAC(x) (CAC_BASE | ((x) & TO_PHYS_MASK)) diff --git a/include/asm-mips/mach-ip22/cpu-feature-overrides.h b/include/asm-mips/mach-ip22/cpu-feature-overrides.h index 3c8896d9b133..ab9714668177 100644 --- a/include/asm-mips/mach-ip22/cpu-feature-overrides.h +++ b/include/asm-mips/mach-ip22/cpu-feature-overrides.h @@ -11,6 +11,12 @@ /* * IP22 with a variety of processors so we can't use defaults for everything. */ +#define cpu_has_tlb 1 +#define cpu_has_4kex 1 +#define cpu_has_4kcache 1 +#define cpu_has_fpu 1 +#define cpu_has_32fpr 1 +#define cpu_has_counter 1 #define cpu_has_mips16 0 #define cpu_has_divec 0 #define cpu_has_cache_cdex_p 1 @@ -23,6 +29,8 @@ #define cpu_has_dc_aliases (PAGE_SIZE < 0x4000) #define cpu_has_ic_fills_f_dc 0 +#define cpu_has_dsp 0 + #define cpu_has_nofpuex 0 #define cpu_has_64bits 1 diff --git a/include/asm-mips/mach-ip22/spaces.h b/include/asm-mips/mach-ip22/spaces.h index e96166f27c49..8385f716798d 100644 --- a/include/asm-mips/mach-ip22/spaces.h +++ b/include/asm-mips/mach-ip22/spaces.h @@ -44,7 +44,7 @@ #define CAC_BASE 0xffffffff80000000 #define IO_BASE 0xffffffffa0000000 #define UNCAC_BASE 0xffffffffa0000000 -#define MAP_BASE 0xffffffffc0000000 +#define MAP_BASE 0xc000000000000000 #define TO_PHYS(x) ( ((x) & TO_PHYS_MASK)) #define TO_CAC(x) (CAC_BASE | ((x) & TO_PHYS_MASK)) diff --git a/include/asm-mips/mach-ip27/cpu-feature-overrides.h b/include/asm-mips/mach-ip27/cpu-feature-overrides.h index fe96d7358517..4c8a90051fd0 100644 --- a/include/asm-mips/mach-ip27/cpu-feature-overrides.h +++ b/include/asm-mips/mach-ip27/cpu-feature-overrides.h @@ -25,6 +25,7 @@ #define cpu_has_vtag_icache 0 #define cpu_has_dc_aliases 0 #define cpu_has_ic_fills_f_dc 0 +#define cpu_has_dsp 0 #define cpu_icache_snoops_remote_store 1 #define cpu_has_nofpuex 0 diff --git a/include/asm-mips/mach-ip27/kernel-entry-init.h b/include/asm-mips/mach-ip27/kernel-entry-init.h new file mode 100644 index 000000000000..c1a10314b317 --- /dev/null +++ b/include/asm-mips/mach-ip27/kernel-entry-init.h @@ -0,0 +1,52 @@ +/* + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * + * Copyright (C) 2000 Silicon Graphics, Inc. + * Copyright (C) 2005 Ralf Baechle <ralf@linux-mips.org> + */ +#ifndef __ASM_MACH_IP27_KERNEL_ENTRY_H +#define __ASM_MACH_IP27_KERNEL_ENTRY_H + +#include <asm/sn/addrs.h> +#include <asm/sn/sn0/hubni.h> +#include <asm/sn/klkernvars.h> + +/* + * Returns the local nasid into res. + */ + .macro GET_NASID_ASM res + dli \res, LOCAL_HUB_ADDR(NI_STATUS_REV_ID) + ld \res, (\res) + and \res, NSRI_NODEID_MASK + dsrl \res, NSRI_NODEID_SHFT + .endm + +/* + * Intentionally empty macro, used in head.S. Override in + * arch/mips/mach-xxx/kernel-entry-init.h when necessary. + */ + .macro kernel_entry_setup + GET_NASID_ASM t1 + move t2, t1 # text and data are here + MAPPED_KERNEL_SETUP_TLB + .endm + +/* + * Do SMP slave processor setup necessary before we can savely execute C code. + */ + .macro smp_slave_setup + GET_NASID_ASM t1 + dli t0, KLDIR_OFFSET + (KLI_KERN_VARS * KLDIR_ENT_SIZE) + \ + KLDIR_OFF_POINTER + CAC_BASE + dsll t1, NASID_SHFT + or t0, t0, t1 + ld t0, 0(t0) # t0 points to kern_vars struct + lh t1, KV_RO_NASID_OFFSET(t0) + lh t2, KV_RW_NASID_OFFSET(t0) + MAPPED_KERNEL_SETUP_TLB + ARC64_TWIDDLE_PC + .endm + +#endif /* __ASM_MACH_IP27_KERNEL_ENTRY_H */ diff --git a/include/asm-mips/mach-ip27/kmalloc.h b/include/asm-mips/mach-ip27/kmalloc.h new file mode 100644 index 000000000000..426bd049b2d7 --- /dev/null +++ b/include/asm-mips/mach-ip27/kmalloc.h @@ -0,0 +1,8 @@ +#ifndef __ASM_MACH_IP27_KMALLOC_H +#define __ASM_MACH_IP27_KMALLOC_H + +/* + * All happy, no need to define ARCH_KMALLOC_MINALIGN + */ + +#endif /* __ASM_MACH_IP27_KMALLOC_H */ diff --git a/include/asm-mips/mach-ip27/mmzone.h b/include/asm-mips/mach-ip27/mmzone.h index d3f566362e9d..986a3b9b59a7 100644 --- a/include/asm-mips/mach-ip27/mmzone.h +++ b/include/asm-mips/mach-ip27/mmzone.h @@ -10,7 +10,6 @@ #define LEVELS_PER_SLICE 128 struct slice_data { - unsigned long irq_alloc_mask[2]; unsigned long irq_enable_mask[2]; int level_to_irq[LEVELS_PER_SLICE]; }; @@ -20,6 +19,7 @@ struct hub_data { DECLARE_BITMAP(h_bigwin_used, HUB_NUM_BIG_WINDOW); cpumask_t h_cpus; unsigned long slice_map; + unsigned long irq_alloc_mask[2]; struct slice_data slice[2]; }; diff --git a/include/asm-mips/mach-ip27/spaces.h b/include/asm-mips/mach-ip27/spaces.h index e3b3fe32eeb1..45e61785ef42 100644 --- a/include/asm-mips/mach-ip27/spaces.h +++ b/include/asm-mips/mach-ip27/spaces.h @@ -20,6 +20,7 @@ #define IO_BASE 0x9200000000000000 #define MSPEC_BASE 0x9400000000000000 #define UNCAC_BASE 0x9600000000000000 +#define MAP_BASE 0xc000000000000000 #define TO_PHYS(x) ( ((x) & TO_PHYS_MASK)) #define TO_CAC(x) (CAC_BASE | ((x) & TO_PHYS_MASK)) diff --git a/include/asm-mips/mach-ip27/topology.h b/include/asm-mips/mach-ip27/topology.h index a70a81257c3d..82141c711c33 100644 --- a/include/asm-mips/mach-ip27/topology.h +++ b/include/asm-mips/mach-ip27/topology.h @@ -9,6 +9,9 @@ #define parent_node(node) (node) #define node_to_cpumask(node) (hub_data(node)->h_cpus) #define node_to_first_cpu(node) (first_cpu(node_to_cpumask(node))) +struct pci_bus; +extern int pcibus_to_node(struct pci_bus *); + #define pcibus_to_cpumask(bus) (cpu_online_map) extern unsigned char __node_distances[MAX_COMPACT_NODES][MAX_COMPACT_NODES]; diff --git a/include/asm-mips/mach-ip32/cpu-feature-overrides.h b/include/asm-mips/mach-ip32/cpu-feature-overrides.h index 04713973c6c3..ab37fc1842ba 100644 --- a/include/asm-mips/mach-ip32/cpu-feature-overrides.h +++ b/include/asm-mips/mach-ip32/cpu-feature-overrides.h @@ -37,5 +37,6 @@ #define cpu_has_ejtag 0 #define cpu_has_vtag_icache 0 #define cpu_has_ic_fills_f_dc 0 +#define cpu_has_dsp 0 #endif /* __ASM_MACH_IP32_CPU_FEATURE_OVERRIDES_H */ diff --git a/include/asm-mips/mach-ip32/kmalloc.h b/include/asm-mips/mach-ip32/kmalloc.h new file mode 100644 index 000000000000..9d2d4d9ac036 --- /dev/null +++ b/include/asm-mips/mach-ip32/kmalloc.h @@ -0,0 +1,12 @@ +#ifndef __ASM_MACH_IP32_KMALLOC_H +#define __ASM_MACH_IP32_KMALLOC_H + +#include <linux/config.h> + +#if defined(CONFIG_CPU_R5000) || defined (CONFIG_CPU_RM7000) +#define ARCH_KMALLOC_MINALIGN 32 +#else +#define ARCH_KMALLOC_MINALIGN 128 +#endif + +#endif /* __ASM_MACH_IP32_KMALLOC_H */ diff --git a/include/asm-mips/mach-ip32/mc146818rtc.h b/include/asm-mips/mach-ip32/mc146818rtc.h index f5d780ff843f..c28ba8d84076 100644 --- a/include/asm-mips/mach-ip32/mc146818rtc.h +++ b/include/asm-mips/mach-ip32/mc146818rtc.h @@ -11,7 +11,6 @@ #ifndef __ASM_MACH_IP32_MC146818RTC_H #define __ASM_MACH_IP32_MC146818RTC_H -#include <asm/io.h> #include <asm/ip32/mace.h> #define RTC_PORT(x) (0x70 + (x)) @@ -26,8 +25,10 @@ static inline void CMOS_WRITE(unsigned char data, unsigned long addr) mace->isa.rtc[addr << 8] = data; } -/* FIXME: Do it right. For now just assume that noone lives in 20th century - * and no O2 user in 22th century ;-) */ +/* + * FIXME: Do it right. For now just assume that noone lives in 20th century + * and no O2 user in 22th century ;-) + */ #define mc146818_decode_year(year) ((year) + 2000) #define RTC_ALWAYS_BCD 0 diff --git a/include/asm-mips/mach-ip32/spaces.h b/include/asm-mips/mach-ip32/spaces.h index c7839f85c68d..44abe5c02389 100644 --- a/include/asm-mips/mach-ip32/spaces.h +++ b/include/asm-mips/mach-ip32/spaces.h @@ -19,10 +19,10 @@ #define HIGHMEM_START (1UL << 59UL) #endif -#define CAC_BASE 0x9800000000000000 -#define IO_BASE 0x9000000000000000 -#define UNCAC_BASE 0x9000000000000000 -#define MAP_BASE 0xc000000000000000 +#define CAC_BASE 0x9800000000000000UL +#define IO_BASE 0x9000000000000000UL +#define UNCAC_BASE 0x9000000000000000UL +#define MAP_BASE 0xc000000000000000UL #define TO_PHYS(x) ( ((x) & TO_PHYS_MASK)) #define TO_CAC(x) (CAC_BASE | ((x) & TO_PHYS_MASK)) diff --git a/include/asm-mips/mach-ja/cpu-feature-overrides.h b/include/asm-mips/mach-ja/cpu-feature-overrides.h index ca57e7db98bb..a0fde405d4c4 100644 --- a/include/asm-mips/mach-ja/cpu-feature-overrides.h +++ b/include/asm-mips/mach-ja/cpu-feature-overrides.h @@ -25,6 +25,7 @@ #define cpu_has_vtag_icache 0 #define cpu_has_dc_aliases 0 #define cpu_has_ic_fills_f_dc 0 +#define cpu_has_dsp 0 #define cpu_icache_snoops_remote_store 0 #define cpu_has_nofpuex 0 @@ -36,10 +37,4 @@ #define cpu_icache_line_size() 32 #define cpu_scache_line_size() 32 -/* - * On the RM9000 we need to ensure that I-cache lines being fetches only - * contain valid instructions are funny things will happen. - */ -#define PLAT_TRAMPOLINE_STUFF_LINE 32UL - #endif /* __ASM_MACH_JA_CPU_FEATURE_OVERRIDES_H */ diff --git a/include/asm-mips/mach-jmr3927/asm/ds1742.h b/include/asm-mips/mach-jmr3927/ds1742.h index 134a4b6c334a..cff6192d4bdb 100644 --- a/include/asm-mips/mach-jmr3927/asm/ds1742.h +++ b/include/asm-mips/mach-jmr3927/ds1742.h @@ -5,12 +5,12 @@ * * Copyright (C) 2003 by Ralf Baechle */ -#ifndef __ASM_MACH_JMR3927_ASM_DS1742_H -#define __ASM_MACH_JMR3927_ASM_DS1742_H +#ifndef __ASM_MACH_JMR3927_DS1742_H +#define __ASM_MACH_JMR3927_DS1742_H #include <asm/jmr3927/jmr3927.h> #define rtc_read(reg) (jmr3927_nvram_in(addr)) #define rtc_write(data, reg) (jmr3927_nvram_out((data),(reg))) -#endif /* __ASM_MACH_JMR3927_ASM_DS1742_H */ +#endif /* __ASM_MACH_JMR3927_DS1742_H */ diff --git a/include/asm-mips/mach-mips/cpu-feature-overrides.h b/include/asm-mips/mach-mips/cpu-feature-overrides.h index 6f51be571bf0..9f92aed17754 100644 --- a/include/asm-mips/mach-mips/cpu-feature-overrides.h +++ b/include/asm-mips/mach-mips/cpu-feature-overrides.h @@ -17,7 +17,7 @@ #ifdef CONFIG_CPU_MIPS32 #define cpu_has_tlb 1 #define cpu_has_4kex 1 -#define cpu_has_4ktlb 1 +#define cpu_has_4kcache 1 /* #define cpu_has_fpu ? */ /* #define cpu_has_32fpr ? */ #define cpu_has_counter 1 @@ -37,12 +37,13 @@ /* #define cpu_has_64bits ? */ /* #define cpu_has_64bit_zero_reg ? */ /* #define cpu_has_subset_pcaches ? */ +#define cpu_icache_snoops_remote_store 1 #endif #ifdef CONFIG_CPU_MIPS64 #define cpu_has_tlb 1 #define cpu_has_4kex 1 -#define cpu_has_4ktlb 1 +#define cpu_has_4kcache 1 /* #define cpu_has_fpu ? */ /* #define cpu_has_32fpr ? */ #define cpu_has_counter 1 @@ -62,6 +63,7 @@ /* #define cpu_has_64bits ? */ /* #define cpu_has_64bit_zero_reg ? */ /* #define cpu_has_subset_pcaches ? */ +#define cpu_icache_snoops_remote_store 1 #endif #endif /* __ASM_MACH_MIPS_CPU_FEATURE_OVERRIDES_H */ diff --git a/include/asm-mips/mach-mips/irq.h b/include/asm-mips/mach-mips/irq.h new file mode 100644 index 000000000000..f8579696ca54 --- /dev/null +++ b/include/asm-mips/mach-mips/irq.h @@ -0,0 +1,14 @@ +#ifndef __ASM_MACH_MIPS_IRQ_H +#define __ASM_MACH_MIPS_IRQ_H + +#include <linux/config.h> + +#define NR_IRQS 256 + +#ifdef CONFIG_SMP + +#define ARCH_HAS_IRQ_PER_CPU + +#endif + +#endif /* __ASM_MACH_MIPS_IRQ_H */ diff --git a/include/asm-mips/mach-ocelot3/cpu-feature-overrides.h b/include/asm-mips/mach-ocelot3/cpu-feature-overrides.h index 7473512384bc..825c5f674dfc 100644 --- a/include/asm-mips/mach-ocelot3/cpu-feature-overrides.h +++ b/include/asm-mips/mach-ocelot3/cpu-feature-overrides.h @@ -28,6 +28,7 @@ #define cpu_has_vtag_icache 0 #define cpu_has_dc_aliases 0 #define cpu_has_ic_fills_f_dc 0 +#define cpu_has_dsp 0 #define cpu_icache_snoops_remote_store 0 #define cpu_has_nofpuex 0 @@ -39,10 +40,4 @@ #define cpu_icache_line_size() 32 #define cpu_scache_line_size() 32 -/* - * On the RM9000 we need to ensure that I-cache lines being fetches only - * contain valid instructions are funny things will happen. - */ -#define PLAT_TRAMPOLINE_STUFF_LINE 32UL - #endif /* __ASM_MACH_JA_CPU_FEATURE_OVERRIDES_H */ diff --git a/include/asm-mips/mach-pb1x00/pb1200.h b/include/asm-mips/mach-pb1x00/pb1200.h new file mode 100644 index 000000000000..409d443322c1 --- /dev/null +++ b/include/asm-mips/mach-pb1x00/pb1200.h @@ -0,0 +1,255 @@ +/* + * AMD Alchemy PB1200 Referrence Board + * Board Registers defines. + * + * ######################################################################## + * + * This program is free software; you can distribute it and/or modify it + * under the terms of the GNU General Public License (Version 2) as + * published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License + * for more details. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. + * + * ######################################################################## + * + * + */ +#ifndef __ASM_PB1200_H +#define __ASM_PB1200_H + +#include <linux/types.h> + +// This is defined in au1000.h with bogus value +#undef AU1X00_EXTERNAL_INT + +#define DBDMA_AC97_TX_CHAN DSCR_CMD0_PSC1_TX +#define DBDMA_AC97_RX_CHAN DSCR_CMD0_PSC1_RX +#define DBDMA_I2S_TX_CHAN DSCR_CMD0_PSC1_TX +#define DBDMA_I2S_RX_CHAN DSCR_CMD0_PSC1_RX + +/* SPI and SMB are muxed on the Pb1200 board. + Refer to board documentation. + */ +#define SPI_PSC_BASE PSC0_BASE_ADDR +#define SMBUS_PSC_BASE PSC0_BASE_ADDR +/* AC97 and I2S are muxed on the Pb1200 board. + Refer to board documentation. + */ +#define AC97_PSC_BASE PSC1_BASE_ADDR +#define I2S_PSC_BASE PSC1_BASE_ADDR + +#define BCSR_KSEG1_ADDR 0xAD800000 + +typedef volatile struct +{ + /*00*/ u16 whoami; + u16 reserved0; + /*04*/ u16 status; + u16 reserved1; + /*08*/ u16 switches; + u16 reserved2; + /*0C*/ u16 resets; + u16 reserved3; + + /*10*/ u16 pcmcia; + u16 reserved4; + /*14*/ u16 board; + u16 reserved5; + /*18*/ u16 disk_leds; + u16 reserved6; + /*1C*/ u16 system; + u16 reserved7; + + /*20*/ u16 intclr; + u16 reserved8; + /*24*/ u16 intset; + u16 reserved9; + /*28*/ u16 intclr_mask; + u16 reserved10; + /*2C*/ u16 intset_mask; + u16 reserved11; + + /*30*/ u16 sig_status; + u16 reserved12; + /*34*/ u16 int_status; + u16 reserved13; + /*38*/ u16 reserved14; + u16 reserved15; + /*3C*/ u16 reserved16; + u16 reserved17; + +} BCSR; + +static BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR; + +/* + * Register bit definitions for the BCSRs + */ +#define BCSR_WHOAMI_DCID 0x000F +#define BCSR_WHOAMI_CPLD 0x00F0 +#define BCSR_WHOAMI_BOARD 0x0F00 + +#define BCSR_STATUS_PCMCIA0VS 0x0003 +#define BCSR_STATUS_PCMCIA1VS 0x000C +#define BCSR_STATUS_SWAPBOOT 0x0040 +#define BCSR_STATUS_FLASHBUSY 0x0100 +#define BCSR_STATUS_IDECBLID 0x0200 +#define BCSR_STATUS_SD0WP 0x0400 +#define BCSR_STATUS_SD1WP 0x0800 +#define BCSR_STATUS_U0RXD 0x1000 +#define BCSR_STATUS_U1RXD 0x2000 + +#define BCSR_SWITCHES_OCTAL 0x00FF +#define BCSR_SWITCHES_DIP_1 0x0080 +#define BCSR_SWITCHES_DIP_2 0x0040 +#define BCSR_SWITCHES_DIP_3 0x0020 +#define BCSR_SWITCHES_DIP_4 0x0010 +#define BCSR_SWITCHES_DIP_5 0x0008 +#define BCSR_SWITCHES_DIP_6 0x0004 +#define BCSR_SWITCHES_DIP_7 0x0002 +#define BCSR_SWITCHES_DIP_8 0x0001 +#define BCSR_SWITCHES_ROTARY 0x0F00 + +#define BCSR_RESETS_ETH 0x0001 +#define BCSR_RESETS_CAMERA 0x0002 +#define BCSR_RESETS_DC 0x0004 +#define BCSR_RESETS_IDE 0x0008 +/* not resets but in the same register */ +#define BCSR_RESETS_WSCFSM 0x0800 +#define BCSR_RESETS_PCS0MUX 0x1000 +#define BCSR_RESETS_PCS1MUX 0x2000 +#define BCSR_RESETS_SPISEL 0x4000 +#define BCSR_RESETS_SD1MUX 0x8000 + +#define BCSR_PCMCIA_PC0VPP 0x0003 +#define BCSR_PCMCIA_PC0VCC 0x000C +#define BCSR_PCMCIA_PC0DRVEN 0x0010 +#define BCSR_PCMCIA_PC0RST 0x0080 +#define BCSR_PCMCIA_PC1VPP 0x0300 +#define BCSR_PCMCIA_PC1VCC 0x0C00 +#define BCSR_PCMCIA_PC1DRVEN 0x1000 +#define BCSR_PCMCIA_PC1RST 0x8000 + +#define BCSR_BOARD_LCDVEE 0x0001 +#define BCSR_BOARD_LCDVDD 0x0002 +#define BCSR_BOARD_LCDBL 0x0004 +#define BCSR_BOARD_CAMSNAP 0x0010 +#define BCSR_BOARD_CAMPWR 0x0020 +#define BCSR_BOARD_SD0PWR 0x0040 +#define BCSR_BOARD_SD1PWR 0x0080 + +#define BCSR_LEDS_DECIMALS 0x00FF +#define BCSR_LEDS_LED0 0x0100 +#define BCSR_LEDS_LED1 0x0200 +#define BCSR_LEDS_LED2 0x0400 +#define BCSR_LEDS_LED3 0x0800 + +#define BCSR_SYSTEM_VDDI 0x001F +#define BCSR_SYSTEM_POWEROFF 0x4000 +#define BCSR_SYSTEM_RESET 0x8000 + +/* Bit positions for the different interrupt sources */ +#define BCSR_INT_IDE 0x0001 +#define BCSR_INT_ETH 0x0002 +#define BCSR_INT_PC0 0x0004 +#define BCSR_INT_PC0STSCHG 0x0008 +#define BCSR_INT_PC1 0x0010 +#define BCSR_INT_PC1STSCHG 0x0020 +#define BCSR_INT_DC 0x0040 +#define BCSR_INT_FLASHBUSY 0x0080 +#define BCSR_INT_PC0INSERT 0x0100 +#define BCSR_INT_PC0EJECT 0x0200 +#define BCSR_INT_PC1INSERT 0x0400 +#define BCSR_INT_PC1EJECT 0x0800 +#define BCSR_INT_SD0INSERT 0x1000 +#define BCSR_INT_SD0EJECT 0x2000 +#define BCSR_INT_SD1INSERT 0x4000 +#define BCSR_INT_SD1EJECT 0x8000 + +/* PCMCIA Db1x00 specific defines */ +#define PCMCIA_MAX_SOCK 1 +#define PCMCIA_NUM_SOCKS (PCMCIA_MAX_SOCK+1) + +/* VPP/VCC */ +#define SET_VCC_VPP(VCC, VPP, SLOT)\ + ((((VCC)<<2) | ((VPP)<<0)) << ((SLOT)*8)) + +#define AU1XXX_SMC91111_PHYS_ADDR (0x0D000300) +#define AU1XXX_SMC91111_IRQ PB1200_ETH_INT + +#define AU1XXX_ATA_PHYS_ADDR (0x0C800000) +#define AU1XXX_ATA_PHYS_LEN (0x100) +#define AU1XXX_ATA_REG_OFFSET (5) +#define AU1XXX_ATA_INT PB1200_IDE_INT +#define AU1XXX_ATA_DDMA_REQ DSCR_CMD0_DMA_REQ1; +#define AU1XXX_ATA_RQSIZE 128 + +#define NAND_PHYS_ADDR 0x1C000000 + +/* Timing values as described in databook, * ns value stripped of + * lower 2 bits. + * These defines are here rather than an SOC1200 generic file because + * the parts chosen on another board may be different and may require + * different timings. + */ +#define NAND_T_H (18 >> 2) +#define NAND_T_PUL (30 >> 2) +#define NAND_T_SU (30 >> 2) +#define NAND_T_WH (30 >> 2) + +/* Bitfield shift amounts */ +#define NAND_T_H_SHIFT 0 +#define NAND_T_PUL_SHIFT 4 +#define NAND_T_SU_SHIFT 8 +#define NAND_T_WH_SHIFT 12 + +#define NAND_TIMING ((NAND_T_H & 0xF) << NAND_T_H_SHIFT) | \ + ((NAND_T_PUL & 0xF) << NAND_T_PUL_SHIFT) | \ + ((NAND_T_SU & 0xF) << NAND_T_SU_SHIFT) | \ + ((NAND_T_WH & 0xF) << NAND_T_WH_SHIFT) + + +/* + * External Interrupts for Pb1200 as of 8/6/2004. + * Bit positions in the CPLD registers can be calculated by taking + * the interrupt define and subtracting the PB1200_INT_BEGIN value. + * *example: IDE bis pos is = 64 - 64 + ETH bit pos is = 65 - 64 + */ +#define PB1200_INT_BEGIN (AU1000_LAST_INTC1_INT + 1) +#define PB1200_IDE_INT (PB1200_INT_BEGIN + 0) +#define PB1200_ETH_INT (PB1200_INT_BEGIN + 1) +#define PB1200_PC0_INT (PB1200_INT_BEGIN + 2) +#define PB1200_PC0_STSCHG_INT (PB1200_INT_BEGIN + 3) +#define PB1200_PC1_INT (PB1200_INT_BEGIN + 4) +#define PB1200_PC1_STSCHG_INT (PB1200_INT_BEGIN + 5) +#define PB1200_DC_INT (PB1200_INT_BEGIN + 6) +#define PB1200_FLASHBUSY_INT (PB1200_INT_BEGIN + 7) +#define PB1200_PC0_INSERT_INT (PB1200_INT_BEGIN + 8) +#define PB1200_PC0_EJECT_INT (PB1200_INT_BEGIN + 9) +#define PB1200_PC1_INSERT_INT (PB1200_INT_BEGIN + 10) +#define PB1200_PC1_EJECT_INT (PB1200_INT_BEGIN + 11) +#define PB1200_SD0_INSERT_INT (PB1200_INT_BEGIN + 12) +#define PB1200_SD0_EJECT_INT (PB1200_INT_BEGIN + 13) +#define PB1200_SD1_INSERT_INT (PB1200_INT_BEGIN + 14) +#define PB1200_SD1_EJECT_INT (PB1200_INT_BEGIN + 15) + +#define PB1200_INT_END (PB1200_INT_BEGIN + 15) + +/* For drivers/pcmcia/au1000_db1x00.c */ +#define BOARD_PC0_INT PB1200_PC0_INT +#define BOARD_PC1_INT PB1200_PC1_INT +#define BOARD_CARD_INSERTED(SOCKET) bcsr->sig_status & (1<<(8+(2*SOCKET))) + +/* Nand chip select */ +#define NAND_CS 1 + +#endif /* __ASM_PB1200_H */ + diff --git a/include/asm-mips/mach-pb1x00/pb1550.h b/include/asm-mips/mach-pb1x00/pb1550.h index 431d6088ea96..9578ead11e8a 100644 --- a/include/asm-mips/mach-pb1x00/pb1550.h +++ b/include/asm-mips/mach-pb1x00/pb1550.h @@ -166,4 +166,11 @@ static BCSR * const bcsr = (BCSR *)BCSR_PHYS_ADDR; ((NAND_T_SU & 0xF) << NAND_T_SU_SHIFT) | \ ((NAND_T_WH & 0xF) << NAND_T_WH_SHIFT) +#define NAND_CS 1 + +/* should be done by yamon */ +#define NAND_STCFG 0x00400005 /* 8-bit NAND */ +#define NAND_STTIME 0x00007774 /* valid for 396MHz SD=2 only */ +#define NAND_STADDR 0x12000FFF /* physical address 0x20000000 */ + #endif /* __ASM_PB1550_H */ diff --git a/include/asm-mips/mach-pnx8550/cm.h b/include/asm-mips/mach-pnx8550/cm.h new file mode 100644 index 000000000000..bb0a56c7d011 --- /dev/null +++ b/include/asm-mips/mach-pnx8550/cm.h @@ -0,0 +1,43 @@ +/* + * + * BRIEF MODULE DESCRIPTION + * Clock module specific definitions + * + * Author: source@mvista.com + * + * This program is free software; you can distribute it and/or modify it + * under the terms of the GNU General Public License (Version 2) as + * published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License + * for more details. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. + */ + +#ifndef __PNX8550_CM_H +#define __PNX8550_CM_H + +#define PNX8550_CM_BASE 0xBBE47000 + +#define PNX8550_CM_PLL0_CTL *(volatile unsigned long *)(PNX8550_CM_BASE + 0x000) +#define PNX8550_CM_PLL1_CTL *(volatile unsigned long *)(PNX8550_CM_BASE + 0x004) +#define PNX8550_CM_PLL2_CTL *(volatile unsigned long *)(PNX8550_CM_BASE + 0x008) +#define PNX8550_CM_PLL3_CTL *(volatile unsigned long *)(PNX8550_CM_BASE + 0x00C) + +// Table not complete..... + +#define PNX8550_CM_PLL_BLOCKED_MASK 0x80000000 +#define PNX8550_CM_PLL_LOCK_MASK 0x40000000 +#define PNX8550_CM_PLL_CURRENT_ADJ_MASK 0x3c000000 +#define PNX8550_CM_PLL_N_MASK 0x01ff0000 +#define PNX8550_CM_PLL_M_MASK 0x00003f00 +#define PNX8550_CM_PLL_P_MASK 0x0000000c +#define PNX8550_CM_PLL_PD_MASK 0x00000002 + + +#endif diff --git a/include/asm-mips/mach-pnx8550/glb.h b/include/asm-mips/mach-pnx8550/glb.h new file mode 100644 index 000000000000..07aa85e609bc --- /dev/null +++ b/include/asm-mips/mach-pnx8550/glb.h @@ -0,0 +1,86 @@ +/* + * + * BRIEF MODULE DESCRIPTION + * PNX8550 global definitions + * + * Author: source@mvista.com + * + * This program is free software; you can distribute it and/or modify it + * under the terms of the GNU General Public License (Version 2) as + * published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License + * for more details. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. + */ + +#ifndef __PNX8550_GLB_H +#define __PNX8550_GLB_H + +#define PNX8550_GLB1_BASE 0xBBE63000 +#define PNX8550_GLB2_BASE 0xBBE4d000 +#define PNX8550_RESET_BASE 0xBBE60000 + +/* PCI Inta Output Enable Registers */ +#define PNX8550_GLB2_ENAB_INTA_O *(volatile unsigned long *)(PNX8550_GLB2_BASE + 0x050) + +/* Bit 1:Enable DAC Powerdown + 0:DACs are enabled and are working normally + 1:DACs are powerdown +*/ +#define PNX8550_GLB_DAC_PD 0x2 +/* Bit 0:Enable of PCI inta output + 0 = Disable PCI inta output + 1 = Enable PCI inta output +*/ +#define PNX8550_GLB_ENABLE_INTA_O 0x1 + +/* PCI Direct Mappings */ +#define PNX8550_PCIMEM 0x12000000 +#define PNX8550_PCIMEM_SIZE 0x08000000 +#define PNX8550_PCIIO 0x1c000000 +#define PNX8550_PCIIO_SIZE 0x02000000 /* 32M */ + +#define PNX8550_PORT_BASE KSEG1 + +// GPIO def +#define PNX8550_GPIO_BASE 0x1Be00000 + +#define PNX8550_GPIO_DIRQ0 (PNX8550_GPIO_BASE + 0x104500) +#define PNX8550_GPIO_MC1 (PNX8550_GPIO_BASE + 0x104004) +#define PNX8550_GPIO_MC_31_BIT 30 +#define PNX8550_GPIO_MC_30_BIT 28 +#define PNX8550_GPIO_MC_29_BIT 26 +#define PNX8550_GPIO_MC_28_BIT 24 +#define PNX8550_GPIO_MC_27_BIT 22 +#define PNX8550_GPIO_MC_26_BIT 20 +#define PNX8550_GPIO_MC_25_BIT 18 +#define PNX8550_GPIO_MC_24_BIT 16 +#define PNX8550_GPIO_MC_23_BIT 14 +#define PNX8550_GPIO_MC_22_BIT 12 +#define PNX8550_GPIO_MC_21_BIT 10 +#define PNX8550_GPIO_MC_20_BIT 8 +#define PNX8550_GPIO_MC_19_BIT 6 +#define PNX8550_GPIO_MC_18_BIT 4 +#define PNX8550_GPIO_MC_17_BIT 2 +#define PNX8550_GPIO_MC_16_BIT 0 + +#define PNX8550_GPIO_MODE_PRIMOP 0x1 +#define PNX8550_GPIO_MODE_NO_OPENDR 0x2 +#define PNX8550_GPIO_MODE_OPENDR 0x3 + +// RESET module +#define PNX8550_RST_CTL *(volatile unsigned long *)(PNX8550_RESET_BASE + 0x0) +#define PNX8550_RST_CAUSE *(volatile unsigned long *)(PNX8550_RESET_BASE + 0x4) +#define PNX8550_RST_EN_WATCHDOG *(volatile unsigned long *)(PNX8550_RESET_BASE + 0x8) + +#define PNX8550_RST_REL_MIPS_RST_N 0x8 +#define PNX8550_RST_DO_SW_RST 0x4 +#define PNX8550_RST_REL_SYS_RST_OUT 0x2 +#define PNX8550_RST_ASSERT_SYS_RST_OUT 0x1 +#endif diff --git a/include/asm-mips/mach-pnx8550/int.h b/include/asm-mips/mach-pnx8550/int.h new file mode 100644 index 000000000000..0e0668b524f4 --- /dev/null +++ b/include/asm-mips/mach-pnx8550/int.h @@ -0,0 +1,140 @@ +/* + * + * BRIEF MODULE DESCRIPTION + * Interrupt specific definitions + * + * Author: source@mvista.com + * + * This program is free software; you can distribute it and/or modify it + * under the terms of the GNU General Public License (Version 2) as + * published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License + * for more details. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. + */ + +#ifndef __PNX8550_INT_H +#define __PNX8550_INT_H + +#define PNX8550_GIC_BASE 0xBBE3E000 + +#define PNX8550_GIC_PRIMASK_0 *(volatile unsigned long *)(PNX8550_GIC_BASE + 0x000) +#define PNX8550_GIC_PRIMASK_1 *(volatile unsigned long *)(PNX8550_GIC_BASE + 0x004) +#define PNX8550_GIC_VECTOR_0 *(volatile unsigned long *)(PNX8550_GIC_BASE + 0x100) +#define PNX8550_GIC_VECTOR_1 *(volatile unsigned long *)(PNX8550_GIC_BASE + 0x104) +#define PNX8550_GIC_PEND_1_31 *(volatile unsigned long *)(PNX8550_GIC_BASE + 0x200) +#define PNX8550_GIC_PEND_32_63 *(volatile unsigned long *)(PNX8550_GIC_BASE + 0x204) +#define PNX8550_GIC_PEND_64_70 *(volatile unsigned long *)(PNX8550_GIC_BASE + 0x208) +#define PNX8550_GIC_FEATURES *(volatile unsigned long *)(PNX8550_GIC_BASE + 0x300) +#define PNX8550_GIC_REQ(x) *(volatile unsigned long *)(PNX8550_GIC_BASE + 0x400 + (x)*4) +#define PNX8550_GIC_MOD_ID *(volatile unsigned long *)(PNX8550_GIC_BASE + 0xFFC) + +// cp0 is two software + six hw exceptions +#define PNX8550_INT_CP0_TOTINT 8 +#define PNX8550_INT_CP0_MIN 0 +#define PNX8550_INT_CP0_MAX (PNX8550_INT_CP0_MIN + PNX8550_INT_CP0_TOTINT - 1) + +#define MIPS_CPU_GIC_IRQ 2 +#define MIPS_CPU_TIMER_IRQ 7 + +// GIC are 71 exceptions connected to cp0's first hardware exception +#define PNX8550_INT_GIC_TOTINT 71 +#define PNX8550_INT_GIC_MIN (PNX8550_INT_CP0_MAX+1) +#define PNX8550_INT_GIC_MAX (PNX8550_INT_GIC_MIN + PNX8550_INT_GIC_TOTINT - 1) + +#define PNX8550_INT_UNDEF (PNX8550_INT_GIC_MIN+0) +#define PNX8550_INT_IPC_TARGET0_MIPS (PNX8550_INT_GIC_MIN+1) +#define PNX8550_INT_IPC_TARGET1_TM32_1 (PNX8550_INT_GIC_MIN+2) +#define PNX8550_INT_IPC_TARGET1_TM32_2 (PNX8550_INT_GIC_MIN+3) +#define PNX8550_INT_RESERVED_4 (PNX8550_INT_GIC_MIN+4) +#define PNX8550_INT_USB (PNX8550_INT_GIC_MIN+5) +#define PNX8550_INT_GPIO_EQ1 (PNX8550_INT_GIC_MIN+6) +#define PNX8550_INT_GPIO_EQ2 (PNX8550_INT_GIC_MIN+7) +#define PNX8550_INT_GPIO_EQ3 (PNX8550_INT_GIC_MIN+8) +#define PNX8550_INT_GPIO_EQ4 (PNX8550_INT_GIC_MIN+9) + +#define PNX8550_INT_GPIO_EQ5 (PNX8550_INT_GIC_MIN+10) +#define PNX8550_INT_GPIO_EQ6 (PNX8550_INT_GIC_MIN+11) +#define PNX8550_INT_RESERVED_12 (PNX8550_INT_GIC_MIN+12) +#define PNX8550_INT_QVCP1 (PNX8550_INT_GIC_MIN+13) +#define PNX8550_INT_QVCP2 (PNX8550_INT_GIC_MIN+14) +#define PNX8550_INT_I2C1 (PNX8550_INT_GIC_MIN+15) +#define PNX8550_INT_I2C2 (PNX8550_INT_GIC_MIN+16) +#define PNX8550_INT_ISO_UART1 (PNX8550_INT_GIC_MIN+17) +#define PNX8550_INT_ISO_UART2 (PNX8550_INT_GIC_MIN+18) +#define PNX8550_INT_UART1 (PNX8550_INT_GIC_MIN+19) + +#define PNX8550_INT_UART2 (PNX8550_INT_GIC_MIN+20) +#define PNX8550_INT_QNTR (PNX8550_INT_GIC_MIN+21) +#define PNX8550_INT_RESERVED22 (PNX8550_INT_GIC_MIN+22) +#define PNX8550_INT_T_DSC (PNX8550_INT_GIC_MIN+23) +#define PNX8550_INT_M_DSC (PNX8550_INT_GIC_MIN+24) +#define PNX8550_INT_RESERVED25 (PNX8550_INT_GIC_MIN+25) +#define PNX8550_INT_2D_DRAW_ENG (PNX8550_INT_GIC_MIN+26) +#define PNX8550_INT_MEM_BASED_SCALAR1 (PNX8550_INT_GIC_MIN+27) +#define PNX8550_INT_VIDEO_MPEG (PNX8550_INT_GIC_MIN+28) +#define PNX8550_INT_VIDEO_INPUT_P1 (PNX8550_INT_GIC_MIN+29) + +#define PNX8550_INT_VIDEO_INPUT_P2 (PNX8550_INT_GIC_MIN+30) +#define PNX8550_INT_SPDI1 (PNX8550_INT_GIC_MIN+31) +#define PNX8550_INT_SPDO (PNX8550_INT_GIC_MIN+32) +#define PNX8550_INT_AUDIO_INPUT1 (PNX8550_INT_GIC_MIN+33) +#define PNX8550_INT_AUDIO_OUTPUT1 (PNX8550_INT_GIC_MIN+34) +#define PNX8550_INT_AUDIO_INPUT2 (PNX8550_INT_GIC_MIN+35) +#define PNX8550_INT_AUDIO_OUTPUT2 (PNX8550_INT_GIC_MIN+36) +#define PNX8550_INT_MEMBASED_SCALAR2 (PNX8550_INT_GIC_MIN+37) +#define PNX8550_INT_VPK (PNX8550_INT_GIC_MIN+38) +#define PNX8550_INT_MPEG1_MIPS (PNX8550_INT_GIC_MIN+39) + +#define PNX8550_INT_MPEG1_TM (PNX8550_INT_GIC_MIN+40) +#define PNX8550_INT_MPEG2_MIPS (PNX8550_INT_GIC_MIN+41) +#define PNX8550_INT_MPEG2_TM (PNX8550_INT_GIC_MIN+42) +#define PNX8550_INT_TS_DMA (PNX8550_INT_GIC_MIN+43) +#define PNX8550_INT_EDMA (PNX8550_INT_GIC_MIN+44) +#define PNX8550_INT_TM_DEBUG1 (PNX8550_INT_GIC_MIN+45) +#define PNX8550_INT_TM_DEBUG2 (PNX8550_INT_GIC_MIN+46) +#define PNX8550_INT_PCI_INTA (PNX8550_INT_GIC_MIN+47) +#define PNX8550_INT_CLOCK_MODULE (PNX8550_INT_GIC_MIN+48) +#define PNX8550_INT_PCI_XIO_INTA_PCI (PNX8550_INT_GIC_MIN+49) + +#define PNX8550_INT_PCI_XIO_INTB_DMA (PNX8550_INT_GIC_MIN+50) +#define PNX8550_INT_PCI_XIO_INTC_GPPM (PNX8550_INT_GIC_MIN+51) +#define PNX8550_INT_PCI_XIO_INTD_GPXIO (PNX8550_INT_GIC_MIN+52) +#define PNX8550_INT_DVD_CSS (PNX8550_INT_GIC_MIN+53) +#define PNX8550_INT_VLD (PNX8550_INT_GIC_MIN+54) +#define PNX8550_INT_GPIO_TSU_7_0 (PNX8550_INT_GIC_MIN+55) +#define PNX8550_INT_GPIO_TSU_15_8 (PNX8550_INT_GIC_MIN+56) +#define PNX8550_INT_GPIO_CTU_IR (PNX8550_INT_GIC_MIN+57) +#define PNX8550_INT_GPIO0 (PNX8550_INT_GIC_MIN+58) +#define PNX8550_INT_GPIO1 (PNX8550_INT_GIC_MIN+59) + +#define PNX8550_INT_GPIO2 (PNX8550_INT_GIC_MIN+60) +#define PNX8550_INT_GPIO3 (PNX8550_INT_GIC_MIN+61) +#define PNX8550_INT_GPIO4 (PNX8550_INT_GIC_MIN+62) +#define PNX8550_INT_GPIO5 (PNX8550_INT_GIC_MIN+63) +#define PNX8550_INT_GPIO6 (PNX8550_INT_GIC_MIN+64) +#define PNX8550_INT_GPIO7 (PNX8550_INT_GIC_MIN+65) +#define PNX8550_INT_PMAN_SECURITY (PNX8550_INT_GIC_MIN+66) +#define PNX8550_INT_I2C3 (PNX8550_INT_GIC_MIN+67) +#define PNX8550_INT_RESERVED_68 (PNX8550_INT_GIC_MIN+68) +#define PNX8550_INT_SPDI2 (PNX8550_INT_GIC_MIN+69) + +#define PNX8550_INT_I2C4 (PNX8550_INT_GIC_MIN+70) + +// Timer are 3 exceptions connected to cp0's 7th hardware exception +#define PNX8550_INT_TIMER_TOTINT 3 +#define PNX8550_INT_TIMER_MIN (PNX8550_INT_GIC_MAX+1) +#define PNX8550_INT_TIMER_MAX (PNX8550_INT_TIMER_MIN + PNX8550_INT_TIMER_TOTINT - 1) + +#define PNX8550_INT_TIMER1 (PNX8550_INT_TIMER_MIN+0) +#define PNX8550_INT_TIMER2 (PNX8550_INT_TIMER_MIN+1) +#define PNX8550_INT_TIMER3 (PNX8550_INT_TIMER_MIN+2) +#define PNX8550_INT_WATCHDOG PNX8550_INT_TIMER3 + +#endif diff --git a/include/asm-mips/mach-pnx8550/kernel-entry-init.h b/include/asm-mips/mach-pnx8550/kernel-entry-init.h new file mode 100644 index 000000000000..57102fa9da51 --- /dev/null +++ b/include/asm-mips/mach-pnx8550/kernel-entry-init.h @@ -0,0 +1,262 @@ +/* + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * + * Copyright (C) 2005 Embedded Alley Solutions, Inc + */ +#ifndef __ASM_MACH_KERNEL_ENTRY_INIT_H +#define __ASM_MACH_KERNEL_ENTRY_INIT_H + +#include <asm/cacheops.h> +#include <asm/addrspace.h> + +#define CO_CONFIGPR_VALID 0x3F1F41FF /* valid bits to write to ConfigPR */ +#define HAZARD_CP0 nop; nop; nop; nop; nop; nop; nop; nop; nop; nop; nop; nop; +#define CACHE_OPC 0xBC000000 /* MIPS cache instruction opcode */ +#define ICACHE_LINE_SIZE 32 /* Instruction cache line size bytes */ +#define DCACHE_LINE_SIZE 32 /* Data cache line size in bytes */ + +#define ICACHE_SET_COUNT 256 /* Instruction cache set count */ +#define DCACHE_SET_COUNT 128 /* Data cache set count */ + +#define ICACHE_SET_SIZE (ICACHE_SET_COUNT * ICACHE_LINE_SIZE) +#define DCACHE_SET_SIZE (DCACHE_SET_COUNT * DCACHE_LINE_SIZE) + + .macro kernel_entry_setup + .set push + .set noreorder + /* + * PNX8550 entry point, when running a non compressed + * kernel. When loading a zImage, the head.S code in + * arch/mips/zboot/pnx8550 will init the caches and, + * decompress the kernel, and branch to kernel_entry. + */ +cache_begin: li t0, (1<<28) + mtc0 t0, CP0_STATUS /* cp0 usable */ + HAZARD_CP0 + + mtc0 zero, CP0_CAUSE + HAZARD_CP0 + + + /* Set static virtual to phys address translation and TLB disabled */ + mfc0 t0, CP0_CONFIG, 7 + HAZARD_CP0 + + and t0,~((1<<19) | (1<<20)) /* TLB/MAP cleared */ + mtc0 t0, CP0_CONFIG, 7 + HAZARD_CP0 + + /* CPU boots with kseg0 cache algo set to 0x2 -- uncached */ + + init_icache + nop + init_dcache + nop + + cachePr4450ICReset + nop + + cachePr4450DCReset + nop + + /* read ConfigPR into t0 */ + mfc0 t0, CP0_CONFIG, 7 + HAZARD_CP0 + + /* enable the TLB */ + or t0, (1<<19) + + /* disable the ICACHE: at least 10x slower */ + /* or t0, (1<<26) */ + + /* disable the DCACHE; CONFIG_CPU_HAS_LLSC should not be set */ + /* or t0, (1<<27) */ + + and t0, CO_CONFIGPR_VALID + + /* enable TLB. */ + mtc0 t0, CP0_CONFIG, 7 + HAZARD_CP0 +cache_end: + /* Setup CMEM_0 to MMIO address space, 2MB */ + lui t0, 0x1BE0 + addi t0, t0, 0x3 + mtc0 $8, $22, 4 + nop + + /* Setup CMEM_1, 128MB */ + lui t0, 0x1000 + addi t0, t0, 0xf + mtc0 $8, $22, 5 + nop + + + /* Setup CMEM_2, 32MB */ + lui t0, 0x1C00 + addi t0, t0, 0xb + mtc0 $8, $22, 6 + nop + + /* Setup CMEM_3, 0MB */ + lui t0, 0x0 + addi t0, t0, 0x0 + mtc0 $8, $22, 7 + nop + + /* Enable cache */ + mfc0 t0, CP0_CONFIG + HAZARD_CP0 + and t0, t0, 0xFFFFFFF8 + or t0, t0, 3 + mtc0 t0, CP0_CONFIG + HAZARD_CP0 + .set pop + .endm + + .macro init_icache + .set push + .set noreorder + + /* Get Cache Configuration */ + mfc0 t3, CP0_CONFIG, 1 + HAZARD_CP0 + + /* get cache Line size */ + + srl t1, t3, 19 /* C0_CONFIGPR_IL_SHIFT */ + andi t1, t1, 0x7 /* C0_CONFIGPR_IL_MASK */ + beq t1, zero, pr4450_instr_cache_invalidated /* if zero instruction cache is absent */ + nop + addiu t0, t1, 1 + ori t1, zero, 1 + sllv t1, t1, t0 + + /* get max cache Index */ + srl t2, t3, 22 /* C0_CONFIGPR_IS_SHIFT */ + andi t2, t2, 0x7 /* C0_CONFIGPR_IS_MASK */ + addiu t0, t2, 6 + ori t2, zero, 1 + sllv t2, t2, t0 + + /* get max cache way */ + srl t3, t3, 16 /* C0_CONFIGPR_IA_SHIFT */ + andi t3, t3, 0x7 /* C0_CONFIGPR_IA_MASK */ + addiu t3, t3, 1 + + /* total no of cache lines */ + multu t2, t3 /* max index * max way */ + mflo t2 + addiu t2, t2, -1 + + move t0, zero +pr4450_next_instruction_cache_set: + cache Index_Invalidate_I, 0(t0) + addu t0, t0, t1 /* add bytes in a line */ + bne t2, zero, pr4450_next_instruction_cache_set + addiu t2, t2, -1 /* reduce no of lines to invalidate by one */ +pr4450_instr_cache_invalidated: + .set pop + .endm + + .macro init_dcache + .set push + .set noreorder + move t1, zero + + /* Store Tag Information */ + mtc0 zero, CP0_TAGLO, 0 + HAZARD_CP0 + + mtc0 zero, CP0_TAGHI, 0 + HAZARD_CP0 + + /* Cache size is 16384 = 512 lines x 32 bytes per line */ + or t2, zero, (128*4)-1 /* 512 lines */ + /* Invalidate all lines */ +2: + cache Index_Store_Tag_D, 0(t1) + addiu t2, t2, -1 + bne t2, zero, 2b + addiu t1, t1, 32 /* 32 bytes in a line */ + .set pop + .endm + + .macro cachePr4450ICReset + .set push + .set noreorder + + /* Save CP0 status reg on entry; */ + /* disable interrupts during cache reset */ + mfc0 t0, CP0_STATUS /* T0 = interrupt status on entry */ + HAZARD_CP0 + + mtc0 zero, CP0_STATUS /* disable CPU interrupts */ + HAZARD_CP0 + + or t1, zero, zero /* T1 = starting cache index (0) */ + ori t2, zero, (256 - 1) /* T2 = inst cache set cnt - 1 */ + + icache_invd_loop: + /* 9 == register t1 */ + .word (CACHE_OPC | (9 << 21) | (Index_Invalidate_I << 16) | \ + (0 * ICACHE_SET_SIZE)) /* invalidate inst cache WAY0 */ + .word (CACHE_OPC | (9 << 21) | (Index_Invalidate_I << 16) | \ + (1 * ICACHE_SET_SIZE)) /* invalidate inst cache WAY1 */ + + addiu t1, t1, ICACHE_LINE_SIZE /* T1 = next cache line index */ + bne t2, zero, icache_invd_loop /* T2 = 0 if all sets invalidated */ + addiu t2, t2, -1 /* decrement T2 set cnt (delay slot) */ + + /* Initialize the latches in the instruction cache tag */ + /* that drive the way selection tri-state bus drivers, by doing a */ + /* dummy load while the instruction cache is still disabled. */ + /* TODO: Is this needed ? */ + la t1, KSEG0 /* T1 = cached memory base address */ + lw zero, 0x0000(t1) /* (dummy read of first memory word) */ + + mtc0 t0, CP0_STATUS /* restore interrupt status on entry */ + HAZARD_CP0 + .set pop + .endm + + .macro cachePr4450DCReset + .set push + .set noreorder + mfc0 t0, CP0_STATUS /* T0 = interrupt status on entry */ + HAZARD_CP0 + mtc0 zero, CP0_STATUS /* disable CPU interrupts */ + HAZARD_CP0 + + /* Writeback/invalidate entire data cache sets/ways/lines */ + or t1, zero, zero /* T1 = starting cache index (0) */ + ori t2, zero, (DCACHE_SET_COUNT - 1) /* T2 = data cache set cnt - 1 */ + + dcache_wbinvd_loop: + /* 9 == register t1 */ + .word (CACHE_OPC | (9 << 21) | (Index_Writeback_Inv_D << 16) | \ + (0 * DCACHE_SET_SIZE)) /* writeback/invalidate WAY0 */ + .word (CACHE_OPC | (9 << 21) | (Index_Writeback_Inv_D << 16) | \ + (1 * DCACHE_SET_SIZE)) /* writeback/invalidate WAY1 */ + .word (CACHE_OPC | (9 << 21) | (Index_Writeback_Inv_D << 16) | \ + (2 * DCACHE_SET_SIZE)) /* writeback/invalidate WAY2 */ + .word (CACHE_OPC | (9 << 21) | (Index_Writeback_Inv_D << 16) | \ + (3 * DCACHE_SET_SIZE)) /* writeback/invalidate WAY3 */ + + addiu t1, t1, DCACHE_LINE_SIZE /* T1 = next data cache line index */ + bne t2, zero, dcache_wbinvd_loop /* T2 = 0 when wbinvd entire cache */ + addiu t2, t2, -1 /* decrement T2 set cnt (delay slot) */ + + /* Initialize the latches in the data cache tag that drive the way + selection tri-state bus drivers, by doing a dummy load while the + data cache is still in the disabled mode. TODO: Is this needed ? */ + la t1, KSEG0 /* T1 = cached memory base address */ + lw zero, 0x0000(t1) /* (dummy read of first memory word) */ + + mtc0 t0, CP0_STATUS /* restore interrupt status on entry */ + HAZARD_CP0 + .set pop + .endm + +#endif /* __ASM_MACH_KERNEL_ENTRY_INIT_H */ diff --git a/include/asm-mips/mach-pnx8550/nand.h b/include/asm-mips/mach-pnx8550/nand.h new file mode 100644 index 000000000000..aefbc514ab09 --- /dev/null +++ b/include/asm-mips/mach-pnx8550/nand.h @@ -0,0 +1,121 @@ +#ifndef __PNX8550_NAND_H +#define __PNX8550_NAND_H + +#define PNX8550_NAND_BASE_ADDR 0x10000000 +#define PNX8550_PCIXIO_BASE 0xBBE40000 + +#define PNX8550_DMA_EXT_ADDR *(volatile unsigned long *)(PNX8550_PCIXIO_BASE + 0x800) +#define PNX8550_DMA_INT_ADDR *(volatile unsigned long *)(PNX8550_PCIXIO_BASE + 0x804) +#define PNX8550_DMA_TRANS_SIZE *(volatile unsigned long *)(PNX8550_PCIXIO_BASE + 0x808) +#define PNX8550_DMA_CTRL *(volatile unsigned long *)(PNX8550_PCIXIO_BASE + 0x80c) +#define PNX8550_XIO_SEL0 *(volatile unsigned long *)(PNX8550_PCIXIO_BASE + 0x814) +#define PNX8550_GPXIO_ADDR *(volatile unsigned long *)(PNX8550_PCIXIO_BASE + 0x820) +#define PNX8550_GPXIO_WR *(volatile unsigned long *)(PNX8550_PCIXIO_BASE + 0x824) +#define PNX8550_GPXIO_RD *(volatile unsigned long *)(PNX8550_PCIXIO_BASE + 0x828) +#define PNX8550_GPXIO_CTRL *(volatile unsigned long *)(PNX8550_PCIXIO_BASE + 0x82C) +#define PNX8550_XIO_FLASH_CTRL *(volatile unsigned long *)(PNX8550_PCIXIO_BASE + 0x830) +#define PNX8550_GPXIO_INT_STATUS *(volatile unsigned long *)(PNX8550_PCIXIO_BASE + 0xfb0) +#define PNX8550_GPXIO_INT_ENABLE *(volatile unsigned long *)(PNX8550_PCIXIO_BASE + 0xfb4) +#define PNX8550_GPXIO_INT_CLEAR *(volatile unsigned long *)(PNX8550_PCIXIO_BASE + 0xfb8) +#define PNX8550_DMA_INT_STATUS *(volatile unsigned long *)(PNX8550_PCIXIO_BASE + 0xfd0) +#define PNX8550_DMA_INT_ENABLE *(volatile unsigned long *)(PNX8550_PCIXIO_BASE + 0xfd4) +#define PNX8550_DMA_INT_CLEAR *(volatile unsigned long *)(PNX8550_PCIXIO_BASE + 0xfd8) + +#define PNX8550_XIO_SEL0_EN_16BIT 0x00800000 +#define PNX8550_XIO_SEL0_USE_ACK 0x00400000 +#define PNX8550_XIO_SEL0_REN_HIGH 0x00100000 +#define PNX8550_XIO_SEL0_REN_LOW 0x00040000 +#define PNX8550_XIO_SEL0_WEN_HIGH 0x00010000 +#define PNX8550_XIO_SEL0_WEN_LOW 0x00004000 +#define PNX8550_XIO_SEL0_WAIT 0x00000200 +#define PNX8550_XIO_SEL0_OFFSET 0x00000020 +#define PNX8550_XIO_SEL0_TYPE_68360 0x00000000 +#define PNX8550_XIO_SEL0_TYPE_NOR 0x00000008 +#define PNX8550_XIO_SEL0_TYPE_NAND 0x00000010 +#define PNX8550_XIO_SEL0_TYPE_IDE 0x00000018 +#define PNX8550_XIO_SEL0_SIZE_8MB 0x00000000 +#define PNX8550_XIO_SEL0_SIZE_16MB 0x00000002 +#define PNX8550_XIO_SEL0_SIZE_32MB 0x00000004 +#define PNX8550_XIO_SEL0_SIZE_64MB 0x00000006 +#define PNX8550_XIO_SEL0_ENAB 0x00000001 + +#define PNX8550_SEL0_DEFAULT ((PNX8550_XIO_SEL0_EN_16BIT) | \ + (PNX8550_XIO_SEL0_REN_HIGH*0)| \ + (PNX8550_XIO_SEL0_REN_LOW*2) | \ + (PNX8550_XIO_SEL0_WEN_HIGH*0)| \ + (PNX8550_XIO_SEL0_WEN_LOW*2) | \ + (PNX8550_XIO_SEL0_WAIT*4) | \ + (PNX8550_XIO_SEL0_OFFSET*0) | \ + (PNX8550_XIO_SEL0_TYPE_NAND) | \ + (PNX8550_XIO_SEL0_SIZE_32MB) | \ + (PNX8550_XIO_SEL0_ENAB)) + +#define PNX8550_GPXIO_PENDING 0x00000200 +#define PNX8550_GPXIO_DONE 0x00000100 +#define PNX8550_GPXIO_CLR_DONE 0x00000080 +#define PNX8550_GPXIO_INIT 0x00000040 +#define PNX8550_GPXIO_READ_CMD 0x00000010 +#define PNX8550_GPXIO_BEN 0x0000000F + +#define PNX8550_XIO_FLASH_64MB 0x00200000 +#define PNX8550_XIO_FLASH_INC_DATA 0x00100000 +#define PNX8550_XIO_FLASH_CMD_PH 0x000C0000 +#define PNX8550_XIO_FLASH_CMD_PH2 0x00080000 +#define PNX8550_XIO_FLASH_CMD_PH1 0x00040000 +#define PNX8550_XIO_FLASH_CMD_PH0 0x00000000 +#define PNX8550_XIO_FLASH_ADR_PH 0x00030000 +#define PNX8550_XIO_FLASH_ADR_PH3 0x00030000 +#define PNX8550_XIO_FLASH_ADR_PH2 0x00020000 +#define PNX8550_XIO_FLASH_ADR_PH1 0x00010000 +#define PNX8550_XIO_FLASH_ADR_PH0 0x00000000 +#define PNX8550_XIO_FLASH_CMD_B(x) ((x<<8) & 0x0000FF00) +#define PNX8550_XIO_FLASH_CMD_A(x) (x & 0x000000FF) + +#define PNX8550_XIO_INT_ACK 0x00004000 +#define PNX8550_XIO_INT_COMPL 0x00002000 +#define PNX8550_XIO_INT_NONSUP 0x00000200 +#define PNX8550_XIO_INT_ABORT 0x00000004 + +#define PNX8550_DMA_CTRL_SINGLE_DATA 0x00000400 +#define PNX8550_DMA_CTRL_SND2XIO 0x00000200 +#define PNX8550_DMA_CTRL_FIX_ADDR 0x00000100 +#define PNX8550_DMA_CTRL_BURST_8 0x00000000 +#define PNX8550_DMA_CTRL_BURST_16 0x00000020 +#define PNX8550_DMA_CTRL_BURST_32 0x00000040 +#define PNX8550_DMA_CTRL_BURST_64 0x00000060 +#define PNX8550_DMA_CTRL_BURST_128 0x00000080 +#define PNX8550_DMA_CTRL_BURST_256 0x000000A0 +#define PNX8550_DMA_CTRL_BURST_512 0x000000C0 +#define PNX8550_DMA_CTRL_BURST_NORES 0x000000E0 +#define PNX8550_DMA_CTRL_INIT_DMA 0x00000010 +#define PNX8550_DMA_CTRL_CMD_TYPE 0x0000000F + +/* see PCI system arch, page 100 for the full list: */ +#define PNX8550_DMA_CTRL_PCI_CMD_READ 0x00000006 +#define PNX8550_DMA_CTRL_PCI_CMD_WRITE 0x00000007 + +#define PNX8550_DMA_INT_STAT_ACK_DONE (1<<14) +#define PNX8550_DMA_INT_STAT_DMA_DONE (1<<12) +#define PNX8550_DMA_INT_STAT_DMA_ERR (1<<9) +#define PNX8550_DMA_INT_STAT_PERR5 (1<<5) +#define PNX8550_DMA_INT_STAT_PERR4 (1<<4) +#define PNX8550_DMA_INT_STAT_M_ABORT (1<<2) +#define PNX8550_DMA_INT_STAT_T_ABORT (1<<1) + +#define PNX8550_DMA_INT_EN_ACK_DONE (1<<14) +#define PNX8550_DMA_INT_EN_DMA_DONE (1<<12) +#define PNX8550_DMA_INT_EN_DMA_ERR (1<<9) +#define PNX8550_DMA_INT_EN_PERR5 (1<<5) +#define PNX8550_DMA_INT_EN_PERR4 (1<<4) +#define PNX8550_DMA_INT_EN_M_ABORT (1<<2) +#define PNX8550_DMA_INT_EN_T_ABORT (1<<1) + +#define PNX8550_DMA_INT_CLR_ACK_DONE (1<<14) +#define PNX8550_DMA_INT_CLR_DMA_DONE (1<<12) +#define PNX8550_DMA_INT_CLR_DMA_ERR (1<<9) +#define PNX8550_DMA_INT_CLR_PERR5 (1<<5) +#define PNX8550_DMA_INT_CLR_PERR4 (1<<4) +#define PNX8550_DMA_INT_CLR_M_ABORT (1<<2) +#define PNX8550_DMA_INT_CLR_T_ABORT (1<<1) + +#endif diff --git a/include/asm-mips/mach-pnx8550/pci.h b/include/asm-mips/mach-pnx8550/pci.h new file mode 100644 index 000000000000..b921508d701b --- /dev/null +++ b/include/asm-mips/mach-pnx8550/pci.h @@ -0,0 +1,185 @@ +/* + * + * BRIEF MODULE DESCRIPTION + * PCI specific definitions + * + * Author: source@mvista.com + * + * This program is free software; you can distribute it and/or modify it + * under the terms of the GNU General Public License (Version 2) as + * published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License + * for more details. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. + */ + +#ifndef __PNX8550_PCI_H +#define __PNX8550_PCI_H + +#include <linux/types.h> +#include <linux/pci.h> +#include <linux/kernel.h> +#include <linux/init.h> + +#define PCI_ACCESS_READ 0 +#define PCI_ACCESS_WRITE 1 + +#define PCI_CMD_IOR 0x20 +#define PCI_CMD_IOW 0x30 +#define PCI_CMD_CONFIG_READ 0xa0 +#define PCI_CMD_CONFIG_WRITE 0xb0 + +#define PCI_IO_TIMEOUT 1000 +#define PCI_IO_RETRY 5 +/* Timeout for IO and CFG accesses. + This is in 1/1024 th of a jiffie(=10ms) + i.e. approx 10us */ +#define PCI_IO_JIFFIES_TIMEOUT 40 +#define PCI_IO_JIFFIES_SHIFT 10 + +#define PCI_BYTE_ENABLE_MASK 0x0000000f +#define PCI_CFG_BUS_SHIFT 16 +#define PCI_CFG_FUNC_SHIFT 8 +#define PCI_CFG_REG_SHIFT 2 + +#define PCI_BASE 0x1be00000 +#define PCI_SETUP 0x00040010 +#define PCI_DIS_REQGNT (1<<30) +#define PCI_DIS_REQGNTA (1<<29) +#define PCI_DIS_REQGNTB (1<<28) +#define PCI_D2_SUPPORT (1<<27) +#define PCI_D1_SUPPORT (1<<26) +#define PCI_EN_TA (1<<24) +#define PCI_EN_PCI2MMI (1<<23) +#define PCI_EN_XIO (1<<22) +#define PCI_BASE18_PREF (1<<21) +#define SIZE_16M 0x3 +#define SIZE_32M 0x4 +#define SIZE_64M 0x5 +#define SIZE_128M 0x6 +#define PCI_SETUP_BASE18_SIZE(X) (X<<18) +#define PCI_SETUP_BASE18_EN (1<<17) +#define PCI_SETUP_BASE14_PREF (1<<16) +#define PCI_SETUP_BASE14_SIZE(X) (X<<12) +#define PCI_SETUP_BASE14_EN (1<<11) +#define PCI_SETUP_BASE10_PREF (1<<10) +#define PCI_SETUP_BASE10_SIZE(X) (X<<7) +#define PCI_SETUP_CFGMANAGE_EN (1<<1) +#define PCI_SETUP_PCIARB_EN (1<<0) + +#define PCI_CTRL 0x040014 +#define PCI_SWPB_DCS_PCI (1<<16) +#define PCI_SWPB_PCI_PCI (1<<15) +#define PCI_SWPB_PCI_DCS (1<<14) +#define PCI_REG_WR_POST (1<<13) +#define PCI_XIO_WR_POST (1<<12) +#define PCI_PCI2_WR_POST (1<<13) +#define PCI_PCI1_WR_POST (1<<12) +#define PCI_SERR_SEEN (1<<11) +#define PCI_B10_SPEC_RD (1<<6) +#define PCI_B14_SPEC_RD (1<<5) +#define PCI_B18_SPEC_RD (1<<4) +#define PCI_B10_NOSUBWORD (1<<3) +#define PCI_B14_NOSUBWORD (1<<2) +#define PCI_B18_NOSUBWORD (1<<1) +#define PCI_RETRY_TMREN (1<<0) + +#define PCI_BASE1_LO 0x040018 +#define PCI_BASE1_HI 0x04001C +#define PCI_BASE2_LO 0x040020 +#define PCI_BASE2_HI 0x040024 +#define PCI_RDLIFETIM 0x040028 +#define PCI_GPPM_ADDR 0x04002C +#define PCI_GPPM_WDAT 0x040030 +#define PCI_GPPM_RDAT 0x040034 +#define PCI_GPPM_CTRL 0x040038 +#define GPPM_DONE (1<<10) +#define INIT_PCI_CYCLE (1<<9) +#define GPPM_CMD(X) (((X)&0xf)<<4) +#define GPPM_BYTEEN(X) ((X)&0xf) +#define PCI_UNLOCKREG 0x04003C +#define UNLOCK_SSID(X) (((X)&0xff)<<8) +#define UNLOCK_SETUP(X) (((X)&0xff)<<0) +#define UNLOCK_MAGIC 0xCA +#define PCI_DEV_VEND_ID 0x040040 +#define DEVICE_ID(X) (((X)>>16)&0xffff) +#define VENDOR_ID(X) (((X)&0xffff)) +#define PCI_CFG_CMDSTAT 0x040044 +#define PCI_CFG_STATUS(X) (((X)>>16)&0xffff) +#define PCI_CFG_COMMAND(X) ((X)&0xffff) +#define PCI_CLASS_REV 0x040048 +#define PCI_CLASSCODE(X) (((X)>>8)&0xffffff) +#define PCI_REVID(X) ((X)&0xff) +#define PCI_LAT_TMR 0x04004c +#define PCI_BASE10 0x040050 +#define PCI_BASE14 0x040054 +#define PCI_BASE18 0x040058 +#define PCI_SUBSYS_ID 0x04006c +#define PCI_CAP_PTR 0x040074 +#define PCI_CFG_MISC 0x04007c +#define PCI_PMC 0x040080 +#define PCI_PWR_STATE 0x040084 +#define PCI_IO 0x040088 +#define PCI_SLVTUNING 0x04008C +#define PCI_DMATUNING 0x040090 +#define PCI_DMAEADDR 0x040800 +#define PCI_DMAIADDR 0x040804 +#define PCI_DMALEN 0x040808 +#define PCI_DMACTRL 0x04080C +#define PCI_XIOCTRL 0x040810 +#define PCI_SEL0PROF 0x040814 +#define PCI_SEL1PROF 0x040818 +#define PCI_SEL2PROF 0x04081C +#define PCI_GPXIOADDR 0x040820 +#define PCI_NANDCTRLS 0x400830 +#define PCI_SEL3PROF 0x040834 +#define PCI_SEL4PROF 0x040838 +#define PCI_GPXIO_STAT 0x040FB0 +#define PCI_GPXIO_IMASK 0x040FB4 +#define PCI_GPXIO_ICLR 0x040FB8 +#define PCI_GPXIO_ISET 0x040FBC +#define PCI_GPPM_STATUS 0x040FC0 +#define GPPM_DONE (1<<10) +#define GPPM_ERR (1<<9) +#define GPPM_MPAR_ERR (1<<8) +#define GPPM_PAR_ERR (1<<7) +#define GPPM_R_MABORT (1<<2) +#define GPPM_R_TABORT (1<<1) +#define PCI_GPPM_IMASK 0x040FC4 +#define PCI_GPPM_ICLR 0x040FC8 +#define PCI_GPPM_ISET 0x040FCC +#define PCI_DMA_STATUS 0x040FD0 +#define PCI_DMA_IMASK 0x040FD4 +#define PCI_DMA_ICLR 0x040FD8 +#define PCI_DMA_ISET 0x040FDC +#define PCI_ISTATUS 0x040FE0 +#define PCI_IMASK 0x040FE4 +#define PCI_ICLR 0x040FE8 +#define PCI_ISET 0x040FEC +#define PCI_MOD_ID 0x040FFC + +/* + * PCI configuration cycle AD bus definition + */ +/* Type 0 */ +#define PCI_CFG_TYPE0_REG_SHF 0 +#define PCI_CFG_TYPE0_FUNC_SHF 8 + +/* Type 1 */ +#define PCI_CFG_TYPE1_REG_SHF 0 +#define PCI_CFG_TYPE1_FUNC_SHF 8 +#define PCI_CFG_TYPE1_DEV_SHF 11 +#define PCI_CFG_TYPE1_BUS_SHF 16 + +/* + * Ethernet device DP83816 definition + */ +#define DP83816_IRQ_ETHER 66 + +#endif diff --git a/include/asm-mips/mach-pnx8550/uart.h b/include/asm-mips/mach-pnx8550/uart.h new file mode 100644 index 000000000000..e32b9a23d70e --- /dev/null +++ b/include/asm-mips/mach-pnx8550/uart.h @@ -0,0 +1,16 @@ +#ifndef __IP3106_UART_H +#define __IP3106_UART_H + +#include <int.h> + +/* early macros for kgdb use. fixme: clean this up */ + +#define UART_BASE 0xbbe4a000 /* PNX8550 */ + +#define PNX8550_UART_PORT0 (UART_BASE) +#define PNX8550_UART_PORT1 (UART_BASE + 0x1000) + +#define PNX8550_UART_INT(x) (PNX8550_INT_GIC_MIN+19+x) +#define IRQ_TO_UART(x) (x-PNX8550_INT_GIC_MIN-19) + +#endif diff --git a/include/asm-mips/mach-pnx8550/usb.h b/include/asm-mips/mach-pnx8550/usb.h new file mode 100644 index 000000000000..483b7fc65d41 --- /dev/null +++ b/include/asm-mips/mach-pnx8550/usb.h @@ -0,0 +1,32 @@ +/* + * + * BRIEF MODULE DESCRIPTION + * USB specific definitions + * + * Author: source@mvista.com + * + * This program is free software; you can distribute it and/or modify it + * under the terms of the GNU General Public License (Version 2) as + * published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License + * for more details. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. + */ + +#ifndef __PNX8550_USB_H +#define __PNX8550_USB_H + +/* + * USB Host controller + */ + +#define PNX8550_USB_OHCI_OP_BASE 0x1be48000 +#define PNX8550_USB_OHCI_OP_LEN 0x1000 + +#endif diff --git a/include/asm-mips/mach-qemu/timex.h b/include/asm-mips/mach-qemu/timex.h new file mode 100644 index 000000000000..cd543693fb0a --- /dev/null +++ b/include/asm-mips/mach-qemu/timex.h @@ -0,0 +1,16 @@ +/* + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * + * Copyright (C) 2005 Daniel Jacobowitz + */ +#ifndef __ASM_MACH_QEMU_TIMEX_H +#define __ASM_MACH_QEMU_TIMEX_H + +/* + * We use a simulated i8254 PIC... + */ +#define CLOCK_TICK_RATE 1193182 + +#endif /* __ASM_MACH_QEMU_TIMEX_H */ diff --git a/include/asm-mips/mach-rm200/cpu-feature-overrides.h b/include/asm-mips/mach-rm200/cpu-feature-overrides.h index f48736032b2a..79f9b064c864 100644 --- a/include/asm-mips/mach-rm200/cpu-feature-overrides.h +++ b/include/asm-mips/mach-rm200/cpu-feature-overrides.h @@ -14,7 +14,7 @@ #define cpu_has_tlb 1 #define cpu_has_4kex 1 -#define cpu_has_4ktlb 1 +#define cpu_has_4kcache 1 #define cpu_has_fpu 1 #define cpu_has_32fpr 1 #define cpu_has_counter 1 @@ -31,6 +31,7 @@ #define cpu_has_vtag_icache 0 #define cpu_has_dc_aliases (PAGE_SIZE < 0x4000) #define cpu_has_ic_fills_f_dc 0 +#define cpu_has_dsp 0 #define cpu_has_nofpuex 0 #define cpu_has_64bits 1 diff --git a/include/asm-mips/mach-sibyte/cpu-feature-overrides.h b/include/asm-mips/mach-sibyte/cpu-feature-overrides.h index a3a2cc6014b2..193a666cd131 100644 --- a/include/asm-mips/mach-sibyte/cpu-feature-overrides.h +++ b/include/asm-mips/mach-sibyte/cpu-feature-overrides.h @@ -25,6 +25,7 @@ #define cpu_has_vtag_icache 1 #define cpu_has_dc_aliases 0 #define cpu_has_ic_fills_f_dc 0 +#define cpu_has_dsp 0 #define cpu_icache_snoops_remote_store 0 #define cpu_has_nofpuex 0 diff --git a/include/asm-mips/mach-sim/cpu-feature-overrides.h b/include/asm-mips/mach-sim/cpu-feature-overrides.h new file mode 100644 index 000000000000..cadbe8eda79c --- /dev/null +++ b/include/asm-mips/mach-sim/cpu-feature-overrides.h @@ -0,0 +1,66 @@ +/* + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * + * Copyright (C) 2003, 2004 Chris Dearman + */ +#ifndef __ASM_MACH_SIM_CPU_FEATURE_OVERRIDES_H +#define __ASM_MACH_SIM_CPU_FEATURE_OVERRIDES_H + +#include <linux/config.h> + +/* + * CPU feature overrides for MIPS boards + */ +#ifdef CONFIG_CPU_MIPS32 +#define cpu_has_tlb 1 +#define cpu_has_4kex 1 +#define cpu_has_4kcache 1 +#define cpu_has_fpu 0 +/* #define cpu_has_32fpr ? */ +#define cpu_has_counter 1 +/* #define cpu_has_watch ? */ +#define cpu_has_divec 1 +#define cpu_has_vce 0 +/* #define cpu_has_cache_cdex_p ? */ +/* #define cpu_has_cache_cdex_s ? */ +/* #define cpu_has_prefetch ? */ +#define cpu_has_mcheck 1 +/* #define cpu_has_ejtag ? */ +#define cpu_has_llsc 1 +/* #define cpu_has_vtag_icache ? */ +/* #define cpu_has_dc_aliases ? */ +/* #define cpu_has_ic_fills_f_dc ? */ +#define cpu_has_nofpuex 0 +/* #define cpu_has_64bits ? */ +/* #define cpu_has_64bit_zero_reg ? */ +/* #define cpu_has_subset_pcaches ? */ +#endif + +#ifdef CONFIG_CPU_MIPS64 +#define cpu_has_tlb 1 +#define cpu_has_4kex 1 +#define cpu_has_4kcache 1 +/* #define cpu_has_fpu ? */ +/* #define cpu_has_32fpr ? */ +#define cpu_has_counter 1 +/* #define cpu_has_watch ? */ +#define cpu_has_divec 1 +#define cpu_has_vce 0 +/* #define cpu_has_cache_cdex_p ? */ +/* #define cpu_has_cache_cdex_s ? */ +/* #define cpu_has_prefetch ? */ +#define cpu_has_mcheck 1 +/* #define cpu_has_ejtag ? */ +#define cpu_has_llsc 1 +/* #define cpu_has_vtag_icache ? */ +/* #define cpu_has_dc_aliases ? */ +/* #define cpu_has_ic_fills_f_dc ? */ +#define cpu_has_nofpuex 0 +/* #define cpu_has_64bits ? */ +/* #define cpu_has_64bit_zero_reg ? */ +/* #define cpu_has_subset_pcaches ? */ +#endif + +#endif /* __ASM_MACH_MIPS_CPU_FEATURE_OVERRIDES_H */ diff --git a/include/asm-mips/mach-yosemite/cpu-feature-overrides.h b/include/asm-mips/mach-yosemite/cpu-feature-overrides.h index 58603e3daca6..463d051f4683 100644 --- a/include/asm-mips/mach-yosemite/cpu-feature-overrides.h +++ b/include/asm-mips/mach-yosemite/cpu-feature-overrides.h @@ -25,6 +25,7 @@ #define cpu_has_vtag_icache 0 #define cpu_has_dc_aliases 0 #define cpu_has_ic_fills_f_dc 0 +#define cpu_has_dsp 0 #define cpu_icache_snoops_remote_store 0 #define cpu_has_nofpuex 0 @@ -36,10 +37,4 @@ #define cpu_icache_line_size() 32 #define cpu_scache_line_size() 32 -/* - * On the RM9000 we need to ensure that I-cache lines being fetches only - * contain valid instructions are funny things will happen. - */ -#define PLAT_TRAMPOLINE_STUFF_LINE 32UL - #endif /* __ASM_MACH_YOSEMITE_CPU_FEATURE_OVERRIDES_H */ diff --git a/include/asm-mips/mc146818-time.h b/include/asm-mips/mc146818-time.h index a2c2d2c24303..47214861093b 100644 --- a/include/asm-mips/mc146818-time.h +++ b/include/asm-mips/mc146818-time.h @@ -33,7 +33,9 @@ static inline int mc146818_set_rtc_mmss(unsigned long nowtime) int real_seconds, real_minutes, cmos_minutes; unsigned char save_control, save_freq_select; int retval = 0; + unsigned long flags; + spin_lock_irqsave(&rtc_lock, flags); save_control = CMOS_READ(RTC_CONTROL); /* tell the clock it's being set */ CMOS_WRITE((save_control|RTC_SET), RTC_CONTROL); @@ -79,14 +81,30 @@ static inline int mc146818_set_rtc_mmss(unsigned long nowtime) */ CMOS_WRITE(save_control, RTC_CONTROL); CMOS_WRITE(save_freq_select, RTC_FREQ_SELECT); + spin_unlock_irqrestore(&rtc_lock, flags); return retval; } +/* + * Returns true if a clock update is in progress + */ +static inline unsigned char rtc_is_updating(void) +{ + unsigned char uip; + unsigned long flags; + + spin_lock_irqsave(&rtc_lock, flags); + uip = (CMOS_READ(RTC_FREQ_SELECT) & RTC_UIP); + spin_unlock_irqrestore(&rtc_lock, flags); + return uip; +} + static inline unsigned long mc146818_get_cmos_time(void) { unsigned int year, mon, day, hour, min, sec; int i; + unsigned long flags; /* * The Linux interpretation of the CMOS clock register contents: @@ -97,12 +115,13 @@ static inline unsigned long mc146818_get_cmos_time(void) /* read RTC exactly on falling edge of update flag */ for (i = 0 ; i < 1000000 ; i++) /* may take up to 1 second... */ - if (CMOS_READ(RTC_FREQ_SELECT) & RTC_UIP) + if (rtc_is_updating()) break; for (i = 0 ; i < 1000000 ; i++) /* must try at least 2.228 ms */ - if (!(CMOS_READ(RTC_FREQ_SELECT) & RTC_UIP)) + if (!rtc_is_updating()) break; + spin_lock_irqsave(&rtc_lock, flags); do { /* Isn't this overkill ? UIP above should guarantee consistency */ sec = CMOS_READ(RTC_SECONDS); min = CMOS_READ(RTC_MINUTES); @@ -120,6 +139,7 @@ static inline unsigned long mc146818_get_cmos_time(void) BCD_TO_BIN(mon); BCD_TO_BIN(year); } + spin_unlock_irqrestore(&rtc_lock, flags); year = mc146818_decode_year(year); return mktime(year, mon, day, hour, min, sec); diff --git a/include/asm-mips/mips-boards/generic.h b/include/asm-mips/mips-boards/generic.h index 65d1d16eab16..25b6ffc26623 100644 --- a/include/asm-mips/mips-boards/generic.h +++ b/include/asm-mips/mips-boards/generic.h @@ -66,6 +66,7 @@ #define MIPS_REVISION_CORID_CORE_EMUL 6 #define MIPS_REVISION_CORID_CORE_FPGA2 7 #define MIPS_REVISION_CORID_CORE_FPGAR2 8 +#define MIPS_REVISION_CORID_CORE_FPGA3 9 /**** Artificial corid defines ****/ /* @@ -79,4 +80,10 @@ extern unsigned int mips_revision_corid; +#ifdef CONFIG_PCI +extern void mips_pcibios_init(void); +#else +#define mips_pcibios_init() do { } while (0) +#endif + #endif /* __ASM_MIPS_BOARDS_GENERIC_H */ diff --git a/include/asm-mips/mips-boards/maltaint.h b/include/asm-mips/mips-boards/maltaint.h index 376181882e81..da6cc2fbbc78 100644 --- a/include/asm-mips/mips-boards/maltaint.h +++ b/include/asm-mips/mips-boards/maltaint.h @@ -25,9 +25,63 @@ #ifndef _MIPS_MALTAINT_H #define _MIPS_MALTAINT_H -/* Number of IRQ supported on hw interrupt 0. */ -#define MALTAINT_END 16 +/* + * Interrupts 0..15 are used for Malta ISA compatible interrupts + */ +#define MALTA_INT_BASE 0 + +/* + * Interrupts 16..23 are used for Malta CPU interrupts (nonEIC mode) + */ +#define MIPSCPU_INT_BASE 16 + +/* CPU interrupt offsets */ +#define MIPSCPU_INT_SW0 0 +#define MIPSCPU_INT_SW1 1 +#define MIPSCPU_INT_MB0 2 +#define MIPSCPU_INT_I8259A MIPSCPU_INT_MB0 +#define MIPSCPU_INT_MB1 3 +#define MIPSCPU_INT_SMI MIPSCPU_INT_MB1 +#define MIPSCPU_INT_MB2 4 +#define MIPSCPU_INT_MB3 5 +#define MIPSCPU_INT_COREHI MIPSCPU_INT_MB3 +#define MIPSCPU_INT_MB4 6 +#define MIPSCPU_INT_CORELO MIPSCPU_INT_MB4 +#define MIPSCPU_INT_CPUCTR 7 + +/* + * Interrupts 64..127 are used for Soc-it Classic interrupts + */ +#define MSC01C_INT_BASE 64 + +/* SOC-it Classic interrupt offsets */ +#define MSC01C_INT_TMR 0 +#define MSC01C_INT_PCI 1 + +/* + * Interrupts 64..127 are used for Soc-it EIC interrupts + */ +#define MSC01E_INT_BASE 64 + +/* SOC-it EIC interrupt offsets */ +#define MSC01E_INT_SW0 1 +#define MSC01E_INT_SW1 2 +#define MSC01E_INT_MB0 3 +#define MSC01E_INT_I8259A MSC01E_INT_MB0 +#define MSC01E_INT_MB1 4 +#define MSC01E_INT_SMI MSC01E_INT_MB1 +#define MSC01E_INT_MB2 5 +#define MSC01E_INT_MB3 6 +#define MSC01E_INT_COREHI MSC01E_INT_MB3 +#define MSC01E_INT_MB4 7 +#define MSC01E_INT_CORELO MSC01E_INT_MB4 +#define MSC01E_INT_TMR 8 +#define MSC01E_INT_PCI 9 +#define MSC01E_INT_PERFCTR 10 +#define MSC01E_INT_CPUCTR 11 +#ifndef __ASSEMBLY__ extern void maltaint_init(void); +#endif #endif /* !(_MIPS_MALTAINT_H) */ diff --git a/include/asm-mips/mips-boards/msc01_pci.h b/include/asm-mips/mips-boards/msc01_pci.h index 6b2a87a38f4b..8eaefb837b9d 100644 --- a/include/asm-mips/mips-boards/msc01_pci.h +++ b/include/asm-mips/mips-boards/msc01_pci.h @@ -1,8 +1,9 @@ /* * PCI Register definitions for the MIPS System Controller. * - * Carsten Langgaard, carstenl@mips.com - * Copyright (C) 2002 MIPS Technologies, Inc. All rights reserved. + * Copyright (C) 2002, 2005 MIPS Technologies, Inc. All rights reserved. + * Authors: Carsten Langgaard <carstenl@mips.com> + * Maciej W. Rozycki <macro@mips.com> * * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive @@ -29,22 +30,22 @@ #define MSC01_PCI_CFGADDR_OFS 0x0610 #define MSC01_PCI_CFGDATA_OFS 0x0618 #define MSC01_PCI_IACK_OFS 0x0620 -#define MSC01_PCI_HEAD0_OFS 0x2000 /* DevID, VendorID */ -#define MSC01_PCI_HEAD1_OFS 0x2008 /* Status, Command */ -#define MSC01_PCI_HEAD2_OFS 0x2010 /* Class code, RevID */ -#define MSC01_PCI_HEAD3_OFS 0x2018 /* bist, header, latency */ -#define MSC01_PCI_HEAD4_OFS 0x2020 /* BAR 0 */ -#define MSC01_PCI_HEAD5_OFS 0x2028 /* BAR 1 */ -#define MSC01_PCI_HEAD6_OFS 0x2030 /* BAR 2 */ -#define MSC01_PCI_HEAD7_OFS 0x2038 /* BAR 3 */ -#define MSC01_PCI_HEAD8_OFS 0x2040 /* BAR 4 */ -#define MSC01_PCI_HEAD9_OFS 0x2048 /* BAR 5 */ -#define MSC01_PCI_HEAD10_OFS 0x2050 /* CardBus CIS Ptr */ -#define MSC01_PCI_HEAD11_OFS 0x2058 /* SubSystem ID, -VendorID */ -#define MSC01_PCI_HEAD12_OFS 0x2060 /* ROM BAR */ -#define MSC01_PCI_HEAD13_OFS 0x2068 /* Capabilities ptr */ -#define MSC01_PCI_HEAD14_OFS 0x2070 /* reserved */ -#define MSC01_PCI_HEAD15_OFS 0x2078 /* Maxl, ming, intpin, int */ +#define MSC01_PCI_HEAD0_OFS 0x2000 /* DevID, VendorID */ +#define MSC01_PCI_HEAD1_OFS 0x2008 /* Status, Command */ +#define MSC01_PCI_HEAD2_OFS 0x2010 /* Class code, RevID */ +#define MSC01_PCI_HEAD3_OFS 0x2018 /* bist, header, latency */ +#define MSC01_PCI_HEAD4_OFS 0x2020 /* BAR 0 */ +#define MSC01_PCI_HEAD5_OFS 0x2028 /* BAR 1 */ +#define MSC01_PCI_HEAD6_OFS 0x2030 /* BAR 2 */ +#define MSC01_PCI_HEAD7_OFS 0x2038 /* BAR 3 */ +#define MSC01_PCI_HEAD8_OFS 0x2040 /* BAR 4 */ +#define MSC01_PCI_HEAD9_OFS 0x2048 /* BAR 5 */ +#define MSC01_PCI_HEAD10_OFS 0x2050 /* CardBus CIS Ptr */ +#define MSC01_PCI_HEAD11_OFS 0x2058 /* SubSystem ID, -VendorID */ +#define MSC01_PCI_HEAD12_OFS 0x2060 /* ROM BAR */ +#define MSC01_PCI_HEAD13_OFS 0x2068 /* Capabilities ptr */ +#define MSC01_PCI_HEAD14_OFS 0x2070 /* reserved */ +#define MSC01_PCI_HEAD15_OFS 0x2078 /* Maxl, ming, intpin, int */ #define MSC01_PCI_BAR0_OFS 0x2220 #define MSC01_PCI_CFG_OFS 0x2380 #define MSC01_PCI_SWAP_OFS 0x2388 @@ -86,73 +87,73 @@ #define MSC01_PCI_P2SCMAPL_MAP_SHF 24 #define MSC01_PCI_P2SCMAPL_MAP_MSK 0xff000000 -#define MSC01_PCI_INTCFG_RST_SHF 10 -#define MSC01_PCI_INTCFG_RST_MSK 0x00000400 -#define MSC01_PCI_INTCFG_RST_BIT 0x00000400 -#define MSC01_PCI_INTCFG_MWE_SHF 9 -#define MSC01_PCI_INTCFG_MWE_MSK 0x00000200 -#define MSC01_PCI_INTCFG_MWE_BIT 0x00000200 -#define MSC01_PCI_INTCFG_DTO_SHF 8 -#define MSC01_PCI_INTCFG_DTO_MSK 0x00000100 -#define MSC01_PCI_INTCFG_DTO_BIT 0x00000100 -#define MSC01_PCI_INTCFG_MA_SHF 7 -#define MSC01_PCI_INTCFG_MA_MSK 0x00000080 -#define MSC01_PCI_INTCFG_MA_BIT 0x00000080 -#define MSC01_PCI_INTCFG_TA_SHF 6 -#define MSC01_PCI_INTCFG_TA_MSK 0x00000040 -#define MSC01_PCI_INTCFG_TA_BIT 0x00000040 -#define MSC01_PCI_INTCFG_RTY_SHF 5 -#define MSC01_PCI_INTCFG_RTY_MSK 0x00000020 -#define MSC01_PCI_INTCFG_RTY_BIT 0x00000020 -#define MSC01_PCI_INTCFG_MWP_SHF 4 -#define MSC01_PCI_INTCFG_MWP_MSK 0x00000010 -#define MSC01_PCI_INTCFG_MWP_BIT 0x00000010 -#define MSC01_PCI_INTCFG_MRP_SHF 3 -#define MSC01_PCI_INTCFG_MRP_MSK 0x00000008 -#define MSC01_PCI_INTCFG_MRP_BIT 0x00000008 -#define MSC01_PCI_INTCFG_SWP_SHF 2 -#define MSC01_PCI_INTCFG_SWP_MSK 0x00000004 -#define MSC01_PCI_INTCFG_SWP_BIT 0x00000004 -#define MSC01_PCI_INTCFG_SRP_SHF 1 -#define MSC01_PCI_INTCFG_SRP_MSK 0x00000002 -#define MSC01_PCI_INTCFG_SRP_BIT 0x00000002 -#define MSC01_PCI_INTCFG_SE_SHF 0 -#define MSC01_PCI_INTCFG_SE_MSK 0x00000001 -#define MSC01_PCI_INTCFG_SE_BIT 0x00000001 +#define MSC01_PCI_INTCFG_RST_SHF 10 +#define MSC01_PCI_INTCFG_RST_MSK 0x00000400 +#define MSC01_PCI_INTCFG_RST_BIT 0x00000400 +#define MSC01_PCI_INTCFG_MWE_SHF 9 +#define MSC01_PCI_INTCFG_MWE_MSK 0x00000200 +#define MSC01_PCI_INTCFG_MWE_BIT 0x00000200 +#define MSC01_PCI_INTCFG_DTO_SHF 8 +#define MSC01_PCI_INTCFG_DTO_MSK 0x00000100 +#define MSC01_PCI_INTCFG_DTO_BIT 0x00000100 +#define MSC01_PCI_INTCFG_MA_SHF 7 +#define MSC01_PCI_INTCFG_MA_MSK 0x00000080 +#define MSC01_PCI_INTCFG_MA_BIT 0x00000080 +#define MSC01_PCI_INTCFG_TA_SHF 6 +#define MSC01_PCI_INTCFG_TA_MSK 0x00000040 +#define MSC01_PCI_INTCFG_TA_BIT 0x00000040 +#define MSC01_PCI_INTCFG_RTY_SHF 5 +#define MSC01_PCI_INTCFG_RTY_MSK 0x00000020 +#define MSC01_PCI_INTCFG_RTY_BIT 0x00000020 +#define MSC01_PCI_INTCFG_MWP_SHF 4 +#define MSC01_PCI_INTCFG_MWP_MSK 0x00000010 +#define MSC01_PCI_INTCFG_MWP_BIT 0x00000010 +#define MSC01_PCI_INTCFG_MRP_SHF 3 +#define MSC01_PCI_INTCFG_MRP_MSK 0x00000008 +#define MSC01_PCI_INTCFG_MRP_BIT 0x00000008 +#define MSC01_PCI_INTCFG_SWP_SHF 2 +#define MSC01_PCI_INTCFG_SWP_MSK 0x00000004 +#define MSC01_PCI_INTCFG_SWP_BIT 0x00000004 +#define MSC01_PCI_INTCFG_SRP_SHF 1 +#define MSC01_PCI_INTCFG_SRP_MSK 0x00000002 +#define MSC01_PCI_INTCFG_SRP_BIT 0x00000002 +#define MSC01_PCI_INTCFG_SE_SHF 0 +#define MSC01_PCI_INTCFG_SE_MSK 0x00000001 +#define MSC01_PCI_INTCFG_SE_BIT 0x00000001 -#define MSC01_PCI_INTSTAT_RST_SHF 10 -#define MSC01_PCI_INTSTAT_RST_MSK 0x00000400 -#define MSC01_PCI_INTSTAT_RST_BIT 0x00000400 -#define MSC01_PCI_INTSTAT_MWE_SHF 9 -#define MSC01_PCI_INTSTAT_MWE_MSK 0x00000200 -#define MSC01_PCI_INTSTAT_MWE_BIT 0x00000200 -#define MSC01_PCI_INTSTAT_DTO_SHF 8 -#define MSC01_PCI_INTSTAT_DTO_MSK 0x00000100 -#define MSC01_PCI_INTSTAT_DTO_BIT 0x00000100 -#define MSC01_PCI_INTSTAT_MA_SHF 7 -#define MSC01_PCI_INTSTAT_MA_MSK 0x00000080 -#define MSC01_PCI_INTSTAT_MA_BIT 0x00000080 -#define MSC01_PCI_INTSTAT_TA_SHF 6 -#define MSC01_PCI_INTSTAT_TA_MSK 0x00000040 -#define MSC01_PCI_INTSTAT_TA_BIT 0x00000040 -#define MSC01_PCI_INTSTAT_RTY_SHF 5 -#define MSC01_PCI_INTSTAT_RTY_MSK 0x00000020 -#define MSC01_PCI_INTSTAT_RTY_BIT 0x00000020 -#define MSC01_PCI_INTSTAT_MWP_SHF 4 -#define MSC01_PCI_INTSTAT_MWP_MSK 0x00000010 -#define MSC01_PCI_INTSTAT_MWP_BIT 0x00000010 -#define MSC01_PCI_INTSTAT_MRP_SHF 3 -#define MSC01_PCI_INTSTAT_MRP_MSK 0x00000008 -#define MSC01_PCI_INTSTAT_MRP_BIT 0x00000008 -#define MSC01_PCI_INTSTAT_SWP_SHF 2 -#define MSC01_PCI_INTSTAT_SWP_MSK 0x00000004 -#define MSC01_PCI_INTSTAT_SWP_BIT 0x00000004 -#define MSC01_PCI_INTSTAT_SRP_SHF 1 -#define MSC01_PCI_INTSTAT_SRP_MSK 0x00000002 -#define MSC01_PCI_INTSTAT_SRP_BIT 0x00000002 -#define MSC01_PCI_INTSTAT_SE_SHF 0 -#define MSC01_PCI_INTSTAT_SE_MSK 0x00000001 -#define MSC01_PCI_INTSTAT_SE_BIT 0x00000001 +#define MSC01_PCI_INTSTAT_RST_SHF 10 +#define MSC01_PCI_INTSTAT_RST_MSK 0x00000400 +#define MSC01_PCI_INTSTAT_RST_BIT 0x00000400 +#define MSC01_PCI_INTSTAT_MWE_SHF 9 +#define MSC01_PCI_INTSTAT_MWE_MSK 0x00000200 +#define MSC01_PCI_INTSTAT_MWE_BIT 0x00000200 +#define MSC01_PCI_INTSTAT_DTO_SHF 8 +#define MSC01_PCI_INTSTAT_DTO_MSK 0x00000100 +#define MSC01_PCI_INTSTAT_DTO_BIT 0x00000100 +#define MSC01_PCI_INTSTAT_MA_SHF 7 +#define MSC01_PCI_INTSTAT_MA_MSK 0x00000080 +#define MSC01_PCI_INTSTAT_MA_BIT 0x00000080 +#define MSC01_PCI_INTSTAT_TA_SHF 6 +#define MSC01_PCI_INTSTAT_TA_MSK 0x00000040 +#define MSC01_PCI_INTSTAT_TA_BIT 0x00000040 +#define MSC01_PCI_INTSTAT_RTY_SHF 5 +#define MSC01_PCI_INTSTAT_RTY_MSK 0x00000020 +#define MSC01_PCI_INTSTAT_RTY_BIT 0x00000020 +#define MSC01_PCI_INTSTAT_MWP_SHF 4 +#define MSC01_PCI_INTSTAT_MWP_MSK 0x00000010 +#define MSC01_PCI_INTSTAT_MWP_BIT 0x00000010 +#define MSC01_PCI_INTSTAT_MRP_SHF 3 +#define MSC01_PCI_INTSTAT_MRP_MSK 0x00000008 +#define MSC01_PCI_INTSTAT_MRP_BIT 0x00000008 +#define MSC01_PCI_INTSTAT_SWP_SHF 2 +#define MSC01_PCI_INTSTAT_SWP_MSK 0x00000004 +#define MSC01_PCI_INTSTAT_SWP_BIT 0x00000004 +#define MSC01_PCI_INTSTAT_SRP_SHF 1 +#define MSC01_PCI_INTSTAT_SRP_MSK 0x00000002 +#define MSC01_PCI_INTSTAT_SRP_BIT 0x00000002 +#define MSC01_PCI_INTSTAT_SE_SHF 0 +#define MSC01_PCI_INTSTAT_SE_MSK 0x00000001 +#define MSC01_PCI_INTSTAT_SE_BIT 0x00000001 #define MSC01_PCI_CFGADDR_BNUM_SHF 16 #define MSC01_PCI_CFGADDR_BNUM_MSK 0x00ff0000 @@ -167,29 +168,29 @@ #define MSC01_PCI_CFGDATA_DATA_MSK 0xffffffff /* The defines below are ONLY valid for a MEM bar! */ -#define MSC01_PCI_BAR0_SIZE_SHF 4 -#define MSC01_PCI_BAR0_SIZE_MSK 0xfffffff0 -#define MSC01_PCI_BAR0_P_SHF 3 -#define MSC01_PCI_BAR0_P_MSK 0x00000008 -#define MSC01_PCI_BAR0_P_BIT MSC01_PCI_BAR0_P_MSK -#define MSC01_PCI_BAR0_D_SHF 1 -#define MSC01_PCI_BAR0_D_MSK 0x00000006 -#define MSC01_PCI_BAR0_T_SHF 0 -#define MSC01_PCI_BAR0_T_MSK 0x00000001 -#define MSC01_PCI_BAR0_T_BIT MSC01_PCI_BAR0_T_MSK +#define MSC01_PCI_BAR0_SIZE_SHF 4 +#define MSC01_PCI_BAR0_SIZE_MSK 0xfffffff0 +#define MSC01_PCI_BAR0_P_SHF 3 +#define MSC01_PCI_BAR0_P_MSK 0x00000008 +#define MSC01_PCI_BAR0_P_BIT MSC01_PCI_BAR0_P_MSK +#define MSC01_PCI_BAR0_D_SHF 1 +#define MSC01_PCI_BAR0_D_MSK 0x00000006 +#define MSC01_PCI_BAR0_T_SHF 0 +#define MSC01_PCI_BAR0_T_MSK 0x00000001 +#define MSC01_PCI_BAR0_T_BIT MSC01_PCI_BAR0_T_MSK -#define MSC01_PCI_CFG_RA_SHF 17 -#define MSC01_PCI_CFG_RA_MSK 0x00020000 -#define MSC01_PCI_CFG_RA_BIT MSC01_PCI_CFG_RA_MSK -#define MSC01_PCI_CFG_G_SHF 16 -#define MSC01_PCI_CFG_G_MSK 0x00010000 -#define MSC01_PCI_CFG_G_BIT MSC01_PCI_CFG_G_MSK -#define MSC01_PCI_CFG_EN_SHF 15 -#define MSC01_PCI_CFG_EN_MSK 0x00008000 -#define MSC01_PCI_CFG_EN_BIT MSC01_PCI_CFG_EN_MSK -#define MSC01_PCI_CFG_MAXRTRY_SHF 0 -#define MSC01_PCI_CFG_MAXRTRY_MSK 0x000000ff +#define MSC01_PCI_CFG_RA_SHF 17 +#define MSC01_PCI_CFG_RA_MSK 0x00020000 +#define MSC01_PCI_CFG_RA_BIT MSC01_PCI_CFG_RA_MSK +#define MSC01_PCI_CFG_G_SHF 16 +#define MSC01_PCI_CFG_G_MSK 0x00010000 +#define MSC01_PCI_CFG_G_BIT MSC01_PCI_CFG_G_MSK +#define MSC01_PCI_CFG_EN_SHF 15 +#define MSC01_PCI_CFG_EN_MSK 0x00008000 +#define MSC01_PCI_CFG_EN_BIT MSC01_PCI_CFG_EN_MSK +#define MSC01_PCI_CFG_MAXRTRY_SHF 0 +#define MSC01_PCI_CFG_MAXRTRY_MSK 0x00000fff #define MSC01_PCI_SWAP_IO_SHF 18 #define MSC01_PCI_SWAP_IO_MSK 0x000c0000 @@ -206,7 +207,7 @@ * FIXME - are these macros specific to Malta and co or to the MSC? If the * latter, they should be moved elsewhere. */ -#define MIPS_MSC01_PCI_REG_BASE 0x1bd00000 +#define MIPS_MSC01_PCI_REG_BASE 0x1bd00000 extern unsigned long _pcictrl_msc; @@ -219,19 +220,19 @@ extern unsigned long _pcictrl_msc; * Registers absolute addresses */ -#define MSC01_PCI_ID (MSC01_PCI_REG_BASE + MSC01_PCI_ID_OFS) -#define MSC01_PCI_SC2PMBASL (MSC01_PCI_REG_BASE + MSC01_PCI_SC2PMBASL_OFS) -#define MSC01_PCI_SC2PMMSKL (MSC01_PCI_REG_BASE + MSC01_PCI_SC2PMMSKL_OFS) -#define MSC01_PCI_SC2PMMAPL (MSC01_PCI_REG_BASE + MSC01_PCI_SC2PMMAPL_OFS) -#define MSC01_PCI_SC2PIOBASL (MSC01_PCI_REG_BASE + MSC01_PCI_SC2PIOBASL_OFS) -#define MSC01_PCI_SC2PIOMSKL (MSC01_PCI_REG_BASE + MSC01_PCI_SC2PIOMSKL_OFS) -#define MSC01_PCI_SC2PIOMAPL (MSC01_PCI_REG_BASE + MSC01_PCI_SC2PIOMAPL_OFS) -#define MSC01_PCI_P2SCMSKL (MSC01_PCI_REG_BASE + MSC01_PCI_P2SCMSKL_OFS) -#define MSC01_PCI_P2SCMAPL (MSC01_PCI_REG_BASE + MSC01_PCI_P2SCMAPL_OFS) -#define MSC01_PCI_INTCFG (MSC01_PCI_REG_BASE + MSC01_PCI_INTCFG_OFS) -#define MSC01_PCI_INTSTAT (MSC01_PCI_REG_BASE + MSC01_PCI_INTSTAT_OFS) -#define MSC01_PCI_CFGADDR (MSC01_PCI_REG_BASE + MSC01_PCI_CFGADDR_OFS) -#define MSC01_PCI_CFGDATA (MSC01_PCI_REG_BASE + MSC01_PCI_CFGDATA_OFS) +#define MSC01_PCI_ID (MSC01_PCI_REG_BASE + MSC01_PCI_ID_OFS) +#define MSC01_PCI_SC2PMBASL (MSC01_PCI_REG_BASE + MSC01_PCI_SC2PMBASL_OFS) +#define MSC01_PCI_SC2PMMSKL (MSC01_PCI_REG_BASE + MSC01_PCI_SC2PMMSKL_OFS) +#define MSC01_PCI_SC2PMMAPL (MSC01_PCI_REG_BASE + MSC01_PCI_SC2PMMAPL_OFS) +#define MSC01_PCI_SC2PIOBASL (MSC01_PCI_REG_BASE + MSC01_PCI_SC2PIOBASL_OFS) +#define MSC01_PCI_SC2PIOMSKL (MSC01_PCI_REG_BASE + MSC01_PCI_SC2PIOMSKL_OFS) +#define MSC01_PCI_SC2PIOMAPL (MSC01_PCI_REG_BASE + MSC01_PCI_SC2PIOMAPL_OFS) +#define MSC01_PCI_P2SCMSKL (MSC01_PCI_REG_BASE + MSC01_PCI_P2SCMSKL_OFS) +#define MSC01_PCI_P2SCMAPL (MSC01_PCI_REG_BASE + MSC01_PCI_P2SCMAPL_OFS) +#define MSC01_PCI_INTCFG (MSC01_PCI_REG_BASE + MSC01_PCI_INTCFG_OFS) +#define MSC01_PCI_INTSTAT (MSC01_PCI_REG_BASE + MSC01_PCI_INTSTAT_OFS) +#define MSC01_PCI_CFGADDR (MSC01_PCI_REG_BASE + MSC01_PCI_CFGADDR_OFS) +#define MSC01_PCI_CFGDATA (MSC01_PCI_REG_BASE + MSC01_PCI_CFGDATA_OFS) #define MSC01_PCI_IACK (MSC01_PCI_REG_BASE + MSC01_PCI_IACK_OFS) #define MSC01_PCI_HEAD0 (MSC01_PCI_REG_BASE + MSC01_PCI_HEAD0_OFS) #define MSC01_PCI_HEAD1 (MSC01_PCI_REG_BASE + MSC01_PCI_HEAD1_OFS) @@ -248,7 +249,7 @@ extern unsigned long _pcictrl_msc; #define MSC01_PCI_HEAD12 (MSC01_PCI_REG_BASE + MSC01_PCI_HEAD11_OFS) #define MSC01_PCI_HEAD13 (MSC01_PCI_REG_BASE + MSC01_PCI_HEAD11_OFS) #define MSC01_PCI_HEAD14 (MSC01_PCI_REG_BASE + MSC01_PCI_HEAD11_OFS) -#define MSC01_PCI_HEAD15 (MSC01_PCI_REG_BASE + MSC01_PCI_HEAD11_OFS) +#define MSC01_PCI_HEAD15 (MSC01_PCI_REG_BASE + MSC01_PCI_HEAD11_OFS) #define MSC01_PCI_BAR0 (MSC01_PCI_REG_BASE + MSC01_PCI_BAR0_OFS) #define MSC01_PCI_CFG (MSC01_PCI_REG_BASE + MSC01_PCI_CFG_OFS) #define MSC01_PCI_SWAP (MSC01_PCI_REG_BASE + MSC01_PCI_SWAP_OFS) diff --git a/include/asm-mips/mips-boards/seadint.h b/include/asm-mips/mips-boards/seadint.h index c3dcfcb928b6..365c2a3c64f5 100644 --- a/include/asm-mips/mips-boards/seadint.h +++ b/include/asm-mips/mips-boards/seadint.h @@ -20,9 +20,14 @@ #ifndef _MIPS_SEADINT_H #define _MIPS_SEADINT_H -#define SEADINT_UART0 2 -#define SEADINT_UART1 3 +/* + * Interrupts 0..7 are used for SEAD CPU interrupts + */ +#define MIPSCPU_INT_BASE 0 + +#define MIPSCPU_INT_UART0 2 +#define MIPSCPU_INT_UART1 3 -extern void seadint_init(void); +#define MIPSCPU_INT_CPUCTR 7 #endif /* !(_MIPS_SEADINT_H) */ diff --git a/include/asm-mips/mips-boards/sim.h b/include/asm-mips/mips-boards/sim.h new file mode 100644 index 000000000000..acb7c2331d98 --- /dev/null +++ b/include/asm-mips/mips-boards/sim.h @@ -0,0 +1,40 @@ +/* + * Copyright (C) 2005 MIPS Technologies, Inc. All rights reserved. + * + * This program is free software; you can distribute it and/or modify it + * under the terms of the GNU General Public License (Version 2) as + * published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License + * for more details. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. + * + */ + +#ifndef _ASM_MIPS_BOARDS_SIM_H +#define _ASM_MIPS_BOARDS_SIM_H + +#define STATS_ON 1 +#define STATS_OFF 2 +#define STATS_CLEAR 3 +#define STATS_DUMP 4 +#define TRACE_ON 5 +#define TRACE_OFF 6 + + +#define simcfg(code) \ +({ \ + __asm__ __volatile__( \ + "sltiu $0,$0, %0" \ + ::"i"(code) \ + ); \ +}) + + + +#endif diff --git a/include/asm-mips/mips-boards/simint.h b/include/asm-mips/mips-boards/simint.h new file mode 100644 index 000000000000..4952e0b3bf11 --- /dev/null +++ b/include/asm-mips/mips-boards/simint.h @@ -0,0 +1,34 @@ +/* + * Copyright (C) 2005 MIPS Technologies, Inc. All rights reserved. + * + * This program is free software; you can distribute it and/or modify it + * under the terms of the GNU General Public License (Version 2) as + * published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License + * for more details. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. + */ +#ifndef _MIPS_SIMINT_H +#define _MIPS_SIMINT_H + + +#define SIM_INT_BASE 0 +#define MIPSCPU_INT_MB0 2 +#define MIPSCPU_INT_BASE 16 +#define MIPS_CPU_TIMER_IRQ 7 + + +#define MIPSCPU_INT_CPUCTR 7 + +#define MSC01E_INT_BASE 64 + +#define MIPSCPU_INT_CPUCTR 7 +#define MSC01E_INT_CPUCTR 11 + +#endif diff --git a/include/asm-mips/mipsmtregs.h b/include/asm-mips/mipsmtregs.h new file mode 100644 index 000000000000..a669c0702c66 --- /dev/null +++ b/include/asm-mips/mipsmtregs.h @@ -0,0 +1,391 @@ +/* + * MT regs definitions, follows on from mipsregs.h + * Copyright (C) 2004 - 2005 MIPS Technologies, Inc. All rights reserved. + * Elizabeth Clarke et. al. + * + */ +#ifndef _ASM_MIPSMTREGS_H +#define _ASM_MIPSMTREGS_H + +#include <asm/mipsregs.h> +#include <asm/war.h> + +#ifndef __ASSEMBLY__ + +/* + * C macros + */ + +#define read_c0_mvpcontrol() __read_32bit_c0_register($0, 1) +#define write_c0_mvpcontrol(val) __write_32bit_c0_register($0, 1, val) + +#define read_c0_mvpconf0() __read_32bit_c0_register($0, 2) +#define read_c0_mvpconf1() __read_32bit_c0_register($0, 3) + +#define read_c0_vpecontrol() __read_32bit_c0_register($1, 1) +#define write_c0_vpecontrol(val) __write_32bit_c0_register($1, 1, val) + +#define read_c0_vpeconf0() __read_32bit_c0_register($1, 2) +#define write_c0_vpeconf0(val) __write_32bit_c0_register($1, 2, val) + +#define read_c0_tcstatus() __read_32bit_c0_register($2, 1) +#define write_c0_tcstatus(val) __write_32bit_c0_register($2, 1, val) + +#define read_c0_tcbind() __read_32bit_c0_register($2, 2) + +#define read_c0_tccontext() __read_32bit_c0_register($2, 5) +#define write_c0_tccontext(val) __write_32bit_c0_register($2, 5, val) + +#else /* Assembly */ +/* + * Macros for use in assembly language code + */ + +#define CP0_MVPCONTROL $0,1 +#define CP0_MVPCONF0 $0,2 +#define CP0_MVPCONF1 $0,3 +#define CP0_VPECONTROL $1,1 +#define CP0_VPECONF0 $1,2 +#define CP0_VPECONF1 $1,3 +#define CP0_YQMASK $1,4 +#define CP0_VPESCHEDULE $1,5 +#define CP0_VPESCHEFBK $1,6 +#define CP0_TCSTATUS $2,1 +#define CP0_TCBIND $2,2 +#define CP0_TCRESTART $2,3 +#define CP0_TCHALT $2,4 +#define CP0_TCCONTEXT $2,5 +#define CP0_TCSCHEDULE $2,6 +#define CP0_TCSCHEFBK $2,7 +#define CP0_SRSCONF0 $6,1 +#define CP0_SRSCONF1 $6,2 +#define CP0_SRSCONF2 $6,3 +#define CP0_SRSCONF3 $6,4 +#define CP0_SRSCONF4 $6,5 + +#endif + +/* MVPControl fields */ +#define MVPCONTROL_EVP (_ULCAST_(1)) + +#define MVPCONTROL_VPC_SHIFT 1 +#define MVPCONTROL_VPC (_ULCAST_(1) << MVPCONTROL_VPC_SHIFT) + +#define MVPCONTROL_STLB_SHIFT 2 +#define MVPCONTROL_STLB (_ULCAST_(1) << MVPCONTROL_STLB_SHIFT) + + +/* MVPConf0 fields */ +#define MVPCONF0_PTC_SHIFT 0 +#define MVPCONF0_PTC ( _ULCAST_(0xff)) +#define MVPCONF0_PVPE_SHIFT 10 +#define MVPCONF0_PVPE ( _ULCAST_(0xf) << MVPCONF0_PVPE_SHIFT) +#define MVPCONF0_TCA_SHIFT 15 +#define MVPCONF0_TCA ( _ULCAST_(1) << MVPCONF0_TCA_SHIFT) +#define MVPCONF0_PTLBE_SHIFT 16 +#define MVPCONF0_PTLBE (_ULCAST_(0x3ff) << MVPCONF0_PTLBE_SHIFT) +#define MVPCONF0_TLBS_SHIFT 29 +#define MVPCONF0_TLBS (_ULCAST_(1) << MVPCONF0_TLBS_SHIFT) +#define MVPCONF0_M_SHIFT 31 +#define MVPCONF0_M (_ULCAST_(0x1) << MVPCONF0_M_SHIFT) + + +/* config3 fields */ +#define CONFIG3_MT_SHIFT 2 +#define CONFIG3_MT (_ULCAST_(1) << CONFIG3_MT_SHIFT) + + +/* VPEControl fields (per VPE) */ +#define VPECONTROL_TARGTC (_ULCAST_(0xff)) + +#define VPECONTROL_TE_SHIFT 15 +#define VPECONTROL_TE (_ULCAST_(1) << VPECONTROL_TE_SHIFT) +#define VPECONTROL_EXCPT_SHIFT 16 +#define VPECONTROL_EXCPT (_ULCAST_(0x7) << VPECONTROL_EXCPT_SHIFT) + +/* Thread Exception Codes for EXCPT field */ +#define THREX_TU 0 +#define THREX_TO 1 +#define THREX_IYQ 2 +#define THREX_GSX 3 +#define THREX_YSCH 4 +#define THREX_GSSCH 5 + +#define VPECONTROL_GSI_SHIFT 20 +#define VPECONTROL_GSI (_ULCAST_(1) << VPECONTROL_GSI_SHIFT) +#define VPECONTROL_YSI_SHIFT 21 +#define VPECONTROL_YSI (_ULCAST_(1) << VPECONTROL_YSI_SHIFT) + +/* VPEConf0 fields (per VPE) */ +#define VPECONF0_VPA_SHIFT 0 +#define VPECONF0_VPA (_ULCAST_(1) << VPECONF0_VPA_SHIFT) +#define VPECONF0_MVP_SHIFT 1 +#define VPECONF0_MVP (_ULCAST_(1) << VPECONF0_MVP_SHIFT) +#define VPECONF0_XTC_SHIFT 21 +#define VPECONF0_XTC (_ULCAST_(0xff) << VPECONF0_XTC_SHIFT) + +/* TCStatus fields (per TC) */ +#define TCSTATUS_TASID (_ULCAST_(0xff)) +#define TCSTATUS_IXMT_SHIFT 10 +#define TCSTATUS_IXMT (_ULCAST_(1) << TCSTATUS_IXMT_SHIFT) +#define TCSTATUS_TKSU_SHIFT 11 +#define TCSTATUS_TKSU (_ULCAST_(3) << TCSTATUS_TKSU_SHIFT) +#define TCSTATUS_A_SHIFT 13 +#define TCSTATUS_A (_ULCAST_(1) << TCSTATUS_A_SHIFT) +#define TCSTATUS_DA_SHIFT 15 +#define TCSTATUS_DA (_ULCAST_(1) << TCSTATUS_DA_SHIFT) +#define TCSTATUS_DT_SHIFT 20 +#define TCSTATUS_DT (_ULCAST_(1) << TCSTATUS_DT_SHIFT) +#define TCSTATUS_TDS_SHIFT 21 +#define TCSTATUS_TDS (_ULCAST_(1) << TCSTATUS_TDS_SHIFT) +#define TCSTATUS_TSST_SHIFT 22 +#define TCSTATUS_TSST (_ULCAST_(1) << TCSTATUS_TSST_SHIFT) +#define TCSTATUS_RNST_SHIFT 23 +#define TCSTATUS_RNST (_ULCAST_(3) << TCSTATUS_RNST_SHIFT) +/* Codes for RNST */ +#define TC_RUNNING 0 +#define TC_WAITING 1 +#define TC_YIELDING 2 +#define TC_GATED 3 + +#define TCSTATUS_TMX_SHIFT 27 +#define TCSTATUS_TMX (_ULCAST_(1) << TCSTATUS_TMX_SHIFT) +/* TCStatus TCU bits can use same definitions/offsets as CU bits in Status */ + +/* TCBind */ +#define TCBIND_CURVPE_SHIFT 0 +#define TCBIND_CURVPE (_ULCAST_(0xf)) + +#define TCBIND_CURTC_SHIFT 21 + +#define TCBIND_CURTC (_ULCAST_(0xff) << TCBIND_CURTC_SHIFT) + +/* TCHalt */ +#define TCHALT_H (_ULCAST_(1)) + +#ifndef __ASSEMBLY__ + +extern void mips_mt_regdump(void); + +static inline unsigned int dvpe(void) +{ + int res = 0; + + __asm__ __volatile__( + " .set push \n" + " .set noreorder \n" + " .set noat \n" + " .set mips32r2 \n" + " .word 0x41610001 # dvpe $1 \n" + " move %0, $1 \n" + " ehb \n" + " .set pop \n" + : "=r" (res)); + + instruction_hazard(); + + return res; +} + +static inline void __raw_evpe(void) +{ + __asm__ __volatile__( + " .set push \n" + " .set noreorder \n" + " .set noat \n" + " .set mips32r2 \n" + " .word 0x41600021 # evpe \n" + " ehb \n" + " .set pop \n"); +} + +/* Enable multiMT if previous suggested it should be. + EMT_ENABLE to force */ + +#define EVPE_ENABLE MVPCONTROL_EVP + +static inline void evpe(int previous) +{ + if ((previous & MVPCONTROL_EVP)) + __raw_evpe(); +} + +static inline unsigned int dmt(void) +{ + int res; + + __asm__ __volatile__( + " .set push \n" + " .set mips32r2 \n" + " .set noat \n" + " .word 0x41610BC1 # dmt $1 \n" + " ehb \n" + " move %0, $1 \n" + " .set pop \n" + : "=r" (res)); + + instruction_hazard(); + + return res; +} + +static inline void __raw_emt(void) +{ + __asm__ __volatile__( + " .set noreorder \n" + " .set mips32r2 \n" + " emt \n" + " ehb \n" + " .set mips0 \n" + " .set reorder"); +} + +/* enable multiVPE if previous suggested it should be. + EVPE_ENABLE to force */ + +#define EMT_ENABLE VPECONTROL_TE + +static inline void emt(int previous) +{ + if ((previous & EMT_ENABLE)) + __raw_emt(); +} + +static inline void ehb(void) +{ + __asm__ __volatile__( + " .set mips32r2 \n" + " ehb \n" + " .set mips0 \n"); +} + +#define mftc0(rt,sel) \ +({ \ + unsigned long __res; \ + \ + __asm__ __volatile__( \ + " .set push \n" \ + " .set mips32r2 \n" \ + " .set noat \n" \ + " # mftc0 $1, $" #rt ", " #sel " \n" \ + " .word 0x41000800 | (" #rt " << 16) | " #sel " \n" \ + " move %0, $1 \n" \ + " .set pop \n" \ + : "=r" (__res)); \ + \ + __res; \ +}) + +#define mftgpr(rt) \ +({ \ + unsigned long __res; \ + \ + __asm__ __volatile__( \ + " .set push \n" \ + " .set mips32r2 \n" \ + " mftgpr %0," #rt " \n" \ + " .set pop \n" \ + : "=r" (__res)); \ + \ + __res; \ +}) + +#define mftr(rt,u,sel) \ +({ \ + unsigned long __res; \ + \ + __asm__ __volatile__( \ + ".set noat\n\t" \ + "mftr\t%0, " #rt ", " #u ", " #sel "\n\t" \ + ".set at\n\t" \ + : "=r" (__res)); \ + \ + __res; \ +}) + +#define mttgpr(rd,v) \ +do { \ + __asm__ __volatile__( \ + " .set push \n" \ + " .set mips32r2 \n" \ + " .set noat \n" \ + " move $1, %0 \n" \ + " # mttgpr $1, " #rd " \n" \ + " .word 0x41810020 | (" #rd " << 11) \n" \ + " .set pop \n" \ + : : "r" (v)); \ +} while (0) + +#define mttc0(rd,sel,v) \ +({ \ + __asm__ __volatile__( \ + " .set push \n" \ + " .set mips32r2 \n" \ + " .set noat \n" \ + " move $1, %0 \n" \ + " # mttc0 %0," #rd ", " #sel " \n" \ + " .word 0x41810000 | (" #rd " << 11) | " #sel " \n" \ + " .set pop \n" \ + : \ + : "r" (v)); \ +}) + + +#define mttr(rd,u,sel,v) \ +({ \ + __asm__ __volatile__( \ + "mttr %0," #rd ", " #u ", " #sel \ + : : "r" (v)); \ +}) + + +#define settc(tc) \ +do { \ + write_c0_vpecontrol((read_c0_vpecontrol()&~VPECONTROL_TARGTC) | (tc)); \ + ehb(); \ +} while (0) + + +/* you *must* set the target tc (settc) before trying to use these */ +#define read_vpe_c0_vpecontrol() mftc0(1, 1) +#define write_vpe_c0_vpecontrol(val) mttc0(1, 1, val) +#define read_vpe_c0_vpeconf0() mftc0(1, 2) +#define write_vpe_c0_vpeconf0(val) mttc0(1, 2, val) +#define read_vpe_c0_status() mftc0(12, 0) +#define write_vpe_c0_status(val) mttc0(12, 0, val) +#define read_vpe_c0_cause() mftc0(13, 0) +#define write_vpe_c0_cause(val) mttc0(13, 0, val) +#define read_vpe_c0_config() mftc0(16, 0) +#define write_vpe_c0_config(val) mttc0(16, 0, val) +#define read_vpe_c0_config1() mftc0(16, 1) +#define write_vpe_c0_config1(val) mttc0(16, 1, val) +#define read_vpe_c0_config7() mftc0(16, 7) +#define write_vpe_c0_config7(val) mttc0(16, 7, val) +#define read_vpe_c0_ebase() mftc0(15,1) +#define write_vpe_c0_ebase(val) mttc0(15, 1, val) +#define write_vpe_c0_compare(val) mttc0(11, 0, val) + + +/* TC */ +#define read_tc_c0_tcstatus() mftc0(2, 1) +#define write_tc_c0_tcstatus(val) mttc0(2,1,val) +#define read_tc_c0_tcbind() mftc0(2, 2) +#define write_tc_c0_tcbind(val) mttc0(2,2,val) +#define read_tc_c0_tcrestart() mftc0(2, 3) +#define write_tc_c0_tcrestart(val) mttc0(2,3,val) +#define read_tc_c0_tchalt() mftc0(2, 4) +#define write_tc_c0_tchalt(val) mttc0(2,4,val) +#define read_tc_c0_tccontext() mftc0(2, 5) +#define write_tc_c0_tccontext(val) mttc0(2,5,val) + +/* GPR */ +#define read_tc_gpr_sp() mftgpr(29) +#define write_tc_gpr_sp(val) mttgpr(29, val) +#define read_tc_gpr_gp() mftgpr(28) +#define write_tc_gpr_gp(val) mttgpr(28, val) + +__BUILD_SET_C0(mvpcontrol) + +#endif /* Not __ASSEMBLY__ */ + +#endif diff --git a/include/asm-mips/mipsregs.h b/include/asm-mips/mipsregs.h index 2197aa4ce456..80370e0a5589 100644 --- a/include/asm-mips/mipsregs.h +++ b/include/asm-mips/mipsregs.h @@ -8,7 +8,7 @@ * Modified for further R[236]000 support by Paul M. Antoine, 1996. * Kevin D. Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com * Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved. - * Copyright (C) 2003 Maciej W. Rozycki + * Copyright (C) 2003, 2004 Maciej W. Rozycki */ #ifndef _ASM_MIPSREGS_H #define _ASM_MIPSREGS_H @@ -96,6 +96,16 @@ #define CP0_S1_INTCONTROL $20 /* + * Coprocessor 0 Set 2 register names + */ +#define CP0_S2_SRSCTL $12 /* MIPSR2 */ + +/* + * Coprocessor 0 Set 3 register names + */ +#define CP0_S3_SRSMAP $12 /* MIPSR2 */ + +/* * TX39 Series */ #define CP0_TX39_CACHE $7 @@ -281,6 +291,11 @@ #define ST0_DL (_ULCAST_(1) << 24) /* + * Enable the MIPS DSP ASE + */ +#define ST0_MX 0x01000000 + +/* * Bitfields in the TX39 family CP0 Configuration Register 3 */ #define TX39_CONF_ICS_SHIFT 19 @@ -433,6 +448,14 @@ #define R5K_CONF_SE (_ULCAST_(1) << 12) #define R5K_CONF_SS (_ULCAST_(3) << 20) +/* Bits specific to the RM7000. */ +#define RM7K_CONF_SE (_ULCAST_(1) << 3) +#define RM7K_CONF_TE (_ULCAST_(1) << 12) +#define RM7K_CONF_CLK (_ULCAST_(1) << 16) +#define RM7K_CONF_TC (_ULCAST_(1) << 17) +#define RM7K_CONF_SI (_ULCAST_(3) << 20) +#define RM7K_CONF_SC (_ULCAST_(1) << 31) + /* Bits specific to the R10000. */ #define R10K_CONF_DN (_ULCAST_(3) << 3) #define R10K_CONF_CT (_ULCAST_(1) << 5) @@ -475,6 +498,53 @@ #define MIPS_CONF_M (_ULCAST_(1) << 31) /* + * Bits in the MIPS32/64 PRA coprocessor 0 config registers 1 and above. + */ +#define MIPS_CONF1_FP (_ULCAST_(1) << 0) +#define MIPS_CONF1_EP (_ULCAST_(1) << 1) +#define MIPS_CONF1_CA (_ULCAST_(1) << 2) +#define MIPS_CONF1_WR (_ULCAST_(1) << 3) +#define MIPS_CONF1_PC (_ULCAST_(1) << 4) +#define MIPS_CONF1_MD (_ULCAST_(1) << 5) +#define MIPS_CONF1_C2 (_ULCAST_(1) << 6) +#define MIPS_CONF1_DA (_ULCAST_(7) << 7) +#define MIPS_CONF1_DL (_ULCAST_(7) << 10) +#define MIPS_CONF1_DS (_ULCAST_(7) << 13) +#define MIPS_CONF1_IA (_ULCAST_(7) << 16) +#define MIPS_CONF1_IL (_ULCAST_(7) << 19) +#define MIPS_CONF1_IS (_ULCAST_(7) << 22) +#define MIPS_CONF1_TLBS (_ULCAST_(63)<< 25) + +#define MIPS_CONF2_SA (_ULCAST_(15)<< 0) +#define MIPS_CONF2_SL (_ULCAST_(15)<< 4) +#define MIPS_CONF2_SS (_ULCAST_(15)<< 8) +#define MIPS_CONF2_SU (_ULCAST_(15)<< 12) +#define MIPS_CONF2_TA (_ULCAST_(15)<< 16) +#define MIPS_CONF2_TL (_ULCAST_(15)<< 20) +#define MIPS_CONF2_TS (_ULCAST_(15)<< 24) +#define MIPS_CONF2_TU (_ULCAST_(7) << 28) + +#define MIPS_CONF3_TL (_ULCAST_(1) << 0) +#define MIPS_CONF3_SM (_ULCAST_(1) << 1) +#define MIPS_CONF3_MT (_ULCAST_(1) << 2) +#define MIPS_CONF3_SP (_ULCAST_(1) << 4) +#define MIPS_CONF3_VINT (_ULCAST_(1) << 5) +#define MIPS_CONF3_VEIC (_ULCAST_(1) << 6) +#define MIPS_CONF3_LPA (_ULCAST_(1) << 7) +#define MIPS_CONF3_DSP (_ULCAST_(1) << 10) + +/* + * Bits in the MIPS32/64 coprocessor 1 (FPU) revision register. + */ +#define MIPS_FPIR_S (_ULCAST_(1) << 16) +#define MIPS_FPIR_D (_ULCAST_(1) << 17) +#define MIPS_FPIR_PS (_ULCAST_(1) << 18) +#define MIPS_FPIR_3D (_ULCAST_(1) << 19) +#define MIPS_FPIR_W (_ULCAST_(1) << 20) +#define MIPS_FPIR_L (_ULCAST_(1) << 21) +#define MIPS_FPIR_F64 (_ULCAST_(1) << 22) + +/* * R10000 performance counter definitions. * * FIXME: The R10000 performance counter opens a nice way to implement CPU @@ -621,13 +691,13 @@ do { \ if (sel == 0) \ __asm__ __volatile__( \ "mtc0\t%z0, " #register "\n\t" \ - : : "Jr" ((unsigned int)value)); \ + : : "Jr" ((unsigned int)(value))); \ else \ __asm__ __volatile__( \ ".set\tmips32\n\t" \ "mtc0\t%z0, " #register ", " #sel "\n\t" \ ".set\tmips0" \ - : : "Jr" ((unsigned int)value)); \ + : : "Jr" ((unsigned int)(value))); \ } while (0) #define __write_64bit_c0_register(register, sel, value) \ @@ -676,7 +746,7 @@ do { \ do { \ __asm__ __volatile__( \ "ctc0\t%z0, " #register "\n\t" \ - : : "Jr" ((unsigned int)value)); \ + : : "Jr" ((unsigned int)(value))); \ } while (0) /* @@ -769,12 +839,24 @@ do { \ #define read_c0_count() __read_32bit_c0_register($9, 0) #define write_c0_count(val) __write_32bit_c0_register($9, 0, val) +#define read_c0_count2() __read_32bit_c0_register($9, 6) /* pnx8550 */ +#define write_c0_count2(val) __write_32bit_c0_register($9, 6, val) + +#define read_c0_count3() __read_32bit_c0_register($9, 7) /* pnx8550 */ +#define write_c0_count3(val) __write_32bit_c0_register($9, 7, val) + #define read_c0_entryhi() __read_ulong_c0_register($10, 0) #define write_c0_entryhi(val) __write_ulong_c0_register($10, 0, val) #define read_c0_compare() __read_32bit_c0_register($11, 0) #define write_c0_compare(val) __write_32bit_c0_register($11, 0, val) +#define read_c0_compare2() __read_32bit_c0_register($11, 6) /* pnx8550 */ +#define write_c0_compare2(val) __write_32bit_c0_register($11, 6, val) + +#define read_c0_compare3() __read_32bit_c0_register($11, 7) /* pnx8550 */ +#define write_c0_compare3(val) __write_32bit_c0_register($11, 7, val) + #define read_c0_status() __read_32bit_c0_register($12, 0) #define write_c0_status(val) __write_32bit_c0_register($12, 0, val) @@ -790,10 +872,18 @@ do { \ #define read_c0_config1() __read_32bit_c0_register($16, 1) #define read_c0_config2() __read_32bit_c0_register($16, 2) #define read_c0_config3() __read_32bit_c0_register($16, 3) +#define read_c0_config4() __read_32bit_c0_register($16, 4) +#define read_c0_config5() __read_32bit_c0_register($16, 5) +#define read_c0_config6() __read_32bit_c0_register($16, 6) +#define read_c0_config7() __read_32bit_c0_register($16, 7) #define write_c0_config(val) __write_32bit_c0_register($16, 0, val) #define write_c0_config1(val) __write_32bit_c0_register($16, 1, val) #define write_c0_config2(val) __write_32bit_c0_register($16, 2, val) #define write_c0_config3(val) __write_32bit_c0_register($16, 3, val) +#define write_c0_config4(val) __write_32bit_c0_register($16, 4, val) +#define write_c0_config5(val) __write_32bit_c0_register($16, 5, val) +#define write_c0_config6(val) __write_32bit_c0_register($16, 6, val) +#define write_c0_config7(val) __write_32bit_c0_register($16, 7, val) /* * The WatchLo register. There may be upto 8 of them. @@ -917,6 +1007,22 @@ do { \ #define read_c0_errorepc() __read_ulong_c0_register($30, 0) #define write_c0_errorepc(val) __write_ulong_c0_register($30, 0, val) +/* MIPSR2 */ +#define read_c0_hwrena() __read_32bit_c0_register($7,0) +#define write_c0_hwrena(val) __write_32bit_c0_register($7, 0, val) + +#define read_c0_intctl() __read_32bit_c0_register($12, 1) +#define write_c0_intctl(val) __write_32bit_c0_register($12, 1, val) + +#define read_c0_srsctl() __read_32bit_c0_register($12, 2) +#define write_c0_srsctl(val) __write_32bit_c0_register($12, 2, val) + +#define read_c0_srsmap() __read_32bit_c0_register($12, 3) +#define write_c0_srsmap(val) __write_32bit_c0_register($12, 3, val) + +#define read_c0_ebase() __read_32bit_c0_register($15,1) +#define write_c0_ebase(val) __write_32bit_c0_register($15, 1, val) + /* * Macros to access the floating point coprocessor control registers */ @@ -930,6 +1036,284 @@ do { \ : "=r" (__res)); \ __res;}) +#define rddsp(mask) \ +({ \ + unsigned int __res; \ + \ + __asm__ __volatile__( \ + " .set push \n" \ + " .set noat \n" \ + " # rddsp $1, %x1 \n" \ + " .word 0x7c000cb8 | (%x1 << 16) \n" \ + " move %0, $1 \n" \ + " .set pop \n" \ + : "=r" (__res) \ + : "i" (mask)); \ + __res; \ +}) + +#define wrdsp(val, mask) \ +do { \ + __asm__ __volatile__( \ + " .set push \n" \ + " .set noat \n" \ + " move $1, %0 \n" \ + " # wrdsp $1, %x1 \n" \ + " .word 0x7c2004f8 | (%x1 << 15) \n" \ + " .set pop \n" \ + : \ + : "r" (val), "i" (mask)); \ +} while (0) + +#if 0 /* Need DSP ASE capable assembler ... */ +#define mflo0() ({ long mflo0; __asm__("mflo %0, $ac0" : "=r" (mflo0)); mflo0;}) +#define mflo1() ({ long mflo1; __asm__("mflo %0, $ac1" : "=r" (mflo1)); mflo1;}) +#define mflo2() ({ long mflo2; __asm__("mflo %0, $ac2" : "=r" (mflo2)); mflo2;}) +#define mflo3() ({ long mflo3; __asm__("mflo %0, $ac3" : "=r" (mflo3)); mflo3;}) + +#define mfhi0() ({ long mfhi0; __asm__("mfhi %0, $ac0" : "=r" (mfhi0)); mfhi0;}) +#define mfhi1() ({ long mfhi1; __asm__("mfhi %0, $ac1" : "=r" (mfhi1)); mfhi1;}) +#define mfhi2() ({ long mfhi2; __asm__("mfhi %0, $ac2" : "=r" (mfhi2)); mfhi2;}) +#define mfhi3() ({ long mfhi3; __asm__("mfhi %0, $ac3" : "=r" (mfhi3)); mfhi3;}) + +#define mtlo0(x) __asm__("mtlo %0, $ac0" ::"r" (x)) +#define mtlo1(x) __asm__("mtlo %0, $ac1" ::"r" (x)) +#define mtlo2(x) __asm__("mtlo %0, $ac2" ::"r" (x)) +#define mtlo3(x) __asm__("mtlo %0, $ac3" ::"r" (x)) + +#define mthi0(x) __asm__("mthi %0, $ac0" ::"r" (x)) +#define mthi1(x) __asm__("mthi %0, $ac1" ::"r" (x)) +#define mthi2(x) __asm__("mthi %0, $ac2" ::"r" (x)) +#define mthi3(x) __asm__("mthi %0, $ac3" ::"r" (x)) + +#else + +#define mfhi0() \ +({ \ + unsigned long __treg; \ + \ + __asm__ __volatile__( \ + " .set push \n" \ + " .set noat \n" \ + " # mfhi %0, $ac0 \n" \ + " .word 0x00000810 \n" \ + " move %0, $1 \n" \ + " .set pop \n" \ + : "=r" (__treg)); \ + __treg; \ +}) + +#define mfhi1() \ +({ \ + unsigned long __treg; \ + \ + __asm__ __volatile__( \ + " .set push \n" \ + " .set noat \n" \ + " # mfhi %0, $ac1 \n" \ + " .word 0x00200810 \n" \ + " move %0, $1 \n" \ + " .set pop \n" \ + : "=r" (__treg)); \ + __treg; \ +}) + +#define mfhi2() \ +({ \ + unsigned long __treg; \ + \ + __asm__ __volatile__( \ + " .set push \n" \ + " .set noat \n" \ + " # mfhi %0, $ac2 \n" \ + " .word 0x00400810 \n" \ + " move %0, $1 \n" \ + " .set pop \n" \ + : "=r" (__treg)); \ + __treg; \ +}) + +#define mfhi3() \ +({ \ + unsigned long __treg; \ + \ + __asm__ __volatile__( \ + " .set push \n" \ + " .set noat \n" \ + " # mfhi %0, $ac3 \n" \ + " .word 0x00600810 \n" \ + " move %0, $1 \n" \ + " .set pop \n" \ + : "=r" (__treg)); \ + __treg; \ +}) + +#define mflo0() \ +({ \ + unsigned long __treg; \ + \ + __asm__ __volatile__( \ + " .set push \n" \ + " .set noat \n" \ + " # mflo %0, $ac0 \n" \ + " .word 0x00000812 \n" \ + " move %0, $1 \n" \ + " .set pop \n" \ + : "=r" (__treg)); \ + __treg; \ +}) + +#define mflo1() \ +({ \ + unsigned long __treg; \ + \ + __asm__ __volatile__( \ + " .set push \n" \ + " .set noat \n" \ + " # mflo %0, $ac1 \n" \ + " .word 0x00200812 \n" \ + " move %0, $1 \n" \ + " .set pop \n" \ + : "=r" (__treg)); \ + __treg; \ +}) + +#define mflo2() \ +({ \ + unsigned long __treg; \ + \ + __asm__ __volatile__( \ + " .set push \n" \ + " .set noat \n" \ + " # mflo %0, $ac2 \n" \ + " .word 0x00400812 \n" \ + " move %0, $1 \n" \ + " .set pop \n" \ + : "=r" (__treg)); \ + __treg; \ +}) + +#define mflo3() \ +({ \ + unsigned long __treg; \ + \ + __asm__ __volatile__( \ + " .set push \n" \ + " .set noat \n" \ + " # mflo %0, $ac3 \n" \ + " .word 0x00600812 \n" \ + " move %0, $1 \n" \ + " .set pop \n" \ + : "=r" (__treg)); \ + __treg; \ +}) + +#define mthi0(x) \ +do { \ + __asm__ __volatile__( \ + " .set push \n" \ + " .set noat \n" \ + " move $1, %0 \n" \ + " # mthi $1, $ac0 \n" \ + " .word 0x00200011 \n" \ + " .set pop \n" \ + : \ + : "r" (x)); \ +} while (0) + +#define mthi1(x) \ +do { \ + __asm__ __volatile__( \ + " .set push \n" \ + " .set noat \n" \ + " move $1, %0 \n" \ + " # mthi $1, $ac1 \n" \ + " .word 0x00200811 \n" \ + " .set pop \n" \ + : \ + : "r" (x)); \ +} while (0) + +#define mthi2(x) \ +do { \ + __asm__ __volatile__( \ + " .set push \n" \ + " .set noat \n" \ + " move $1, %0 \n" \ + " # mthi $1, $ac2 \n" \ + " .word 0x00201011 \n" \ + " .set pop \n" \ + : \ + : "r" (x)); \ +} while (0) + +#define mthi3(x) \ +do { \ + __asm__ __volatile__( \ + " .set push \n" \ + " .set noat \n" \ + " move $1, %0 \n" \ + " # mthi $1, $ac3 \n" \ + " .word 0x00201811 \n" \ + " .set pop \n" \ + : \ + : "r" (x)); \ +} while (0) + +#define mtlo0(x) \ +do { \ + __asm__ __volatile__( \ + " .set push \n" \ + " .set noat \n" \ + " move $1, %0 \n" \ + " # mtlo $1, $ac0 \n" \ + " .word 0x00200013 \n" \ + " .set pop \n" \ + : \ + : "r" (x)); \ +} while (0) + +#define mtlo1(x) \ +do { \ + __asm__ __volatile__( \ + " .set push \n" \ + " .set noat \n" \ + " move $1, %0 \n" \ + " # mtlo $1, $ac1 \n" \ + " .word 0x00200813 \n" \ + " .set pop \n" \ + : \ + : "r" (x)); \ +} while (0) + +#define mtlo2(x) \ +do { \ + __asm__ __volatile__( \ + " .set push \n" \ + " .set noat \n" \ + " move $1, %0 \n" \ + " # mtlo $1, $ac2 \n" \ + " .word 0x00201013 \n" \ + " .set pop \n" \ + : \ + : "r" (x)); \ +} while (0) + +#define mtlo3(x) \ +do { \ + __asm__ __volatile__( \ + " .set push \n" \ + " .set noat \n" \ + " move $1, %0 \n" \ + " # mtlo $1, $ac3 \n" \ + " .word 0x00201813 \n" \ + " .set pop \n" \ + : \ + : "r" (x)); \ +} while (0) + +#endif + /* * TLB operations. * @@ -1012,6 +1396,8 @@ __BUILD_SET_C0(status) __BUILD_SET_C0(cause) __BUILD_SET_C0(config) __BUILD_SET_C0(intcontrol) +__BUILD_SET_C0(intctl) +__BUILD_SET_C0(srsmap) #endif /* !__ASSEMBLY__ */ diff --git a/include/asm-mips/mmu_context.h b/include/asm-mips/mmu_context.h index 45cd72d172e8..19cdf7642e66 100644 --- a/include/asm-mips/mmu_context.h +++ b/include/asm-mips/mmu_context.h @@ -30,7 +30,7 @@ extern unsigned long pgd_current[]; #ifdef CONFIG_32BIT #define TLBMISS_HANDLER_SETUP() \ - write_c0_context((unsigned long) smp_processor_id() << 23); \ + write_c0_context((unsigned long) smp_processor_id() << 25); \ TLBMISS_HANDLER_SETUP_PGD(swapper_pg_dir) #endif #if defined(CONFIG_64BIT) && !defined(CONFIG_BUILD_ELF64) @@ -40,7 +40,7 @@ extern unsigned long pgd_current[]; #endif #if defined(CONFIG_64BIT) && defined(CONFIG_BUILD_ELF64) #define TLBMISS_HANDLER_SETUP() \ - write_c0_context((unsigned long) smp_processor_id() << 23); \ + write_c0_context((unsigned long) smp_processor_id() << 26); \ TLBMISS_HANDLER_SETUP_PGD(swapper_pg_dir) #endif diff --git a/include/asm-mips/mmzone.h b/include/asm-mips/mmzone.h index d721143dbd47..011caebac369 100644 --- a/include/asm-mips/mmzone.h +++ b/include/asm-mips/mmzone.h @@ -5,6 +5,7 @@ #ifndef _ASM_MMZONE_H_ #define _ASM_MMZONE_H_ +#include <linux/config.h> #include <asm/page.h> #include <mmzone.h> diff --git a/include/asm-mips/module.h b/include/asm-mips/module.h index 0be58b2aeb9f..2af496c78c12 100644 --- a/include/asm-mips/module.h +++ b/include/asm-mips/module.h @@ -14,15 +14,23 @@ struct mod_arch_specific { typedef uint8_t Elf64_Byte; /* Type for a 8-bit quantity. */ -typedef struct -{ - Elf64_Addr r_offset; /* Address of relocation. */ - Elf64_Word r_sym; /* Symbol index. */ - Elf64_Byte r_ssym; /* Special symbol. */ - Elf64_Byte r_type3; /* Third relocation. */ - Elf64_Byte r_type2; /* Second relocation. */ - Elf64_Byte r_type; /* First relocation. */ - Elf64_Sxword r_addend; /* Addend. */ +typedef struct { + Elf64_Addr r_offset; /* Address of relocation. */ + Elf64_Word r_sym; /* Symbol index. */ + Elf64_Byte r_ssym; /* Special symbol. */ + Elf64_Byte r_type3; /* Third relocation. */ + Elf64_Byte r_type2; /* Second relocation. */ + Elf64_Byte r_type; /* First relocation. */ +} Elf64_Mips_Rel; + +typedef struct { + Elf64_Addr r_offset; /* Address of relocation. */ + Elf64_Word r_sym; /* Symbol index. */ + Elf64_Byte r_ssym; /* Special symbol. */ + Elf64_Byte r_type3; /* Third relocation. */ + Elf64_Byte r_type2; /* Second relocation. */ + Elf64_Byte r_type; /* First relocation. */ + Elf64_Sxword r_addend; /* Addend. */ } Elf64_Mips_Rela; #ifdef CONFIG_32BIT @@ -30,6 +38,13 @@ typedef struct #define Elf_Shdr Elf32_Shdr #define Elf_Sym Elf32_Sym #define Elf_Ehdr Elf32_Ehdr +#define Elf_Addr Elf32_Addr + +#define Elf_Mips_Rel Elf32_Rel +#define Elf_Mips_Rela Elf32_Rela + +#define ELF_MIPS_R_SYM(rel) ELF32_R_SYM(rel.r_info) +#define ELF_MIPS_R_TYPE(rel) ELF32_R_TYPE(rel.r_info) #endif @@ -38,6 +53,13 @@ typedef struct #define Elf_Shdr Elf64_Shdr #define Elf_Sym Elf64_Sym #define Elf_Ehdr Elf64_Ehdr +#define Elf_Addr Elf64_Addr + +#define Elf_Mips_Rel Elf64_Mips_Rel +#define Elf_Mips_Rela Elf64_Mips_Rela + +#define ELF_MIPS_R_SYM(rel) (rel.r_sym) +#define ELF_MIPS_R_TYPE(rel) (rel.r_type) #endif @@ -53,4 +75,54 @@ search_module_dbetables(unsigned long addr) } #endif +#ifdef CONFIG_CPU_MIPS32_R1 +#define MODULE_PROC_FAMILY "MIPS32_R1 " +#elif defined CONFIG_CPU_MIPS32_R2 +#define MODULE_PROC_FAMILY "MIPS32_R2 " +#elif defined CONFIG_CPU_MIPS64_R1 +#define MODULE_PROC_FAMILY "MIPS64_R1 " +#elif defined CONFIG_CPU_MIPS64_R2 +#define MODULE_PROC_FAMILY "MIPS64_R2 " +#elif defined CONFIG_CPU_R3000 +#define MODULE_PROC_FAMILY "R3000 " +#elif defined CONFIG_CPU_TX39XX +#define MODULE_PROC_FAMILY "TX39XX " +#elif defined CONFIG_CPU_VR41XX +#define MODULE_PROC_FAMILY "VR41XX " +#elif defined CONFIG_CPU_R4300 +#define MODULE_PROC_FAMILY "R4300 " +#elif defined CONFIG_CPU_R4X00 +#define MODULE_PROC_FAMILY "R4X00 " +#elif defined CONFIG_CPU_TX49XX +#define MODULE_PROC_FAMILY "TX49XX " +#elif defined CONFIG_CPU_R5000 +#define MODULE_PROC_FAMILY "R5000 " +#elif defined CONFIG_CPU_R5432 +#define MODULE_PROC_FAMILY "R5432 " +#elif defined CONFIG_CPU_R6000 +#define MODULE_PROC_FAMILY "R6000 " +#elif defined CONFIG_CPU_NEVADA +#define MODULE_PROC_FAMILY "NEVADA " +#elif defined CONFIG_CPU_R8000 +#define MODULE_PROC_FAMILY "R8000 " +#elif defined CONFIG_CPU_R10000 +#define MODULE_PROC_FAMILY "R10000 " +#elif defined CONFIG_CPU_RM7000 +#define MODULE_PROC_FAMILY "RM7000 " +#elif defined CONFIG_CPU_RM9000 +#define MODULE_PROC_FAMILY "RM9000 " +#elif defined CONFIG_CPU_SB1 +#define MODULE_PROC_FAMILY "SB1 " +#else +#error MODULE_PROC_FAMILY undefined for your processor configuration +#endif + +#ifdef CONFIG_32BIT +#define MODULE_KERNEL_TYPE "32BIT " +#elif defined CONFIG_64BIT +#define MODULE_KERNEL_TYPE "64BIT " +#endif + +#define MODULE_ARCH_VERMAGIC MODULE_PROC_FAMILY MODULE_KERNEL_TYPE + #endif /* _ASM_MODULE_H */ diff --git a/include/asm-mips/paccess.h b/include/asm-mips/paccess.h index 309bc3099f68..46f2d23d2697 100644 --- a/include/asm-mips/paccess.h +++ b/include/asm-mips/paccess.h @@ -52,7 +52,7 @@ struct __large_pstruct { unsigned long buf[100]; }; }) #define __get_dbe_asm(insn) \ -({ \ +{ \ __asm__ __volatile__( \ "1:\t" insn "\t%1,%2\n\t" \ "move\t%0,$0\n" \ @@ -67,7 +67,7 @@ struct __large_pstruct { unsigned long buf[100]; }; ".previous" \ :"=r" (__gu_err), "=r" (__gu_val) \ :"o" (__mp(__gu_addr)), "i" (-EFAULT)); \ -}) +} extern void __get_dbe_unknown(void); @@ -90,7 +90,7 @@ extern void __get_dbe_unknown(void); }) #define __put_dbe_asm(insn) \ -({ \ +{ \ __asm__ __volatile__( \ "1:\t" insn "\t%1,%2\n\t" \ "move\t%0,$0\n" \ @@ -104,7 +104,7 @@ extern void __get_dbe_unknown(void); ".previous" \ : "=r" (__pu_err) \ : "r" (__pu_val), "o" (__mp(__pu_addr)), "i" (-EFAULT)); \ -}) +} extern void __put_dbe_unknown(void); diff --git a/include/asm-mips/page.h b/include/asm-mips/page.h index 652b6d67a571..ee25a779bf49 100644 --- a/include/asm-mips/page.h +++ b/include/asm-mips/page.h @@ -87,22 +87,48 @@ static inline void copy_user_page(void *vto, void *vfrom, unsigned long vaddr, typedef struct { unsigned long pte; } pte_t; #define pte_val(x) ((x).pte) #endif +#define __pte(x) ((pte_t) { (x) } ) -typedef struct { unsigned long pmd; } pmd_t; -typedef struct { unsigned long pgd; } pgd_t; -typedef struct { unsigned long pgprot; } pgprot_t; +/* + * For 3-level pagetables we defines these ourselves, for 2-level the + * definitions are supplied by <asm-generic/pgtable-nopmd.h>. + */ +#ifdef CONFIG_64BIT +typedef struct { unsigned long pmd; } pmd_t; #define pmd_val(x) ((x).pmd) -#define pgd_val(x) ((x).pgd) -#define pgprot_val(x) ((x).pgprot) +#define __pmd(x) ((pmd_t) { (x) } ) -#define ptep_buddy(x) ((pte_t *)((unsigned long)(x) ^ sizeof(pte_t))) +#endif -#define __pte(x) ((pte_t) { (x) } ) -#define __pmd(x) ((pmd_t) { (x) } ) +/* + * Right now we don't support 4-level pagetables, so all pud-related + * definitions come from <asm-generic/pgtable-nopud.h>. + */ + +/* + * Finall the top of the hierarchy, the pgd + */ +typedef struct { unsigned long pgd; } pgd_t; +#define pgd_val(x) ((x).pgd) #define __pgd(x) ((pgd_t) { (x) } ) + +/* + * Manipulate page protection bits + */ +typedef struct { unsigned long pgprot; } pgprot_t; +#define pgprot_val(x) ((x).pgprot) #define __pgprot(x) ((pgprot_t) { (x) } ) +/* + * On R4000-style MMUs where a TLB entry is mapping a adjacent even / odd + * pair of pages we only have a single global bit per pair of pages. When + * writing to the TLB make sure we always have the bit set for both pages + * or none. This macro is used to access the `buddy' of the pte we're just + * working on. + */ +#define ptep_buddy(x) ((pte_t *)((unsigned long)(x) ^ sizeof(pte_t))) + #endif /* !__ASSEMBLY__ */ /* to align the pointer to the (next) page boundary */ diff --git a/include/asm-mips/pci.h b/include/asm-mips/pci.h index c9a00ca1c012..6c9ad8171a77 100644 --- a/include/asm-mips/pci.h +++ b/include/asm-mips/pci.h @@ -40,6 +40,11 @@ struct pci_controller { unsigned int need_domain_info; int iommu; + + /* Optional access methods for reading/writing the bus number + of the PCI controller */ + int (*get_busno)(void); + void (*set_busno)(int busno); }; /* @@ -142,8 +147,22 @@ static inline void pci_dma_burst_advice(struct pci_dev *pdev, extern void pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region, struct resource *res); -extern void pcibios_bus_to_resource(struct pci_dev *dev, - struct resource *res, struct pci_bus_region *region); + +extern void pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res, + struct pci_bus_region *region); + +static inline struct resource * +pcibios_select_root(struct pci_dev *pdev, struct resource *res) +{ + struct resource *root = NULL; + + if (res->flags & IORESOURCE_IO) + root = &ioport_resource; + if (res->flags & IORESOURCE_MEM) + root = &iomem_resource; + + return root; +} #ifdef CONFIG_PCI_DOMAINS @@ -169,17 +188,4 @@ static inline void pcibios_add_platform_entries(struct pci_dev *dev) /* Do platform specific device initialization at pci_enable_device() time */ extern int pcibios_plat_dev_init(struct pci_dev *dev); -static inline struct resource * -pcibios_select_root(struct pci_dev *pdev, struct resource *res) -{ - struct resource *root = NULL; - - if (res->flags & IORESOURCE_IO) - root = &ioport_resource; - if (res->flags & IORESOURCE_MEM) - root = &iomem_resource; - - return root; -} - #endif /* _ASM_PCI_H */ diff --git a/include/asm-mips/pgalloc.h b/include/asm-mips/pgalloc.h index ce57288d43bd..fe1df572318b 100644 --- a/include/asm-mips/pgalloc.h +++ b/include/asm-mips/pgalloc.h @@ -26,10 +26,22 @@ static inline void pmd_populate(struct mm_struct *mm, pmd_t *pmd, } /* + * Initialize a new pmd table with invalid pointers. + */ +extern void pmd_init(unsigned long page, unsigned long pagetable); + +#ifdef CONFIG_64BIT + +static inline void pud_populate(struct mm_struct *mm, pud_t *pud, pmd_t *pmd) +{ + set_pud(pud, __pud((unsigned long)pmd)); +} +#endif + +/* * Initialize a new pgd / pmd table with invalid pointers. */ extern void pgd_init(unsigned long page); -extern void pmd_init(unsigned long page, unsigned long pagetable); static inline pgd_t *pgd_alloc(struct mm_struct *mm) { @@ -86,21 +98,18 @@ static inline void pte_free(struct page *pte) #define __pte_free_tlb(tlb,pte) tlb_remove_page((tlb),(pte)) #ifdef CONFIG_32BIT -#define pgd_populate(mm, pmd, pte) BUG() /* * allocating and freeing a pmd is trivial: the 1-entry pmd is * inside the pgd, so has no extra memory associated with it. */ -#define pmd_alloc_one(mm, addr) ({ BUG(); ((pmd_t *)2); }) #define pmd_free(x) do { } while (0) #define __pmd_free_tlb(tlb,x) do { } while (0) + #endif #ifdef CONFIG_64BIT -#define pgd_populate(mm, pgd, pmd) set_pgd(pgd, __pgd(pmd)) - static inline pmd_t *pmd_alloc_one(struct mm_struct *mm, unsigned long address) { pmd_t *pmd; diff --git a/include/asm-mips/pgtable-32.h b/include/asm-mips/pgtable-32.h index 7fec93b76da9..0cff64ce0fb8 100644 --- a/include/asm-mips/pgtable-32.h +++ b/include/asm-mips/pgtable-32.h @@ -17,6 +17,8 @@ #include <asm/cachectl.h> #include <asm/fixmap.h> +#include <asm-generic/pgtable-nopmd.h> + /* * - add_wired_entry() add a fixed TLB entry, and move wired register */ @@ -41,42 +43,38 @@ extern int add_temporary_entry(unsigned long entrylo0, unsigned long entrylo1, * works even with the cache aliasing problem the R4k and above have. */ -/* PMD_SHIFT determines the size of the area a second-level page table can map */ +/* PGDIR_SHIFT determines what a third-level page table entry can map */ #ifdef CONFIG_64BIT_PHYS_ADDR -#define PMD_SHIFT 21 +#define PGDIR_SHIFT 21 #else -#define PMD_SHIFT 22 +#define PGDIR_SHIFT 22 #endif -#define PMD_SIZE (1UL << PMD_SHIFT) -#define PMD_MASK (~(PMD_SIZE-1)) - -/* PGDIR_SHIFT determines what a third-level page table entry can map */ -#define PGDIR_SHIFT PMD_SHIFT #define PGDIR_SIZE (1UL << PGDIR_SHIFT) #define PGDIR_MASK (~(PGDIR_SIZE-1)) /* * Entries per page directory level: we use two-level, so - * we don't really have any PMD directory physically. + * we don't really have any PUD/PMD directory physically. */ #ifdef CONFIG_64BIT_PHYS_ADDR #define PGD_ORDER 1 -#define PMD_ORDER 0 +#define PUD_ORDER aieeee_attempt_to_allocate_pud +#define PMD_ORDER 1 #define PTE_ORDER 0 #else #define PGD_ORDER 0 -#define PMD_ORDER 0 +#define PUD_ORDER aieeee_attempt_to_allocate_pud +#define PMD_ORDER 1 #define PTE_ORDER 0 #endif #define PTRS_PER_PGD ((PAGE_SIZE << PGD_ORDER) / sizeof(pgd_t)) -#define PTRS_PER_PMD 1 #define PTRS_PER_PTE ((PAGE_SIZE << PTE_ORDER) / sizeof(pte_t)) #define USER_PTRS_PER_PGD (0x80000000UL/PGDIR_SIZE) #define FIRST_USER_ADDRESS 0 -#define VMALLOC_START KSEG2 +#define VMALLOC_START MAP_BASE #ifdef CONFIG_HIGHMEM # define VMALLOC_END (PKMAP_BASE-2*PAGE_SIZE) @@ -91,8 +89,6 @@ extern int add_temporary_entry(unsigned long entrylo0, unsigned long entrylo1, #define pte_ERROR(e) \ printk("%s:%d: bad pte %08lx.\n", __FILE__, __LINE__, pte_val(e)) #endif -#define pmd_ERROR(e) \ - printk("%s:%d: bad pmd %08lx.\n", __FILE__, __LINE__, pmd_val(e)) #define pgd_ERROR(e) \ printk("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, pgd_val(e)) @@ -120,17 +116,7 @@ static inline void pmd_clear(pmd_t *pmdp) pmd_val(*pmdp) = ((unsigned long) invalid_pte_table); } -/* - * The "pgd_xxx()" functions here are trivial for a folded two-level - * setup: the pgd is never bad, and a pmd always exists (as it's folded - * into the pgd entry) - */ -static inline int pgd_none(pgd_t pgd) { return 0; } -static inline int pgd_bad(pgd_t pgd) { return 0; } -static inline int pgd_present(pgd_t pgd) { return 1; } -static inline void pgd_clear(pgd_t *pgdp) { } - -#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32) +#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32_R1) #define pte_page(x) pfn_to_page(pte_pfn(x)) #define pte_pfn(x) ((unsigned long)((x).pte_high >> 6)) static inline pte_t @@ -151,27 +137,22 @@ pfn_pte(unsigned long pfn, pgprot_t prot) #define pfn_pte(pfn, prot) __pte(((pfn) << (PAGE_SHIFT + 2)) | pgprot_val(prot)) #else #define pte_pfn(x) ((unsigned long)((x).pte >> PAGE_SHIFT)) -#define pfn_pte(pfn, prot) __pte(((pfn) << PAGE_SHIFT) | pgprot_val(prot)) +#define pfn_pte(pfn, prot) __pte(((unsigned long long)(pfn) << PAGE_SHIFT) | pgprot_val(prot)) #endif -#endif /* defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32) */ +#endif /* defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32_R1) */ #define __pgd_offset(address) pgd_index(address) +#define __pud_offset(address) (((address) >> PUD_SHIFT) & (PTRS_PER_PUD-1)) #define __pmd_offset(address) (((address) >> PMD_SHIFT) & (PTRS_PER_PMD-1)) /* to find an entry in a kernel page-table-directory */ #define pgd_offset_k(address) pgd_offset(&init_mm, address) -#define pgd_index(address) ((address) >> PGDIR_SHIFT) +#define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD-1)) /* to find an entry in a page-table-directory */ #define pgd_offset(mm,addr) ((mm)->pgd + pgd_index(addr)) -/* Find an entry in the second-level page table.. */ -static inline pmd_t *pmd_offset(pgd_t *dir, unsigned long address) -{ - return (pmd_t *) dir; -} - /* Find an entry in the third-level page table.. */ #define __pte_offset(address) \ (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1)) @@ -221,7 +202,7 @@ static inline pmd_t *pmd_offset(pgd_t *dir, unsigned long address) */ #define PTE_FILE_MAX_BITS 27 -#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32) +#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32_R1) /* fixme */ #define pte_to_pgoff(_pte) (((_pte).pte_high >> 6) + ((_pte).pte_high & 0x3f)) #define pgoff_to_pte(off) \ diff --git a/include/asm-mips/pgtable-64.h b/include/asm-mips/pgtable-64.h index 1011e0635f56..82166b254b27 100644 --- a/include/asm-mips/pgtable-64.h +++ b/include/asm-mips/pgtable-64.h @@ -16,13 +16,15 @@ #include <asm/page.h> #include <asm/cachectl.h> +#include <asm-generic/pgtable-nopud.h> + /* * Each address space has 2 4K pages as its page directory, giving 1024 * (== PTRS_PER_PGD) 8 byte pointers to pmd tables. Each pmd table is a - * pair of 4K pages, giving 1024 (== PTRS_PER_PMD) 8 byte pointers to - * page tables. Each page table is a single 4K page, giving 512 (== - * PTRS_PER_PTE) 8 byte ptes. Each pgde is initialized to point to - * invalid_pmd_table, each pmde is initialized to point to + * single 4K page, giving 512 (== PTRS_PER_PMD) 8 byte pointers to page + * tables. Each page table is also a single 4K page, giving 512 (== + * PTRS_PER_PTE) 8 byte ptes. Each pud entry is initialized to point to + * invalid_pmd_table, each pmd entry is initialized to point to * invalid_pte_table, each pte is initialized to 0. When memory is low, * and a pmd table or a page table allocation fails, empty_bad_pmd_table * and empty_bad_page_table is returned back to higher layer code, so @@ -36,17 +38,17 @@ */ /* PMD_SHIFT determines the size of the area a second-level page table can map */ -#define PMD_SHIFT (PAGE_SHIFT + (PAGE_SHIFT - 3)) +#define PMD_SHIFT (PAGE_SHIFT + (PAGE_SHIFT + PTE_ORDER - 3)) #define PMD_SIZE (1UL << PMD_SHIFT) #define PMD_MASK (~(PMD_SIZE-1)) /* PGDIR_SHIFT determines what a third-level page table entry can map */ -#define PGDIR_SHIFT (PMD_SHIFT + (PAGE_SHIFT + 1 - 3)) +#define PGDIR_SHIFT (PMD_SHIFT + (PAGE_SHIFT + PMD_ORDER - 3)) #define PGDIR_SIZE (1UL << PGDIR_SHIFT) #define PGDIR_MASK (~(PGDIR_SIZE-1)) /* - * For 4kB page size we use a 3 level page tree and a 8kB pmd and pgds which + * For 4kB page size we use a 3 level page tree and an 8kB pud, which * permits us mapping 40 bits of virtual address space. * * We used to implement 41 bits by having an order 1 pmd level but that seemed @@ -57,7 +59,7 @@ * two levels would be easy to implement. * * For 16kB page size we use a 2 level page tree which permits a total of - * 36 bits of virtual address space. We could add a third leve. but it seems + * 36 bits of virtual address space. We could add a third level but it seems * like at the moment there's no need for this. * * For 64kB page size we use a 2 level page table tree for a total of 42 bits @@ -65,21 +67,25 @@ */ #ifdef CONFIG_PAGE_SIZE_4KB #define PGD_ORDER 1 +#define PUD_ORDER aieeee_attempt_to_allocate_pud #define PMD_ORDER 0 #define PTE_ORDER 0 #endif #ifdef CONFIG_PAGE_SIZE_8KB #define PGD_ORDER 0 +#define PUD_ORDER aieeee_attempt_to_allocate_pud #define PMD_ORDER 0 #define PTE_ORDER 0 #endif #ifdef CONFIG_PAGE_SIZE_16KB #define PGD_ORDER 0 +#define PUD_ORDER aieeee_attempt_to_allocate_pud #define PMD_ORDER 0 #define PTE_ORDER 0 #endif #ifdef CONFIG_PAGE_SIZE_64KB #define PGD_ORDER 0 +#define PUD_ORDER aieeee_attempt_to_allocate_pud #define PMD_ORDER 0 #define PTE_ORDER 0 #endif @@ -91,7 +97,7 @@ #define USER_PTRS_PER_PGD (TASK_SIZE / PGDIR_SIZE) #define FIRST_USER_ADDRESS 0 -#define VMALLOC_START XKSEG +#define VMALLOC_START MAP_BASE #define VMALLOC_END \ (VMALLOC_START + PTRS_PER_PGD * PTRS_PER_PMD * PTRS_PER_PTE * PAGE_SIZE) @@ -102,13 +108,13 @@ #define pgd_ERROR(e) \ printk("%s:%d: bad pgd %016lx.\n", __FILE__, __LINE__, pgd_val(e)) -extern pte_t invalid_pte_table[PAGE_SIZE/sizeof(pte_t)]; -extern pte_t empty_bad_page_table[PAGE_SIZE/sizeof(pte_t)]; -extern pmd_t invalid_pmd_table[2*PAGE_SIZE/sizeof(pmd_t)]; -extern pmd_t empty_bad_pmd_table[2*PAGE_SIZE/sizeof(pmd_t)]; +extern pte_t invalid_pte_table[PTRS_PER_PTE]; +extern pte_t empty_bad_page_table[PTRS_PER_PTE]; +extern pmd_t invalid_pmd_table[PTRS_PER_PMD]; +extern pmd_t empty_bad_pmd_table[PTRS_PER_PMD]; /* - * Empty pmd entries point to the invalid_pte_table. + * Empty pgd/pmd entries point to the invalid_pte_table. */ static inline int pmd_none(pmd_t pmd) { @@ -128,26 +134,30 @@ static inline void pmd_clear(pmd_t *pmdp) } /* - * Empty pgd entries point to the invalid_pmd_table. + * Empty pud entries point to the invalid_pmd_table. */ -static inline int pgd_none(pgd_t pgd) +static inline int pud_none(pud_t pud) { - return pgd_val(pgd) == (unsigned long) invalid_pmd_table; + return pud_val(pud) == (unsigned long) invalid_pmd_table; } -#define pgd_bad(pgd) (pgd_val(pgd) &~ PAGE_MASK) +static inline int pud_bad(pud_t pud) +{ + return pud_val(pud) & ~PAGE_MASK; +} -static inline int pgd_present(pgd_t pgd) +static inline int pud_present(pud_t pud) { - return pgd_val(pgd) != (unsigned long) invalid_pmd_table; + return pud_val(pud) != (unsigned long) invalid_pmd_table; } -static inline void pgd_clear(pgd_t *pgdp) +static inline void pud_clear(pud_t *pudp) { - pgd_val(*pgdp) = ((unsigned long) invalid_pmd_table); + pud_val(*pudp) = ((unsigned long) invalid_pmd_table); } -#define pte_page(x) pfn_to_page((unsigned long)((pte_val(x) >> PAGE_SHIFT))) +#define pte_page(x) pfn_to_page(pte_pfn(x)) + #ifdef CONFIG_CPU_VR41XX #define pte_pfn(x) ((unsigned long)((x).pte >> (PAGE_SHIFT + 2))) #define pfn_pte(pfn, prot) __pte(((pfn) << (PAGE_SHIFT + 2)) | pgprot_val(prot)) @@ -157,26 +167,27 @@ static inline void pgd_clear(pgd_t *pgdp) #endif #define __pgd_offset(address) pgd_index(address) -#define page_pte(page) page_pte_prot(page, __pgprot(0)) +#define __pud_offset(address) (((address) >> PUD_SHIFT) & (PTRS_PER_PUD-1)) +#define __pmd_offset(address) pmd_index(address) /* to find an entry in a kernel page-table-directory */ #define pgd_offset_k(address) pgd_offset(&init_mm, 0) -#define pgd_index(address) ((address) >> PGDIR_SHIFT) +#define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD-1)) +#define pmd_index(address) (((address) >> PMD_SHIFT) & (PTRS_PER_PMD-1)) /* to find an entry in a page-table-directory */ #define pgd_offset(mm,addr) ((mm)->pgd + pgd_index(addr)) -static inline unsigned long pgd_page(pgd_t pgd) +static inline unsigned long pud_page(pud_t pud) { - return pgd_val(pgd); + return pud_val(pud); } /* Find an entry in the second-level page table.. */ -static inline pmd_t *pmd_offset(pgd_t * dir, unsigned long address) +static inline pmd_t *pmd_offset(pud_t * pud, unsigned long address) { - return (pmd_t *) pgd_page(*dir) + - ((address >> PMD_SHIFT) & (PTRS_PER_PMD - 1)); + return (pmd_t *) pud_page(*pud) + pmd_index(address); } /* Find an entry in the third-level page table.. */ diff --git a/include/asm-mips/pgtable-bits.h b/include/asm-mips/pgtable-bits.h index 3aad751ccd5f..01e76e932e3f 100644 --- a/include/asm-mips/pgtable-bits.h +++ b/include/asm-mips/pgtable-bits.h @@ -33,7 +33,7 @@ * unpredictable things. The code (when it is written) to deal with * this problem will be in the update_mmu_cache() code for the r4k. */ -#if defined(CONFIG_CPU_MIPS32) && defined(CONFIG_64BIT_PHYS_ADDR) +#if defined(CONFIG_CPU_MIPS32_R1) && defined(CONFIG_64BIT_PHYS_ADDR) #define _PAGE_PRESENT (1<<6) /* implemented in software */ #define _PAGE_READ (1<<7) /* implemented in software */ @@ -123,7 +123,7 @@ #endif #endif -#endif /* defined(CONFIG_CPU_MIPS32) && defined(CONFIG_64BIT_PHYS_ADDR) */ +#endif /* defined(CONFIG_CPU_MIPS32_R1) && defined(CONFIG_64BIT_PHYS_ADDR) */ #define __READABLE (_PAGE_READ | _PAGE_SILENT_READ | _PAGE_ACCESSED) #define __WRITEABLE (_PAGE_WRITE | _PAGE_SILENT_WRITE | _PAGE_MODIFIED) @@ -140,7 +140,7 @@ #define PAGE_CACHABLE_DEFAULT _CACHE_CACHABLE_COW #endif -#if defined(CONFIG_CPU_MIPS32) && defined(CONFIG_64BIT_PHYS_ADDR) +#if defined(CONFIG_CPU_MIPS32_R1) && defined(CONFIG_64BIT_PHYS_ADDR) #define CONF_CM_DEFAULT (PAGE_CACHABLE_DEFAULT >> 3) #else #define CONF_CM_DEFAULT (PAGE_CACHABLE_DEFAULT >> 9) diff --git a/include/asm-mips/pgtable.h b/include/asm-mips/pgtable.h index cbd1672c94cb..702a28fa7a34 100644 --- a/include/asm-mips/pgtable.h +++ b/include/asm-mips/pgtable.h @@ -8,8 +8,6 @@ #ifndef _ASM_PGTABLE_H #define _ASM_PGTABLE_H -#include <asm-generic/4level-fixup.h> - #include <linux/config.h> #ifdef CONFIG_32BIT #include <asm/pgtable-32.h> @@ -18,8 +16,12 @@ #include <asm/pgtable-64.h> #endif +#include <asm/io.h> #include <asm/pgtable-bits.h> +struct mm_struct; +struct vm_area_struct; + #define PAGE_NONE __pgprot(_PAGE_PRESENT | _CACHE_CACHABLE_NONCOHERENT) #define PAGE_SHARED __pgprot(_PAGE_PRESENT | _PAGE_READ | _PAGE_WRITE | \ PAGE_CACHABLE_DEFAULT) @@ -68,13 +70,14 @@ extern unsigned long zero_page_mask; #define ZERO_PAGE(vaddr) \ (virt_to_page(empty_zero_page + (((unsigned long)(vaddr)) & zero_page_mask))) +#define __HAVE_ARCH_MULTIPLE_ZERO_PAGE + extern void paging_init(void); /* * Conversion functions: convert a page and protection to a page entry, * and a page entry and page directory to the page they refer to. */ -#define page_pte(page) page_pte_prot(page, __pgprot(0)) #define pmd_phys(pmd) (pmd_val(pmd) - PAGE_OFFSET) #define pmd_page(pmd) (pfn_to_page(pmd_phys(pmd) >> PAGE_SHIFT)) #define pmd_page_kernel(pmd) pmd_val(pmd) @@ -82,7 +85,7 @@ extern void paging_init(void); #define pte_none(pte) (!(pte_val(pte) & ~_PAGE_GLOBAL)) #define pte_present(pte) (pte_val(pte) & _PAGE_PRESENT) -#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32) +#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32_R1) static inline void set_pte(pte_t *ptep, pte_t pte) { ptep->pte_high = pte.pte_high; @@ -146,11 +149,18 @@ static inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *pt #endif /* - * (pmds are folded into pgds so this doesn't get actually called, + * (pmds are folded into puds so this doesn't get actually called, * but the define is needed for a generic inline function.) */ #define set_pmd(pmdptr, pmdval) do { *(pmdptr) = (pmdval); } while(0) -#define set_pgd(pgdptr, pgdval) do { *(pgdptr) = (pgdval); } while(0) + +#ifdef CONFIG_64BIT +/* + * (puds are folded into pgds so this doesn't get actually called, + * but the define is needed for a generic inline function.) + */ +#define set_pud(pudptr, pudval) do { *(pudptr) = (pudval); } while(0) +#endif #define PGD_T_LOG2 ffz(~sizeof(pgd_t)) #define PMD_T_LOG2 ffz(~sizeof(pmd_t)) @@ -163,7 +173,7 @@ extern pgd_t swapper_pg_dir[PTRS_PER_PGD]; * Undefined behaviour if not.. */ static inline int pte_user(pte_t pte) { BUG(); return 0; } -#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32) +#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32_R1) static inline int pte_read(pte_t pte) { return (pte).pte_low & _PAGE_READ; } static inline int pte_write(pte_t pte) { return (pte).pte_low & _PAGE_WRITE; } static inline int pte_dirty(pte_t pte) { return (pte).pte_low & _PAGE_MODIFIED; } @@ -322,7 +332,7 @@ static inline pgprot_t pgprot_noncached(pgprot_t _prot) */ #define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot)) -#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32) +#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32_R1) static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) { pte.pte_low &= _PAGE_CHG_MASK; @@ -355,7 +365,6 @@ static inline void update_mmu_cache(struct vm_area_struct *vma, #endif #ifdef CONFIG_64BIT_PHYS_ADDR -extern phys_t fixup_bigphys_addr(phys_t phys_addr, phys_t size); extern int remap_pfn_range(struct vm_area_struct *vma, unsigned long from, unsigned long pfn, unsigned long size, pgprot_t prot); static inline int io_remap_pfn_range(struct vm_area_struct *vma, @@ -365,7 +374,7 @@ static inline int io_remap_pfn_range(struct vm_area_struct *vma, pgprot_t prot) { phys_t phys_addr_high = fixup_bigphys_addr(pfn << PAGE_SHIFT, size); - return remap_pfn_range(vma, vaddr, pfn, size, prot); + return remap_pfn_range(vma, vaddr, phys_addr_high >> PAGE_SHIFT, size, prot); } #else #define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \ diff --git a/include/asm-mips/processor.h b/include/asm-mips/processor.h index d6466aa09fb7..f1980c6c3bcc 100644 --- a/include/asm-mips/processor.h +++ b/include/asm-mips/processor.h @@ -96,12 +96,26 @@ union mips_fpu_union { {{0,},} \ } +#define NUM_DSP_REGS 6 + +typedef __u32 dspreg_t; + +struct mips_dsp_state { + dspreg_t dspr[NUM_DSP_REGS]; + unsigned int dspcontrol; + unsigned short used_dsp; +}; + +#define INIT_DSP {{0,},} + typedef struct { unsigned long seg; } mm_segment_t; #define ARCH_MIN_TASKALIGN 8 +struct mips_abi; + /* * If you change thread_struct remember to change the #defines below too! */ @@ -117,6 +131,9 @@ struct thread_struct { /* Saved fpu/fpu emulator stuff. */ union mips_fpu_union fpu; + /* Saved state of the DSP ASE, if available. */ + struct mips_dsp_state dsp; + /* Other stuff associated with the thread. */ unsigned long cp0_badvaddr; /* Last user fault */ unsigned long cp0_baduaddr; /* Last kernel fault accessing USEG */ @@ -129,6 +146,7 @@ struct thread_struct { unsigned long mflags; unsigned long irix_trampoline; /* Wheee... */ unsigned long irix_oldctx; + struct mips_abi *abi; }; #define MF_ABI_MASK (MF_32BIT_REGS | MF_32BIT_ADDR) @@ -151,6 +169,10 @@ struct thread_struct { */ \ INIT_FPU, \ /* \ + * saved dsp/dsp emulator stuff \ + */ \ + INIT_DSP, \ + /* \ * Other stuff associated with the process \ */ \ 0, 0, 0, 0, \ diff --git a/include/asm-mips/ptrace.h b/include/asm-mips/ptrace.h index 2b5c624c3d4f..95c5839ac465 100644 --- a/include/asm-mips/ptrace.h +++ b/include/asm-mips/ptrace.h @@ -22,6 +22,8 @@ #define MMLO 68 #define FPC_CSR 69 #define FPC_EIR 70 +#define DSP_BASE 71 /* 3 more hi / lo register pairs */ +#define DSP_CONTROL 77 /* * This struct defines the way the registers are stored on the stack during a @@ -38,18 +40,18 @@ struct pt_regs { /* Saved special registers. */ unsigned long cp0_status; - unsigned long lo; unsigned long hi; + unsigned long lo; unsigned long cp0_badvaddr; unsigned long cp0_cause; unsigned long cp0_epc; }; /* Arbitrarily choose the same ptrace numbers as used by the Sparc code. */ -/* #define PTRACE_GETREGS 12 */ -/* #define PTRACE_SETREGS 13 */ -/* #define PTRACE_GETFPREGS 14 */ -/* #define PTRACE_SETFPREGS 15 */ +#define PTRACE_GETREGS 12 +#define PTRACE_SETREGS 13 +#define PTRACE_GETFPREGS 14 +#define PTRACE_SETFPREGS 15 /* #define PTRACE_GETFPXREGS 18 */ /* #define PTRACE_SETFPXREGS 19 */ @@ -58,6 +60,13 @@ struct pt_regs { #define PTRACE_GET_THREAD_AREA 25 #define PTRACE_SET_THREAD_AREA 26 +/* Calls to trace a 64bit program from a 32bit program. */ +#define PTRACE_PEEKTEXT_3264 0xc0 +#define PTRACE_PEEKDATA_3264 0xc1 +#define PTRACE_POKETEXT_3264 0xc2 +#define PTRACE_POKEDATA_3264 0xc3 +#define PTRACE_GET_THREAD_AREA_3264 0xc4 + #ifdef __KERNEL__ #include <linux/linkage.h> diff --git a/include/asm-mips/r4kcache.h b/include/asm-mips/r4kcache.h index 5bea49feec66..a5ea9d828aee 100644 --- a/include/asm-mips/r4kcache.h +++ b/include/asm-mips/r4kcache.h @@ -21,7 +21,7 @@ * * - The MIPS32 and MIPS64 specs permit an implementation to directly derive * the index bits from the virtual address. This breaks with tradition - * set by the R4000. To keep unpleassant surprises from happening we pick + * set by the R4000. To keep unpleasant surprises from happening we pick * an address in KSEG0 / CKSEG0. * - We need a properly sign extended address for 64-bit code. To get away * without ifdefs we let the compiler do it by a type cast. @@ -30,11 +30,11 @@ #define cache_op(op,addr) \ __asm__ __volatile__( \ + " .set push \n" \ " .set noreorder \n" \ " .set mips3\n\t \n" \ " cache %0, %1 \n" \ - " .set mips0 \n" \ - " .set reorder" \ + " .set pop \n" \ : \ : "i" (op), "m" (*(unsigned char *)(addr))) @@ -84,14 +84,14 @@ static inline void flush_scache_line(unsigned long addr) static inline void protected_flush_icache_line(unsigned long addr) { __asm__ __volatile__( - ".set noreorder\n\t" - ".set mips3\n" - "1:\tcache %0,(%1)\n" - "2:\t.set mips0\n\t" - ".set reorder\n\t" - ".section\t__ex_table,\"a\"\n\t" - STR(PTR)"\t1b,2b\n\t" - ".previous" + " .set push \n" + " .set noreorder \n" + " .set mips3 \n" + "1: cache %0, (%1) \n" + "2: .set pop \n" + " .section __ex_table,\"a\" \n" + " "STR(PTR)" 1b, 2b \n" + " .previous" : : "i" (Hit_Invalidate_I), "r" (addr)); } @@ -100,19 +100,19 @@ static inline void protected_flush_icache_line(unsigned long addr) * R10000 / R12000 hazard - these processors don't support the Hit_Writeback_D * cacheop so we use Hit_Writeback_Inv_D which is supported by all R4000-style * caches. We're talking about one cacheline unnecessarily getting invalidated - * here so the penaltiy isn't overly hard. + * here so the penalty isn't overly hard. */ static inline void protected_writeback_dcache_line(unsigned long addr) { __asm__ __volatile__( - ".set noreorder\n\t" - ".set mips3\n" - "1:\tcache %0,(%1)\n" - "2:\t.set mips0\n\t" - ".set reorder\n\t" - ".section\t__ex_table,\"a\"\n\t" - STR(PTR)"\t1b,2b\n\t" - ".previous" + " .set push \n" + " .set noreorder \n" + " .set mips3 \n" + "1: cache %0, (%1) \n" + "2: .set pop \n" + " .section __ex_table,\"a\" \n" + " "STR(PTR)" 1b, 2b \n" + " .previous" : : "i" (Hit_Writeback_Inv_D), "r" (addr)); } @@ -120,14 +120,14 @@ static inline void protected_writeback_dcache_line(unsigned long addr) static inline void protected_writeback_scache_line(unsigned long addr) { __asm__ __volatile__( - ".set noreorder\n\t" - ".set mips3\n" - "1:\tcache %0,(%1)\n" - "2:\t.set mips0\n\t" - ".set reorder\n\t" - ".section\t__ex_table,\"a\"\n\t" - STR(PTR)"\t1b,2b\n\t" - ".previous" + " .set push \n" + " .set noreorder \n" + " .set mips3 \n" + "1: cache %0, (%1) \n" + "2: .set pop \n" + " .section __ex_table,\"a\" \n" + " "STR(PTR)" 1b, 2b \n" + " .previous" : : "i" (Hit_Writeback_Inv_SD), "r" (addr)); } @@ -142,6 +142,7 @@ static inline void invalidate_tcache_page(unsigned long addr) #define cache16_unroll32(base,op) \ __asm__ __volatile__( \ + " .set push \n" \ " .set noreorder \n" \ " .set mips3 \n" \ " cache %1, 0x000(%0); cache %1, 0x010(%0) \n" \ @@ -160,8 +161,7 @@ static inline void invalidate_tcache_page(unsigned long addr) " cache %1, 0x1a0(%0); cache %1, 0x1b0(%0) \n" \ " cache %1, 0x1c0(%0); cache %1, 0x1d0(%0) \n" \ " cache %1, 0x1e0(%0); cache %1, 0x1f0(%0) \n" \ - " .set mips0 \n" \ - " .set reorder \n" \ + " .set pop \n" \ : \ : "r" (base), \ "i" (op)); @@ -285,6 +285,7 @@ static inline void blast_scache16_page_indexed(unsigned long page) #define cache32_unroll32(base,op) \ __asm__ __volatile__( \ + " .set push \n" \ " .set noreorder \n" \ " .set mips3 \n" \ " cache %1, 0x000(%0); cache %1, 0x020(%0) \n" \ @@ -303,8 +304,7 @@ static inline void blast_scache16_page_indexed(unsigned long page) " cache %1, 0x340(%0); cache %1, 0x360(%0) \n" \ " cache %1, 0x380(%0); cache %1, 0x3a0(%0) \n" \ " cache %1, 0x3c0(%0); cache %1, 0x3e0(%0) \n" \ - " .set mips0 \n" \ - " .set reorder \n" \ + " .set pop \n" \ : \ : "r" (base), \ "i" (op)); @@ -428,6 +428,7 @@ static inline void blast_scache32_page_indexed(unsigned long page) #define cache64_unroll32(base,op) \ __asm__ __volatile__( \ + " .set push \n" \ " .set noreorder \n" \ " .set mips3 \n" \ " cache %1, 0x000(%0); cache %1, 0x040(%0) \n" \ @@ -446,8 +447,7 @@ static inline void blast_scache32_page_indexed(unsigned long page) " cache %1, 0x680(%0); cache %1, 0x6c0(%0) \n" \ " cache %1, 0x700(%0); cache %1, 0x740(%0) \n" \ " cache %1, 0x780(%0); cache %1, 0x7c0(%0) \n" \ - " .set mips0 \n" \ - " .set reorder \n" \ + " .set pop \n" \ : \ : "r" (base), \ "i" (op)); @@ -532,6 +532,7 @@ static inline void blast_scache64_page_indexed(unsigned long page) #define cache128_unroll32(base,op) \ __asm__ __volatile__( \ + " .set push \n" \ " .set noreorder \n" \ " .set mips3 \n" \ " cache %1, 0x000(%0); cache %1, 0x080(%0) \n" \ @@ -550,8 +551,7 @@ static inline void blast_scache64_page_indexed(unsigned long page) " cache %1, 0xd00(%0); cache %1, 0xd80(%0) \n" \ " cache %1, 0xe00(%0); cache %1, 0xe80(%0) \n" \ " cache %1, 0xf00(%0); cache %1, 0xf80(%0) \n" \ - " .set mips0 \n" \ - " .set reorder \n" \ + " .set pop \n" \ : \ : "r" (base), \ "i" (op)); diff --git a/include/asm-mips/rtc.h b/include/asm-mips/rtc.h index 3c4b637fd925..a2abc4572b63 100644 --- a/include/asm-mips/rtc.h +++ b/include/asm-mips/rtc.h @@ -15,6 +15,7 @@ #ifdef __KERNEL__ #include <linux/rtc.h> +#include <asm/time.h> #define RTC_PIE 0x40 /* periodic interrupt enable */ #define RTC_AIE 0x20 /* alarm interrupt enable */ @@ -27,11 +28,46 @@ #define RTC_24H 0x02 /* 24 hour mode - else hours bit 7 means pm */ #define RTC_DST_EN 0x01 /* auto switch DST - works f. USA only */ -unsigned int get_rtc_time(struct rtc_time *time); -int set_rtc_time(struct rtc_time *time); -unsigned int get_rtc_ss(void); -int get_rtc_pll(struct rtc_pll_info *pll); -int set_rtc_pll(struct rtc_pll_info *pll); +static inline unsigned int get_rtc_time(struct rtc_time *time) +{ + unsigned long nowtime; + nowtime = rtc_get_time(); + to_tm(nowtime, time); + time->tm_year -= 1900; + + return RTC_24H; +} + +static inline int set_rtc_time(struct rtc_time *time) +{ + unsigned long nowtime; + int ret; + + nowtime = mktime(time->tm_year+1900, time->tm_mon+1, + time->tm_mday, time->tm_hour, time->tm_min, + time->tm_sec); + ret = rtc_set_time(nowtime); + + return ret; +} + +static inline unsigned int get_rtc_ss(void) +{ + struct rtc_time h; + + get_rtc_time(&h); + return h.tm_sec; +} + +static inline int get_rtc_pll(struct rtc_pll_info *pll) +{ + return -EINVAL; +} + +static inline int set_rtc_pll(struct rtc_pll_info *pll) +{ + return -EINVAL; +} #endif #endif diff --git a/include/asm-mips/rtlx.h b/include/asm-mips/rtlx.h new file mode 100644 index 000000000000..1298c3fdf6c9 --- /dev/null +++ b/include/asm-mips/rtlx.h @@ -0,0 +1,52 @@ +/* + * Copyright (C) 2004, 2005 MIPS Technologies, Inc. All rights reserved. + * + */ + +#ifndef _RTLX_H +#define _RTLX_H_ + +#define LX_NODE_BASE 10 + +#define MIPSCPU_INT_BASE 16 +#define MIPS_CPU_RTLX_IRQ 0 + +#define RTLX_VERSION 1 +#define RTLX_xID 0x12345600 +#define RTLX_ID (RTLX_xID | RTLX_VERSION) +#define RTLX_CHANNELS 8 + +#define RTLX_BUFFER_SIZE 1024 + +/* + * lx_state bits + */ +#define RTLX_STATE_OPENED 1UL + +/* each channel supports read and write. + linux (vpe0) reads lx_buffer and writes rt_buffer + SP (vpe1) reads rt_buffer and writes lx_buffer +*/ +struct rtlx_channel { + unsigned long lx_state; + + int buffer_size; + + /* read and write indexes per buffer */ + int rt_write, rt_read; + char *rt_buffer; + + int lx_write, lx_read; + char *lx_buffer; + + void *queues; + +}; + +struct rtlx_info { + unsigned long id; + + struct rtlx_channel channel[RTLX_CHANNELS]; +}; + +#endif /* _RTLX_H_ */ diff --git a/include/asm-mips/semaphore.h b/include/asm-mips/semaphore.h index c2c97dec661b..3d6aa7c7ea81 100644 --- a/include/asm-mips/semaphore.h +++ b/include/asm-mips/semaphore.h @@ -45,9 +45,6 @@ struct semaphore { .wait = __WAIT_QUEUE_HEAD_INITIALIZER((name).wait) \ } -#define __MUTEX_INITIALIZER(name) \ - __SEMAPHORE_INITIALIZER(name, 1) - #define __DECLARE_SEMAPHORE_GENERIC(name, count) \ struct semaphore name = __SEMAPHORE_INITIALIZER(name,count) diff --git a/include/asm-mips/serial.h b/include/asm-mips/serial.h index 4eed8e2acdc3..e796d75f027e 100644 --- a/include/asm-mips/serial.h +++ b/include/asm-mips/serial.h @@ -52,16 +52,6 @@ #define JAZZ_SERIAL_PORT_DEFNS #endif -#ifdef CONFIG_MIPS_COBALT -#include <asm/cobalt/cobalt.h> -#define COBALT_BASE_BAUD (18432000 / 16) -#define COBALT_SERIAL_PORT_DEFNS \ - /* UART CLK PORT IRQ FLAGS */ \ - { 0, COBALT_BASE_BAUD, 0xc800000, COBALT_SERIAL_IRQ, STD_COM_FLAGS }, /* ttyS0 */ -#else -#define COBALT_SERIAL_PORT_DEFNS -#endif - /* * Both Galileo boards have the same UART mappings. */ @@ -113,17 +103,6 @@ #define IVR_SERIAL_PORT_DEFNS #endif -#ifdef CONFIG_TOSHIBA_JMR3927 -#include <asm/jmr3927/jmr3927.h> -#define TXX927_SERIAL_PORT_DEFNS \ - { .baud_base = JMR3927_BASE_BAUD, .port = UART0_ADDR, .irq = UART0_INT, \ - .flags = UART0_FLAGS, .type = 1 }, \ - { .baud_base = JMR3927_BASE_BAUD, .port = UART1_ADDR, .irq = UART1_INT, \ - .flags = UART1_FLAGS, .type = 1 }, -#else -#define TXX927_SERIAL_PORT_DEFNS -#endif - #ifdef CONFIG_SERIAL_AU1X00 #include <asm/mach-au1x00/au1000.h> #ifdef CONFIG_SOC_AU1000 @@ -227,9 +206,9 @@ #define JAGUAR_ATX_SERIAL1_BASE 0xfd000023L #define _JAGUAR_ATX_SERIAL_INIT(int, base) \ - { baud_base: JAGUAR_ATX_BASE_BAUD, irq: int, \ - flags: (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST), \ - iomem_base: (u8 *) base, iomem_reg_shift: 2, \ + { .baud_base = JAGUAR_ATX_BASE_BAUD, irq: int, \ + .flags = (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST), \ + .iomem_base = (u8 *) base, iomem_reg_shift: 2, \ io_type: SERIAL_IO_MEM } #define MOMENCO_JAGUAR_ATX_SERIAL_PORT_DEFNS \ _JAGUAR_ATX_SERIAL_INIT(JAGUAR_ATX_SERIAL1_IRQ, JAGUAR_ATX_SERIAL1_BASE) @@ -243,9 +222,9 @@ #define OCELOT_3_SERIAL_BASE (signed)0xfd000020 #define _OCELOT_3_SERIAL_INIT(int, base) \ - { baud_base: OCELOT_3_BASE_BAUD, irq: int, \ - flags: STD_COM_FLAGS, \ - iomem_base: (u8 *) base, iomem_reg_shift: 2, \ + { .baud_base = OCELOT_3_BASE_BAUD, irq: int, \ + .flags = STD_COM_FLAGS, \ + .iomem_base = (u8 *) base, iomem_reg_shift: 2, \ io_type: SERIAL_IO_MEM } #define MOMENCO_OCELOT_3_SERIAL_PORT_DEFNS \ @@ -342,7 +321,6 @@ #endif /* CONFIG_SGI_IP32 */ #define SERIAL_PORT_DFNS \ - COBALT_SERIAL_PORT_DEFNS \ DDB5477_SERIAL_PORT_DEFNS \ EV96100_SERIAL_PORT_DEFNS \ IP32_SERIAL_PORT_DEFNS \ @@ -354,7 +332,6 @@ MOMENCO_OCELOT_C_SERIAL_PORT_DEFNS \ MOMENCO_OCELOT_SERIAL_PORT_DEFNS \ MOMENCO_OCELOT_3_SERIAL_PORT_DEFNS \ - TXX927_SERIAL_PORT_DEFNS \ AU1000_SERIAL_PORT_DEFNS #endif /* _ASM_SERIAL_H */ diff --git a/include/asm-mips/sgi/hpc3.h b/include/asm-mips/sgi/hpc3.h index ac3dfc7af5b0..fcec52bafb25 100644 --- a/include/asm-mips/sgi/hpc3.h +++ b/include/asm-mips/sgi/hpc3.h @@ -128,26 +128,26 @@ struct hpc3_ethregs { volatile u32 rx_gfptr; /* current GIO fifo ptr */ volatile u32 rx_dfptr; /* current device fifo ptr */ u32 _unused1; /* padding */ - volatile u32 rx_reset; /* reset register */ -#define HPC3_ERXRST_CRESET 0x1 /* Reset dma channel and external controller */ -#define HPC3_ERXRST_CLRIRQ 0x2 /* Clear channel interrupt */ -#define HPC3_ERXRST_LBACK 0x4 /* Enable diagnostic loopback mode of Seeq8003 */ - - volatile u32 rx_dconfig; /* DMA configuration register */ -#define HPC3_ERXDCFG_D1 0x0000f /* Cycles to spend in D1 state for PIO */ -#define HPC3_ERXDCFG_D2 0x000f0 /* Cycles to spend in D2 state for PIO */ -#define HPC3_ERXDCFG_D3 0x00f00 /* Cycles to spend in D3 state for PIO */ -#define HPC3_ERXDCFG_WCTRL 0x01000 /* Enable writes of desc into ex ctrl port */ -#define HPC3_ERXDCFG_FRXDC 0x02000 /* Clear eop stat bits upon rxdc, hw seeq fix */ -#define HPC3_ERXDCFG_FEOP 0x04000 /* Bad packet marker timeout enable */ -#define HPC3_ERXDCFG_FIRQ 0x08000 /* Another bad packet timeout enable */ -#define HPC3_ERXDCFG_PTO 0x30000 /* Programmed timeout value for above two */ - - volatile u32 rx_pconfig; /* PIO configuration register */ -#define HPC3_ERXPCFG_P1 0x000f /* Cycles to spend in P1 state for PIO */ -#define HPC3_ERXPCFG_P2 0x00f0 /* Cycles to spend in P2 state for PIO */ -#define HPC3_ERXPCFG_P3 0x0f00 /* Cycles to spend in P3 state for PIO */ -#define HPC3_ERXPCFG_TST 0x1000 /* Diagnistic ram test feature bit */ + volatile u32 reset; /* reset register */ +#define HPC3_ERST_CRESET 0x1 /* Reset dma channel and external controller */ +#define HPC3_ERST_CLRIRQ 0x2 /* Clear channel interrupt */ +#define HPC3_ERST_LBACK 0x4 /* Enable diagnostic loopback mode of Seeq8003 */ + + volatile u32 dconfig; /* DMA configuration register */ +#define HPC3_EDCFG_D1 0x0000f /* Cycles to spend in D1 state for PIO */ +#define HPC3_EDCFG_D2 0x000f0 /* Cycles to spend in D2 state for PIO */ +#define HPC3_EDCFG_D3 0x00f00 /* Cycles to spend in D3 state for PIO */ +#define HPC3_EDCFG_WCTRL 0x01000 /* Enable writes of desc into ex ctrl port */ +#define HPC3_EDCFG_FRXDC 0x02000 /* Clear eop stat bits upon rxdc, hw seeq fix */ +#define HPC3_EDCFG_FEOP 0x04000 /* Bad packet marker timeout enable */ +#define HPC3_EDCFG_FIRQ 0x08000 /* Another bad packet timeout enable */ +#define HPC3_EDCFG_PTO 0x30000 /* Programmed timeout value for above two */ + + volatile u32 pconfig; /* PIO configuration register */ +#define HPC3_EPCFG_P1 0x000f /* Cycles to spend in P1 state for PIO */ +#define HPC3_EPCFG_P2 0x00f0 /* Cycles to spend in P2 state for PIO */ +#define HPC3_EPCFG_P3 0x0f00 /* Cycles to spend in P3 state for PIO */ +#define HPC3_EPCFG_TST 0x1000 /* Diagnistic ram test feature bit */ u32 _unused2[0x1000/4 - 8]; /* padding */ diff --git a/include/asm-mips/sibyte/bcm1480_int.h b/include/asm-mips/sibyte/bcm1480_int.h new file mode 100644 index 000000000000..42d4cf00efd3 --- /dev/null +++ b/include/asm-mips/sibyte/bcm1480_int.h @@ -0,0 +1,310 @@ +/* ********************************************************************* + * BCM1280/BCM1480 Board Support Package + * + * Interrupt Mapper definitions File: bcm1480_int.h + * + * This module contains constants for manipulating the + * BCM1255/BCM1280/BCM1455/BCM1480's interrupt mapper and + * definitions for the interrupt sources. + * + * BCM1480 specification level: 1X55_1X80-UM100-D4 (11/24/03) + * + ********************************************************************* + * + * Copyright 2000,2001,2002,2003 + * Broadcom Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + ********************************************************************* */ + + +#ifndef _BCM1480_INT_H +#define _BCM1480_INT_H + +#include "sb1250_defs.h" + +/* ********************************************************************* + * Interrupt Mapper Constants + ********************************************************************* */ + +/* + * The interrupt mapper deals with 128-bit logical registers that are + * implemented as pairs of 64-bit registers, with the "low" 64 bits in + * a register that has an address 0x1000 higher(!) than the + * corresponding "high" register. + * + * For appropriate registers, bit 0 of the "high" register is a + * cascade bit that summarizes (as a bit-OR) the 64 bits of the "low" + * register. + */ + +/* + * This entire file uses _BCM1480_ in all the symbols because it is + * entirely BCM1480 specific. + */ + +/* + * Interrupt sources (Table 22) + */ + +#define K_BCM1480_INT_SOURCES 128 + +#define _BCM1480_INT_HIGH(k) (k) +#define _BCM1480_INT_LOW(k) ((k)+64) + +#define K_BCM1480_INT_ADDR_TRAP _BCM1480_INT_HIGH(1) +#define K_BCM1480_INT_GPIO_0 _BCM1480_INT_HIGH(4) +#define K_BCM1480_INT_GPIO_1 _BCM1480_INT_HIGH(5) +#define K_BCM1480_INT_GPIO_2 _BCM1480_INT_HIGH(6) +#define K_BCM1480_INT_GPIO_3 _BCM1480_INT_HIGH(7) +#define K_BCM1480_INT_PCI_INTA _BCM1480_INT_HIGH(8) +#define K_BCM1480_INT_PCI_INTB _BCM1480_INT_HIGH(9) +#define K_BCM1480_INT_PCI_INTC _BCM1480_INT_HIGH(10) +#define K_BCM1480_INT_PCI_INTD _BCM1480_INT_HIGH(11) +#define K_BCM1480_INT_CYCLE_CP0 _BCM1480_INT_HIGH(12) +#define K_BCM1480_INT_CYCLE_CP1 _BCM1480_INT_HIGH(13) +#define K_BCM1480_INT_CYCLE_CP2 _BCM1480_INT_HIGH(14) +#define K_BCM1480_INT_CYCLE_CP3 _BCM1480_INT_HIGH(15) +#define K_BCM1480_INT_TIMER_0 _BCM1480_INT_HIGH(20) +#define K_BCM1480_INT_TIMER_1 _BCM1480_INT_HIGH(21) +#define K_BCM1480_INT_TIMER_2 _BCM1480_INT_HIGH(22) +#define K_BCM1480_INT_TIMER_3 _BCM1480_INT_HIGH(23) +#define K_BCM1480_INT_DM_CH_0 _BCM1480_INT_HIGH(28) +#define K_BCM1480_INT_DM_CH_1 _BCM1480_INT_HIGH(29) +#define K_BCM1480_INT_DM_CH_2 _BCM1480_INT_HIGH(30) +#define K_BCM1480_INT_DM_CH_3 _BCM1480_INT_HIGH(31) +#define K_BCM1480_INT_MAC_0 _BCM1480_INT_HIGH(36) +#define K_BCM1480_INT_MAC_0_CH1 _BCM1480_INT_HIGH(37) +#define K_BCM1480_INT_MAC_1 _BCM1480_INT_HIGH(38) +#define K_BCM1480_INT_MAC_1_CH1 _BCM1480_INT_HIGH(39) +#define K_BCM1480_INT_MAC_2 _BCM1480_INT_HIGH(40) +#define K_BCM1480_INT_MAC_2_CH1 _BCM1480_INT_HIGH(41) +#define K_BCM1480_INT_MAC_3 _BCM1480_INT_HIGH(42) +#define K_BCM1480_INT_MAC_3_CH1 _BCM1480_INT_HIGH(43) +#define K_BCM1480_INT_PMI_LOW _BCM1480_INT_HIGH(52) +#define K_BCM1480_INT_PMI_HIGH _BCM1480_INT_HIGH(53) +#define K_BCM1480_INT_PMO_LOW _BCM1480_INT_HIGH(54) +#define K_BCM1480_INT_PMO_HIGH _BCM1480_INT_HIGH(55) +#define K_BCM1480_INT_MBOX_0_0 _BCM1480_INT_HIGH(56) +#define K_BCM1480_INT_MBOX_0_1 _BCM1480_INT_HIGH(57) +#define K_BCM1480_INT_MBOX_0_2 _BCM1480_INT_HIGH(58) +#define K_BCM1480_INT_MBOX_0_3 _BCM1480_INT_HIGH(59) +#define K_BCM1480_INT_MBOX_1_0 _BCM1480_INT_HIGH(60) +#define K_BCM1480_INT_MBOX_1_1 _BCM1480_INT_HIGH(61) +#define K_BCM1480_INT_MBOX_1_2 _BCM1480_INT_HIGH(62) +#define K_BCM1480_INT_MBOX_1_3 _BCM1480_INT_HIGH(63) + +#define K_BCM1480_INT_BAD_ECC _BCM1480_INT_LOW(1) +#define K_BCM1480_INT_COR_ECC _BCM1480_INT_LOW(2) +#define K_BCM1480_INT_IO_BUS _BCM1480_INT_LOW(3) +#define K_BCM1480_INT_PERF_CNT _BCM1480_INT_LOW(4) +#define K_BCM1480_INT_SW_PERF_CNT _BCM1480_INT_LOW(5) +#define K_BCM1480_INT_TRACE_FREEZE _BCM1480_INT_LOW(6) +#define K_BCM1480_INT_SW_TRACE_FREEZE _BCM1480_INT_LOW(7) +#define K_BCM1480_INT_WATCHDOG_TIMER_0 _BCM1480_INT_LOW(8) +#define K_BCM1480_INT_WATCHDOG_TIMER_1 _BCM1480_INT_LOW(9) +#define K_BCM1480_INT_WATCHDOG_TIMER_2 _BCM1480_INT_LOW(10) +#define K_BCM1480_INT_WATCHDOG_TIMER_3 _BCM1480_INT_LOW(11) +#define K_BCM1480_INT_PCI_ERROR _BCM1480_INT_LOW(16) +#define K_BCM1480_INT_PCI_RESET _BCM1480_INT_LOW(17) +#define K_BCM1480_INT_NODE_CONTROLLER _BCM1480_INT_LOW(18) +#define K_BCM1480_INT_HOST_BRIDGE _BCM1480_INT_LOW(19) +#define K_BCM1480_INT_PORT_0_FATAL _BCM1480_INT_LOW(20) +#define K_BCM1480_INT_PORT_0_NONFATAL _BCM1480_INT_LOW(21) +#define K_BCM1480_INT_PORT_1_FATAL _BCM1480_INT_LOW(22) +#define K_BCM1480_INT_PORT_1_NONFATAL _BCM1480_INT_LOW(23) +#define K_BCM1480_INT_PORT_2_FATAL _BCM1480_INT_LOW(24) +#define K_BCM1480_INT_PORT_2_NONFATAL _BCM1480_INT_LOW(25) +#define K_BCM1480_INT_LDT_SMI _BCM1480_INT_LOW(32) +#define K_BCM1480_INT_LDT_NMI _BCM1480_INT_LOW(33) +#define K_BCM1480_INT_LDT_INIT _BCM1480_INT_LOW(34) +#define K_BCM1480_INT_LDT_STARTUP _BCM1480_INT_LOW(35) +#define K_BCM1480_INT_LDT_EXT _BCM1480_INT_LOW(36) +#define K_BCM1480_INT_SMB_0 _BCM1480_INT_LOW(40) +#define K_BCM1480_INT_SMB_1 _BCM1480_INT_LOW(41) +#define K_BCM1480_INT_PCMCIA _BCM1480_INT_LOW(42) +#define K_BCM1480_INT_UART_0 _BCM1480_INT_LOW(44) +#define K_BCM1480_INT_UART_1 _BCM1480_INT_LOW(45) +#define K_BCM1480_INT_UART_2 _BCM1480_INT_LOW(46) +#define K_BCM1480_INT_UART_3 _BCM1480_INT_LOW(47) +#define K_BCM1480_INT_GPIO_4 _BCM1480_INT_LOW(52) +#define K_BCM1480_INT_GPIO_5 _BCM1480_INT_LOW(53) +#define K_BCM1480_INT_GPIO_6 _BCM1480_INT_LOW(54) +#define K_BCM1480_INT_GPIO_7 _BCM1480_INT_LOW(55) +#define K_BCM1480_INT_GPIO_8 _BCM1480_INT_LOW(56) +#define K_BCM1480_INT_GPIO_9 _BCM1480_INT_LOW(57) +#define K_BCM1480_INT_GPIO_10 _BCM1480_INT_LOW(58) +#define K_BCM1480_INT_GPIO_11 _BCM1480_INT_LOW(59) +#define K_BCM1480_INT_GPIO_12 _BCM1480_INT_LOW(60) +#define K_BCM1480_INT_GPIO_13 _BCM1480_INT_LOW(61) +#define K_BCM1480_INT_GPIO_14 _BCM1480_INT_LOW(62) +#define K_BCM1480_INT_GPIO_15 _BCM1480_INT_LOW(63) + +/* + * Mask values for each interrupt + */ + +#define _BCM1480_INT_MASK1(n) _SB_MAKEMASK1(((n) & 0x3F)) +#define _BCM1480_INT_OFFSET(n) (((n) & 0x40) << 6) + +#define M_BCM1480_INT_CASCADE _BCM1480_INT_MASK1(_BCM1480_INT_HIGH(0)) + +#define M_BCM1480_INT_ADDR_TRAP _BCM1480_INT_MASK1(K_BCM1480_INT_ADDR_TRAP) +#define M_BCM1480_INT_GPIO_0 _BCM1480_INT_MASK1(K_BCM1480_INT_GPIO_0) +#define M_BCM1480_INT_GPIO_1 _BCM1480_INT_MASK1(K_BCM1480_INT_GPIO_1) +#define M_BCM1480_INT_GPIO_2 _BCM1480_INT_MASK1(K_BCM1480_INT_GPIO_2) +#define M_BCM1480_INT_GPIO_3 _BCM1480_INT_MASK1(K_BCM1480_INT_GPIO_3) +#define M_BCM1480_INT_PCI_INTA _BCM1480_INT_MASK1(K_BCM1480_INT_PCI_INTA) +#define M_BCM1480_INT_PCI_INTB _BCM1480_INT_MASK1(K_BCM1480_INT_PCI_INTB) +#define M_BCM1480_INT_PCI_INTC _BCM1480_INT_MASK1(K_BCM1480_INT_PCI_INTC) +#define M_BCM1480_INT_PCI_INTD _BCM1480_INT_MASK1(K_BCM1480_INT_PCI_INTD) +#define M_BCM1480_INT_CYCLE_CP0 _BCM1480_INT_MASK1(K_BCM1480_INT_CYCLE_CP0) +#define M_BCM1480_INT_CYCLE_CP1 _BCM1480_INT_MASK1(K_BCM1480_INT_CYCLE_CP1) +#define M_BCM1480_INT_CYCLE_CP2 _BCM1480_INT_MASK1(K_BCM1480_INT_CYCLE_CP2) +#define M_BCM1480_INT_CYCLE_CP3 _BCM1480_INT_MASK1(K_BCM1480_INT_CYCLE_CP3) +#define M_BCM1480_INT_TIMER_0 _BCM1480_INT_MASK1(K_BCM1480_INT_TIMER_0) +#define M_BCM1480_INT_TIMER_1 _BCM1480_INT_MASK1(K_BCM1480_INT_TIMER_1) +#define M_BCM1480_INT_TIMER_2 _BCM1480_INT_MASK1(K_BCM1480_INT_TIMER_2) +#define M_BCM1480_INT_TIMER_3 _BCM1480_INT_MASK1(K_BCM1480_INT_TIMER_3) +#define M_BCM1480_INT_DM_CH_0 _BCM1480_INT_MASK1(K_BCM1480_INT_DM_CH_0) +#define M_BCM1480_INT_DM_CH_1 _BCM1480_INT_MASK1(K_BCM1480_INT_DM_CH_1) +#define M_BCM1480_INT_DM_CH_2 _BCM1480_INT_MASK1(K_BCM1480_INT_DM_CH_2) +#define M_BCM1480_INT_DM_CH_3 _BCM1480_INT_MASK1(K_BCM1480_INT_DM_CH_3) +#define M_BCM1480_INT_MAC_0 _BCM1480_INT_MASK1(K_BCM1480_INT_MAC_0) +#define M_BCM1480_INT_MAC_0_CH1 _BCM1480_INT_MASK1(K_BCM1480_INT_MAC_0_CH1) +#define M_BCM1480_INT_MAC_1 _BCM1480_INT_MASK1(K_BCM1480_INT_MAC_1) +#define M_BCM1480_INT_MAC_1_CH1 _BCM1480_INT_MASK1(K_BCM1480_INT_MAC_1_CH1) +#define M_BCM1480_INT_MAC_2 _BCM1480_INT_MASK1(K_BCM1480_INT_MAC_2) +#define M_BCM1480_INT_MAC_2_CH1 _BCM1480_INT_MASK1(K_BCM1480_INT_MAC_2_CH1) +#define M_BCM1480_INT_MAC_3 _BCM1480_INT_MASK1(K_BCM1480_INT_MAC_3) +#define M_BCM1480_INT_MAC_3_CH1 _BCM1480_INT_MASK1(K_BCM1480_INT_MAC_3_CH1) +#define M_BCM1480_INT_PMI_LOW _BCM1480_INT_MASK1(K_BCM1480_INT_PMI_LOW) +#define M_BCM1480_INT_PMI_HIGH _BCM1480_INT_MASK1(K_BCM1480_INT_PMI_HIGH) +#define M_BCM1480_INT_PMO_LOW _BCM1480_INT_MASK1(K_BCM1480_INT_PMO_LOW) +#define M_BCM1480_INT_PMO_HIGH _BCM1480_INT_MASK1(K_BCM1480_INT_PMO_HIGH) +#define M_BCM1480_INT_MBOX_0_0 _BCM1480_INT_MASK1(K_BCM1480_INT_MBOX_0_0) +#define M_BCM1480_INT_MBOX_0_1 _BCM1480_INT_MASK1(K_BCM1480_INT_MBOX_0_1) +#define M_BCM1480_INT_MBOX_0_2 _BCM1480_INT_MASK1(K_BCM1480_INT_MBOX_0_2) +#define M_BCM1480_INT_MBOX_0_3 _BCM1480_INT_MASK1(K_BCM1480_INT_MBOX_0_3) +#define M_BCM1480_INT_MBOX_1_0 _BCM1480_INT_MASK1(K_BCM1480_INT_MBOX_1_0) +#define M_BCM1480_INT_MBOX_1_1 _BCM1480_INT_MASK1(K_BCM1480_INT_MBOX_1_1) +#define M_BCM1480_INT_MBOX_1_2 _BCM1480_INT_MASK1(K_BCM1480_INT_MBOX_1_2) +#define M_BCM1480_INT_MBOX_1_3 _BCM1480_INT_MASK1(K_BCM1480_INT_MBOX_1_3) +#define M_BCM1480_INT_BAD_ECC _BCM1480_INT_MASK1(K_BCM1480_INT_BAD_ECC) +#define M_BCM1480_INT_COR_ECC _BCM1480_INT_MASK1(K_BCM1480_INT_COR_ECC) +#define M_BCM1480_INT_IO_BUS _BCM1480_INT_MASK1(K_BCM1480_INT_IO_BUS) +#define M_BCM1480_INT_PERF_CNT _BCM1480_INT_MASK1(K_BCM1480_INT_PERF_CNT) +#define M_BCM1480_INT_SW_PERF_CNT _BCM1480_INT_MASK1(K_BCM1480_INT_SW_PERF_CNT) +#define M_BCM1480_INT_TRACE_FREEZE _BCM1480_INT_MASK1(K_BCM1480_INT_TRACE_FREEZE) +#define M_BCM1480_INT_SW_TRACE_FREEZE _BCM1480_INT_MASK1(K_BCM1480_INT_SW_TRACE_FREEZE) +#define M_BCM1480_INT_WATCHDOG_TIMER_0 _BCM1480_INT_MASK1(K_BCM1480_INT_WATCHDOG_TIMER_0) +#define M_BCM1480_INT_WATCHDOG_TIMER_1 _BCM1480_INT_MASK1(K_BCM1480_INT_WATCHDOG_TIMER_1) +#define M_BCM1480_INT_WATCHDOG_TIMER_2 _BCM1480_INT_MASK1(K_BCM1480_INT_WATCHDOG_TIMER_2) +#define M_BCM1480_INT_WATCHDOG_TIMER_3 _BCM1480_INT_MASK1(K_BCM1480_INT_WATCHDOG_TIMER_3) +#define M_BCM1480_INT_PCI_ERROR _BCM1480_INT_MASK1(K_BCM1480_INT_PCI_ERROR) +#define M_BCM1480_INT_PCI_RESET _BCM1480_INT_MASK1(K_BCM1480_INT_PCI_RESET) +#define M_BCM1480_INT_NODE_CONTROLLER _BCM1480_INT_MASK1(K_BCM1480_INT_NODE_CONTROLLER) +#define M_BCM1480_INT_HOST_BRIDGE _BCM1480_INT_MASK1(K_BCM1480_INT_HOST_BRIDGE) +#define M_BCM1480_INT_PORT_0_FATAL _BCM1480_INT_MASK1(K_BCM1480_INT_PORT_0_FATAL) +#define M_BCM1480_INT_PORT_0_NONFATAL _BCM1480_INT_MASK1(K_BCM1480_INT_PORT_0_NONFATAL) +#define M_BCM1480_INT_PORT_1_FATAL _BCM1480_INT_MASK1(K_BCM1480_INT_PORT_1_FATAL) +#define M_BCM1480_INT_PORT_1_NONFATAL _BCM1480_INT_MASK1(K_BCM1480_INT_PORT_1_NONFATAL) +#define M_BCM1480_INT_PORT_2_FATAL _BCM1480_INT_MASK1(K_BCM1480_INT_PORT_2_FATAL) +#define M_BCM1480_INT_PORT_2_NONFATAL _BCM1480_INT_MASK1(K_BCM1480_INT_PORT_2_NONFATAL) +#define M_BCM1480_INT_LDT_SMI _BCM1480_INT_MASK1(K_BCM1480_INT_LDT_SMI) +#define M_BCM1480_INT_LDT_NMI _BCM1480_INT_MASK1(K_BCM1480_INT_LDT_NMI) +#define M_BCM1480_INT_LDT_INIT _BCM1480_INT_MASK1(K_BCM1480_INT_LDT_INIT) +#define M_BCM1480_INT_LDT_STARTUP _BCM1480_INT_MASK1(K_BCM1480_INT_LDT_STARTUP) +#define M_BCM1480_INT_LDT_EXT _BCM1480_INT_MASK1(K_BCM1480_INT_LDT_EXT) +#define M_BCM1480_INT_SMB_0 _BCM1480_INT_MASK1(K_BCM1480_INT_SMB_0) +#define M_BCM1480_INT_SMB_1 _BCM1480_INT_MASK1(K_BCM1480_INT_SMB_1) +#define M_BCM1480_INT_PCMCIA _BCM1480_INT_MASK1(K_BCM1480_INT_PCMCIA) +#define M_BCM1480_INT_UART_0 _BCM1480_INT_MASK1(K_BCM1480_INT_UART_0) +#define M_BCM1480_INT_UART_1 _BCM1480_INT_MASK1(K_BCM1480_INT_UART_1) +#define M_BCM1480_INT_UART_2 _BCM1480_INT_MASK1(K_BCM1480_INT_UART_2) +#define M_BCM1480_INT_UART_3 _BCM1480_INT_MASK1(K_BCM1480_INT_UART_3) +#define M_BCM1480_INT_GPIO_4 _BCM1480_INT_MASK1(K_BCM1480_INT_GPIO_4) +#define M_BCM1480_INT_GPIO_5 _BCM1480_INT_MASK1(K_BCM1480_INT_GPIO_5) +#define M_BCM1480_INT_GPIO_6 _BCM1480_INT_MASK1(K_BCM1480_INT_GPIO_6) +#define M_BCM1480_INT_GPIO_7 _BCM1480_INT_MASK1(K_BCM1480_INT_GPIO_7) +#define M_BCM1480_INT_GPIO_8 _BCM1480_INT_MASK1(K_BCM1480_INT_GPIO_8) +#define M_BCM1480_INT_GPIO_9 _BCM1480_INT_MASK1(K_BCM1480_INT_GPIO_9) +#define M_BCM1480_INT_GPIO_10 _BCM1480_INT_MASK1(K_BCM1480_INT_GPIO_10) +#define M_BCM1480_INT_GPIO_11 _BCM1480_INT_MASK1(K_BCM1480_INT_GPIO_11) +#define M_BCM1480_INT_GPIO_12 _BCM1480_INT_MASK1(K_BCM1480_INT_GPIO_12) +#define M_BCM1480_INT_GPIO_13 _BCM1480_INT_MASK1(K_BCM1480_INT_GPIO_13) +#define M_BCM1480_INT_GPIO_14 _BCM1480_INT_MASK1(K_BCM1480_INT_GPIO_14) +#define M_BCM1480_INT_GPIO_15 _BCM1480_INT_MASK1(K_BCM1480_INT_GPIO_15) + +/* + * Interrupt mappings (Table 18) + */ + +#define K_BCM1480_INT_MAP_I0 0 /* interrupt pins on processor */ +#define K_BCM1480_INT_MAP_I1 1 +#define K_BCM1480_INT_MAP_I2 2 +#define K_BCM1480_INT_MAP_I3 3 +#define K_BCM1480_INT_MAP_I4 4 +#define K_BCM1480_INT_MAP_I5 5 +#define K_BCM1480_INT_MAP_NMI 6 /* nonmaskable */ +#define K_BCM1480_INT_MAP_DINT 7 /* debug interrupt */ + +/* + * Interrupt LDT Set Register (Table 19) + */ + +#define S_BCM1480_INT_HT_INTMSG 0 +#define M_BCM1480_INT_HT_INTMSG _SB_MAKEMASK(3,S_BCM1480_INT_HT_INTMSG) +#define V_BCM1480_INT_HT_INTMSG(x) _SB_MAKEVALUE(x,S_BCM1480_INT_HT_INTMSG) +#define G_BCM1480_INT_HT_INTMSG(x) _SB_GETVALUE(x,S_BCM1480_INT_HT_INTMSG,M_BCM1480_INT_HT_INTMSG) + +#define K_BCM1480_INT_HT_INTMSG_FIXED 0 +#define K_BCM1480_INT_HT_INTMSG_ARBITRATED 1 +#define K_BCM1480_INT_HT_INTMSG_SMI 2 +#define K_BCM1480_INT_HT_INTMSG_NMI 3 +#define K_BCM1480_INT_HT_INTMSG_INIT 4 +#define K_BCM1480_INT_HT_INTMSG_STARTUP 5 +#define K_BCM1480_INT_HT_INTMSG_EXTINT 6 +#define K_BCM1480_INT_HT_INTMSG_RESERVED 7 + +#define M_BCM1480_INT_HT_TRIGGERMODE _SB_MAKEMASK1(3) +#define V_BCM1480_INT_HT_EDGETRIGGER 0 +#define V_BCM1480_INT_HT_LEVELTRIGGER M_BCM1480_INT_HT_TRIGGERMODE + +#define M_BCM1480_INT_HT_DESTMODE _SB_MAKEMASK1(4) +#define V_BCM1480_INT_HT_PHYSICALDEST 0 +#define V_BCM1480_INT_HT_LOGICALDEST M_BCM1480_INT_HT_DESTMODE + +#define S_BCM1480_INT_HT_INTDEST 5 +#define M_BCM1480_INT_HT_INTDEST _SB_MAKEMASK(8,S_BCM1480_INT_HT_INTDEST) +#define V_BCM1480_INT_HT_INTDEST(x) _SB_MAKEVALUE(x,S_BCM1480_INT_HT_INTDEST) +#define G_BCM1480_INT_HT_INTDEST(x) _SB_GETVALUE(x,S_BCM1480_INT_HT_INTDEST,M_BCM1480_INT_HT_INTDEST) + +#define S_BCM1480_INT_HT_VECTOR 13 +#define M_BCM1480_INT_HT_VECTOR _SB_MAKEMASK(8,S_BCM1480_INT_HT_VECTOR) +#define V_BCM1480_INT_HT_VECTOR(x) _SB_MAKEVALUE(x,S_BCM1480_INT_HT_VECTOR) +#define G_BCM1480_INT_HT_VECTOR(x) _SB_GETVALUE(x,S_BCM1480_INT_HT_VECTOR,M_BCM1480_INT_HT_VECTOR) + +/* + * Vector prefix (Table 4-7) + */ + +#define M_BCM1480_HTVECT_RAISE_INTLDT_HIGH 0x00 +#define M_BCM1480_HTVECT_RAISE_MBOX_0 0x40 +#define M_BCM1480_HTVECT_RAISE_INTLDT_LO 0x80 +#define M_BCM1480_HTVECT_RAISE_MBOX_1 0xC0 + +#endif /* _BCM1480_INT_H */ diff --git a/include/asm-mips/sibyte/bcm1480_l2c.h b/include/asm-mips/sibyte/bcm1480_l2c.h new file mode 100644 index 000000000000..886b099565e6 --- /dev/null +++ b/include/asm-mips/sibyte/bcm1480_l2c.h @@ -0,0 +1,176 @@ +/* ********************************************************************* + * BCM1280/BCM1480 Board Support Package + * + * L2 Cache constants and macros File: bcm1480_l2c.h + * + * This module contains constants useful for manipulating the + * level 2 cache. + * + * BCM1400 specification level: 1280-UM100-D2 (11/14/03) + * + ********************************************************************* + * + * Copyright 2000,2001,2002,2003 + * Broadcom Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + ********************************************************************* */ + + +#ifndef _BCM1480_L2C_H +#define _BCM1480_L2C_H + +#include "sb1250_defs.h" + +/* + * Format of level 2 cache management address (Table 55) + */ + +#define S_BCM1480_L2C_MGMT_INDEX 5 +#define M_BCM1480_L2C_MGMT_INDEX _SB_MAKEMASK(12,S_BCM1480_L2C_MGMT_INDEX) +#define V_BCM1480_L2C_MGMT_INDEX(x) _SB_MAKEVALUE(x,S_BCM1480_L2C_MGMT_INDEX) +#define G_BCM1480_L2C_MGMT_INDEX(x) _SB_GETVALUE(x,S_BCM1480_L2C_MGMT_INDEX,M_BCM1480_L2C_MGMT_INDEX) + +#define S_BCM1480_L2C_MGMT_WAY 17 +#define M_BCM1480_L2C_MGMT_WAY _SB_MAKEMASK(3,S_BCM1480_L2C_MGMT_WAY) +#define V_BCM1480_L2C_MGMT_WAY(x) _SB_MAKEVALUE(x,S_BCM1480_L2C_MGMT_WAY) +#define G_BCM1480_L2C_MGMT_WAY(x) _SB_GETVALUE(x,S_BCM1480_L2C_MGMT_WAY,M_BCM1480_L2C_MGMT_WAY) + +#define M_BCM1480_L2C_MGMT_DIRTY _SB_MAKEMASK1(20) +#define M_BCM1480_L2C_MGMT_VALID _SB_MAKEMASK1(21) + +#define S_BCM1480_L2C_MGMT_ECC_DIAG 22 +#define M_BCM1480_L2C_MGMT_ECC_DIAG _SB_MAKEMASK(2,S_BCM1480_L2C_MGMT_ECC_DIAG) +#define V_BCM1480_L2C_MGMT_ECC_DIAG(x) _SB_MAKEVALUE(x,S_BCM1480_L2C_MGMT_ECC_DIAG) +#define G_BCM1480_L2C_MGMT_ECC_DIAG(x) _SB_GETVALUE(x,S_BCM1480_L2C_MGMT_ECC_DIAG,M_BCM1480_L2C_MGMT_ECC_DIAG) + +#define A_BCM1480_L2C_MGMT_TAG_BASE 0x00D0000000 + +#define BCM1480_L2C_ENTRIES_PER_WAY 4096 +#define BCM1480_L2C_NUM_WAYS 8 + + +/* + * Level 2 Cache Tag register (Table 59) + */ + +#define S_BCM1480_L2C_TAG_MBZ 0 +#define M_BCM1480_L2C_TAG_MBZ _SB_MAKEMASK(5,S_BCM1480_L2C_TAG_MBZ) + +#define S_BCM1480_L2C_TAG_INDEX 5 +#define M_BCM1480_L2C_TAG_INDEX _SB_MAKEMASK(12,S_BCM1480_L2C_TAG_INDEX) +#define V_BCM1480_L2C_TAG_INDEX(x) _SB_MAKEVALUE(x,S_BCM1480_L2C_TAG_INDEX) +#define G_BCM1480_L2C_TAG_INDEX(x) _SB_GETVALUE(x,S_BCM1480_L2C_TAG_INDEX,M_BCM1480_L2C_TAG_INDEX) + +/* Note that index bit 16 is also tag bit 40 */ +#define S_BCM1480_L2C_TAG_TAG 17 +#define M_BCM1480_L2C_TAG_TAG _SB_MAKEMASK(23,S_BCM1480_L2C_TAG_TAG) +#define V_BCM1480_L2C_TAG_TAG(x) _SB_MAKEVALUE(x,S_BCM1480_L2C_TAG_TAG) +#define G_BCM1480_L2C_TAG_TAG(x) _SB_GETVALUE(x,S_BCM1480_L2C_TAG_TAG,M_BCM1480_L2C_TAG_TAG) + +#define S_BCM1480_L2C_TAG_ECC 40 +#define M_BCM1480_L2C_TAG_ECC _SB_MAKEMASK(6,S_BCM1480_L2C_TAG_ECC) +#define V_BCM1480_L2C_TAG_ECC(x) _SB_MAKEVALUE(x,S_BCM1480_L2C_TAG_ECC) +#define G_BCM1480_L2C_TAG_ECC(x) _SB_GETVALUE(x,S_BCM1480_L2C_TAG_ECC,M_BCM1480_L2C_TAG_ECC) + +#define S_BCM1480_L2C_TAG_WAY 46 +#define M_BCM1480_L2C_TAG_WAY _SB_MAKEMASK(3,S_BCM1480_L2C_TAG_WAY) +#define V_BCM1480_L2C_TAG_WAY(x) _SB_MAKEVALUE(x,S_BCM1480_L2C_TAG_WAY) +#define G_BCM1480_L2C_TAG_WAY(x) _SB_GETVALUE(x,S_BCM1480_L2C_TAG_WAY,M_BCM1480_L2C_TAG_WAY) + +#define M_BCM1480_L2C_TAG_DIRTY _SB_MAKEMASK1(49) +#define M_BCM1480_L2C_TAG_VALID _SB_MAKEMASK1(50) + +#define S_BCM1480_L2C_DATA_ECC 51 +#define M_BCM1480_L2C_DATA_ECC _SB_MAKEMASK(10,S_BCM1480_L2C_DATA_ECC) +#define V_BCM1480_L2C_DATA_ECC(x) _SB_MAKEVALUE(x,S_BCM1480_L2C_DATA_ECC) +#define G_BCM1480_L2C_DATA_ECC(x) _SB_GETVALUE(x,S_BCM1480_L2C_DATA_ECC,M_BCM1480_L2C_DATA_ECC) + + +/* + * L2 Misc0 Value Register (Table 60) + */ + +#define S_BCM1480_L2C_MISC0_WAY_REMOTE 0 +#define M_BCM1480_L2C_MISC0_WAY_REMOTE _SB_MAKEMASK(8,S_BCM1480_L2C_MISC0_WAY_REMOTE) +#define G_BCM1480_L2C_MISC0_WAY_REMOTE(x) _SB_GETVALUE(x,S_BCM1480_L2C_MISC0_WAY_REMOTE,M_BCM1480_L2C_MISC0_WAY_REMOTE) + +#define S_BCM1480_L2C_MISC0_WAY_LOCAL 8 +#define M_BCM1480_L2C_MISC0_WAY_LOCAL _SB_MAKEMASK(8,S_BCM1480_L2C_MISC0_WAY_LOCAL) +#define G_BCM1480_L2C_MISC0_WAY_LOCAL(x) _SB_GETVALUE(x,S_BCM1480_L2C_MISC0_WAY_LOCAL,M_BCM1480_L2C_MISC0_WAY_LOCAL) + +#define S_BCM1480_L2C_MISC0_WAY_ENABLE 16 +#define M_BCM1480_L2C_MISC0_WAY_ENABLE _SB_MAKEMASK(8,S_BCM1480_L2C_MISC0_WAY_ENABLE) +#define G_BCM1480_L2C_MISC0_WAY_ENABLE(x) _SB_GETVALUE(x,S_BCM1480_L2C_MISC0_WAY_ENABLE,M_BCM1480_L2C_MISC0_WAY_ENABLE) + +#define S_BCM1480_L2C_MISC0_CACHE_DISABLE 24 +#define M_BCM1480_L2C_MISC0_CACHE_DISABLE _SB_MAKEMASK(2,S_BCM1480_L2C_MISC0_CACHE_DISABLE) +#define G_BCM1480_L2C_MISC0_CACHE_DISABLE(x) _SB_GETVALUE(x,S_BCM1480_L2C_MISC0_CACHE_DISABLE,M_BCM1480_L2C_MISC0_CACHE_DISABLE) + +#define S_BCM1480_L2C_MISC0_CACHE_QUAD 26 +#define M_BCM1480_L2C_MISC0_CACHE_QUAD _SB_MAKEMASK(2,S_BCM1480_L2C_MISC0_CACHE_QUAD) +#define G_BCM1480_L2C_MISC0_CACHE_QUAD(x) _SB_GETVALUE(x,S_BCM1480_L2C_MISC0_CACHE_QUAD,M_BCM1480_L2C_MISC0_CACHE_QUAD) + +#define S_BCM1480_L2C_MISC0_MC_PRIORITY 30 +#define M_BCM1480_L2C_MISC0_MC_PRIORITY _SB_MAKEMASK1(S_BCM1480_L2C_MISC0_MC_PRIORITY) + +#define S_BCM1480_L2C_MISC0_ECC_CLEANUP 31 +#define M_BCM1480_L2C_MISC0_ECC_CLEANUP _SB_MAKEMASK1(S_BCM1480_L2C_MISC0_ECC_CLEANUP) + + +/* + * L2 Misc1 Value Register (Table 60) + */ + +#define S_BCM1480_L2C_MISC1_WAY_AGENT_0 0 +#define M_BCM1480_L2C_MISC1_WAY_AGENT_0 _SB_MAKEMASK(8,S_BCM1480_L2C_MISC1_WAY_AGENT_0) +#define G_BCM1480_L2C_MISC1_WAY_AGENT_0(x) _SB_GETVALUE(x,S_BCM1480_L2C_MISC1_WAY_AGENT_0,M_BCM1480_L2C_MISC1_WAY_AGENT_0) + +#define S_BCM1480_L2C_MISC1_WAY_AGENT_1 8 +#define M_BCM1480_L2C_MISC1_WAY_AGENT_1 _SB_MAKEMASK(8,S_BCM1480_L2C_MISC1_WAY_AGENT_1) +#define G_BCM1480_L2C_MISC1_WAY_AGENT_1(x) _SB_GETVALUE(x,S_BCM1480_L2C_MISC1_WAY_AGENT_1,M_BCM1480_L2C_MISC1_WAY_AGENT_1) + +#define S_BCM1480_L2C_MISC1_WAY_AGENT_2 16 +#define M_BCM1480_L2C_MISC1_WAY_AGENT_2 _SB_MAKEMASK(8,S_BCM1480_L2C_MISC1_WAY_AGENT_2) +#define G_BCM1480_L2C_MISC1_WAY_AGENT_2(x) _SB_GETVALUE(x,S_BCM1480_L2C_MISC1_WAY_AGENT_2,M_BCM1480_L2C_MISC1_WAY_AGENT_2) + +#define S_BCM1480_L2C_MISC1_WAY_AGENT_3 24 +#define M_BCM1480_L2C_MISC1_WAY_AGENT_3 _SB_MAKEMASK(8,S_BCM1480_L2C_MISC1_WAY_AGENT_3) +#define G_BCM1480_L2C_MISC1_WAY_AGENT_3(x) _SB_GETVALUE(x,S_BCM1480_L2C_MISC1_WAY_AGENT_3,M_BCM1480_L2C_MISC1_WAY_AGENT_3) + +#define S_BCM1480_L2C_MISC1_WAY_AGENT_4 32 +#define M_BCM1480_L2C_MISC1_WAY_AGENT_4 _SB_MAKEMASK(8,S_BCM1480_L2C_MISC1_WAY_AGENT_4) +#define G_BCM1480_L2C_MISC1_WAY_AGENT_4(x) _SB_GETVALUE(x,S_BCM1480_L2C_MISC1_WAY_AGENT_4,M_BCM1480_L2C_MISC1_WAY_AGENT_4) + + +/* + * L2 Misc2 Value Register (Table 60) + */ + +#define S_BCM1480_L2C_MISC2_WAY_AGENT_8 0 +#define M_BCM1480_L2C_MISC2_WAY_AGENT_8 _SB_MAKEMASK(8,S_BCM1480_L2C_MISC2_WAY_AGENT_8) +#define G_BCM1480_L2C_MISC2_WAY_AGENT_8(x) _SB_GETVALUE(x,S_BCM1480_L2C_MISC2_WAY_AGENT_8,M_BCM1480_L2C_MISC2_WAY_AGENT_8) + +#define S_BCM1480_L2C_MISC2_WAY_AGENT_9 8 +#define M_BCM1480_L2C_MISC2_WAY_AGENT_9 _SB_MAKEMASK(8,S_BCM1480_L2C_MISC2_WAY_AGENT_9) +#define G_BCM1480_L2C_MISC2_WAY_AGENT_9(x) _SB_GETVALUE(x,S_BCM1480_L2C_MISC2_WAY_AGENT_9,M_BCM1480_L2C_MISC2_WAY_AGENT_9) + +#define S_BCM1480_L2C_MISC2_WAY_AGENT_A 16 +#define M_BCM1480_L2C_MISC2_WAY_AGENT_A _SB_MAKEMASK(8,S_BCM1480_L2C_MISC2_WAY_AGENT_A) +#define G_BCM1480_L2C_MISC2_WAY_AGENT_A(x) _SB_GETVALUE(x,S_BCM1480_L2C_MISC2_WAY_AGENT_A,M_BCM1480_L2C_MISC2_WAY_AGENT_A) + + +#endif /* _BCM1480_L2C_H */ diff --git a/include/asm-mips/sibyte/bcm1480_mc.h b/include/asm-mips/sibyte/bcm1480_mc.h new file mode 100644 index 000000000000..6bdc941afc91 --- /dev/null +++ b/include/asm-mips/sibyte/bcm1480_mc.h @@ -0,0 +1,962 @@ +/* ********************************************************************* + * BCM1280/BCM1480 Board Support Package + * + * Memory Controller constants File: bcm1480_mc.h + * + * This module contains constants and macros useful for + * programming the memory controller. + * + * BCM1400 specification level: 1280-UM100-D1 (11/14/03 Review Copy) + * + ********************************************************************* + * + * Copyright 2000,2001,2002,2003 + * Broadcom Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + ********************************************************************* */ + + +#ifndef _BCM1480_MC_H +#define _BCM1480_MC_H + +#include "sb1250_defs.h" + +/* + * Memory Channel Configuration Register (Table 81) + */ + +#define S_BCM1480_MC_INTLV0 0 +#define M_BCM1480_MC_INTLV0 _SB_MAKEMASK(6,S_BCM1480_MC_INTLV0) +#define V_BCM1480_MC_INTLV0(x) _SB_MAKEVALUE(x,S_BCM1480_MC_INTLV0) +#define G_BCM1480_MC_INTLV0(x) _SB_GETVALUE(x,S_BCM1480_MC_INTLV0,M_BCM1480_MC_INTLV0) +#define V_BCM1480_MC_INTLV0_DEFAULT V_BCM1480_MC_INTLV0(0) + +#define S_BCM1480_MC_INTLV1 8 +#define M_BCM1480_MC_INTLV1 _SB_MAKEMASK(6,S_BCM1480_MC_INTLV1) +#define V_BCM1480_MC_INTLV1(x) _SB_MAKEVALUE(x,S_BCM1480_MC_INTLV1) +#define G_BCM1480_MC_INTLV1(x) _SB_GETVALUE(x,S_BCM1480_MC_INTLV1,M_BCM1480_MC_INTLV1) +#define V_BCM1480_MC_INTLV1_DEFAULT V_BCM1480_MC_INTLV1(0) + +#define S_BCM1480_MC_INTLV2 16 +#define M_BCM1480_MC_INTLV2 _SB_MAKEMASK(6,S_BCM1480_MC_INTLV2) +#define V_BCM1480_MC_INTLV2(x) _SB_MAKEVALUE(x,S_BCM1480_MC_INTLV2) +#define G_BCM1480_MC_INTLV2(x) _SB_GETVALUE(x,S_BCM1480_MC_INTLV2,M_BCM1480_MC_INTLV2) +#define V_BCM1480_MC_INTLV2_DEFAULT V_BCM1480_MC_INTLV2(0) + +#define S_BCM1480_MC_CS_MODE 32 +#define M_BCM1480_MC_CS_MODE _SB_MAKEMASK(8,S_BCM1480_MC_CS_MODE) +#define V_BCM1480_MC_CS_MODE(x) _SB_MAKEVALUE(x,S_BCM1480_MC_CS_MODE) +#define G_BCM1480_MC_CS_MODE(x) _SB_GETVALUE(x,S_BCM1480_MC_CS_MODE,M_BCM1480_MC_CS_MODE) +#define V_BCM1480_MC_CS_MODE_DEFAULT V_BCM1480_MC_CS_MODE(0) + +#define V_BCM1480_MC_CONFIG_DEFAULT (V_BCM1480_MC_INTLV0_DEFAULT | \ + V_BCM1480_MC_INTLV1_DEFAULT | \ + V_BCM1480_MC_INTLV2_DEFAULT | \ + V_BCM1480_MC_CS_MODE_DEFAULT) + +#define K_BCM1480_MC_CS01_MODE 0x03 +#define K_BCM1480_MC_CS02_MODE 0x05 +#define K_BCM1480_MC_CS0123_MODE 0x0F +#define K_BCM1480_MC_CS0246_MODE 0x55 +#define K_BCM1480_MC_CS0145_MODE 0x33 +#define K_BCM1480_MC_CS0167_MODE 0xC3 +#define K_BCM1480_MC_CSFULL_MODE 0xFF + +/* + * Chip Select Start Address Register (Table 82) + */ + +#define S_BCM1480_MC_CS0_START 0 +#define M_BCM1480_MC_CS0_START _SB_MAKEMASK(12,S_BCM1480_MC_CS0_START) +#define V_BCM1480_MC_CS0_START(x) _SB_MAKEVALUE(x,S_BCM1480_MC_CS0_START) +#define G_BCM1480_MC_CS0_START(x) _SB_GETVALUE(x,S_BCM1480_MC_CS0_START,M_BCM1480_MC_CS0_START) + +#define S_BCM1480_MC_CS1_START 16 +#define M_BCM1480_MC_CS1_START _SB_MAKEMASK(12,S_BCM1480_MC_CS1_START) +#define V_BCM1480_MC_CS1_START(x) _SB_MAKEVALUE(x,S_BCM1480_MC_CS1_START) +#define G_BCM1480_MC_CS1_START(x) _SB_GETVALUE(x,S_BCM1480_MC_CS1_START,M_BCM1480_MC_CS1_START) + +#define S_BCM1480_MC_CS2_START 32 +#define M_BCM1480_MC_CS2_START _SB_MAKEMASK(12,S_BCM1480_MC_CS2_START) +#define V_BCM1480_MC_CS2_START(x) _SB_MAKEVALUE(x,S_BCM1480_MC_CS2_START) +#define G_BCM1480_MC_CS2_START(x) _SB_GETVALUE(x,S_BCM1480_MC_CS2_START,M_BCM1480_MC_CS2_START) + +#define S_BCM1480_MC_CS3_START 48 +#define M_BCM1480_MC_CS3_START _SB_MAKEMASK(12,S_BCM1480_MC_CS3_START) +#define V_BCM1480_MC_CS3_START(x) _SB_MAKEVALUE(x,S_BCM1480_MC_CS3_START) +#define G_BCM1480_MC_CS3_START(x) _SB_GETVALUE(x,S_BCM1480_MC_CS3_START,M_BCM1480_MC_CS3_START) + +/* + * Chip Select End Address Register (Table 83) + */ + +#define S_BCM1480_MC_CS0_END 0 +#define M_BCM1480_MC_CS0_END _SB_MAKEMASK(12,S_BCM1480_MC_CS0_END) +#define V_BCM1480_MC_CS0_END(x) _SB_MAKEVALUE(x,S_BCM1480_MC_CS0_END) +#define G_BCM1480_MC_CS0_END(x) _SB_GETVALUE(x,S_BCM1480_MC_CS0_END,M_BCM1480_MC_CS0_END) + +#define S_BCM1480_MC_CS1_END 16 +#define M_BCM1480_MC_CS1_END _SB_MAKEMASK(12,S_BCM1480_MC_CS1_END) +#define V_BCM1480_MC_CS1_END(x) _SB_MAKEVALUE(x,S_BCM1480_MC_CS1_END) +#define G_BCM1480_MC_CS1_END(x) _SB_GETVALUE(x,S_BCM1480_MC_CS1_END,M_BCM1480_MC_CS1_END) + +#define S_BCM1480_MC_CS2_END 32 +#define M_BCM1480_MC_CS2_END _SB_MAKEMASK(12,S_BCM1480_MC_CS2_END) +#define V_BCM1480_MC_CS2_END(x) _SB_MAKEVALUE(x,S_BCM1480_MC_CS2_END) +#define G_BCM1480_MC_CS2_END(x) _SB_GETVALUE(x,S_BCM1480_MC_CS2_END,M_BCM1480_MC_CS2_END) + +#define S_BCM1480_MC_CS3_END 48 +#define M_BCM1480_MC_CS3_END _SB_MAKEMASK(12,S_BCM1480_MC_CS3_END) +#define V_BCM1480_MC_CS3_END(x) _SB_MAKEVALUE(x,S_BCM1480_MC_CS3_END) +#define G_BCM1480_MC_CS3_END(x) _SB_GETVALUE(x,S_BCM1480_MC_CS3_END,M_BCM1480_MC_CS3_END) + +/* + * Row Address Bit Select Register 0 (Table 84) + */ + +#define S_BCM1480_MC_ROW00 0 +#define M_BCM1480_MC_ROW00 _SB_MAKEMASK(6,S_BCM1480_MC_ROW00) +#define V_BCM1480_MC_ROW00(x) _SB_MAKEVALUE(x,S_BCM1480_MC_ROW00) +#define G_BCM1480_MC_ROW00(x) _SB_GETVALUE(x,S_BCM1480_MC_ROW00,M_BCM1480_MC_ROW00) + +#define S_BCM1480_MC_ROW01 8 +#define M_BCM1480_MC_ROW01 _SB_MAKEMASK(6,S_BCM1480_MC_ROW01) +#define V_BCM1480_MC_ROW01(x) _SB_MAKEVALUE(x,S_BCM1480_MC_ROW01) +#define G_BCM1480_MC_ROW01(x) _SB_GETVALUE(x,S_BCM1480_MC_ROW01,M_BCM1480_MC_ROW01) + +#define S_BCM1480_MC_ROW02 16 +#define M_BCM1480_MC_ROW02 _SB_MAKEMASK(6,S_BCM1480_MC_ROW02) +#define V_BCM1480_MC_ROW02(x) _SB_MAKEVALUE(x,S_BCM1480_MC_ROW02) +#define G_BCM1480_MC_ROW02(x) _SB_GETVALUE(x,S_BCM1480_MC_ROW02,M_BCM1480_MC_ROW02) + +#define S_BCM1480_MC_ROW03 24 +#define M_BCM1480_MC_ROW03 _SB_MAKEMASK(6,S_BCM1480_MC_ROW03) +#define V_BCM1480_MC_ROW03(x) _SB_MAKEVALUE(x,S_BCM1480_MC_ROW03) +#define G_BCM1480_MC_ROW03(x) _SB_GETVALUE(x,S_BCM1480_MC_ROW03,M_BCM1480_MC_ROW03) + +#define S_BCM1480_MC_ROW04 32 +#define M_BCM1480_MC_ROW04 _SB_MAKEMASK(6,S_BCM1480_MC_ROW04) +#define V_BCM1480_MC_ROW04(x) _SB_MAKEVALUE(x,S_BCM1480_MC_ROW04) +#define G_BCM1480_MC_ROW04(x) _SB_GETVALUE(x,S_BCM1480_MC_ROW04,M_BCM1480_MC_ROW04) + +#define S_BCM1480_MC_ROW05 40 +#define M_BCM1480_MC_ROW05 _SB_MAKEMASK(6,S_BCM1480_MC_ROW05) +#define V_BCM1480_MC_ROW05(x) _SB_MAKEVALUE(x,S_BCM1480_MC_ROW05) +#define G_BCM1480_MC_ROW05(x) _SB_GETVALUE(x,S_BCM1480_MC_ROW05,M_BCM1480_MC_ROW05) + +#define S_BCM1480_MC_ROW06 48 +#define M_BCM1480_MC_ROW06 _SB_MAKEMASK(6,S_BCM1480_MC_ROW06) +#define V_BCM1480_MC_ROW06(x) _SB_MAKEVALUE(x,S_BCM1480_MC_ROW06) +#define G_BCM1480_MC_ROW06(x) _SB_GETVALUE(x,S_BCM1480_MC_ROW06,M_BCM1480_MC_ROW06) + +#define S_BCM1480_MC_ROW07 56 +#define M_BCM1480_MC_ROW07 _SB_MAKEMASK(6,S_BCM1480_MC_ROW07) +#define V_BCM1480_MC_ROW07(x) _SB_MAKEVALUE(x,S_BCM1480_MC_ROW07) +#define G_BCM1480_MC_ROW07(x) _SB_GETVALUE(x,S_BCM1480_MC_ROW07,M_BCM1480_MC_ROW07) + +/* + * Row Address Bit Select Register 1 (Table 85) + */ + +#define S_BCM1480_MC_ROW08 0 +#define M_BCM1480_MC_ROW08 _SB_MAKEMASK(6,S_BCM1480_MC_ROW08) +#define V_BCM1480_MC_ROW08(x) _SB_MAKEVALUE(x,S_BCM1480_MC_ROW08) +#define G_BCM1480_MC_ROW08(x) _SB_GETVALUE(x,S_BCM1480_MC_ROW08,M_BCM1480_MC_ROW08) + +#define S_BCM1480_MC_ROW09 8 +#define M_BCM1480_MC_ROW09 _SB_MAKEMASK(6,S_BCM1480_MC_ROW09) +#define V_BCM1480_MC_ROW09(x) _SB_MAKEVALUE(x,S_BCM1480_MC_ROW09) +#define G_BCM1480_MC_ROW09(x) _SB_GETVALUE(x,S_BCM1480_MC_ROW09,M_BCM1480_MC_ROW09) + +#define S_BCM1480_MC_ROW10 16 +#define M_BCM1480_MC_ROW10 _SB_MAKEMASK(6,S_BCM1480_MC_ROW10) +#define V_BCM1480_MC_ROW10(x) _SB_MAKEVALUE(x,S_BCM1480_MC_ROW10) +#define G_BCM1480_MC_ROW10(x) _SB_GETVALUE(x,S_BCM1480_MC_ROW10,M_BCM1480_MC_ROW10) + +#define S_BCM1480_MC_ROW11 24 +#define M_BCM1480_MC_ROW11 _SB_MAKEMASK(6,S_BCM1480_MC_ROW11) +#define V_BCM1480_MC_ROW11(x) _SB_MAKEVALUE(x,S_BCM1480_MC_ROW11) +#define G_BCM1480_MC_ROW11(x) _SB_GETVALUE(x,S_BCM1480_MC_ROW11,M_BCM1480_MC_ROW11) + +#define S_BCM1480_MC_ROW12 32 +#define M_BCM1480_MC_ROW12 _SB_MAKEMASK(6,S_BCM1480_MC_ROW12) +#define V_BCM1480_MC_ROW12(x) _SB_MAKEVALUE(x,S_BCM1480_MC_ROW12) +#define G_BCM1480_MC_ROW12(x) _SB_GETVALUE(x,S_BCM1480_MC_ROW12,M_BCM1480_MC_ROW12) + +#define S_BCM1480_MC_ROW13 40 +#define M_BCM1480_MC_ROW13 _SB_MAKEMASK(6,S_BCM1480_MC_ROW13) +#define V_BCM1480_MC_ROW13(x) _SB_MAKEVALUE(x,S_BCM1480_MC_ROW13) +#define G_BCM1480_MC_ROW13(x) _SB_GETVALUE(x,S_BCM1480_MC_ROW13,M_BCM1480_MC_ROW13) + +#define S_BCM1480_MC_ROW14 48 +#define M_BCM1480_MC_ROW14 _SB_MAKEMASK(6,S_BCM1480_MC_ROW14) +#define V_BCM1480_MC_ROW14(x) _SB_MAKEVALUE(x,S_BCM1480_MC_ROW14) +#define G_BCM1480_MC_ROW14(x) _SB_GETVALUE(x,S_BCM1480_MC_ROW14,M_BCM1480_MC_ROW14) + +#define K_BCM1480_MC_ROWX_BIT_SPACING 8 + +/* + * Column Address Bit Select Register 0 (Table 86) + */ + +#define S_BCM1480_MC_COL00 0 +#define M_BCM1480_MC_COL00 _SB_MAKEMASK(6,S_BCM1480_MC_COL00) +#define V_BCM1480_MC_COL00(x) _SB_MAKEVALUE(x,S_BCM1480_MC_COL00) +#define G_BCM1480_MC_COL00(x) _SB_GETVALUE(x,S_BCM1480_MC_COL00,M_BCM1480_MC_COL00) + +#define S_BCM1480_MC_COL01 8 +#define M_BCM1480_MC_COL01 _SB_MAKEMASK(6,S_BCM1480_MC_COL01) +#define V_BCM1480_MC_COL01(x) _SB_MAKEVALUE(x,S_BCM1480_MC_COL01) +#define G_BCM1480_MC_COL01(x) _SB_GETVALUE(x,S_BCM1480_MC_COL01,M_BCM1480_MC_COL01) + +#define S_BCM1480_MC_COL02 16 +#define M_BCM1480_MC_COL02 _SB_MAKEMASK(6,S_BCM1480_MC_COL02) +#define V_BCM1480_MC_COL02(x) _SB_MAKEVALUE(x,S_BCM1480_MC_COL02) +#define G_BCM1480_MC_COL02(x) _SB_GETVALUE(x,S_BCM1480_MC_COL02,M_BCM1480_MC_COL02) + +#define S_BCM1480_MC_COL03 24 +#define M_BCM1480_MC_COL03 _SB_MAKEMASK(6,S_BCM1480_MC_COL03) +#define V_BCM1480_MC_COL03(x) _SB_MAKEVALUE(x,S_BCM1480_MC_COL03) +#define G_BCM1480_MC_COL03(x) _SB_GETVALUE(x,S_BCM1480_MC_COL03,M_BCM1480_MC_COL03) + +#define S_BCM1480_MC_COL04 32 +#define M_BCM1480_MC_COL04 _SB_MAKEMASK(6,S_BCM1480_MC_COL04) +#define V_BCM1480_MC_COL04(x) _SB_MAKEVALUE(x,S_BCM1480_MC_COL04) +#define G_BCM1480_MC_COL04(x) _SB_GETVALUE(x,S_BCM1480_MC_COL04,M_BCM1480_MC_COL04) + +#define S_BCM1480_MC_COL05 40 +#define M_BCM1480_MC_COL05 _SB_MAKEMASK(6,S_BCM1480_MC_COL05) +#define V_BCM1480_MC_COL05(x) _SB_MAKEVALUE(x,S_BCM1480_MC_COL05) +#define G_BCM1480_MC_COL05(x) _SB_GETVALUE(x,S_BCM1480_MC_COL05,M_BCM1480_MC_COL05) + +#define S_BCM1480_MC_COL06 48 +#define M_BCM1480_MC_COL06 _SB_MAKEMASK(6,S_BCM1480_MC_COL06) +#define V_BCM1480_MC_COL06(x) _SB_MAKEVALUE(x,S_BCM1480_MC_COL06) +#define G_BCM1480_MC_COL06(x) _SB_GETVALUE(x,S_BCM1480_MC_COL06,M_BCM1480_MC_COL06) + +#define S_BCM1480_MC_COL07 56 +#define M_BCM1480_MC_COL07 _SB_MAKEMASK(6,S_BCM1480_MC_COL07) +#define V_BCM1480_MC_COL07(x) _SB_MAKEVALUE(x,S_BCM1480_MC_COL07) +#define G_BCM1480_MC_COL07(x) _SB_GETVALUE(x,S_BCM1480_MC_COL07,M_BCM1480_MC_COL07) + +/* + * Column Address Bit Select Register 1 (Table 87) + */ + +#define S_BCM1480_MC_COL08 0 +#define M_BCM1480_MC_COL08 _SB_MAKEMASK(6,S_BCM1480_MC_COL08) +#define V_BCM1480_MC_COL08(x) _SB_MAKEVALUE(x,S_BCM1480_MC_COL08) +#define G_BCM1480_MC_COL08(x) _SB_GETVALUE(x,S_BCM1480_MC_COL08,M_BCM1480_MC_COL08) + +#define S_BCM1480_MC_COL09 8 +#define M_BCM1480_MC_COL09 _SB_MAKEMASK(6,S_BCM1480_MC_COL09) +#define V_BCM1480_MC_COL09(x) _SB_MAKEVALUE(x,S_BCM1480_MC_COL09) +#define G_BCM1480_MC_COL09(x) _SB_GETVALUE(x,S_BCM1480_MC_COL09,M_BCM1480_MC_COL09) + +#define S_BCM1480_MC_COL10 16 /* not a valid position, must be prog as 0 */ + +#define S_BCM1480_MC_COL11 24 +#define M_BCM1480_MC_COL11 _SB_MAKEMASK(6,S_BCM1480_MC_COL11) +#define V_BCM1480_MC_COL11(x) _SB_MAKEVALUE(x,S_BCM1480_MC_COL11) +#define G_BCM1480_MC_COL11(x) _SB_GETVALUE(x,S_BCM1480_MC_COL11,M_BCM1480_MC_COL11) + +#define S_BCM1480_MC_COL12 32 +#define M_BCM1480_MC_COL12 _SB_MAKEMASK(6,S_BCM1480_MC_COL12) +#define V_BCM1480_MC_COL12(x) _SB_MAKEVALUE(x,S_BCM1480_MC_COL12) +#define G_BCM1480_MC_COL12(x) _SB_GETVALUE(x,S_BCM1480_MC_COL12,M_BCM1480_MC_COL12) + +#define S_BCM1480_MC_COL13 40 +#define M_BCM1480_MC_COL13 _SB_MAKEMASK(6,S_BCM1480_MC_COL13) +#define V_BCM1480_MC_COL13(x) _SB_MAKEVALUE(x,S_BCM1480_MC_COL13) +#define G_BCM1480_MC_COL13(x) _SB_GETVALUE(x,S_BCM1480_MC_COL13,M_BCM1480_MC_COL13) + +#define S_BCM1480_MC_COL14 48 +#define M_BCM1480_MC_COL14 _SB_MAKEMASK(6,S_BCM1480_MC_COL14) +#define V_BCM1480_MC_COL14(x) _SB_MAKEVALUE(x,S_BCM1480_MC_COL14) +#define G_BCM1480_MC_COL14(x) _SB_GETVALUE(x,S_BCM1480_MC_COL14,M_BCM1480_MC_COL14) + +#define K_BCM1480_MC_COLX_BIT_SPACING 8 + +/* + * CS0 and CS1 Bank Address Bit Select Register (Table 88) + */ + +#define S_BCM1480_MC_CS01_BANK0 0 +#define M_BCM1480_MC_CS01_BANK0 _SB_MAKEMASK(6,S_BCM1480_MC_CS01_BANK0) +#define V_BCM1480_MC_CS01_BANK0(x) _SB_MAKEVALUE(x,S_BCM1480_MC_CS01_BANK0) +#define G_BCM1480_MC_CS01_BANK0(x) _SB_GETVALUE(x,S_BCM1480_MC_CS01_BANK0,M_BCM1480_MC_CS01_BANK0) + +#define S_BCM1480_MC_CS01_BANK1 8 +#define M_BCM1480_MC_CS01_BANK1 _SB_MAKEMASK(6,S_BCM1480_MC_CS01_BANK1) +#define V_BCM1480_MC_CS01_BANK1(x) _SB_MAKEVALUE(x,S_BCM1480_MC_CS01_BANK1) +#define G_BCM1480_MC_CS01_BANK1(x) _SB_GETVALUE(x,S_BCM1480_MC_CS01_BANK1,M_BCM1480_MC_CS01_BANK1) + +#define S_BCM1480_MC_CS01_BANK2 16 +#define M_BCM1480_MC_CS01_BANK2 _SB_MAKEMASK(6,S_BCM1480_MC_CS01_BANK2) +#define V_BCM1480_MC_CS01_BANK2(x) _SB_MAKEVALUE(x,S_BCM1480_MC_CS01_BANK2) +#define G_BCM1480_MC_CS01_BANK2(x) _SB_GETVALUE(x,S_BCM1480_MC_CS01_BANK2,M_BCM1480_MC_CS01_BANK2) + +/* + * CS2 and CS3 Bank Address Bit Select Register (Table 89) + */ + +#define S_BCM1480_MC_CS23_BANK0 0 +#define M_BCM1480_MC_CS23_BANK0 _SB_MAKEMASK(6,S_BCM1480_MC_CS23_BANK0) +#define V_BCM1480_MC_CS23_BANK0(x) _SB_MAKEVALUE(x,S_BCM1480_MC_CS23_BANK0) +#define G_BCM1480_MC_CS23_BANK0(x) _SB_GETVALUE(x,S_BCM1480_MC_CS23_BANK0,M_BCM1480_MC_CS23_BANK0) + +#define S_BCM1480_MC_CS23_BANK1 8 +#define M_BCM1480_MC_CS23_BANK1 _SB_MAKEMASK(6,S_BCM1480_MC_CS23_BANK1) +#define V_BCM1480_MC_CS23_BANK1(x) _SB_MAKEVALUE(x,S_BCM1480_MC_CS23_BANK1) +#define G_BCM1480_MC_CS23_BANK1(x) _SB_GETVALUE(x,S_BCM1480_MC_CS23_BANK1,M_BCM1480_MC_CS23_BANK1) + +#define S_BCM1480_MC_CS23_BANK2 16 +#define M_BCM1480_MC_CS23_BANK2 _SB_MAKEMASK(6,S_BCM1480_MC_CS23_BANK2) +#define V_BCM1480_MC_CS23_BANK2(x) _SB_MAKEVALUE(x,S_BCM1480_MC_CS23_BANK2) +#define G_BCM1480_MC_CS23_BANK2(x) _SB_GETVALUE(x,S_BCM1480_MC_CS23_BANK2,M_BCM1480_MC_CS23_BANK2) + +#define K_BCM1480_MC_CSXX_BANKX_BIT_SPACING 8 + +/* + * DRAM Command Register (Table 90) + */ + +#define S_BCM1480_MC_COMMAND 0 +#define M_BCM1480_MC_COMMAND _SB_MAKEMASK(4,S_BCM1480_MC_COMMAND) +#define V_BCM1480_MC_COMMAND(x) _SB_MAKEVALUE(x,S_BCM1480_MC_COMMAND) +#define G_BCM1480_MC_COMMAND(x) _SB_GETVALUE(x,S_BCM1480_MC_COMMAND,M_BCM1480_MC_COMMAND) + +#define K_BCM1480_MC_COMMAND_EMRS 0 +#define K_BCM1480_MC_COMMAND_MRS 1 +#define K_BCM1480_MC_COMMAND_PRE 2 +#define K_BCM1480_MC_COMMAND_AR 3 +#define K_BCM1480_MC_COMMAND_SETRFSH 4 +#define K_BCM1480_MC_COMMAND_CLRRFSH 5 +#define K_BCM1480_MC_COMMAND_SETPWRDN 6 +#define K_BCM1480_MC_COMMAND_CLRPWRDN 7 + +#if SIBYTE_HDR_FEATURE(1480, PASS2) +#define K_BCM1480_MC_COMMAND_EMRS2 8 +#define K_BCM1480_MC_COMMAND_EMRS3 9 +#define K_BCM1480_MC_COMMAND_ENABLE_MCLK 10 +#define K_BCM1480_MC_COMMAND_DISABLE_MCLK 11 +#endif + +#define V_BCM1480_MC_COMMAND_EMRS V_BCM1480_MC_COMMAND(K_BCM1480_MC_COMMAND_EMRS) +#define V_BCM1480_MC_COMMAND_MRS V_BCM1480_MC_COMMAND(K_BCM1480_MC_COMMAND_MRS) +#define V_BCM1480_MC_COMMAND_PRE V_BCM1480_MC_COMMAND(K_BCM1480_MC_COMMAND_PRE) +#define V_BCM1480_MC_COMMAND_AR V_BCM1480_MC_COMMAND(K_BCM1480_MC_COMMAND_AR) +#define V_BCM1480_MC_COMMAND_SETRFSH V_BCM1480_MC_COMMAND(K_BCM1480_MC_COMMAND_SETRFSH) +#define V_BCM1480_MC_COMMAND_CLRRFSH V_BCM1480_MC_COMMAND(K_BCM1480_MC_COMMAND_CLRRFSH) +#define V_BCM1480_MC_COMMAND_SETPWRDN V_BCM1480_MC_COMMAND(K_BCM1480_MC_COMMAND_SETPWRDN) +#define V_BCM1480_MC_COMMAND_CLRPWRDN V_BCM1480_MC_COMMAND(K_BCM1480_MC_COMMAND_CLRPWRDN) + +#if SIBYTE_HDR_FEATURE(1480, PASS2) +#define V_BCM1480_MC_COMMAND_EMRS2 V_BCM1480_MC_COMMAND(K_BCM1480_MC_COMMAND_EMRS2) +#define V_BCM1480_MC_COMMAND_EMRS3 V_BCM1480_MC_COMMAND(K_BCM1480_MC_COMMAND_EMRS3) +#define V_BCM1480_MC_COMMAND_ENABLE_MCLK V_BCM1480_MC_COMMAND(K_BCM1480_MC_COMMAND_ENABLE_MCLK) +#define V_BCM1480_MC_COMMAND_DISABLE_MCLK V_BCM1480_MC_COMMAND(K_BCM1480_MC_COMMAND_DISABLE_MCLK) +#endif + +#define S_BCM1480_MC_CS0 4 +#define M_BCM1480_MC_CS0 _SB_MAKEMASK1(4) +#define M_BCM1480_MC_CS1 _SB_MAKEMASK1(5) +#define M_BCM1480_MC_CS2 _SB_MAKEMASK1(6) +#define M_BCM1480_MC_CS3 _SB_MAKEMASK1(7) +#define M_BCM1480_MC_CS4 _SB_MAKEMASK1(8) +#define M_BCM1480_MC_CS5 _SB_MAKEMASK1(9) +#define M_BCM1480_MC_CS6 _SB_MAKEMASK1(10) +#define M_BCM1480_MC_CS7 _SB_MAKEMASK1(11) + +#define M_BCM1480_MC_CMD_ACTIVE _SB_MAKEMASK1(16) + +/* + * DRAM Mode Register (Table 91) + */ + +#define S_BCM1480_MC_EMODE 0 +#define M_BCM1480_MC_EMODE _SB_MAKEMASK(15,S_BCM1480_MC_EMODE) +#define V_BCM1480_MC_EMODE(x) _SB_MAKEVALUE(x,S_BCM1480_MC_EMODE) +#define G_BCM1480_MC_EMODE(x) _SB_GETVALUE(x,S_BCM1480_MC_EMODE,M_BCM1480_MC_EMODE) +#define V_BCM1480_MC_EMODE_DEFAULT V_BCM1480_MC_EMODE(0) + +#define S_BCM1480_MC_MODE 16 +#define M_BCM1480_MC_MODE _SB_MAKEMASK(15,S_BCM1480_MC_MODE) +#define V_BCM1480_MC_MODE(x) _SB_MAKEVALUE(x,S_BCM1480_MC_MODE) +#define G_BCM1480_MC_MODE(x) _SB_GETVALUE(x,S_BCM1480_MC_MODE,M_BCM1480_MC_MODE) +#define V_BCM1480_MC_MODE_DEFAULT V_BCM1480_MC_MODE(0) + +#define S_BCM1480_MC_DRAM_TYPE 32 +#define M_BCM1480_MC_DRAM_TYPE _SB_MAKEMASK(4,S_BCM1480_MC_DRAM_TYPE) +#define V_BCM1480_MC_DRAM_TYPE(x) _SB_MAKEVALUE(x,S_BCM1480_MC_DRAM_TYPE) +#define G_BCM1480_MC_DRAM_TYPE(x) _SB_GETVALUE(x,S_BCM1480_MC_DRAM_TYPE,M_BCM1480_MC_DRAM_TYPE) + +#define K_BCM1480_MC_DRAM_TYPE_JEDEC 0 +#define K_BCM1480_MC_DRAM_TYPE_FCRAM 1 + +#if SIBYTE_HDR_FEATURE(1480, PASS2) +#define K_BCM1480_MC_DRAM_TYPE_DDR2 2 +#endif + +#define V_BCM1480_MC_DRAM_TYPE_JEDEC V_BCM1480_MC_DRAM_TYPE(K_BCM1480_MC_DRAM_TYPE_JEDEC) +#define V_BCM1480_MC_DRAM_TYPE_FCRAM V_BCM1480_MC_DRAM_TYPE(K_BCM1480_MC_DRAM_TYPE_FCRAM) + +#if SIBYTE_HDR_FEATURE(1480, PASS2) +#define V_BCM1480_MC_DRAM_TYPE_DDR2 V_BCM1480_MC_DRAM_TYPE(K_BCM1480_MC_DRAM_TYPE_DDR2) +#endif + +#define M_BCM1480_MC_GANGED _SB_MAKEMASK1(36) +#define M_BCM1480_MC_BY9_INTF _SB_MAKEMASK1(37) +#define M_BCM1480_MC_FORCE_ECC64 _SB_MAKEMASK1(38) +#define M_BCM1480_MC_ECC_DISABLE _SB_MAKEMASK1(39) + +#define S_BCM1480_MC_PG_POLICY 40 +#define M_BCM1480_MC_PG_POLICY _SB_MAKEMASK(2,S_BCM1480_MC_PG_POLICY) +#define V_BCM1480_MC_PG_POLICY(x) _SB_MAKEVALUE(x,S_BCM1480_MC_PG_POLICY) +#define G_BCM1480_MC_PG_POLICY(x) _SB_GETVALUE(x,S_BCM1480_MC_PG_POLICY,M_BCM1480_MC_PG_POLICY) + +#define K_BCM1480_MC_PG_POLICY_CLOSED 0 +#define K_BCM1480_MC_PG_POLICY_CAS_TIME_CHK 1 + +#define V_BCM1480_MC_PG_POLICY_CLOSED V_BCM1480_MC_PG_POLICY(K_BCM1480_MC_PG_POLICY_CLOSED) +#define V_BCM1480_MC_PG_POLICY_CAS_TIME_CHK V_BCM1480_MC_PG_POLICY(K_BCM1480_MC_PG_POLICY_CAS_TIME_CHK) + +#if SIBYTE_HDR_FEATURE(1480, PASS2) +#define M_BCM1480_MC_2T_CMD _SB_MAKEMASK1(42) +#define M_BCM1480_MC_ECC_COR_DIS _SB_MAKEMASK1(43) +#endif + +#define V_BCM1480_MC_DRAMMODE_DEFAULT V_BCM1480_MC_EMODE_DEFAULT | V_BCM1480_MC_MODE_DEFAULT | V_BCM1480_MC_DRAM_TYPE_JEDEC | \ + V_BCM1480_MC_PG_POLICY(K_BCM1480_MC_PG_POLICY_CAS_TIME_CHK) + +/* + * Memory Clock Configuration Register (Table 92) + */ + +#define S_BCM1480_MC_CLK_RATIO 0 +#define M_BCM1480_MC_CLK_RATIO _SB_MAKEMASK(6,S_BCM1480_MC_CLK_RATIO) +#define V_BCM1480_MC_CLK_RATIO(x) _SB_MAKEVALUE(x,S_BCM1480_MC_CLK_RATIO) +#define G_BCM1480_MC_CLK_RATIO(x) _SB_GETVALUE(x,S_BCM1480_MC_CLK_RATIO,M_BCM1480_MC_CLK_RATIO) + +#define V_BCM1480_MC_CLK_RATIO_DEFAULT V_BCM1480_MC_CLK_RATIO(10) + +#define S_BCM1480_MC_REF_RATE 8 +#define M_BCM1480_MC_REF_RATE _SB_MAKEMASK(8,S_BCM1480_MC_REF_RATE) +#define V_BCM1480_MC_REF_RATE(x) _SB_MAKEVALUE(x,S_BCM1480_MC_REF_RATE) +#define G_BCM1480_MC_REF_RATE(x) _SB_GETVALUE(x,S_BCM1480_MC_REF_RATE,M_BCM1480_MC_REF_RATE) + +#define K_BCM1480_MC_REF_RATE_100MHz 0x31 +#define K_BCM1480_MC_REF_RATE_200MHz 0x62 +#define K_BCM1480_MC_REF_RATE_400MHz 0xC4 + +#define V_BCM1480_MC_REF_RATE_100MHz V_BCM1480_MC_REF_RATE(K_BCM1480_MC_REF_RATE_100MHz) +#define V_BCM1480_MC_REF_RATE_200MHz V_BCM1480_MC_REF_RATE(K_BCM1480_MC_REF_RATE_200MHz) +#define V_BCM1480_MC_REF_RATE_400MHz V_BCM1480_MC_REF_RATE(K_BCM1480_MC_REF_RATE_400MHz) +#define V_BCM1480_MC_REF_RATE_DEFAULT V_BCM1480_MC_REF_RATE_400MHz + +#if SIBYTE_HDR_FEATURE(1480, PASS2) +#define M_BCM1480_MC_AUTO_REF_DIS _SB_MAKEMASK1(16) +#endif + +/* + * ODT Register (Table 99) + */ + +#if SIBYTE_HDR_FEATURE(1480, PASS2) +#define M_BCM1480_MC_RD_ODT0_CS0 _SB_MAKEMASK1(0) +#define M_BCM1480_MC_RD_ODT0_CS2 _SB_MAKEMASK1(1) +#define M_BCM1480_MC_RD_ODT0_CS4 _SB_MAKEMASK1(2) +#define M_BCM1480_MC_RD_ODT0_CS6 _SB_MAKEMASK1(3) +#define M_BCM1480_MC_WR_ODT0_CS0 _SB_MAKEMASK1(4) +#define M_BCM1480_MC_WR_ODT0_CS2 _SB_MAKEMASK1(5) +#define M_BCM1480_MC_WR_ODT0_CS4 _SB_MAKEMASK1(6) +#define M_BCM1480_MC_WR_ODT0_CS6 _SB_MAKEMASK1(7) +#define M_BCM1480_MC_RD_ODT2_CS0 _SB_MAKEMASK1(8) +#define M_BCM1480_MC_RD_ODT2_CS2 _SB_MAKEMASK1(9) +#define M_BCM1480_MC_RD_ODT2_CS4 _SB_MAKEMASK1(10) +#define M_BCM1480_MC_RD_ODT2_CS6 _SB_MAKEMASK1(11) +#define M_BCM1480_MC_WR_ODT2_CS0 _SB_MAKEMASK1(12) +#define M_BCM1480_MC_WR_ODT2_CS2 _SB_MAKEMASK1(13) +#define M_BCM1480_MC_WR_ODT2_CS4 _SB_MAKEMASK1(14) +#define M_BCM1480_MC_WR_ODT2_CS6 _SB_MAKEMASK1(15) +#define M_BCM1480_MC_RD_ODT4_CS0 _SB_MAKEMASK1(16) +#define M_BCM1480_MC_RD_ODT4_CS2 _SB_MAKEMASK1(17) +#define M_BCM1480_MC_RD_ODT4_CS4 _SB_MAKEMASK1(18) +#define M_BCM1480_MC_RD_ODT4_CS6 _SB_MAKEMASK1(19) +#define M_BCM1480_MC_WR_ODT4_CS0 _SB_MAKEMASK1(20) +#define M_BCM1480_MC_WR_ODT4_CS2 _SB_MAKEMASK1(21) +#define M_BCM1480_MC_WR_ODT4_CS4 _SB_MAKEMASK1(22) +#define M_BCM1480_MC_WR_ODT4_CS6 _SB_MAKEMASK1(23) +#define M_BCM1480_MC_RD_ODT6_CS0 _SB_MAKEMASK1(24) +#define M_BCM1480_MC_RD_ODT6_CS2 _SB_MAKEMASK1(25) +#define M_BCM1480_MC_RD_ODT6_CS4 _SB_MAKEMASK1(26) +#define M_BCM1480_MC_RD_ODT6_CS6 _SB_MAKEMASK1(27) +#define M_BCM1480_MC_WR_ODT6_CS0 _SB_MAKEMASK1(28) +#define M_BCM1480_MC_WR_ODT6_CS2 _SB_MAKEMASK1(29) +#define M_BCM1480_MC_WR_ODT6_CS4 _SB_MAKEMASK1(30) +#define M_BCM1480_MC_WR_ODT6_CS6 _SB_MAKEMASK1(31) + +#define M_BCM1480_MC_CS_ODD_ODT_EN _SB_MAKEMASK1(32) +#endif + +/* + * Memory DLL Configuration Register (Table 93) + */ + +#define S_BCM1480_MC_ADDR_COARSE_ADJ 0 +#define M_BCM1480_MC_ADDR_COARSE_ADJ _SB_MAKEMASK(6,S_BCM1480_MC_ADDR_COARSE_ADJ) +#define V_BCM1480_MC_ADDR_COARSE_ADJ(x) _SB_MAKEVALUE(x,S_BCM1480_MC_ADDR_COARSE_ADJ) +#define G_BCM1480_MC_ADDR_COARSE_ADJ(x) _SB_GETVALUE(x,S_BCM1480_MC_ADDR_COARSE_ADJ,M_BCM1480_MC_ADDR_COARSE_ADJ) +#define V_BCM1480_MC_ADDR_COARSE_ADJ_DEFAULT V_BCM1480_MC_ADDR_COARSE_ADJ(0x0) + +#if SIBYTE_HDR_FEATURE(1480, PASS2) +#define S_BCM1480_MC_ADDR_FREQ_RANGE 8 +#define M_BCM1480_MC_ADDR_FREQ_RANGE _SB_MAKEMASK(4,S_BCM1480_MC_ADDR_FREQ_RANGE) +#define V_BCM1480_MC_ADDR_FREQ_RANGE(x) _SB_MAKEVALUE(x,S_BCM1480_MC_ADDR_FREQ_RANGE) +#define G_BCM1480_MC_ADDR_FREQ_RANGE(x) _SB_GETVALUE(x,S_BCM1480_MC_ADDR_FREQ_RANGE,M_BCM1480_MC_ADDR_FREQ_RANGE) +#define V_BCM1480_MC_ADDR_FREQ_RANGE_DEFAULT V_BCM1480_MC_ADDR_FREQ_RANGE(0x4) +#endif + +#define S_BCM1480_MC_ADDR_FINE_ADJ 8 +#define M_BCM1480_MC_ADDR_FINE_ADJ _SB_MAKEMASK(4,S_BCM1480_MC_ADDR_FINE_ADJ) +#define V_BCM1480_MC_ADDR_FINE_ADJ(x) _SB_MAKEVALUE(x,S_BCM1480_MC_ADDR_FINE_ADJ) +#define G_BCM1480_MC_ADDR_FINE_ADJ(x) _SB_GETVALUE(x,S_BCM1480_MC_ADDR_FINE_ADJ,M_BCM1480_MC_ADDR_FINE_ADJ) +#define V_BCM1480_MC_ADDR_FINE_ADJ_DEFAULT V_BCM1480_MC_ADDR_FINE_ADJ(0x8) + +#define S_BCM1480_MC_DQI_COARSE_ADJ 16 +#define M_BCM1480_MC_DQI_COARSE_ADJ _SB_MAKEMASK(6,S_BCM1480_MC_DQI_COARSE_ADJ) +#define V_BCM1480_MC_DQI_COARSE_ADJ(x) _SB_MAKEVALUE(x,S_BCM1480_MC_DQI_COARSE_ADJ) +#define G_BCM1480_MC_DQI_COARSE_ADJ(x) _SB_GETVALUE(x,S_BCM1480_MC_DQI_COARSE_ADJ,M_BCM1480_MC_DQI_COARSE_ADJ) +#define V_BCM1480_MC_DQI_COARSE_ADJ_DEFAULT V_BCM1480_MC_DQI_COARSE_ADJ(0x0) + +#if SIBYTE_HDR_FEATURE(1480, PASS2) +#define S_BCM1480_MC_DQI_FREQ_RANGE 24 +#define M_BCM1480_MC_DQI_FREQ_RANGE _SB_MAKEMASK(4,S_BCM1480_MC_DQI_FREQ_RANGE) +#define V_BCM1480_MC_DQI_FREQ_RANGE(x) _SB_MAKEVALUE(x,S_BCM1480_MC_DQI_FREQ_RANGE) +#define G_BCM1480_MC_DQI_FREQ_RANGE(x) _SB_GETVALUE(x,S_BCM1480_MC_DQI_FREQ_RANGE,M_BCM1480_MC_DQI_FREQ_RANGE) +#define V_BCM1480_MC_DQI_FREQ_RANGE_DEFAULT V_BCM1480_MC_DQI_FREQ_RANGE(0x4) +#endif + +#define S_BCM1480_MC_DQI_FINE_ADJ 24 +#define M_BCM1480_MC_DQI_FINE_ADJ _SB_MAKEMASK(4,S_BCM1480_MC_DQI_FINE_ADJ) +#define V_BCM1480_MC_DQI_FINE_ADJ(x) _SB_MAKEVALUE(x,S_BCM1480_MC_DQI_FINE_ADJ) +#define G_BCM1480_MC_DQI_FINE_ADJ(x) _SB_GETVALUE(x,S_BCM1480_MC_DQI_FINE_ADJ,M_BCM1480_MC_DQI_FINE_ADJ) +#define V_BCM1480_MC_DQI_FINE_ADJ_DEFAULT V_BCM1480_MC_DQI_FINE_ADJ(0x8) + +#define S_BCM1480_MC_DQO_COARSE_ADJ 32 +#define M_BCM1480_MC_DQO_COARSE_ADJ _SB_MAKEMASK(6,S_BCM1480_MC_DQO_COARSE_ADJ) +#define V_BCM1480_MC_DQO_COARSE_ADJ(x) _SB_MAKEVALUE(x,S_BCM1480_MC_DQO_COARSE_ADJ) +#define G_BCM1480_MC_DQO_COARSE_ADJ(x) _SB_GETVALUE(x,S_BCM1480_MC_DQO_COARSE_ADJ,M_BCM1480_MC_DQO_COARSE_ADJ) +#define V_BCM1480_MC_DQO_COARSE_ADJ_DEFAULT V_BCM1480_MC_DQO_COARSE_ADJ(0x0) + +#if SIBYTE_HDR_FEATURE(1480, PASS2) +#define S_BCM1480_MC_DQO_FREQ_RANGE 40 +#define M_BCM1480_MC_DQO_FREQ_RANGE _SB_MAKEMASK(4,S_BCM1480_MC_DQO_FREQ_RANGE) +#define V_BCM1480_MC_DQO_FREQ_RANGE(x) _SB_MAKEVALUE(x,S_BCM1480_MC_DQO_FREQ_RANGE) +#define G_BCM1480_MC_DQO_FREQ_RANGE(x) _SB_GETVALUE(x,S_BCM1480_MC_DQO_FREQ_RANGE,M_BCM1480_MC_DQO_FREQ_RANGE) +#define V_BCM1480_MC_DQO_FREQ_RANGE_DEFAULT V_BCM1480_MC_DQO_FREQ_RANGE(0x4) +#endif + +#define S_BCM1480_MC_DQO_FINE_ADJ 40 +#define M_BCM1480_MC_DQO_FINE_ADJ _SB_MAKEMASK(4,S_BCM1480_MC_DQO_FINE_ADJ) +#define V_BCM1480_MC_DQO_FINE_ADJ(x) _SB_MAKEVALUE(x,S_BCM1480_MC_DQO_FINE_ADJ) +#define G_BCM1480_MC_DQO_FINE_ADJ(x) _SB_GETVALUE(x,S_BCM1480_MC_DQO_FINE_ADJ,M_BCM1480_MC_DQO_FINE_ADJ) +#define V_BCM1480_MC_DQO_FINE_ADJ_DEFAULT V_BCM1480_MC_DQO_FINE_ADJ(0x8) + +#if SIBYTE_HDR_FEATURE(1480, PASS2) +#define S_BCM1480_MC_DLL_PDSEL 44 +#define M_BCM1480_MC_DLL_PDSEL _SB_MAKEMASK(2,S_BCM1480_MC_DLL_PDSEL) +#define V_BCM1480_MC_DLL_PDSEL(x) _SB_MAKEVALUE(x,S_BCM1480_MC_DLL_PDSEL) +#define G_BCM1480_MC_DLL_PDSEL(x) _SB_GETVALUE(x,S_BCM1480_MC_DLL_PDSEL,M_BCM1480_MC_DLL_PDSEL) +#define V_BCM1480_MC_DLL_DEFAULT_PDSEL V_BCM1480_MC_DLL_PDSEL(0x0) + +#define M_BCM1480_MC_DLL_REGBYPASS _SB_MAKEMASK1(46) +#define M_BCM1480_MC_DQO_SHIFT _SB_MAKEMASK1(47) +#endif + +#define S_BCM1480_MC_DLL_DEFAULT 48 +#define M_BCM1480_MC_DLL_DEFAULT _SB_MAKEMASK(6,S_BCM1480_MC_DLL_DEFAULT) +#define V_BCM1480_MC_DLL_DEFAULT(x) _SB_MAKEVALUE(x,S_BCM1480_MC_DLL_DEFAULT) +#define G_BCM1480_MC_DLL_DEFAULT(x) _SB_GETVALUE(x,S_BCM1480_MC_DLL_DEFAULT,M_BCM1480_MC_DLL_DEFAULT) +#define V_BCM1480_MC_DLL_DEFAULT_DEFAULT V_BCM1480_MC_DLL_DEFAULT(0x10) + +#if SIBYTE_HDR_FEATURE(1480, PASS2) +#define S_BCM1480_MC_DLL_REGCTRL 54 +#define M_BCM1480_MC_DLL_REGCTRL _SB_MAKEMASK(2,S_BCM1480_MC_DLL_REGCTRL) +#define V_BCM1480_MC_DLL_REGCTRL(x) _SB_MAKEVALUE(x,S_BCM1480_MC_DLL_REGCTRL) +#define G_BCM1480_MC_DLL_REGCTRL(x) _SB_GETVALUE(x,S_BCM1480_MC_DLL_REGCTRL,M_BCM1480_MC_DLL_REGCTRL) +#define V_BCM1480_MC_DLL_DEFAULT_REGCTRL V_BCM1480_MC_DLL_REGCTRL(0x0) +#endif + +#if SIBYTE_HDR_FEATURE(1480, PASS2) +#define S_BCM1480_MC_DLL_FREQ_RANGE 56 +#define M_BCM1480_MC_DLL_FREQ_RANGE _SB_MAKEMASK(4,S_BCM1480_MC_DLL_FREQ_RANGE) +#define V_BCM1480_MC_DLL_FREQ_RANGE(x) _SB_MAKEVALUE(x,S_BCM1480_MC_DLL_FREQ_RANGE) +#define G_BCM1480_MC_DLL_FREQ_RANGE(x) _SB_GETVALUE(x,S_BCM1480_MC_DLL_FREQ_RANGE,M_BCM1480_MC_DLL_FREQ_RANGE) +#define V_BCM1480_MC_DLL_FREQ_RANGE_DEFAULT V_BCM1480_MC_DLL_FREQ_RANGE(0x4) +#endif + +#define S_BCM1480_MC_DLL_STEP_SIZE 56 +#define M_BCM1480_MC_DLL_STEP_SIZE _SB_MAKEMASK(4,S_BCM1480_MC_DLL_STEP_SIZE) +#define V_BCM1480_MC_DLL_STEP_SIZE(x) _SB_MAKEVALUE(x,S_BCM1480_MC_DLL_STEP_SIZE) +#define G_BCM1480_MC_DLL_STEP_SIZE(x) _SB_GETVALUE(x,S_BCM1480_MC_DLL_STEP_SIZE,M_BCM1480_MC_DLL_STEP_SIZE) +#define V_BCM1480_MC_DLL_STEP_SIZE_DEFAULT V_BCM1480_MC_DLL_STEP_SIZE(0x8) + +#if SIBYTE_HDR_FEATURE(1480, PASS2) +#define S_BCM1480_MC_DLL_BGCTRL 60 +#define M_BCM1480_MC_DLL_BGCTRL _SB_MAKEMASK(2,S_BCM1480_MC_DLL_BGCTRL) +#define V_BCM1480_MC_DLL_BGCTRL(x) _SB_MAKEVALUE(x,S_BCM1480_MC_DLL_BGCTRL) +#define G_BCM1480_MC_DLL_BGCTRL(x) _SB_GETVALUE(x,S_BCM1480_MC_DLL_BGCTRL,M_BCM1480_MC_DLL_BGCTRL) +#define V_BCM1480_MC_DLL_DEFAULT_BGCTRL V_BCM1480_MC_DLL_BGCTRL(0x0) +#endif + +#define M_BCM1480_MC_DLL_BYPASS _SB_MAKEMASK1(63) + +/* + * Memory Drive Configuration Register (Table 94) + */ + +#define S_BCM1480_MC_RTT_BYP_PULLDOWN 0 +#define M_BCM1480_MC_RTT_BYP_PULLDOWN _SB_MAKEMASK(3,S_BCM1480_MC_RTT_BYP_PULLDOWN) +#define V_BCM1480_MC_RTT_BYP_PULLDOWN(x) _SB_MAKEVALUE(x,S_BCM1480_MC_RTT_BYP_PULLDOWN) +#define G_BCM1480_MC_RTT_BYP_PULLDOWN(x) _SB_GETVALUE(x,S_BCM1480_MC_RTT_BYP_PULLDOWN,M_BCM1480_MC_RTT_BYP_PULLDOWN) + +#define S_BCM1480_MC_RTT_BYP_PULLUP 6 +#define M_BCM1480_MC_RTT_BYP_PULLUP _SB_MAKEMASK(3,S_BCM1480_MC_RTT_BYP_PULLUP) +#define V_BCM1480_MC_RTT_BYP_PULLUP(x) _SB_MAKEVALUE(x,S_BCM1480_MC_RTT_BYP_PULLUP) +#define G_BCM1480_MC_RTT_BYP_PULLUP(x) _SB_GETVALUE(x,S_BCM1480_MC_RTT_BYP_PULLUP,M_BCM1480_MC_RTT_BYP_PULLUP) + +#define M_BCM1480_MC_RTT_BYPASS _SB_MAKEMASK1(8) +#define M_BCM1480_MC_RTT_COMP_MOV_AVG _SB_MAKEMASK1(9) + +#define S_BCM1480_MC_PVT_BYP_C1_PULLDOWN 10 +#define M_BCM1480_MC_PVT_BYP_C1_PULLDOWN _SB_MAKEMASK(4,S_BCM1480_MC_PVT_BYP_C1_PULLDOWN) +#define V_BCM1480_MC_PVT_BYP_C1_PULLDOWN(x) _SB_MAKEVALUE(x,S_BCM1480_MC_PVT_BYP_C1_PULLDOWN) +#define G_BCM1480_MC_PVT_BYP_C1_PULLDOWN(x) _SB_GETVALUE(x,S_BCM1480_MC_PVT_BYP_C1_PULLDOWN,M_BCM1480_MC_PVT_BYP_C1_PULLDOWN) + +#define S_BCM1480_MC_PVT_BYP_C1_PULLUP 15 +#define M_BCM1480_MC_PVT_BYP_C1_PULLUP _SB_MAKEMASK(4,S_BCM1480_MC_PVT_BYP_C1_PULLUP) +#define V_BCM1480_MC_PVT_BYP_C1_PULLUP(x) _SB_MAKEVALUE(x,S_BCM1480_MC_PVT_BYP_C1_PULLUP) +#define G_BCM1480_MC_PVT_BYP_C1_PULLUP(x) _SB_GETVALUE(x,S_BCM1480_MC_PVT_BYP_C1_PULLUP,M_BCM1480_MC_PVT_BYP_C1_PULLUP) + +#define S_BCM1480_MC_PVT_BYP_C2_PULLDOWN 20 +#define M_BCM1480_MC_PVT_BYP_C2_PULLDOWN _SB_MAKEMASK(4,S_BCM1480_MC_PVT_BYP_C2_PULLDOWN) +#define V_BCM1480_MC_PVT_BYP_C2_PULLDOWN(x) _SB_MAKEVALUE(x,S_BCM1480_MC_PVT_BYP_C2_PULLDOWN) +#define G_BCM1480_MC_PVT_BYP_C2_PULLDOWN(x) _SB_GETVALUE(x,S_BCM1480_MC_PVT_BYP_C2_PULLDOWN,M_BCM1480_MC_PVT_BYP_C2_PULLDOWN) + +#define S_BCM1480_MC_PVT_BYP_C2_PULLUP 25 +#define M_BCM1480_MC_PVT_BYP_C2_PULLUP _SB_MAKEMASK(4,S_BCM1480_MC_PVT_BYP_C2_PULLUP) +#define V_BCM1480_MC_PVT_BYP_C2_PULLUP(x) _SB_MAKEVALUE(x,S_BCM1480_MC_PVT_BYP_C2_PULLUP) +#define G_BCM1480_MC_PVT_BYP_C2_PULLUP(x) _SB_GETVALUE(x,S_BCM1480_MC_PVT_BYP_C2_PULLUP,M_BCM1480_MC_PVT_BYP_C2_PULLUP) + +#define M_BCM1480_MC_PVT_BYPASS _SB_MAKEMASK1(30) +#define M_BCM1480_MC_PVT_COMP_MOV_AVG _SB_MAKEMASK1(31) + +#define M_BCM1480_MC_CLK_CLASS _SB_MAKEMASK1(34) +#define M_BCM1480_MC_DATA_CLASS _SB_MAKEMASK1(35) +#define M_BCM1480_MC_ADDR_CLASS _SB_MAKEMASK1(36) + +#define M_BCM1480_MC_DQ_ODT_75 _SB_MAKEMASK1(37) +#define M_BCM1480_MC_DQ_ODT_150 _SB_MAKEMASK1(38) +#define M_BCM1480_MC_DQS_ODT_75 _SB_MAKEMASK1(39) +#define M_BCM1480_MC_DQS_ODT_150 _SB_MAKEMASK1(40) +#define M_BCM1480_MC_DQS_DIFF _SB_MAKEMASK1(41) + +/* + * ECC Test Data Register (Table 95) + */ + +#define S_BCM1480_MC_DATA_INVERT 0 +#define M_DATA_ECC_INVERT _SB_MAKEMASK(64,S_BCM1480_MC_ECC_INVERT) + +/* + * ECC Test ECC Register (Table 96) + */ + +#define S_BCM1480_MC_ECC_INVERT 0 +#define M_BCM1480_MC_ECC_INVERT _SB_MAKEMASK(8,S_BCM1480_MC_ECC_INVERT) + +/* + * SDRAM Timing Register (Table 97) + */ + +#define S_BCM1480_MC_tRCD 0 +#define M_BCM1480_MC_tRCD _SB_MAKEMASK(4,S_BCM1480_MC_tRCD) +#define V_BCM1480_MC_tRCD(x) _SB_MAKEVALUE(x,S_BCM1480_MC_tRCD) +#define G_BCM1480_MC_tRCD(x) _SB_GETVALUE(x,S_BCM1480_MC_tRCD,M_BCM1480_MC_tRCD) +#define K_BCM1480_MC_tRCD_DEFAULT 3 +#define V_BCM1480_MC_tRCD_DEFAULT V_BCM1480_MC_tRCD(K_BCM1480_MC_tRCD_DEFAULT) + +#define S_BCM1480_MC_tCL 4 +#define M_BCM1480_MC_tCL _SB_MAKEMASK(4,S_BCM1480_MC_tCL) +#define V_BCM1480_MC_tCL(x) _SB_MAKEVALUE(x,S_BCM1480_MC_tCL) +#define G_BCM1480_MC_tCL(x) _SB_GETVALUE(x,S_BCM1480_MC_tCL,M_BCM1480_MC_tCL) +#define K_BCM1480_MC_tCL_DEFAULT 2 +#define V_BCM1480_MC_tCL_DEFAULT V_BCM1480_MC_tCL(K_BCM1480_MC_tCL_DEFAULT) + +#define M_BCM1480_MC_tCrDh _SB_MAKEMASK1(8) + +#define S_BCM1480_MC_tWR 9 +#define M_BCM1480_MC_tWR _SB_MAKEMASK(3,S_BCM1480_MC_tWR) +#define V_BCM1480_MC_tWR(x) _SB_MAKEVALUE(x,S_BCM1480_MC_tWR) +#define G_BCM1480_MC_tWR(x) _SB_GETVALUE(x,S_BCM1480_MC_tWR,M_BCM1480_MC_tWR) +#define K_BCM1480_MC_tWR_DEFAULT 2 +#define V_BCM1480_MC_tWR_DEFAULT V_BCM1480_MC_tWR(K_BCM1480_MC_tWR_DEFAULT) + +#define S_BCM1480_MC_tCwD 12 +#define M_BCM1480_MC_tCwD _SB_MAKEMASK(4,S_BCM1480_MC_tCwD) +#define V_BCM1480_MC_tCwD(x) _SB_MAKEVALUE(x,S_BCM1480_MC_tCwD) +#define G_BCM1480_MC_tCwD(x) _SB_GETVALUE(x,S_BCM1480_MC_tCwD,M_BCM1480_MC_tCwD) +#define K_BCM1480_MC_tCwD_DEFAULT 1 +#define V_BCM1480_MC_tCwD_DEFAULT V_BCM1480_MC_tCwD(K_BCM1480_MC_tCwD_DEFAULT) + +#define S_BCM1480_MC_tRP 16 +#define M_BCM1480_MC_tRP _SB_MAKEMASK(4,S_BCM1480_MC_tRP) +#define V_BCM1480_MC_tRP(x) _SB_MAKEVALUE(x,S_BCM1480_MC_tRP) +#define G_BCM1480_MC_tRP(x) _SB_GETVALUE(x,S_BCM1480_MC_tRP,M_BCM1480_MC_tRP) +#define K_BCM1480_MC_tRP_DEFAULT 4 +#define V_BCM1480_MC_tRP_DEFAULT V_BCM1480_MC_tRP(K_BCM1480_MC_tRP_DEFAULT) + +#define S_BCM1480_MC_tRRD 20 +#define M_BCM1480_MC_tRRD _SB_MAKEMASK(4,S_BCM1480_MC_tRRD) +#define V_BCM1480_MC_tRRD(x) _SB_MAKEVALUE(x,S_BCM1480_MC_tRRD) +#define G_BCM1480_MC_tRRD(x) _SB_GETVALUE(x,S_BCM1480_MC_tRRD,M_BCM1480_MC_tRRD) +#define K_BCM1480_MC_tRRD_DEFAULT 2 +#define V_BCM1480_MC_tRRD_DEFAULT V_BCM1480_MC_tRRD(K_BCM1480_MC_tRRD_DEFAULT) + +#define S_BCM1480_MC_tRCw 24 +#define M_BCM1480_MC_tRCw _SB_MAKEMASK(5,S_BCM1480_MC_tRCw) +#define V_BCM1480_MC_tRCw(x) _SB_MAKEVALUE(x,S_BCM1480_MC_tRCw) +#define G_BCM1480_MC_tRCw(x) _SB_GETVALUE(x,S_BCM1480_MC_tRCw,M_BCM1480_MC_tRCw) +#define K_BCM1480_MC_tRCw_DEFAULT 10 +#define V_BCM1480_MC_tRCw_DEFAULT V_BCM1480_MC_tRCw(K_BCM1480_MC_tRCw_DEFAULT) + +#define S_BCM1480_MC_tRCr 32 +#define M_BCM1480_MC_tRCr _SB_MAKEMASK(5,S_BCM1480_MC_tRCr) +#define V_BCM1480_MC_tRCr(x) _SB_MAKEVALUE(x,S_BCM1480_MC_tRCr) +#define G_BCM1480_MC_tRCr(x) _SB_GETVALUE(x,S_BCM1480_MC_tRCr,M_BCM1480_MC_tRCr) +#define K_BCM1480_MC_tRCr_DEFAULT 9 +#define V_BCM1480_MC_tRCr_DEFAULT V_BCM1480_MC_tRCr(K_BCM1480_MC_tRCr_DEFAULT) + +#if SIBYTE_HDR_FEATURE(1480, PASS2) +#define S_BCM1480_MC_tFAW 40 +#define M_BCM1480_MC_tFAW _SB_MAKEMASK(6,S_BCM1480_MC_tFAW) +#define V_BCM1480_MC_tFAW(x) _SB_MAKEVALUE(x,S_BCM1480_MC_tFAW) +#define G_BCM1480_MC_tFAW(x) _SB_GETVALUE(x,S_BCM1480_MC_tFAW,M_BCM1480_MC_tFAW) +#define K_BCM1480_MC_tFAW_DEFAULT 0 +#define V_BCM1480_MC_tFAW_DEFAULT V_BCM1480_MC_tFAW(K_BCM1480_MC_tFAW_DEFAULT) +#endif + +#define S_BCM1480_MC_tRFC 48 +#define M_BCM1480_MC_tRFC _SB_MAKEMASK(7,S_BCM1480_MC_tRFC) +#define V_BCM1480_MC_tRFC(x) _SB_MAKEVALUE(x,S_BCM1480_MC_tRFC) +#define G_BCM1480_MC_tRFC(x) _SB_GETVALUE(x,S_BCM1480_MC_tRFC,M_BCM1480_MC_tRFC) +#define K_BCM1480_MC_tRFC_DEFAULT 12 +#define V_BCM1480_MC_tRFC_DEFAULT V_BCM1480_MC_tRFC(K_BCM1480_MC_tRFC_DEFAULT) + +#define S_BCM1480_MC_tFIFO 56 +#define M_BCM1480_MC_tFIFO _SB_MAKEMASK(2,S_BCM1480_MC_tFIFO) +#define V_BCM1480_MC_tFIFO(x) _SB_MAKEVALUE(x,S_BCM1480_MC_tFIFO) +#define G_BCM1480_MC_tFIFO(x) _SB_GETVALUE(x,S_BCM1480_MC_tFIFO,M_BCM1480_MC_tFIFO) +#define K_BCM1480_MC_tFIFO_DEFAULT 0 +#define V_BCM1480_MC_tFIFO_DEFAULT V_BCM1480_MC_tFIFO(K_BCM1480_MC_tFIFO_DEFAULT) + +#define S_BCM1480_MC_tW2R 58 +#define M_BCM1480_MC_tW2R _SB_MAKEMASK(2,S_BCM1480_MC_tW2R) +#define V_BCM1480_MC_tW2R(x) _SB_MAKEVALUE(x,S_BCM1480_MC_tW2R) +#define G_BCM1480_MC_tW2R(x) _SB_GETVALUE(x,S_BCM1480_MC_tW2R,M_BCM1480_MC_tW2R) +#define K_BCM1480_MC_tW2R_DEFAULT 1 +#define V_BCM1480_MC_tW2R_DEFAULT V_BCM1480_MC_tW2R(K_BCM1480_MC_tW2R_DEFAULT) + +#define S_BCM1480_MC_tR2W 60 +#define M_BCM1480_MC_tR2W _SB_MAKEMASK(2,S_BCM1480_MC_tR2W) +#define V_BCM1480_MC_tR2W(x) _SB_MAKEVALUE(x,S_BCM1480_MC_tR2W) +#define G_BCM1480_MC_tR2W(x) _SB_GETVALUE(x,S_BCM1480_MC_tR2W,M_BCM1480_MC_tR2W) +#define K_BCM1480_MC_tR2W_DEFAULT 0 +#define V_BCM1480_MC_tR2W_DEFAULT V_BCM1480_MC_tR2W(K_BCM1480_MC_tR2W_DEFAULT) + +#define M_BCM1480_MC_tR2R _SB_MAKEMASK1(62) + +#define V_BCM1480_MC_TIMING_DEFAULT (M_BCM1480_MC_tR2R | \ + V_BCM1480_MC_tFIFO_DEFAULT | \ + V_BCM1480_MC_tR2W_DEFAULT | \ + V_BCM1480_MC_tW2R_DEFAULT | \ + V_BCM1480_MC_tRFC_DEFAULT | \ + V_BCM1480_MC_tRCr_DEFAULT | \ + V_BCM1480_MC_tRCw_DEFAULT | \ + V_BCM1480_MC_tRRD_DEFAULT | \ + V_BCM1480_MC_tRP_DEFAULT | \ + V_BCM1480_MC_tCwD_DEFAULT | \ + V_BCM1480_MC_tWR_DEFAULT | \ + M_BCM1480_MC_tCrDh | \ + V_BCM1480_MC_tCL_DEFAULT | \ + V_BCM1480_MC_tRCD_DEFAULT) + +/* + * SDRAM Timing Register 2 + */ + +#if SIBYTE_HDR_FEATURE(1480, PASS2) + +#define S_BCM1480_MC_tAL 0 +#define M_BCM1480_MC_tAL _SB_MAKEMASK(4,S_BCM1480_MC_tAL) +#define V_BCM1480_MC_tAL(x) _SB_MAKEVALUE(x,S_BCM1480_MC_tAL) +#define G_BCM1480_MC_tAL(x) _SB_GETVALUE(x,S_BCM1480_MC_tAL,M_BCM1480_MC_tAL) +#define K_BCM1480_MC_tAL_DEFAULT 0 +#define V_BCM1480_MC_tAL_DEFAULT V_BCM1480_MC_tAL(K_BCM1480_MC_tAL_DEFAULT) + +#define S_BCM1480_MC_tRTP 4 +#define M_BCM1480_MC_tRTP _SB_MAKEMASK(3,S_BCM1480_MC_tRTP) +#define V_BCM1480_MC_tRTP(x) _SB_MAKEVALUE(x,S_BCM1480_MC_tRTP) +#define G_BCM1480_MC_tRTP(x) _SB_GETVALUE(x,S_BCM1480_MC_tRTP,M_BCM1480_MC_tRTP) +#define K_BCM1480_MC_tRTP_DEFAULT 2 +#define V_BCM1480_MC_tRTP_DEFAULT V_BCM1480_MC_tRTP(K_BCM1480_MC_tRTP_DEFAULT) + +#define S_BCM1480_MC_tW2W 8 +#define M_BCM1480_MC_tW2W _SB_MAKEMASK(2,S_BCM1480_MC_tW2W) +#define V_BCM1480_MC_tW2W(x) _SB_MAKEVALUE(x,S_BCM1480_MC_tW2W) +#define G_BCM1480_MC_tW2W(x) _SB_GETVALUE(x,S_BCM1480_MC_tW2W,M_BCM1480_MC_tW2W) +#define K_BCM1480_MC_tW2W_DEFAULT 0 +#define V_BCM1480_MC_tW2W_DEFAULT V_BCM1480_MC_tW2W(K_BCM1480_MC_tW2W_DEFAULT) + +#define S_BCM1480_MC_tRAP 12 +#define M_BCM1480_MC_tRAP _SB_MAKEMASK(4,S_BCM1480_MC_tRAP) +#define V_BCM1480_MC_tRAP(x) _SB_MAKEVALUE(x,S_BCM1480_MC_tRAP) +#define G_BCM1480_MC_tRAP(x) _SB_GETVALUE(x,S_BCM1480_MC_tRAP,M_BCM1480_MC_tRAP) +#define K_BCM1480_MC_tRAP_DEFAULT 0 +#define V_BCM1480_MC_tRAP_DEFAULT V_BCM1480_MC_tRAP(K_BCM1480_MC_tRAP_DEFAULT) + +#endif + + + +/* + * Global Registers: single instances per BCM1480 + */ + +/* + * Global Configuration Register (Table 99) + */ + +#define S_BCM1480_MC_BLK_SET_MARK 8 +#define M_BCM1480_MC_BLK_SET_MARK _SB_MAKEMASK(4,S_BCM1480_MC_BLK_SET_MARK) +#define V_BCM1480_MC_BLK_SET_MARK(x) _SB_MAKEVALUE(x,S_BCM1480_MC_BLK_SET_MARK) +#define G_BCM1480_MC_BLK_SET_MARK(x) _SB_GETVALUE(x,S_BCM1480_MC_BLK_SET_MARK,M_BCM1480_MC_BLK_SET_MARK) + +#define S_BCM1480_MC_BLK_CLR_MARK 12 +#define M_BCM1480_MC_BLK_CLR_MARK _SB_MAKEMASK(4,S_BCM1480_MC_BLK_CLR_MARK) +#define V_BCM1480_MC_BLK_CLR_MARK(x) _SB_MAKEVALUE(x,S_BCM1480_MC_BLK_CLR_MARK) +#define G_BCM1480_MC_BLK_CLR_MARK(x) _SB_GETVALUE(x,S_BCM1480_MC_BLK_CLR_MARK,M_BCM1480_MC_BLK_CLR_MARK) + +#define M_BCM1480_MC_PKT_PRIORITY _SB_MAKEMASK1(16) + +#define S_BCM1480_MC_MAX_AGE 20 +#define M_BCM1480_MC_MAX_AGE _SB_MAKEMASK(4,S_BCM1480_MC_MAX_AGE) +#define V_BCM1480_MC_MAX_AGE(x) _SB_MAKEVALUE(x,S_BCM1480_MC_MAX_AGE) +#define G_BCM1480_MC_MAX_AGE(x) _SB_GETVALUE(x,S_BCM1480_MC_MAX_AGE,M_BCM1480_MC_MAX_AGE) + +#define M_BCM1480_MC_BERR_DISABLE _SB_MAKEMASK1(29) +#define M_BCM1480_MC_FORCE_SEQ _SB_MAKEMASK1(30) +#define M_BCM1480_MC_VGEN _SB_MAKEMASK1(32) + +#define S_BCM1480_MC_SLEW 33 +#define M_BCM1480_MC_SLEW _SB_MAKEMASK(2,S_BCM1480_MC_SLEW) +#define V_BCM1480_MC_SLEW(x) _SB_MAKEVALUE(x,S_BCM1480_MC_SLEW) +#define G_BCM1480_MC_SLEW(x) _SB_GETVALUE(x,S_BCM1480_MC_SLEW,M_BCM1480_MC_SLEW) + +#define M_BCM1480_MC_SSTL_VOLTAGE _SB_MAKEMASK1(35) + +/* + * Global Channel Interleave Register (Table 100) + */ + +#define S_BCM1480_MC_INTLV0 0 +#define M_BCM1480_MC_INTLV0 _SB_MAKEMASK(6,S_BCM1480_MC_INTLV0) +#define V_BCM1480_MC_INTLV0(x) _SB_MAKEVALUE(x,S_BCM1480_MC_INTLV0) +#define G_BCM1480_MC_INTLV0(x) _SB_GETVALUE(x,S_BCM1480_MC_INTLV0,M_BCM1480_MC_INTLV0) + +#define S_BCM1480_MC_INTLV1 8 +#define M_BCM1480_MC_INTLV1 _SB_MAKEMASK(6,S_BCM1480_MC_INTLV1) +#define V_BCM1480_MC_INTLV1(x) _SB_MAKEVALUE(x,S_BCM1480_MC_INTLV1) +#define G_BCM1480_MC_INTLV1(x) _SB_GETVALUE(x,S_BCM1480_MC_INTLV1,M_BCM1480_MC_INTLV1) + +#define S_BCM1480_MC_INTLV_MODE 16 +#define M_BCM1480_MC_INTLV_MODE _SB_MAKEMASK(3,S_BCM1480_MC_INTLV_MODE) +#define V_BCM1480_MC_INTLV_MODE(x) _SB_MAKEVALUE(x,S_BCM1480_MC_INTLV_MODE) +#define G_BCM1480_MC_INTLV_MODE(x) _SB_GETVALUE(x,S_BCM1480_MC_INTLV_MODE,M_BCM1480_MC_INTLV_MODE) + +#define K_BCM1480_MC_INTLV_MODE_NONE 0x0 +#define K_BCM1480_MC_INTLV_MODE_01 0x1 +#define K_BCM1480_MC_INTLV_MODE_23 0x2 +#define K_BCM1480_MC_INTLV_MODE_01_23 0x3 +#define K_BCM1480_MC_INTLV_MODE_0123 0x4 + +#define V_BCM1480_MC_INTLV_MODE_NONE V_BCM1480_MC_INTLV_MODE(K_BCM1480_MC_INTLV_MODE_NONE) +#define V_BCM1480_MC_INTLV_MODE_01 V_BCM1480_MC_INTLV_MODE(K_BCM1480_MC_INTLV_MODE_01) +#define V_BCM1480_MC_INTLV_MODE_23 V_BCM1480_MC_INTLV_MODE(K_BCM1480_MC_INTLV_MODE_23) +#define V_BCM1480_MC_INTLV_MODE_01_23 V_BCM1480_MC_INTLV_MODE(K_BCM1480_MC_INTLV_MODE_01_23) +#define V_BCM1480_MC_INTLV_MODE_0123 V_BCM1480_MC_INTLV_MODE(K_BCM1480_MC_INTLV_MODE_0123) + +/* + * ECC Status Register + */ + +#define S_BCM1480_MC_ECC_ERR_ADDR 0 +#define M_BCM1480_MC_ECC_ERR_ADDR _SB_MAKEMASK(37,S_BCM1480_MC_ECC_ERR_ADDR) +#define V_BCM1480_MC_ECC_ERR_ADDR(x) _SB_MAKEVALUE(x,S_BCM1480_MC_ECC_ERR_ADDR) +#define G_BCM1480_MC_ECC_ERR_ADDR(x) _SB_GETVALUE(x,S_BCM1480_MC_ECC_ERR_ADDR,M_BCM1480_MC_ECC_ERR_ADDR) + +#if SIBYTE_HDR_FEATURE(1480, PASS2) +#define M_BCM1480_MC_ECC_ERR_RMW _SB_MAKEMASK1(60) +#endif + +#define M_BCM1480_MC_ECC_MULT_ERR_DET _SB_MAKEMASK1(61) +#define M_BCM1480_MC_ECC_UERR_DET _SB_MAKEMASK1(62) +#define M_BCM1480_MC_ECC_CERR_DET _SB_MAKEMASK1(63) + +/* + * Global ECC Address Register (Table 102) + */ + +#define S_BCM1480_MC_ECC_CORR_ADDR 0 +#define M_BCM1480_MC_ECC_CORR_ADDR _SB_MAKEMASK(37,S_BCM1480_MC_ECC_CORR_ADDR) +#define V_BCM1480_MC_ECC_CORR_ADDR(x) _SB_MAKEVALUE(x,S_BCM1480_MC_ECC_CORR_ADDR) +#define G_BCM1480_MC_ECC_CORR_ADDR(x) _SB_GETVALUE(x,S_BCM1480_MC_ECC_CORR_ADDR,M_BCM1480_MC_ECC_CORR_ADDR) + +/* + * Global ECC Correction Register (Table 103) + */ + +#define S_BCM1480_MC_ECC_CORRECT 0 +#define M_BCM1480_MC_ECC_CORRECT _SB_MAKEMASK(64,S_BCM1480_MC_ECC_CORRECT) +#define V_BCM1480_MC_ECC_CORRECT(x) _SB_MAKEVALUE(x,S_BCM1480_MC_ECC_CORRECT) +#define G_BCM1480_MC_ECC_CORRECT(x) _SB_GETVALUE(x,S_BCM1480_MC_ECC_CORRECT,M_BCM1480_MC_ECC_CORRECT) + +/* + * Global ECC Performance Counters Control Register (Table 104) + */ + +#define S_BCM1480_MC_CHANNEL_SELECT 0 +#define M_BCM1480_MC_CHANNEL_SELECT _SB_MAKEMASK(4,S_BCM1480_MC_CHANNEL_SELECT) +#define V_BCM1480_MC_CHANNEL_SELECT(x) _SB_MAKEVALUE(x,S_BCM1480_MC_CHANNEL_SELECT) +#define G_BCM1480_MC_CHANNEL_SELECT(x) _SB_GETVALUE(x,S_BCM1480_MC_CHANNEL_SELECT,M_BCM1480_MC_CHANNEL_SELECT) +#define K_BCM1480_MC_CHANNEL_SELECT_0 0x1 +#define K_BCM1480_MC_CHANNEL_SELECT_1 0x2 +#define K_BCM1480_MC_CHANNEL_SELECT_2 0x4 +#define K_BCM1480_MC_CHANNEL_SELECT_3 0x8 + +#endif /* _BCM1480_MC_H */ diff --git a/include/asm-mips/sibyte/bcm1480_regs.h b/include/asm-mips/sibyte/bcm1480_regs.h new file mode 100644 index 000000000000..c2dd2fe3047c --- /dev/null +++ b/include/asm-mips/sibyte/bcm1480_regs.h @@ -0,0 +1,869 @@ +/* ********************************************************************* + * BCM1255/BCM1280/BCM1455/BCM1480 Board Support Package + * + * Register Definitions File: bcm1480_regs.h + * + * This module contains the addresses of the on-chip peripherals + * on the BCM1280 and BCM1480. + * + * BCM1480 specification level: 1X55_1X80-UM100-D4 (11/24/03) + * + ********************************************************************* + * + * Copyright 2000,2001,2002,2003 + * Broadcom Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + ********************************************************************* */ + +#ifndef _BCM1480_REGS_H +#define _BCM1480_REGS_H + +#include "sb1250_defs.h" + +/* ********************************************************************* + * Pull in the BCM1250's registers since a great deal of the 1480's + * functions are the same as the BCM1250. + ********************************************************************* */ + +#include "sb1250_regs.h" + + +/* ********************************************************************* + * Some general notes: + * + * Register addresses are grouped by function and follow the order + * of the User Manual. + * + * For the most part, when there is more than one peripheral + * of the same type on the SOC, the constants below will be + * offsets from the base of each peripheral. For example, + * the MAC registers are described as offsets from the first + * MAC register, and there will be a MAC_REGISTER() macro + * to calculate the base address of a given MAC. + * + * The information in this file is based on the BCM1X55/BCM1X80 + * User Manual, Document 1X55_1X80-UM100-R, 22/12/03. + * + * This file is basically a "what's new" header file. Since the + * BCM1250 and the new BCM1480 (and derivatives) share many common + * features, this file contains only what's new or changed from + * the 1250. (above, you can see that we include the 1250 symbols + * to get the base functionality). + * + * In software, be sure to use the correct symbols, particularly + * for blocks that are different between the two chip families. + * All BCM1480-specific symbols have _BCM1480_ in their names, + * and all BCM1250-specific and "base" functions that are common in + * both chips have no special names (this is for compatibility with + * older include files). Therefore, if you're working with the + * SCD, which is very different on each chip, A_SCD_xxx implies + * the BCM1250 version and A_BCM1480_SCD_xxx implies the BCM1480 + * version. + ********************************************************************* */ + + +/* ********************************************************************* + * Memory Controller Registers (Section 6) + ********************************************************************* */ + +#define A_BCM1480_MC_BASE_0 0x0010050000 +#define A_BCM1480_MC_BASE_1 0x0010051000 +#define A_BCM1480_MC_BASE_2 0x0010052000 +#define A_BCM1480_MC_BASE_3 0x0010053000 +#define BCM1480_MC_REGISTER_SPACING 0x1000 + +#define A_BCM1480_MC_BASE(ctlid) (A_BCM1480_MC_BASE_0+(ctlid)*BCM1480_MC_REGISTER_SPACING) +#define A_BCM1480_MC_REGISTER(ctlid,reg) (A_BCM1480_MC_BASE(ctlid)+(reg)) + +#define R_BCM1480_MC_CONFIG 0x0000000100 +#define R_BCM1480_MC_CS_START 0x0000000120 +#define R_BCM1480_MC_CS_END 0x0000000140 +#define S_BCM1480_MC_CS_STARTEND 24 + +#define R_BCM1480_MC_CS01_ROW0 0x0000000180 +#define R_BCM1480_MC_CS01_ROW1 0x00000001A0 +#define R_BCM1480_MC_CS23_ROW0 0x0000000200 +#define R_BCM1480_MC_CS23_ROW1 0x0000000220 +#define R_BCM1480_MC_CS01_COL0 0x0000000280 +#define R_BCM1480_MC_CS01_COL1 0x00000002A0 +#define R_BCM1480_MC_CS23_COL0 0x0000000300 +#define R_BCM1480_MC_CS23_COL1 0x0000000320 + +#define R_BCM1480_MC_CSX_BASE 0x0000000180 +#define R_BCM1480_MC_CSX_ROW0 0x0000000000 /* relative to CSX_BASE */ +#define R_BCM1480_MC_CSX_ROW1 0x0000000020 /* relative to CSX_BASE */ +#define R_BCM1480_MC_CSX_COL0 0x0000000100 /* relative to CSX_BASE */ +#define R_BCM1480_MC_CSX_COL1 0x0000000120 /* relative to CSX_BASE */ +#define BCM1480_MC_CSX_SPACING 0x0000000080 /* CS23 relative to CS01 */ + +#define R_BCM1480_MC_CS01_BA 0x0000000380 +#define R_BCM1480_MC_CS23_BA 0x00000003A0 +#define R_BCM1480_MC_DRAMCMD 0x0000000400 +#define R_BCM1480_MC_DRAMMODE 0x0000000420 +#define R_BCM1480_MC_CLOCK_CFG 0x0000000440 +#define R_BCM1480_MC_MCLK_CFG R_BCM1480_MC_CLOCK_CFG +#define R_BCM1480_MC_TEST_DATA 0x0000000480 +#define R_BCM1480_MC_TEST_ECC 0x00000004A0 +#define R_BCM1480_MC_TIMING1 0x00000004C0 +#define R_BCM1480_MC_TIMING2 0x00000004E0 +#define R_BCM1480_MC_DLL_CFG 0x0000000500 +#define R_BCM1480_MC_DRIVE_CFG 0x0000000520 + +#if SIBYTE_HDR_FEATURE(1480, PASS2) +#define R_BCM1480_MC_ODT 0x0000000460 +#define R_BCM1480_MC_ECC_STATUS 0x0000000540 +#endif + +/* Global registers (single instance) */ +#define A_BCM1480_MC_GLB_CONFIG 0x0010054100 +#define A_BCM1480_MC_GLB_INTLV 0x0010054120 +#define A_BCM1480_MC_GLB_ECC_STATUS 0x0010054140 +#define A_BCM1480_MC_GLB_ECC_ADDR 0x0010054160 +#define A_BCM1480_MC_GLB_ECC_CORRECT 0x0010054180 +#define A_BCM1480_MC_GLB_PERF_CNT_CONTROL 0x00100541A0 + +/* ********************************************************************* + * L2 Cache Control Registers (Section 5) + ********************************************************************* */ + +#define A_BCM1480_L2_BASE 0x0010040000 + +#define A_BCM1480_L2_READ_TAG 0x0010040018 +#define A_BCM1480_L2_ECC_TAG 0x0010040038 +#define A_BCM1480_L2_MISC0_VALUE 0x0010040058 +#define A_BCM1480_L2_MISC1_VALUE 0x0010040078 +#define A_BCM1480_L2_MISC2_VALUE 0x0010040098 +#define A_BCM1480_L2_MISC_CONFIG 0x0010040040 /* x040 */ +#define A_BCM1480_L2_CACHE_DISABLE 0x0010040060 /* x060 */ +#define A_BCM1480_L2_MAKECACHEDISABLE(x) (A_BCM1480_L2_CACHE_DISABLE | (((x)&0xF) << 12)) +#define A_BCM1480_L2_WAY_ENABLE_3_0 0x0010040080 /* x080 */ +#define A_BCM1480_L2_WAY_ENABLE_7_4 0x00100400A0 /* x0A0 */ +#define A_BCM1480_L2_MAKE_WAY_ENABLE_LO(x) (A_BCM1480_L2_WAY_ENABLE_3_0 | (((x)&0xF) << 12)) +#define A_BCM1480_L2_MAKE_WAY_ENABLE_HI(x) (A_BCM1480_L2_WAY_ENABLE_7_4 | (((x)&0xF) << 12)) +#define A_BCM1480_L2_MAKE_WAY_DISABLE_LO(x) (A_BCM1480_L2_WAY_ENABLE_3_0 | (((~x)&0xF) << 12)) +#define A_BCM1480_L2_MAKE_WAY_DISABLE_HI(x) (A_BCM1480_L2_WAY_ENABLE_7_4 | (((~x)&0xF) << 12)) +#define A_BCM1480_L2_WAY_LOCAL_3_0 0x0010040100 /* x100 */ +#define A_BCM1480_L2_WAY_LOCAL_7_4 0x0010040120 /* x120 */ +#define A_BCM1480_L2_WAY_REMOTE_3_0 0x0010040140 /* x140 */ +#define A_BCM1480_L2_WAY_REMOTE_7_4 0x0010040160 /* x160 */ +#define A_BCM1480_L2_WAY_AGENT_3_0 0x00100400C0 /* xxC0 */ +#define A_BCM1480_L2_WAY_AGENT_7_4 0x00100400E0 /* xxE0 */ +#define A_BCM1480_L2_WAY_ENABLE(A, banks) (A | (((~(banks))&0x0F) << 8)) +#define A_BCM1480_L2_BANK_BASE 0x00D0300000 +#define A_BCM1480_L2_BANK_ADDRESS(b) (A_BCM1480_L2_BANK_BASE | (((b)&0x7)<<17)) +#define A_BCM1480_L2_MGMT_TAG_BASE 0x00D0000000 + + +/* ********************************************************************* + * PCI-X Interface Registers (Section 7) + ********************************************************************* */ + +#define A_BCM1480_PCI_BASE 0x0010061400 + +#define A_BCM1480_PCI_RESET 0x0010061400 +#define A_BCM1480_PCI_DLL 0x0010061500 + +#define A_BCM1480_PCI_TYPE00_HEADER 0x002E000000 + +/* ********************************************************************* + * Ethernet MAC Registers (Section 11) and DMA Registers (Section 10.6) + ********************************************************************* */ + +/* No register changes with Rev.C BCM1250, but one additional MAC */ + +#define A_BCM1480_MAC_BASE_2 0x0010066000 + +#ifndef A_MAC_BASE_2 +#define A_MAC_BASE_2 A_BCM1480_MAC_BASE_2 +#endif + +#define A_BCM1480_MAC_BASE_3 0x0010067000 +#define A_MAC_BASE_3 A_BCM1480_MAC_BASE_3 + +#define R_BCM1480_MAC_DMA_OODPKTLOST 0x00000038 + +#ifndef R_MAC_DMA_OODPKTLOST +#define R_MAC_DMA_OODPKTLOST R_BCM1480_MAC_DMA_OODPKTLOST +#endif + + +/* ********************************************************************* + * DUART Registers (Section 14) + ********************************************************************* */ + +/* No significant differences from BCM1250, two DUARTs */ + +/* Conventions, per user manual: + * DUART generic, channels A,B,C,D + * DUART0 implementing channels A,B + * DUART1 inplementing channels C,D + */ + +#define BCM1480_DUART_NUM_PORTS 4 + +#define A_BCM1480_DUART0 0x0010060000 +#define A_BCM1480_DUART1 0x0010060400 +#define A_BCM1480_DUART(chan) ((((chan)&2) == 0)? A_BCM1480_DUART0 : A_BCM1480_DUART1) + +#define BCM1480_DUART_CHANREG_SPACING 0x100 +#define A_BCM1480_DUART_CHANREG(chan,reg) (A_BCM1480_DUART(chan) \ + + BCM1480_DUART_CHANREG_SPACING*((chan)&1) \ + + (reg)) +#define R_BCM1480_DUART_CHANREG(chan,reg) (BCM1480_DUART_CHANREG_SPACING*((chan)&1) + (reg)) + +#define R_BCM1480_DUART_IMRREG(chan) (R_DUART_IMR_A + ((chan)&1)*DUART_IMRISR_SPACING) +#define R_BCM1480_DUART_ISRREG(chan) (R_DUART_ISR_A + ((chan)&1)*DUART_IMRISR_SPACING) + +#define A_BCM1480_DUART_IMRREG(chan) (A_BCM1480_DUART(chan) + R_BCM1480_DUART_IMRREG(chan)) +#define A_BCM1480_DUART_ISRREG(chan) (A_BCM1480_DUART(chan) + R_BCM1480_DUART_ISRREG(chan)) + +/* + * These constants are the absolute addresses. + */ + +#define A_BCM1480_DUART_MODE_REG_1_C 0x0010060400 +#define A_BCM1480_DUART_MODE_REG_2_C 0x0010060410 +#define A_BCM1480_DUART_STATUS_C 0x0010060420 +#define A_BCM1480_DUART_CLK_SEL_C 0x0010060430 +#define A_BCM1480_DUART_FULL_CTL_C 0x0010060440 +#define A_BCM1480_DUART_CMD_C 0x0010060450 +#define A_BCM1480_DUART_RX_HOLD_C 0x0010060460 +#define A_BCM1480_DUART_TX_HOLD_C 0x0010060470 +#define A_BCM1480_DUART_OPCR_C 0x0010060480 +#define A_BCM1480_DUART_AUX_CTRL_C 0x0010060490 + +#define A_BCM1480_DUART_MODE_REG_1_D 0x0010060500 +#define A_BCM1480_DUART_MODE_REG_2_D 0x0010060510 +#define A_BCM1480_DUART_STATUS_D 0x0010060520 +#define A_BCM1480_DUART_CLK_SEL_D 0x0010060530 +#define A_BCM1480_DUART_FULL_CTL_D 0x0010060540 +#define A_BCM1480_DUART_CMD_D 0x0010060550 +#define A_BCM1480_DUART_RX_HOLD_D 0x0010060560 +#define A_BCM1480_DUART_TX_HOLD_D 0x0010060570 +#define A_BCM1480_DUART_OPCR_D 0x0010060580 +#define A_BCM1480_DUART_AUX_CTRL_D 0x0010060590 + +#define A_BCM1480_DUART_INPORT_CHNG_CD 0x0010060600 +#define A_BCM1480_DUART_AUX_CTRL_CD 0x0010060610 +#define A_BCM1480_DUART_ISR_C 0x0010060620 +#define A_BCM1480_DUART_IMR_C 0x0010060630 +#define A_BCM1480_DUART_ISR_D 0x0010060640 +#define A_BCM1480_DUART_IMR_D 0x0010060650 +#define A_BCM1480_DUART_OUT_PORT_CD 0x0010060660 +#define A_BCM1480_DUART_OPCR_CD 0x0010060670 +#define A_BCM1480_DUART_IN_PORT_CD 0x0010060680 +#define A_BCM1480_DUART_ISR_CD 0x0010060690 +#define A_BCM1480_DUART_IMR_CD 0x00100606A0 +#define A_BCM1480_DUART_SET_OPR_CD 0x00100606B0 +#define A_BCM1480_DUART_CLEAR_OPR_CD 0x00100606C0 +#define A_BCM1480_DUART_INPORT_CHNG_C 0x00100606D0 +#define A_BCM1480_DUART_INPORT_CHNG_D 0x00100606E0 + + +/* ********************************************************************* + * Generic Bus Registers (Section 15) and PCMCIA Registers (Section 16) + ********************************************************************* */ + +#define A_BCM1480_IO_PCMCIA_CFG_B 0x0010061A58 +#define A_BCM1480_IO_PCMCIA_STATUS_B 0x0010061A68 + +/* ********************************************************************* + * GPIO Registers (Section 17) + ********************************************************************* */ + +/* One additional GPIO register, placed _before_ the BCM1250's GPIO block base */ + +#define A_BCM1480_GPIO_INT_ADD_TYPE 0x0010061A78 +#define R_BCM1480_GPIO_INT_ADD_TYPE (-8) + +#define A_GPIO_INT_ADD_TYPE A_BCM1480_GPIO_INT_ADD_TYPE +#define R_GPIO_INT_ADD_TYPE R_BCM1480_GPIO_INT_ADD_TYPE + +/* ********************************************************************* + * SMBus Registers (Section 18) + ********************************************************************* */ + +/* No changes from BCM1250 */ + +/* ********************************************************************* + * Timer Registers (Sections 4.6) + ********************************************************************* */ + +/* BCM1480 has two additional watchdogs */ + +/* Watchdog timers */ + +#define A_BCM1480_SCD_WDOG_2 0x0010022050 +#define A_BCM1480_SCD_WDOG_3 0x0010022150 + +#define BCM1480_SCD_NUM_WDOGS 4 + +#define A_BCM1480_SCD_WDOG_BASE(w) (A_BCM1480_SCD_WDOG_0+((w)&2)*0x1000 + ((w)&1)*0x100) +#define A_BCM1480_SCD_WDOG_REGISTER(w,r) (A_BCM1480_SCD_WDOG_BASE(w) + (r)) + +#define A_BCM1480_SCD_WDOG_INIT_2 0x0010022050 +#define A_BCM1480_SCD_WDOG_CNT_2 0x0010022058 +#define A_BCM1480_SCD_WDOG_CFG_2 0x0010022060 + +#define A_BCM1480_SCD_WDOG_INIT_3 0x0010022150 +#define A_BCM1480_SCD_WDOG_CNT_3 0x0010022158 +#define A_BCM1480_SCD_WDOG_CFG_3 0x0010022160 + +/* BCM1480 has two additional compare registers */ + +#define A_BCM1480_SCD_ZBBUS_CYCLE_COUNT A_SCD_ZBBUS_CYCLE_COUNT +#define A_BCM1480_SCD_ZBBUS_CYCLE_CP_BASE 0x0010020C00 +#define A_BCM1480_SCD_ZBBUS_CYCLE_CP0 A_SCD_ZBBUS_CYCLE_CP0 +#define A_BCM1480_SCD_ZBBUS_CYCLE_CP1 A_SCD_ZBBUS_CYCLE_CP1 +#define A_BCM1480_SCD_ZBBUS_CYCLE_CP2 0x0010020C10 +#define A_BCM1480_SCD_ZBBUS_CYCLE_CP3 0x0010020C18 + +/* ********************************************************************* + * System Control Registers (Section 4.2) + ********************************************************************* */ + +/* Scratch register in different place */ + +#define A_BCM1480_SCD_SCRATCH 0x100200A0 + +/* ********************************************************************* + * System Address Trap Registers (Section 4.9) + ********************************************************************* */ + +/* No changes from BCM1250 */ + +/* ********************************************************************* + * System Interrupt Mapper Registers (Sections 4.3-4.5) + ********************************************************************* */ + +#define A_BCM1480_IMR_CPU0_BASE 0x0010020000 +#define A_BCM1480_IMR_CPU1_BASE 0x0010022000 +#define A_BCM1480_IMR_CPU2_BASE 0x0010024000 +#define A_BCM1480_IMR_CPU3_BASE 0x0010026000 +#define BCM1480_IMR_REGISTER_SPACING 0x2000 +#define BCM1480_IMR_REGISTER_SPACING_SHIFT 13 + +#define A_BCM1480_IMR_MAPPER(cpu) (A_BCM1480_IMR_CPU0_BASE+(cpu)*BCM1480_IMR_REGISTER_SPACING) +#define A_BCM1480_IMR_REGISTER(cpu,reg) (A_BCM1480_IMR_MAPPER(cpu)+(reg)) + +/* Most IMR registers are 128 bits, implemented as non-contiguous + 64-bit registers high (_H) and low (_L) */ +#define BCM1480_IMR_HL_SPACING 0x1000 + +#define R_BCM1480_IMR_INTERRUPT_DIAG_H 0x0010 +#define R_BCM1480_IMR_LDT_INTERRUPT_H 0x0018 +#define R_BCM1480_IMR_LDT_INTERRUPT_CLR_H 0x0020 +#define R_BCM1480_IMR_INTERRUPT_MASK_H 0x0028 +#define R_BCM1480_IMR_INTERRUPT_TRACE_H 0x0038 +#define R_BCM1480_IMR_INTERRUPT_SOURCE_STATUS_H 0x0040 +#define R_BCM1480_IMR_LDT_INTERRUPT_SET 0x0048 +#define R_BCM1480_IMR_MAILBOX_0_CPU 0x00C0 +#define R_BCM1480_IMR_MAILBOX_0_SET_CPU 0x00C8 +#define R_BCM1480_IMR_MAILBOX_0_CLR_CPU 0x00D0 +#define R_BCM1480_IMR_MAILBOX_1_CPU 0x00E0 +#define R_BCM1480_IMR_MAILBOX_1_SET_CPU 0x00E8 +#define R_BCM1480_IMR_MAILBOX_1_CLR_CPU 0x00F0 +#define R_BCM1480_IMR_INTERRUPT_STATUS_BASE_H 0x0100 +#define BCM1480_IMR_INTERRUPT_STATUS_COUNT 8 +#define R_BCM1480_IMR_INTERRUPT_MAP_BASE_H 0x0200 +#define BCM1480_IMR_INTERRUPT_MAP_COUNT 64 + +#define R_BCM1480_IMR_INTERRUPT_DIAG_L 0x1010 +#define R_BCM1480_IMR_LDT_INTERRUPT_L 0x1018 +#define R_BCM1480_IMR_LDT_INTERRUPT_CLR_L 0x1020 +#define R_BCM1480_IMR_INTERRUPT_MASK_L 0x1028 +#define R_BCM1480_IMR_INTERRUPT_TRACE_L 0x1038 +#define R_BCM1480_IMR_INTERRUPT_SOURCE_STATUS_L 0x1040 +#define R_BCM1480_IMR_INTERRUPT_STATUS_BASE_L 0x1100 +#define R_BCM1480_IMR_INTERRUPT_MAP_BASE_L 0x1200 + +#define A_BCM1480_IMR_ALIAS_MAILBOX_CPU0_BASE 0x0010028000 +#define A_BCM1480_IMR_ALIAS_MAILBOX_CPU1_BASE 0x0010028100 +#define A_BCM1480_IMR_ALIAS_MAILBOX_CPU2_BASE 0x0010028200 +#define A_BCM1480_IMR_ALIAS_MAILBOX_CPU3_BASE 0x0010028300 +#define BCM1480_IMR_ALIAS_MAILBOX_SPACING 0100 + +#define A_BCM1480_IMR_ALIAS_MAILBOX(cpu) (A_BCM1480_IMR_ALIAS_MAILBOX_CPU0_BASE + \ + (cpu)*BCM1480_IMR_ALIAS_MAILBOX_SPACING) +#define A_BCM1480_IMR_ALIAS_MAILBOX_REGISTER(cpu,reg) (A_BCM1480_IMR_ALIAS_MAILBOX(cpu)+(reg)) + +#define R_BCM1480_IMR_ALIAS_MAILBOX_0 0x0000 /* 0x0x0 */ +#define R_BCM1480_IMR_ALIAS_MAILBOX_0_SET 0x0008 /* 0x0x8 */ + +/* ********************************************************************* + * System Performance Counter Registers (Section 4.7) + ********************************************************************* */ + +/* BCM1480 has four more performance counter registers, and two control + registers. */ + +#define A_BCM1480_SCD_PERF_CNT_BASE 0x00100204C0 + +#define A_BCM1480_SCD_PERF_CNT_CFG0 0x00100204C0 +#define A_BCM1480_SCD_PERF_CNT_CFG_0 A_BCM1480_SCD_PERF_CNT_CFG0 +#define A_BCM1480_SCD_PERF_CNT_CFG1 0x00100204C8 +#define A_BCM1480_SCD_PERF_CNT_CFG_1 A_BCM1480_SCD_PERF_CNT_CFG1 + +#define A_BCM1480_SCD_PERF_CNT_0 A_SCD_PERF_CNT_0 +#define A_BCM1480_SCD_PERF_CNT_1 A_SCD_PERF_CNT_1 +#define A_BCM1480_SCD_PERF_CNT_2 A_SCD_PERF_CNT_2 +#define A_BCM1480_SCD_PERF_CNT_3 A_SCD_PERF_CNT_3 + +#define A_BCM1480_SCD_PERF_CNT_4 0x00100204F0 +#define A_BCM1480_SCD_PERF_CNT_5 0x00100204F8 +#define A_BCM1480_SCD_PERF_CNT_6 0x0010020500 +#define A_BCM1480_SCD_PERF_CNT_7 0x0010020508 + +/* ********************************************************************* + * System Bus Watcher Registers (Section 4.8) + ********************************************************************* */ + + +/* Same as 1250 except BUS_ERR_STATUS_DEBUG is in a different place. */ + +#define A_BCM1480_BUS_ERR_STATUS_DEBUG 0x00100208D8 + +/* ********************************************************************* + * System Debug Controller Registers (Section 19) + ********************************************************************* */ + +/* Same as 1250 */ + +/* ********************************************************************* + * System Trace Unit Registers (Sections 4.10) + ********************************************************************* */ + +/* Same as 1250 */ + +/* ********************************************************************* + * Data Mover DMA Registers (Section 10.7) + ********************************************************************* */ + +/* Same as 1250 */ + + +/* ********************************************************************* + * HyperTransport Interface Registers (Section 8) + ********************************************************************* */ + +#define BCM1480_HT_NUM_PORTS 3 +#define BCM1480_HT_PORT_SPACING 0x800 +#define A_BCM1480_HT_PORT_HEADER(x) (A_BCM1480_HT_PORT0_HEADER + ((x)*BCM1480_HT_PORT_SPACING)) + +#define A_BCM1480_HT_PORT0_HEADER 0x00FE000000 +#define A_BCM1480_HT_PORT1_HEADER 0x00FE000800 +#define A_BCM1480_HT_PORT2_HEADER 0x00FE001000 +#define A_BCM1480_HT_TYPE00_HEADER 0x00FE002000 + + +/* ********************************************************************* + * Node Controller Registers (Section 9) + ********************************************************************* */ + +#define A_BCM1480_NC_BASE 0x00DFBD0000 + +#define A_BCM1480_NC_RLD_FIELD 0x00DFBD0000 +#define A_BCM1480_NC_RLD_TRIGGER 0x00DFBD0020 +#define A_BCM1480_NC_RLD_BAD_ERROR 0x00DFBD0040 +#define A_BCM1480_NC_RLD_COR_ERROR 0x00DFBD0060 +#define A_BCM1480_NC_RLD_ECC_STATUS 0x00DFBD0080 +#define A_BCM1480_NC_RLD_WAY_ENABLE 0x00DFBD00A0 +#define A_BCM1480_NC_RLD_RANDOM_LFSR 0x00DFBD00C0 + +#define A_BCM1480_NC_INTERRUPT_STATUS 0x00DFBD00E0 +#define A_BCM1480_NC_INTERRUPT_ENABLE 0x00DFBD0100 +#define A_BCM1480_NC_TIMEOUT_COUNTER 0x00DFBD0120 +#define A_BCM1480_NC_TIMEOUT_COUNTER_SEL 0x00DFBD0140 + +#define A_BCM1480_NC_CREDIT_STATUS_REG0 0x00DFBD0200 +#define A_BCM1480_NC_CREDIT_STATUS_REG1 0x00DFBD0220 +#define A_BCM1480_NC_CREDIT_STATUS_REG2 0x00DFBD0240 +#define A_BCM1480_NC_CREDIT_STATUS_REG3 0x00DFBD0260 +#define A_BCM1480_NC_CREDIT_STATUS_REG4 0x00DFBD0280 +#define A_BCM1480_NC_CREDIT_STATUS_REG5 0x00DFBD02A0 +#define A_BCM1480_NC_CREDIT_STATUS_REG6 0x00DFBD02C0 +#define A_BCM1480_NC_CREDIT_STATUS_REG7 0x00DFBD02E0 +#define A_BCM1480_NC_CREDIT_STATUS_REG8 0x00DFBD0300 +#define A_BCM1480_NC_CREDIT_STATUS_REG9 0x00DFBD0320 +#define A_BCM1480_NC_CREDIT_STATUS_REG10 0x00DFBE0000 +#define A_BCM1480_NC_CREDIT_STATUS_REG11 0x00DFBE0020 +#define A_BCM1480_NC_CREDIT_STATUS_REG12 0x00DFBE0040 + +#define A_BCM1480_NC_SR_TIMEOUT_COUNTER 0x00DFBE0060 +#define A_BCM1480_NC_SR_TIMEOUT_COUNTER_SEL 0x00DFBE0080 + + +/* ********************************************************************* + * H&R Block Configuration Registers (Section 12.4) + ********************************************************************* */ + +#define A_BCM1480_HR_BASE_0 0x00DF820000 +#define A_BCM1480_HR_BASE_1 0x00DF8A0000 +#define A_BCM1480_HR_BASE_2 0x00DF920000 +#define BCM1480_HR_REGISTER_SPACING 0x80000 + +#define A_BCM1480_HR_BASE(idx) (A_BCM1480_HR_BASE_0 + ((idx)*BCM1480_HR_REGISTER_SPACING)) +#define A_BCM1480_HR_REGISTER(idx,reg) (A_BCM1480_HR_BASE(idx) + (reg)) + +#define R_BCM1480_HR_CFG 0x0000000000 + +#define R_BCM1480_HR_MAPPING 0x0000010010 + +#define BCM1480_HR_RULE_SPACING 0x0000000010 +#define BCM1480_HR_NUM_RULES 16 +#define BCM1480_HR_OP_OFFSET 0x0000000100 +#define BCM1480_HR_TYPE_OFFSET 0x0000000108 +#define R_BCM1480_HR_RULE_OP(idx) (BCM1480_HR_OP_OFFSET + ((idx)*BCM1480_HR_RULE_SPACING)) +#define R_BCM1480_HR_RULE_TYPE(idx) (BCM1480_HR_TYPE_OFFSET + ((idx)*BCM1480_HR_RULE_SPACING)) + +#define BCM1480_HR_LEAF_SPACING 0x0000000010 +#define BCM1480_HR_NUM_LEAVES 10 +#define BCM1480_HR_LEAF_OFFSET 0x0000000300 +#define R_BCM1480_HR_HA_LEAF0(idx) (BCM1480_HR_LEAF_OFFSET + ((idx)*BCM1480_HR_LEAF_SPACING)) + +#define R_BCM1480_HR_EX_LEAF0 0x00000003A0 + +#define BCM1480_HR_PATH_SPACING 0x0000000010 +#define BCM1480_HR_NUM_PATHS 16 +#define BCM1480_HR_PATH_OFFSET 0x0000000600 +#define R_BCM1480_HR_PATH(idx) (BCM1480_HR_PATH_OFFSET + ((idx)*BCM1480_HR_PATH_SPACING)) + +#define R_BCM1480_HR_PATH_DEFAULT 0x0000000700 + +#define BCM1480_HR_ROUTE_SPACING 8 +#define BCM1480_HR_NUM_ROUTES 512 +#define BCM1480_HR_ROUTE_OFFSET 0x0000001000 +#define R_BCM1480_HR_RT_WORD(idx) (BCM1480_HR_ROUTE_OFFSET + ((idx)*BCM1480_HR_ROUTE_SPACING)) + + +/* checked to here - ehs */ +/* ********************************************************************* + * Packet Manager DMA Registers (Section 12.5) + ********************************************************************* */ + +#define A_BCM1480_PM_BASE 0x0010056000 + +#define A_BCM1480_PMI_LCL_0 0x0010058000 +#define A_BCM1480_PMO_LCL_0 0x001005C000 +#define A_BCM1480_PMI_OFFSET_0 (A_BCM1480_PMI_LCL_0 - A_BCM1480_PM_BASE) +#define A_BCM1480_PMO_OFFSET_0 (A_BCM1480_PMO_LCL_0 - A_BCM1480_PM_BASE) + +#define BCM1480_PM_LCL_REGISTER_SPACING 0x100 +#define BCM1480_PM_NUM_CHANNELS 32 + +#define A_BCM1480_PMI_LCL_BASE(idx) (A_BCM1480_PMI_LCL_0 + ((idx)*BCM1480_PM_LCL_REGISTER_SPACING)) +#define A_BCM1480_PMI_LCL_REGISTER(idx,reg) (A_BCM1480_PMI_LCL_BASE(idx) + (reg)) +#define A_BCM1480_PMO_LCL_BASE(idx) (A_BCM1480_PMO_LCL_0 + ((idx)*BCM1480_PM_LCL_REGISTER_SPACING)) +#define A_BCM1480_PMO_LCL_REGISTER(idx,reg) (A_BCM1480_PMO_LCL_BASE(idx) + (reg)) + +#define BCM1480_PM_INT_PACKING 8 +#define BCM1480_PM_INT_FUNCTION_SPACING 0x40 +#define BCM1480_PM_INT_NUM_FUNCTIONS 3 + +/* + * DMA channel registers relative to A_BCM1480_PMI_LCL_BASE(n) and A_BCM1480_PMO_LCL_BASE(n) + */ + +#define R_BCM1480_PM_BASE_SIZE 0x0000000000 +#define R_BCM1480_PM_CNT 0x0000000008 +#define R_BCM1480_PM_PFCNT 0x0000000010 +#define R_BCM1480_PM_LAST 0x0000000018 +#define R_BCM1480_PM_PFINDX 0x0000000020 +#define R_BCM1480_PM_INT_WMK 0x0000000028 +#define R_BCM1480_PM_CONFIG0 0x0000000030 +#define R_BCM1480_PM_LOCALDEBUG 0x0000000078 +#define R_BCM1480_PM_CACHEABILITY 0x0000000080 /* PMI only */ +#define R_BCM1480_PM_INT_CNFG 0x0000000088 +#define R_BCM1480_PM_DESC_MERGE_TIMER 0x0000000090 +#define R_BCM1480_PM_LOCALDEBUG_PIB 0x00000000F8 /* PMI only */ +#define R_BCM1480_PM_LOCALDEBUG_POB 0x00000000F8 /* PMO only */ + +/* + * Global Registers (Not Channelized) + */ + +#define A_BCM1480_PMI_GLB_0 0x0010056000 +#define A_BCM1480_PMO_GLB_0 0x0010057000 + +/* + * PM to TX Mapping Register relative to A_BCM1480_PMI_GLB_0 and A_BCM1480_PMO_GLB_0 + */ + +#define R_BCM1480_PM_PMO_MAPPING 0x00000008C8 /* PMO only */ + +#define A_BCM1480_PM_PMO_MAPPING (A_BCM1480_PMO_GLB_0 + R_BCM1480_PM_PMO_MAPPING) + +/* + * Interrupt mapping registers + */ + + +#define A_BCM1480_PMI_INT_0 0x0010056800 +#define A_BCM1480_PMI_INT(q) (A_BCM1480_PMI_INT_0 + ((q>>8)<<8)) +#define A_BCM1480_PMI_INT_OFFSET_0 (A_BCM1480_PMI_INT_0 - A_BCM1480_PM_BASE) +#define A_BCM1480_PMO_INT_0 0x0010057800 +#define A_BCM1480_PMO_INT(q) (A_BCM1480_PMO_INT_0 + ((q>>8)<<8)) +#define A_BCM1480_PMO_INT_OFFSET_0 (A_BCM1480_PMO_INT_0 - A_BCM1480_PM_BASE) + +/* + * Interrupt registers relative to A_BCM1480_PMI_INT_0 and A_BCM1480_PMO_INT_0 + */ + +#define R_BCM1480_PM_INT_ST 0x0000000000 +#define R_BCM1480_PM_INT_MSK 0x0000000040 +#define R_BCM1480_PM_INT_CLR 0x0000000080 +#define R_BCM1480_PM_MRGD_INT 0x00000000C0 + +/* + * Debug registers (global) + */ + +#define A_BCM1480_PM_GLOBALDEBUGMODE_PMI 0x0010056000 +#define A_BCM1480_PM_GLOBALDEBUG_PID 0x00100567F8 +#define A_BCM1480_PM_GLOBALDEBUG_PIB 0x0010056FF8 +#define A_BCM1480_PM_GLOBALDEBUGMODE_PMO 0x0010057000 +#define A_BCM1480_PM_GLOBALDEBUG_POD 0x00100577F8 +#define A_BCM1480_PM_GLOBALDEBUG_POB 0x0010057FF8 + +/* ********************************************************************* + * Switch performance counters + ********************************************************************* */ + +#define A_BCM1480_SWPERF_CFG 0xdfb91800 +#define A_BCM1480_SWPERF_CNT0 0xdfb91880 +#define A_BCM1480_SWPERF_CNT1 0xdfb91888 +#define A_BCM1480_SWPERF_CNT2 0xdfb91890 +#define A_BCM1480_SWPERF_CNT3 0xdfb91898 + + +/* ********************************************************************* + * Switch Trace Unit + ********************************************************************* */ + +#define A_BCM1480_SWTRC_MATCH_CONTROL_0 0xDFB91000 +#define A_BCM1480_SWTRC_MATCH_DATA_VALUE_0 0xDFB91100 +#define A_BCM1480_SWTRC_MATCH_DATA_MASK_0 0xDFB91108 +#define A_BCM1480_SWTRC_MATCH_TAG_VALUE_0 0xDFB91200 +#define A_BCM1480_SWTRC_MATCH_TAG_MAKS_0 0xDFB91208 +#define A_BCM1480_SWTRC_EVENT_0 0xDFB91300 +#define A_BCM1480_SWTRC_SEQUENCE_0 0xDFB91400 + +#define A_BCM1480_SWTRC_CFG 0xDFB91500 +#define A_BCM1480_SWTRC_READ 0xDFB91508 + +#define A_BCM1480_SWDEBUG_SCHEDSTOP 0xDFB92000 + +#define A_BCM1480_SWTRC_MATCH_CONTROL(x) (A_BCM1480_SWTRC_MATCH_CONTROL_0 + ((x)*8)) +#define A_BCM1480_SWTRC_EVENT(x) (A_BCM1480_SWTRC_EVENT_0 + ((x)*8)) +#define A_BCM1480_SWTRC_SEQUENCE(x) (A_BCM1480_SWTRC_SEQUENCE_0 + ((x)*8)) + +#define A_BCM1480_SWTRC_MATCH_DATA_VALUE(x) (A_BCM1480_SWTRC_MATCH_DATA_VALUE_0 + ((x)*16)) +#define A_BCM1480_SWTRC_MATCH_DATA_MASK(x) (A_BCM1480_SWTRC_MATCH_DATA_MASK_0 + ((x)*16)) +#define A_BCM1480_SWTRC_MATCH_TAG_VALUE(x) (A_BCM1480_SWTRC_MATCH_TAG_VALUE_0 + ((x)*16)) +#define A_BCM1480_SWTRC_MATCH_TAG_MASK(x) (A_BCM1480_SWTRC_MATCH_TAG_MASK_0 + ((x)*16)) + + + +/* ********************************************************************* + * High-Speed Port Registers (Section 13) + ********************************************************************* */ + +#define A_BCM1480_HSP_BASE_0 0x00DF810000 +#define A_BCM1480_HSP_BASE_1 0x00DF890000 +#define A_BCM1480_HSP_BASE_2 0x00DF910000 +#define BCM1480_HSP_REGISTER_SPACING 0x80000 + +#define A_BCM1480_HSP_BASE(idx) (A_BCM1480_HSP_BASE_0 + ((idx)*BCM1480_HSP_REGISTER_SPACING)) +#define A_BCM1480_HSP_REGISTER(idx,reg) (A_BCM1480_HSP_BASE(idx) + (reg)) + +#define R_BCM1480_HSP_RX_SPI4_CFG_0 0x0000000000 +#define R_BCM1480_HSP_RX_SPI4_CFG_1 0x0000000008 +#define R_BCM1480_HSP_RX_SPI4_DESKEW_OVERRIDE 0x0000000010 +#define R_BCM1480_HSP_RX_SPI4_DESKEW_DATAPATH 0x0000000018 +#define R_BCM1480_HSP_RX_SPI4_PORT_INT_EN 0x0000000020 +#define R_BCM1480_HSP_RX_SPI4_PORT_INT_STATUS 0x0000000028 + +#define R_BCM1480_HSP_RX_SPI4_CALENDAR_0 0x0000000200 +#define R_BCM1480_HSP_RX_SPI4_CALENDAR_1 0x0000000208 + +#define R_BCM1480_HSP_RX_PLL_CNFG 0x0000000800 +#define R_BCM1480_HSP_RX_CALIBRATION 0x0000000808 +#define R_BCM1480_HSP_RX_TEST 0x0000000810 +#define R_BCM1480_HSP_RX_DIAG_DETAILS 0x0000000818 +#define R_BCM1480_HSP_RX_DIAG_CRC_0 0x0000000820 +#define R_BCM1480_HSP_RX_DIAG_CRC_1 0x0000000828 +#define R_BCM1480_HSP_RX_DIAG_HTCMD 0x0000000830 +#define R_BCM1480_HSP_RX_DIAG_PKTCTL 0x0000000838 + +#define R_BCM1480_HSP_RX_VIS_FLCTRL_COUNTER 0x0000000870 + +#define R_BCM1480_HSP_RX_PKT_RAMALLOC_0 0x0000020020 +#define R_BCM1480_HSP_RX_PKT_RAMALLOC_1 0x0000020028 +#define R_BCM1480_HSP_RX_PKT_RAMALLOC_2 0x0000020030 +#define R_BCM1480_HSP_RX_PKT_RAMALLOC_3 0x0000020038 +#define R_BCM1480_HSP_RX_PKT_RAMALLOC_4 0x0000020040 +#define R_BCM1480_HSP_RX_PKT_RAMALLOC_5 0x0000020048 +#define R_BCM1480_HSP_RX_PKT_RAMALLOC_6 0x0000020050 +#define R_BCM1480_HSP_RX_PKT_RAMALLOC_7 0x0000020058 +#define R_BCM1480_HSP_RX_PKT_RAMALLOC(idx) (R_BCM1480_HSP_RX_PKT_RAMALLOC_0 + 8*(idx)) + +/* XXX Following registers were shuffled. Renamed/renumbered per errata. */ +#define R_BCM1480_HSP_RX_HT_RAMALLOC_0 0x0000020078 +#define R_BCM1480_HSP_RX_HT_RAMALLOC_1 0x0000020080 +#define R_BCM1480_HSP_RX_HT_RAMALLOC_2 0x0000020088 +#define R_BCM1480_HSP_RX_HT_RAMALLOC_3 0x0000020090 +#define R_BCM1480_HSP_RX_HT_RAMALLOC_4 0x0000020098 +#define R_BCM1480_HSP_RX_HT_RAMALLOC_5 0x00000200A0 + +#define R_BCM1480_HSP_RX_SPI_WATERMARK_0 0x00000200B0 +#define R_BCM1480_HSP_RX_SPI_WATERMARK_1 0x00000200B8 +#define R_BCM1480_HSP_RX_SPI_WATERMARK_2 0x00000200C0 +#define R_BCM1480_HSP_RX_SPI_WATERMARK_3 0x00000200C8 +#define R_BCM1480_HSP_RX_SPI_WATERMARK_4 0x00000200D0 +#define R_BCM1480_HSP_RX_SPI_WATERMARK_5 0x00000200D8 +#define R_BCM1480_HSP_RX_SPI_WATERMARK_6 0x00000200E0 +#define R_BCM1480_HSP_RX_SPI_WATERMARK_7 0x00000200E8 +#define R_BCM1480_HSP_RX_SPI_WATERMARK(idx) (R_BCM1480_HSP_RX_SPI_WATERMARK_0 + 8*(idx)) + +#define R_BCM1480_HSP_RX_VIS_CMDQ_0 0x00000200F0 +#define R_BCM1480_HSP_RX_VIS_CMDQ_1 0x00000200F8 +#define R_BCM1480_HSP_RX_VIS_CMDQ_2 0x0000020100 +#define R_BCM1480_HSP_RX_RAM_READCTL 0x0000020108 +#define R_BCM1480_HSP_RX_RAM_READWINDOW 0x0000020110 +#define R_BCM1480_HSP_RX_RF_READCTL 0x0000020118 +#define R_BCM1480_HSP_RX_RF_READWINDOW 0x0000020120 + +#define R_BCM1480_HSP_TX_SPI4_CFG_0 0x0000040000 +#define R_BCM1480_HSP_TX_SPI4_CFG_1 0x0000040008 +#define R_BCM1480_HSP_TX_SPI4_TRAINING_FMT 0x0000040010 + +#define R_BCM1480_HSP_TX_PKT_RAMALLOC_0 0x0000040020 +#define R_BCM1480_HSP_TX_PKT_RAMALLOC_1 0x0000040028 +#define R_BCM1480_HSP_TX_PKT_RAMALLOC_2 0x0000040030 +#define R_BCM1480_HSP_TX_PKT_RAMALLOC_3 0x0000040038 +#define R_BCM1480_HSP_TX_PKT_RAMALLOC_4 0x0000040040 +#define R_BCM1480_HSP_TX_PKT_RAMALLOC_5 0x0000040048 +#define R_BCM1480_HSP_TX_PKT_RAMALLOC_6 0x0000040050 +#define R_BCM1480_HSP_TX_PKT_RAMALLOC_7 0x0000040058 +#define R_BCM1480_HSP_TX_PKT_RAMALLOC(idx) (R_BCM1480_HSP_TX_PKT_RAMALLOC_0 + 8*(idx)) +#define R_BCM1480_HSP_TX_NPC_RAMALLOC 0x0000040078 +#define R_BCM1480_HSP_TX_RSP_RAMALLOC 0x0000040080 +#define R_BCM1480_HSP_TX_PC_RAMALLOC 0x0000040088 +#define R_BCM1480_HSP_TX_HTCC_RAMALLOC_0 0x0000040090 +#define R_BCM1480_HSP_TX_HTCC_RAMALLOC_1 0x0000040098 +#define R_BCM1480_HSP_TX_HTCC_RAMALLOC_2 0x00000400A0 + +#define R_BCM1480_HSP_TX_PKT_RXPHITCNT_0 0x00000400B0 +#define R_BCM1480_HSP_TX_PKT_RXPHITCNT_1 0x00000400B8 +#define R_BCM1480_HSP_TX_PKT_RXPHITCNT_2 0x00000400C0 +#define R_BCM1480_HSP_TX_PKT_RXPHITCNT_3 0x00000400C8 +#define R_BCM1480_HSP_TX_PKT_RXPHITCNT(idx) (R_BCM1480_HSP_TX_PKT_RXPHITCNT_0 + 8*(idx)) +#define R_BCM1480_HSP_TX_HTIO_RXPHITCNT 0x00000400D0 +#define R_BCM1480_HSP_TX_HTCC_RXPHITCNT 0x00000400D8 + +#define R_BCM1480_HSP_TX_PKT_TXPHITCNT_0 0x00000400E0 +#define R_BCM1480_HSP_TX_PKT_TXPHITCNT_1 0x00000400E8 +#define R_BCM1480_HSP_TX_PKT_TXPHITCNT_2 0x00000400F0 +#define R_BCM1480_HSP_TX_PKT_TXPHITCNT_3 0x00000400F8 +#define R_BCM1480_HSP_TX_PKT_TXPHITCNT(idx) (R_BCM1480_HSP_TX_PKT_TXPHITCNT_0 + 8*(idx)) +#define R_BCM1480_HSP_TX_HTIO_TXPHITCNT 0x0000040100 +#define R_BCM1480_HSP_TX_HTCC_TXPHITCNT 0x0000040108 + +#define R_BCM1480_HSP_TX_SPI4_CALENDAR_0 0x0000040200 +#define R_BCM1480_HSP_TX_SPI4_CALENDAR_1 0x0000040208 + +#define R_BCM1480_HSP_TX_PLL_CNFG 0x0000040800 +#define R_BCM1480_HSP_TX_CALIBRATION 0x0000040808 +#define R_BCM1480_HSP_TX_TEST 0x0000040810 + +#define R_BCM1480_HSP_TX_VIS_CMDQ_0 0x0000040840 +#define R_BCM1480_HSP_TX_VIS_CMDQ_1 0x0000040848 +#define R_BCM1480_HSP_TX_VIS_CMDQ_2 0x0000040850 +#define R_BCM1480_HSP_TX_RAM_READCTL 0x0000040860 +#define R_BCM1480_HSP_TX_RAM_READWINDOW 0x0000040868 +#define R_BCM1480_HSP_TX_RF_READCTL 0x0000040870 +#define R_BCM1480_HSP_TX_RF_READWINDOW 0x0000040878 + +#define R_BCM1480_HSP_TX_SPI4_PORT_INT_STATUS 0x0000040880 +#define R_BCM1480_HSP_TX_SPI4_PORT_INT_EN 0x0000040888 + +#define R_BCM1480_HSP_TX_NEXT_ADDR_BASE 0x000040400 +#define R_BCM1480_HSP_TX_NEXT_ADDR_REGISTER(x) (R_BCM1480_HSP_TX_NEXT_ADDR_BASE+ 8*(x)) + + + +/* ********************************************************************* + * Physical Address Map (Table 10 and Figure 7) + ********************************************************************* */ + +#define A_BCM1480_PHYS_MEMORY_0 _SB_MAKE64(0x0000000000) +#define A_BCM1480_PHYS_MEMORY_SIZE _SB_MAKE64((256*1024*1024)) +#define A_BCM1480_PHYS_SYSTEM_CTL _SB_MAKE64(0x0010000000) +#define A_BCM1480_PHYS_IO_SYSTEM _SB_MAKE64(0x0010060000) +#define A_BCM1480_PHYS_GENBUS _SB_MAKE64(0x0010090000) +#define A_BCM1480_PHYS_GENBUS_END _SB_MAKE64(0x0028000000) +#define A_BCM1480_PHYS_PCI_MISC_MATCH_BYTES _SB_MAKE64(0x0028000000) +#define A_BCM1480_PHYS_PCI_IACK_MATCH_BYTES _SB_MAKE64(0x0029000000) +#define A_BCM1480_PHYS_PCI_IO_MATCH_BYTES _SB_MAKE64(0x002C000000) +#define A_BCM1480_PHYS_PCI_CFG_MATCH_BYTES _SB_MAKE64(0x002E000000) +#define A_BCM1480_PHYS_PCI_OMAP_MATCH_BYTES _SB_MAKE64(0x002F000000) +#define A_BCM1480_PHYS_PCI_MEM_MATCH_BYTES _SB_MAKE64(0x0030000000) +#define A_BCM1480_PHYS_HT_MEM_MATCH_BYTES _SB_MAKE64(0x0040000000) +#define A_BCM1480_PHYS_HT_MEM_MATCH_BITS _SB_MAKE64(0x0060000000) +#define A_BCM1480_PHYS_MEMORY_1 _SB_MAKE64(0x0080000000) +#define A_BCM1480_PHYS_MEMORY_2 _SB_MAKE64(0x0090000000) +#define A_BCM1480_PHYS_PCI_MISC_MATCH_BITS _SB_MAKE64(0x00A8000000) +#define A_BCM1480_PHYS_PCI_IACK_MATCH_BITS _SB_MAKE64(0x00A9000000) +#define A_BCM1480_PHYS_PCI_IO_MATCH_BITS _SB_MAKE64(0x00AC000000) +#define A_BCM1480_PHYS_PCI_CFG_MATCH_BITS _SB_MAKE64(0x00AE000000) +#define A_BCM1480_PHYS_PCI_OMAP_MATCH_BITS _SB_MAKE64(0x00AF000000) +#define A_BCM1480_PHYS_PCI_MEM_MATCH_BITS _SB_MAKE64(0x00B0000000) +#define A_BCM1480_PHYS_MEMORY_3 _SB_MAKE64(0x00C0000000) +#define A_BCM1480_PHYS_L2_CACHE_TEST _SB_MAKE64(0x00D0000000) +#define A_BCM1480_PHYS_HT_SPECIAL_MATCH_BYTES _SB_MAKE64(0x00D8000000) +#define A_BCM1480_PHYS_HT_IO_MATCH_BYTES _SB_MAKE64(0x00DC000000) +#define A_BCM1480_PHYS_HT_CFG_MATCH_BYTES _SB_MAKE64(0x00DE000000) +#define A_BCM1480_PHYS_HS_SUBSYS _SB_MAKE64(0x00DF000000) +#define A_BCM1480_PHYS_HT_SPECIAL_MATCH_BITS _SB_MAKE64(0x00F8000000) +#define A_BCM1480_PHYS_HT_IO_MATCH_BITS _SB_MAKE64(0x00FC000000) +#define A_BCM1480_PHYS_HT_CFG_MATCH_BITS _SB_MAKE64(0x00FE000000) +#define A_BCM1480_PHYS_MEMORY_EXP _SB_MAKE64(0x0100000000) +#define A_BCM1480_PHYS_MEMORY_EXP_SIZE _SB_MAKE64((508*1024*1024*1024)) +#define A_BCM1480_PHYS_PCI_UPPER _SB_MAKE64(0x1000000000) +#define A_BCM1480_PHYS_HT_UPPER_MATCH_BYTES _SB_MAKE64(0x2000000000) +#define A_BCM1480_PHYS_HT_UPPER_MATCH_BITS _SB_MAKE64(0x3000000000) +#define A_BCM1480_PHYS_HT_NODE_ALIAS _SB_MAKE64(0x4000000000) +#define A_BCM1480_PHYS_HT_FULLACCESS _SB_MAKE64(0xF000000000) + + +/* ********************************************************************* + * L2 Cache as RAM (Table 54) + ********************************************************************* */ + +#define A_BCM1480_PHYS_L2CACHE_WAY_SIZE _SB_MAKE64(0x0000020000) +#define BCM1480_PHYS_L2CACHE_NUM_WAYS 8 +#define A_BCM1480_PHYS_L2CACHE_TOTAL_SIZE _SB_MAKE64(0x0000100000) +#define A_BCM1480_PHYS_L2CACHE_WAY0 _SB_MAKE64(0x00D0300000) +#define A_BCM1480_PHYS_L2CACHE_WAY1 _SB_MAKE64(0x00D0320000) +#define A_BCM1480_PHYS_L2CACHE_WAY2 _SB_MAKE64(0x00D0340000) +#define A_BCM1480_PHYS_L2CACHE_WAY3 _SB_MAKE64(0x00D0360000) +#define A_BCM1480_PHYS_L2CACHE_WAY4 _SB_MAKE64(0x00D0380000) +#define A_BCM1480_PHYS_L2CACHE_WAY5 _SB_MAKE64(0x00D03A0000) +#define A_BCM1480_PHYS_L2CACHE_WAY6 _SB_MAKE64(0x00D03C0000) +#define A_BCM1480_PHYS_L2CACHE_WAY7 _SB_MAKE64(0x00D03E0000) + +#endif /* _BCM1480_REGS_H */ diff --git a/include/asm-mips/sibyte/bcm1480_scd.h b/include/asm-mips/sibyte/bcm1480_scd.h new file mode 100644 index 000000000000..648bed96780f --- /dev/null +++ b/include/asm-mips/sibyte/bcm1480_scd.h @@ -0,0 +1,436 @@ +/* ********************************************************************* + * BCM1280/BCM1400 Board Support Package + * + * SCD Constants and Macros File: bcm1480_scd.h + * + * This module contains constants and macros useful for + * manipulating the System Control and Debug module. + * + * BCM1400 specification level: 1X55_1X80-UM100-R (12/18/03) + * + ********************************************************************* + * + * Copyright 2000,2001,2002,2003 + * Broadcom Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + ********************************************************************* */ + +#ifndef _BCM1480_SCD_H +#define _BCM1480_SCD_H + +#include "sb1250_defs.h" + +/* ********************************************************************* + * Pull in the BCM1250's SCD since lots of stuff is the same. + ********************************************************************* */ + +#include "sb1250_scd.h" + +/* ********************************************************************* + * Some general notes: + * + * This file is basically a "what's new" header file. Since the + * BCM1250 and the new BCM1480 (and derivatives) share many common + * features, this file contains only what's new or changed from + * the 1250. (above, you can see that we include the 1250 symbols + * to get the base functionality). + * + * In software, be sure to use the correct symbols, particularly + * for blocks that are different between the two chip families. + * All BCM1480-specific symbols have _BCM1480_ in their names, + * and all BCM1250-specific and "base" functions that are common in + * both chips have no special names (this is for compatibility with + * older include files). Therefore, if you're working with the + * SCD, which is very different on each chip, A_SCD_xxx implies + * the BCM1250 version and A_BCM1480_SCD_xxx implies the BCM1480 + * version. + ********************************************************************* */ + +/* ********************************************************************* + * System control/debug registers + ********************************************************************* */ + +/* + * System Identification and Revision Register (Table 12) + * Register: SCD_SYSTEM_REVISION + * This register is field compatible with the 1250. + */ + +/* + * New part definitions + */ + +#define K_SYS_PART_BCM1480 0x1406 +#define K_SYS_PART_BCM1280 0x1206 +#define K_SYS_PART_BCM1455 0x1407 +#define K_SYS_PART_BCM1255 0x1257 + +/* + * Manufacturing Information Register (Table 14) + * Register: SCD_SYSTEM_MANUF + */ + +/* + * System Configuration Register (Table 15) + * Register: SCD_SYSTEM_CFG + * Entire register is different from 1250, all new constants below + */ + +#define M_BCM1480_SYS_RESERVED0 _SB_MAKEMASK1(0) +#define M_BCM1480_SYS_HT_MINRSTCNT _SB_MAKEMASK1(1) +#define M_BCM1480_SYS_RESERVED2 _SB_MAKEMASK1(2) +#define M_BCM1480_SYS_RESERVED3 _SB_MAKEMASK1(3) +#define M_BCM1480_SYS_RESERVED4 _SB_MAKEMASK1(4) +#define M_BCM1480_SYS_IOB_DIV _SB_MAKEMASK1(5) + +#define S_BCM1480_SYS_PLL_DIV _SB_MAKE64(6) +#define M_BCM1480_SYS_PLL_DIV _SB_MAKEMASK(5,S_BCM1480_SYS_PLL_DIV) +#define V_BCM1480_SYS_PLL_DIV(x) _SB_MAKEVALUE(x,S_BCM1480_SYS_PLL_DIV) +#define G_BCM1480_SYS_PLL_DIV(x) _SB_GETVALUE(x,S_BCM1480_SYS_PLL_DIV,M_BCM1480_SYS_PLL_DIV) + +#define S_BCM1480_SYS_SW_DIV _SB_MAKE64(11) +#define M_BCM1480_SYS_SW_DIV _SB_MAKEMASK(5,S_BCM1480_SYS_SW_DIV) +#define V_BCM1480_SYS_SW_DIV(x) _SB_MAKEVALUE(x,S_BCM1480_SYS_SW_DIV) +#define G_BCM1480_SYS_SW_DIV(x) _SB_GETVALUE(x,S_BCM1480_SYS_SW_DIV,M_BCM1480_SYS_SW_DIV) + +#define M_BCM1480_SYS_PCMCIA_ENABLE _SB_MAKEMASK1(16) +#define M_BCM1480_SYS_DUART1_ENABLE _SB_MAKEMASK1(17) + +#define S_BCM1480_SYS_BOOT_MODE _SB_MAKE64(18) +#define M_BCM1480_SYS_BOOT_MODE _SB_MAKEMASK(2,S_BCM1480_SYS_BOOT_MODE) +#define V_BCM1480_SYS_BOOT_MODE(x) _SB_MAKEVALUE(x,S_BCM1480_SYS_BOOT_MODE) +#define G_BCM1480_SYS_BOOT_MODE(x) _SB_GETVALUE(x,S_BCM1480_SYS_BOOT_MODE,M_BCM1480_SYS_BOOT_MODE) +#define K_BCM1480_SYS_BOOT_MODE_ROM32 0 +#define K_BCM1480_SYS_BOOT_MODE_ROM8 1 +#define K_BCM1480_SYS_BOOT_MODE_SMBUS_SMALL 2 +#define K_BCM1480_SYS_BOOT_MODE_SMBUS_BIG 3 +#define M_BCM1480_SYS_BOOT_MODE_SMBUS _SB_MAKEMASK1(19) + +#define M_BCM1480_SYS_PCI_HOST _SB_MAKEMASK1(20) +#define M_BCM1480_SYS_PCI_ARBITER _SB_MAKEMASK1(21) +#define M_BCM1480_SYS_BIG_ENDIAN _SB_MAKEMASK1(22) +#define M_BCM1480_SYS_GENCLK_EN _SB_MAKEMASK1(23) +#define M_BCM1480_SYS_GEN_PARITY_EN _SB_MAKEMASK1(24) +#define M_BCM1480_SYS_RESERVED25 _SB_MAKEMASK1(25) + +#define S_BCM1480_SYS_CONFIG 26 +#define M_BCM1480_SYS_CONFIG _SB_MAKEMASK(6,S_BCM1480_SYS_CONFIG) +#define V_BCM1480_SYS_CONFIG(x) _SB_MAKEVALUE(x,S_BCM1480_SYS_CONFIG) +#define G_BCM1480_SYS_CONFIG(x) _SB_GETVALUE(x,S_BCM1480_SYS_CONFIG,M_BCM1480_SYS_CONFIG) + +#define M_BCM1480_SYS_RESERVED32 _SB_MAKEMASK(32,15) + +#define S_BCM1480_SYS_NODEID 47 +#define M_BCM1480_SYS_NODEID _SB_MAKEMASK(4,S_BCM1480_SYS_NODEID) +#define V_BCM1480_SYS_NODEID(x) _SB_MAKEVALUE(x,S_BCM1480_SYS_NODEID) +#define G_BCM1480_SYS_NODEID(x) _SB_GETVALUE(x,S_BCM1480_SYS_NODEID,M_BCM1480_SYS_NODEID) + +#define M_BCM1480_SYS_CCNUMA_EN _SB_MAKEMASK1(51) +#define M_BCM1480_SYS_CPU_RESET_0 _SB_MAKEMASK1(52) +#define M_BCM1480_SYS_CPU_RESET_1 _SB_MAKEMASK1(53) +#define M_BCM1480_SYS_CPU_RESET_2 _SB_MAKEMASK1(54) +#define M_BCM1480_SYS_CPU_RESET_3 _SB_MAKEMASK1(55) +#define S_BCM1480_SYS_DISABLECPU0 56 +#define M_BCM1480_SYS_DISABLECPU0 _SB_MAKEMASK1(S_BCM1480_SYS_DISABLECPU0) +#define S_BCM1480_SYS_DISABLECPU1 57 +#define M_BCM1480_SYS_DISABLECPU1 _SB_MAKEMASK1(S_BCM1480_SYS_DISABLECPU1) +#define S_BCM1480_SYS_DISABLECPU2 58 +#define M_BCM1480_SYS_DISABLECPU2 _SB_MAKEMASK1(S_BCM1480_SYS_DISABLECPU2) +#define S_BCM1480_SYS_DISABLECPU3 59 +#define M_BCM1480_SYS_DISABLECPU3 _SB_MAKEMASK1(S_BCM1480_SYS_DISABLECPU3) + +#define M_BCM1480_SYS_SB_SOFTRES _SB_MAKEMASK1(60) +#define M_BCM1480_SYS_EXT_RESET _SB_MAKEMASK1(61) +#define M_BCM1480_SYS_SYSTEM_RESET _SB_MAKEMASK1(62) +#define M_BCM1480_SYS_SW_FLAG _SB_MAKEMASK1(63) + +/* + * Scratch Register (Table 16) + * Register: SCD_SYSTEM_SCRATCH + * Same as BCM1250 + */ + + +/* + * Mailbox Registers (Table 17) + * Registers: SCD_MBOX_{0,1}_CPU_x + * Same as BCM1250 + */ + + +/* + * See bcm1480_int.h for interrupt mapper registers. + */ + + +/* + * Watchdog Timer Initial Count Registers (Table 23) + * Registers: SCD_WDOG_INIT_CNT_x + * + * The watchdogs are almost the same as the 1250, except + * the configuration register has more bits to control the + * other CPUs. + */ + + +/* + * Watchdog Timer Configuration Registers (Table 25) + * Registers: SCD_WDOG_CFG_x + */ + +#define M_BCM1480_SCD_WDOG_ENABLE _SB_MAKEMASK1(0) + +#define S_BCM1480_SCD_WDOG_RESET_TYPE 2 +#define M_BCM1480_SCD_WDOG_RESET_TYPE _SB_MAKEMASK(5,S_BCM1480_SCD_WDOG_RESET_TYPE) +#define V_BCM1480_SCD_WDOG_RESET_TYPE(x) _SB_MAKEVALUE(x,S_BCM1480_SCD_WDOG_RESET_TYPE) +#define G_BCM1480_SCD_WDOG_RESET_TYPE(x) _SB_GETVALUE(x,S_BCM1480_SCD_WDOG_RESET_TYPE,M_BCM1480_SCD_WDOG_RESET_TYPE) + +#define K_BCM1480_SCD_WDOG_RESET_FULL 0 /* actually, (x & 1) == 0 */ +#define K_BCM1480_SCD_WDOG_RESET_SOFT 1 +#define K_BCM1480_SCD_WDOG_RESET_CPU0 3 +#define K_BCM1480_SCD_WDOG_RESET_CPU1 5 +#define K_BCM1480_SCD_WDOG_RESET_CPU2 9 +#define K_BCM1480_SCD_WDOG_RESET_CPU3 17 +#define K_BCM1480_SCD_WDOG_RESET_ALL_CPUS 31 + + +#define M_BCM1480_SCD_WDOG_HAS_RESET _SB_MAKEMASK1(8) + +/* + * General Timer Initial Count Registers (Table 26) + * Registers: SCD_TIMER_INIT_x + * + * The timer registers are the same as the BCM1250 + */ + + +/* + * ZBbus Count Register (Table 29) + * Register: ZBBUS_CYCLE_COUNT + * + * Same as BCM1250 + */ + +/* + * ZBbus Compare Registers (Table 30) + * Registers: ZBBUS_CYCLE_CPx + * + * Same as BCM1250 + */ + + +/* + * System Performance Counter Configuration Register (Table 31) + * Register: PERF_CNT_CFG_0 + * + * Since the clear/enable bits are moved compared to the + * 1250 and there are more fields, this register will be BCM1480 specific. + */ + +#define S_BCM1480_SPC_CFG_SRC0 0 +#define M_BCM1480_SPC_CFG_SRC0 _SB_MAKEMASK(8,S_BCM1480_SPC_CFG_SRC0) +#define V_BCM1480_SPC_CFG_SRC0(x) _SB_MAKEVALUE(x,S_BCM1480_SPC_CFG_SRC0) +#define G_BCM1480_SPC_CFG_SRC0(x) _SB_GETVALUE(x,S_BCM1480_SPC_CFG_SRC0,M_BCM1480_SPC_CFG_SRC0) + +#define S_BCM1480_SPC_CFG_SRC1 8 +#define M_BCM1480_SPC_CFG_SRC1 _SB_MAKEMASK(8,S_BCM1480_SPC_CFG_SRC1) +#define V_BCM1480_SPC_CFG_SRC1(x) _SB_MAKEVALUE(x,S_BCM1480_SPC_CFG_SRC1) +#define G_BCM1480_SPC_CFG_SRC1(x) _SB_GETVALUE(x,S_BCM1480_SPC_CFG_SRC1,M_BCM1480_SPC_CFG_SRC1) + +#define S_BCM1480_SPC_CFG_SRC2 16 +#define M_BCM1480_SPC_CFG_SRC2 _SB_MAKEMASK(8,S_BCM1480_SPC_CFG_SRC2) +#define V_BCM1480_SPC_CFG_SRC2(x) _SB_MAKEVALUE(x,S_BCM1480_SPC_CFG_SRC2) +#define G_BCM1480_SPC_CFG_SRC2(x) _SB_GETVALUE(x,S_BCM1480_SPC_CFG_SRC2,M_BCM1480_SPC_CFG_SRC2) + +#define S_BCM1480_SPC_CFG_SRC3 24 +#define M_BCM1480_SPC_CFG_SRC3 _SB_MAKEMASK(8,S_BCM1480_SPC_CFG_SRC3) +#define V_BCM1480_SPC_CFG_SRC3(x) _SB_MAKEVALUE(x,S_BCM1480_SPC_CFG_SRC3) +#define G_BCM1480_SPC_CFG_SRC3(x) _SB_GETVALUE(x,S_BCM1480_SPC_CFG_SRC3,M_BCM1480_SPC_CFG_SRC3) + +#define S_BCM1480_SPC_CFG_SRC4 32 +#define M_BCM1480_SPC_CFG_SRC4 _SB_MAKEMASK(8,S_BCM1480_SPC_CFG_SRC4) +#define V_BCM1480_SPC_CFG_SRC4(x) _SB_MAKEVALUE(x,S_BCM1480_SPC_CFG_SRC4) +#define G_BCM1480_SPC_CFG_SRC4(x) _SB_GETVALUE(x,S_BCM1480_SPC_CFG_SRC4,M_BCM1480_SPC_CFG_SRC4) + +#define S_BCM1480_SPC_CFG_SRC5 40 +#define M_BCM1480_SPC_CFG_SRC5 _SB_MAKEMASK(8,S_BCM1480_SPC_CFG_SRC5) +#define V_BCM1480_SPC_CFG_SRC5(x) _SB_MAKEVALUE(x,S_BCM1480_SPC_CFG_SRC5) +#define G_BCM1480_SPC_CFG_SRC5(x) _SB_GETVALUE(x,S_BCM1480_SPC_CFG_SRC5,M_BCM1480_SPC_CFG_SRC5) + +#define S_BCM1480_SPC_CFG_SRC6 48 +#define M_BCM1480_SPC_CFG_SRC6 _SB_MAKEMASK(8,S_BCM1480_SPC_CFG_SRC6) +#define V_BCM1480_SPC_CFG_SRC6(x) _SB_MAKEVALUE(x,S_BCM1480_SPC_CFG_SRC6) +#define G_BCM1480_SPC_CFG_SRC6(x) _SB_GETVALUE(x,S_BCM1480_SPC_CFG_SRC6,M_BCM1480_SPC_CFG_SRC6) + +#define S_BCM1480_SPC_CFG_SRC7 56 +#define M_BCM1480_SPC_CFG_SRC7 _SB_MAKEMASK(8,S_BCM1480_SPC_CFG_SRC7) +#define V_BCM1480_SPC_CFG_SRC7(x) _SB_MAKEVALUE(x,S_BCM1480_SPC_CFG_SRC7) +#define G_BCM1480_SPC_CFG_SRC7(x) _SB_GETVALUE(x,S_BCM1480_SPC_CFG_SRC7,M_BCM1480_SPC_CFG_SRC7) + +/* + * System Performance Counter Control Register (Table 32) + * Register: PERF_CNT_CFG_1 + * BCM1480 specific + */ + +#define M_BCM1480_SPC_CFG_CLEAR _SB_MAKEMASK1(0) +#define M_BCM1480_SPC_CFG_ENABLE _SB_MAKEMASK1(1) + +/* + * System Performance Counters (Table 33) + * Registers: PERF_CNT_x + */ + +#define S_BCM1480_SPC_CNT_COUNT 0 +#define M_BCM1480_SPC_CNT_COUNT _SB_MAKEMASK(40,S_BCM1480_SPC_CNT_COUNT) +#define V_BCM1480_SPC_CNT_COUNT(x) _SB_MAKEVALUE(x,S_BCM1480_SPC_CNT_COUNT) +#define G_BCM1480_SPC_CNT_COUNT(x) _SB_GETVALUE(x,S_BCM1480_SPC_CNT_COUNT,M_BCM1480_SPC_CNT_COUNT) + +#define M_BCM1480_SPC_CNT_OFLOW _SB_MAKEMASK1(40) + + +/* + * Bus Watcher Error Status Register (Tables 36, 37) + * Registers: BUS_ERR_STATUS, BUS_ERR_STATUS_DEBUG + * Same as BCM1250. + */ + +/* + * Bus Watcher Error Data Registers (Table 38) + * Registers: BUS_ERR_DATA_x + * Same as BCM1250. + */ + +/* + * Bus Watcher L2 ECC Counter Register (Table 39) + * Register: BUS_L2_ERRORS + * Same as BCM1250. + */ + + +/* + * Bus Watcher Memory and I/O Error Counter Register (Table 40) + * Register: BUS_MEM_IO_ERRORS + * Same as BCM1250. + */ + + +/* + * Address Trap Registers + * + * Register layout same as BCM1250, almost. The bus agents + * are different, and the address trap configuration bits are + * slightly different. + */ + +#define M_BCM1480_ATRAP_INDEX _SB_MAKEMASK(4,0) +#define M_BCM1480_ATRAP_ADDRESS _SB_MAKEMASK(40,0) + +#define S_BCM1480_ATRAP_CFG_CNT 0 +#define M_BCM1480_ATRAP_CFG_CNT _SB_MAKEMASK(3,S_BCM1480_ATRAP_CFG_CNT) +#define V_BCM1480_ATRAP_CFG_CNT(x) _SB_MAKEVALUE(x,S_BCM1480_ATRAP_CFG_CNT) +#define G_BCM1480_ATRAP_CFG_CNT(x) _SB_GETVALUE(x,S_BCM1480_ATRAP_CFG_CNT,M_BCM1480_ATRAP_CFG_CNT) + +#define M_BCM1480_ATRAP_CFG_WRITE _SB_MAKEMASK1(3) +#define M_BCM1480_ATRAP_CFG_ALL _SB_MAKEMASK1(4) +#define M_BCM1480_ATRAP_CFG_INV _SB_MAKEMASK1(5) +#define M_BCM1480_ATRAP_CFG_USESRC _SB_MAKEMASK1(6) +#define M_BCM1480_ATRAP_CFG_SRCINV _SB_MAKEMASK1(7) + +#define S_BCM1480_ATRAP_CFG_AGENTID 8 +#define M_BCM1480_ATRAP_CFG_AGENTID _SB_MAKEMASK(4,S_BCM1480_ATRAP_CFG_AGENTID) +#define V_BCM1480_ATRAP_CFG_AGENTID(x) _SB_MAKEVALUE(x,S_BCM1480_ATRAP_CFG_AGENTID) +#define G_BCM1480_ATRAP_CFG_AGENTID(x) _SB_GETVALUE(x,S_BCM1480_ATRAP_CFG_AGENTID,M_BCM1480_ATRAP_CFG_AGENTID) + + +#define K_BCM1480_BUS_AGENT_CPU0 0 +#define K_BCM1480_BUS_AGENT_CPU1 1 +#define K_BCM1480_BUS_AGENT_NC 2 +#define K_BCM1480_BUS_AGENT_IOB 3 +#define K_BCM1480_BUS_AGENT_SCD 4 +#define K_BCM1480_BUS_AGENT_L2C 6 +#define K_BCM1480_BUS_AGENT_MC 7 +#define K_BCM1480_BUS_AGENT_CPU2 8 +#define K_BCM1480_BUS_AGENT_CPU3 9 +#define K_BCM1480_BUS_AGENT_PM 10 + +#define S_BCM1480_ATRAP_CFG_CATTR 12 +#define M_BCM1480_ATRAP_CFG_CATTR _SB_MAKEMASK(2,S_BCM1480_ATRAP_CFG_CATTR) +#define V_BCM1480_ATRAP_CFG_CATTR(x) _SB_MAKEVALUE(x,S_BCM1480_ATRAP_CFG_CATTR) +#define G_BCM1480_ATRAP_CFG_CATTR(x) _SB_GETVALUE(x,S_BCM1480_ATRAP_CFG_CATTR,M_BCM1480_ATRAP_CFG_CATTR) + +#define K_BCM1480_ATRAP_CFG_CATTR_IGNORE 0 +#define K_BCM1480_ATRAP_CFG_CATTR_UNC 1 +#define K_BCM1480_ATRAP_CFG_CATTR_NONCOH 2 +#define K_BCM1480_ATRAP_CFG_CATTR_COHERENT 3 + +#define M_BCM1480_ATRAP_CFG_CATTRINV _SB_MAKEMASK1(14) + + +/* + * Trace Event Registers (Table 47) + * Same as BCM1250. + */ + +/* + * Trace Sequence Control Registers (Table 48) + * Registers: TRACE_SEQUENCE_x + * + * Same as BCM1250 except for two new fields. + */ + + +#define M_BCM1480_SCD_TRSEQ_TID_MATCH_EN _SB_MAKEMASK1(25) + +#define S_BCM1480_SCD_TRSEQ_SWFUNC 26 +#define M_BCM1480_SCD_TRSEQ_SWFUNC _SB_MAKEMASK(2,S_BCM1480_SCD_TRSEQ_SWFUNC) +#define V_BCM1480_SCD_TRSEQ_SWFUNC(x) _SB_MAKEVALUE(x,S_BCM1480_SCD_TRSEQ_SWFUNC) +#define G_BCM1480_SCD_TRSEQ_SWFUNC(x) _SB_GETVALUE(x,S_BCM1480_SCD_TRSEQ_SWFUNC,M_BCM1480_SCD_TRSEQ_SWFUNC) + +/* + * Trace Control Register (Table 49) + * Register: TRACE_CFG + * + * Bits 0..8 are the same as the BCM1250, rest are different. + * Entire register is redefined below. + */ + +#define M_BCM1480_SCD_TRACE_CFG_RESET _SB_MAKEMASK1(0) +#define M_BCM1480_SCD_TRACE_CFG_START_READ _SB_MAKEMASK1(1) +#define M_BCM1480_SCD_TRACE_CFG_START _SB_MAKEMASK1(2) +#define M_BCM1480_SCD_TRACE_CFG_STOP _SB_MAKEMASK1(3) +#define M_BCM1480_SCD_TRACE_CFG_FREEZE _SB_MAKEMASK1(4) +#define M_BCM1480_SCD_TRACE_CFG_FREEZE_FULL _SB_MAKEMASK1(5) +#define M_BCM1480_SCD_TRACE_CFG_DEBUG_FULL _SB_MAKEMASK1(6) +#define M_BCM1480_SCD_TRACE_CFG_FULL _SB_MAKEMASK1(7) +#define M_BCM1480_SCD_TRACE_CFG_FORCE_CNT _SB_MAKEMASK1(8) + +#define S_BCM1480_SCD_TRACE_CFG_MODE 16 +#define M_BCM1480_SCD_TRACE_CFG_MODE _SB_MAKEMASK(2,S_BCM1480_SCD_TRACE_CFG_MODE) +#define V_BCM1480_SCD_TRACE_CFG_MODE(x) _SB_MAKEVALUE(x,S_BCM1480_SCD_TRACE_CFG_MODE) +#define G_BCM1480_SCD_TRACE_CFG_MODE(x) _SB_GETVALUE(x,S_BCM1480_SCD_TRACE_CFG_MODE,M_BCM1480_SCD_TRACE_CFG_MODE) + +#define K_BCM1480_SCD_TRACE_CFG_MODE_BLOCKERS 0 +#define K_BCM1480_SCD_TRACE_CFG_MODE_BYTEEN_INT 1 +#define K_BCM1480_SCD_TRACE_CFG_MODE_FLOW_ID 2 + +#define S_BCM1480_SCD_TRACE_CFG_CUR_ADDR 24 +#define M_BCM1480_SCD_TRACE_CFG_CUR_ADDR _SB_MAKEMASK(8,S_BCM1480_SCD_TRACE_CFG_CUR_ADDR) +#define V_BCM1480_SCD_TRACE_CFG_CUR_ADDR(x) _SB_MAKEVALUE(x,S_BCM1480_SCD_TRACE_CFG_CUR_ADDR) +#define G_BCM1480_SCD_TRACE_CFG_CUR_ADDR(x) _SB_GETVALUE(x,S_BCM1480_SCD_TRACE_CFG_CUR_ADDR,M_BCM1480_SCD_TRACE_CFG_CUR_ADDR) + +#endif /* _BCM1480_SCD_H */ diff --git a/include/asm-mips/sibyte/bigsur.h b/include/asm-mips/sibyte/bigsur.h new file mode 100644 index 000000000000..ebefe797fc1d --- /dev/null +++ b/include/asm-mips/sibyte/bigsur.h @@ -0,0 +1,49 @@ +/* + * Copyright (C) 2000,2001,2002,2003,2004 Broadcom Corporation + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + */ +#ifndef __ASM_SIBYTE_BIGSUR_H +#define __ASM_SIBYTE_BIGSUR_H + +#include <asm/sibyte/sb1250.h> +#include <asm/sibyte/bcm1480_int.h> + +#ifdef CONFIG_SIBYTE_BIGSUR +#define SIBYTE_BOARD_NAME "BCM91x80A/B (BigSur)" +#define SIBYTE_HAVE_PCMCIA 1 +#define SIBYTE_HAVE_IDE 1 +#endif + +/* Generic bus chip selects */ +#define LEDS_CS 3 +#define LEDS_PHYS 0x100a0000 + +#ifdef SIBYTE_HAVE_IDE +#define IDE_CS 4 +#define IDE_PHYS 0x100b0000 +#define K_GPIO_GB_IDE 4 +#define K_INT_GB_IDE (K_INT_GPIO_0 + K_GPIO_GB_IDE) +#endif + +#ifdef SIBYTE_HAVE_PCMCIA +#define PCMCIA_CS 6 +#define PCMCIA_PHYS 0x11000000 +#define K_GPIO_PC_READY 9 +#define K_INT_PC_READY (K_INT_GPIO_0 + K_GPIO_PC_READY) +#endif + +#endif /* __ASM_SIBYTE_BIGSUR_H */ + diff --git a/include/asm-mips/sibyte/board.h b/include/asm-mips/sibyte/board.h index d7b11b6c7c32..900edcbeec37 100644 --- a/include/asm-mips/sibyte/board.h +++ b/include/asm-mips/sibyte/board.h @@ -21,8 +21,6 @@ #include <linux/config.h> -#ifdef CONFIG_SIBYTE_BOARD - #if defined(CONFIG_SIBYTE_SWARM) || defined(CONFIG_SIBYTE_PTSWARM) || \ defined(CONFIG_SIBYTE_CRHONE) || defined(CONFIG_SIBYTE_CRHINE) || \ defined(CONFIG_SIBYTE_LITTLESUR) @@ -37,6 +35,10 @@ #include <asm/sibyte/carmel.h> #endif +#ifdef CONFIG_SIBYTE_BIGSUR +#include <asm/sibyte/bigsur.h> +#endif + #ifdef __ASSEMBLY__ #ifdef LEDS_PHYS @@ -54,16 +56,6 @@ #define setleds(t0,t1,c0,c1,c2,c3) #endif /* LEDS_PHYS */ -#else - -#ifdef LEDS_PHYS -extern void setleds(char *str); -#else -#define setleds(s) do { } while (0) -#endif /* LEDS_PHYS */ - #endif /* __ASSEMBLY__ */ -#endif /* CONFIG_SIBYTE_BOARD */ - #endif /* _SIBYTE_BOARD_H */ diff --git a/include/asm-mips/sibyte/sb1250.h b/include/asm-mips/sibyte/sb1250.h index d62da4e2dd36..a474c29cd701 100644 --- a/include/asm-mips/sibyte/sb1250.h +++ b/include/asm-mips/sibyte/sb1250.h @@ -27,6 +27,9 @@ #define SB1250_NR_IRQS 64 +#define BCM1480_NR_IRQS 128 +#define BCM1480_NR_IRQS_HALF 64 + #define SB1250_DUART_MINOR_BASE 64 #ifndef __ASSEMBLY__ @@ -35,6 +38,7 @@ /* For revision/pass information */ #include <asm/sibyte/sb1250_scd.h> +#include <asm/sibyte/bcm1480_scd.h> extern unsigned int sb1_pass; extern unsigned int soc_pass; extern unsigned int soc_type; @@ -46,6 +50,13 @@ extern unsigned long sb1250_gettimeoffset(void); extern void sb1250_mask_irq(int cpu, int irq); extern void sb1250_unmask_irq(int cpu, int irq); extern void sb1250_smp_finish(void); + +extern void bcm1480_time_init(void); +extern unsigned long bcm1480_gettimeoffset(void); +extern void bcm1480_mask_irq(int cpu, int irq); +extern void bcm1480_unmask_irq(int cpu, int irq); +extern void bcm1480_smp_finish(void); + extern void prom_printf(char *fmt, ...); #define AT_spin \ @@ -58,6 +69,6 @@ extern void prom_printf(char *fmt, ...); #endif -#define IOADDR(a) (IO_BASE + (a)) +#define IOADDR(a) ((volatile void __iomem *)(IO_BASE + (a))) #endif diff --git a/include/asm-mips/sibyte/sb1250_defs.h b/include/asm-mips/sibyte/sb1250_defs.h index 40ef97c76c8b..335dbaf1d831 100644 --- a/include/asm-mips/sibyte/sb1250_defs.h +++ b/include/asm-mips/sibyte/sb1250_defs.h @@ -8,8 +8,6 @@ * * SB1250 specification level: User's manual 1/02/02 * - * Author: Mitch Lichtenberg - * ********************************************************************* * * Copyright 2000,2001,2002,2003 @@ -97,13 +95,17 @@ * ordering, so be careful when adding support for new minor revs. ********************************************************************* */ -#define SIBYTE_HDR_FMASK_1250_ALL 0x00000ff -#define SIBYTE_HDR_FMASK_1250_PASS1 0x0000001 -#define SIBYTE_HDR_FMASK_1250_PASS2 0x0000002 -#define SIBYTE_HDR_FMASK_1250_PASS3 0x0000004 +#define SIBYTE_HDR_FMASK_1250_ALL 0x000000ff +#define SIBYTE_HDR_FMASK_1250_PASS1 0x00000001 +#define SIBYTE_HDR_FMASK_1250_PASS2 0x00000002 +#define SIBYTE_HDR_FMASK_1250_PASS3 0x00000004 + +#define SIBYTE_HDR_FMASK_112x_ALL 0x00000f00 +#define SIBYTE_HDR_FMASK_112x_PASS1 0x00000100 -#define SIBYTE_HDR_FMASK_112x_ALL 0x0000f00 -#define SIBYTE_HDR_FMASK_112x_PASS1 0x0000100 +#define SIBYTE_HDR_FMASK_1480_ALL 0x0000f000 +#define SIBYTE_HDR_FMASK_1480_PASS1 0x00001000 +#define SIBYTE_HDR_FMASK_1480_PASS2 0x00002000 /* Bit mask for chip/revision. (use _ALL for all revisions of a chip). */ #define SIBYTE_HDR_FMASK(chip, pass) \ @@ -111,8 +113,17 @@ #define SIBYTE_HDR_FMASK_ALLREVS(chip) \ (SIBYTE_HDR_FMASK_ ## chip ## _ALL) +/* Default constant value for all chips, all revisions */ #define SIBYTE_HDR_FMASK_ALL \ + (SIBYTE_HDR_FMASK_1250_ALL | SIBYTE_HDR_FMASK_112x_ALL \ + | SIBYTE_HDR_FMASK_1480_ALL) + +/* This one is used for the "original" BCM1250/BCM112x chips. We use this + to weed out constants and macros that do not exist on later chips like + the BCM1480 */ +#define SIBYTE_HDR_FMASK_1250_112x_ALL \ (SIBYTE_HDR_FMASK_1250_ALL | SIBYTE_HDR_FMASK_112x_ALL) +#define SIBYTE_HDR_FMASK_1250_112x SIBYTE_HDR_FMASK_1250_112x_ALL #ifndef SIBYTE_HDR_FEATURES #define SIBYTE_HDR_FEATURES SIBYTE_HDR_FMASK_ALL @@ -133,6 +144,12 @@ #define SIBYTE_HDR_FEATURE_CHIP(chip) \ (!! (SIBYTE_HDR_FMASK_ALLREVS(chip) & SIBYTE_HDR_FEATURES)) +/* True for all versions of the BCM1250 and BCM1125, but not true for + anything else */ +#define SIBYTE_HDR_FEATURE_1250_112x \ + (SIBYTE_HDR_FEATURE_CHIP(1250) || SIBYTE_HDR_FEATURE_CHIP(112x)) +/* (!! (SIBYTE_HDR_FEATURES & SIBYHTE_HDR_FMASK_1250_112x)) */ + /* True if header features enabled for that rev or later, inclusive. */ #define SIBYTE_HDR_FEATURE(chip, pass) \ (!! ((SIBYTE_HDR_FMASK(chip, pass) \ diff --git a/include/asm-mips/sibyte/sb1250_dma.h b/include/asm-mips/sibyte/sb1250_dma.h index 3cdb48f50ed0..e6145f524fbd 100644 --- a/include/asm-mips/sibyte/sb1250_dma.h +++ b/include/asm-mips/sibyte/sb1250_dma.h @@ -7,9 +7,8 @@ * programming the SB1250's DMA controllers, both the data mover * and the Ethernet DMA. * - * SB1250 specification level: User's manual 1/02/02 - * - * Author: Mitch Lichtenberg + * SB1250 specification level: User's manual 10/21/02 + * BCM1280 specification level: User's manual 11/24/03 * ********************************************************************* * @@ -58,17 +57,17 @@ #define M_DMA_RESERVED1 _SB_MAKEMASK1(2) #define S_DMA_DESC_TYPE _SB_MAKE64(1) -#define M_DMA_DESC_TYPE _SB_MAKE64(2,S_DMA_DESC_TYPE) +#define M_DMA_DESC_TYPE _SB_MAKEMASK(2,S_DMA_DESC_TYPE) #define V_DMA_DESC_TYPE(x) _SB_MAKEVALUE(x,S_DMA_DESC_TYPE) #define G_DMA_DESC_TYPE(x) _SB_GETVALUE(x,S_DMA_DESC_TYPE,M_DMA_DESC_TYPE) #define K_DMA_DESC_TYPE_RING_AL 0 #define K_DMA_DESC_TYPE_CHAIN_AL 1 -#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1) +#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1) || SIBYTE_HDR_FEATURE_CHIP(1480) #define K_DMA_DESC_TYPE_RING_UAL_WI 2 #define K_DMA_DESC_TYPE_RING_UAL_RMW 3 -#endif /* 1250 PASS3 || 112x PASS1 */ +#endif /* 1250 PASS3 || 112x PASS1 || 1480 */ #define M_DMA_EOP_INT_EN _SB_MAKEMASK1(3) #define M_DMA_HWM_INT_EN _SB_MAKEMASK1(4) @@ -111,11 +110,11 @@ #define M_DMA_NO_DSCR_UPDT _SB_MAKEMASK1(4) #define M_DMA_L2CA _SB_MAKEMASK1(5) -#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1) +#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1) || SIBYTE_HDR_FEATURE_CHIP(1480) #define M_DMA_RX_XTRA_STATUS _SB_MAKEMASK1(6) #define M_DMA_TX_CPU_PAUSE _SB_MAKEMASK1(6) #define M_DMA_TX_FC_PAUSE_EN _SB_MAKEMASK1(7) -#endif /* 1250 PASS3 || 112x PASS1 */ +#endif /* 1250 PASS3 || 112x PASS1 || 1480 */ #define M_DMA_MBZ1 _SB_MAKEMASK(6,15) @@ -165,14 +164,14 @@ #define S_DMA_CURDSCR_COUNT _SB_MAKE64(40) #define M_DMA_CURDSCR_COUNT _SB_MAKEMASK(16,S_DMA_CURDSCR_COUNT) -#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1) +#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1) || SIBYTE_HDR_FEATURE_CHIP(1480) #define M_DMA_TX_CH_PAUSE_ON _SB_MAKEMASK1(56) -#endif /* 1250 PASS3 || 112x PASS1 */ +#endif /* 1250 PASS3 || 112x PASS1 || 1480 */ /* * Receive Packet Drop Registers */ -#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1) +#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1) || SIBYTE_HDR_FEATURE_CHIP(1480) #define S_DMA_OODLOST_RX _SB_MAKE64(0) #define M_DMA_OODLOST_RX _SB_MAKEMASK(16,S_DMA_OODLOST_RX) #define G_DMA_OODLOST_RX(x) _SB_GETVALUE(x,S_DMA_OODLOST_RX,M_DMA_OODLOST_RX) @@ -180,7 +179,7 @@ #define S_DMA_EOP_COUNT_RX _SB_MAKE64(16) #define M_DMA_EOP_COUNT_RX _SB_MAKEMASK(8,S_DMA_EOP_COUNT_RX) #define G_DMA_EOP_COUNT_RX(x) _SB_GETVALUE(x,S_DMA_EOP_COUNT_RX,M_DMA_EOP_COUNT_RX) -#endif /* 1250 PASS3 || 112x PASS1 */ +#endif /* 1250 PASS3 || 112x PASS1 || 1480 */ /* ********************************************************************* * DMA Descriptors @@ -201,21 +200,21 @@ #define M_DMA_DSCRA_A_ADDR_OFFSET (M_DMA_DSCRA_OFFSET | M_DMA_DSCRA_A_ADDR) -#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1) +#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1) || SIBYTE_HDR_FEATURE_CHIP(1480) #define S_DMA_DSCRA_A_ADDR_UA _SB_MAKE64(0) #define M_DMA_DSCRA_A_ADDR_UA _SB_MAKEMASK(40,S_DMA_DSCRA_A_ADDR_UA) -#endif /* 1250 PASS3 || 112x PASS1 */ +#endif /* 1250 PASS3 || 112x PASS1 || 1480 */ #define S_DMA_DSCRA_A_SIZE _SB_MAKE64(40) #define M_DMA_DSCRA_A_SIZE _SB_MAKEMASK(9,S_DMA_DSCRA_A_SIZE) #define V_DMA_DSCRA_A_SIZE(x) _SB_MAKEVALUE(x,S_DMA_DSCRA_A_SIZE) #define G_DMA_DSCRA_A_SIZE(x) _SB_GETVALUE(x,S_DMA_DSCRA_A_SIZE,M_DMA_DSCRA_A_SIZE) -#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1) +#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1) || SIBYTE_HDR_FEATURE_CHIP(1480) #define S_DMA_DSCRA_DSCR_CNT _SB_MAKE64(40) #define M_DMA_DSCRA_DSCR_CNT _SB_MAKEMASK(8,S_DMA_DSCRA_DSCR_CNT) #define G_DMA_DSCRA_DSCR_CNT(x) _SB_GETVALUE(x,S_DMA_DSCRA_DSCR_CNT,M_DMA_DSCRA_DSCR_CNT) -#endif /* 1250 PASS3 || 112x PASS1 */ +#endif /* 1250 PASS3 || 112x PASS1 || 1480 */ #define M_DMA_DSCRA_INTERRUPT _SB_MAKEMASK1(49) #define M_DMA_DSCRA_OFFSETB _SB_MAKEMASK1(50) @@ -235,12 +234,12 @@ #define V_DMA_DSCRB_OPTIONS(x) _SB_MAKEVALUE(x,S_DMA_DSCRB_OPTIONS) #define G_DMA_DSCRB_OPTIONS(x) _SB_GETVALUE(x,S_DMA_DSCRB_OPTIONS,M_DMA_DSCRB_OPTIONS) -#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1) +#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1) || SIBYTE_HDR_FEATURE_CHIP(1480) #define S_DMA_DSCRB_A_SIZE _SB_MAKE64(8) #define M_DMA_DSCRB_A_SIZE _SB_MAKEMASK(14,S_DMA_DSCRB_A_SIZE) #define V_DMA_DSCRB_A_SIZE(x) _SB_MAKEVALUE(x,S_DMA_DSCRB_A_SIZE) #define G_DMA_DSCRB_A_SIZE(x) _SB_GETVALUE(x,S_DMA_DSCRB_A_SIZE,M_DMA_DSCRB_A_SIZE) -#endif /* 1250 PASS3 || 112x PASS1 */ +#endif /* 1250 PASS3 || 112x PASS1 || 1480 */ #define R_DMA_DSCRB_ADDR _SB_MAKE64(0x10) @@ -255,12 +254,12 @@ #define M_DMA_DSCRB_B_VALID _SB_MAKEMASK1(49) -#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1) +#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1) || SIBYTE_HDR_FEATURE_CHIP(1480) #define S_DMA_DSCRB_PKT_SIZE_MSB _SB_MAKE64(48) #define M_DMA_DSCRB_PKT_SIZE_MSB _SB_MAKEMASK(2,S_DMA_DSCRB_PKT_SIZE_MSB) #define V_DMA_DSCRB_PKT_SIZE_MSB(x) _SB_MAKEVALUE(x,S_DMA_DSCRB_PKT_SIZE_MSB) #define G_DMA_DSCRB_PKT_SIZE_MSB(x) _SB_GETVALUE(x,S_DMA_DSCRB_PKT_SIZE_MSB,M_DMA_DSCRB_PKT_SIZE_MSB) -#endif /* 1250 PASS3 || 112x PASS1 */ +#endif /* 1250 PASS3 || 112x PASS1 || 1480 */ #define S_DMA_DSCRB_PKT_SIZE _SB_MAKE64(50) #define M_DMA_DSCRB_PKT_SIZE _SB_MAKEMASK(14,S_DMA_DSCRB_PKT_SIZE) @@ -282,15 +281,16 @@ #define M_DMA_ETHRX_BADIP4CS _SB_MAKEMASK1(51) #define M_DMA_ETHRX_DSCRERR _SB_MAKEMASK1(52) -#if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1) -/* Note: BADTCPCS is actually in DSCR_B options field */ +#if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1) || SIBYTE_HDR_FEATURE_CHIP(1480) +/* Note: This bit is in the DSCR_B options field */ #define M_DMA_ETHRX_BADTCPCS _SB_MAKEMASK1(0) -#endif /* 1250 PASS2 || 112x PASS1 */ +#endif /* 1250 PASS2 || 112x PASS1 || 1480 */ -#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1) +#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1) || SIBYTE_HDR_FEATURE_CHIP(1480) +/* Note: These bits are in the DSCR_B options field */ #define M_DMA_ETH_VLAN_FLAG _SB_MAKEMASK1(1) #define M_DMA_ETH_CRC_FLAG _SB_MAKEMASK1(2) -#endif /* 1250 PASS3 || 112x PASS1 */ +#endif /* 1250 PASS3 || 112x PASS1 || 1480 */ #define S_DMA_ETHRX_RXCH 53 #define M_DMA_ETHRX_RXCH _SB_MAKEMASK(2,S_DMA_ETHRX_RXCH) @@ -438,7 +438,7 @@ M_DM_CUR_DSCR_DSCR_COUNT) -#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1) +#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1) || SIBYTE_HDR_FEATURE_CHIP(1480) /* * Data Mover Channel Partial Result Registers * Register: DM_PARTIAL_0 @@ -459,10 +459,10 @@ M_DM_PARTIAL_TCPCS_PARTIAL) #define M_DM_PARTIAL_ODD_BYTE _SB_MAKEMASK1(48) -#endif /* 1250 PASS3 || 112x PASS1 */ +#endif /* 1250 PASS3 || 112x PASS1 || 1480 */ -#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1) +#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1) || SIBYTE_HDR_FEATURE_CHIP(1480) /* * Data Mover CRC Definition Registers * Register: CRC_DEF_0 @@ -479,10 +479,10 @@ #define V_CRC_DEF_CRC_POLY(r) _SB_MAKEVALUE(r,S_CRC_DEF_CRC_POLY) #define G_CRC_DEF_CRC_POLY(r) _SB_GETVALUE(r,S_CRC_DEF_CRC_POLY,\ M_CRC_DEF_CRC_POLY) -#endif /* 1250 PASS3 || 112x PASS1 */ +#endif /* 1250 PASS3 || 112x PASS1 || 1480 */ -#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1) +#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1) || SIBYTE_HDR_FEATURE_CHIP(1480) /* * Data Mover CRC/Checksum Definition Registers * Register: CTCP_DEF_0 @@ -511,7 +511,7 @@ #define K_CTCP_DEF_CRC_WIDTH_1 2 #define M_CTCP_DEF_CRC_BIT_ORDER _SB_MAKEMASK1(50) -#endif /* 1250 PASS3 || 112x PASS1 */ +#endif /* 1250 PASS3 || 112x PASS1 || 1480 */ /* @@ -560,12 +560,12 @@ #define M_DM_DSCRA_L2C_DEST _SB_MAKEMASK1(50) #define M_DM_DSCRA_L2C_SRC _SB_MAKEMASK1(51) -#if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1) +#if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1) || SIBYTE_HDR_FEATURE_CHIP(1480) #define M_DM_DSCRA_RD_BKOFF _SB_MAKEMASK1(52) #define M_DM_DSCRA_WR_BKOFF _SB_MAKEMASK1(53) -#endif /* 1250 PASS2 || 112x PASS1 */ +#endif /* 1250 PASS2 || 112x PASS1 || 1480 */ -#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1) +#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1) || SIBYTE_HDR_FEATURE_CHIP(1480) #define M_DM_DSCRA_TCPCS_EN _SB_MAKEMASK1(54) #define M_DM_DSCRA_TCPCS_RES _SB_MAKEMASK1(55) #define M_DM_DSCRA_TCPCS_AP _SB_MAKEMASK1(56) @@ -574,7 +574,7 @@ #define M_DM_DSCRA_CRC_AP _SB_MAKEMASK1(59) #define M_DM_DSCRA_CRC_DFN _SB_MAKEMASK1(60) #define M_DM_DSCRA_CRC_XBIT _SB_MAKEMASK1(61) -#endif /* 1250 PASS3 || 112x PASS1 */ +#endif /* 1250 PASS3 || 112x PASS1 || 1480 */ #define M_DM_DSCRA_RESERVED2 _SB_MAKEMASK(3,61) diff --git a/include/asm-mips/sibyte/sb1250_genbus.h b/include/asm-mips/sibyte/sb1250_genbus.h index f1f509f295c4..1b5cbc5c6454 100644 --- a/include/asm-mips/sibyte/sb1250_genbus.h +++ b/include/asm-mips/sibyte/sb1250_genbus.h @@ -6,9 +6,8 @@ * This module contains constants and macros useful for * manipulating the SB1250's Generic Bus interface * - * SB1250 specification level: User's manual 1/02/02 - * - * Author: Mitch Lichtenberg + * SB1250 specification level: User's manual 10/21/02 + * BCM1280 specification level: User's Manual 11/14/03 * ********************************************************************* * @@ -51,19 +50,21 @@ #define M_IO_WIDTH_SEL _SB_MAKEMASK(2,S_IO_WIDTH_SEL) #define K_IO_WIDTH_SEL_1 0 #define K_IO_WIDTH_SEL_2 1 -#if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1) +#if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1) \ + || SIBYTE_HDR_FEATURE_CHIP(1480) #define K_IO_WIDTH_SEL_1L 2 -#endif /* 1250 PASS2 || 112x PASS1 */ +#endif /* 1250 PASS2 || 112x PASS1 || 1480 */ #define K_IO_WIDTH_SEL_4 3 #define V_IO_WIDTH_SEL(x) _SB_MAKEVALUE(x,S_IO_WIDTH_SEL) #define G_IO_WIDTH_SEL(x) _SB_GETVALUE(x,S_IO_WIDTH_SEL,M_IO_WIDTH_SEL) #define S_IO_PARITY_ENA 4 #define M_IO_PARITY_ENA _SB_MAKEMASK1(S_IO_PARITY_ENA) -#if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1) +#if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1) \ + || SIBYTE_HDR_FEATURE_CHIP(1480) #define S_IO_BURST_EN 5 #define M_IO_BURST_EN _SB_MAKEMASK1(S_IO_BURST_EN) -#endif /* 1250 PASS2 || 112x PASS1 */ +#endif /* 1250 PASS2 || 112x PASS1 || 1480 */ #define S_IO_PARITY_ODD 6 #define M_IO_PARITY_ODD _SB_MAKEMASK1(S_IO_PARITY_ODD) #define S_IO_NONMUX 7 @@ -96,8 +97,11 @@ #define S_IO_ADDRBASE 16 /* # bits to shift addr for this reg */ +#define M_IO_BLK_CACHE _SB_MAKEMASK1(15) + + /* - * Generic Bus Region 0 Timing Registers (Table 11-7) + * Generic Bus Timing 0 Registers (Table 11-7) */ #define S_IO_ALE_WIDTH 0 @@ -105,21 +109,23 @@ #define V_IO_ALE_WIDTH(x) _SB_MAKEVALUE(x,S_IO_ALE_WIDTH) #define G_IO_ALE_WIDTH(x) _SB_GETVALUE(x,S_IO_ALE_WIDTH,M_IO_ALE_WIDTH) -#if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1) +#if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1) \ + || SIBYTE_HDR_FEATURE_CHIP(1480) #define M_IO_EARLY_CS _SB_MAKEMASK1(3) -#endif /* 1250 PASS2 || 112x PASS1 */ +#endif /* 1250 PASS2 || 112x PASS1 || 1480 */ #define S_IO_ALE_TO_CS 4 #define M_IO_ALE_TO_CS _SB_MAKEMASK(2,S_IO_ALE_TO_CS) #define V_IO_ALE_TO_CS(x) _SB_MAKEVALUE(x,S_IO_ALE_TO_CS) #define G_IO_ALE_TO_CS(x) _SB_GETVALUE(x,S_IO_ALE_TO_CS,M_IO_ALE_TO_CS) -#if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1) +#if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1) \ + || SIBYTE_HDR_FEATURE_CHIP(1480) #define S_IO_BURST_WIDTH _SB_MAKE64(6) #define M_IO_BURST_WIDTH _SB_MAKEMASK(2,S_IO_BURST_WIDTH) #define V_IO_BURST_WIDTH(x) _SB_MAKEVALUE(x,S_IO_BURST_WIDTH) #define G_IO_BURST_WIDTH(x) _SB_GETVALUE(x,S_IO_BURST_WIDTH,M_IO_BURST_WIDTH) -#endif /* 1250 PASS2 || 112x PASS1 */ +#endif /* 1250 PASS2 || 112x PASS1 || 1480 */ #define S_IO_CS_WIDTH 8 #define M_IO_CS_WIDTH _SB_MAKEMASK(5,S_IO_CS_WIDTH) @@ -141,9 +147,10 @@ #define V_IO_ALE_TO_WRITE(x) _SB_MAKEVALUE(x,S_IO_ALE_TO_WRITE) #define G_IO_ALE_TO_WRITE(x) _SB_GETVALUE(x,S_IO_ALE_TO_WRITE,M_IO_ALE_TO_WRITE) -#if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1) +#if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1) \ + || SIBYTE_HDR_FEATURE_CHIP(1480) #define M_IO_RDY_SYNC _SB_MAKEMASK1(3) -#endif /* 1250 PASS2 || 112x PASS1 */ +#endif /* 1250 PASS2 || 112x PASS1 || 1480 */ #define S_IO_WRITE_WIDTH 4 #define M_IO_WRITE_WIDTH _SB_MAKEMASK(4,S_IO_WRITE_WIDTH) @@ -183,9 +190,127 @@ #define M_IO_TIMEOUT_INT _SB_MAKEMASK1(10) #define M_IO_ILL_ADDR_INT _SB_MAKEMASK1(11) #define M_IO_MULT_CS_INT _SB_MAKEMASK1(12) -#if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1) +#if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1) || SIBYTE_HDR_FEATURE_CHIP(1480) #define M_IO_COH_ERR _SB_MAKEMASK1(14) -#endif /* 1250 PASS2 || 112x PASS1 */ +#endif /* 1250 PASS2 || 112x PASS1 || 1480 */ + + +/* + * Generic Bus Output Drive Control Register 0 (Table 14-18) + */ + +#define S_IO_SLEW0 0 +#define M_IO_SLEW0 _SB_MAKEMASK(2,S_IO_SLEW0) +#define V_IO_SLEW0(x) _SB_MAKEVALUE(x,S_IO_SLEW0) +#define G_IO_SLEW0(x) _SB_GETVALUE(x,S_IO_SLEW0,M_IO_SLEW0) + +#define S_IO_DRV_A 2 +#define M_IO_DRV_A _SB_MAKEMASK(2,S_IO_DRV_A) +#define V_IO_DRV_A(x) _SB_MAKEVALUE(x,S_IO_DRV_A) +#define G_IO_DRV_A(x) _SB_GETVALUE(x,S_IO_DRV_A,M_IO_DRV_A) + +#define S_IO_DRV_B 6 +#define M_IO_DRV_B _SB_MAKEMASK(2,S_IO_DRV_B) +#define V_IO_DRV_B(x) _SB_MAKEVALUE(x,S_IO_DRV_B) +#define G_IO_DRV_B(x) _SB_GETVALUE(x,S_IO_DRV_B,M_IO_DRV_B) + +#define S_IO_DRV_C 10 +#define M_IO_DRV_C _SB_MAKEMASK(2,S_IO_DRV_C) +#define V_IO_DRV_C(x) _SB_MAKEVALUE(x,S_IO_DRV_C) +#define G_IO_DRV_C(x) _SB_GETVALUE(x,S_IO_DRV_C,M_IO_DRV_C) + +#define S_IO_DRV_D 14 +#define M_IO_DRV_D _SB_MAKEMASK(2,S_IO_DRV_D) +#define V_IO_DRV_D(x) _SB_MAKEVALUE(x,S_IO_DRV_D) +#define G_IO_DRV_D(x) _SB_GETVALUE(x,S_IO_DRV_D,M_IO_DRV_D) + +/* + * Generic Bus Output Drive Control Register 1 (Table 14-19) + */ + +#define S_IO_DRV_E 2 +#define M_IO_DRV_E _SB_MAKEMASK(2,S_IO_DRV_E) +#define V_IO_DRV_E(x) _SB_MAKEVALUE(x,S_IO_DRV_E) +#define G_IO_DRV_E(x) _SB_GETVALUE(x,S_IO_DRV_E,M_IO_DRV_E) + +#define S_IO_DRV_F 6 +#define M_IO_DRV_F _SB_MAKEMASK(2,S_IO_DRV_F) +#define V_IO_DRV_F(x) _SB_MAKEVALUE(x,S_IO_DRV_F) +#define G_IO_DRV_F(x) _SB_GETVALUE(x,S_IO_DRV_F,M_IO_DRV_F) + +#define S_IO_SLEW1 8 +#define M_IO_SLEW1 _SB_MAKEMASK(2,S_IO_SLEW1) +#define V_IO_SLEW1(x) _SB_MAKEVALUE(x,S_IO_SLEW1) +#define G_IO_SLEW1(x) _SB_GETVALUE(x,S_IO_SLEW1,M_IO_SLEW1) + +#define S_IO_DRV_G 10 +#define M_IO_DRV_G _SB_MAKEMASK(2,S_IO_DRV_G) +#define V_IO_DRV_G(x) _SB_MAKEVALUE(x,S_IO_DRV_G) +#define G_IO_DRV_G(x) _SB_GETVALUE(x,S_IO_DRV_G,M_IO_DRV_G) + +#define S_IO_SLEW2 12 +#define M_IO_SLEW2 _SB_MAKEMASK(2,S_IO_SLEW2) +#define V_IO_SLEW2(x) _SB_MAKEVALUE(x,S_IO_SLEW2) +#define G_IO_SLEW2(x) _SB_GETVALUE(x,S_IO_SLEW2,M_IO_SLEW2) + +#define S_IO_DRV_H 14 +#define M_IO_DRV_H _SB_MAKEMASK(2,S_IO_DRV_H) +#define V_IO_DRV_H(x) _SB_MAKEVALUE(x,S_IO_DRV_H) +#define G_IO_DRV_H(x) _SB_GETVALUE(x,S_IO_DRV_H,M_IO_DRV_H) + +/* + * Generic Bus Output Drive Control Register 2 (Table 14-20) + */ + +#define S_IO_DRV_J 2 +#define M_IO_DRV_J _SB_MAKEMASK(2,S_IO_DRV_J) +#define V_IO_DRV_J(x) _SB_MAKEVALUE(x,S_IO_DRV_J) +#define G_IO_DRV_J(x) _SB_GETVALUE(x,S_IO_DRV_J,M_IO_DRV_J) + +#define S_IO_DRV_K 6 +#define M_IO_DRV_K _SB_MAKEMASK(2,S_IO_DRV_K) +#define V_IO_DRV_K(x) _SB_MAKEVALUE(x,S_IO_DRV_K) +#define G_IO_DRV_K(x) _SB_GETVALUE(x,S_IO_DRV_K,M_IO_DRV_K) + +#define S_IO_DRV_L 10 +#define M_IO_DRV_L _SB_MAKEMASK(2,S_IO_DRV_L) +#define V_IO_DRV_L(x) _SB_MAKEVALUE(x,S_IO_DRV_L) +#define G_IO_DRV_L(x) _SB_GETVALUE(x,S_IO_DRV_L,M_IO_DRV_L) + +#define S_IO_DRV_M 14 +#define M_IO_DRV_M _SB_MAKEMASK(2,S_IO_DRV_M) +#define V_IO_DRV_M(x) _SB_MAKEVALUE(x,S_IO_DRV_M) +#define G_IO_DRV_M(x) _SB_GETVALUE(x,S_IO_DRV_M,M_IO_DRV_M) + +/* + * Generic Bus Output Drive Control Register 3 (Table 14-21) + */ + +#define S_IO_SLEW3 0 +#define M_IO_SLEW3 _SB_MAKEMASK(2,S_IO_SLEW3) +#define V_IO_SLEW3(x) _SB_MAKEVALUE(x,S_IO_SLEW3) +#define G_IO_SLEW3(x) _SB_GETVALUE(x,S_IO_SLEW3,M_IO_SLEW3) + +#define S_IO_DRV_N 2 +#define M_IO_DRV_N _SB_MAKEMASK(2,S_IO_DRV_N) +#define V_IO_DRV_N(x) _SB_MAKEVALUE(x,S_IO_DRV_N) +#define G_IO_DRV_N(x) _SB_GETVALUE(x,S_IO_DRV_N,M_IO_DRV_N) + +#define S_IO_DRV_P 6 +#define M_IO_DRV_P _SB_MAKEMASK(2,S_IO_DRV_P) +#define V_IO_DRV_P(x) _SB_MAKEVALUE(x,S_IO_DRV_P) +#define G_IO_DRV_P(x) _SB_GETVALUE(x,S_IO_DRV_P,M_IO_DRV_P) + +#define S_IO_DRV_Q 10 +#define M_IO_DRV_Q _SB_MAKEMASK(2,S_IO_DRV_Q) +#define V_IO_DRV_Q(x) _SB_MAKEVALUE(x,S_IO_DRV_Q) +#define G_IO_DRV_Q(x) _SB_GETVALUE(x,S_IO_DRV_Q,M_IO_DRV_Q) + +#define S_IO_DRV_R 14 +#define M_IO_DRV_R _SB_MAKEMASK(2,S_IO_DRV_R) +#define V_IO_DRV_R(x) _SB_MAKEVALUE(x,S_IO_DRV_R) +#define G_IO_DRV_R(x) _SB_GETVALUE(x,S_IO_DRV_R,M_IO_DRV_R) + /* * PCMCIA configuration register (Table 12-6) @@ -202,6 +327,22 @@ #define M_PCMCIA_CFG_RDYMASK _SB_MAKEMASK1(8) #define M_PCMCIA_CFG_PWRCTL _SB_MAKEMASK1(9) +#if SIBYTE_HDR_FEATURE_CHIP(1480) +#define S_PCMCIA_MODE 16 +#define M_PCMCIA_MODE _SB_MAKEMASK(3,S_PCMCIA_MODE) +#define V_PCMCIA_MODE(x) _SB_MAKEVALUE(x,S_PCMCIA_MODE) +#define G_PCMCIA_MODE(x) _SB_GETVALUE(x,S_PCMCIA_MODE,M_PCMCIA_MODE) + +#define K_PCMCIA_MODE_PCMA_NOB 0 /* standard PCMCIA "A", no "B" */ +#define K_PCMCIA_MODE_IDEA_NOB 1 /* IDE "A", no "B" */ +#define K_PCMCIA_MODE_PCMIOA_NOB 2 /* PCMCIA with I/O "A", no "B" */ +#define K_PCMCIA_MODE_PCMA_PCMB 4 /* standard PCMCIA "A", standard PCMCIA "B" */ +#define K_PCMCIA_MODE_IDEA_PCMB 5 /* IDE "A", standard PCMCIA "B" */ +#define K_PCMCIA_MODE_PCMA_IDEB 6 /* standard PCMCIA "A", IDE "B" */ +#define K_PCMCIA_MODE_IDEA_IDEB 7 /* IDE "A", IDE "B" */ +#endif + + /* * PCMCIA status register (Table 12-7) */ @@ -272,5 +413,62 @@ #define V_GPIO_INTR_TYPE14(x) _SB_MAKEVALUE(x,S_GPIO_INTR_TYPE14) #define G_GPIO_INTR_TYPE14(x) _SB_GETVALUE(x,S_GPIO_INTR_TYPE14,M_GPIO_INTR_TYPE14) +#if SIBYTE_HDR_FEATURE_CHIP(1480) + +/* + * GPIO Interrupt Additional Type Register + */ + +#define K_GPIO_INTR_BOTHEDGE 0 +#define K_GPIO_INTR_RISEEDGE 1 +#define K_GPIO_INTR_UNPRED1 2 +#define K_GPIO_INTR_UNPRED2 3 + +#define S_GPIO_INTR_ATYPEX(n) (((n)/2)*2) +#define M_GPIO_INTR_ATYPEX(n) _SB_MAKEMASK(2,S_GPIO_INTR_ATYPEX(n)) +#define V_GPIO_INTR_ATYPEX(n,x) _SB_MAKEVALUE(x,S_GPIO_INTR_ATYPEX(n)) +#define G_GPIO_INTR_ATYPEX(n,x) _SB_GETVALUE(x,S_GPIO_INTR_ATYPEX(n),M_GPIO_INTR_ATYPEX(n)) + +#define S_GPIO_INTR_ATYPE0 0 +#define M_GPIO_INTR_ATYPE0 _SB_MAKEMASK(2,S_GPIO_INTR_ATYPE0) +#define V_GPIO_INTR_ATYPE0(x) _SB_MAKEVALUE(x,S_GPIO_INTR_ATYPE0) +#define G_GPIO_INTR_ATYPE0(x) _SB_GETVALUE(x,S_GPIO_INTR_ATYPE0,M_GPIO_INTR_ATYPE0) + +#define S_GPIO_INTR_ATYPE2 2 +#define M_GPIO_INTR_ATYPE2 _SB_MAKEMASK(2,S_GPIO_INTR_ATYPE2) +#define V_GPIO_INTR_ATYPE2(x) _SB_MAKEVALUE(x,S_GPIO_INTR_ATYPE2) +#define G_GPIO_INTR_ATYPE2(x) _SB_GETVALUE(x,S_GPIO_INTR_ATYPE2,M_GPIO_INTR_ATYPE2) + +#define S_GPIO_INTR_ATYPE4 4 +#define M_GPIO_INTR_ATYPE4 _SB_MAKEMASK(2,S_GPIO_INTR_ATYPE4) +#define V_GPIO_INTR_ATYPE4(x) _SB_MAKEVALUE(x,S_GPIO_INTR_ATYPE4) +#define G_GPIO_INTR_ATYPE4(x) _SB_GETVALUE(x,S_GPIO_INTR_ATYPE4,M_GPIO_INTR_ATYPE4) + +#define S_GPIO_INTR_ATYPE6 6 +#define M_GPIO_INTR_ATYPE6 _SB_MAKEMASK(2,S_GPIO_INTR_ATYPE6) +#define V_GPIO_INTR_ATYPE6(x) _SB_MAKEVALUE(x,S_GPIO_INTR_ATYPE6) +#define G_GPIO_INTR_ATYPE6(x) _SB_GETVALUE(x,S_GPIO_INTR_ATYPE6,M_GPIO_INTR_ATYPE6) + +#define S_GPIO_INTR_ATYPE8 8 +#define M_GPIO_INTR_ATYPE8 _SB_MAKEMASK(2,S_GPIO_INTR_ATYPE8) +#define V_GPIO_INTR_ATYPE8(x) _SB_MAKEVALUE(x,S_GPIO_INTR_ATYPE8) +#define G_GPIO_INTR_ATYPE8(x) _SB_GETVALUE(x,S_GPIO_INTR_ATYPE8,M_GPIO_INTR_ATYPE8) + +#define S_GPIO_INTR_ATYPE10 10 +#define M_GPIO_INTR_ATYPE10 _SB_MAKEMASK(2,S_GPIO_INTR_ATYPE10) +#define V_GPIO_INTR_ATYPE10(x) _SB_MAKEVALUE(x,S_GPIO_INTR_ATYPE10) +#define G_GPIO_INTR_ATYPE10(x) _SB_GETVALUE(x,S_GPIO_INTR_ATYPE10,M_GPIO_INTR_ATYPE10) + +#define S_GPIO_INTR_ATYPE12 12 +#define M_GPIO_INTR_ATYPE12 _SB_MAKEMASK(2,S_GPIO_INTR_ATYPE12) +#define V_GPIO_INTR_ATYPE12(x) _SB_MAKEVALUE(x,S_GPIO_INTR_ATYPE12) +#define G_GPIO_INTR_ATYPE12(x) _SB_GETVALUE(x,S_GPIO_INTR_ATYPE12,M_GPIO_INTR_ATYPE12) + +#define S_GPIO_INTR_ATYPE14 14 +#define M_GPIO_INTR_ATYPE14 _SB_MAKEMASK(2,S_GPIO_INTR_ATYPE14) +#define V_GPIO_INTR_ATYPE14(x) _SB_MAKEVALUE(x,S_GPIO_INTR_ATYPE14) +#define G_GPIO_INTR_ATYPE14(x) _SB_GETVALUE(x,S_GPIO_INTR_ATYPE14,M_GPIO_INTR_ATYPE14) +#endif + #endif diff --git a/include/asm-mips/sibyte/sb1250_int.h b/include/asm-mips/sibyte/sb1250_int.h index e173e2ea4c98..05c7b39f1b02 100644 --- a/include/asm-mips/sibyte/sb1250_int.h +++ b/include/asm-mips/sibyte/sb1250_int.h @@ -8,8 +8,6 @@ * * SB1250 specification level: User's manual 1/02/02 * - * Author: Mitch Lichtenberg - * ********************************************************************* * * Copyright 2000,2001,2002,2003 @@ -47,6 +45,10 @@ * First, the interrupt numbers. */ +#if SIBYTE_HDR_FEATURE_1250_112x + +#define K_INT_SOURCES 64 + #define K_INT_WATCHDOG_TIMER_0 0 #define K_INT_WATCHDOG_TIMER_1 1 #define K_INT_TIMER_0 2 @@ -244,4 +246,6 @@ #define M_LDTVECT_RAISEMBOX 0x40 +#endif /* 1250/112x */ + #endif diff --git a/include/asm-mips/sibyte/sb1250_l2c.h b/include/asm-mips/sibyte/sb1250_l2c.h index 8afe8e01581b..842f205094af 100644 --- a/include/asm-mips/sibyte/sb1250_l2c.h +++ b/include/asm-mips/sibyte/sb1250_l2c.h @@ -8,8 +8,6 @@ * * SB1250 specification level: User's manual 1/02/02 * - * Author: Mitch Lichtenberg - * ********************************************************************* * * Copyright 2000,2001,2002,2003 @@ -89,8 +87,13 @@ #define V_L2C_MGMT_WAY(x) _SB_MAKEVALUE(x,S_L2C_MGMT_WAY) #define G_L2C_MGMT_WAY(x) _SB_GETVALUE(x,S_L2C_MGMT_WAY,M_L2C_MGMT_WAY) -#define S_L2C_MGMT_TAG 21 -#define M_L2C_MGMT_TAG _SB_MAKEMASK(6,S_L2C_MGMT_TAG) +#define S_L2C_MGMT_ECC_DIAG 21 +#define M_L2C_MGMT_ECC_DIAG _SB_MAKEMASK(2,S_L2C_MGMT_ECC_DIAG) +#define V_L2C_MGMT_ECC_DIAG(x) _SB_MAKEVALUE(x,S_L2C_MGMT_ECC_DIAG) +#define G_L2C_MGMT_ECC_DIAG(x) _SB_GETVALUE(x,S_L2C_MGMT_ECC_DIAG,M_L2C_MGMT_ECC_DIAG) + +#define S_L2C_MGMT_TAG 23 +#define M_L2C_MGMT_TAG _SB_MAKEMASK(4,S_L2C_MGMT_TAG) #define V_L2C_MGMT_TAG(x) _SB_MAKEVALUE(x,S_L2C_MGMT_TAG) #define G_L2C_MGMT_TAG(x) _SB_GETVALUE(x,S_L2C_MGMT_TAG,M_L2C_MGMT_TAG) diff --git a/include/asm-mips/sibyte/sb1250_ldt.h b/include/asm-mips/sibyte/sb1250_ldt.h index f2617ded0a8f..7092535d1108 100644 --- a/include/asm-mips/sibyte/sb1250_ldt.h +++ b/include/asm-mips/sibyte/sb1250_ldt.h @@ -8,8 +8,6 @@ * * SB1250 specification level: User's manual 1/02/02 * - * Author: Mitch Lichtenberg - * ********************************************************************* * * Copyright 2000,2001,2002,2003 diff --git a/include/asm-mips/sibyte/sb1250_mac.h b/include/asm-mips/sibyte/sb1250_mac.h index 18e74e43f4a2..adfc688fa559 100644 --- a/include/asm-mips/sibyte/sb1250_mac.h +++ b/include/asm-mips/sibyte/sb1250_mac.h @@ -8,8 +8,6 @@ * * SB1250 specification level: User's manual 1/02/02 * - * Author: Mitch Lichtenberg - * ********************************************************************* * * Copyright 2000,2001,2002,2003 @@ -81,7 +79,10 @@ #define M_MAC_RESERVED1 _SB_MAKEMASK(8,9) #define M_MAC_AP_STAT_EN _SB_MAKEMASK1(17) -#define M_MAC_RESERVED2 _SB_MAKEMASK1(18) + +#if SIBYTE_HDR_FEATURE_CHIP(1480) +#define M_MAC_TIMESTAMP _SB_MAKEMASK1(18) +#endif #define M_MAC_DRP_ERRPKT_EN _SB_MAKEMASK1(19) #define M_MAC_DRP_FCSERRPKT_EN _SB_MAKEMASK1(20) #define M_MAC_DRP_CODEERRPKT_EN _SB_MAKEMASK1(21) @@ -132,9 +133,9 @@ #define M_MAC_RX_CH_SEL_MSB _SB_MAKEMASK1(44) #endif /* 1250 PASS2 || 112x PASS1 */ -#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1) +#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1) || SIBYTE_HDR_FEATURE_CHIP(1480) #define M_MAC_SPLIT_CH_SEL _SB_MAKEMASK1(45) -#endif /* 1250 PASS3 || 112x PASS1 */ +#endif /* 1250 PASS3 || 112x PASS1 || 1480 */ #define S_MAC_BYPASS_IFG _SB_MAKE64(46) #define M_MAC_BYPASS_IFG _SB_MAKEMASK(8,S_MAC_BYPASS_IFG) @@ -176,10 +177,22 @@ #define M_MAC_PORT_RESET _SB_MAKEMASK1(8) +#if (SIBYTE_HDR_FEATURE_CHIP(1250) || SIBYTE_HDR_FEATURE_CHIP(112x)) #define M_MAC_RX_ENABLE _SB_MAKEMASK1(10) #define M_MAC_TX_ENABLE _SB_MAKEMASK1(11) #define M_MAC_BYP_RX_ENABLE _SB_MAKEMASK1(12) #define M_MAC_BYP_TX_ENABLE _SB_MAKEMASK1(13) +#endif + +/* + * MAC reset information register (1280/1255) + */ +#if SIBYTE_HDR_FEATURE_CHIP(1480) +#define M_MAC_RX_CH0_PAUSE_ON _SB_MAKEMASK1(8) +#define M_MAC_RX_CH1_PAUSE_ON _SB_MAKEMASK1(16) +#define M_MAC_TX_CH0_PAUSE_ON _SB_MAKEMASK1(24) +#define M_MAC_TX_CH1_PAUSE_ON _SB_MAKEMASK1(32) +#endif /* * MAC DMA Control Register @@ -267,12 +280,12 @@ #define V_MAC_IFG_RX(x) _SB_MAKEVALUE(x,S_MAC_IFG_RX) #define G_MAC_IFG_RX(x) _SB_GETVALUE(x,S_MAC_IFG_RX,M_MAC_IFG_RX) -#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1) +#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1) || SIBYTE_HDR_FEATURE_CHIP(1480) #define S_MAC_PRE_LEN _SB_MAKE64(0) #define M_MAC_PRE_LEN _SB_MAKEMASK(6,S_MAC_PRE_LEN) #define V_MAC_PRE_LEN(x) _SB_MAKEVALUE(x,S_MAC_PRE_LEN) #define G_MAC_PRE_LEN(x) _SB_GETVALUE(x,S_MAC_PRE_LEN,M_MAC_PRE_LEN) -#endif /* 1250 PASS3 || 112x PASS1 */ +#endif /* 1250 PASS3 || 112x PASS1 || 1480 */ #define S_MAC_IFG_TX _SB_MAKE64(6) #define M_MAC_IFG_TX _SB_MAKEMASK(6,S_MAC_IFG_TX) @@ -458,9 +471,9 @@ #define V_MAC_COUNTER_ADDR(x) _SB_MAKEVALUE(x,S_MAC_COUNTER_ADDR) #define G_MAC_COUNTER_ADDR(x) _SB_GETVALUE(x,S_MAC_COUNTER_ADDR,M_MAC_COUNTER_ADDR) -#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1) +#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1) || SIBYTE_HDR_FEATURE_CHIP(1480) #define M_MAC_TX_PAUSE_ON _SB_MAKEMASK1(52) -#endif /* 1250 PASS3 || 112x PASS1 */ +#endif /* 1250 PASS3 || 112x PASS1 || 1480 */ /* * MAC Fifo Pointer Registers (Table 9-19) [Debug register] @@ -594,7 +607,7 @@ #define V_MAC_IPHDR_OFFSET(x) _SB_MAKEVALUE(x,S_MAC_IPHDR_OFFSET) #define G_MAC_IPHDR_OFFSET(x) _SB_GETVALUE(x,S_MAC_IPHDR_OFFSET,M_MAC_IPHDR_OFFSET) -#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1) +#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1) || SIBYTE_HDR_FEATURE_CHIP(1480) #define S_MAC_RX_CRC_OFFSET _SB_MAKE64(16) #define M_MAC_RX_CRC_OFFSET _SB_MAKEMASK(8,S_MAC_RX_CRC_OFFSET) #define V_MAC_RX_CRC_OFFSET(x) _SB_MAKEVALUE(x,S_MAC_RX_CRC_OFFSET) @@ -612,7 +625,7 @@ #define M_MAC_RX_CH_MSN_SEL _SB_MAKEMASK(8,S_MAC_RX_CH_MSN_SEL) #define V_MAC_RX_CH_MSN_SEL(x) _SB_MAKEVALUE(x,S_MAC_RX_CH_MSN_SEL) #define G_MAC_RX_CH_MSN_SEL(x) _SB_GETVALUE(x,S_MAC_RX_CH_MSN_SEL,M_MAC_RX_CH_MSN_SEL) -#endif /* 1250 PASS3 || 112x PASS1 */ +#endif /* 1250 PASS3 || 112x PASS1 || 1480 */ /* * MAC Receive Channel Select Registers (Table 9-25) diff --git a/include/asm-mips/sibyte/sb1250_mc.h b/include/asm-mips/sibyte/sb1250_mc.h index 1dd41c927996..26e421498c97 100644 --- a/include/asm-mips/sibyte/sb1250_mc.h +++ b/include/asm-mips/sibyte/sb1250_mc.h @@ -8,8 +8,6 @@ * * SB1250 specification level: User's manual 1/02/02 * - * Author: Mitch Lichtenberg - * ********************************************************************* * * Copyright 2000,2001,2002,2003 @@ -324,6 +322,10 @@ #define K_MC_tRFC_DEFAULT 12 #define V_MC_tRFC_DEFAULT V_MC_tRFC(K_MC_tRFC_DEFAULT) +#if SIBYTE_HDR_FEATURE(1250, PASS3) +#define M_MC_tRFC_PLUS16 _SB_MAKEMASK1(51) /* 1250C3 and later. */ +#endif + #define S_MC_tCwCr 40 #define M_MC_tCwCr _SB_MAKEMASK(4,S_MC_tCwCr) #define V_MC_tCwCr(x) _SB_MAKEVALUE(x,S_MC_tCwCr) diff --git a/include/asm-mips/sibyte/sb1250_regs.h b/include/asm-mips/sibyte/sb1250_regs.h index 9db80cd13a79..bab3a4580a36 100644 --- a/include/asm-mips/sibyte/sb1250_regs.h +++ b/include/asm-mips/sibyte/sb1250_regs.h @@ -8,8 +8,6 @@ * * SB1250 specification level: 01/02/2002 * - * Author: Mitch Lichtenberg - * ********************************************************************* * * Copyright 2000,2001,2002,2003 @@ -61,6 +59,8 @@ * XXX: can't remove MC base 0 if 112x, since it's used by other macros, * since there is one reg there (but it could get its addr/offset constant). */ + +#if SIBYTE_HDR_FEATURE_1250_112x /* This MC only on 1250 & 112x */ #define A_MC_BASE_0 0x0010051000 #define A_MC_BASE_1 0x0010052000 #define MC_REGISTER_SPACING 0x1000 @@ -101,10 +101,14 @@ #define R_MC_TEST_ECC 0x0000000420 #define R_MC_MCLK_CFG 0x0000000500 +#endif /* 1250 & 112x */ + /* ********************************************************************* * L2 Cache Control Registers ********************************************************************* */ +#if SIBYTE_HDR_FEATURE_1250_112x /* This L2C only on 1250/112x */ + #define A_L2_READ_TAG 0x0010040018 #define A_L2_ECC_TAG 0x0010040038 #if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1) @@ -125,13 +129,16 @@ #define A_L2_READ_ADDRESS A_L2_READ_TAG #define A_L2_EEC_ADDRESS A_L2_ECC_TAG +#endif /* ********************************************************************* * PCI Interface Registers ********************************************************************* */ +#if SIBYTE_HDR_FEATURE_1250_112x /* This PCI/HT only on 1250/112x */ #define A_PCI_TYPE00_HEADER 0x00DE000000 #define A_PCI_TYPE01_HEADER 0x00DE000800 +#endif /* ********************************************************************* @@ -264,15 +271,15 @@ ********************************************************************* */ +#if SIBYTE_HDR_FEATURE_1250_112x /* This MC only on 1250 & 112x */ #define R_DUART_NUM_PORTS 2 #define A_DUART 0x0010060000 -#define A_DUART_REG(r) - #define DUART_CHANREG_SPACING 0x100 #define A_DUART_CHANREG(chan,reg) (A_DUART + DUART_CHANREG_SPACING*(chan) + (reg)) #define R_DUART_CHANREG(chan,reg) (DUART_CHANREG_SPACING*(chan) + (reg)) +#endif /* 1250 & 112x */ #define R_DUART_MODE_REG_1 0x100 #define R_DUART_MODE_REG_2 0x110 @@ -307,11 +314,13 @@ #define DUART_IMRISR_SPACING 0x20 +#if SIBYTE_HDR_FEATURE_1250_112x /* This MC only on 1250 & 112x */ #define R_DUART_IMRREG(chan) (R_DUART_IMR_A + (chan)*DUART_IMRISR_SPACING) #define R_DUART_ISRREG(chan) (R_DUART_ISR_A + (chan)*DUART_IMRISR_SPACING) #define A_DUART_IMRREG(chan) (A_DUART + R_DUART_IMRREG(chan)) #define A_DUART_ISRREG(chan) (A_DUART + R_DUART_ISRREG(chan)) +#endif /* 1250 & 112x */ @@ -368,6 +377,8 @@ ********************************************************************* */ +#if SIBYTE_HDR_FEATURE_1250_112x /* sync serial only on 1250/112x */ + #define A_SER_BASE_0 0x0010060400 #define A_SER_BASE_1 0x0010060800 #define SER_SPACING 0x400 @@ -457,6 +468,8 @@ #define R_SER_RMON_RX_ERRORS 0x000001F0 #define R_SER_RMON_RX_BADADDR 0x000001F8 +#endif /* 1250/112x */ + /* ********************************************************************* * Generic Bus Registers ********************************************************************* */ @@ -634,12 +647,13 @@ #if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1) #define A_SCD_SCRATCH 0x0010020C10 +#endif /* 1250 PASS2 || 112x PASS1 */ +#if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1) || SIBYTE_HDR_FEATURE_CHIP(1480) #define A_SCD_ZBBUS_CYCLE_COUNT 0x0010030000 #define A_SCD_ZBBUS_CYCLE_CP0 0x0010020C00 #define A_SCD_ZBBUS_CYCLE_CP1 0x0010020C08 -#endif /* 1250 PASS2 || 112x PASS1 */ - +#endif /* ********************************************************************* * System Control Registers @@ -667,15 +681,16 @@ #define A_ADDR_TRAP_CFG_1 0x0010020448 #define A_ADDR_TRAP_CFG_2 0x0010020450 #define A_ADDR_TRAP_CFG_3 0x0010020458 -#if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1) +#if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1) || SIBYTE_HDR_FEATURE_CHIP(1480) #define A_ADDR_TRAP_REG_DEBUG 0x0010020460 -#endif /* 1250 PASS2 || 112x PASS1 */ +#endif /* 1250 PASS2 || 112x PASS1 || 1480 */ /* ********************************************************************* * System Interrupt Mapper Registers ********************************************************************* */ +#if SIBYTE_HDR_FEATURE_1250_112x #define A_IMR_CPU0_BASE 0x0010020000 #define A_IMR_CPU1_BASE 0x0010022000 #define IMR_REGISTER_SPACING 0x2000 @@ -700,6 +715,7 @@ #define R_IMR_INTERRUPT_STATUS_COUNT 7 #define R_IMR_INTERRUPT_MAP_BASE 0x0200 #define R_IMR_INTERRUPT_MAP_COUNT 64 +#endif /* 1250/112x */ /* ********************************************************************* * System Performance Counter Registers @@ -718,6 +734,7 @@ #define A_SCD_BUS_ERR_STATUS 0x0010020880 #if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1) #define A_SCD_BUS_ERR_STATUS_DEBUG 0x00100208D0 +#define A_BUS_ERR_STATUS_DEBUG 0x00100208D0 #endif /* 1250 PASS2 || 112x PASS1 */ #define A_BUS_ERR_DATA_0 0x00100208A0 #define A_BUS_ERR_DATA_1 0x00100208A8 @@ -798,6 +815,7 @@ * Physical Address Map ********************************************************************* */ +#if SIBYTE_HDR_FEATURE_1250_112x #define A_PHYS_MEMORY_0 _SB_MAKE64(0x0000000000) #define A_PHYS_MEMORY_SIZE _SB_MAKE64((256*1024*1024)) #define A_PHYS_SYSTEM_CTL _SB_MAKE64(0x0010000000) @@ -831,6 +849,7 @@ #define A_PHYS_L2CACHE_WAY1 _SB_MAKE64(0x00D01A0000) #define A_PHYS_L2CACHE_WAY2 _SB_MAKE64(0x00D01C0000) #define A_PHYS_L2CACHE_WAY3 _SB_MAKE64(0x00D01E0000) +#endif #endif diff --git a/include/asm-mips/sibyte/sb1250_scd.h b/include/asm-mips/sibyte/sb1250_scd.h index dbbd682fb47e..a667bc14a7cd 100644 --- a/include/asm-mips/sibyte/sb1250_scd.h +++ b/include/asm-mips/sibyte/sb1250_scd.h @@ -8,8 +8,6 @@ * * SB1250 specification level: User's manual 1/02/02 * - * Author: Mitch Lichtenberg - * ********************************************************************* * * Copyright 2000,2001,2002,2003 @@ -51,26 +49,70 @@ #define V_SYS_REVISION(x) _SB_MAKEVALUE(x,S_SYS_REVISION) #define G_SYS_REVISION(x) _SB_GETVALUE(x,S_SYS_REVISION,M_SYS_REVISION) -#if SIBYTE_HDR_FEATURE_CHIP(1250) -#define K_SYS_REVISION_BCM1250_PASS1 1 -#define K_SYS_REVISION_BCM1250_PASS2 3 -#define K_SYS_REVISION_BCM1250_A10 11 -#define K_SYS_REVISION_BCM1250_PASS2_2 16 -#define K_SYS_REVISION_BCM1250_B2 17 -#define K_SYS_REVISION_BCM1250_PASS3 32 -#define K_SYS_REVISION_BCM1250_C1 33 +#define K_SYS_REVISION_BCM1250_PASS1 0x01 + +#define K_SYS_REVISION_BCM1250_PASS2 0x03 +#define K_SYS_REVISION_BCM1250_A1 0x03 /* Pass 2.0 WB */ +#define K_SYS_REVISION_BCM1250_A2 0x04 /* Pass 2.0 FC */ +#define K_SYS_REVISION_BCM1250_A3 0x05 /* Pass 2.1 FC */ +#define K_SYS_REVISION_BCM1250_A4 0x06 /* Pass 2.1 WB */ +#define K_SYS_REVISION_BCM1250_A6 0x07 /* OR 0x04 (A2) w/WID != 0 */ +#define K_SYS_REVISION_BCM1250_A8 0x0b /* A8/A10 */ +#define K_SYS_REVISION_BCM1250_A9 0x08 +#define K_SYS_REVISION_BCM1250_A10 K_SYS_REVISION_BCM1250_A8 +#define K_SYS_REVISION_BCM1250_PASS2_2 0x10 +#define K_SYS_REVISION_BCM1250_B0 K_SYS_REVISION_BCM1250_B1 +#define K_SYS_REVISION_BCM1250_B1 0x10 +#define K_SYS_REVISION_BCM1250_B2 0x11 + +#define K_SYS_REVISION_BCM1250_C0 0x20 +#define K_SYS_REVISION_BCM1250_C1 0x21 +#define K_SYS_REVISION_BCM1250_C2 0x22 +#define K_SYS_REVISION_BCM1250_C3 0x23 + +#if SIBYTE_HDR_FEATURE_CHIP(1250) /* XXX: discourage people from using these constants. */ #define K_SYS_REVISION_PASS1 K_SYS_REVISION_BCM1250_PASS1 #define K_SYS_REVISION_PASS2 K_SYS_REVISION_BCM1250_PASS2 #define K_SYS_REVISION_PASS2_2 K_SYS_REVISION_BCM1250_PASS2_2 #define K_SYS_REVISION_PASS3 K_SYS_REVISION_BCM1250_PASS3 +#define K_SYS_REVISION_BCM1250_PASS3 K_SYS_REVISION_BCM1250_C0 #endif /* 1250 */ -#if SIBYTE_HDR_FEATURE_CHIP(112x) -#define K_SYS_REVISION_BCM112x_A1 32 -#define K_SYS_REVISION_BCM112x_A2 33 -#endif /* 112x */ +#define K_SYS_REVISION_BCM112x_A1 0x20 +#define K_SYS_REVISION_BCM112x_A2 0x21 +#define K_SYS_REVISION_BCM112x_A3 0x22 +#define K_SYS_REVISION_BCM112x_A4 0x23 + +#define K_SYS_REVISION_BCM1480_S0 0x01 +#define K_SYS_REVISION_BCM1480_A1 0x02 +#define K_SYS_REVISION_BCM1480_A2 0x03 +#define K_SYS_REVISION_BCM1480_A3 0x04 +#define K_SYS_REVISION_BCM1480_B0 0x11 + +/*Cache size - 23:20 of revision register*/ +#define S_SYS_L2C_SIZE _SB_MAKE64(20) +#define M_SYS_L2C_SIZE _SB_MAKEMASK(4,S_SYS_L2C_SIZE) +#define V_SYS_L2C_SIZE(x) _SB_MAKEVALUE(x,S_SYS_L2C_SIZE) +#define G_SYS_L2C_SIZE(x) _SB_GETVALUE(x,S_SYS_L2C_SIZE,M_SYS_L2C_SIZE) + +#define K_SYS_L2C_SIZE_1MB 0 +#define K_SYS_L2C_SIZE_512KB 5 +#define K_SYS_L2C_SIZE_256KB 2 +#define K_SYS_L2C_SIZE_128KB 1 + +#define K_SYS_L2C_SIZE_BCM1250 K_SYS_L2C_SIZE_512KB +#define K_SYS_L2C_SIZE_BCM1125 K_SYS_L2C_SIZE_256KB +#define K_SYS_L2C_SIZE_BCM1122 K_SYS_L2C_SIZE_128KB + + +/* Number of CPU cores, bits 27:24 of revision register*/ +#define S_SYS_NUM_CPUS _SB_MAKE64(24) +#define M_SYS_NUM_CPUS _SB_MAKEMASK(4,S_SYS_NUM_CPUS) +#define V_SYS_NUM_CPUS(x) _SB_MAKEVALUE(x,S_SYS_NUM_CPUS) +#define G_SYS_NUM_CPUS(x) _SB_GETVALUE(x,S_SYS_NUM_CPUS,M_SYS_NUM_CPUS) + /* XXX: discourage people from using these constants. */ #define S_SYS_PART _SB_MAKE64(16) @@ -83,6 +125,8 @@ #define K_SYS_PART_BCM1120 0x1121 #define K_SYS_PART_BCM1125 0x1123 #define K_SYS_PART_BCM1125H 0x1124 +#define K_SYS_PART_BCM1122 0x1113 + /* The "peripheral set" (SOC type) is the low 4 bits of the "part" field. */ #define S_SYS_SOC_TYPE _SB_MAKE64(16) @@ -96,6 +140,8 @@ #define K_SYS_SOC_TYPE_BCM1125 0x3 #define K_SYS_SOC_TYPE_BCM1125H 0x4 #define K_SYS_SOC_TYPE_BCM1250_ALT2 0x5 /* 1250pass2 w/ 1/2 L2. */ +#define K_SYS_SOC_TYPE_BCM1x80 0x6 +#define K_SYS_SOC_TYPE_BCM1x55 0x7 /* * Calculate correct SOC type given a copy of system revision register. @@ -127,10 +173,12 @@ #define V_SYS_WID(x) _SB_MAKEVALUE(x,S_SYS_WID) #define G_SYS_WID(x) _SB_GETVALUE(x,S_SYS_WID,M_SYS_WID) -/* System Manufacturing Register -* Register: SCD_SYSTEM_MANUF -*/ +/* + * System Manufacturing Register + * Register: SCD_SYSTEM_MANUF + */ +#if SIBYTE_HDR_FEATURE_1250_112x /* Wafer ID: bits 31:0 */ #define S_SYS_WAFERID1_200 _SB_MAKE64(0) #define M_SYS_WAFERID1_200 _SB_MAKEMASK(32,S_SYS_WAFERID1_200) @@ -139,8 +187,8 @@ #define S_SYS_BIN _SB_MAKE64(32) #define M_SYS_BIN _SB_MAKEMASK(4,S_SYS_BIN) -#define V_SYS_BIN _SB_MAKEVALUE(x,S_SYS_BIN) -#define G_SYS_BIN _SB_GETVALUE(x,S_SYS_BIN,M_SYS_BIN) +#define V_SYS_BIN(x) _SB_MAKEVALUE(x,S_SYS_BIN) +#define G_SYS_BIN(x) _SB_GETVALUE(x,S_SYS_BIN,M_SYS_BIN) /* Wafer ID: bits 39:36 */ #define S_SYS_WAFERID2_200 _SB_MAKE64(36) @@ -163,12 +211,14 @@ #define M_SYS_YPOS _SB_MAKEMASK(6,S_SYS_YPOS) #define V_SYS_YPOS(x) _SB_MAKEVALUE(x,S_SYS_YPOS) #define G_SYS_YPOS(x) _SB_GETVALUE(x,S_SYS_YPOS,M_SYS_YPOS) +#endif /* * System Config Register (Table 4-2) * Register: SCD_SYSTEM_CFG */ +#if SIBYTE_HDR_FEATURE_1250_112x #define M_SYS_LDT_PLL_BYP _SB_MAKEMASK1(3) #define M_SYS_PCI_SYNC_TEST_MODE _SB_MAKEMASK1(4) #define M_SYS_IOB0_DIV _SB_MAKEMASK1(5) @@ -253,6 +303,8 @@ #define M_SYS_SW_FLAG _SB_MAKEMASK1(63) #endif /* 1250 PASS2 || 112x PASS1 */ +#endif + /* * Mailbox Registers (Table 4-3) @@ -326,6 +378,7 @@ * System Performance Counters */ +#if SIBYTE_HDR_FEATURE_1250_112x #define S_SPC_CFG_SRC0 0 #define M_SPC_CFG_SRC0 _SB_MAKEMASK(8,S_SPC_CFG_SRC0) #define V_SPC_CFG_SRC0(x) _SB_MAKEVALUE(x,S_SPC_CFG_SRC0) @@ -348,6 +401,7 @@ #define M_SPC_CFG_CLEAR _SB_MAKEMASK1(32) #define M_SPC_CFG_ENABLE _SB_MAKEMASK1(33) +#endif /* @@ -412,6 +466,7 @@ * Address Trap Registers */ +#if SIBYTE_HDR_FEATURE_1250_112x #define M_ATRAP_INDEX _SB_MAKEMASK(4,0) #define M_ATRAP_ADDRESS _SB_MAKEMASK(40,0) @@ -436,7 +491,6 @@ #define K_BUS_AGENT_IOB0 2 #define K_BUS_AGENT_IOB1 3 #define K_BUS_AGENT_SCD 4 -#define K_BUS_AGENT_RESERVED 5 #define K_BUS_AGENT_L2C 6 #define K_BUS_AGENT_MC 7 @@ -454,10 +508,14 @@ #define K_ATRAP_CFG_CATTR_NOTNONCOH 6 #define K_ATRAP_CFG_CATTR_NOTCOHERENT 7 +#endif /* 1250/112x */ + /* * Trace Buffer Config register */ +#if SIBYTE_HDR_FEATURE_1250_112x + #define M_SCD_TRACE_CFG_RESET _SB_MAKEMASK1(0) #define M_SCD_TRACE_CFG_START_READ _SB_MAKEMASK1(1) #define M_SCD_TRACE_CFG_START _SB_MAKEMASK1(2) @@ -475,6 +533,8 @@ #define V_SCD_TRACE_CFG_CUR_ADDR(x) _SB_MAKEVALUE(x,S_SCD_TRACE_CFG_CUR_ADDR) #define G_SCD_TRACE_CFG_CUR_ADDR(x) _SB_GETVALUE(x,S_SCD_TRACE_CFG_CUR_ADDR,M_SCD_TRACE_CFG_CUR_ADDR) +#endif /* 1250/112x */ + /* * Trace Event registers */ @@ -578,5 +638,7 @@ #define M_SCD_TRSEQ_DEBUGPIN _SB_MAKEMASK1(20) #define M_SCD_TRSEQ_DEBUGCPU _SB_MAKEMASK1(21) #define M_SCD_TRSEQ_CLEARUSE _SB_MAKEMASK1(22) +#define M_SCD_TRSEQ_ALLD_A _SB_MAKEMASK1(23) +#define M_SCD_TRSEQ_ALL_A _SB_MAKEMASK1(24) #endif diff --git a/include/asm-mips/sibyte/sb1250_smbus.h b/include/asm-mips/sibyte/sb1250_smbus.h index 335c53e92936..279a912213cd 100644 --- a/include/asm-mips/sibyte/sb1250_smbus.h +++ b/include/asm-mips/sibyte/sb1250_smbus.h @@ -6,9 +6,8 @@ * This module contains constants and macros useful for * manipulating the SB1250's SMbus devices. * - * SB1250 specification level: 01/02/2002 - * - * Author: Mitch Lichtenberg + * SB1250 specification level: 10/21/02 + * BCM1280 specification level: 11/24/03 * ********************************************************************* * @@ -47,6 +46,7 @@ #define K_SMB_FREQ_400KHZ 0x1F #define K_SMB_FREQ_100KHZ 0x7D +#define K_SMB_FREQ_10KHZ 1250 #define S_SMB_CMD 0 #define M_SMB_CMD _SB_MAKEMASK(8,S_SMB_CMD) @@ -58,7 +58,11 @@ #define M_SMB_ERR_INTR _SB_MAKEMASK1(0) #define M_SMB_FINISH_INTR _SB_MAKEMASK1(1) -#define M_SMB_DATA_OUT _SB_MAKEMASK1(4) + +#define S_SMB_DATA_OUT 4 +#define M_SMB_DATA_OUT _SB_MAKEMASK1(S_SMB_DATA_OUT) +#define V_SMB_DATA_OUT(x) _SB_MAKEVALUE(x,S_SMB_DATA_OUT) + #define M_SMB_DATA_DIR _SB_MAKEMASK1(5) #define M_SMB_DATA_DIR_OUTPUT M_SMB_DATA_DIR #define M_SMB_CLK_OUT _SB_MAKEMASK1(6) @@ -71,8 +75,23 @@ #define M_SMB_BUSY _SB_MAKEMASK1(0) #define M_SMB_ERROR _SB_MAKEMASK1(1) #define M_SMB_ERROR_TYPE _SB_MAKEMASK1(2) -#define M_SMB_REF _SB_MAKEMASK1(6) -#define M_SMB_DATA_IN _SB_MAKEMASK1(7) + +#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1) || SIBYTE_HDR_FEATURE_CHIP(1480) +#define S_SMB_SCL_IN 5 +#define M_SMB_SCL_IN _SB_MAKEMASK1(S_SMB_SCL_IN) +#define V_SMB_SCL_IN(x) _SB_MAKEVALUE(x,S_SMB_SCL_IN) +#define G_SMB_SCL_IN(x) _SB_GETVALUE(x,S_SMB_SCL_IN,M_SMB_SCL_IN) +#endif /* 1250 PASS3 || 112x PASS1 || 1480 */ + +#define S_SMB_REF 6 +#define M_SMB_REF _SB_MAKEMASK1(S_SMB_REF) +#define V_SMB_REF(x) _SB_MAKEVALUE(x,S_SMB_REF) +#define G_SMB_REF(x) _SB_GETVALUE(x,S_SMB_REF,M_SMB_REF) + +#define S_SMB_DATA_IN 7 +#define M_SMB_DATA_IN _SB_MAKEMASK1(S_SMB_DATA_IN) +#define V_SMB_DATA_IN(x) _SB_MAKEVALUE(x,S_SMB_DATA_IN) +#define G_SMB_DATA_IN(x) _SB_GETVALUE(x,S_SMB_DATA_IN,M_SMB_DATA_IN) /* * SMBus Start/Command registers (Table 14-9) @@ -132,16 +151,14 @@ #define V_SPEC_MB(x) _SB_MAKEVALUE(x,S_SPEC_PEC) -#if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1) +#if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1) || SIBYTE_HDR_FEATURE_CHIP(1480) #define S_SMB_CMDH 8 -#define M_SMB_CMDH _SB_MAKEMASK(8,S_SMBH_CMD) -#define V_SMB_CMDH(x) _SB_MAKEVALUE(x,S_SMBH_CMD) +#define M_SMB_CMDH _SB_MAKEMASK(8,S_SMB_CMDH) +#define V_SMB_CMDH(x) _SB_MAKEVALUE(x,S_SMB_CMDH) #define M_SMB_EXTEND _SB_MAKEMASK1(14) -#define M_SMB_DIR _SB_MAKEMASK1(13) - #define S_SMB_DFMT 8 #define M_SMB_DFMT _SB_MAKEMASK(3,S_SMB_DFMT) #define V_SMB_DFMT(x) _SB_MAKEVALUE(x,S_SMB_DFMT) @@ -165,6 +182,23 @@ #define V_SMB_DFMT_CMD5BYTE V_SMB_DFMT(K_SMB_DFMT_CMD5BYTE) #define V_SMB_DFMT_RESERVED V_SMB_DFMT(K_SMB_DFMT_RESERVED) -#endif /* 1250 PASS2 || 112x PASS1 */ +#define S_SMB_AFMT 11 +#define M_SMB_AFMT _SB_MAKEMASK(2,S_SMB_AFMT) +#define V_SMB_AFMT(x) _SB_MAKEVALUE(x,S_SMB_AFMT) +#define G_SMB_AFMT(x) _SB_GETVALUE(x,S_SMB_AFMT,M_SMB_AFMT) + +#define K_SMB_AFMT_NONE 0 +#define K_SMB_AFMT_ADDR 1 +#define K_SMB_AFMT_ADDR_CMD1BYTE 2 +#define K_SMB_AFMT_ADDR_CMD2BYTE 3 + +#define V_SMB_AFMT_NONE V_SMB_AFMT(K_SMB_AFMT_NONE) +#define V_SMB_AFMT_ADDR V_SMB_AFMT(K_SMB_AFMT_ADDR) +#define V_SMB_AFMT_ADDR_CMD1BYTE V_SMB_AFMT(K_SMB_AFMT_ADDR_CMD1BYTE) +#define V_SMB_AFMT_ADDR_CMD2BYTE V_SMB_AFMT(K_SMB_AFMT_ADDR_CMD2BYTE) + +#define M_SMB_DIR _SB_MAKEMASK1(13) + +#endif /* 1250 PASS2 || 112x PASS1 || 1480 */ #endif diff --git a/include/asm-mips/sibyte/sb1250_syncser.h b/include/asm-mips/sibyte/sb1250_syncser.h index fa2760d38b8b..dd154ac505d8 100644 --- a/include/asm-mips/sibyte/sb1250_syncser.h +++ b/include/asm-mips/sibyte/sb1250_syncser.h @@ -8,8 +8,6 @@ * * SB1250 specification level: User's manual 1/02/02 * - * Author: Mitch Lichtenberg - * ********************************************************************* * * Copyright 2000,2001,2002,2003 diff --git a/include/asm-mips/sibyte/sb1250_uart.h b/include/asm-mips/sibyte/sb1250_uart.h index 923ea4f44e0f..e87045e62bf0 100644 --- a/include/asm-mips/sibyte/sb1250_uart.h +++ b/include/asm-mips/sibyte/sb1250_uart.h @@ -8,8 +8,6 @@ * * SB1250 specification level: User's manual 1/02/02 * - * Author: Mitch Lichtenberg - * ********************************************************************* * * Copyright 2000,2001,2002,2003 @@ -240,7 +238,12 @@ */ #define M_DUART_ISR_TX_A _SB_MAKEMASK1(0) -#define M_DUART_ISR_RX_A _SB_MAKEMASK1(1) + +#define S_DUART_ISR_RX_A 1 +#define M_DUART_ISR_RX_A _SB_MAKEMASK1(S_DUART_ISR_RX_A) +#define V_DUART_ISR_RX_A(x) _SB_MAKEVALUE(x,S_DUART_ISR_RX_A) +#define G_DUART_ISR_RX_A(x) _SB_GETVALUE(x,S_DUART_ISR_RX_A,M_DUART_ISR_RX_A) + #define M_DUART_ISR_BRK_A _SB_MAKEMASK1(2) #define M_DUART_ISR_IN_A _SB_MAKEMASK1(3) #define M_DUART_ISR_TX_B _SB_MAKEMASK1(4) @@ -331,7 +334,7 @@ #define M_DUART_OUT_PIN_CLR(chan) \ (chan == 0 ? M_DUART_OUT_PIN_CLR0 : M_DUART_OUT_PIN_CLR1) -#if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1) +#if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1) || SIBYTE_HDR_FEATURE_CHIP(1480) /* * Full Interrupt Control Register */ @@ -345,7 +348,7 @@ #define M_DUART_INT_TIME _SB_MAKEMASK(4,S_DUART_INT_TIME) #define V_DUART_INT_TIME(x) _SB_MAKEVALUE(x,S_DUART_INT_TIME) #define G_DUART_INT_TIME(x) _SB_GETVALUE(x,S_DUART_INT_TIME,M_DUART_INT_TIME) -#endif /* 1250 PASS2 || 112x PASS1 */ +#endif /* 1250 PASS2 || 112x PASS1 || 1480 */ /* ********************************************************************** */ diff --git a/include/asm-mips/sibyte/swarm.h b/include/asm-mips/sibyte/swarm.h index 97fa0494c30c..06e1d528e03a 100644 --- a/include/asm-mips/sibyte/swarm.h +++ b/include/asm-mips/sibyte/swarm.h @@ -34,7 +34,7 @@ #define SIBYTE_DEFAULT_CONSOLE "ttyS0,115200" #endif #ifdef CONFIG_SIBYTE_LITTLESUR -#define SIBYTE_BOARD_NAME "BCM1250C2 (LittleSur)" +#define SIBYTE_BOARD_NAME "BCM91250C2 (LittleSur)" #define SIBYTE_HAVE_PCMCIA 0 #define SIBYTE_HAVE_IDE 1 #define SIBYTE_DEFAULT_CONSOLE "cfe0" diff --git a/include/asm-mips/sigcontext.h b/include/asm-mips/sigcontext.h index f7fbebaa0744..8edabb0be23f 100644 --- a/include/asm-mips/sigcontext.h +++ b/include/asm-mips/sigcontext.h @@ -27,14 +27,15 @@ struct sigcontext { unsigned int sc_fpc_csr; unsigned int sc_fpc_eir; /* Unused */ unsigned int sc_used_math; - unsigned int sc_ssflags; /* Unused */ + unsigned int sc_dsp; /* dsp status, was sc_ssflags */ unsigned long long sc_mdhi; unsigned long long sc_mdlo; - - unsigned int sc_cause; /* Unused */ - unsigned int sc_badvaddr; /* Unused */ - - unsigned long sc_sigset[4]; /* kernel's sigset_t */ + unsigned long sc_hi1; /* Was sc_cause */ + unsigned long sc_lo1; /* Was sc_badvaddr */ + unsigned long sc_hi2; /* Was sc_sigset[4] */ + unsigned long sc_lo2; + unsigned long sc_hi3; + unsigned long sc_lo3; }; #endif /* _MIPS_SIM == _MIPS_SIM_ABI32 */ @@ -48,19 +49,19 @@ struct sigcontext { * Warning: this structure illdefined with sc_badvaddr being just an unsigned * int so it was changed to unsigned long in 2.6.0-test1. This may break * binary compatibility - no prisoners. + * DSP ASE in 2.6.12-rc4. Turn sc_mdhi and sc_mdlo into an array of four + * entries, add sc_dsp and sc_reserved for padding. No prisoners. */ struct sigcontext { unsigned long sc_regs[32]; unsigned long sc_fpregs[32]; - unsigned long sc_mdhi; - unsigned long sc_mdlo; + unsigned long sc_hi[4]; + unsigned long sc_lo[4]; unsigned long sc_pc; - unsigned long sc_badvaddr; - unsigned int sc_status; unsigned int sc_fpc_csr; - unsigned int sc_fpc_eir; unsigned int sc_used_math; - unsigned int sc_cause; + unsigned int sc_dsp; + unsigned int sc_reserved; }; #ifdef __KERNEL__ @@ -68,23 +69,24 @@ struct sigcontext { #include <linux/posix_types.h> struct sigcontext32 { - __u32 sc_regmask; /* Unused */ - __u32 sc_status; - __u64 sc_pc; - __u64 sc_regs[32]; - __u64 sc_fpregs[32]; - __u32 sc_ownedfp; /* Unused */ - __u32 sc_fpc_csr; - __u32 sc_fpc_eir; /* Unused */ - __u32 sc_used_math; - __u32 sc_ssflags; /* Unused */ - __u64 sc_mdhi; - __u64 sc_mdlo; - - __u32 sc_cause; /* Unused */ - __u32 sc_badvaddr; /* Unused */ - - __u32 sc_sigset[4]; /* kernel's sigset_t */ + __u32 sc_regmask; /* Unused */ + __u32 sc_status; + __u64 sc_pc; + __u64 sc_regs[32]; + __u64 sc_fpregs[32]; + __u32 sc_ownedfp; /* Unused */ + __u32 sc_fpc_csr; + __u32 sc_fpc_eir; /* Unused */ + __u32 sc_used_math; + __u32 sc_dsp; /* dsp status, was sc_ssflags */ + __u64 sc_mdhi; + __u64 sc_mdlo; + __u32 sc_hi1; /* Was sc_cause */ + __u32 sc_lo1; /* Was sc_badvaddr */ + __u32 sc_hi2; /* Was sc_sigset[4] */ + __u32 sc_lo2; + __u32 sc_hi3; + __u32 sc_lo3; }; #endif /* __KERNEL__ */ diff --git a/include/asm-mips/siginfo.h b/include/asm-mips/siginfo.h index 698becab5a9e..2ba313d94a78 100644 --- a/include/asm-mips/siginfo.h +++ b/include/asm-mips/siginfo.h @@ -11,6 +11,7 @@ #include <linux/config.h> +#define __ARCH_SIGEV_PREAMBLE_SIZE (sizeof(long) + 2*sizeof(int)) #undef __ARCH_SI_TRAPNO /* exception code needs to fill this ... */ #define HAVE_ARCH_SIGINFO_T diff --git a/include/asm-mips/signal.h b/include/asm-mips/signal.h index f2c470f1d369..6fe903e09c62 100644 --- a/include/asm-mips/signal.h +++ b/include/asm-mips/signal.h @@ -98,12 +98,39 @@ typedef unsigned long old_sigset_t; /* at least 32 bits */ #define MINSIGSTKSZ 2048 #define SIGSTKSZ 8192 +#ifdef __KERNEL__ + +/* + * These values of sa_flags are used only by the kernel as part of the + * irq handling routines. + * + * SA_INTERRUPT is also used by the irq handling routines. + * SA_SHIRQ flag is for shared interrupt support on PCI and EISA. + */ +#define SA_SAMPLE_RANDOM SA_RESTART + +#ifdef CONFIG_TRAD_SIGNALS +#define sig_uses_siginfo(ka) ((ka)->sa.sa_flags & SA_SIGINFO) +#else +#define sig_uses_siginfo(ka) (1) +#endif + +#endif /* __KERNEL__ */ + #define SIG_BLOCK 1 /* for blocking signals */ #define SIG_UNBLOCK 2 /* for unblocking signals */ #define SIG_SETMASK 3 /* for setting the signal mask */ #define SIG_SETMASK32 256 /* Goodie from SGI for BSD compatibility: set only the low 32 bit of the sigset. */ -#include <asm-generic/signal.h> + +/* Type of a signal handler. */ +typedef void __signalfn_t(int); +typedef __signalfn_t __user *__sighandler_t; + +/* Fake signal functions */ +#define SIG_DFL ((__sighandler_t)0) /* default signal handling */ +#define SIG_IGN ((__sighandler_t)1) /* ignore signal */ +#define SIG_ERR ((__sighandler_t)-1) /* error return from signal */ struct sigaction { unsigned int sa_flags; @@ -128,27 +155,6 @@ typedef struct sigaltstack { #ifdef __KERNEL__ #include <asm/sigcontext.h> -/* - * The following break codes are or were in use for specific purposes in - * other MIPS operating systems. Linux/MIPS doesn't use all of them. The - * unused ones are here as placeholders; we might encounter them in - * non-Linux/MIPS object files or make use of them in the future. - */ -#define BRK_USERBP 0 /* User bp (used by debuggers) */ -#define BRK_KERNELBP 1 /* Break in the kernel */ -#define BRK_ABORT 2 /* Sometimes used by abort(3) to SIGIOT */ -#define BRK_BD_TAKEN 3 /* For bd slot emulation - not implemented */ -#define BRK_BD_NOTTAKEN 4 /* For bd slot emulation - not implemented */ -#define BRK_SSTEPBP 5 /* User bp (used by debuggers) */ -#define BRK_OVERFLOW 6 /* Overflow check */ -#define BRK_DIVZERO 7 /* Divide by zero check */ -#define BRK_RANGE 8 /* Range error check */ -#define BRK_STACKOVERFLOW 9 /* For Ada stackchecking */ -#define BRK_NORLD 10 /* No rld found - not used by Linux/MIPS */ -#define _BRK_THREADBP 11 /* For threads, user bp (used by debuggers) */ -#define BRK_MULOVF 1023 /* Multiply overflow */ -#define BRK_BUG 512 /* Used by BUG() */ - #define ptrace_signal_deliver(regs, cookie) do { } while (0) #endif /* __KERNEL__ */ diff --git a/include/asm-mips/sn/sn0/arch.h b/include/asm-mips/sn/sn0/arch.h index 0e00dd474afc..fb78773a5efe 100644 --- a/include/asm-mips/sn/sn0/arch.h +++ b/include/asm-mips/sn/sn0/arch.h @@ -74,13 +74,8 @@ #define MAX_MEM_SLOTS 32 /* max slots per node */ #endif /* defined(N_MODE) */ -#if SABLE_RTL -#define SLOT_SHIFT (28) -#define SLOT_MIN_MEM_SIZE (16*1024*1024) -#else #define SLOT_SHIFT (27) #define SLOT_MIN_MEM_SIZE (32*1024*1024) -#endif #define CPUS_PER_NODE 2 /* CPUs on a single hub */ #define CPUS_PER_NODE_SHFT 1 /* Bits to shift in the node number */ diff --git a/include/asm-mips/socket.h b/include/asm-mips/socket.h index 753b6620e6fa..0bb31e5aaca6 100644 --- a/include/asm-mips/socket.h +++ b/include/asm-mips/socket.h @@ -37,8 +37,6 @@ To add: #define SO_REUSEPORT 0x0200 /* Allow local address and port reuse. */ #define SO_ERROR 0x1007 /* get error status and clear */ #define SO_SNDBUF 0x1001 /* Send buffer size. */ #define SO_RCVBUF 0x1002 /* Receive buffer. */ -#define SO_SNDBUFFORCE 0x100a -#define SO_RCVBUFFORCE 0x100b #define SO_SNDLOWAT 0x1003 /* send low-water mark */ #define SO_RCVLOWAT 0x1004 /* receive low-water mark */ #define SO_SNDTIMEO 0x1005 /* send timeout */ @@ -69,6 +67,8 @@ To add: #define SO_REUSEPORT 0x0200 /* Allow local address and port reuse. */ #define SCM_TIMESTAMP SO_TIMESTAMP #define SO_PEERSEC 30 +#define SO_SNDBUFFORCE 31 +#define SO_RCVBUFFORCE 33 #ifdef __KERNEL__ @@ -92,6 +92,7 @@ enum sock_type { SOCK_RAW = 3, SOCK_RDM = 4, SOCK_SEQPACKET = 5, + SOCK_DCCP = 6, SOCK_PACKET = 10, }; diff --git a/include/asm-mips/spinlock.h b/include/asm-mips/spinlock.h index 4d0135b11156..669b8e349ff2 100644 --- a/include/asm-mips/spinlock.h +++ b/include/asm-mips/spinlock.h @@ -9,17 +9,16 @@ #ifndef _ASM_SPINLOCK_H #define _ASM_SPINLOCK_H -#include <linux/config.h> #include <asm/war.h> /* * Your basic SMP spinlocks, allowing only a single CPU anywhere */ -#define __raw_spin_is_locked(x) ((x)->lock != 0) +#define __raw_spin_is_locked(x) ((x)->lock != 0) #define __raw_spin_lock_flags(lock, flags) __raw_spin_lock(lock) #define __raw_spin_unlock_wait(x) \ - do { cpu_relax(); } while ((x)->lock) + do { cpu_relax(); } while ((x)->lock) /* * Simple spin lock operations. There are two variants, one clears IRQ's @@ -119,6 +118,18 @@ static inline unsigned int __raw_spin_trylock(raw_spinlock_t *lock) * read-locks. */ +/* + * read_can_lock - would read_trylock() succeed? + * @lock: the rwlock in question. + */ +#define __raw_read_can_lock(rw) ((rw)->lock >= 0) + +/* + * write_can_lock - would write_trylock() succeed? + * @lock: the rwlock in question. + */ +#define __raw_write_can_lock(rw) (!(rw)->lock) + static inline void __raw_read_lock(raw_rwlock_t *rw) { unsigned int tmp; @@ -197,8 +208,7 @@ static inline void __raw_write_lock(raw_rwlock_t *rw) " lui %1, 0x8000 \n" " sc %1, %0 \n" " beqzl %1, 1b \n" - " nop \n" - " sync \n" + " sync \n" " .set reorder \n" : "=m" (rw->lock), "=&r" (tmp) : "m" (rw->lock) @@ -211,8 +221,7 @@ static inline void __raw_write_lock(raw_rwlock_t *rw) " lui %1, 0x8000 \n" " sc %1, %0 \n" " beqz %1, 1b \n" - " nop \n" - " sync \n" + " sync \n" " .set reorder \n" : "=m" (rw->lock), "=&r" (tmp) : "m" (rw->lock) @@ -246,8 +255,7 @@ static inline int __raw_write_trylock(raw_rwlock_t *rw) " lui %1, 0x8000 \n" " sc %1, %0 \n" " beqzl %1, 1b \n" - " nop \n" - " sync \n" + " sync \n" " li %2, 1 \n" " .set reorder \n" "2: \n" diff --git a/include/asm-mips/stackframe.h b/include/asm-mips/stackframe.h index 7b5e64600bc8..a8919dcc93c8 100644 --- a/include/asm-mips/stackframe.h +++ b/include/asm-mips/stackframe.h @@ -60,7 +60,6 @@ mfc0 k0, CP0_CONTEXT lui k1, %hi(kernelsp) srl k0, k0, 23 - sll k0, k0, 2 addu k1, k0 LONG_L k1, %lo(kernelsp)(k1) #endif @@ -76,9 +75,14 @@ #endif #if defined(CONFIG_64BIT) && defined(CONFIG_BUILD_ELF64) MFC0 k1, CP0_CONTEXT + lui k0, %highest(kernelsp) dsrl k1, 23 - dsll k1, k1, 3 - LONG_L k1, kernelsp(k1) + daddiu k0, %higher(kernelsp) + dsll k0, k0, 16 + daddiu k0, %hi(kernelsp) + dsll k0, k0, 16 + daddu k1, k1, k0 + LONG_L k1, %lo(kernelsp)(k1) #endif .endm @@ -86,25 +90,28 @@ #ifdef CONFIG_32BIT mfc0 \temp, CP0_CONTEXT srl \temp, 23 - sll \temp, 2 - LONG_S \stackp, kernelsp(\temp) #endif #if defined(CONFIG_64BIT) && !defined(CONFIG_BUILD_ELF64) lw \temp, TI_CPU(gp) dsll \temp, 3 - lui \temp2, %hi(kernelsp) - daddu \temp, \temp2 - LONG_S \stackp, %lo(kernelsp)(\temp) #endif #if defined(CONFIG_64BIT) && defined(CONFIG_BUILD_ELF64) - lw \temp, TI_CPU(gp) - dsll \temp, 3 - LONG_S \stackp, kernelsp(\temp) + MFC0 \temp, CP0_CONTEXT + dsrl \temp, 23 #endif + LONG_S \stackp, kernelsp(\temp) .endm #else .macro get_saved_sp /* Uniprocessor variation */ +#if defined(CONFIG_64BIT) && defined(CONFIG_BUILD_ELF64) + lui k1, %highest(kernelsp) + daddiu k1, %higher(kernelsp) + dsll k1, k1, 16 + daddiu k1, %hi(kernelsp) + dsll k1, k1, 16 +#else lui k1, %hi(kernelsp) +#endif LONG_L k1, %lo(kernelsp)(k1) .endm diff --git a/include/asm-mips/system.h b/include/asm-mips/system.h index 6663efd49b27..330c4e497af3 100644 --- a/include/asm-mips/system.h +++ b/include/asm-mips/system.h @@ -17,6 +17,7 @@ #include <asm/addrspace.h> #include <asm/cpu-features.h> +#include <asm/dsp.h> #include <asm/ptrace.h> #include <asm/war.h> #include <asm/interrupt.h> @@ -70,7 +71,7 @@ * does not enforce ordering, since there is no data dependency between * the read of "a" and the read of "b". Therefore, on some CPUs, such * as Alpha, "y" could be set to 3 and "x" to 0. Use rmb() - * in cases like thiswhere there are no data dependencies. + * in cases like this where there are no data dependencies. */ #define read_barrier_depends() do { } while(0) @@ -154,15 +155,15 @@ extern asmlinkage void *resume(void *last, void *next, void *next_ti); struct task_struct; -#define switch_to(prev,next,last) \ -do { \ - (last) = resume(prev, next, next->thread_info); \ +#define switch_to(prev,next,last) \ +do { \ + if (cpu_has_dsp) \ + __save_dsp(prev); \ + (last) = resume(prev, next, next->thread_info); \ + if (cpu_has_dsp) \ + __restore_dsp(current); \ } while(0) -#define ROT_IN_PIECES \ - " .set noreorder \n" \ - " .set reorder \n" - static inline unsigned long __xchg_u32(volatile int * m, unsigned int val) { __u32 retval; @@ -171,14 +172,17 @@ static inline unsigned long __xchg_u32(volatile int * m, unsigned int val) unsigned long dummy; __asm__ __volatile__( + " .set mips3 \n" "1: ll %0, %3 # xchg_u32 \n" + " .set mips0 \n" " move %2, %z4 \n" + " .set mips3 \n" " sc %2, %1 \n" " beqzl %2, 1b \n" - ROT_IN_PIECES #ifdef CONFIG_SMP " sync \n" #endif + " .set mips0 \n" : "=&r" (retval), "=m" (*m), "=&r" (dummy) : "R" (*m), "Jr" (val) : "memory"); @@ -186,13 +190,17 @@ static inline unsigned long __xchg_u32(volatile int * m, unsigned int val) unsigned long dummy; __asm__ __volatile__( + " .set mips3 \n" "1: ll %0, %3 # xchg_u32 \n" + " .set mips0 \n" " move %2, %z4 \n" + " .set mips3 \n" " sc %2, %1 \n" " beqz %2, 1b \n" #ifdef CONFIG_SMP " sync \n" #endif + " .set mips0 \n" : "=&r" (retval), "=m" (*m), "=&r" (dummy) : "R" (*m), "Jr" (val) : "memory"); @@ -217,14 +225,15 @@ static inline __u64 __xchg_u64(volatile __u64 * m, __u64 val) unsigned long dummy; __asm__ __volatile__( + " .set mips3 \n" "1: lld %0, %3 # xchg_u64 \n" " move %2, %z4 \n" " scd %2, %1 \n" " beqzl %2, 1b \n" - ROT_IN_PIECES #ifdef CONFIG_SMP " sync \n" #endif + " .set mips0 \n" : "=&r" (retval), "=m" (*m), "=&r" (dummy) : "R" (*m), "Jr" (val) : "memory"); @@ -232,6 +241,7 @@ static inline __u64 __xchg_u64(volatile __u64 * m, __u64 val) unsigned long dummy; __asm__ __volatile__( + " .set mips3 \n" "1: lld %0, %3 # xchg_u64 \n" " move %2, %z4 \n" " scd %2, %1 \n" @@ -239,6 +249,7 @@ static inline __u64 __xchg_u64(volatile __u64 * m, __u64 val) #ifdef CONFIG_SMP " sync \n" #endif + " .set mips0 \n" : "=&r" (retval), "=m" (*m), "=&r" (dummy) : "R" (*m), "Jr" (val) : "memory"); @@ -286,34 +297,41 @@ static inline unsigned long __cmpxchg_u32(volatile int * m, unsigned long old, if (cpu_has_llsc && R10000_LLSC_WAR) { __asm__ __volatile__( + " .set push \n" " .set noat \n" + " .set mips3 \n" "1: ll %0, %2 # __cmpxchg_u32 \n" " bne %0, %z3, 2f \n" + " .set mips0 \n" " move $1, %z4 \n" + " .set mips3 \n" " sc $1, %1 \n" " beqzl $1, 1b \n" - ROT_IN_PIECES #ifdef CONFIG_SMP " sync \n" #endif "2: \n" - " .set at \n" + " .set pop \n" : "=&r" (retval), "=m" (*m) : "R" (*m), "Jr" (old), "Jr" (new) : "memory"); } else if (cpu_has_llsc) { __asm__ __volatile__( + " .set push \n" " .set noat \n" + " .set mips3 \n" "1: ll %0, %2 # __cmpxchg_u32 \n" " bne %0, %z3, 2f \n" + " .set mips0 \n" " move $1, %z4 \n" + " .set mips3 \n" " sc $1, %1 \n" " beqz $1, 1b \n" #ifdef CONFIG_SMP " sync \n" #endif "2: \n" - " .set at \n" + " .set pop \n" : "=&r" (retval), "=m" (*m) : "R" (*m), "Jr" (old), "Jr" (new) : "memory"); @@ -338,24 +356,27 @@ static inline unsigned long __cmpxchg_u64(volatile int * m, unsigned long old, if (cpu_has_llsc) { __asm__ __volatile__( + " .set push \n" " .set noat \n" + " .set mips3 \n" "1: lld %0, %2 # __cmpxchg_u64 \n" " bne %0, %z3, 2f \n" " move $1, %z4 \n" " scd $1, %1 \n" " beqzl $1, 1b \n" - ROT_IN_PIECES #ifdef CONFIG_SMP " sync \n" #endif "2: \n" - " .set at \n" + " .set pop \n" : "=&r" (retval), "=m" (*m) : "R" (*m), "Jr" (old), "Jr" (new) : "memory"); } else if (cpu_has_llsc) { __asm__ __volatile__( + " .set push \n" " .set noat \n" + " .set mips3 \n" "1: lld %0, %2 # __cmpxchg_u64 \n" " bne %0, %z3, 2f \n" " move $1, %z4 \n" @@ -365,7 +386,7 @@ static inline unsigned long __cmpxchg_u64(volatile int * m, unsigned long old, " sync \n" #endif "2: \n" - " .set at \n" + " .set pop \n" : "=&r" (retval), "=m" (*m) : "R" (*m), "Jr" (old), "Jr" (new) : "memory"); @@ -406,18 +427,20 @@ static inline unsigned long __cmpxchg(volatile void * ptr, unsigned long old, #define cmpxchg(ptr,old,new) ((__typeof__(*(ptr)))__cmpxchg((ptr), (unsigned long)(old), (unsigned long)(new),sizeof(*(ptr)))) +extern void set_handler (unsigned long offset, void *addr, unsigned long len); +extern void set_uncached_handler (unsigned long offset, void *addr, unsigned long len); +extern void *set_vi_handler (int n, void *addr); +extern void *set_vi_srs_handler (int n, void *addr, int regset); extern void *set_except_vector(int n, void *addr); extern void per_cpu_trap_init(void); -extern NORET_TYPE void __die(const char *, struct pt_regs *, const char *file, - const char *func, unsigned long line); -extern void __die_if_kernel(const char *, struct pt_regs *, const char *file, - const char *func, unsigned long line); +extern NORET_TYPE void die(const char *, struct pt_regs *); -#define die(msg, regs) \ - __die(msg, regs, __FILE__ ":", __FUNCTION__, __LINE__) -#define die_if_kernel(msg, regs) \ - __die_if_kernel(msg, regs, __FILE__ ":", __FUNCTION__, __LINE__) +static inline void die_if_kernel(const char *str, struct pt_regs *regs) +{ + if (unlikely(!user_mode(regs))) + die(str, regs); +} extern int stop_a_enabled; diff --git a/include/asm-mips/thread_info.h b/include/asm-mips/thread_info.h index a70cb0854c8a..e6c24472e03f 100644 --- a/include/asm-mips/thread_info.h +++ b/include/asm-mips/thread_info.h @@ -26,6 +26,7 @@ struct thread_info { struct task_struct *task; /* main task structure */ struct exec_domain *exec_domain; /* execution domain */ unsigned long flags; /* low level flags */ + unsigned long tp_value; /* thread pointer */ __u32 cpu; /* current CPU */ int preempt_count; /* 0 => preemptable, <0 => BUG */ @@ -114,6 +115,7 @@ register struct thread_info *__current_thread_info __asm__("$28"); #define TIF_SIGPENDING 2 /* signal pending */ #define TIF_NEED_RESCHED 3 /* rescheduling necessary */ #define TIF_SYSCALL_AUDIT 4 /* syscall auditing active */ +#define TIF_SECCOMP 5 /* secure computing */ #define TIF_USEDFPU 16 /* FPU was used by this task this quantum (SMP) */ #define TIF_POLLING_NRFLAG 17 /* true if poll_idle() is polling TIF_NEED_RESCHED */ #define TIF_MEMDIE 18 @@ -124,13 +126,14 @@ register struct thread_info *__current_thread_info __asm__("$28"); #define _TIF_SIGPENDING (1<<TIF_SIGPENDING) #define _TIF_NEED_RESCHED (1<<TIF_NEED_RESCHED) #define _TIF_SYSCALL_AUDIT (1<<TIF_SYSCALL_AUDIT) +#define _TIF_SECCOMP (1<<TIF_SECCOMP) #define _TIF_USEDFPU (1<<TIF_USEDFPU) #define _TIF_POLLING_NRFLAG (1<<TIF_POLLING_NRFLAG) -#define _TIF_WORK_MASK 0x0000ffef /* work to do on - interrupt/exception return */ -#define _TIF_ALLWORK_MASK 0x8000ffff /* work to do on any return to - u-space */ +/* work to do on interrupt/exception return */ +#define _TIF_WORK_MASK (0x0000ffef & ~_TIF_SECCOMP) +/* work to do on any return to u-space */ +#define _TIF_ALLWORK_MASK (0x8000ffff & ~_TIF_SECCOMP) #endif /* __KERNEL__ */ diff --git a/include/asm-mips/time.h b/include/asm-mips/time.h index e22a20665871..9cc3564cc2c9 100644 --- a/include/asm-mips/time.h +++ b/include/asm-mips/time.h @@ -20,6 +20,9 @@ #include <linux/linkage.h> #include <linux/ptrace.h> #include <linux/rtc.h> +#include <linux/spinlock.h> + +extern spinlock_t rtc_lock; /* * RTC ops. By default, they point to no-RTC functions. diff --git a/include/asm-mips/traps.h b/include/asm-mips/traps.h index 179012263007..d02e019b0127 100644 --- a/include/asm-mips/traps.h +++ b/include/asm-mips/traps.h @@ -21,4 +21,7 @@ extern void (*board_be_init)(void); extern int (*board_be_handler)(struct pt_regs *regs, int is_fixup); +extern void (*board_nmi_handler_setup)(void); +extern void (*board_ejtag_handler_setup)(void); + #endif /* _ASM_TRAPS_H */ diff --git a/include/asm-mips/tx4938/rbtx4938.h b/include/asm-mips/tx4938/rbtx4938.h new file mode 100644 index 000000000000..0fbedafdcea8 --- /dev/null +++ b/include/asm-mips/tx4938/rbtx4938.h @@ -0,0 +1,207 @@ +/* + * linux/include/asm-mips/tx4938/rbtx4938.h + * Definitions for TX4937/TX4938 + * + * 2003-2005 (c) MontaVista Software, Inc. This file is licensed under the + * terms of the GNU General Public License version 2. This program is + * licensed "as is" without any warranty of any kind, whether express + * or implied. + * + * Support for TX4938 in 2.6 - Manish Lachwani (mlachwani@mvista.com) + */ +#ifndef __ASM_TX_BOARDS_RBTX4938_H +#define __ASM_TX_BOARDS_RBTX4938_H + +#include <asm/addrspace.h> +#include <asm/tx4938/tx4938.h> + +/* CS */ +#define RBTX4938_CE0 0x1c000000 /* 64M */ +#define RBTX4938_CE2 0x17f00000 /* 1M */ + +/* Address map */ +#define RBTX4938_FPGA_REG_ADDR (KSEG1 + RBTX4938_CE2 + 0x00000000) +#define RBTX4938_FPGA_REV_ADDR (KSEG1 + RBTX4938_CE2 + 0x00000002) +#define RBTX4938_CONFIG1_ADDR (KSEG1 + RBTX4938_CE2 + 0x00000004) +#define RBTX4938_CONFIG2_ADDR (KSEG1 + RBTX4938_CE2 + 0x00000006) +#define RBTX4938_CONFIG3_ADDR (KSEG1 + RBTX4938_CE2 + 0x00000008) +#define RBTX4938_LED_ADDR (KSEG1 + RBTX4938_CE2 + 0x00001000) +#define RBTX4938_DIPSW_ADDR (KSEG1 + RBTX4938_CE2 + 0x00001002) +#define RBTX4938_BDIPSW_ADDR (KSEG1 + RBTX4938_CE2 + 0x00001004) +#define RBTX4938_IMASK_ADDR (KSEG1 + RBTX4938_CE2 + 0x00002000) +#define RBTX4938_IMASK2_ADDR (KSEG1 + RBTX4938_CE2 + 0x00002002) +#define RBTX4938_INTPOL_ADDR (KSEG1 + RBTX4938_CE2 + 0x00002004) +#define RBTX4938_ISTAT_ADDR (KSEG1 + RBTX4938_CE2 + 0x00002006) +#define RBTX4938_ISTAT2_ADDR (KSEG1 + RBTX4938_CE2 + 0x00002008) +#define RBTX4938_IMSTAT_ADDR (KSEG1 + RBTX4938_CE2 + 0x0000200a) +#define RBTX4938_IMSTAT2_ADDR (KSEG1 + RBTX4938_CE2 + 0x0000200c) +#define RBTX4938_SOFTINT_ADDR (KSEG1 + RBTX4938_CE2 + 0x00003000) +#define RBTX4938_PIOSEL_ADDR (KSEG1 + RBTX4938_CE2 + 0x00005000) +#define RBTX4938_SPICS_ADDR (KSEG1 + RBTX4938_CE2 + 0x00005002) +#define RBTX4938_SFPWR_ADDR (KSEG1 + RBTX4938_CE2 + 0x00005008) +#define RBTX4938_SFVOL_ADDR (KSEG1 + RBTX4938_CE2 + 0x0000500a) +#define RBTX4938_SOFTRESET_ADDR (KSEG1 + RBTX4938_CE2 + 0x00007000) +#define RBTX4938_SOFTRESETLOCK_ADDR (KSEG1 + RBTX4938_CE2 + 0x00007002) +#define RBTX4938_PCIRESET_ADDR (KSEG1 + RBTX4938_CE2 + 0x00007004) +#define RBTX4938_ETHER_BASE (KSEG1 + RBTX4938_CE2 + 0x00020000) + +/* Ethernet port address (Jumperless Mode (W12:Open)) */ +#define RBTX4938_ETHER_ADDR (RBTX4938_ETHER_BASE + 0x280) + +/* bits for ISTAT/IMASK/IMSTAT */ +#define RBTX4938_INTB_PCID 0 +#define RBTX4938_INTB_PCIC 1 +#define RBTX4938_INTB_PCIB 2 +#define RBTX4938_INTB_PCIA 3 +#define RBTX4938_INTB_RTC 4 +#define RBTX4938_INTB_ATA 5 +#define RBTX4938_INTB_MODEM 6 +#define RBTX4938_INTB_SWINT 7 +#define RBTX4938_INTF_PCID (1 << RBTX4938_INTB_PCID) +#define RBTX4938_INTF_PCIC (1 << RBTX4938_INTB_PCIC) +#define RBTX4938_INTF_PCIB (1 << RBTX4938_INTB_PCIB) +#define RBTX4938_INTF_PCIA (1 << RBTX4938_INTB_PCIA) +#define RBTX4938_INTF_RTC (1 << RBTX4938_INTB_RTC) +#define RBTX4938_INTF_ATA (1 << RBTX4938_INTB_ATA) +#define RBTX4938_INTF_MODEM (1 << RBTX4938_INTB_MODEM) +#define RBTX4938_INTF_SWINT (1 << RBTX4938_INTB_SWINT) + +#define rbtx4938_fpga_rev_ptr \ + ((volatile unsigned char *)RBTX4938_FPGA_REV_ADDR) +#define rbtx4938_led_ptr \ + ((volatile unsigned char *)RBTX4938_LED_ADDR) +#define rbtx4938_dipsw_ptr \ + ((volatile unsigned char *)RBTX4938_DIPSW_ADDR) +#define rbtx4938_bdipsw_ptr \ + ((volatile unsigned char *)RBTX4938_BDIPSW_ADDR) +#define rbtx4938_imask_ptr \ + ((volatile unsigned char *)RBTX4938_IMASK_ADDR) +#define rbtx4938_imask2_ptr \ + ((volatile unsigned char *)RBTX4938_IMASK2_ADDR) +#define rbtx4938_intpol_ptr \ + ((volatile unsigned char *)RBTX4938_INTPOL_ADDR) +#define rbtx4938_istat_ptr \ + ((volatile unsigned char *)RBTX4938_ISTAT_ADDR) +#define rbtx4938_istat2_ptr \ + ((volatile unsigned char *)RBTX4938_ISTAT2_ADDR) +#define rbtx4938_imstat_ptr \ + ((volatile unsigned char *)RBTX4938_IMSTAT_ADDR) +#define rbtx4938_imstat2_ptr \ + ((volatile unsigned char *)RBTX4938_IMSTAT2_ADDR) +#define rbtx4938_softint_ptr \ + ((volatile unsigned char *)RBTX4938_SOFTINT_ADDR) +#define rbtx4938_piosel_ptr \ + ((volatile unsigned char *)RBTX4938_PIOSEL_ADDR) +#define rbtx4938_spics_ptr \ + ((volatile unsigned char *)RBTX4938_SPICS_ADDR) +#define rbtx4938_sfpwr_ptr \ + ((volatile unsigned char *)RBTX4938_SFPWR_ADDR) +#define rbtx4938_sfvol_ptr \ + ((volatile unsigned char *)RBTX4938_SFVOL_ADDR) +#define rbtx4938_softreset_ptr \ + ((volatile unsigned char *)RBTX4938_SOFTRESET_ADDR) +#define rbtx4938_softresetlock_ptr \ + ((volatile unsigned char *)RBTX4938_SOFTRESETLOCK_ADDR) +#define rbtx4938_pcireset_ptr \ + ((volatile unsigned char *)RBTX4938_PCIRESET_ADDR) + +/* SPI */ +#define RBTX4938_SEEPROM1_CHIPID 0 +#define RBTX4938_SEEPROM2_CHIPID 1 +#define RBTX4938_SEEPROM3_CHIPID 2 +#define RBTX4938_SRTC_CHIPID 3 + +/* + * IRQ mappings + */ + +#define RBTX4938_SOFT_INT0 0 /* not used */ +#define RBTX4938_SOFT_INT1 1 /* not used */ +#define RBTX4938_IRC_INT 2 +#define RBTX4938_TIMER_INT 7 + +/* These are the virtual IRQ numbers, we divide all IRQ's into + * 'spaces', the 'space' determines where and how to enable/disable + * that particular IRQ on an RBTX4938 machine. Add new 'spaces' as new + * IRQ hardware is supported. + */ +#define RBTX4938_NR_IRQ_LOCAL 8 +#define RBTX4938_NR_IRQ_IRC 32 /* On-Chip IRC */ +#define RBTX4938_NR_IRQ_IOC 8 + +#define MI8259_IRQ_ISA_RAW_BEG 0 /* optional backplane i8259 */ +#define MI8259_IRQ_ISA_RAW_END 15 +#define TX4938_IRQ_CP0_RAW_BEG 0 /* tx4938 cpu built-in cp0 */ +#define TX4938_IRQ_CP0_RAW_END 7 +#define TX4938_IRQ_PIC_RAW_BEG 0 /* tx4938 cpu build-in pic */ +#define TX4938_IRQ_PIC_RAW_END 31 + +#define MI8259_IRQ_ISA_BEG MI8259_IRQ_ISA_RAW_BEG /* 0 */ +#define MI8259_IRQ_ISA_END MI8259_IRQ_ISA_RAW_END /* 15 */ + +#define TX4938_IRQ_CP0_BEG ((MI8259_IRQ_ISA_END+1)+TX4938_IRQ_CP0_RAW_BEG) /* 16 */ +#define TX4938_IRQ_CP0_END ((MI8259_IRQ_ISA_END+1)+TX4938_IRQ_CP0_RAW_END) /* 23 */ + +#define TX4938_IRQ_PIC_BEG ((TX4938_IRQ_CP0_END+1)+TX4938_IRQ_PIC_RAW_BEG) /* 24 */ +#define TX4938_IRQ_PIC_END ((TX4938_IRQ_CP0_END+1)+TX4938_IRQ_PIC_RAW_END) /* 55 */ +#define TX4938_IRQ_NEST_EXT_ON_PIC (TX4938_IRQ_PIC_BEG+2) +#define TX4938_IRQ_NEST_PIC_ON_CP0 (TX4938_IRQ_CP0_BEG+2) +#define TX4938_IRQ_USER0 (TX4938_IRQ_CP0_BEG+0) +#define TX4938_IRQ_USER1 (TX4938_IRQ_CP0_BEG+1) +#define TX4938_IRQ_CPU_TIMER (TX4938_IRQ_CP0_BEG+7) + +#define TOSHIBA_RBTX4938_IRQ_IOC_RAW_BEG 0 +#define TOSHIBA_RBTX4938_IRQ_IOC_RAW_END 7 + +#define TOSHIBA_RBTX4938_IRQ_IOC_BEG ((TX4938_IRQ_PIC_END+1)+TOSHIBA_RBTX4938_IRQ_IOC_RAW_BEG) /* 56 */ +#define TOSHIBA_RBTX4938_IRQ_IOC_END ((TX4938_IRQ_PIC_END+1)+TOSHIBA_RBTX4938_IRQ_IOC_RAW_END) /* 63 */ +#define RBTX4938_IRQ_LOCAL TX4938_IRQ_CP0_BEG +#define RBTX4938_IRQ_IRC (RBTX4938_IRQ_LOCAL + RBTX4938_NR_IRQ_LOCAL) +#define RBTX4938_IRQ_IOC (RBTX4938_IRQ_IRC + RBTX4938_NR_IRQ_IRC) +#define RBTX4938_IRQ_END (RBTX4938_IRQ_IOC + RBTX4938_NR_IRQ_IOC) + +#define RBTX4938_IRQ_LOCAL_SOFT0 (RBTX4938_IRQ_LOCAL + RBTX4938_SOFT_INT0) +#define RBTX4938_IRQ_LOCAL_SOFT1 (RBTX4938_IRQ_LOCAL + RBTX4938_SOFT_INT1) +#define RBTX4938_IRQ_LOCAL_IRC (RBTX4938_IRQ_LOCAL + RBTX4938_IRC_INT) +#define RBTX4938_IRQ_LOCAL_TIMER (RBTX4938_IRQ_LOCAL + RBTX4938_TIMER_INT) +#define RBTX4938_IRQ_IRC_ECCERR (RBTX4938_IRQ_IRC + TX4938_IR_ECCERR) +#define RBTX4938_IRQ_IRC_WTOERR (RBTX4938_IRQ_IRC + TX4938_IR_WTOERR) +#define RBTX4938_IRQ_IRC_INT(n) (RBTX4938_IRQ_IRC + TX4938_IR_INT(n)) +#define RBTX4938_IRQ_IRC_SIO(n) (RBTX4938_IRQ_IRC + TX4938_IR_SIO(n)) +#define RBTX4938_IRQ_IRC_DMA(ch,n) (RBTX4938_IRQ_IRC + TX4938_IR_DMA(ch,n)) +#define RBTX4938_IRQ_IRC_PIO (RBTX4938_IRQ_IRC + TX4938_IR_PIO) +#define RBTX4938_IRQ_IRC_PDMAC (RBTX4938_IRQ_IRC + TX4938_IR_PDMAC) +#define RBTX4938_IRQ_IRC_PCIC (RBTX4938_IRQ_IRC + TX4938_IR_PCIC) +#define RBTX4938_IRQ_IRC_TMR(n) (RBTX4938_IRQ_IRC + TX4938_IR_TMR(n)) +#define RBTX4938_IRQ_IRC_NDFMC (RBTX4938_IRQ_IRC + TX4938_IR_NDFMC) +#define RBTX4938_IRQ_IRC_PCIERR (RBTX4938_IRQ_IRC + TX4938_IR_PCIERR) +#define RBTX4938_IRQ_IRC_PCIPME (RBTX4938_IRQ_IRC + TX4938_IR_PCIPME) +#define RBTX4938_IRQ_IRC_ACLC (RBTX4938_IRQ_IRC + TX4938_IR_ACLC) +#define RBTX4938_IRQ_IRC_ACLCPME (RBTX4938_IRQ_IRC + TX4938_IR_ACLCPME) +#define RBTX4938_IRQ_IRC_PCIC1 (RBTX4938_IRQ_IRC + TX4938_IR_PCIC1) +#define RBTX4938_IRQ_IRC_SPI (RBTX4938_IRQ_IRC + TX4938_IR_SPI) +#define RBTX4938_IRQ_IOC_PCID (RBTX4938_IRQ_IOC + RBTX4938_INTB_PCID) +#define RBTX4938_IRQ_IOC_PCIC (RBTX4938_IRQ_IOC + RBTX4938_INTB_PCIC) +#define RBTX4938_IRQ_IOC_PCIB (RBTX4938_IRQ_IOC + RBTX4938_INTB_PCIB) +#define RBTX4938_IRQ_IOC_PCIA (RBTX4938_IRQ_IOC + RBTX4938_INTB_PCIA) +#define RBTX4938_IRQ_IOC_RTC (RBTX4938_IRQ_IOC + RBTX4938_INTB_RTC) +#define RBTX4938_IRQ_IOC_ATA (RBTX4938_IRQ_IOC + RBTX4938_INTB_ATA) +#define RBTX4938_IRQ_IOC_MODEM (RBTX4938_IRQ_IOC + RBTX4938_INTB_MODEM) +#define RBTX4938_IRQ_IOC_SWINT (RBTX4938_IRQ_IOC + RBTX4938_INTB_SWINT) + + +/* IOC (PCI, etc) */ +#define RBTX4938_IRQ_IOCINT (TX4938_IRQ_NEST_EXT_ON_PIC) +/* Onboard 10M Ether */ +#define RBTX4938_IRQ_ETHER (TX4938_IRQ_NEST_EXT_ON_PIC + 1) + +#define RBTX4938_RTL_8019_BASE (RBTX4938_ETHER_ADDR - mips_io_port_base) +#define RBTX4938_RTL_8019_IRQ (RBTX4938_IRQ_ETHER) + +/* IRCR : Int. Control */ +#define TX4938_IRCR_LOW 0x00000000 +#define TX4938_IRCR_HIGH 0x00000001 +#define TX4938_IRCR_DOWN 0x00000002 +#define TX4938_IRCR_UP 0x00000003 + +#endif /* __ASM_TX_BOARDS_RBTX4938_H */ diff --git a/include/asm-mips/tx4938/spi.h b/include/asm-mips/tx4938/spi.h new file mode 100644 index 000000000000..0dbbab820a5a --- /dev/null +++ b/include/asm-mips/tx4938/spi.h @@ -0,0 +1,74 @@ +/* + * linux/include/asm-mips/tx4938/spi.h + * Definitions for TX4937/TX4938 SPI + * + * Copyright (C) 2000-2001 Toshiba Corporation + * + * 2003-2005 (c) MontaVista Software, Inc. This file is licensed under the + * terms of the GNU General Public License version 2. This program is + * licensed "as is" without any warranty of any kind, whether express + * or implied. + * + * Support for TX4938 in 2.6 - Manish Lachwani (mlachwani@mvista.com) + */ +#ifndef __ASM_TX_BOARDS_TX4938_SPI_H +#define __ASM_TX_BOARDS_TX4938_SPI_H + +/* SPI */ +struct spi_dev_desc { + unsigned int baud; + unsigned short tcss, tcsh, tcsr; /* CS setup/hold/recovery time */ + unsigned int byteorder:1; /* 0:LSB-First, 1:MSB-First */ + unsigned int polarity:1; /* 0:High-Active */ + unsigned int phase:1; /* 0:Sample-Then-Shift */ +}; + +extern void txx9_spi_init(unsigned long base, int (*cs_func)(int chipid, int on)) __init; +extern void txx9_spi_irqinit(int irc_irq) __init; +extern int txx9_spi_io(int chipid, struct spi_dev_desc *desc, + unsigned char **inbufs, unsigned int *incounts, + unsigned char **outbufs, unsigned int *outcounts, + int cansleep); +extern int spi_eeprom_write_enable(int chipid, int enable); +extern int spi_eeprom_read_status(int chipid); +extern int spi_eeprom_read(int chipid, int address, unsigned char *buf, int len); +extern int spi_eeprom_write(int chipid, int address, unsigned char *buf, int len); +extern void spi_eeprom_proc_create(struct proc_dir_entry *dir, int chipid) __init; + +#define TXX9_IMCLK (txx9_gbus_clock / 2) + +/* +* SPI +*/ + +/* SPMCR : SPI Master Control */ +#define TXx9_SPMCR_OPMODE 0xc0 +#define TXx9_SPMCR_CONFIG 0x40 +#define TXx9_SPMCR_ACTIVE 0x80 +#define TXx9_SPMCR_SPSTP 0x02 +#define TXx9_SPMCR_BCLR 0x01 + +/* SPCR0 : SPI Status */ +#define TXx9_SPCR0_TXIFL_MASK 0xc000 +#define TXx9_SPCR0_RXIFL_MASK 0x3000 +#define TXx9_SPCR0_SIDIE 0x0800 +#define TXx9_SPCR0_SOEIE 0x0400 +#define TXx9_SPCR0_RBSIE 0x0200 +#define TXx9_SPCR0_TBSIE 0x0100 +#define TXx9_SPCR0_IFSPSE 0x0010 +#define TXx9_SPCR0_SBOS 0x0004 +#define TXx9_SPCR0_SPHA 0x0002 +#define TXx9_SPCR0_SPOL 0x0001 + +/* SPSR : SPI Status */ +#define TXx9_SPSR_TBSI 0x8000 +#define TXx9_SPSR_RBSI 0x4000 +#define TXx9_SPSR_TBS_MASK 0x3800 +#define TXx9_SPSR_RBS_MASK 0x0700 +#define TXx9_SPSR_SPOE 0x0080 +#define TXx9_SPSR_IFSD 0x0008 +#define TXx9_SPSR_SIDLE 0x0004 +#define TXx9_SPSR_STRDY 0x0002 +#define TXx9_SPSR_SRRDY 0x0001 + +#endif /* __ASM_TX_BOARDS_TX4938_SPI_H */ diff --git a/include/asm-mips/tx4938/tx4938.h b/include/asm-mips/tx4938/tx4938.h new file mode 100644 index 000000000000..e25b1a0975cb --- /dev/null +++ b/include/asm-mips/tx4938/tx4938.h @@ -0,0 +1,706 @@ +/* + * linux/include/asm-mips/tx4938/tx4938.h + * Definitions for TX4937/TX4938 + * Copyright (C) 2000-2001 Toshiba Corporation + * + * 2003-2005 (c) MontaVista Software, Inc. This file is licensed under the + * terms of the GNU General Public License version 2. This program is + * licensed "as is" without any warranty of any kind, whether express + * or implied. + * + * Support for TX4938 in 2.6 - Manish Lachwani (mlachwani@mvista.com) + */ +#ifndef __ASM_TX_BOARDS_TX4938_H +#define __ASM_TX_BOARDS_TX4938_H + +#include <asm/tx4938/tx4938_mips.h> + +#define tx4938_read_nfmc(addr) (*(volatile unsigned int *)(addr)) +#define tx4938_write_nfmc(b,addr) (*(volatile unsigned int *)(addr)) = (b) + +#define TX4938_NR_IRQ_LOCAL TX4938_IRQ_PIC_BEG + +#define TX4938_IRQ_IRC_PCIC (TX4938_NR_IRQ_LOCAL + TX4938_IR_PCIC) +#define TX4938_IRQ_IRC_PCIERR (TX4938_NR_IRQ_LOCAL + TX4938_IR_PCIERR) + +#define TX4938_PCIIO_0 0x10000000 +#define TX4938_PCIIO_1 0x01010000 +#define TX4938_PCIMEM_0 0x08000000 +#define TX4938_PCIMEM_1 0x11000000 + +#define TX4938_PCIIO_SIZE_0 0x01000000 +#define TX4938_PCIIO_SIZE_1 0x00010000 +#define TX4938_PCIMEM_SIZE_0 0x08000000 +#define TX4938_PCIMEM_SIZE_1 0x00010000 + +#define TX4938_REG_BASE 0xff1f0000 /* == TX4937_REG_BASE */ +#define TX4938_REG_SIZE 0x00010000 /* == TX4937_REG_SIZE */ + +/* NDFMC, SRAMC, PCIC1, SPIC: TX4938 only */ +#define TX4938_NDFMC_REG (TX4938_REG_BASE + 0x5000) +#define TX4938_SRAMC_REG (TX4938_REG_BASE + 0x6000) +#define TX4938_PCIC1_REG (TX4938_REG_BASE + 0x7000) +#define TX4938_SDRAMC_REG (TX4938_REG_BASE + 0x8000) +#define TX4938_EBUSC_REG (TX4938_REG_BASE + 0x9000) +#define TX4938_DMA_REG(ch) (TX4938_REG_BASE + 0xb000 + (ch) * 0x800) +#define TX4938_PCIC_REG (TX4938_REG_BASE + 0xd000) +#define TX4938_CCFG_REG (TX4938_REG_BASE + 0xe000) +#define TX4938_NR_TMR 3 +#define TX4938_TMR_REG(ch) ((TX4938_REG_BASE + 0xf000) + (ch) * 0x100) +#define TX4938_NR_SIO 2 +#define TX4938_SIO_REG(ch) ((TX4938_REG_BASE + 0xf300) + (ch) * 0x100) +#define TX4938_PIO_REG (TX4938_REG_BASE + 0xf500) +#define TX4938_IRC_REG (TX4938_REG_BASE + 0xf600) +#define TX4938_ACLC_REG (TX4938_REG_BASE + 0xf700) +#define TX4938_SPI_REG (TX4938_REG_BASE + 0xf800) + +#ifndef _LANGUAGE_ASSEMBLY +#include <asm/byteorder.h> + +#define TX4938_MKA(x) ((u32)( ((u32)(TX4938_REG_BASE)) | ((u32)(x)) )) + +#define TX4938_RD08( reg ) (*(vu08*)(reg)) +#define TX4938_WR08( reg, val ) ((*(vu08*)(reg))=(val)) + +#define TX4938_RD16( reg ) (*(vu16*)(reg)) +#define TX4938_WR16( reg, val ) ((*(vu16*)(reg))=(val)) + +#define TX4938_RD32( reg ) (*(vu32*)(reg)) +#define TX4938_WR32( reg, val ) ((*(vu32*)(reg))=(val)) + +#define TX4938_RD64( reg ) (*(vu64*)(reg)) +#define TX4938_WR64( reg, val ) ((*(vu64*)(reg))=(val)) + +#define TX4938_RD( reg ) TX4938_RD32( reg ) +#define TX4938_WR( reg, val ) TX4938_WR32( reg, val ) + +#endif /* !__ASSEMBLY__ */ + +#ifdef __ASSEMBLY__ +#define _CONST64(c) c +#else +#define _CONST64(c) c##ull + +#include <asm/byteorder.h> + +#ifdef __BIG_ENDIAN +#define endian_def_l2(e1,e2) \ + volatile unsigned long e1,e2 +#define endian_def_s2(e1,e2) \ + volatile unsigned short e1,e2 +#define endian_def_sb2(e1,e2,e3) \ + volatile unsigned short e1;volatile unsigned char e2,e3 +#define endian_def_b2s(e1,e2,e3) \ + volatile unsigned char e1,e2;volatile unsigned short e3 +#define endian_def_b4(e1,e2,e3,e4) \ + volatile unsigned char e1,e2,e3,e4 +#else +#define endian_def_l2(e1,e2) \ + volatile unsigned long e2,e1 +#define endian_def_s2(e1,e2) \ + volatile unsigned short e2,e1 +#define endian_def_sb2(e1,e2,e3) \ + volatile unsigned char e3,e2;volatile unsigned short e1 +#define endian_def_b2s(e1,e2,e3) \ + volatile unsigned short e3;volatile unsigned char e2,e1 +#define endian_def_b4(e1,e2,e3,e4) \ + volatile unsigned char e4,e3,e2,e1 +#endif + + +struct tx4938_sdramc_reg { + volatile unsigned long long cr[4]; + volatile unsigned long long unused0[4]; + volatile unsigned long long tr; + volatile unsigned long long unused1[2]; + volatile unsigned long long cmd; + volatile unsigned long long sfcmd; +}; + +struct tx4938_ebusc_reg { + volatile unsigned long long cr[8]; +}; + +struct tx4938_dma_reg { + struct tx4938_dma_ch_reg { + volatile unsigned long long cha; + volatile unsigned long long sar; + volatile unsigned long long dar; + endian_def_l2(unused0, cntr); + endian_def_l2(unused1, sair); + endian_def_l2(unused2, dair); + endian_def_l2(unused3, ccr); + endian_def_l2(unused4, csr); + } ch[4]; + volatile unsigned long long dbr[8]; + volatile unsigned long long tdhr; + volatile unsigned long long midr; + endian_def_l2(unused0, mcr); +}; + +struct tx4938_pcic_reg { + volatile unsigned long pciid; + volatile unsigned long pcistatus; + volatile unsigned long pciccrev; + volatile unsigned long pcicfg1; + volatile unsigned long p2gm0plbase; /* +10 */ + volatile unsigned long p2gm0pubase; + volatile unsigned long p2gm1plbase; + volatile unsigned long p2gm1pubase; + volatile unsigned long p2gm2pbase; /* +20 */ + volatile unsigned long p2giopbase; + volatile unsigned long unused0; + volatile unsigned long pcisid; + volatile unsigned long unused1; /* +30 */ + volatile unsigned long pcicapptr; + volatile unsigned long unused2; + volatile unsigned long pcicfg2; + volatile unsigned long g2ptocnt; /* +40 */ + volatile unsigned long unused3[15]; + volatile unsigned long g2pstatus; /* +80 */ + volatile unsigned long g2pmask; + volatile unsigned long pcisstatus; + volatile unsigned long pcimask; + volatile unsigned long p2gcfg; /* +90 */ + volatile unsigned long p2gstatus; + volatile unsigned long p2gmask; + volatile unsigned long p2gccmd; + volatile unsigned long unused4[24]; /* +a0 */ + volatile unsigned long pbareqport; /* +100 */ + volatile unsigned long pbacfg; + volatile unsigned long pbastatus; + volatile unsigned long pbamask; + volatile unsigned long pbabm; /* +110 */ + volatile unsigned long pbacreq; + volatile unsigned long pbacgnt; + volatile unsigned long pbacstate; + volatile unsigned long long g2pmgbase[3]; /* +120 */ + volatile unsigned long long g2piogbase; + volatile unsigned long g2pmmask[3]; /* +140 */ + volatile unsigned long g2piomask; + volatile unsigned long long g2pmpbase[3]; /* +150 */ + volatile unsigned long long g2piopbase; + volatile unsigned long pciccfg; /* +170 */ + volatile unsigned long pcicstatus; + volatile unsigned long pcicmask; + volatile unsigned long unused5; + volatile unsigned long long p2gmgbase[3]; /* +180 */ + volatile unsigned long long p2giogbase; + volatile unsigned long g2pcfgadrs; /* +1a0 */ + volatile unsigned long g2pcfgdata; + volatile unsigned long unused6[8]; + volatile unsigned long g2pintack; + volatile unsigned long g2pspc; + volatile unsigned long unused7[12]; /* +1d0 */ + volatile unsigned long long pdmca; /* +200 */ + volatile unsigned long long pdmga; + volatile unsigned long long pdmpa; + volatile unsigned long long pdmctr; + volatile unsigned long long pdmcfg; /* +220 */ + volatile unsigned long long pdmsts; +}; + +struct tx4938_aclc_reg { + volatile unsigned long acctlen; + volatile unsigned long acctldis; + volatile unsigned long acregacc; + volatile unsigned long unused0; + volatile unsigned long acintsts; + volatile unsigned long acintmsts; + volatile unsigned long acinten; + volatile unsigned long acintdis; + volatile unsigned long acsemaph; + volatile unsigned long unused1[7]; + volatile unsigned long acgpidat; + volatile unsigned long acgpodat; + volatile unsigned long acslten; + volatile unsigned long acsltdis; + volatile unsigned long acfifosts; + volatile unsigned long unused2[11]; + volatile unsigned long acdmasts; + volatile unsigned long acdmasel; + volatile unsigned long unused3[6]; + volatile unsigned long acaudodat; + volatile unsigned long acsurrdat; + volatile unsigned long accentdat; + volatile unsigned long aclfedat; + volatile unsigned long acaudiat; + volatile unsigned long unused4; + volatile unsigned long acmodoat; + volatile unsigned long acmodidat; + volatile unsigned long unused5[15]; + volatile unsigned long acrevid; +}; + + +struct tx4938_tmr_reg { + volatile unsigned long tcr; + volatile unsigned long tisr; + volatile unsigned long cpra; + volatile unsigned long cprb; + volatile unsigned long itmr; + volatile unsigned long unused0[3]; + volatile unsigned long ccdr; + volatile unsigned long unused1[3]; + volatile unsigned long pgmr; + volatile unsigned long unused2[3]; + volatile unsigned long wtmr; + volatile unsigned long unused3[43]; + volatile unsigned long trr; +}; + +struct tx4938_sio_reg { + volatile unsigned long lcr; + volatile unsigned long dicr; + volatile unsigned long disr; + volatile unsigned long cisr; + volatile unsigned long fcr; + volatile unsigned long flcr; + volatile unsigned long bgr; + volatile unsigned long tfifo; + volatile unsigned long rfifo; +}; + +struct tx4938_pio_reg { + volatile unsigned long dout; + volatile unsigned long din; + volatile unsigned long dir; + volatile unsigned long od; + volatile unsigned long flag[2]; + volatile unsigned long pol; + volatile unsigned long intc; + volatile unsigned long maskcpu; + volatile unsigned long maskext; +}; +struct tx4938_irc_reg { + volatile unsigned long cer; + volatile unsigned long cr[2]; + volatile unsigned long unused0; + volatile unsigned long ilr[8]; + volatile unsigned long unused1[4]; + volatile unsigned long imr; + volatile unsigned long unused2[7]; + volatile unsigned long scr; + volatile unsigned long unused3[7]; + volatile unsigned long ssr; + volatile unsigned long unused4[7]; + volatile unsigned long csr; +}; + +struct tx4938_ndfmc_reg { + endian_def_l2(unused0, dtr); + endian_def_l2(unused1, mcr); + endian_def_l2(unused2, sr); + endian_def_l2(unused3, isr); + endian_def_l2(unused4, imr); + endian_def_l2(unused5, spr); + endian_def_l2(unused6, rstr); +}; + +struct tx4938_spi_reg { + volatile unsigned long mcr; + volatile unsigned long cr0; + volatile unsigned long cr1; + volatile unsigned long fs; + volatile unsigned long unused1; + volatile unsigned long sr; + volatile unsigned long dr; + volatile unsigned long unused2; +}; + +struct tx4938_sramc_reg { + volatile unsigned long long cr; +}; + +struct tx4938_ccfg_reg { + volatile unsigned long long ccfg; + volatile unsigned long long crir; + volatile unsigned long long pcfg; + volatile unsigned long long tear; + volatile unsigned long long clkctr; + volatile unsigned long long unused0; + volatile unsigned long long garbc; + volatile unsigned long long unused1; + volatile unsigned long long unused2; + volatile unsigned long long ramp; + volatile unsigned long long unused3; + volatile unsigned long long jmpadr; +}; + +#undef endian_def_l2 +#undef endian_def_s2 +#undef endian_def_sb2 +#undef endian_def_b2s +#undef endian_def_b4 + +#endif /* __ASSEMBLY__ */ + +/* + * NDFMC + */ + +/* NDFMCR : NDFMC Mode Control */ +#define TX4938_NDFMCR_WE 0x80 +#define TX4938_NDFMCR_ECC_ALL 0x60 +#define TX4938_NDFMCR_ECC_RESET 0x60 +#define TX4938_NDFMCR_ECC_READ 0x40 +#define TX4938_NDFMCR_ECC_ON 0x20 +#define TX4938_NDFMCR_ECC_OFF 0x00 +#define TX4938_NDFMCR_CE 0x10 +#define TX4938_NDFMCR_BSPRT 0x04 +#define TX4938_NDFMCR_ALE 0x02 +#define TX4938_NDFMCR_CLE 0x01 + +/* NDFMCR : NDFMC Status */ +#define TX4938_NDFSR_BUSY 0x80 + +/* NDFMCR : NDFMC Reset */ +#define TX4938_NDFRSTR_RST 0x01 + +/* + * IRC + */ + +#define TX4938_IR_ECCERR 0 +#define TX4938_IR_WTOERR 1 +#define TX4938_NUM_IR_INT 6 +#define TX4938_IR_INT(n) (2 + (n)) +#define TX4938_NUM_IR_SIO 2 +#define TX4938_IR_SIO(n) (8 + (n)) +#define TX4938_NUM_IR_DMA 4 +#define TX4938_IR_DMA(ch,n) ((ch ? 27 : 10) + (n)) /* 10-13,27-30 */ +#define TX4938_IR_PIO 14 +#define TX4938_IR_PDMAC 15 +#define TX4938_IR_PCIC 16 +#define TX4938_NUM_IR_TMR 3 +#define TX4938_IR_TMR(n) (17 + (n)) +#define TX4938_IR_NDFMC 21 +#define TX4938_IR_PCIERR 22 +#define TX4938_IR_PCIPME 23 +#define TX4938_IR_ACLC 24 +#define TX4938_IR_ACLCPME 25 +#define TX4938_IR_PCIC1 26 +#define TX4938_IR_SPI 31 +#define TX4938_NUM_IR 32 +/* multiplex */ +#define TX4938_IR_ETH0 TX4938_IR_INT(4) +#define TX4938_IR_ETH1 TX4938_IR_INT(3) + +/* + * CCFG + */ +/* CCFG : Chip Configuration */ +#define TX4938_CCFG_WDRST _CONST64(0x0000020000000000) +#define TX4938_CCFG_WDREXEN _CONST64(0x0000010000000000) +#define TX4938_CCFG_BCFG_MASK _CONST64(0x000000ff00000000) +#define TX4938_CCFG_TINTDIS 0x01000000 +#define TX4938_CCFG_PCI66 0x00800000 +#define TX4938_CCFG_PCIMODE 0x00400000 +#define TX4938_CCFG_PCI1_66 0x00200000 +#define TX4938_CCFG_DIVMODE_MASK 0x001e0000 +#define TX4938_CCFG_DIVMODE_2 (0x4 << 17) +#define TX4938_CCFG_DIVMODE_2_5 (0xf << 17) +#define TX4938_CCFG_DIVMODE_3 (0x5 << 17) +#define TX4938_CCFG_DIVMODE_4 (0x6 << 17) +#define TX4938_CCFG_DIVMODE_4_5 (0xd << 17) +#define TX4938_CCFG_DIVMODE_8 (0x0 << 17) +#define TX4938_CCFG_DIVMODE_10 (0xb << 17) +#define TX4938_CCFG_DIVMODE_12 (0x1 << 17) +#define TX4938_CCFG_DIVMODE_16 (0x2 << 17) +#define TX4938_CCFG_DIVMODE_18 (0x9 << 17) +#define TX4938_CCFG_BEOW 0x00010000 +#define TX4938_CCFG_WR 0x00008000 +#define TX4938_CCFG_TOE 0x00004000 +#define TX4938_CCFG_PCIXARB 0x00002000 +#define TX4938_CCFG_PCIDIVMODE_MASK 0x00001c00 +#define TX4938_CCFG_PCIDIVMODE_4 (0x1 << 10) +#define TX4938_CCFG_PCIDIVMODE_4_5 (0x3 << 10) +#define TX4938_CCFG_PCIDIVMODE_5 (0x5 << 10) +#define TX4938_CCFG_PCIDIVMODE_5_5 (0x7 << 10) +#define TX4938_CCFG_PCIDIVMODE_8 (0x0 << 10) +#define TX4938_CCFG_PCIDIVMODE_9 (0x2 << 10) +#define TX4938_CCFG_PCIDIVMODE_10 (0x4 << 10) +#define TX4938_CCFG_PCIDIVMODE_11 (0x6 << 10) +#define TX4938_CCFG_PCI1DMD 0x00000100 +#define TX4938_CCFG_SYSSP_MASK 0x000000c0 +#define TX4938_CCFG_ENDIAN 0x00000004 +#define TX4938_CCFG_HALT 0x00000002 +#define TX4938_CCFG_ACEHOLD 0x00000001 + +/* PCFG : Pin Configuration */ +#define TX4938_PCFG_ETH0_SEL _CONST64(0x8000000000000000) +#define TX4938_PCFG_ETH1_SEL _CONST64(0x4000000000000000) +#define TX4938_PCFG_ATA_SEL _CONST64(0x2000000000000000) +#define TX4938_PCFG_ISA_SEL _CONST64(0x1000000000000000) +#define TX4938_PCFG_SPI_SEL _CONST64(0x0800000000000000) +#define TX4938_PCFG_NDF_SEL _CONST64(0x0400000000000000) +#define TX4938_PCFG_SDCLKDLY_MASK 0x30000000 +#define TX4938_PCFG_SDCLKDLY(d) ((d)<<28) +#define TX4938_PCFG_SYSCLKEN 0x08000000 +#define TX4938_PCFG_SDCLKEN_ALL 0x07800000 +#define TX4938_PCFG_SDCLKEN(ch) (0x00800000<<(ch)) +#define TX4938_PCFG_PCICLKEN_ALL 0x003f0000 +#define TX4938_PCFG_PCICLKEN(ch) (0x00010000<<(ch)) +#define TX4938_PCFG_SEL2 0x00000200 +#define TX4938_PCFG_SEL1 0x00000100 +#define TX4938_PCFG_DMASEL_ALL 0x0000000f +#define TX4938_PCFG_DMASEL0_DRQ0 0x00000000 +#define TX4938_PCFG_DMASEL0_SIO1 0x00000001 +#define TX4938_PCFG_DMASEL1_DRQ1 0x00000000 +#define TX4938_PCFG_DMASEL1_SIO1 0x00000002 +#define TX4938_PCFG_DMASEL2_DRQ2 0x00000000 +#define TX4938_PCFG_DMASEL2_SIO0 0x00000004 +#define TX4938_PCFG_DMASEL3_DRQ3 0x00000000 +#define TX4938_PCFG_DMASEL3_SIO0 0x00000008 + +/* CLKCTR : Clock Control */ +#define TX4938_CLKCTR_NDFCKD _CONST64(0x0001000000000000) +#define TX4938_CLKCTR_NDFRST _CONST64(0x0000000100000000) +#define TX4938_CLKCTR_ETH1CKD 0x80000000 +#define TX4938_CLKCTR_ETH0CKD 0x40000000 +#define TX4938_CLKCTR_SPICKD 0x20000000 +#define TX4938_CLKCTR_SRAMCKD 0x10000000 +#define TX4938_CLKCTR_PCIC1CKD 0x08000000 +#define TX4938_CLKCTR_DMA1CKD 0x04000000 +#define TX4938_CLKCTR_ACLCKD 0x02000000 +#define TX4938_CLKCTR_PIOCKD 0x01000000 +#define TX4938_CLKCTR_DMACKD 0x00800000 +#define TX4938_CLKCTR_PCICKD 0x00400000 +#define TX4938_CLKCTR_TM0CKD 0x00100000 +#define TX4938_CLKCTR_TM1CKD 0x00080000 +#define TX4938_CLKCTR_TM2CKD 0x00040000 +#define TX4938_CLKCTR_SIO0CKD 0x00020000 +#define TX4938_CLKCTR_SIO1CKD 0x00010000 +#define TX4938_CLKCTR_ETH1RST 0x00008000 +#define TX4938_CLKCTR_ETH0RST 0x00004000 +#define TX4938_CLKCTR_SPIRST 0x00002000 +#define TX4938_CLKCTR_SRAMRST 0x00001000 +#define TX4938_CLKCTR_PCIC1RST 0x00000800 +#define TX4938_CLKCTR_DMA1RST 0x00000400 +#define TX4938_CLKCTR_ACLRST 0x00000200 +#define TX4938_CLKCTR_PIORST 0x00000100 +#define TX4938_CLKCTR_DMARST 0x00000080 +#define TX4938_CLKCTR_PCIRST 0x00000040 +#define TX4938_CLKCTR_TM0RST 0x00000010 +#define TX4938_CLKCTR_TM1RST 0x00000008 +#define TX4938_CLKCTR_TM2RST 0x00000004 +#define TX4938_CLKCTR_SIO0RST 0x00000002 +#define TX4938_CLKCTR_SIO1RST 0x00000001 + +/* bits for G2PSTATUS/G2PMASK */ +#define TX4938_PCIC_G2PSTATUS_ALL 0x00000003 +#define TX4938_PCIC_G2PSTATUS_TTOE 0x00000002 +#define TX4938_PCIC_G2PSTATUS_RTOE 0x00000001 + +/* bits for PCIMASK (see also PCI_STATUS_XXX in linux/pci.h */ +#define TX4938_PCIC_PCISTATUS_ALL 0x0000f900 + +/* bits for PBACFG */ +#define TX4938_PCIC_PBACFG_FIXPA 0x00000008 +#define TX4938_PCIC_PBACFG_RPBA 0x00000004 +#define TX4938_PCIC_PBACFG_PBAEN 0x00000002 +#define TX4938_PCIC_PBACFG_BMCEN 0x00000001 + +/* bits for G2PMnGBASE */ +#define TX4938_PCIC_G2PMnGBASE_BSDIS _CONST64(0x0000002000000000) +#define TX4938_PCIC_G2PMnGBASE_ECHG _CONST64(0x0000001000000000) + +/* bits for G2PIOGBASE */ +#define TX4938_PCIC_G2PIOGBASE_BSDIS _CONST64(0x0000002000000000) +#define TX4938_PCIC_G2PIOGBASE_ECHG _CONST64(0x0000001000000000) + +/* bits for PCICSTATUS/PCICMASK */ +#define TX4938_PCIC_PCICSTATUS_ALL 0x000007b8 +#define TX4938_PCIC_PCICSTATUS_PME 0x00000400 +#define TX4938_PCIC_PCICSTATUS_TLB 0x00000200 +#define TX4938_PCIC_PCICSTATUS_NIB 0x00000100 +#define TX4938_PCIC_PCICSTATUS_ZIB 0x00000080 +#define TX4938_PCIC_PCICSTATUS_PERR 0x00000020 +#define TX4938_PCIC_PCICSTATUS_SERR 0x00000010 +#define TX4938_PCIC_PCICSTATUS_GBE 0x00000008 +#define TX4938_PCIC_PCICSTATUS_IWB 0x00000002 +#define TX4938_PCIC_PCICSTATUS_E2PDONE 0x00000001 + +/* bits for PCICCFG */ +#define TX4938_PCIC_PCICCFG_GBWC_MASK 0x0fff0000 +#define TX4938_PCIC_PCICCFG_HRST 0x00000800 +#define TX4938_PCIC_PCICCFG_SRST 0x00000400 +#define TX4938_PCIC_PCICCFG_IRBER 0x00000200 +#define TX4938_PCIC_PCICCFG_G2PMEN(ch) (0x00000100>>(ch)) +#define TX4938_PCIC_PCICCFG_G2PM0EN 0x00000100 +#define TX4938_PCIC_PCICCFG_G2PM1EN 0x00000080 +#define TX4938_PCIC_PCICCFG_G2PM2EN 0x00000040 +#define TX4938_PCIC_PCICCFG_G2PIOEN 0x00000020 +#define TX4938_PCIC_PCICCFG_TCAR 0x00000010 +#define TX4938_PCIC_PCICCFG_ICAEN 0x00000008 + +/* bits for P2GMnGBASE */ +#define TX4938_PCIC_P2GMnGBASE_TMEMEN _CONST64(0x0000004000000000) +#define TX4938_PCIC_P2GMnGBASE_TBSDIS _CONST64(0x0000002000000000) +#define TX4938_PCIC_P2GMnGBASE_TECHG _CONST64(0x0000001000000000) + +/* bits for P2GIOGBASE */ +#define TX4938_PCIC_P2GIOGBASE_TIOEN _CONST64(0x0000004000000000) +#define TX4938_PCIC_P2GIOGBASE_TBSDIS _CONST64(0x0000002000000000) +#define TX4938_PCIC_P2GIOGBASE_TECHG _CONST64(0x0000001000000000) + +#define TX4938_PCIC_IDSEL_AD_TO_SLOT(ad) ((ad) - 11) +#define TX4938_PCIC_MAX_DEVNU TX4938_PCIC_IDSEL_AD_TO_SLOT(32) + +/* bits for PDMCFG */ +#define TX4938_PCIC_PDMCFG_RSTFIFO 0x00200000 +#define TX4938_PCIC_PDMCFG_EXFER 0x00100000 +#define TX4938_PCIC_PDMCFG_REQDLY_MASK 0x00003800 +#define TX4938_PCIC_PDMCFG_REQDLY_NONE (0 << 11) +#define TX4938_PCIC_PDMCFG_REQDLY_16 (1 << 11) +#define TX4938_PCIC_PDMCFG_REQDLY_32 (2 << 11) +#define TX4938_PCIC_PDMCFG_REQDLY_64 (3 << 11) +#define TX4938_PCIC_PDMCFG_REQDLY_128 (4 << 11) +#define TX4938_PCIC_PDMCFG_REQDLY_256 (5 << 11) +#define TX4938_PCIC_PDMCFG_REQDLY_512 (6 << 11) +#define TX4938_PCIC_PDMCFG_REQDLY_1024 (7 << 11) +#define TX4938_PCIC_PDMCFG_ERRIE 0x00000400 +#define TX4938_PCIC_PDMCFG_NCCMPIE 0x00000200 +#define TX4938_PCIC_PDMCFG_NTCMPIE 0x00000100 +#define TX4938_PCIC_PDMCFG_CHNEN 0x00000080 +#define TX4938_PCIC_PDMCFG_XFRACT 0x00000040 +#define TX4938_PCIC_PDMCFG_BSWAP 0x00000020 +#define TX4938_PCIC_PDMCFG_XFRSIZE_MASK 0x0000000c +#define TX4938_PCIC_PDMCFG_XFRSIZE_1DW 0x00000000 +#define TX4938_PCIC_PDMCFG_XFRSIZE_1QW 0x00000004 +#define TX4938_PCIC_PDMCFG_XFRSIZE_4QW 0x00000008 +#define TX4938_PCIC_PDMCFG_XFRDIRC 0x00000002 +#define TX4938_PCIC_PDMCFG_CHRST 0x00000001 + +/* bits for PDMSTS */ +#define TX4938_PCIC_PDMSTS_REQCNT_MASK 0x3f000000 +#define TX4938_PCIC_PDMSTS_FIFOCNT_MASK 0x00f00000 +#define TX4938_PCIC_PDMSTS_FIFOWP_MASK 0x000c0000 +#define TX4938_PCIC_PDMSTS_FIFORP_MASK 0x00030000 +#define TX4938_PCIC_PDMSTS_ERRINT 0x00000800 +#define TX4938_PCIC_PDMSTS_DONEINT 0x00000400 +#define TX4938_PCIC_PDMSTS_CHNEN 0x00000200 +#define TX4938_PCIC_PDMSTS_XFRACT 0x00000100 +#define TX4938_PCIC_PDMSTS_ACCMP 0x00000080 +#define TX4938_PCIC_PDMSTS_NCCMP 0x00000040 +#define TX4938_PCIC_PDMSTS_NTCMP 0x00000020 +#define TX4938_PCIC_PDMSTS_CFGERR 0x00000008 +#define TX4938_PCIC_PDMSTS_PCIERR 0x00000004 +#define TX4938_PCIC_PDMSTS_CHNERR 0x00000002 +#define TX4938_PCIC_PDMSTS_DATAERR 0x00000001 +#define TX4938_PCIC_PDMSTS_ALL_CMP 0x000000e0 +#define TX4938_PCIC_PDMSTS_ALL_ERR 0x0000000f + +/* + * DMA + */ +/* bits for MCR */ +#define TX4938_DMA_MCR_EIS(ch) (0x10000000<<(ch)) +#define TX4938_DMA_MCR_DIS(ch) (0x01000000<<(ch)) +#define TX4938_DMA_MCR_RSFIF 0x00000080 +#define TX4938_DMA_MCR_FIFUM(ch) (0x00000008<<(ch)) +#define TX4938_DMA_MCR_RPRT 0x00000002 +#define TX4938_DMA_MCR_MSTEN 0x00000001 + +/* bits for CCRn */ +#define TX4938_DMA_CCR_IMMCHN 0x20000000 +#define TX4938_DMA_CCR_USEXFSZ 0x10000000 +#define TX4938_DMA_CCR_LE 0x08000000 +#define TX4938_DMA_CCR_DBINH 0x04000000 +#define TX4938_DMA_CCR_SBINH 0x02000000 +#define TX4938_DMA_CCR_CHRST 0x01000000 +#define TX4938_DMA_CCR_RVBYTE 0x00800000 +#define TX4938_DMA_CCR_ACKPOL 0x00400000 +#define TX4938_DMA_CCR_REQPL 0x00200000 +#define TX4938_DMA_CCR_EGREQ 0x00100000 +#define TX4938_DMA_CCR_CHDN 0x00080000 +#define TX4938_DMA_CCR_DNCTL 0x00060000 +#define TX4938_DMA_CCR_EXTRQ 0x00010000 +#define TX4938_DMA_CCR_INTRQD 0x0000e000 +#define TX4938_DMA_CCR_INTENE 0x00001000 +#define TX4938_DMA_CCR_INTENC 0x00000800 +#define TX4938_DMA_CCR_INTENT 0x00000400 +#define TX4938_DMA_CCR_CHNEN 0x00000200 +#define TX4938_DMA_CCR_XFACT 0x00000100 +#define TX4938_DMA_CCR_SMPCHN 0x00000020 +#define TX4938_DMA_CCR_XFSZ(order) (((order) << 2) & 0x0000001c) +#define TX4938_DMA_CCR_XFSZ_1W TX4938_DMA_CCR_XFSZ(2) +#define TX4938_DMA_CCR_XFSZ_2W TX4938_DMA_CCR_XFSZ(3) +#define TX4938_DMA_CCR_XFSZ_4W TX4938_DMA_CCR_XFSZ(4) +#define TX4938_DMA_CCR_XFSZ_8W TX4938_DMA_CCR_XFSZ(5) +#define TX4938_DMA_CCR_XFSZ_16W TX4938_DMA_CCR_XFSZ(6) +#define TX4938_DMA_CCR_XFSZ_32W TX4938_DMA_CCR_XFSZ(7) +#define TX4938_DMA_CCR_MEMIO 0x00000002 +#define TX4938_DMA_CCR_SNGAD 0x00000001 + +/* bits for CSRn */ +#define TX4938_DMA_CSR_CHNEN 0x00000400 +#define TX4938_DMA_CSR_STLXFER 0x00000200 +#define TX4938_DMA_CSR_CHNACT 0x00000100 +#define TX4938_DMA_CSR_ABCHC 0x00000080 +#define TX4938_DMA_CSR_NCHNC 0x00000040 +#define TX4938_DMA_CSR_NTRNFC 0x00000020 +#define TX4938_DMA_CSR_EXTDN 0x00000010 +#define TX4938_DMA_CSR_CFERR 0x00000008 +#define TX4938_DMA_CSR_CHERR 0x00000004 +#define TX4938_DMA_CSR_DESERR 0x00000002 +#define TX4938_DMA_CSR_SORERR 0x00000001 + +/* TX4938 Interrupt Controller (32-bit registers) */ +#define TX4938_IRC_BASE 0xf510 +#define TX4938_IRC_IRFLAG0 0xf510 +#define TX4938_IRC_IRFLAG1 0xf514 +#define TX4938_IRC_IRPOL 0xf518 +#define TX4938_IRC_IRRCNT 0xf51c +#define TX4938_IRC_IRMASKINT 0xf520 +#define TX4938_IRC_IRMASKEXT 0xf524 +#define TX4938_IRC_IRDEN 0xf600 +#define TX4938_IRC_IRDM0 0xf604 +#define TX4938_IRC_IRDM1 0xf608 +#define TX4938_IRC_IRLVL0 0xf610 +#define TX4938_IRC_IRLVL1 0xf614 +#define TX4938_IRC_IRLVL2 0xf618 +#define TX4938_IRC_IRLVL3 0xf61c +#define TX4938_IRC_IRLVL4 0xf620 +#define TX4938_IRC_IRLVL5 0xf624 +#define TX4938_IRC_IRLVL6 0xf628 +#define TX4938_IRC_IRLVL7 0xf62c +#define TX4938_IRC_IRMSK 0xf640 +#define TX4938_IRC_IREDC 0xf660 +#define TX4938_IRC_IRPND 0xf680 +#define TX4938_IRC_IRCS 0xf6a0 +#define TX4938_IRC_LIMIT 0xf6ff + + +#ifndef __ASSEMBLY__ + +#define tx4938_sdramcptr ((struct tx4938_sdramc_reg *)TX4938_SDRAMC_REG) +#define tx4938_ebuscptr ((struct tx4938_ebusc_reg *)TX4938_EBUSC_REG) +#define tx4938_dmaptr(ch) ((struct tx4938_dma_reg *)TX4938_DMA_REG(ch)) +#define tx4938_ndfmcptr ((struct tx4938_ndfmc_reg *)TX4938_NDFMC_REG) +#define tx4938_ircptr ((struct tx4938_irc_reg *)TX4938_IRC_REG) +#define tx4938_pcicptr ((struct tx4938_pcic_reg *)TX4938_PCIC_REG) +#define tx4938_pcic1ptr ((struct tx4938_pcic_reg *)TX4938_PCIC1_REG) +#define tx4938_ccfgptr ((struct tx4938_ccfg_reg *)TX4938_CCFG_REG) +#define tx4938_tmrptr(ch) ((struct tx4938_tmr_reg *)TX4938_TMR_REG(ch)) +#define tx4938_sioptr(ch) ((struct tx4938_sio_reg *)TX4938_SIO_REG(ch)) +#define tx4938_pioptr ((struct tx4938_pio_reg *)TX4938_PIO_REG) +#define tx4938_aclcptr ((struct tx4938_aclc_reg *)TX4938_ACLC_REG) +#define tx4938_spiptr ((struct tx4938_spi_reg *)TX4938_SPI_REG) +#define tx4938_sramcptr ((struct tx4938_sramc_reg *)TX4938_SRAMC_REG) + + +#define TX4938_REV_MAJ_MIN() ((unsigned long)tx4938_ccfgptr->crir & 0x00ff) +#define TX4938_REV_PCODE() ((unsigned long)tx4938_ccfgptr->crir >> 16) + +#define TX4938_SDRAMC_BA(ch) ((tx4938_sdramcptr->cr[ch] >> 49) << 21) +#define TX4938_SDRAMC_SIZE(ch) (((tx4938_sdramcptr->cr[ch] >> 33) + 1) << 21) + +#define TX4938_EBUSC_BA(ch) ((tx4938_ebuscptr->cr[ch] >> 48) << 20) +#define TX4938_EBUSC_SIZE(ch) \ + (0x00100000 << ((unsigned long)(tx4938_ebuscptr->cr[ch] >> 8) & 0xf)) + + +#endif /* !__ASSEMBLY__ */ + +#endif diff --git a/include/asm-mips/tx4938/tx4938_mips.h b/include/asm-mips/tx4938/tx4938_mips.h new file mode 100644 index 000000000000..cf89b205f103 --- /dev/null +++ b/include/asm-mips/tx4938/tx4938_mips.h @@ -0,0 +1,54 @@ +/* + * linux/include/asm-mips/tx4938/tx4938_bitmask.h + * Generic bitmask definitions + * + * 2003-2005 (c) MontaVista Software, Inc. This file is licensed under the + * terms of the GNU General Public License version 2. This program is + * licensed "as is" without any warranty of any kind, whether express + * or implied. + * + * Support for TX4938 in 2.6 - Manish Lachwani (mlachwani@mvista.com) + */ + +#ifndef TX4938_TX4938_MIPS_H +#define TX4938_TX4938_MIPS_H +#ifndef __ASSEMBLY__ + +#define reg_rd08(r) ((u8 )(*((vu8 *)(r)))) +#define reg_rd16(r) ((u16)(*((vu16*)(r)))) +#define reg_rd32(r) ((u32)(*((vu32*)(r)))) +#define reg_rd64(r) ((u64)(*((vu64*)(r)))) + +#define reg_wr08(r,v) ((*((vu8 *)(r)))=((u8 )(v))) +#define reg_wr16(r,v) ((*((vu16*)(r)))=((u16)(v))) +#define reg_wr32(r,v) ((*((vu32*)(r)))=((u32)(v))) +#define reg_wr64(r,v) ((*((vu64*)(r)))=((u64)(v))) + +typedef volatile __signed char vs8; +typedef volatile unsigned char vu8; + +typedef volatile __signed short vs16; +typedef volatile unsigned short vu16; + +typedef volatile __signed int vs32; +typedef volatile unsigned int vu32; + +typedef s8 s08; +typedef vs8 vs08; + +typedef u8 u08; +typedef vu8 vu08; + +#if (_MIPS_SZLONG == 64) + +typedef volatile __signed__ long vs64; +typedef volatile unsigned long vu64; + +#else + +typedef volatile __signed__ long long vs64; +typedef volatile unsigned long long vu64; + +#endif +#endif +#endif diff --git a/include/asm-mips/uaccess.h b/include/asm-mips/uaccess.h index 5c2c98329012..41bb96bb2120 100644 --- a/include/asm-mips/uaccess.h +++ b/include/asm-mips/uaccess.h @@ -196,63 +196,55 @@ __get_user_nocheck((x),(ptr),sizeof(*(ptr))) struct __large_struct { unsigned long buf[100]; }; -#define __m(x) (*(struct __large_struct *)(x)) +#define __m(x) (*(struct __large_struct __user *)(x)) /* * Yuck. We need two variants, one for 64bit operation and one * for 32 bit mode and old iron. */ #ifdef __mips64 -#define __GET_USER_DW(__gu_err) __get_user_asm("ld", __gu_err) +#define __GET_USER_DW(ptr) __get_user_asm("ld", ptr) #else -#define __GET_USER_DW(__gu_err) __get_user_asm_ll32(__gu_err) +#define __GET_USER_DW(ptr) __get_user_asm_ll32(ptr) #endif #define __get_user_nocheck(x,ptr,size) \ ({ \ - __typeof(*(ptr)) __gu_val = 0; \ - long __gu_addr; \ + __typeof(*(ptr)) __gu_val = (__typeof(*(ptr))) 0; \ long __gu_err = 0; \ \ - might_sleep(); \ - __gu_addr = (long) (ptr); \ switch (size) { \ - case 1: __get_user_asm("lb", __gu_err); break; \ - case 2: __get_user_asm("lh", __gu_err); break; \ - case 4: __get_user_asm("lw", __gu_err); break; \ - case 8: __GET_USER_DW(__gu_err); break; \ + case 1: __get_user_asm("lb", ptr); break; \ + case 2: __get_user_asm("lh", ptr); break; \ + case 4: __get_user_asm("lw", ptr); break; \ + case 8: __GET_USER_DW(ptr); break; \ default: __get_user_unknown(); break; \ } \ - x = (__typeof__(*(ptr))) __gu_val; \ + (x) = (__typeof__(*(ptr))) __gu_val; \ __gu_err; \ }) #define __get_user_check(x,ptr,size) \ ({ \ + const __typeof__(*(ptr)) __user * __gu_addr = (ptr); \ __typeof__(*(ptr)) __gu_val = 0; \ - long __gu_addr; \ - long __gu_err; \ - \ - might_sleep(); \ - __gu_addr = (long) (ptr); \ - __gu_err = access_ok(VERIFY_READ, (void *) __gu_addr, size) \ - ? 0 : -EFAULT; \ + long __gu_err = -EFAULT; \ \ - if (likely(!__gu_err)) { \ + if (likely(access_ok(VERIFY_READ, __gu_addr, size))) { \ switch (size) { \ - case 1: __get_user_asm("lb", __gu_err); break; \ - case 2: __get_user_asm("lh", __gu_err); break; \ - case 4: __get_user_asm("lw", __gu_err); break; \ - case 8: __GET_USER_DW(__gu_err); break; \ + case 1: __get_user_asm("lb", __gu_addr); break; \ + case 2: __get_user_asm("lh", __gu_addr); break; \ + case 4: __get_user_asm("lw", __gu_addr); break; \ + case 8: __GET_USER_DW(__gu_addr); break; \ default: __get_user_unknown(); break; \ } \ } \ - x = (__typeof__(*(ptr))) __gu_val; \ + (x) = (__typeof__(*(ptr))) __gu_val; \ __gu_err; \ }) -#define __get_user_asm(insn,__gu_err) \ -({ \ +#define __get_user_asm(insn, addr) \ +{ \ __asm__ __volatile__( \ "1: " insn " %1, %3 \n" \ "2: \n" \ @@ -264,20 +256,20 @@ struct __large_struct { unsigned long buf[100]; }; " "__UA_ADDR "\t1b, 3b \n" \ " .previous \n" \ : "=r" (__gu_err), "=r" (__gu_val) \ - : "0" (__gu_err), "o" (__m(__gu_addr)), "i" (-EFAULT)); \ -}) + : "0" (0), "o" (__m(addr)), "i" (-EFAULT)); \ +} /* * Get a long long 64 using 32 bit registers. */ -#define __get_user_asm_ll32(__gu_err) \ -({ \ +#define __get_user_asm_ll32(addr) \ +{ \ __asm__ __volatile__( \ - "1: lw %1, %3 \n" \ - "2: lw %D1, %4 \n" \ + "1: lw %1, (%3) \n" \ + "2: lw %D1, 4(%3) \n" \ " move %0, $0 \n" \ "3: .section .fixup,\"ax\" \n" \ - "4: li %0, %5 \n" \ + "4: li %0, %4 \n" \ " move %1, $0 \n" \ " move %D1, $0 \n" \ " j 3b \n" \ @@ -287,9 +279,8 @@ struct __large_struct { unsigned long buf[100]; }; " " __UA_ADDR " 2b, 4b \n" \ " .previous \n" \ : "=r" (__gu_err), "=&r" (__gu_val) \ - : "0" (__gu_err), "o" (__m(__gu_addr)), \ - "o" (__m(__gu_addr + 4)), "i" (-EFAULT)); \ -}) + : "0" (0), "r" (addr), "i" (-EFAULT)); \ +} extern void __get_user_unknown(void); @@ -298,25 +289,22 @@ extern void __get_user_unknown(void); * for 32 bit mode and old iron. */ #ifdef __mips64 -#define __PUT_USER_DW(__pu_val) __put_user_asm("sd", __pu_val) +#define __PUT_USER_DW(ptr) __put_user_asm("sd", ptr) #else -#define __PUT_USER_DW(__pu_val) __put_user_asm_ll32(__pu_val) +#define __PUT_USER_DW(ptr) __put_user_asm_ll32(ptr) #endif #define __put_user_nocheck(x,ptr,size) \ ({ \ __typeof__(*(ptr)) __pu_val; \ - long __pu_addr; \ long __pu_err = 0; \ \ - might_sleep(); \ __pu_val = (x); \ - __pu_addr = (long) (ptr); \ switch (size) { \ - case 1: __put_user_asm("sb", __pu_val); break; \ - case 2: __put_user_asm("sh", __pu_val); break; \ - case 4: __put_user_asm("sw", __pu_val); break; \ - case 8: __PUT_USER_DW(__pu_val); break; \ + case 1: __put_user_asm("sb", ptr); break; \ + case 2: __put_user_asm("sh", ptr); break; \ + case 4: __put_user_asm("sw", ptr); break; \ + case 8: __PUT_USER_DW(ptr); break; \ default: __put_user_unknown(); break; \ } \ __pu_err; \ @@ -324,30 +312,24 @@ extern void __get_user_unknown(void); #define __put_user_check(x,ptr,size) \ ({ \ - __typeof__(*(ptr)) __pu_val; \ - long __pu_addr; \ - long __pu_err; \ + __typeof__(*(ptr)) __user *__pu_addr = (ptr); \ + __typeof__(*(ptr)) __pu_val = (x); \ + long __pu_err = -EFAULT; \ \ - might_sleep(); \ - __pu_val = (x); \ - __pu_addr = (long) (ptr); \ - __pu_err = access_ok(VERIFY_WRITE, (void *) __pu_addr, size) \ - ? 0 : -EFAULT; \ - \ - if (likely(!__pu_err)) { \ + if (likely(access_ok(VERIFY_WRITE, __pu_addr, size))) { \ switch (size) { \ - case 1: __put_user_asm("sb", __pu_val); break; \ - case 2: __put_user_asm("sh", __pu_val); break; \ - case 4: __put_user_asm("sw", __pu_val); break; \ - case 8: __PUT_USER_DW(__pu_val); break; \ + case 1: __put_user_asm("sb", __pu_addr); break; \ + case 2: __put_user_asm("sh", __pu_addr); break; \ + case 4: __put_user_asm("sw", __pu_addr); break; \ + case 8: __PUT_USER_DW(__pu_addr); break; \ default: __put_user_unknown(); break; \ } \ } \ __pu_err; \ }) -#define __put_user_asm(insn, __pu_val) \ -({ \ +#define __put_user_asm(insn, ptr) \ +{ \ __asm__ __volatile__( \ "1: " insn " %z2, %3 # __put_user_asm\n" \ "2: \n" \ @@ -359,18 +341,18 @@ extern void __get_user_unknown(void); " " __UA_ADDR " 1b, 3b \n" \ " .previous \n" \ : "=r" (__pu_err) \ - : "0" (__pu_err), "Jr" (__pu_val), "o" (__m(__pu_addr)), \ + : "0" (0), "Jr" (__pu_val), "o" (__m(ptr)), \ "i" (-EFAULT)); \ -}) +} -#define __put_user_asm_ll32(__pu_val) \ -({ \ +#define __put_user_asm_ll32(ptr) \ +{ \ __asm__ __volatile__( \ - "1: sw %2, %3 # __put_user_asm_ll32 \n" \ - "2: sw %D2, %4 \n" \ + "1: sw %2, (%3) # __put_user_asm_ll32 \n" \ + "2: sw %D2, 4(%3) \n" \ "3: \n" \ " .section .fixup,\"ax\" \n" \ - "4: li %0, %5 \n" \ + "4: li %0, %4 \n" \ " j 3b \n" \ " .previous \n" \ " .section __ex_table,\"a\" \n" \ @@ -378,9 +360,9 @@ extern void __get_user_unknown(void); " " __UA_ADDR " 2b, 4b \n" \ " .previous" \ : "=r" (__pu_err) \ - : "0" (__pu_err), "r" (__pu_val), "o" (__m(__pu_addr)), \ - "o" (__m(__pu_addr + 4)), "i" (-EFAULT)); \ -}) + : "0" (0), "r" (__pu_val), "r" (ptr), \ + "i" (-EFAULT)); \ +} extern void __put_user_unknown(void); @@ -403,7 +385,7 @@ extern size_t __copy_user(void *__to, const void *__from, size_t __n); #define __invoke_copy_to_user(to,from,n) \ ({ \ - register void *__cu_to_r __asm__ ("$4"); \ + register void __user *__cu_to_r __asm__ ("$4"); \ register const void *__cu_from_r __asm__ ("$5"); \ register long __cu_len_r __asm__ ("$6"); \ \ @@ -435,7 +417,7 @@ extern size_t __copy_user(void *__to, const void *__from, size_t __n); */ #define __copy_to_user(to,from,n) \ ({ \ - void *__cu_to; \ + void __user *__cu_to; \ const void *__cu_from; \ long __cu_len; \ \ @@ -465,7 +447,7 @@ extern size_t __copy_user(void *__to, const void *__from, size_t __n); */ #define copy_to_user(to,from,n) \ ({ \ - void *__cu_to; \ + void __user *__cu_to; \ const void *__cu_from; \ long __cu_len; \ \ @@ -482,7 +464,7 @@ extern size_t __copy_user(void *__to, const void *__from, size_t __n); #define __invoke_copy_from_user(to,from,n) \ ({ \ register void *__cu_to_r __asm__ ("$4"); \ - register const void *__cu_from_r __asm__ ("$5"); \ + register const void __user *__cu_from_r __asm__ ("$5"); \ register long __cu_len_r __asm__ ("$6"); \ \ __cu_to_r = (to); \ @@ -521,7 +503,7 @@ extern size_t __copy_user(void *__to, const void *__from, size_t __n); #define __copy_from_user(to,from,n) \ ({ \ void *__cu_to; \ - const void *__cu_from; \ + const void __user *__cu_from; \ long __cu_len; \ \ might_sleep(); \ @@ -552,7 +534,7 @@ extern size_t __copy_user(void *__to, const void *__from, size_t __n); #define copy_from_user(to,from,n) \ ({ \ void *__cu_to; \ - const void *__cu_from; \ + const void __user *__cu_from; \ long __cu_len; \ \ might_sleep(); \ @@ -569,8 +551,8 @@ extern size_t __copy_user(void *__to, const void *__from, size_t __n); #define copy_in_user(to,from,n) \ ({ \ - void *__cu_to; \ - const void *__cu_from; \ + void __user *__cu_to; \ + const void __user *__cu_from; \ long __cu_len; \ \ might_sleep(); \ @@ -596,7 +578,7 @@ extern size_t __copy_user(void *__to, const void *__from, size_t __n); * On success, this will be zero. */ static inline __kernel_size_t -__clear_user(void *addr, __kernel_size_t size) +__clear_user(void __user *addr, __kernel_size_t size) { __kernel_size_t res; @@ -616,7 +598,7 @@ __clear_user(void *addr, __kernel_size_t size) #define clear_user(addr,n) \ ({ \ - void * __cl_addr = (addr); \ + void __user * __cl_addr = (addr); \ unsigned long __cl_size = (n); \ if (__cl_size && access_ok(VERIFY_WRITE, \ ((unsigned long)(__cl_addr)), __cl_size)) \ @@ -645,7 +627,7 @@ __clear_user(void *addr, __kernel_size_t size) * and returns @count. */ static inline long -__strncpy_from_user(char *__to, const char *__from, long __len) +__strncpy_from_user(char *__to, const char __user *__from, long __len) { long res; @@ -682,7 +664,7 @@ __strncpy_from_user(char *__to, const char *__from, long __len) * and returns @count. */ static inline long -strncpy_from_user(char *__to, const char *__from, long __len) +strncpy_from_user(char *__to, const char __user *__from, long __len) { long res; @@ -701,7 +683,7 @@ strncpy_from_user(char *__to, const char *__from, long __len) } /* Returns: 0 if bad, string length+1 (memory size) of string if ok */ -static inline long __strlen_user(const char *s) +static inline long __strlen_user(const char __user *s) { long res; @@ -731,7 +713,7 @@ static inline long __strlen_user(const char *s) * If there is a limit on the length of a valid string, you may wish to * consider using strnlen_user() instead. */ -static inline long strlen_user(const char *s) +static inline long strlen_user(const char __user *s) { long res; @@ -748,7 +730,7 @@ static inline long strlen_user(const char *s) } /* Returns: 0 if bad, string length+1 (memory size) of string if ok */ -static inline long __strnlen_user(const char *s, long n) +static inline long __strnlen_user(const char __user *s, long n) { long res; @@ -779,7 +761,7 @@ static inline long __strnlen_user(const char *s, long n) * If there is a limit on the length of a valid string, you may wish to * consider using strnlen_user() instead. */ -static inline long strnlen_user(const char *s, long n) +static inline long strnlen_user(const char __user *s, long n) { long res; diff --git a/include/asm-mips/unistd.h b/include/asm-mips/unistd.h index ad4d48056307..89ea8b60e945 100644 --- a/include/asm-mips/unistd.h +++ b/include/asm-mips/unistd.h @@ -303,16 +303,21 @@ #define __NR_add_key (__NR_Linux + 280) #define __NR_request_key (__NR_Linux + 281) #define __NR_keyctl (__NR_Linux + 282) +#define __NR_set_thread_area (__NR_Linux + 283) +#define __NR_inotify_init (__NR_Linux + 284) +#define __NR_inotify_add_watch (__NR_Linux + 285) +#define __NR_inotify_rm_watch (__NR_Linux + 286) + /* * Offset of the last Linux o32 flavoured syscall */ -#define __NR_Linux_syscalls 282 +#define __NR_Linux_syscalls 286 #endif /* _MIPS_SIM == _MIPS_SIM_ABI32 */ #define __NR_O32_Linux 4000 -#define __NR_O32_Linux_syscalls 282 +#define __NR_O32_Linux_syscalls 283 #if _MIPS_SIM == _MIPS_SIM_ABI64 @@ -562,16 +567,20 @@ #define __NR_add_key (__NR_Linux + 239) #define __NR_request_key (__NR_Linux + 240) #define __NR_keyctl (__NR_Linux + 241) +#define __NR_set_thread_area (__NR_Linux + 242) +#define __NR_inotify_init (__NR_Linux + 243) +#define __NR_inotify_add_watch (__NR_Linux + 244) +#define __NR_inotify_rm_watch (__NR_Linux + 245) /* * Offset of the last Linux 64-bit flavoured syscall */ -#define __NR_Linux_syscalls 241 +#define __NR_Linux_syscalls 245 #endif /* _MIPS_SIM == _MIPS_SIM_ABI64 */ #define __NR_64_Linux 5000 -#define __NR_64_Linux_syscalls 241 +#define __NR_64_Linux_syscalls 242 #if _MIPS_SIM == _MIPS_SIM_NABI32 @@ -825,16 +834,20 @@ #define __NR_add_key (__NR_Linux + 243) #define __NR_request_key (__NR_Linux + 244) #define __NR_keyctl (__NR_Linux + 245) +#define __NR_set_thread_area (__NR_Linux + 246) +#define __NR_inotify_init (__NR_Linux + 247) +#define __NR_inotify_add_watch (__NR_Linux + 248) +#define __NR_inotify_rm_watch (__NR_Linux + 249) /* * Offset of the last N32 flavoured syscall */ -#define __NR_Linux_syscalls 245 +#define __NR_Linux_syscalls 249 #endif /* _MIPS_SIM == _MIPS_SIM_NABI32 */ #define __NR_N32_Linux 6000 -#define __NR_N32_Linux_syscalls 245 +#define __NR_N32_Linux_syscalls 246 #ifndef __ASSEMBLY__ @@ -1164,7 +1177,6 @@ asmlinkage long sys_mmap2( unsigned long fd, unsigned long pgoff); asmlinkage int sys_execve(nabi_no_regargs struct pt_regs regs); asmlinkage int sys_pipe(nabi_no_regargs struct pt_regs regs); -asmlinkage int sys_ptrace(long request, long pid, long addr, long data); struct sigaction; asmlinkage long sys_rt_sigaction(int sig, const struct sigaction __user *act, diff --git a/include/asm-mips/vga.h b/include/asm-mips/vga.h index 6b35cf054c79..ca5cec97e167 100644 --- a/include/asm-mips/vga.h +++ b/include/asm-mips/vga.h @@ -6,6 +6,8 @@ #ifndef _ASM_VGA_H #define _ASM_VGA_H +#include <asm/byteorder.h> + /* * On the PC, we can just recalculate addresses and then * access the videoram directly without any black magic. @@ -16,4 +18,27 @@ #define vga_readb(x) (*(x)) #define vga_writeb(x,y) (*(y) = (x)) +#define VT_BUF_HAVE_RW +/* + * These are only needed for supporting VGA or MDA text mode, which use little + * endian byte ordering. + * In other cases, we can optimize by using native byte ordering and + * <linux/vt_buffer.h> has already done the right job for us. + */ + +static inline void scr_writew(u16 val, volatile u16 *addr) +{ + *addr = cpu_to_le16(val); +} + +static inline u16 scr_readw(volatile const u16 *addr) +{ + return le16_to_cpu(*addr); +} + +#define scr_memcpyw(d, s, c) memcpy(d, s, c) +#define scr_memmovew(d, s, c) memmove(d, s, c) +#define VT_BUF_HAVE_MEMCPYW +#define VT_BUF_HAVE_MEMMOVEW + #endif /* _ASM_VGA_H */ diff --git a/include/asm-mips/war.h b/include/asm-mips/war.h index 04ee53b34c2e..ad374bd3f130 100644 --- a/include/asm-mips/war.h +++ b/include/asm-mips/war.h @@ -177,6 +177,17 @@ #endif /* + * The RM9000 has a bug (though PMC-Sierra opposes it being called that) + * where invalid instructions in the same I-cache line worth of instructions + * being fetched may case spurious exceptions. + */ +#if defined(CONFIG_MOMENCO_JAGUAR_ATX) || defined(CONFIG_MOMENCO_OCELOT_3) || \ + defined(CONFIG_PMC_YOSEMITE) +#define ICACHE_REFILLS_WORKAROUND_WAR 1 +#endif + + +/* * ON the R10000 upto version 2.6 (not sure about 2.7) there is a bug that * may cause ll / sc and lld / scd sequences to execute non-atomically. */ @@ -187,6 +198,9 @@ /* * Workarounds default to off */ +#ifndef ICACHE_REFILLS_WORKAROUND_WAR +#define ICACHE_REFILLS_WORKAROUND_WAR 0 +#endif #ifndef R4600_V1_INDEX_ICACHEOP_WAR #define R4600_V1_INDEX_ICACHEOP_WAR 0 #endif diff --git a/include/asm-parisc/assembly.h b/include/asm-parisc/assembly.h index 30b023411fef..3ce3440d1b0c 100644 --- a/include/asm-parisc/assembly.h +++ b/include/asm-parisc/assembly.h @@ -21,7 +21,9 @@ #ifndef _PARISC_ASSEMBLY_H #define _PARISC_ASSEMBLY_H -#ifdef __LP64__ +#define CALLEE_FLOAT_FRAME_SIZE 80 + +#ifdef CONFIG_64BIT #define LDREG ldd #define STREG std #define LDREGX ldd,s @@ -30,8 +32,8 @@ #define SHRREG shrd #define RP_OFFSET 16 #define FRAME_SIZE 128 -#define CALLEE_SAVE_FRAME_SIZE 144 -#else +#define CALLEE_REG_FRAME_SIZE 144 +#else /* CONFIG_64BIT */ #define LDREG ldw #define STREG stw #define LDREGX ldwx,s @@ -40,9 +42,11 @@ #define SHRREG shr #define RP_OFFSET 20 #define FRAME_SIZE 64 -#define CALLEE_SAVE_FRAME_SIZE 128 +#define CALLEE_REG_FRAME_SIZE 128 #endif +#define CALLEE_SAVE_FRAME_SIZE (CALLEE_REG_FRAME_SIZE + CALLEE_FLOAT_FRAME_SIZE) + #ifdef CONFIG_PA20 #define BL b,l # ifdef CONFIG_64BIT @@ -300,9 +304,35 @@ fldd,mb -8(\regs), %fr0 .endm + .macro callee_save_float + fstd,ma %fr12, 8(%r30) + fstd,ma %fr13, 8(%r30) + fstd,ma %fr14, 8(%r30) + fstd,ma %fr15, 8(%r30) + fstd,ma %fr16, 8(%r30) + fstd,ma %fr17, 8(%r30) + fstd,ma %fr18, 8(%r30) + fstd,ma %fr19, 8(%r30) + fstd,ma %fr20, 8(%r30) + fstd,ma %fr21, 8(%r30) + .endm + + .macro callee_rest_float + fldd,mb -8(%r30), %fr21 + fldd,mb -8(%r30), %fr20 + fldd,mb -8(%r30), %fr19 + fldd,mb -8(%r30), %fr18 + fldd,mb -8(%r30), %fr17 + fldd,mb -8(%r30), %fr16 + fldd,mb -8(%r30), %fr15 + fldd,mb -8(%r30), %fr14 + fldd,mb -8(%r30), %fr13 + fldd,mb -8(%r30), %fr12 + .endm + #ifdef __LP64__ .macro callee_save - std,ma %r3, CALLEE_SAVE_FRAME_SIZE(%r30) + std,ma %r3, CALLEE_REG_FRAME_SIZE(%r30) mfctl %cr27, %r3 std %r4, -136(%r30) std %r5, -128(%r30) @@ -340,13 +370,13 @@ ldd -128(%r30), %r5 ldd -136(%r30), %r4 mtctl %r3, %cr27 - ldd,mb -CALLEE_SAVE_FRAME_SIZE(%r30), %r3 + ldd,mb -CALLEE_REG_FRAME_SIZE(%r30), %r3 .endm #else /* ! __LP64__ */ .macro callee_save - stw,ma %r3, CALLEE_SAVE_FRAME_SIZE(%r30) + stw,ma %r3, CALLEE_REG_FRAME_SIZE(%r30) mfctl %cr27, %r3 stw %r4, -124(%r30) stw %r5, -120(%r30) @@ -384,7 +414,7 @@ ldw -120(%r30), %r5 ldw -124(%r30), %r4 mtctl %r3, %cr27 - ldw,mb -CALLEE_SAVE_FRAME_SIZE(%r30), %r3 + ldw,mb -CALLEE_REG_FRAME_SIZE(%r30), %r3 .endm #endif /* ! __LP64__ */ @@ -450,5 +480,30 @@ REST_CR (%cr22, PT_PSW (\regs)) .endm + + /* First step to create a "relied upon translation" + * See PA 2.0 Arch. page F-4 and F-5. + * + * The ssm was originally necessary due to a "PCxT bug". + * But someone decided it needed to be added to the architecture + * and this "feature" went into rev3 of PA-RISC 1.1 Arch Manual. + * It's been carried forward into PA 2.0 Arch as well. :^( + * + * "ssm 0,%r0" is a NOP with side effects (prefetch barrier). + * rsm/ssm prevents the ifetch unit from speculatively fetching + * instructions past this line in the code stream. + * PA 2.0 processor will single step all insn in the same QUAD (4 insn). + */ + .macro pcxt_ssm_bug + rsm PSW_SM_I,%r0 + nop /* 1 */ + nop /* 2 */ + nop /* 3 */ + nop /* 4 */ + nop /* 5 */ + nop /* 6 */ + nop /* 7 */ + .endm + #endif /* __ASSEMBLY__ */ #endif diff --git a/include/asm-parisc/atomic.h b/include/asm-parisc/atomic.h index 048a2c7fd0c0..983e9a2b6042 100644 --- a/include/asm-parisc/atomic.h +++ b/include/asm-parisc/atomic.h @@ -164,6 +164,26 @@ static __inline__ int atomic_read(const atomic_t *v) } /* exported interface */ +#define atomic_cmpxchg(v, o, n) ((int)cmpxchg(&((v)->counter), (o), (n))) + +/** + * atomic_add_unless - add unless the number is a given value + * @v: pointer of type atomic_t + * @a: the amount to add to v... + * @u: ...unless v is equal to u. + * + * Atomically adds @a to @v, so long as it was not @u. + * Returns non-zero if @v was not @u, and zero otherwise. + */ +#define atomic_add_unless(v, a, u) \ +({ \ + int c, old; \ + c = atomic_read(v); \ + while (c != (u) && (old = atomic_cmpxchg((v), c, c + (a))) != c) \ + c = old; \ + c != (u); \ +}) +#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0) #define atomic_add(i,v) ((void)(__atomic_add_return( ((int)i),(v)))) #define atomic_sub(i,v) ((void)(__atomic_add_return(-((int)i),(v)))) diff --git a/include/asm-parisc/bitops.h b/include/asm-parisc/bitops.h index af7db694b22d..55b98c67fd82 100644 --- a/include/asm-parisc/bitops.h +++ b/include/asm-parisc/bitops.h @@ -2,7 +2,7 @@ #define _PARISC_BITOPS_H #include <linux/compiler.h> -#include <asm/spinlock.h> +#include <asm/types.h> /* for BITS_PER_LONG/SHIFT_PER_LONG */ #include <asm/byteorder.h> #include <asm/atomic.h> @@ -12,193 +12,157 @@ * to include/asm-i386/bitops.h or kerneldoc */ -#ifdef __LP64__ -# define SHIFT_PER_LONG 6 -#ifndef BITS_PER_LONG -# define BITS_PER_LONG 64 -#endif -#else -# define SHIFT_PER_LONG 5 -#ifndef BITS_PER_LONG -# define BITS_PER_LONG 32 -#endif -#endif - -#define CHOP_SHIFTCOUNT(x) ((x) & (BITS_PER_LONG - 1)) +#define CHOP_SHIFTCOUNT(x) (((unsigned long) (x)) & (BITS_PER_LONG - 1)) #define smp_mb__before_clear_bit() smp_mb() #define smp_mb__after_clear_bit() smp_mb() -static __inline__ void set_bit(int nr, volatile unsigned long * address) +/* See http://marc.theaimsgroup.com/?t=108826637900003 for discussion + * on use of volatile and __*_bit() (set/clear/change): + * *_bit() want use of volatile. + * __*_bit() are "relaxed" and don't use spinlock or volatile. + */ + +static __inline__ void set_bit(int nr, volatile unsigned long * addr) { - unsigned long mask; - unsigned long *addr = (unsigned long *) address; + unsigned long mask = 1UL << CHOP_SHIFTCOUNT(nr); unsigned long flags; addr += (nr >> SHIFT_PER_LONG); - mask = 1L << CHOP_SHIFTCOUNT(nr); _atomic_spin_lock_irqsave(addr, flags); *addr |= mask; _atomic_spin_unlock_irqrestore(addr, flags); } -static __inline__ void __set_bit(int nr, volatile unsigned long * address) +static __inline__ void __set_bit(unsigned long nr, volatile unsigned long * addr) { - unsigned long mask; - unsigned long *addr = (unsigned long *) address; + unsigned long *m = (unsigned long *) addr + (nr >> SHIFT_PER_LONG); - addr += (nr >> SHIFT_PER_LONG); - mask = 1L << CHOP_SHIFTCOUNT(nr); - *addr |= mask; + *m |= 1UL << CHOP_SHIFTCOUNT(nr); } -static __inline__ void clear_bit(int nr, volatile unsigned long * address) +static __inline__ void clear_bit(int nr, volatile unsigned long * addr) { - unsigned long mask; - unsigned long *addr = (unsigned long *) address; + unsigned long mask = ~(1UL << CHOP_SHIFTCOUNT(nr)); unsigned long flags; addr += (nr >> SHIFT_PER_LONG); - mask = 1L << CHOP_SHIFTCOUNT(nr); _atomic_spin_lock_irqsave(addr, flags); - *addr &= ~mask; + *addr &= mask; _atomic_spin_unlock_irqrestore(addr, flags); } -static __inline__ void __clear_bit(unsigned long nr, volatile unsigned long * address) +static __inline__ void __clear_bit(unsigned long nr, volatile unsigned long * addr) { - unsigned long mask; - unsigned long *addr = (unsigned long *) address; + unsigned long *m = (unsigned long *) addr + (nr >> SHIFT_PER_LONG); - addr += (nr >> SHIFT_PER_LONG); - mask = 1L << CHOP_SHIFTCOUNT(nr); - *addr &= ~mask; + *m &= ~(1UL << CHOP_SHIFTCOUNT(nr)); } -static __inline__ void change_bit(int nr, volatile unsigned long * address) +static __inline__ void change_bit(int nr, volatile unsigned long * addr) { - unsigned long mask; - unsigned long *addr = (unsigned long *) address; + unsigned long mask = 1UL << CHOP_SHIFTCOUNT(nr); unsigned long flags; addr += (nr >> SHIFT_PER_LONG); - mask = 1L << CHOP_SHIFTCOUNT(nr); _atomic_spin_lock_irqsave(addr, flags); *addr ^= mask; _atomic_spin_unlock_irqrestore(addr, flags); } -static __inline__ void __change_bit(int nr, volatile unsigned long * address) +static __inline__ void __change_bit(unsigned long nr, volatile unsigned long * addr) { - unsigned long mask; - unsigned long *addr = (unsigned long *) address; + unsigned long *m = (unsigned long *) addr + (nr >> SHIFT_PER_LONG); - addr += (nr >> SHIFT_PER_LONG); - mask = 1L << CHOP_SHIFTCOUNT(nr); - *addr ^= mask; + *m ^= 1UL << CHOP_SHIFTCOUNT(nr); } -static __inline__ int test_and_set_bit(int nr, volatile unsigned long * address) +static __inline__ int test_and_set_bit(int nr, volatile unsigned long * addr) { - unsigned long mask; - unsigned long *addr = (unsigned long *) address; - int oldbit; + unsigned long mask = 1UL << CHOP_SHIFTCOUNT(nr); + unsigned long oldbit; unsigned long flags; addr += (nr >> SHIFT_PER_LONG); - mask = 1L << CHOP_SHIFTCOUNT(nr); _atomic_spin_lock_irqsave(addr, flags); - oldbit = (*addr & mask) ? 1 : 0; - *addr |= mask; + oldbit = *addr; + *addr = oldbit | mask; _atomic_spin_unlock_irqrestore(addr, flags); - return oldbit; + return (oldbit & mask) ? 1 : 0; } static __inline__ int __test_and_set_bit(int nr, volatile unsigned long * address) { - unsigned long mask; - unsigned long *addr = (unsigned long *) address; - int oldbit; + unsigned long mask = 1UL << CHOP_SHIFTCOUNT(nr); + unsigned long oldbit; + unsigned long *addr = (unsigned long *)address + (nr >> SHIFT_PER_LONG); - addr += (nr >> SHIFT_PER_LONG); - mask = 1L << CHOP_SHIFTCOUNT(nr); - oldbit = (*addr & mask) ? 1 : 0; - *addr |= mask; + oldbit = *addr; + *addr = oldbit | mask; - return oldbit; + return (oldbit & mask) ? 1 : 0; } -static __inline__ int test_and_clear_bit(int nr, volatile unsigned long * address) +static __inline__ int test_and_clear_bit(int nr, volatile unsigned long * addr) { - unsigned long mask; - unsigned long *addr = (unsigned long *) address; - int oldbit; + unsigned long mask = 1UL << CHOP_SHIFTCOUNT(nr); + unsigned long oldbit; unsigned long flags; addr += (nr >> SHIFT_PER_LONG); - mask = 1L << CHOP_SHIFTCOUNT(nr); _atomic_spin_lock_irqsave(addr, flags); - oldbit = (*addr & mask) ? 1 : 0; - *addr &= ~mask; + oldbit = *addr; + *addr = oldbit & ~mask; _atomic_spin_unlock_irqrestore(addr, flags); - return oldbit; + return (oldbit & mask) ? 1 : 0; } static __inline__ int __test_and_clear_bit(int nr, volatile unsigned long * address) { - unsigned long mask; - unsigned long *addr = (unsigned long *) address; - int oldbit; + unsigned long mask = 1UL << CHOP_SHIFTCOUNT(nr); + unsigned long *addr = (unsigned long *)address + (nr >> SHIFT_PER_LONG); + unsigned long oldbit; - addr += (nr >> SHIFT_PER_LONG); - mask = 1L << CHOP_SHIFTCOUNT(nr); - oldbit = (*addr & mask) ? 1 : 0; - *addr &= ~mask; + oldbit = *addr; + *addr = oldbit & ~mask; - return oldbit; + return (oldbit & mask) ? 1 : 0; } -static __inline__ int test_and_change_bit(int nr, volatile unsigned long * address) +static __inline__ int test_and_change_bit(int nr, volatile unsigned long * addr) { - unsigned long mask; - unsigned long *addr = (unsigned long *) address; - int oldbit; + unsigned long mask = 1UL << CHOP_SHIFTCOUNT(nr); + unsigned long oldbit; unsigned long flags; addr += (nr >> SHIFT_PER_LONG); - mask = 1L << CHOP_SHIFTCOUNT(nr); _atomic_spin_lock_irqsave(addr, flags); - oldbit = (*addr & mask) ? 1 : 0; - *addr ^= mask; + oldbit = *addr; + *addr = oldbit ^ mask; _atomic_spin_unlock_irqrestore(addr, flags); - return oldbit; + return (oldbit & mask) ? 1 : 0; } static __inline__ int __test_and_change_bit(int nr, volatile unsigned long * address) { - unsigned long mask; - unsigned long *addr = (unsigned long *) address; - int oldbit; + unsigned long mask = 1UL << CHOP_SHIFTCOUNT(nr); + unsigned long *addr = (unsigned long *)address + (nr >> SHIFT_PER_LONG); + unsigned long oldbit; - addr += (nr >> SHIFT_PER_LONG); - mask = 1L << CHOP_SHIFTCOUNT(nr); - oldbit = (*addr & mask) ? 1 : 0; - *addr ^= mask; + oldbit = *addr; + *addr = oldbit ^ mask; - return oldbit; + return (oldbit & mask) ? 1 : 0; } static __inline__ int test_bit(int nr, const volatile unsigned long *address) { - unsigned long mask; - const unsigned long *addr = (const unsigned long *)address; - - addr += (nr >> SHIFT_PER_LONG); - mask = 1L << CHOP_SHIFTCOUNT(nr); + unsigned long mask = 1UL << CHOP_SHIFTCOUNT(nr); + const unsigned long *addr = (const unsigned long *)address + (nr >> SHIFT_PER_LONG); return !!(*addr & mask); } @@ -229,7 +193,7 @@ static __inline__ unsigned long __ffs(unsigned long x) unsigned long ret; __asm__( -#if BITS_PER_LONG > 32 +#ifdef __LP64__ " ldi 63,%1\n" " extrd,u,*<> %0,63,32,%%r0\n" " extrd,u,*TR %0,31,32,%0\n" /* move top 32-bits down */ @@ -304,14 +268,7 @@ static __inline__ int fls(int x) * hweightN: returns the hamming weight (i.e. the number * of bits set) of a N-bit word */ -#define hweight64(x) \ -({ \ - unsigned long __x = (x); \ - unsigned int __w; \ - __w = generic_hweight32((unsigned int) __x); \ - __w += generic_hweight32((unsigned int) (__x>>32)); \ - __w; \ -}) +#define hweight64(x) generic_hweight64(x) #define hweight32(x) generic_hweight32(x) #define hweight16(x) generic_hweight16(x) #define hweight8(x) generic_hweight8(x) @@ -324,7 +281,13 @@ static __inline__ int fls(int x) */ static inline int sched_find_first_bit(const unsigned long *b) { -#ifndef __LP64__ +#ifdef __LP64__ + if (unlikely(b[0])) + return __ffs(b[0]); + if (unlikely(b[1])) + return __ffs(b[1]) + 64; + return __ffs(b[2]) + 128; +#else if (unlikely(b[0])) return __ffs(b[0]); if (unlikely(b[1])) @@ -334,14 +297,6 @@ static inline int sched_find_first_bit(const unsigned long *b) if (b[3]) return __ffs(b[3]) + 96; return __ffs(b[4]) + 128; -#else - if (unlikely(b[0])) - return __ffs(b[0]); - if (unlikely(((unsigned int)b[1]))) - return __ffs(b[1]) + 64; - if (b[1] >> 32) - return __ffs(b[1] >> 32) + 96; - return __ffs(b[2]) + 128; #endif } @@ -391,7 +346,7 @@ found_middle: static __inline__ unsigned long find_next_bit(const unsigned long *addr, unsigned long size, unsigned long offset) { - const unsigned long *p = addr + (offset >> 6); + const unsigned long *p = addr + (offset >> SHIFT_PER_LONG); unsigned long result = offset & ~(BITS_PER_LONG-1); unsigned long tmp; @@ -445,71 +400,90 @@ found_middle: * test_and_{set,clear}_bit guarantee atomicity without * disabling interrupts. */ -#ifdef __LP64__ -#define ext2_set_bit(nr, addr) __test_and_set_bit((nr) ^ 0x38, (unsigned long *)addr) -#define ext2_set_bit_atomic(l,nr,addr) test_and_set_bit((nr) ^ 0x38, (unsigned long *)addr) -#define ext2_clear_bit(nr, addr) __test_and_clear_bit((nr) ^ 0x38, (unsigned long *)addr) -#define ext2_clear_bit_atomic(l,nr,addr) test_and_clear_bit((nr) ^ 0x38, (unsigned long *)addr) -#else -#define ext2_set_bit(nr, addr) __test_and_set_bit((nr) ^ 0x18, (unsigned long *)addr) -#define ext2_set_bit_atomic(l,nr,addr) test_and_set_bit((nr) ^ 0x18, (unsigned long *)addr) -#define ext2_clear_bit(nr, addr) __test_and_clear_bit((nr) ^ 0x18, (unsigned long *)addr) -#define ext2_clear_bit_atomic(l,nr,addr) test_and_clear_bit((nr) ^ 0x18, (unsigned long *)addr) -#endif -#endif /* __KERNEL__ */ +/* '3' is bits per byte */ +#define LE_BYTE_ADDR ((sizeof(unsigned long) - 1) << 3) -static __inline__ int ext2_test_bit(int nr, __const__ void * addr) -{ - __const__ unsigned char *ADDR = (__const__ unsigned char *) addr; +#define ext2_test_bit(nr, addr) \ + test_bit((nr) ^ LE_BYTE_ADDR, (unsigned long *)addr) +#define ext2_set_bit(nr, addr) \ + __test_and_set_bit((nr) ^ LE_BYTE_ADDR, (unsigned long *)addr) +#define ext2_clear_bit(nr, addr) \ + __test_and_clear_bit((nr) ^ LE_BYTE_ADDR, (unsigned long *)addr) - return (ADDR[nr >> 3] >> (nr & 7)) & 1; -} +#define ext2_set_bit_atomic(l,nr,addr) \ + test_and_set_bit((nr) ^ LE_BYTE_ADDR, (unsigned long *)addr) +#define ext2_clear_bit_atomic(l,nr,addr) \ + test_and_clear_bit( (nr) ^ LE_BYTE_ADDR, (unsigned long *)addr) + +#endif /* __KERNEL__ */ -/* - * This implementation of ext2_find_{first,next}_zero_bit was stolen from - * Linus' asm-alpha/bitops.h and modified for a big-endian machine. - */ #define ext2_find_first_zero_bit(addr, size) \ - ext2_find_next_zero_bit((addr), (size), 0) + ext2_find_next_zero_bit((addr), (size), 0) -extern __inline__ unsigned long ext2_find_next_zero_bit(void *addr, - unsigned long size, unsigned long offset) +/* include/linux/byteorder does not support "unsigned long" type */ +static inline unsigned long ext2_swabp(unsigned long * x) { - unsigned int *p = ((unsigned int *) addr) + (offset >> 5); - unsigned int result = offset & ~31UL; - unsigned int tmp; +#ifdef __LP64__ + return (unsigned long) __swab64p((u64 *) x); +#else + return (unsigned long) __swab32p((u32 *) x); +#endif +} + +/* include/linux/byteorder doesn't support "unsigned long" type */ +static inline unsigned long ext2_swab(unsigned long y) +{ +#ifdef __LP64__ + return (unsigned long) __swab64((u64) y); +#else + return (unsigned long) __swab32((u32) y); +#endif +} + +static __inline__ unsigned long ext2_find_next_zero_bit(void *addr, unsigned long size, unsigned long offset) +{ + unsigned long *p = (unsigned long *) addr + (offset >> SHIFT_PER_LONG); + unsigned long result = offset & ~(BITS_PER_LONG - 1); + unsigned long tmp; if (offset >= size) return size; size -= result; - offset &= 31UL; + offset &= (BITS_PER_LONG - 1UL); if (offset) { - tmp = cpu_to_le32p(p++); - tmp |= ~0UL >> (32-offset); - if (size < 32) + tmp = ext2_swabp(p++); + tmp |= (~0UL >> (BITS_PER_LONG - offset)); + if (size < BITS_PER_LONG) goto found_first; - if (tmp != ~0U) + if (~tmp) goto found_middle; - size -= 32; - result += 32; + size -= BITS_PER_LONG; + result += BITS_PER_LONG; } - while (size >= 32) { - if ((tmp = cpu_to_le32p(p++)) != ~0U) - goto found_middle; - result += 32; - size -= 32; + + while (size & ~(BITS_PER_LONG - 1)) { + if (~(tmp = *(p++))) + goto found_middle_swap; + result += BITS_PER_LONG; + size -= BITS_PER_LONG; } if (!size) return result; - tmp = cpu_to_le32p(p); + tmp = ext2_swabp(p); found_first: - tmp |= ~0U << size; + tmp |= ~0UL << size; + if (tmp == ~0UL) /* Are any bits zero? */ + return result + size; /* Nope. Skip ffz */ found_middle: return result + ffz(tmp); + +found_middle_swap: + return result + ffz(ext2_swab(tmp)); } + /* Bitmap functions for the minix filesystem. */ #define minix_test_and_set_bit(nr,addr) ext2_set_bit(nr,addr) #define minix_set_bit(nr,addr) ((void)ext2_set_bit(nr,addr)) diff --git a/include/asm-parisc/cacheflush.h b/include/asm-parisc/cacheflush.h index aa592d8c0e39..1bc3c83ee74b 100644 --- a/include/asm-parisc/cacheflush.h +++ b/include/asm-parisc/cacheflush.h @@ -100,30 +100,34 @@ static inline void flush_cache_range(struct vm_area_struct *vma, /* Simple function to work out if we have an existing address translation * for a user space vma. */ -static inline pte_t *__translation_exists(struct mm_struct *mm, - unsigned long addr) +static inline int translation_exists(struct vm_area_struct *vma, + unsigned long addr, unsigned long pfn) { - pgd_t *pgd = pgd_offset(mm, addr); + pgd_t *pgd = pgd_offset(vma->vm_mm, addr); pmd_t *pmd; - pte_t *pte; + pte_t pte; if(pgd_none(*pgd)) - return NULL; + return 0; pmd = pmd_offset(pgd, addr); if(pmd_none(*pmd) || pmd_bad(*pmd)) - return NULL; + return 0; - pte = pte_offset_map(pmd, addr); + /* We cannot take the pte lock here: flush_cache_page is usually + * called with pte lock already held. Whereas flush_dcache_page + * takes flush_dcache_mmap_lock, which is lower in the hierarchy: + * the vma itself is secure, but the pte might come or go racily. + */ + pte = *pte_offset_map(pmd, addr); + /* But pte_unmap() does nothing on this architecture */ - /* The PA flush mappings show up as pte_none, but they're - * valid none the less */ - if(pte_none(*pte) && ((pte_val(*pte) & _PAGE_FLUSH) == 0)) - return NULL; - return pte; -} -#define translation_exists(vma, addr) __translation_exists((vma)->vm_mm, addr) + /* Filter out coincidental file entries and swap entries */ + if (!(pte_val(pte) & (_PAGE_FLUSH|_PAGE_PRESENT))) + return 0; + return pte_pfn(pte) == pfn; +} /* Private function to flush a page from the cache of a non-current * process. cr25 contains the Page Directory of the current user @@ -175,9 +179,8 @@ flush_cache_page(struct vm_area_struct *vma, unsigned long vmaddr, unsigned long { BUG_ON(!vma->vm_mm->context); - if(likely(translation_exists(vma, vmaddr))) + if (likely(translation_exists(vma, vmaddr, pfn))) __flush_cache_page(vma, vmaddr); } #endif - diff --git a/include/asm-parisc/dma-mapping.h b/include/asm-parisc/dma-mapping.h index 4db84f969e9e..74d4ac6f2151 100644 --- a/include/asm-parisc/dma-mapping.h +++ b/include/asm-parisc/dma-mapping.h @@ -9,8 +9,8 @@ /* See Documentation/DMA-mapping.txt */ struct hppa_dma_ops { int (*dma_supported)(struct device *dev, u64 mask); - void *(*alloc_consistent)(struct device *dev, size_t size, dma_addr_t *iova, int flag); - void *(*alloc_noncoherent)(struct device *dev, size_t size, dma_addr_t *iova, int flag); + void *(*alloc_consistent)(struct device *dev, size_t size, dma_addr_t *iova, gfp_t flag); + void *(*alloc_noncoherent)(struct device *dev, size_t size, dma_addr_t *iova, gfp_t flag); void (*free_consistent)(struct device *dev, size_t size, void *vaddr, dma_addr_t iova); dma_addr_t (*map_single)(struct device *dev, void *addr, size_t size, enum dma_data_direction direction); void (*unmap_single)(struct device *dev, dma_addr_t iova, size_t size, enum dma_data_direction direction); @@ -49,14 +49,14 @@ extern struct hppa_dma_ops *hppa_dma_ops; static inline void * dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *dma_handle, - int flag) + gfp_t flag) { return hppa_dma_ops->alloc_consistent(dev, size, dma_handle, flag); } static inline void * dma_alloc_noncoherent(struct device *dev, size_t size, dma_addr_t *dma_handle, - int flag) + gfp_t flag) { return hppa_dma_ops->alloc_noncoherent(dev, size, dma_handle, flag); } diff --git a/include/asm-parisc/errno.h b/include/asm-parisc/errno.h index 08464c405471..e2f3ddc796be 100644 --- a/include/asm-parisc/errno.h +++ b/include/asm-parisc/errno.h @@ -114,6 +114,7 @@ #define ENOTSUP 252 /* Function not implemented (POSIX.4 / HPUX) */ #define ECANCELLED 253 /* aio request was canceled before complete (POSIX.4 / HPUX) */ +#define ECANCELED ECANCELLED /* SuSv3 and Solaris wants one 'L' */ /* for robust mutexes */ #define EOWNERDEAD 254 /* Owner died */ diff --git a/include/asm-parisc/grfioctl.h b/include/asm-parisc/grfioctl.h index d3cfc0168fb1..6a910311b56b 100644 --- a/include/asm-parisc/grfioctl.h +++ b/include/asm-parisc/grfioctl.h @@ -69,6 +69,8 @@ #define CRT_ID_TVRX S9000_ID_98765 /* TVRX (gto/falcon) */ #define CRT_ID_ARTIST S9000_ID_ARTIST /* Artist */ #define CRT_ID_SUMMIT 0x2FC1066B /* Summit FX2, FX4, FX6 ... */ +#define CRT_ID_LEGO 0x35ACDA30 /* Lego FX5, FX10 ... */ +#define CRT_ID_PINNACLE 0x35ACDA16 /* Pinnacle FXe */ /* structure for ioctl(GCDESCRIBE) */ diff --git a/include/asm-parisc/ide.h b/include/asm-parisc/ide.h index 3243cf2cd227..b27bf7aeb256 100644 --- a/include/asm-parisc/ide.h +++ b/include/asm-parisc/ide.h @@ -22,7 +22,6 @@ #define ide_request_irq(irq,hand,flg,dev,id) request_irq((irq),(hand),(flg),(dev),(id)) #define ide_free_irq(irq,dev_id) free_irq((irq), (dev_id)) -#define ide_check_region(from,extent) check_region((from), (extent)) #define ide_request_region(from,extent,name) request_region((from), (extent), (name)) #define ide_release_region(from,extent) release_region((from), (extent)) /* Generic I/O and MEMIO string operations. */ diff --git a/include/asm-parisc/irq.h b/include/asm-parisc/irq.h index f876bdf22056..b0a30e2c9813 100644 --- a/include/asm-parisc/irq.h +++ b/include/asm-parisc/irq.h @@ -8,6 +8,7 @@ #define _ASM_PARISC_IRQ_H #include <linux/config.h> +#include <linux/cpumask.h> #include <asm/types.h> #define NO_IRQ (-1) @@ -49,10 +50,10 @@ extern int txn_alloc_irq(unsigned int nbits); extern int txn_claim_irq(int); extern unsigned int txn_alloc_data(unsigned int); extern unsigned long txn_alloc_addr(unsigned int); +extern unsigned long txn_affinity_addr(unsigned int irq, int cpu); extern int cpu_claim_irq(unsigned int irq, struct hw_interrupt_type *, void *); - -extern int cpu_claim_irq(unsigned int irq, struct hw_interrupt_type *, void *); +extern int cpu_check_affinity(unsigned int irq, cpumask_t *dest); /* soft power switch support (power.c) */ extern struct tasklet_struct power_tasklet; diff --git a/include/asm-parisc/led.h b/include/asm-parisc/led.h index 1ac8ab6c580d..efadfd543ec6 100644 --- a/include/asm-parisc/led.h +++ b/include/asm-parisc/led.h @@ -23,9 +23,6 @@ #define LED_CMD_REG_NONE 0 /* NULL == no addr for the cmd register */ -/* led tasklet struct */ -extern struct tasklet_struct led_tasklet; - /* register_led_driver() */ int __init register_led_driver(int model, unsigned long cmd_reg, unsigned long data_reg); diff --git a/include/asm-parisc/mmzone.h b/include/asm-parisc/mmzone.h index 595d3dce120a..ae039f4fd711 100644 --- a/include/asm-parisc/mmzone.h +++ b/include/asm-parisc/mmzone.h @@ -27,12 +27,6 @@ extern struct node_map_data node_data[]; }) #define node_localnr(pfn, nid) ((pfn) - node_start_pfn(nid)) -#define local_mapnr(kvaddr) \ -({ \ - unsigned long __pfn = __pa(kvaddr) >> PAGE_SHIFT; \ - (__pfn - node_start_pfn(pfn_to_nid(__pfn))); \ -}) - #define pfn_to_page(pfn) \ ({ \ unsigned long __pfn = (pfn); \ diff --git a/include/asm-parisc/parisc-device.h b/include/asm-parisc/parisc-device.h index ef69ab4b17a9..1d247e32a608 100644 --- a/include/asm-parisc/parisc-device.h +++ b/include/asm-parisc/parisc-device.h @@ -1,7 +1,7 @@ #include <linux/device.h> struct parisc_device { - unsigned long hpa; /* Hard Physical Address */ + struct resource hpa; /* Hard Physical Address */ struct parisc_device_id id; struct parisc_driver *driver; /* Driver for this device */ char name[80]; /* The hardware description */ @@ -39,6 +39,11 @@ struct parisc_driver { #define to_parisc_driver(d) container_of(d, struct parisc_driver, drv) #define parisc_parent(d) to_parisc_device(d->dev.parent) +static inline char *parisc_pathname(struct parisc_device *d) +{ + return d->dev.bus_id; +} + static inline void parisc_set_drvdata(struct parisc_device *d, void *p) { diff --git a/include/asm-parisc/pci.h b/include/asm-parisc/pci.h index d0b761f690b5..fa39d07d49e9 100644 --- a/include/asm-parisc/pci.h +++ b/include/asm-parisc/pci.h @@ -69,7 +69,7 @@ struct pci_hba_data { #define PCI_PORT_HBA(a) ((a) >> HBA_PORT_SPACE_BITS) #define PCI_PORT_ADDR(a) ((a) & (HBA_PORT_SPACE_SIZE - 1)) -#if CONFIG_64BIT +#ifdef CONFIG_64BIT #define PCI_F_EXTEND 0xffffffff00000000UL #define PCI_IS_LMMIO(hba,a) pci_is_lmmio(hba,a) diff --git a/include/asm-parisc/pgtable.h b/include/asm-parisc/pgtable.h index 820c6e712cd7..b4554711c3e7 100644 --- a/include/asm-parisc/pgtable.h +++ b/include/asm-parisc/pgtable.h @@ -12,6 +12,7 @@ */ #include <linux/spinlock.h> +#include <linux/mm.h> /* for vm_area_struct */ #include <asm/processor.h> #include <asm/cache.h> #include <asm/bitops.h> @@ -418,7 +419,6 @@ extern void paging_init (void); #define PG_dcache_dirty PG_arch_1 -struct vm_area_struct; /* forward declaration (include/linux/mm.h) */ extern void update_mmu_cache(struct vm_area_struct *, unsigned long, pte_t); /* Encode and de-code a swap entry */ @@ -464,6 +464,7 @@ static inline int ptep_test_and_clear_dirty(struct vm_area_struct *vma, unsigned extern spinlock_t pa_dbit_lock; +struct mm_struct; static inline pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep) { pte_t old_pte; @@ -501,6 +502,8 @@ static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long addr, #define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \ remap_pfn_range(vma, vaddr, pfn, size, prot) +#define pgprot_noncached(prot) __pgprot(pgprot_val(prot) | _PAGE_NO_CACHE) + #define MK_IOSPACE_PFN(space, pfn) (pfn) #define GET_IOSPACE(pfn) 0 #define GET_PFN(pfn) (pfn) diff --git a/include/asm-parisc/processor.h b/include/asm-parisc/processor.h index a9dfadd05658..aae40e8c3aa8 100644 --- a/include/asm-parisc/processor.h +++ b/include/asm-parisc/processor.h @@ -122,8 +122,27 @@ struct thread_struct { }; /* Thread struct flags. */ +#define PARISC_UAC_NOPRINT (1UL << 0) /* see prctl and unaligned.c */ +#define PARISC_UAC_SIGBUS (1UL << 1) #define PARISC_KERNEL_DEATH (1UL << 31) /* see die_if_kernel()... */ +#define PARISC_UAC_SHIFT 0 +#define PARISC_UAC_MASK (PARISC_UAC_NOPRINT|PARISC_UAC_SIGBUS) + +#define SET_UNALIGN_CTL(task,value) \ + ({ \ + (task)->thread.flags = (((task)->thread.flags & ~PARISC_UAC_MASK) \ + | (((value) << PARISC_UAC_SHIFT) & \ + PARISC_UAC_MASK)); \ + 0; \ + }) + +#define GET_UNALIGN_CTL(task,addr) \ + ({ \ + put_user(((task)->thread.flags & PARISC_UAC_MASK) \ + >> PARISC_UAC_SHIFT, (int __user *) (addr)); \ + }) + #define INIT_THREAD { \ regs: { gr: { 0, }, \ fr: { 0, }, \ diff --git a/include/asm-parisc/psw.h b/include/asm-parisc/psw.h index 51323029f377..4334d6ca2add 100644 --- a/include/asm-parisc/psw.h +++ b/include/asm-parisc/psw.h @@ -1,4 +1,7 @@ #ifndef _PARISC_PSW_H + +#include <linux/config.h> + #define PSW_I 0x00000001 #define PSW_D 0x00000002 #define PSW_P 0x00000004 @@ -9,6 +12,16 @@ #define PSW_G 0x00000040 /* PA1.x only */ #define PSW_O 0x00000080 /* PA2.0 only */ +/* ssm/rsm instructions number PSW_W and PSW_E differently */ +#define PSW_SM_I PSW_I /* Enable External Interrupts */ +#define PSW_SM_D PSW_D +#define PSW_SM_P PSW_P +#define PSW_SM_Q PSW_Q /* Enable Interrupt State Collection */ +#define PSW_SM_R PSW_R /* Enable Recover Counter Trap */ +#define PSW_SM_W 0x200 /* PA2.0 only : Enable Wide Mode */ + +#define PSW_SM_QUIET PSW_SM_R+PSW_SM_Q+PSW_SM_P+PSW_SM_D+PSW_SM_I + #define PSW_CB 0x0000ff00 #define PSW_M 0x00010000 @@ -30,33 +43,21 @@ #define PSW_Z 0x40000000 /* PA1.x only */ #define PSW_Y 0x80000000 /* PA1.x only */ -#ifdef __LP64__ -#define PSW_HI_CB 0x000000ff /* PA2.0 only */ +#ifdef CONFIG_64BIT +# define PSW_HI_CB 0x000000ff /* PA2.0 only */ #endif -/* PSW bits to be used with ssm/rsm */ -#define PSW_SM_I 0x1 -#define PSW_SM_D 0x2 -#define PSW_SM_P 0x4 -#define PSW_SM_Q 0x8 -#define PSW_SM_R 0x10 -#define PSW_SM_F 0x20 -#define PSW_SM_G 0x40 -#define PSW_SM_O 0x80 -#define PSW_SM_E 0x100 -#define PSW_SM_W 0x200 - -#ifdef __LP64__ -# define USER_PSW (PSW_C | PSW_Q | PSW_P | PSW_D | PSW_I) -# define KERNEL_PSW (PSW_W | PSW_C | PSW_Q | PSW_P | PSW_D) -# define REAL_MODE_PSW (PSW_W | PSW_Q) -# define USER_PSW_MASK (PSW_W | PSW_T | PSW_N | PSW_X | PSW_B | PSW_V | PSW_CB) -# define USER_PSW_HI_MASK (PSW_HI_CB) -#else -# define USER_PSW (PSW_C | PSW_Q | PSW_P | PSW_D | PSW_I) -# define KERNEL_PSW (PSW_C | PSW_Q | PSW_P | PSW_D) -# define REAL_MODE_PSW (PSW_Q) -# define USER_PSW_MASK (PSW_T | PSW_N | PSW_X | PSW_B | PSW_V | PSW_CB) +#ifdef CONFIG_64BIT +# define USER_PSW_HI_MASK PSW_HI_CB +# define WIDE_PSW PSW_W +#else +# define WIDE_PSW 0 #endif +/* Used when setting up for rfi */ +#define KERNEL_PSW (WIDE_PSW | PSW_C | PSW_Q | PSW_P | PSW_D) +#define REAL_MODE_PSW (WIDE_PSW | PSW_Q) +#define USER_PSW_MASK (WIDE_PSW | PSW_T | PSW_N | PSW_X | PSW_B | PSW_V | PSW_CB) +#define USER_PSW (PSW_C | PSW_Q | PSW_P | PSW_D | PSW_I) + #endif diff --git a/include/asm-parisc/ptrace.h b/include/asm-parisc/ptrace.h index 3f428aa371a4..93f990e418f1 100644 --- a/include/asm-parisc/ptrace.h +++ b/include/asm-parisc/ptrace.h @@ -49,7 +49,7 @@ struct pt_regs { #define user_mode(regs) (((regs)->iaoq[0] & 3) ? 1 : 0) #define user_space(regs) (((regs)->iasq[1] != 0) ? 1 : 0) #define instruction_pointer(regs) ((regs)->iaoq[0] & ~3) -#define profile_pc(regs) instruction_pointer(regs) +unsigned long profile_pc(struct pt_regs *); extern void show_regs(struct pt_regs *); #endif diff --git a/include/asm-parisc/semaphore.h b/include/asm-parisc/semaphore.h index f78bb2e34538..c9ee41cd0707 100644 --- a/include/asm-parisc/semaphore.h +++ b/include/asm-parisc/semaphore.h @@ -49,9 +49,6 @@ struct semaphore { .wait = __WAIT_QUEUE_HEAD_INITIALIZER((name).wait) \ } -#define __MUTEX_INITIALIZER(name) \ - __SEMAPHORE_INITIALIZER(name,1) - #define __DECLARE_SEMAPHORE_GENERIC(name,count) \ struct semaphore name = __SEMAPHORE_INITIALIZER(name,count) diff --git a/include/asm-parisc/smp.h b/include/asm-parisc/smp.h index 9413f67a540b..dbdbd2e9fdf9 100644 --- a/include/asm-parisc/smp.h +++ b/include/asm-parisc/smp.h @@ -29,6 +29,7 @@ extern cpumask_t cpu_online_map; #define cpu_logical_map(cpu) (cpu) extern void smp_send_reschedule(int cpu); +extern void smp_send_all_nop(void); #endif /* !ASSEMBLY */ @@ -53,7 +54,11 @@ extern unsigned long cpu_present_mask; #define raw_smp_processor_id() (current_thread_info()->cpu) -#endif /* CONFIG_SMP */ +#else /* CONFIG_SMP */ + +static inline void smp_send_all_nop(void) { return; } + +#endif #define NO_PROC_ID 0xFF /* No processor magic marker */ #define ANY_PROC_ID 0xFF /* Any processor magic marker */ diff --git a/include/asm-parisc/spinlock.h b/include/asm-parisc/spinlock.h index 43eaa6e742e0..16c2ac075fc5 100644 --- a/include/asm-parisc/spinlock.h +++ b/include/asm-parisc/spinlock.h @@ -5,29 +5,31 @@ #include <asm/processor.h> #include <asm/spinlock_types.h> -/* Note that PA-RISC has to use `1' to mean unlocked and `0' to mean locked - * since it only has load-and-zero. Moreover, at least on some PA processors, - * the semaphore address has to be 16-byte aligned. - */ - static inline int __raw_spin_is_locked(raw_spinlock_t *x) { volatile unsigned int *a = __ldcw_align(x); return *a == 0; } -#define __raw_spin_lock_flags(lock, flags) __raw_spin_lock(lock) +#define __raw_spin_lock(lock) __raw_spin_lock_flags(lock, 0) #define __raw_spin_unlock_wait(x) \ do { cpu_relax(); } while (__raw_spin_is_locked(x)) -static inline void __raw_spin_lock(raw_spinlock_t *x) +static inline void __raw_spin_lock_flags(raw_spinlock_t *x, + unsigned long flags) { volatile unsigned int *a; mb(); a = __ldcw_align(x); while (__ldcw(a) == 0) - while (*a == 0); + while (*a == 0) + if (flags & PSW_SM_I) { + local_irq_enable(); + cpu_relax(); + local_irq_disable(); + } else + cpu_relax(); mb(); } @@ -65,26 +67,20 @@ static inline int __raw_spin_trylock(raw_spinlock_t *x) static __inline__ void __raw_read_lock(raw_rwlock_t *rw) { - unsigned long flags; - local_irq_save(flags); __raw_spin_lock(&rw->lock); rw->counter++; __raw_spin_unlock(&rw->lock); - local_irq_restore(flags); } static __inline__ void __raw_read_unlock(raw_rwlock_t *rw) { - unsigned long flags; - local_irq_save(flags); __raw_spin_lock(&rw->lock); rw->counter--; __raw_spin_unlock(&rw->lock); - local_irq_restore(flags); } /* write_lock is less trivial. We optimistically grab the lock and check diff --git a/include/asm-parisc/spinlock_types.h b/include/asm-parisc/spinlock_types.h index 785bba822fbf..d6b479bdb886 100644 --- a/include/asm-parisc/spinlock_types.h +++ b/include/asm-parisc/spinlock_types.h @@ -6,11 +6,15 @@ #endif typedef struct { +#ifdef CONFIG_PA20 + volatile unsigned int slock; +# define __RAW_SPIN_LOCK_UNLOCKED { 1 } +#else volatile unsigned int lock[4]; +# define __RAW_SPIN_LOCK_UNLOCKED { { 1, 1, 1, 1 } } +#endif } raw_spinlock_t; -#define __RAW_SPIN_LOCK_UNLOCKED { { 1, 1, 1, 1 } } - typedef struct { raw_spinlock_t lock; volatile int counter; diff --git a/include/asm-parisc/system.h b/include/asm-parisc/system.h index 26ff844a21c1..f3928d3a80cb 100644 --- a/include/asm-parisc/system.h +++ b/include/asm-parisc/system.h @@ -138,13 +138,7 @@ static inline void set_eiem(unsigned long val) #define set_wmb(var, value) do { var = value; wmb(); } while (0) -/* LDCW, the only atomic read-write operation PA-RISC has. *sigh*. */ -#define __ldcw(a) ({ \ - unsigned __ret; \ - __asm__ __volatile__("ldcw 0(%1),%0" : "=r" (__ret) : "r" (a)); \ - __ret; \ -}) - +#ifndef CONFIG_PA20 /* Because kmalloc only guarantees 8-byte alignment for kmalloc'd data, and GCC only guarantees 8-byte alignment for stack locals, we can't be assured of 16-byte alignment for atomic lock data even if we @@ -152,37 +146,41 @@ static inline void set_eiem(unsigned long val) we use a struct containing an array of four ints for the atomic lock type and dynamically select the 16-byte aligned int from the array for the semaphore. */ + #define __PA_LDCW_ALIGNMENT 16 #define __ldcw_align(a) ({ \ unsigned long __ret = (unsigned long) &(a)->lock[0]; \ __ret = (__ret + __PA_LDCW_ALIGNMENT - 1) & ~(__PA_LDCW_ALIGNMENT - 1); \ (volatile unsigned int *) __ret; \ }) +#define LDCW "ldcw" -#ifdef CONFIG_SMP -# define __lock_aligned __attribute__((__section__(".data.lock_aligned"))) -#endif +#else /*CONFIG_PA20*/ +/* From: "Jim Hull" <jim.hull of hp.com> + I've attached a summary of the change, but basically, for PA 2.0, as + long as the ",CO" (coherent operation) completer is specified, then the + 16-byte alignment requirement for ldcw and ldcd is relaxed, and instead + they only require "natural" alignment (4-byte for ldcw, 8-byte for + ldcd). */ -#define KERNEL_START (0x10100000 - 0x1000) +#define __PA_LDCW_ALIGNMENT 4 +#define __ldcw_align(a) ((volatile unsigned int *)a) +#define LDCW "ldcw,co" -/* This is for the serialisation of PxTLB broadcasts. At least on the - * N class systems, only one PxTLB inter processor broadcast can be - * active at any one time on the Merced bus. This tlb purge - * synchronisation is fairly lightweight and harmless so we activate - * it on all SMP systems not just the N class. */ -#ifdef CONFIG_SMP -extern spinlock_t pa_tlb_lock; +#endif /*!CONFIG_PA20*/ -#define purge_tlb_start(x) spin_lock(&pa_tlb_lock) -#define purge_tlb_end(x) spin_unlock(&pa_tlb_lock) - -#else - -#define purge_tlb_start(x) do { } while(0) -#define purge_tlb_end(x) do { } while (0) +/* LDCW, the only atomic read-write operation PA-RISC has. *sigh*. */ +#define __ldcw(a) ({ \ + unsigned __ret; \ + __asm__ __volatile__(LDCW " 0(%1),%0" : "=r" (__ret) : "r" (a)); \ + __ret; \ +}) +#ifdef CONFIG_SMP +# define __lock_aligned __attribute__((__section__(".data.lock_aligned"))) #endif +#define KERNEL_START (0x10100000 - 0x1000) #define arch_align_stack(x) (x) #endif diff --git a/include/asm-parisc/tlbflush.h b/include/asm-parisc/tlbflush.h index eb27b78930e8..c9ec39c6fc6c 100644 --- a/include/asm-parisc/tlbflush.h +++ b/include/asm-parisc/tlbflush.h @@ -7,6 +7,20 @@ #include <linux/mm.h> #include <asm/mmu_context.h> + +/* This is for the serialisation of PxTLB broadcasts. At least on the + * N class systems, only one PxTLB inter processor broadcast can be + * active at any one time on the Merced bus. This tlb purge + * synchronisation is fairly lightweight and harmless so we activate + * it on all SMP systems not just the N class. We also need to have + * preemption disabled on uniprocessor machines, and spin_lock does that + * nicely. + */ +extern spinlock_t pa_tlb_lock; + +#define purge_tlb_start(x) spin_lock(&pa_tlb_lock) +#define purge_tlb_end(x) spin_unlock(&pa_tlb_lock) + extern void flush_tlb_all(void); /* @@ -64,29 +78,25 @@ static inline void flush_tlb_range(struct vm_area_struct *vma, { unsigned long npages; - npages = ((end - (start & PAGE_MASK)) + (PAGE_SIZE - 1)) >> PAGE_SHIFT; - if (npages >= 512) /* XXX arbitrary, should be tuned */ + if (npages >= 512) /* 2MB of space: arbitrary, should be tuned */ flush_tlb_all(); else { - mtsp(vma->vm_mm->context,1); + purge_tlb_start(); if (split_tlb) { - purge_tlb_start(); while (npages--) { pdtlb(start); pitlb(start); start += PAGE_SIZE; } - purge_tlb_end(); } else { - purge_tlb_start(); while (npages--) { pdtlb(start); start += PAGE_SIZE; } - purge_tlb_end(); } + purge_tlb_end(); } } diff --git a/include/asm-parisc/types.h b/include/asm-parisc/types.h index d21b9d0d63ea..34fdce361a5a 100644 --- a/include/asm-parisc/types.h +++ b/include/asm-parisc/types.h @@ -33,8 +33,10 @@ typedef unsigned long long __u64; #ifdef __LP64__ #define BITS_PER_LONG 64 +#define SHIFT_PER_LONG 6 #else #define BITS_PER_LONG 32 +#define SHIFT_PER_LONG 5 #endif #ifndef __ASSEMBLY__ diff --git a/include/asm-parisc/unistd.h b/include/asm-parisc/unistd.h index 6a9f0cadff58..80b7b98c70a1 100644 --- a/include/asm-parisc/unistd.h +++ b/include/asm-parisc/unistd.h @@ -687,8 +687,8 @@ #define __NR_shmget (__NR_Linux + 194) #define __NR_shmctl (__NR_Linux + 195) -#define __NR_getpmsg (__NR_Linux + 196) /* some people actually want streams */ -#define __NR_putpmsg (__NR_Linux + 197) /* some people actually want streams */ +#define __NR_getpmsg (__NR_Linux + 196) /* Somebody *wants* streams? */ +#define __NR_putpmsg (__NR_Linux + 197) #define __NR_lstat64 (__NR_Linux + 198) #define __NR_truncate64 (__NR_Linux + 199) @@ -755,8 +755,14 @@ #define __NR_mbind (__NR_Linux + 260) #define __NR_get_mempolicy (__NR_Linux + 261) #define __NR_set_mempolicy (__NR_Linux + 262) +#define __NR_vserver (__NR_Linux + 263) +#define __NR_add_key (__NR_Linux + 264) +#define __NR_request_key (__NR_Linux + 265) +#define __NR_keyctl (__NR_Linux + 266) +#define __NR_ioprio_set (__NR_Linux + 267) +#define __NR_ioprio_get (__NR_Linux + 268) -#define __NR_Linux_syscalls 263 +#define __NR_Linux_syscalls 269 #define HPUX_GATEWAY_ADDR 0xC0000004 #define LINUX_GATEWAY_ADDR 0x100 @@ -807,10 +813,10 @@ #define K_INLINE_SYSCALL(name, nr, args...) ({ \ long __sys_res; \ { \ - register unsigned long __res asm("r28"); \ + register unsigned long __res __asm__("r28"); \ K_LOAD_ARGS_##nr(args) \ /* FIXME: HACK stw/ldw r19 around syscall */ \ - asm volatile( \ + __asm__ volatile( \ K_STW_ASM_PIC \ " ble 0x100(%%sr2, %%r0)\n" \ " ldi %1, %%r20\n" \ @@ -1005,7 +1011,6 @@ int sys_clone(unsigned long clone_flags, unsigned long usp, struct pt_regs *regs); int sys_vfork(struct pt_regs *regs); int sys_pipe(int *fildes); -long sys_ptrace(long request, pid_t pid, long addr, long data); struct sigaction; asmlinkage long sys_rt_sigaction(int sig, const struct sigaction __user *act, diff --git a/include/asm-ppc64/a.out.h b/include/asm-powerpc/a.out.h index 3871e252a6f1..c7393a977364 100644 --- a/include/asm-ppc64/a.out.h +++ b/include/asm-powerpc/a.out.h @@ -1,14 +1,5 @@ -#ifndef __PPC64_A_OUT_H__ -#define __PPC64_A_OUT_H__ - -/* - * c 2001 PPC 64 Team, IBM Corp - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ +#ifndef _ASM_POWERPC_A_OUT_H +#define _ASM_POWERPC_A_OUT_H struct exec { @@ -27,6 +18,7 @@ struct exec #define N_SYMSIZE(a) ((a).a_syms) #ifdef __KERNEL__ +#ifdef __powerpc64__ #define STACK_TOP_USER64 TASK_SIZE_USER64 #define STACK_TOP_USER32 TASK_SIZE_USER32 @@ -34,6 +26,11 @@ struct exec #define STACK_TOP (test_thread_flag(TIF_32BIT) ? \ STACK_TOP_USER32 : STACK_TOP_USER64) +#else /* __powerpc64__ */ + +#define STACK_TOP TASK_SIZE + +#endif /* __powerpc64__ */ #endif /* __KERNEL__ */ -#endif /* __PPC64_A_OUT_H__ */ +#endif /* _ASM_POWERPC_A_OUT_H */ diff --git a/include/asm-ppc64/abs_addr.h b/include/asm-powerpc/abs_addr.h index 84c24d4cdb71..18415108fc56 100644 --- a/include/asm-ppc64/abs_addr.h +++ b/include/asm-powerpc/abs_addr.h @@ -1,5 +1,5 @@ -#ifndef _ABS_ADDR_H -#define _ABS_ADDR_H +#ifndef _ASM_POWERPC_ABS_ADDR_H +#define _ASM_POWERPC_ABS_ADDR_H #include <linux/config.h> @@ -63,4 +63,11 @@ static inline unsigned long phys_to_abs(unsigned long pa) #define virt_to_abs(va) phys_to_abs(__pa(va)) #define abs_to_virt(aa) __va(aa) -#endif /* _ABS_ADDR_H */ +/* + * Converts Virtual Address to Real Address for + * Legacy iSeries Hypervisor calls + */ +#define iseries_hv_addr(virtaddr) \ + (0x8000000000000000 | virt_to_abs(virtaddr)) + +#endif /* _ASM_POWERPC_ABS_ADDR_H */ diff --git a/include/asm-powerpc/asm-compat.h b/include/asm-powerpc/asm-compat.h new file mode 100644 index 000000000000..8b133efc9f79 --- /dev/null +++ b/include/asm-powerpc/asm-compat.h @@ -0,0 +1,55 @@ +#ifndef _ASM_POWERPC_ASM_COMPAT_H +#define _ASM_POWERPC_ASM_COMPAT_H + +#include <linux/config.h> +#include <asm/types.h> + +#ifdef __ASSEMBLY__ +# define stringify_in_c(...) __VA_ARGS__ +# define ASM_CONST(x) x +#else +/* This version of stringify will deal with commas... */ +# define __stringify_in_c(...) #__VA_ARGS__ +# define stringify_in_c(...) __stringify_in_c(__VA_ARGS__) " " +# define __ASM_CONST(x) x##UL +# define ASM_CONST(x) __ASM_CONST(x) +#endif + +#ifdef __powerpc64__ + +/* operations for longs and pointers */ +#define PPC_LL stringify_in_c(ld) +#define PPC_STL stringify_in_c(std) +#define PPC_LCMPI stringify_in_c(cmpdi) +#define PPC_LONG stringify_in_c(.llong) +#define PPC_TLNEI stringify_in_c(tdnei) +#define PPC_LLARX stringify_in_c(ldarx) +#define PPC_STLCX stringify_in_c(stdcx.) +#define PPC_CNTLZL stringify_in_c(cntlzd) + +#else /* 32-bit */ + +/* operations for longs and pointers */ +#define PPC_LL stringify_in_c(lwz) +#define PPC_STL stringify_in_c(stw) +#define PPC_LCMPI stringify_in_c(cmpwi) +#define PPC_LONG stringify_in_c(.long) +#define PPC_TLNEI stringify_in_c(twnei) +#define PPC_LLARX stringify_in_c(lwarx) +#define PPC_STLCX stringify_in_c(stwcx.) +#define PPC_CNTLZL stringify_in_c(cntlzw) + +#endif + +#ifdef CONFIG_IBM405_ERR77 +/* Erratum #77 on the 405 means we need a sync or dcbt before every + * stwcx. The old ATOMIC_SYNC_FIX covered some but not all of this. + */ +#define PPC405_ERR77(ra,rb) stringify_in_c(dcbt ra, rb;) +#define PPC405_ERR77_SYNC stringify_in_c(sync;) +#else +#define PPC405_ERR77(ra,rb) +#define PPC405_ERR77_SYNC +#endif + +#endif /* _ASM_POWERPC_ASM_COMPAT_H */ diff --git a/include/asm-powerpc/atomic.h b/include/asm-powerpc/atomic.h new file mode 100644 index 000000000000..ec4b14468959 --- /dev/null +++ b/include/asm-powerpc/atomic.h @@ -0,0 +1,406 @@ +#ifndef _ASM_POWERPC_ATOMIC_H_ +#define _ASM_POWERPC_ATOMIC_H_ + +/* + * PowerPC atomic operations + */ + +typedef struct { volatile int counter; } atomic_t; + +#ifdef __KERNEL__ +#include <asm/synch.h> +#include <asm/asm-compat.h> + +#define ATOMIC_INIT(i) { (i) } + +#define atomic_read(v) ((v)->counter) +#define atomic_set(v,i) (((v)->counter) = (i)) + +static __inline__ void atomic_add(int a, atomic_t *v) +{ + int t; + + __asm__ __volatile__( +"1: lwarx %0,0,%3 # atomic_add\n\ + add %0,%2,%0\n" + PPC405_ERR77(0,%3) +" stwcx. %0,0,%3 \n\ + bne- 1b" + : "=&r" (t), "=m" (v->counter) + : "r" (a), "r" (&v->counter), "m" (v->counter) + : "cc"); +} + +static __inline__ int atomic_add_return(int a, atomic_t *v) +{ + int t; + + __asm__ __volatile__( + EIEIO_ON_SMP +"1: lwarx %0,0,%2 # atomic_add_return\n\ + add %0,%1,%0\n" + PPC405_ERR77(0,%2) +" stwcx. %0,0,%2 \n\ + bne- 1b" + ISYNC_ON_SMP + : "=&r" (t) + : "r" (a), "r" (&v->counter) + : "cc", "memory"); + + return t; +} + +#define atomic_add_negative(a, v) (atomic_add_return((a), (v)) < 0) + +static __inline__ void atomic_sub(int a, atomic_t *v) +{ + int t; + + __asm__ __volatile__( +"1: lwarx %0,0,%3 # atomic_sub\n\ + subf %0,%2,%0\n" + PPC405_ERR77(0,%3) +" stwcx. %0,0,%3 \n\ + bne- 1b" + : "=&r" (t), "=m" (v->counter) + : "r" (a), "r" (&v->counter), "m" (v->counter) + : "cc"); +} + +static __inline__ int atomic_sub_return(int a, atomic_t *v) +{ + int t; + + __asm__ __volatile__( + EIEIO_ON_SMP +"1: lwarx %0,0,%2 # atomic_sub_return\n\ + subf %0,%1,%0\n" + PPC405_ERR77(0,%2) +" stwcx. %0,0,%2 \n\ + bne- 1b" + ISYNC_ON_SMP + : "=&r" (t) + : "r" (a), "r" (&v->counter) + : "cc", "memory"); + + return t; +} + +static __inline__ void atomic_inc(atomic_t *v) +{ + int t; + + __asm__ __volatile__( +"1: lwarx %0,0,%2 # atomic_inc\n\ + addic %0,%0,1\n" + PPC405_ERR77(0,%2) +" stwcx. %0,0,%2 \n\ + bne- 1b" + : "=&r" (t), "=m" (v->counter) + : "r" (&v->counter), "m" (v->counter) + : "cc"); +} + +static __inline__ int atomic_inc_return(atomic_t *v) +{ + int t; + + __asm__ __volatile__( + EIEIO_ON_SMP +"1: lwarx %0,0,%1 # atomic_inc_return\n\ + addic %0,%0,1\n" + PPC405_ERR77(0,%1) +" stwcx. %0,0,%1 \n\ + bne- 1b" + ISYNC_ON_SMP + : "=&r" (t) + : "r" (&v->counter) + : "cc", "memory"); + + return t; +} + +/* + * atomic_inc_and_test - increment and test + * @v: pointer of type atomic_t + * + * Atomically increments @v by 1 + * and returns true if the result is zero, or false for all + * other cases. + */ +#define atomic_inc_and_test(v) (atomic_inc_return(v) == 0) + +static __inline__ void atomic_dec(atomic_t *v) +{ + int t; + + __asm__ __volatile__( +"1: lwarx %0,0,%2 # atomic_dec\n\ + addic %0,%0,-1\n" + PPC405_ERR77(0,%2)\ +" stwcx. %0,0,%2\n\ + bne- 1b" + : "=&r" (t), "=m" (v->counter) + : "r" (&v->counter), "m" (v->counter) + : "cc"); +} + +static __inline__ int atomic_dec_return(atomic_t *v) +{ + int t; + + __asm__ __volatile__( + EIEIO_ON_SMP +"1: lwarx %0,0,%1 # atomic_dec_return\n\ + addic %0,%0,-1\n" + PPC405_ERR77(0,%1) +" stwcx. %0,0,%1\n\ + bne- 1b" + ISYNC_ON_SMP + : "=&r" (t) + : "r" (&v->counter) + : "cc", "memory"); + + return t; +} + +#define atomic_cmpxchg(v, o, n) ((int)cmpxchg(&((v)->counter), (o), (n))) + +/** + * atomic_add_unless - add unless the number is a given value + * @v: pointer of type atomic_t + * @a: the amount to add to v... + * @u: ...unless v is equal to u. + * + * Atomically adds @a to @v, so long as it was not @u. + * Returns non-zero if @v was not @u, and zero otherwise. + */ +#define atomic_add_unless(v, a, u) \ +({ \ + int c, old; \ + c = atomic_read(v); \ + for (;;) { \ + if (unlikely(c == (u))) \ + break; \ + old = atomic_cmpxchg((v), c, c + (a)); \ + if (likely(old == c)) \ + break; \ + c = old; \ + } \ + c != (u); \ +}) +#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0) + +#define atomic_sub_and_test(a, v) (atomic_sub_return((a), (v)) == 0) +#define atomic_dec_and_test(v) (atomic_dec_return((v)) == 0) + +/* + * Atomically test *v and decrement if it is greater than 0. + * The function returns the old value of *v minus 1. + */ +static __inline__ int atomic_dec_if_positive(atomic_t *v) +{ + int t; + + __asm__ __volatile__( + EIEIO_ON_SMP +"1: lwarx %0,0,%1 # atomic_dec_if_positive\n\ + addic. %0,%0,-1\n\ + blt- 2f\n" + PPC405_ERR77(0,%1) +" stwcx. %0,0,%1\n\ + bne- 1b" + ISYNC_ON_SMP + "\n\ +2:" : "=&r" (t) + : "r" (&v->counter) + : "cc", "memory"); + + return t; +} + +#define smp_mb__before_atomic_dec() smp_mb() +#define smp_mb__after_atomic_dec() smp_mb() +#define smp_mb__before_atomic_inc() smp_mb() +#define smp_mb__after_atomic_inc() smp_mb() + +#ifdef __powerpc64__ + +typedef struct { volatile long counter; } atomic64_t; + +#define ATOMIC64_INIT(i) { (i) } + +#define atomic64_read(v) ((v)->counter) +#define atomic64_set(v,i) (((v)->counter) = (i)) + +static __inline__ void atomic64_add(long a, atomic64_t *v) +{ + long t; + + __asm__ __volatile__( +"1: ldarx %0,0,%3 # atomic64_add\n\ + add %0,%2,%0\n\ + stdcx. %0,0,%3 \n\ + bne- 1b" + : "=&r" (t), "=m" (v->counter) + : "r" (a), "r" (&v->counter), "m" (v->counter) + : "cc"); +} + +static __inline__ long atomic64_add_return(long a, atomic64_t *v) +{ + long t; + + __asm__ __volatile__( + EIEIO_ON_SMP +"1: ldarx %0,0,%2 # atomic64_add_return\n\ + add %0,%1,%0\n\ + stdcx. %0,0,%2 \n\ + bne- 1b" + ISYNC_ON_SMP + : "=&r" (t) + : "r" (a), "r" (&v->counter) + : "cc", "memory"); + + return t; +} + +#define atomic64_add_negative(a, v) (atomic64_add_return((a), (v)) < 0) + +static __inline__ void atomic64_sub(long a, atomic64_t *v) +{ + long t; + + __asm__ __volatile__( +"1: ldarx %0,0,%3 # atomic64_sub\n\ + subf %0,%2,%0\n\ + stdcx. %0,0,%3 \n\ + bne- 1b" + : "=&r" (t), "=m" (v->counter) + : "r" (a), "r" (&v->counter), "m" (v->counter) + : "cc"); +} + +static __inline__ long atomic64_sub_return(long a, atomic64_t *v) +{ + long t; + + __asm__ __volatile__( + EIEIO_ON_SMP +"1: ldarx %0,0,%2 # atomic64_sub_return\n\ + subf %0,%1,%0\n\ + stdcx. %0,0,%2 \n\ + bne- 1b" + ISYNC_ON_SMP + : "=&r" (t) + : "r" (a), "r" (&v->counter) + : "cc", "memory"); + + return t; +} + +static __inline__ void atomic64_inc(atomic64_t *v) +{ + long t; + + __asm__ __volatile__( +"1: ldarx %0,0,%2 # atomic64_inc\n\ + addic %0,%0,1\n\ + stdcx. %0,0,%2 \n\ + bne- 1b" + : "=&r" (t), "=m" (v->counter) + : "r" (&v->counter), "m" (v->counter) + : "cc"); +} + +static __inline__ long atomic64_inc_return(atomic64_t *v) +{ + long t; + + __asm__ __volatile__( + EIEIO_ON_SMP +"1: ldarx %0,0,%1 # atomic64_inc_return\n\ + addic %0,%0,1\n\ + stdcx. %0,0,%1 \n\ + bne- 1b" + ISYNC_ON_SMP + : "=&r" (t) + : "r" (&v->counter) + : "cc", "memory"); + + return t; +} + +/* + * atomic64_inc_and_test - increment and test + * @v: pointer of type atomic64_t + * + * Atomically increments @v by 1 + * and returns true if the result is zero, or false for all + * other cases. + */ +#define atomic64_inc_and_test(v) (atomic64_inc_return(v) == 0) + +static __inline__ void atomic64_dec(atomic64_t *v) +{ + long t; + + __asm__ __volatile__( +"1: ldarx %0,0,%2 # atomic64_dec\n\ + addic %0,%0,-1\n\ + stdcx. %0,0,%2\n\ + bne- 1b" + : "=&r" (t), "=m" (v->counter) + : "r" (&v->counter), "m" (v->counter) + : "cc"); +} + +static __inline__ long atomic64_dec_return(atomic64_t *v) +{ + long t; + + __asm__ __volatile__( + EIEIO_ON_SMP +"1: ldarx %0,0,%1 # atomic64_dec_return\n\ + addic %0,%0,-1\n\ + stdcx. %0,0,%1\n\ + bne- 1b" + ISYNC_ON_SMP + : "=&r" (t) + : "r" (&v->counter) + : "cc", "memory"); + + return t; +} + +#define atomic64_sub_and_test(a, v) (atomic64_sub_return((a), (v)) == 0) +#define atomic64_dec_and_test(v) (atomic64_dec_return((v)) == 0) + +/* + * Atomically test *v and decrement if it is greater than 0. + * The function returns the old value of *v minus 1. + */ +static __inline__ long atomic64_dec_if_positive(atomic64_t *v) +{ + long t; + + __asm__ __volatile__( + EIEIO_ON_SMP +"1: ldarx %0,0,%1 # atomic64_dec_if_positive\n\ + addic. %0,%0,-1\n\ + blt- 2f\n\ + stdcx. %0,0,%1\n\ + bne- 1b" + ISYNC_ON_SMP + "\n\ +2:" : "=&r" (t) + : "r" (&v->counter) + : "cc", "memory"); + + return t; +} + +#endif /* __powerpc64__ */ + +#endif /* __KERNEL__ */ +#endif /* _ASM_POWERPC_ATOMIC_H_ */ diff --git a/include/asm-ppc64/auxvec.h b/include/asm-powerpc/auxvec.h index ac6381a106e1..19a099b62cd6 100644 --- a/include/asm-ppc64/auxvec.h +++ b/include/asm-powerpc/auxvec.h @@ -1,5 +1,5 @@ -#ifndef __PPC64_AUXVEC_H -#define __PPC64_AUXVEC_H +#ifndef _ASM_POWERPC_AUXVEC_H +#define _ASM_POWERPC_AUXVEC_H /* * We need to put in some extra aux table entries to tell glibc what @@ -16,4 +16,4 @@ */ #define AT_SYSINFO_EHDR 33 -#endif /* __PPC64_AUXVEC_H */ +#endif diff --git a/include/asm-ppc/backlight.h b/include/asm-powerpc/backlight.h index 3a1c3dede2a0..1ba1f27a0b63 100644 --- a/include/asm-ppc/backlight.h +++ b/include/asm-powerpc/backlight.h @@ -1,12 +1,13 @@ /* * Routines for handling backlight control on PowerBooks * - * For now, implementation resides in arch/ppc/kernel/pmac_support.c + * For now, implementation resides in + * arch/powerpc/platforms/powermac/pmac_support.c * */ +#ifndef __ASM_POWERPC_BACKLIGHT_H +#define __ASM_POWERPC_BACKLIGHT_H #ifdef __KERNEL__ -#ifndef __ASM_PPC_BACKLIGHT_H -#define __ASM_PPC_BACKLIGHT_H /* Abstract values */ #define BACKLIGHT_OFF 0 @@ -26,5 +27,5 @@ extern int get_backlight_enable(void); extern int set_backlight_level(int level); extern int get_backlight_level(void); -#endif #endif /* __KERNEL__ */ +#endif diff --git a/include/asm-powerpc/bitops.h b/include/asm-powerpc/bitops.h new file mode 100644 index 000000000000..5727229b0444 --- /dev/null +++ b/include/asm-powerpc/bitops.h @@ -0,0 +1,428 @@ +/* + * PowerPC atomic bit operations. + * + * Merged version by David Gibson <david@gibson.dropbear.id.au>. + * Based on ppc64 versions by: Dave Engebretsen, Todd Inglett, Don + * Reed, Pat McCarthy, Peter Bergner, Anton Blanchard. They + * originally took it from the ppc32 code. + * + * Within a word, bits are numbered LSB first. Lot's of places make + * this assumption by directly testing bits with (val & (1<<nr)). + * This can cause confusion for large (> 1 word) bitmaps on a + * big-endian system because, unlike little endian, the number of each + * bit depends on the word size. + * + * The bitop functions are defined to work on unsigned longs, so for a + * ppc64 system the bits end up numbered: + * |63..............0|127............64|191...........128|255...........196| + * and on ppc32: + * |31.....0|63....31|95....64|127...96|159..128|191..160|223..192|255..224| + * + * There are a few little-endian macros used mostly for filesystem + * bitmaps, these work on similar bit arrays layouts, but + * byte-oriented: + * |7...0|15...8|23...16|31...24|39...32|47...40|55...48|63...56| + * + * The main difference is that bit 3-5 (64b) or 3-4 (32b) in the bit + * number field needs to be reversed compared to the big-endian bit + * fields. This can be achieved by XOR with 0x38 (64b) or 0x18 (32b). + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version + * 2 of the License, or (at your option) any later version. + */ + +#ifndef _ASM_POWERPC_BITOPS_H +#define _ASM_POWERPC_BITOPS_H + +#ifdef __KERNEL__ + +#include <linux/compiler.h> +#include <asm/atomic.h> +#include <asm/asm-compat.h> +#include <asm/synch.h> + +/* + * clear_bit doesn't imply a memory barrier + */ +#define smp_mb__before_clear_bit() smp_mb() +#define smp_mb__after_clear_bit() smp_mb() + +#define BITOP_MASK(nr) (1UL << ((nr) % BITS_PER_LONG)) +#define BITOP_WORD(nr) ((nr) / BITS_PER_LONG) +#define BITOP_LE_SWIZZLE ((BITS_PER_LONG-1) & ~0x7) + +static __inline__ void set_bit(int nr, volatile unsigned long *addr) +{ + unsigned long old; + unsigned long mask = BITOP_MASK(nr); + unsigned long *p = ((unsigned long *)addr) + BITOP_WORD(nr); + + __asm__ __volatile__( +"1:" PPC_LLARX "%0,0,%3 # set_bit\n" + "or %0,%0,%2\n" + PPC405_ERR77(0,%3) + PPC_STLCX "%0,0,%3\n" + "bne- 1b" + : "=&r"(old), "=m"(*p) + : "r"(mask), "r"(p), "m"(*p) + : "cc" ); +} + +static __inline__ void clear_bit(int nr, volatile unsigned long *addr) +{ + unsigned long old; + unsigned long mask = BITOP_MASK(nr); + unsigned long *p = ((unsigned long *)addr) + BITOP_WORD(nr); + + __asm__ __volatile__( +"1:" PPC_LLARX "%0,0,%3 # clear_bit\n" + "andc %0,%0,%2\n" + PPC405_ERR77(0,%3) + PPC_STLCX "%0,0,%3\n" + "bne- 1b" + : "=&r"(old), "=m"(*p) + : "r"(mask), "r"(p), "m"(*p) + : "cc" ); +} + +static __inline__ void change_bit(int nr, volatile unsigned long *addr) +{ + unsigned long old; + unsigned long mask = BITOP_MASK(nr); + unsigned long *p = ((unsigned long *)addr) + BITOP_WORD(nr); + + __asm__ __volatile__( +"1:" PPC_LLARX "%0,0,%3 # change_bit\n" + "xor %0,%0,%2\n" + PPC405_ERR77(0,%3) + PPC_STLCX "%0,0,%3\n" + "bne- 1b" + : "=&r"(old), "=m"(*p) + : "r"(mask), "r"(p), "m"(*p) + : "cc" ); +} + +static __inline__ int test_and_set_bit(unsigned long nr, + volatile unsigned long *addr) +{ + unsigned long old, t; + unsigned long mask = BITOP_MASK(nr); + unsigned long *p = ((unsigned long *)addr) + BITOP_WORD(nr); + + __asm__ __volatile__( + EIEIO_ON_SMP +"1:" PPC_LLARX "%0,0,%3 # test_and_set_bit\n" + "or %1,%0,%2 \n" + PPC405_ERR77(0,%3) + PPC_STLCX "%1,0,%3 \n" + "bne- 1b" + ISYNC_ON_SMP + : "=&r" (old), "=&r" (t) + : "r" (mask), "r" (p) + : "cc", "memory"); + + return (old & mask) != 0; +} + +static __inline__ int test_and_clear_bit(unsigned long nr, + volatile unsigned long *addr) +{ + unsigned long old, t; + unsigned long mask = BITOP_MASK(nr); + unsigned long *p = ((unsigned long *)addr) + BITOP_WORD(nr); + + __asm__ __volatile__( + EIEIO_ON_SMP +"1:" PPC_LLARX "%0,0,%3 # test_and_clear_bit\n" + "andc %1,%0,%2 \n" + PPC405_ERR77(0,%3) + PPC_STLCX "%1,0,%3 \n" + "bne- 1b" + ISYNC_ON_SMP + : "=&r" (old), "=&r" (t) + : "r" (mask), "r" (p) + : "cc", "memory"); + + return (old & mask) != 0; +} + +static __inline__ int test_and_change_bit(unsigned long nr, + volatile unsigned long *addr) +{ + unsigned long old, t; + unsigned long mask = BITOP_MASK(nr); + unsigned long *p = ((unsigned long *)addr) + BITOP_WORD(nr); + + __asm__ __volatile__( + EIEIO_ON_SMP +"1:" PPC_LLARX "%0,0,%3 # test_and_change_bit\n" + "xor %1,%0,%2 \n" + PPC405_ERR77(0,%3) + PPC_STLCX "%1,0,%3 \n" + "bne- 1b" + ISYNC_ON_SMP + : "=&r" (old), "=&r" (t) + : "r" (mask), "r" (p) + : "cc", "memory"); + + return (old & mask) != 0; +} + +static __inline__ void set_bits(unsigned long mask, unsigned long *addr) +{ + unsigned long old; + + __asm__ __volatile__( +"1:" PPC_LLARX "%0,0,%3 # set_bits\n" + "or %0,%0,%2\n" + PPC_STLCX "%0,0,%3\n" + "bne- 1b" + : "=&r" (old), "=m" (*addr) + : "r" (mask), "r" (addr), "m" (*addr) + : "cc"); +} + +/* Non-atomic versions */ +static __inline__ int test_bit(unsigned long nr, + __const__ volatile unsigned long *addr) +{ + return 1UL & (addr[BITOP_WORD(nr)] >> (nr & (BITS_PER_LONG-1))); +} + +static __inline__ void __set_bit(unsigned long nr, + volatile unsigned long *addr) +{ + unsigned long mask = BITOP_MASK(nr); + unsigned long *p = ((unsigned long *)addr) + BITOP_WORD(nr); + + *p |= mask; +} + +static __inline__ void __clear_bit(unsigned long nr, + volatile unsigned long *addr) +{ + unsigned long mask = BITOP_MASK(nr); + unsigned long *p = ((unsigned long *)addr) + BITOP_WORD(nr); + + *p &= ~mask; +} + +static __inline__ void __change_bit(unsigned long nr, + volatile unsigned long *addr) +{ + unsigned long mask = BITOP_MASK(nr); + unsigned long *p = ((unsigned long *)addr) + BITOP_WORD(nr); + + *p ^= mask; +} + +static __inline__ int __test_and_set_bit(unsigned long nr, + volatile unsigned long *addr) +{ + unsigned long mask = BITOP_MASK(nr); + unsigned long *p = ((unsigned long *)addr) + BITOP_WORD(nr); + unsigned long old = *p; + + *p = old | mask; + return (old & mask) != 0; +} + +static __inline__ int __test_and_clear_bit(unsigned long nr, + volatile unsigned long *addr) +{ + unsigned long mask = BITOP_MASK(nr); + unsigned long *p = ((unsigned long *)addr) + BITOP_WORD(nr); + unsigned long old = *p; + + *p = old & ~mask; + return (old & mask) != 0; +} + +static __inline__ int __test_and_change_bit(unsigned long nr, + volatile unsigned long *addr) +{ + unsigned long mask = BITOP_MASK(nr); + unsigned long *p = ((unsigned long *)addr) + BITOP_WORD(nr); + unsigned long old = *p; + + *p = old ^ mask; + return (old & mask) != 0; +} + +/* + * Return the zero-based bit position (LE, not IBM bit numbering) of + * the most significant 1-bit in a double word. + */ +static __inline__ int __ilog2(unsigned long x) +{ + int lz; + + asm (PPC_CNTLZL "%0,%1" : "=r" (lz) : "r" (x)); + return BITS_PER_LONG - 1 - lz; +} + +/* + * Determines the bit position of the least significant 0 bit in the + * specified double word. The returned bit position will be + * zero-based, starting from the right side (63/31 - 0). + */ +static __inline__ unsigned long ffz(unsigned long x) +{ + /* no zero exists anywhere in the 8 byte area. */ + if ((x = ~x) == 0) + return BITS_PER_LONG; + + /* + * Calculate the bit position of the least signficant '1' bit in x + * (since x has been changed this will actually be the least signficant + * '0' bit in * the original x). Note: (x & -x) gives us a mask that + * is the least significant * (RIGHT-most) 1-bit of the value in x. + */ + return __ilog2(x & -x); +} + +static __inline__ int __ffs(unsigned long x) +{ + return __ilog2(x & -x); +} + +/* + * ffs: find first bit set. This is defined the same way as + * the libc and compiler builtin ffs routines, therefore + * differs in spirit from the above ffz (man ffs). + */ +static __inline__ int ffs(int x) +{ + unsigned long i = (unsigned long)x; + return __ilog2(i & -i) + 1; +} + +/* + * fls: find last (most-significant) bit set. + * Note fls(0) = 0, fls(1) = 1, fls(0x80000000) = 32. + */ +static __inline__ int fls(unsigned int x) +{ + int lz; + + asm ("cntlzw %0,%1" : "=r" (lz) : "r" (x)); + return 32 - lz; +} + +/* + * hweightN: returns the hamming weight (i.e. the number + * of bits set) of a N-bit word + */ +#define hweight64(x) generic_hweight64(x) +#define hweight32(x) generic_hweight32(x) +#define hweight16(x) generic_hweight16(x) +#define hweight8(x) generic_hweight8(x) + +#define find_first_zero_bit(addr, size) find_next_zero_bit((addr), (size), 0) +unsigned long find_next_zero_bit(const unsigned long *addr, + unsigned long size, unsigned long offset); +/** + * find_first_bit - find the first set bit in a memory region + * @addr: The address to start the search at + * @size: The maximum size to search + * + * Returns the bit-number of the first set bit, not the number of the byte + * containing a bit. + */ +#define find_first_bit(addr, size) find_next_bit((addr), (size), 0) +unsigned long find_next_bit(const unsigned long *addr, + unsigned long size, unsigned long offset); + +/* Little-endian versions */ + +static __inline__ int test_le_bit(unsigned long nr, + __const__ unsigned long *addr) +{ + __const__ unsigned char *tmp = (__const__ unsigned char *) addr; + return (tmp[nr >> 3] >> (nr & 7)) & 1; +} + +#define __set_le_bit(nr, addr) \ + __set_bit((nr) ^ BITOP_LE_SWIZZLE, (addr)) +#define __clear_le_bit(nr, addr) \ + __clear_bit((nr) ^ BITOP_LE_SWIZZLE, (addr)) + +#define test_and_set_le_bit(nr, addr) \ + test_and_set_bit((nr) ^ BITOP_LE_SWIZZLE, (addr)) +#define test_and_clear_le_bit(nr, addr) \ + test_and_clear_bit((nr) ^ BITOP_LE_SWIZZLE, (addr)) + +#define __test_and_set_le_bit(nr, addr) \ + __test_and_set_bit((nr) ^ BITOP_LE_SWIZZLE, (addr)) +#define __test_and_clear_le_bit(nr, addr) \ + __test_and_clear_bit((nr) ^ BITOP_LE_SWIZZLE, (addr)) + +#define find_first_zero_le_bit(addr, size) find_next_zero_le_bit((addr), (size), 0) +unsigned long find_next_zero_le_bit(const unsigned long *addr, + unsigned long size, unsigned long offset); + +/* Bitmap functions for the ext2 filesystem */ + +#define ext2_set_bit(nr,addr) \ + __test_and_set_le_bit((nr), (unsigned long*)addr) +#define ext2_clear_bit(nr, addr) \ + __test_and_clear_le_bit((nr), (unsigned long*)addr) + +#define ext2_set_bit_atomic(lock, nr, addr) \ + test_and_set_le_bit((nr), (unsigned long*)addr) +#define ext2_clear_bit_atomic(lock, nr, addr) \ + test_and_clear_le_bit((nr), (unsigned long*)addr) + +#define ext2_test_bit(nr, addr) test_le_bit((nr),(unsigned long*)addr) + +#define ext2_find_first_zero_bit(addr, size) \ + find_first_zero_le_bit((unsigned long*)addr, size) +#define ext2_find_next_zero_bit(addr, size, off) \ + find_next_zero_le_bit((unsigned long*)addr, size, off) + +/* Bitmap functions for the minix filesystem. */ + +#define minix_test_and_set_bit(nr,addr) \ + __test_and_set_le_bit(nr, (unsigned long *)addr) +#define minix_set_bit(nr,addr) \ + __set_le_bit(nr, (unsigned long *)addr) +#define minix_test_and_clear_bit(nr,addr) \ + __test_and_clear_le_bit(nr, (unsigned long *)addr) +#define minix_test_bit(nr,addr) \ + test_le_bit(nr, (unsigned long *)addr) + +#define minix_find_first_zero_bit(addr,size) \ + find_first_zero_le_bit((unsigned long *)addr, size) + +/* + * Every architecture must define this function. It's the fastest + * way of searching a 140-bit bitmap where the first 100 bits are + * unlikely to be set. It's guaranteed that at least one of the 140 + * bits is cleared. + */ +static inline int sched_find_first_bit(const unsigned long *b) +{ +#ifdef CONFIG_PPC64 + if (unlikely(b[0])) + return __ffs(b[0]); + if (unlikely(b[1])) + return __ffs(b[1]) + 64; + return __ffs(b[2]) + 128; +#else + if (unlikely(b[0])) + return __ffs(b[0]); + if (unlikely(b[1])) + return __ffs(b[1]) + 32; + if (unlikely(b[2])) + return __ffs(b[2]) + 64; + if (b[3]) + return __ffs(b[3]) + 96; + return __ffs(b[4]) + 128; +#endif +} + +#endif /* __KERNEL__ */ + +#endif /* _ASM_POWERPC_BITOPS_H */ diff --git a/include/asm-ppc64/btext.h b/include/asm-powerpc/btext.h index 67aef0cc72c0..71cce36bc630 100644 --- a/include/asm-ppc64/btext.h +++ b/include/asm-powerpc/btext.h @@ -15,6 +15,7 @@ extern int boot_text_mapped; extern int btext_initialize(struct device_node *np); extern void map_boot_text(void); +extern void init_boot_display(void); extern void btext_update_display(unsigned long phys, int width, int height, int depth, int pitch); diff --git a/include/asm-ppc64/bug.h b/include/asm-powerpc/bug.h index 160178278861..b001ecb3cd99 100644 --- a/include/asm-ppc64/bug.h +++ b/include/asm-powerpc/bug.h @@ -1,6 +1,7 @@ -#ifndef _PPC64_BUG_H -#define _PPC64_BUG_H +#ifndef _ASM_POWERPC_BUG_H +#define _ASM_POWERPC_BUG_H +#include <asm/asm-compat.h> /* * Define an illegal instr to trap on the bug. * We don't use 0 because that marks the end of a function @@ -31,29 +32,29 @@ struct bug_entry *find_bug(unsigned long bugaddr); #define BUG() do { \ __asm__ __volatile__( \ "1: twi 31,0,0\n" \ - ".section __bug_table,\"a\"\n\t" \ - " .llong 1b,%0,%1,%2\n" \ + ".section __bug_table,\"a\"\n" \ + "\t"PPC_LONG" 1b,%0,%1,%2\n" \ ".previous" \ : : "i" (__LINE__), "i" (__FILE__), "i" (__FUNCTION__)); \ } while (0) #define BUG_ON(x) do { \ __asm__ __volatile__( \ - "1: tdnei %0,0\n" \ - ".section __bug_table,\"a\"\n\t" \ - " .llong 1b,%1,%2,%3\n" \ + "1: "PPC_TLNEI" %0,0\n" \ + ".section __bug_table,\"a\"\n" \ + "\t"PPC_LONG" 1b,%1,%2,%3\n" \ ".previous" \ - : : "r" ((long long)(x)), "i" (__LINE__), \ + : : "r" ((long)(x)), "i" (__LINE__), \ "i" (__FILE__), "i" (__FUNCTION__)); \ } while (0) #define WARN_ON(x) do { \ __asm__ __volatile__( \ - "1: tdnei %0,0\n" \ - ".section __bug_table,\"a\"\n\t" \ - " .llong 1b,%1,%2,%3\n" \ + "1: "PPC_TLNEI" %0,0\n" \ + ".section __bug_table,\"a\"\n" \ + "\t"PPC_LONG" 1b,%1,%2,%3\n" \ ".previous" \ - : : "r" ((long long)(x)), \ + : : "r" ((long)(x)), \ "i" (__LINE__ + BUG_WARNING_TRAP), \ "i" (__FILE__), "i" (__FUNCTION__)); \ } while (0) @@ -61,9 +62,9 @@ struct bug_entry *find_bug(unsigned long bugaddr); #define HAVE_ARCH_BUG #define HAVE_ARCH_BUG_ON #define HAVE_ARCH_WARN_ON -#endif -#endif +#endif /* CONFIG_BUG */ +#endif /* __ASSEMBLY __ */ #include <asm-generic/bug.h> -#endif +#endif /* _ASM_POWERPC_BUG_H */ diff --git a/include/asm-ppc64/byteorder.h b/include/asm-powerpc/byteorder.h index 8b57da62b674..b37752214a16 100644 --- a/include/asm-ppc64/byteorder.h +++ b/include/asm-powerpc/byteorder.h @@ -1,5 +1,5 @@ -#ifndef _PPC64_BYTEORDER_H -#define _PPC64_BYTEORDER_H +#ifndef _ASM_POWERPC_BYTEORDER_H +#define _ASM_POWERPC_BYTEORDER_H /* * This program is free software; you can redistribute it and/or @@ -77,10 +77,13 @@ static __inline__ __attribute_const__ __u32 ___arch__swab32(__u32 value) #ifndef __STRICT_ANSI__ #define __BYTEORDER_HAS_U64__ -#endif +#ifndef __powerpc64__ +#define __SWAB_64_THRU_32__ +#endif /* __powerpc64__ */ +#endif /* __STRICT_ANSI__ */ #endif /* __GNUC__ */ #include <linux/byteorder/big_endian.h> -#endif /* _PPC64_BYTEORDER_H */ +#endif /* _ASM_POWERPC_BYTEORDER_H */ diff --git a/include/asm-powerpc/cache.h b/include/asm-powerpc/cache.h new file mode 100644 index 000000000000..26ce502e76e8 --- /dev/null +++ b/include/asm-powerpc/cache.h @@ -0,0 +1,40 @@ +#ifndef _ASM_POWERPC_CACHE_H +#define _ASM_POWERPC_CACHE_H + +#ifdef __KERNEL__ + +#include <linux/config.h> + +/* bytes per L1 cache line */ +#if defined(CONFIG_8xx) || defined(CONFIG_403GCX) +#define L1_CACHE_SHIFT 4 +#define MAX_COPY_PREFETCH 1 +#elif defined(CONFIG_PPC32) +#define L1_CACHE_SHIFT 5 +#define MAX_COPY_PREFETCH 4 +#else /* CONFIG_PPC64 */ +#define L1_CACHE_SHIFT 7 +#endif + +#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT) + +#define SMP_CACHE_BYTES L1_CACHE_BYTES +#define L1_CACHE_SHIFT_MAX 7 /* largest L1 which this arch supports */ + +#if defined(__powerpc64__) && !defined(__ASSEMBLY__) +struct ppc64_caches { + u32 dsize; /* L1 d-cache size */ + u32 dline_size; /* L1 d-cache line size */ + u32 log_dline_size; + u32 dlines_per_page; + u32 isize; /* L1 i-cache size */ + u32 iline_size; /* L1 i-cache line size */ + u32 log_iline_size; + u32 ilines_per_page; +}; + +extern struct ppc64_caches ppc64_caches; +#endif /* __powerpc64__ && ! __ASSEMBLY__ */ + +#endif /* __KERNEL__ */ +#endif /* _ASM_POWERPC_CACHE_H */ diff --git a/include/asm-ppc64/cacheflush.h b/include/asm-powerpc/cacheflush.h index ffbc08be8e52..8a740c88d93d 100644 --- a/include/asm-ppc64/cacheflush.h +++ b/include/asm-powerpc/cacheflush.h @@ -1,13 +1,20 @@ -#ifndef _PPC64_CACHEFLUSH_H -#define _PPC64_CACHEFLUSH_H +/* + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version + * 2 of the License, or (at your option) any later version. + */ +#ifndef _ASM_POWERPC_CACHEFLUSH_H +#define _ASM_POWERPC_CACHEFLUSH_H + +#ifdef __KERNEL__ #include <linux/mm.h> #include <asm/cputable.h> /* - * No cache flushing is required when address mappings are - * changed, because the caches on PowerPCs are physically - * addressed. + * No cache flushing is required when address mappings are changed, + * because the caches on PowerPCs are physically addressed. */ #define flush_cache_all() do { } while (0) #define flush_cache_mm(mm) do { } while (0) @@ -22,27 +29,40 @@ extern void flush_dcache_page(struct page *page); #define flush_dcache_mmap_unlock(mapping) do { } while (0) extern void __flush_icache_range(unsigned long, unsigned long); +static inline void flush_icache_range(unsigned long start, unsigned long stop) +{ + if (!cpu_has_feature(CPU_FTR_COHERENT_ICACHE)) + __flush_icache_range(start, stop); +} + extern void flush_icache_user_range(struct vm_area_struct *vma, struct page *page, unsigned long addr, int len); +extern void __flush_dcache_icache(void *page_va); +extern void flush_dcache_icache_page(struct page *page); +#if defined(CONFIG_PPC32) && !defined(CONFIG_BOOKE) +extern void __flush_dcache_icache_phys(unsigned long physaddr); +#endif /* CONFIG_PPC32 && !CONFIG_BOOKE */ extern void flush_dcache_range(unsigned long start, unsigned long stop); -extern void flush_dcache_phys_range(unsigned long start, unsigned long stop); +#ifdef CONFIG_PPC32 +extern void clean_dcache_range(unsigned long start, unsigned long stop); +extern void invalidate_dcache_range(unsigned long start, unsigned long stop); +#endif /* CONFIG_PPC32 */ +#ifdef CONFIG_PPC64 extern void flush_inval_dcache_range(unsigned long start, unsigned long stop); +extern void flush_dcache_phys_range(unsigned long start, unsigned long stop); +#endif #define copy_to_user_page(vma, page, vaddr, dst, src, len) \ -do { memcpy(dst, src, len); \ - flush_icache_user_range(vma, page, vaddr, len); \ -} while (0) + do { \ + memcpy(dst, src, len); \ + flush_icache_user_range(vma, page, vaddr, len); \ + } while (0) #define copy_from_user_page(vma, page, vaddr, dst, src, len) \ memcpy(dst, src, len) -extern void __flush_dcache_icache(void *page_va); -static inline void flush_icache_range(unsigned long start, unsigned long stop) -{ - if (!cpu_has_feature(CPU_FTR_COHERENT_ICACHE)) - __flush_icache_range(start, stop); -} +#endif /* __KERNEL__ */ -#endif /* _PPC64_CACHEFLUSH_H */ +#endif /* _ASM_POWERPC_CACHEFLUSH_H */ diff --git a/include/asm-ppc64/checksum.h b/include/asm-powerpc/checksum.h index d22d4469de43..d8354d8a49ce 100644 --- a/include/asm-ppc64/checksum.h +++ b/include/asm-powerpc/checksum.h @@ -1,5 +1,5 @@ -#ifndef _PPC64_CHECKSUM_H -#define _PPC64_CHECKSUM_H +#ifndef _ASM_POWERPC_CHECKSUM_H +#define _ASM_POWERPC_CHECKSUM_H /* * This program is free software; you can redistribute it and/or @@ -41,8 +41,14 @@ extern unsigned int csum_partial(const unsigned char * buff, int len, unsigned int sum); /* - * the same as csum_partial, but copies from src to dst while it - * checksums + * Computes the checksum of a memory block at src, length len, + * and adds in "sum" (32-bit), while copying the block to dst. + * If an access exception occurs on src or dst, it stores -EFAULT + * to *src_err or *dst_err respectively (if that pointer is not + * NULL), and, for an error on src, zeroes the rest of dst. + * + * Like csum_partial, this must be called with even lengths, + * except for the last fragment. */ extern unsigned int csum_partial_copy_generic(const char *src, char *dst, int len, unsigned int sum, @@ -51,12 +57,18 @@ extern unsigned int csum_partial_copy_generic(const char *src, char *dst, * the same as csum_partial, but copies from src to dst while it * checksums. */ - unsigned int csum_partial_copy_nocheck(const char *src, char *dst, int len, unsigned int sum); +#define csum_partial_copy_from_user(src, dst, len, sum, errp) \ + csum_partial_copy_generic((src), (dst), (len), (sum), (errp), NULL) + +#define csum_partial_copy_nocheck(src, dst, len, sum) \ + csum_partial_copy_generic((src), (dst), (len), (sum), NULL, NULL) + + /* * turns a 32-bit partial checksum (e.g. from csum_partial) into a * 1's complement 16-bit checksum. @@ -83,12 +95,7 @@ static inline unsigned short ip_compute_csum(unsigned char * buff, int len) return csum_fold(csum_partial(buff, len, 0)); } -#define csum_partial_copy_from_user(src, dst, len, sum, errp) \ - csum_partial_copy_generic((src), (dst), (len), (sum), (errp), NULL) - -#define csum_partial_copy_nocheck(src, dst, len, sum) \ - csum_partial_copy_generic((src), (dst), (len), (sum), NULL, NULL) - +#ifdef __powerpc64__ static inline u32 csum_tcpudp_nofold(u32 saddr, u32 daddr, unsigned short len, @@ -103,5 +110,23 @@ static inline u32 csum_tcpudp_nofold(u32 saddr, s += (s >> 32); return (u32) s; } +#else +static inline unsigned long csum_tcpudp_nofold(unsigned long saddr, + unsigned long daddr, + unsigned short len, + unsigned short proto, + unsigned int sum) +{ + __asm__("\n\ + addc %0,%0,%1 \n\ + adde %0,%0,%2 \n\ + adde %0,%0,%3 \n\ + addze %0,%0 \n\ + " + : "=r" (sum) + : "r" (daddr), "r"(saddr), "r"((proto<<16)+len), "0"(sum)); + return sum; +} #endif +#endif diff --git a/include/asm-ppc64/compat.h b/include/asm-powerpc/compat.h index 6ec62cd2d1d1..4db4360c4d4a 100644 --- a/include/asm-ppc64/compat.h +++ b/include/asm-powerpc/compat.h @@ -1,5 +1,5 @@ -#ifndef _ASM_PPC64_COMPAT_H -#define _ASM_PPC64_COMPAT_H +#ifndef _ASM_POWERPC_COMPAT_H +#define _ASM_POWERPC_COMPAT_H /* * Architecture specific compatibility types */ @@ -49,7 +49,7 @@ struct compat_stat { compat_dev_t st_dev; compat_ino_t st_ino; compat_mode_t st_mode; - compat_nlink_t st_nlink; + compat_nlink_t st_nlink; __compat_uid32_t st_uid; __compat_gid32_t st_gid; compat_dev_t st_rdev; @@ -202,4 +202,4 @@ struct compat_shmid64_ds { compat_ulong_t __unused6; }; -#endif /* _ASM_PPC64_COMPAT_H */ +#endif /* _ASM_POWERPC_COMPAT_H */ diff --git a/include/asm-powerpc/cputable.h b/include/asm-powerpc/cputable.h new file mode 100644 index 000000000000..d1cfa3f515ea --- /dev/null +++ b/include/asm-powerpc/cputable.h @@ -0,0 +1,436 @@ +#ifndef __ASM_POWERPC_CPUTABLE_H +#define __ASM_POWERPC_CPUTABLE_H + +#include <linux/config.h> +#include <asm/asm-compat.h> + +#define PPC_FEATURE_32 0x80000000 +#define PPC_FEATURE_64 0x40000000 +#define PPC_FEATURE_601_INSTR 0x20000000 +#define PPC_FEATURE_HAS_ALTIVEC 0x10000000 +#define PPC_FEATURE_HAS_FPU 0x08000000 +#define PPC_FEATURE_HAS_MMU 0x04000000 +#define PPC_FEATURE_HAS_4xxMAC 0x02000000 +#define PPC_FEATURE_UNIFIED_CACHE 0x01000000 +#define PPC_FEATURE_HAS_SPE 0x00800000 +#define PPC_FEATURE_HAS_EFP_SINGLE 0x00400000 +#define PPC_FEATURE_HAS_EFP_DOUBLE 0x00200000 +#define PPC_FEATURE_NO_TB 0x00100000 +#define PPC_FEATURE_POWER4 0x00080000 +#define PPC_FEATURE_POWER5 0x00040000 +#define PPC_FEATURE_POWER5_PLUS 0x00020000 +#define PPC_FEATURE_CELL 0x00010000 + +#ifdef __KERNEL__ +#ifndef __ASSEMBLY__ + +/* This structure can grow, it's real size is used by head.S code + * via the mkdefs mechanism. + */ +struct cpu_spec; +struct op_powerpc_model; + +typedef void (*cpu_setup_t)(unsigned long offset, struct cpu_spec* spec); + +struct cpu_spec { + /* CPU is matched via (PVR & pvr_mask) == pvr_value */ + unsigned int pvr_mask; + unsigned int pvr_value; + + char *cpu_name; + unsigned long cpu_features; /* Kernel features */ + unsigned int cpu_user_features; /* Userland features */ + + /* cache line sizes */ + unsigned int icache_bsize; + unsigned int dcache_bsize; + + /* number of performance monitor counters */ + unsigned int num_pmcs; + + /* this is called to initialize various CPU bits like L1 cache, + * BHT, SPD, etc... from head.S before branching to identify_machine + */ + cpu_setup_t cpu_setup; + + /* Used by oprofile userspace to select the right counters */ + char *oprofile_cpu_type; + + /* Processor specific oprofile operations */ + struct op_powerpc_model *oprofile_model; +}; + +extern struct cpu_spec *cur_cpu_spec; + +extern void identify_cpu(unsigned long offset, unsigned long cpu); +extern void do_cpu_ftr_fixups(unsigned long offset); + +#endif /* __ASSEMBLY__ */ + +/* CPU kernel features */ + +/* Retain the 32b definitions all use bottom half of word */ +#define CPU_FTR_SPLIT_ID_CACHE ASM_CONST(0x0000000000000001) +#define CPU_FTR_L2CR ASM_CONST(0x0000000000000002) +#define CPU_FTR_SPEC7450 ASM_CONST(0x0000000000000004) +#define CPU_FTR_ALTIVEC ASM_CONST(0x0000000000000008) +#define CPU_FTR_TAU ASM_CONST(0x0000000000000010) +#define CPU_FTR_CAN_DOZE ASM_CONST(0x0000000000000020) +#define CPU_FTR_USE_TB ASM_CONST(0x0000000000000040) +#define CPU_FTR_604_PERF_MON ASM_CONST(0x0000000000000080) +#define CPU_FTR_601 ASM_CONST(0x0000000000000100) +#define CPU_FTR_HPTE_TABLE ASM_CONST(0x0000000000000200) +#define CPU_FTR_CAN_NAP ASM_CONST(0x0000000000000400) +#define CPU_FTR_L3CR ASM_CONST(0x0000000000000800) +#define CPU_FTR_L3_DISABLE_NAP ASM_CONST(0x0000000000001000) +#define CPU_FTR_NAP_DISABLE_L2_PR ASM_CONST(0x0000000000002000) +#define CPU_FTR_DUAL_PLL_750FX ASM_CONST(0x0000000000004000) +#define CPU_FTR_NO_DPM ASM_CONST(0x0000000000008000) +#define CPU_FTR_HAS_HIGH_BATS ASM_CONST(0x0000000000010000) +#define CPU_FTR_NEED_COHERENT ASM_CONST(0x0000000000020000) +#define CPU_FTR_NO_BTIC ASM_CONST(0x0000000000040000) +#define CPU_FTR_BIG_PHYS ASM_CONST(0x0000000000080000) +#define CPU_FTR_NODSISRALIGN ASM_CONST(0x0000000000100000) + +#ifdef __powerpc64__ +/* Add the 64b processor unique features in the top half of the word */ +#define CPU_FTR_SLB ASM_CONST(0x0000000100000000) +#define CPU_FTR_16M_PAGE ASM_CONST(0x0000000200000000) +#define CPU_FTR_TLBIEL ASM_CONST(0x0000000400000000) +#define CPU_FTR_NOEXECUTE ASM_CONST(0x0000000800000000) +#define CPU_FTR_IABR ASM_CONST(0x0000002000000000) +#define CPU_FTR_MMCRA ASM_CONST(0x0000004000000000) +#define CPU_FTR_CTRL ASM_CONST(0x0000008000000000) +#define CPU_FTR_SMT ASM_CONST(0x0000010000000000) +#define CPU_FTR_COHERENT_ICACHE ASM_CONST(0x0000020000000000) +#define CPU_FTR_LOCKLESS_TLBIE ASM_CONST(0x0000040000000000) +#define CPU_FTR_MMCRA_SIHV ASM_CONST(0x0000080000000000) +#define CPU_FTR_CI_LARGE_PAGE ASM_CONST(0x0000100000000000) +#else +/* ensure on 32b processors the flags are available for compiling but + * don't do anything */ +#define CPU_FTR_SLB ASM_CONST(0x0) +#define CPU_FTR_16M_PAGE ASM_CONST(0x0) +#define CPU_FTR_TLBIEL ASM_CONST(0x0) +#define CPU_FTR_NOEXECUTE ASM_CONST(0x0) +#define CPU_FTR_IABR ASM_CONST(0x0) +#define CPU_FTR_MMCRA ASM_CONST(0x0) +#define CPU_FTR_CTRL ASM_CONST(0x0) +#define CPU_FTR_SMT ASM_CONST(0x0) +#define CPU_FTR_COHERENT_ICACHE ASM_CONST(0x0) +#define CPU_FTR_LOCKLESS_TLBIE ASM_CONST(0x0) +#define CPU_FTR_MMCRA_SIHV ASM_CONST(0x0) +#define CPU_FTR_CI_LARGE_PAGE ASM_CONST(0x0) +#endif + +#ifndef __ASSEMBLY__ + +#define CPU_FTR_PPCAS_ARCH_V2_BASE (CPU_FTR_SLB | \ + CPU_FTR_TLBIEL | CPU_FTR_NOEXECUTE | \ + CPU_FTR_NODSISRALIGN | CPU_FTR_CTRL) + +/* iSeries doesn't support large pages */ +#ifdef CONFIG_PPC_ISERIES +#define CPU_FTR_PPCAS_ARCH_V2 (CPU_FTR_PPCAS_ARCH_V2_BASE) +#else +#define CPU_FTR_PPCAS_ARCH_V2 (CPU_FTR_PPCAS_ARCH_V2_BASE | CPU_FTR_16M_PAGE) +#endif /* CONFIG_PPC_ISERIES */ + +/* We only set the altivec features if the kernel was compiled with altivec + * support + */ +#ifdef CONFIG_ALTIVEC +#define CPU_FTR_ALTIVEC_COMP CPU_FTR_ALTIVEC +#define PPC_FEATURE_HAS_ALTIVEC_COMP PPC_FEATURE_HAS_ALTIVEC +#else +#define CPU_FTR_ALTIVEC_COMP 0 +#define PPC_FEATURE_HAS_ALTIVEC_COMP 0 +#endif + +/* We need to mark all pages as being coherent if we're SMP or we + * have a 74[45]x and an MPC107 host bridge. + */ +#if defined(CONFIG_SMP) || defined(CONFIG_MPC10X_BRIDGE) +#define CPU_FTR_COMMON CPU_FTR_NEED_COHERENT +#else +#define CPU_FTR_COMMON 0 +#endif + +/* The powersave features NAP & DOZE seems to confuse BDI when + debugging. So if a BDI is used, disable theses + */ +#ifndef CONFIG_BDI_SWITCH +#define CPU_FTR_MAYBE_CAN_DOZE CPU_FTR_CAN_DOZE +#define CPU_FTR_MAYBE_CAN_NAP CPU_FTR_CAN_NAP +#else +#define CPU_FTR_MAYBE_CAN_DOZE 0 +#define CPU_FTR_MAYBE_CAN_NAP 0 +#endif + +#define CLASSIC_PPC (!defined(CONFIG_8xx) && !defined(CONFIG_4xx) && \ + !defined(CONFIG_POWER3) && !defined(CONFIG_POWER4) && \ + !defined(CONFIG_BOOKE)) + +enum { + CPU_FTRS_PPC601 = CPU_FTR_COMMON | CPU_FTR_601 | CPU_FTR_HPTE_TABLE, + CPU_FTRS_603 = CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE | + CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | + CPU_FTR_MAYBE_CAN_NAP, + CPU_FTRS_604 = CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE | + CPU_FTR_USE_TB | CPU_FTR_604_PERF_MON | CPU_FTR_HPTE_TABLE, + CPU_FTRS_740_NOTAU = CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE | + CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | CPU_FTR_L2CR | + CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP, + CPU_FTRS_740 = CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE | + CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | CPU_FTR_L2CR | + CPU_FTR_TAU | CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP, + CPU_FTRS_750 = CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE | + CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | CPU_FTR_L2CR | + CPU_FTR_TAU | CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP, + CPU_FTRS_750FX1 = CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE | + CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | CPU_FTR_L2CR | + CPU_FTR_TAU | CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP | + CPU_FTR_DUAL_PLL_750FX | CPU_FTR_NO_DPM, + CPU_FTRS_750FX2 = CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE | + CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | CPU_FTR_L2CR | + CPU_FTR_TAU | CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP | + CPU_FTR_NO_DPM, + CPU_FTRS_750FX = CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE | + CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | CPU_FTR_L2CR | + CPU_FTR_TAU | CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP | + CPU_FTR_DUAL_PLL_750FX | CPU_FTR_HAS_HIGH_BATS, + CPU_FTRS_750GX = CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_MAYBE_CAN_DOZE | + CPU_FTR_USE_TB | CPU_FTR_L2CR | CPU_FTR_TAU | + CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP | + CPU_FTR_DUAL_PLL_750FX | CPU_FTR_HAS_HIGH_BATS, + CPU_FTRS_7400_NOTAU = CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE | + CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | CPU_FTR_L2CR | + CPU_FTR_ALTIVEC_COMP | CPU_FTR_HPTE_TABLE | + CPU_FTR_MAYBE_CAN_NAP, + CPU_FTRS_7400 = CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE | + CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | CPU_FTR_L2CR | + CPU_FTR_TAU | CPU_FTR_ALTIVEC_COMP | CPU_FTR_HPTE_TABLE | + CPU_FTR_MAYBE_CAN_NAP, + CPU_FTRS_7450_20 = CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE | + CPU_FTR_USE_TB | CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | + CPU_FTR_L3CR | CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 | + CPU_FTR_NEED_COHERENT, + CPU_FTRS_7450_21 = CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE | + CPU_FTR_USE_TB | + CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | + CPU_FTR_L3CR | CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 | + CPU_FTR_NAP_DISABLE_L2_PR | CPU_FTR_L3_DISABLE_NAP | + CPU_FTR_NEED_COHERENT, + CPU_FTRS_7450_23 = CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE | + CPU_FTR_USE_TB | + CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | + CPU_FTR_L3CR | CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 | + CPU_FTR_NAP_DISABLE_L2_PR | CPU_FTR_NEED_COHERENT, + CPU_FTRS_7455_1 = CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE | + CPU_FTR_USE_TB | + CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | CPU_FTR_L3CR | + CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 | CPU_FTR_HAS_HIGH_BATS | + CPU_FTR_NEED_COHERENT, + CPU_FTRS_7455_20 = CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE | + CPU_FTR_USE_TB | + CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | + CPU_FTR_L3CR | CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 | + CPU_FTR_NAP_DISABLE_L2_PR | CPU_FTR_L3_DISABLE_NAP | + CPU_FTR_NEED_COHERENT | CPU_FTR_HAS_HIGH_BATS, + CPU_FTRS_7455 = CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE | + CPU_FTR_USE_TB | + CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | + CPU_FTR_L3CR | CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 | + CPU_FTR_NAP_DISABLE_L2_PR | CPU_FTR_HAS_HIGH_BATS | + CPU_FTR_NEED_COHERENT, + CPU_FTRS_7447_10 = CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE | + CPU_FTR_USE_TB | + CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | + CPU_FTR_L3CR | CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 | + CPU_FTR_NAP_DISABLE_L2_PR | CPU_FTR_HAS_HIGH_BATS | + CPU_FTR_NEED_COHERENT | CPU_FTR_NO_BTIC, + CPU_FTRS_7447 = CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE | + CPU_FTR_USE_TB | + CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | + CPU_FTR_L3CR | CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 | + CPU_FTR_NAP_DISABLE_L2_PR | CPU_FTR_HAS_HIGH_BATS | + CPU_FTR_NEED_COHERENT, + CPU_FTRS_7447A = CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE | + CPU_FTR_USE_TB | + CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | + CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 | + CPU_FTR_NAP_DISABLE_L2_PR | CPU_FTR_HAS_HIGH_BATS | + CPU_FTR_NEED_COHERENT, + CPU_FTRS_82XX = CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE | + CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB, + CPU_FTRS_G2_LE = CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_MAYBE_CAN_DOZE | + CPU_FTR_USE_TB | CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_HAS_HIGH_BATS, + CPU_FTRS_E300 = CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_MAYBE_CAN_DOZE | + CPU_FTR_USE_TB | CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_HAS_HIGH_BATS, + CPU_FTRS_CLASSIC32 = CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE | + CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE, + CPU_FTRS_POWER3_32 = CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE | + CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE, + CPU_FTRS_POWER4_32 = CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE | + CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE | CPU_FTR_NODSISRALIGN, + CPU_FTRS_970_32 = CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE | + CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE | CPU_FTR_ALTIVEC_COMP | + CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_NODSISRALIGN, + CPU_FTRS_8XX = CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB, + CPU_FTRS_40X = CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | + CPU_FTR_NODSISRALIGN, + CPU_FTRS_44X = CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | + CPU_FTR_NODSISRALIGN, + CPU_FTRS_E200 = CPU_FTR_USE_TB | CPU_FTR_NODSISRALIGN, + CPU_FTRS_E500 = CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | + CPU_FTR_NODSISRALIGN, + CPU_FTRS_E500_2 = CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | + CPU_FTR_BIG_PHYS | CPU_FTR_NODSISRALIGN, + CPU_FTRS_GENERIC_32 = CPU_FTR_COMMON | CPU_FTR_NODSISRALIGN, +#ifdef __powerpc64__ + CPU_FTRS_POWER3 = CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | + CPU_FTR_HPTE_TABLE | CPU_FTR_IABR, + CPU_FTRS_RS64 = CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | + CPU_FTR_HPTE_TABLE | CPU_FTR_IABR | + CPU_FTR_MMCRA | CPU_FTR_CTRL, + CPU_FTRS_POWER4 = CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | + CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_MMCRA, + CPU_FTRS_PPC970 = CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | + CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | + CPU_FTR_ALTIVEC_COMP | CPU_FTR_CAN_NAP | CPU_FTR_MMCRA, + CPU_FTRS_POWER5 = CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | + CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | + CPU_FTR_MMCRA | CPU_FTR_SMT | + CPU_FTR_COHERENT_ICACHE | CPU_FTR_LOCKLESS_TLBIE | + CPU_FTR_MMCRA_SIHV, + CPU_FTRS_CELL = CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | + CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | + CPU_FTR_ALTIVEC_COMP | CPU_FTR_MMCRA | CPU_FTR_SMT, + CPU_FTRS_COMPATIBLE = CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | + CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2, +#endif + + CPU_FTRS_POSSIBLE = +#if CLASSIC_PPC + CPU_FTRS_PPC601 | CPU_FTRS_603 | CPU_FTRS_604 | CPU_FTRS_740_NOTAU | + CPU_FTRS_740 | CPU_FTRS_750 | CPU_FTRS_750FX1 | + CPU_FTRS_750FX2 | CPU_FTRS_750FX | CPU_FTRS_750GX | + CPU_FTRS_7400_NOTAU | CPU_FTRS_7400 | CPU_FTRS_7450_20 | + CPU_FTRS_7450_21 | CPU_FTRS_7450_23 | CPU_FTRS_7455_1 | + CPU_FTRS_7455_20 | CPU_FTRS_7455 | CPU_FTRS_7447_10 | + CPU_FTRS_7447 | CPU_FTRS_7447A | CPU_FTRS_82XX | + CPU_FTRS_G2_LE | CPU_FTRS_E300 | CPU_FTRS_CLASSIC32 | +#else + CPU_FTRS_GENERIC_32 | +#endif +#ifdef CONFIG_PPC64BRIDGE + CPU_FTRS_POWER3_32 | +#endif +#ifdef CONFIG_POWER4 + CPU_FTRS_POWER4_32 | CPU_FTRS_970_32 | +#endif +#ifdef CONFIG_8xx + CPU_FTRS_8XX | +#endif +#ifdef CONFIG_40x + CPU_FTRS_40X | +#endif +#ifdef CONFIG_44x + CPU_FTRS_44X | +#endif +#ifdef CONFIG_E200 + CPU_FTRS_E200 | +#endif +#ifdef CONFIG_E500 + CPU_FTRS_E500 | CPU_FTRS_E500_2 | +#endif +#ifdef __powerpc64__ + CPU_FTRS_POWER3 | CPU_FTRS_RS64 | CPU_FTRS_POWER4 | + CPU_FTRS_PPC970 | CPU_FTRS_POWER5 | CPU_FTRS_CELL | + CPU_FTR_CI_LARGE_PAGE | +#endif + 0, + + CPU_FTRS_ALWAYS = +#if CLASSIC_PPC + CPU_FTRS_PPC601 & CPU_FTRS_603 & CPU_FTRS_604 & CPU_FTRS_740_NOTAU & + CPU_FTRS_740 & CPU_FTRS_750 & CPU_FTRS_750FX1 & + CPU_FTRS_750FX2 & CPU_FTRS_750FX & CPU_FTRS_750GX & + CPU_FTRS_7400_NOTAU & CPU_FTRS_7400 & CPU_FTRS_7450_20 & + CPU_FTRS_7450_21 & CPU_FTRS_7450_23 & CPU_FTRS_7455_1 & + CPU_FTRS_7455_20 & CPU_FTRS_7455 & CPU_FTRS_7447_10 & + CPU_FTRS_7447 & CPU_FTRS_7447A & CPU_FTRS_82XX & + CPU_FTRS_G2_LE & CPU_FTRS_E300 & CPU_FTRS_CLASSIC32 & +#else + CPU_FTRS_GENERIC_32 & +#endif +#ifdef CONFIG_PPC64BRIDGE + CPU_FTRS_POWER3_32 & +#endif +#ifdef CONFIG_POWER4 + CPU_FTRS_POWER4_32 & CPU_FTRS_970_32 & +#endif +#ifdef CONFIG_8xx + CPU_FTRS_8XX & +#endif +#ifdef CONFIG_40x + CPU_FTRS_40X & +#endif +#ifdef CONFIG_44x + CPU_FTRS_44X & +#endif +#ifdef CONFIG_E200 + CPU_FTRS_E200 & +#endif +#ifdef CONFIG_E500 + CPU_FTRS_E500 & CPU_FTRS_E500_2 & +#endif +#ifdef __powerpc64__ + CPU_FTRS_POWER3 & CPU_FTRS_RS64 & CPU_FTRS_POWER4 & + CPU_FTRS_PPC970 & CPU_FTRS_POWER5 & CPU_FTRS_CELL & +#endif + CPU_FTRS_POSSIBLE, +}; + +static inline int cpu_has_feature(unsigned long feature) +{ + return (CPU_FTRS_ALWAYS & feature) || + (CPU_FTRS_POSSIBLE + & cur_cpu_spec->cpu_features + & feature); +} + +#endif /* !__ASSEMBLY__ */ + +#ifdef __ASSEMBLY__ + +#define BEGIN_FTR_SECTION 98: + +#ifndef __powerpc64__ +#define END_FTR_SECTION(msk, val) \ +99: \ + .section __ftr_fixup,"a"; \ + .align 2; \ + .long msk; \ + .long val; \ + .long 98b; \ + .long 99b; \ + .previous +#else /* __powerpc64__ */ +#define END_FTR_SECTION(msk, val) \ +99: \ + .section __ftr_fixup,"a"; \ + .align 3; \ + .llong msk; \ + .llong val; \ + .llong 98b; \ + .llong 99b; \ + .previous +#endif /* __powerpc64__ */ + +#define END_FTR_SECTION_IFSET(msk) END_FTR_SECTION((msk), (msk)) +#define END_FTR_SECTION_IFCLR(msk) END_FTR_SECTION((msk), 0) +#endif /* __ASSEMBLY__ */ + +#endif /* __KERNEL__ */ +#endif /* __ASM_POWERPC_CPUTABLE_H */ diff --git a/include/asm-powerpc/current.h b/include/asm-powerpc/current.h new file mode 100644 index 000000000000..82cd4a9ca99a --- /dev/null +++ b/include/asm-powerpc/current.h @@ -0,0 +1,27 @@ +#ifndef _ASM_POWERPC_CURRENT_H +#define _ASM_POWERPC_CURRENT_H + +/* + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version + * 2 of the License, or (at your option) any later version. + */ + +struct task_struct; + +#ifdef __powerpc64__ +#include <asm/paca.h> + +#define current (get_paca()->__current) + +#else + +/* + * We keep `current' in r2 for speed. + */ +register struct task_struct *current asm ("r2"); + +#endif + +#endif /* _ASM_POWERPC_CURRENT_H */ diff --git a/include/asm-ppc/dbdma.h b/include/asm-powerpc/dbdma.h index 8973565f95d3..8973565f95d3 100644 --- a/include/asm-ppc/dbdma.h +++ b/include/asm-powerpc/dbdma.h diff --git a/include/asm-powerpc/delay.h b/include/asm-powerpc/delay.h new file mode 100644 index 000000000000..54fe1f4f8fd0 --- /dev/null +++ b/include/asm-powerpc/delay.h @@ -0,0 +1,19 @@ +#ifndef _ASM_POWERPC_DELAY_H +#define _ASM_POWERPC_DELAY_H + +/* + * Copyright 1996, Paul Mackerras. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version + * 2 of the License, or (at your option) any later version. + * + * PPC64 Support added by Dave Engebretsen, Todd Inglett, Mike Corrigan, + * Anton Blanchard. + */ + +extern void __delay(unsigned long loops); +extern void udelay(unsigned long usecs); + +#endif /* _ASM_POWERPC_DELAY_H */ diff --git a/include/asm-ppc/dma-mapping.h b/include/asm-powerpc/dma-mapping.h index 92b8ee78dcc2..59a80163f75f 100644 --- a/include/asm-ppc/dma-mapping.h +++ b/include/asm-powerpc/dma-mapping.h @@ -1,15 +1,22 @@ /* - * This is based on both include/asm-sh/dma-mapping.h and - * include/asm-ppc/pci.h + * Copyright (C) 2004 IBM + * + * Implements the generic device dma API for powerpc. + * the pci and vio busses */ -#ifndef __ASM_PPC_DMA_MAPPING_H -#define __ASM_PPC_DMA_MAPPING_H +#ifndef _ASM_DMA_MAPPING_H +#define _ASM_DMA_MAPPING_H #include <linux/config.h> +#include <linux/types.h> +#include <linux/cache.h> /* need struct page definitions */ #include <linux/mm.h> #include <asm/scatterlist.h> #include <asm/io.h> +#include <asm/bug.h> + +#define DMA_ERROR_CODE (~(dma_addr_t)0x0) #ifdef CONFIG_NOT_COHERENT_CACHE /* @@ -19,27 +26,17 @@ * allocate the space "normally" and use the cache management functions * to ensure it is consistent. */ -extern void *__dma_alloc_coherent(size_t size, dma_addr_t *handle, int gfp); +extern void *__dma_alloc_coherent(size_t size, dma_addr_t *handle, gfp_t gfp); extern void __dma_free_coherent(size_t size, void *vaddr); extern void __dma_sync(void *vaddr, size_t size, int direction); extern void __dma_sync_page(struct page *page, unsigned long offset, size_t size, int direction); -#define dma_cache_inv(_start,_size) \ - invalidate_dcache_range(_start, (_start + _size)) -#define dma_cache_wback(_start,_size) \ - clean_dcache_range(_start, (_start + _size)) -#define dma_cache_wback_inv(_start,_size) \ - flush_dcache_range(_start, (_start + _size)) #else /* ! CONFIG_NOT_COHERENT_CACHE */ /* * Cache coherent cores. */ -#define dma_cache_inv(_start,_size) do { } while (0) -#define dma_cache_wback(_start,_size) do { } while (0) -#define dma_cache_wback_inv(_start,_size) do { } while (0) - #define __dma_alloc_coherent(gfp, size, handle) NULL #define __dma_free_coherent(size, addr) do { } while (0) #define __dma_sync(addr, size, rw) do { } while (0) @@ -47,6 +44,30 @@ extern void __dma_sync_page(struct page *page, unsigned long offset, #endif /* ! CONFIG_NOT_COHERENT_CACHE */ +#ifdef CONFIG_PPC64 + +extern int dma_supported(struct device *dev, u64 mask); +extern int dma_set_mask(struct device *dev, u64 dma_mask); +extern void *dma_alloc_coherent(struct device *dev, size_t size, + dma_addr_t *dma_handle, gfp_t flag); +extern void dma_free_coherent(struct device *dev, size_t size, void *cpu_addr, + dma_addr_t dma_handle); +extern dma_addr_t dma_map_single(struct device *dev, void *cpu_addr, + size_t size, enum dma_data_direction direction); +extern void dma_unmap_single(struct device *dev, dma_addr_t dma_addr, + size_t size, enum dma_data_direction direction); +extern dma_addr_t dma_map_page(struct device *dev, struct page *page, + unsigned long offset, size_t size, + enum dma_data_direction direction); +extern void dma_unmap_page(struct device *dev, dma_addr_t dma_address, + size_t size, enum dma_data_direction direction); +extern int dma_map_sg(struct device *dev, struct scatterlist *sg, int nents, + enum dma_data_direction direction); +extern void dma_unmap_sg(struct device *dev, struct scatterlist *sg, + int nhwentries, enum dma_data_direction direction); + +#else /* CONFIG_PPC64 */ + #define dma_supported(dev, mask) (1) static inline int dma_set_mask(struct device *dev, u64 dma_mask) @@ -61,7 +82,7 @@ static inline int dma_set_mask(struct device *dev, u64 dma_mask) static inline void *dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t * dma_handle, - unsigned int __nocast gfp) + gfp_t gfp) { #ifdef CONFIG_NOT_COHERENT_CACHE return __dma_alloc_coherent(size, dma_handle, gfp); @@ -144,29 +165,27 @@ dma_map_sg(struct device *dev, struct scatterlist *sg, int nents, /* We don't do anything here. */ #define dma_unmap_sg(dev, sg, nents, dir) do { } while (0) -static inline void -dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle, - size_t size, - enum dma_data_direction direction) +#endif /* CONFIG_PPC64 */ + +static inline void dma_sync_single_for_cpu(struct device *dev, + dma_addr_t dma_handle, size_t size, + enum dma_data_direction direction) { BUG_ON(direction == DMA_NONE); - __dma_sync(bus_to_virt(dma_handle), size, direction); } -static inline void -dma_sync_single_for_device(struct device *dev, dma_addr_t dma_handle, - size_t size, - enum dma_data_direction direction) +static inline void dma_sync_single_for_device(struct device *dev, + dma_addr_t dma_handle, size_t size, + enum dma_data_direction direction) { BUG_ON(direction == DMA_NONE); - __dma_sync(bus_to_virt(dma_handle), size, direction); } -static inline void -dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, int nents, - enum dma_data_direction direction) +static inline void dma_sync_sg_for_cpu(struct device *dev, + struct scatterlist *sg, int nents, + enum dma_data_direction direction) { int i; @@ -176,9 +195,9 @@ dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, int nents, __dma_sync_page(sg->page, sg->offset, sg->length, direction); } -static inline void -dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nents, - enum dma_data_direction direction) +static inline void dma_sync_sg_for_device(struct device *dev, + struct scatterlist *sg, int nents, + enum dma_data_direction direction) { int i; @@ -188,6 +207,15 @@ dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nents, __dma_sync_page(sg->page, sg->offset, sg->length, direction); } +static inline int dma_mapping_error(dma_addr_t dma_addr) +{ +#ifdef CONFIG_PPC64 + return (dma_addr == DMA_ERROR_CODE); +#else + return 0; +#endif +} + #define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f) #define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h) #ifdef CONFIG_NOT_COHERENT_CACHE @@ -198,40 +226,60 @@ dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nents, static inline int dma_get_cache_alignment(void) { +#ifdef CONFIG_PPC64 + /* no easy way to get cache size on all processors, so return + * the maximum possible, to be safe */ + return (1 << L1_CACHE_SHIFT_MAX); +#else /* * Each processor family will define its own L1_CACHE_SHIFT, * L1_CACHE_BYTES wraps to this, so this is always safe. */ return L1_CACHE_BYTES; +#endif } -static inline void -dma_sync_single_range_for_cpu(struct device *dev, dma_addr_t dma_handle, - unsigned long offset, size_t size, - enum dma_data_direction direction) +static inline void dma_sync_single_range_for_cpu(struct device *dev, + dma_addr_t dma_handle, unsigned long offset, size_t size, + enum dma_data_direction direction) { /* just sync everything for now */ dma_sync_single_for_cpu(dev, dma_handle, offset + size, direction); } -static inline void -dma_sync_single_range_for_device(struct device *dev, dma_addr_t dma_handle, - unsigned long offset, size_t size, - enum dma_data_direction direction) +static inline void dma_sync_single_range_for_device(struct device *dev, + dma_addr_t dma_handle, unsigned long offset, size_t size, + enum dma_data_direction direction) { /* just sync everything for now */ dma_sync_single_for_device(dev, dma_handle, offset + size, direction); } static inline void dma_cache_sync(void *vaddr, size_t size, - enum dma_data_direction direction) + enum dma_data_direction direction) { + BUG_ON(direction == DMA_NONE); __dma_sync(vaddr, size, (int)direction); } -static inline int dma_mapping_error(dma_addr_t dma_addr) -{ - return 0; -} - -#endif /* __ASM_PPC_DMA_MAPPING_H */ +/* + * DMA operations are abstracted for G5 vs. i/pSeries, PCI vs. VIO + */ +struct dma_mapping_ops { + void * (*alloc_coherent)(struct device *dev, size_t size, + dma_addr_t *dma_handle, gfp_t flag); + void (*free_coherent)(struct device *dev, size_t size, + void *vaddr, dma_addr_t dma_handle); + dma_addr_t (*map_single)(struct device *dev, void *ptr, + size_t size, enum dma_data_direction direction); + void (*unmap_single)(struct device *dev, dma_addr_t dma_addr, + size_t size, enum dma_data_direction direction); + int (*map_sg)(struct device *dev, struct scatterlist *sg, + int nents, enum dma_data_direction direction); + void (*unmap_sg)(struct device *dev, struct scatterlist *sg, + int nents, enum dma_data_direction direction); + int (*dma_supported)(struct device *dev, u64 mask); + int (*dac_dma_supported)(struct device *dev, u64 mask); +}; + +#endif /* _ASM_DMA_MAPPING_H */ diff --git a/include/asm-ppc/dma.h b/include/asm-powerpc/dma.h index cc8e5cd8c9d2..926378d2cd94 100644 --- a/include/asm-ppc/dma.h +++ b/include/asm-powerpc/dma.h @@ -1,18 +1,14 @@ +#ifndef _ASM_POWERPC_DMA_H +#define _ASM_POWERPC_DMA_H + /* - * include/asm-ppc/dma.h: Defines for using and allocating dma channels. + * Defines for using and allocating dma channels. * Written by Hennus Bergman, 1992. * High DMA channel support & info by Hannu Savolainen * and John Boyd, Nov. 1992. * Changes for ppc sound by Christoph Nadig */ -#ifdef __KERNEL__ - -#include <linux/config.h> -#include <asm/io.h> -#include <linux/spinlock.h> -#include <asm/system.h> - /* * Note: Adapted for PowerPC by Gary Thomas * Modified by Cort Dougan <cort@cs.nmt.edu> @@ -25,8 +21,10 @@ * with a grain of salt. */ -#ifndef _ASM_DMA_H -#define _ASM_DMA_H +#include <linux/config.h> +#include <asm/io.h> +#include <linux/spinlock.h> +#include <asm/system.h> #ifndef MAX_DMA_CHANNELS #define MAX_DMA_CHANNELS 8 @@ -34,11 +32,9 @@ /* The maximum address that we can perform a DMA transfer to on this platform */ /* Doesn't really apply... */ -#define MAX_DMA_ADDRESS 0xFFFFFFFF +#define MAX_DMA_ADDRESS (~0UL) -/* in arch/ppc/kernel/setup.c -- Cort */ -extern unsigned long DMA_MODE_WRITE, DMA_MODE_READ; -extern unsigned long ISA_DMA_THRESHOLD; +#if !defined(CONFIG_PPC_ISERIES) || defined(CONFIG_PCI) #ifdef HAVE_REALLY_SLOW_DMA_CONTROLLER #define dma_outb outb_p @@ -171,7 +167,18 @@ extern long ppc_cs4232_dma, ppc_cs4232_dma2; #define DMA1_EXT_REG 0x40B #define DMA2_EXT_REG 0x4D6 +#ifndef __powerpc64__ + /* in arch/ppc/kernel/setup.c -- Cort */ + extern unsigned int DMA_MODE_WRITE; + extern unsigned int DMA_MODE_READ; + extern unsigned long ISA_DMA_THRESHOLD; +#else + #define DMA_MODE_READ 0x44 /* I/O to memory, no autoinit, increment, single mode */ + #define DMA_MODE_WRITE 0x48 /* memory to I/O, no autoinit, increment, single mode */ +#endif + #define DMA_MODE_CASCADE 0xC0 /* pass thru DREQ->HRQ, DACK<-HLDA only */ + #define DMA_AUTOINIT 0x10 extern spinlock_t dma_spin_lock; @@ -200,8 +207,9 @@ static __inline__ void enable_dma(unsigned int dmanr) if (dmanr <= 3) { dma_outb(dmanr, DMA1_MASK_REG); dma_outb(ucDmaCmd, DMA1_CMD_REG); /* Enable group */ - } else + } else { dma_outb(dmanr & 3, DMA2_MASK_REG); + } } static __inline__ void disable_dma(unsigned int dmanr) @@ -290,19 +298,26 @@ static __inline__ void set_dma_page(unsigned int dmanr, int pagenr) static __inline__ void set_dma_addr(unsigned int dmanr, unsigned int phys) { if (dmanr <= 3) { - dma_outb(phys & 0xff, ((dmanr & 3) << 1) + IO_DMA1_BASE); - dma_outb((phys >> 8) & 0xff, ((dmanr & 3) << 1) + IO_DMA1_BASE); + dma_outb(phys & 0xff, + ((dmanr & 3) << 1) + IO_DMA1_BASE); + dma_outb((phys >> 8) & 0xff, + ((dmanr & 3) << 1) + IO_DMA1_BASE); } else if (dmanr == SND_DMA1 || dmanr == SND_DMA2) { - dma_outb(phys & 0xff, ((dmanr & 3) << 2) + IO_DMA2_BASE); - dma_outb((phys >> 8) & 0xff, ((dmanr & 3) << 2) + IO_DMA2_BASE); + dma_outb(phys & 0xff, + ((dmanr & 3) << 2) + IO_DMA2_BASE); + dma_outb((phys >> 8) & 0xff, + ((dmanr & 3) << 2) + IO_DMA2_BASE); dma_outb((dmanr & 3), DMA2_EXT_REG); } else { - dma_outb((phys >> 1) & 0xff, ((dmanr & 3) << 2) + IO_DMA2_BASE); - dma_outb((phys >> 9) & 0xff, ((dmanr & 3) << 2) + IO_DMA2_BASE); + dma_outb((phys >> 1) & 0xff, + ((dmanr & 3) << 2) + IO_DMA2_BASE); + dma_outb((phys >> 9) & 0xff, + ((dmanr & 3) << 2) + IO_DMA2_BASE); } set_dma_page(dmanr, phys >> 16); } + /* Set transfer size (max 64k for DMA1..3, 128k for DMA5..7) for * a specific DMA channel. * You must ensure the parameters are valid. @@ -315,21 +330,24 @@ static __inline__ void set_dma_count(unsigned int dmanr, unsigned int count) { count--; if (dmanr <= 3) { - dma_outb(count & 0xff, ((dmanr & 3) << 1) + 1 + IO_DMA1_BASE); - dma_outb((count >> 8) & 0xff, ((dmanr & 3) << 1) + 1 + - IO_DMA1_BASE); + dma_outb(count & 0xff, + ((dmanr & 3) << 1) + 1 + IO_DMA1_BASE); + dma_outb((count >> 8) & 0xff, + ((dmanr & 3) << 1) + 1 + IO_DMA1_BASE); } else if (dmanr == SND_DMA1 || dmanr == SND_DMA2) { - dma_outb(count & 0xff, ((dmanr & 3) << 2) + 2 + IO_DMA2_BASE); - dma_outb((count >> 8) & 0xff, ((dmanr & 3) << 2) + 2 + - IO_DMA2_BASE); + dma_outb(count & 0xff, + ((dmanr & 3) << 2) + 2 + IO_DMA2_BASE); + dma_outb((count >> 8) & 0xff, + ((dmanr & 3) << 2) + 2 + IO_DMA2_BASE); } else { - dma_outb((count >> 1) & 0xff, ((dmanr & 3) << 2) + 2 + - IO_DMA2_BASE); - dma_outb((count >> 9) & 0xff, ((dmanr & 3) << 2) + 2 + - IO_DMA2_BASE); + dma_outb((count >> 1) & 0xff, + ((dmanr & 3) << 2) + 2 + IO_DMA2_BASE); + dma_outb((count >> 9) & 0xff, + ((dmanr & 3) << 2) + 2 + IO_DMA2_BASE); } } + /* Get DMA residue count. After a DMA transfer, this * should return zero. Reading this while a DMA transfer is * still in progress will return unpredictable results. @@ -340,8 +358,8 @@ static __inline__ void set_dma_count(unsigned int dmanr, unsigned int count) */ static __inline__ int get_dma_residue(unsigned int dmanr) { - unsigned int io_port = (dmanr <= 3) ? - ((dmanr & 3) << 1) + 1 + IO_DMA1_BASE + unsigned int io_port = (dmanr <= 3) + ? ((dmanr & 3) << 1) + 1 + IO_DMA1_BASE : ((dmanr & 3) << 2) + 2 + IO_DMA2_BASE; /* using short to get 16-bit wrap around */ @@ -352,7 +370,6 @@ static __inline__ int get_dma_residue(unsigned int dmanr) return (dmanr <= 3 || dmanr == SND_DMA1 || dmanr == SND_DMA2) ? count : (count << 1); - } /* These are in kernel/dma.c: */ @@ -367,5 +384,7 @@ extern int isa_dma_bridge_buggy; #else #define isa_dma_bridge_buggy (0) #endif -#endif /* _ASM_DMA_H */ -#endif /* __KERNEL__ */ + +#endif /* !defined(CONFIG_PPC_ISERIES) || defined(CONFIG_PCI) */ + +#endif /* _ASM_POWERPC_DMA_H */ diff --git a/include/asm-ppc64/eeh.h b/include/asm-powerpc/eeh.h index 40c8eb57493e..f8633aafe4ba 100644 --- a/include/asm-ppc64/eeh.h +++ b/include/asm-powerpc/eeh.h @@ -1,4 +1,4 @@ -/* +/* * eeh.h * Copyright (C) 2001 Dave Engebretsen & Todd Inglett IBM Corporation. * @@ -6,12 +6,12 @@ * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. - * + * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. - * + * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA @@ -27,16 +27,20 @@ struct pci_dev; struct device_node; -struct device_node; -struct notifier_block; #ifdef CONFIG_EEH +extern int eeh_subsystem_enabled; + /* Values for eeh_mode bits in device_node */ #define EEH_MODE_SUPPORTED (1<<0) #define EEH_MODE_NOCHECK (1<<1) #define EEH_MODE_ISOLATED (1<<2) +/* Max number of EEH freezes allowed before we consider the device + * to be permanently disabled. */ +#define EEH_MAX_ALLOWED_FREEZES 5 + void __init eeh_init(void); unsigned long eeh_check_failure(const volatile void __iomem *token, unsigned long val); @@ -59,43 +63,21 @@ void eeh_add_device_late(struct pci_dev *); * eeh_remove_device - undo EEH setup for the indicated pci device * @dev: pci device to be removed * - * This routine should be when a device is removed from a running - * system (e.g. by hotplug or dlpar). + * This routine should be called when a device is removed from + * a running system (e.g. by hotplug or dlpar). It unregisters + * the PCI device from the EEH subsystem. I/O errors affecting + * this device will no longer be detected after this call; thus, + * i/o errors affecting this slot may leave this device unusable. */ void eeh_remove_device(struct pci_dev *); -#define EEH_DISABLE 0 -#define EEH_ENABLE 1 -#define EEH_RELEASE_LOADSTORE 2 -#define EEH_RELEASE_DMA 3 - -/** - * Notifier event flags. - */ -#define EEH_NOTIFY_FREEZE 1 - -/** EEH event -- structure holding pci slot data that describes - * a change in the isolation status of a PCI slot. A pointer - * to this struct is passed as the data pointer in a notify callback. - */ -struct eeh_event { - struct list_head list; - struct pci_dev *dev; - struct device_node *dn; - int reset_state; -}; - -/** Register to find out about EEH events. */ -int eeh_register_notifier(struct notifier_block *nb); -int eeh_unregister_notifier(struct notifier_block *nb); - /** * EEH_POSSIBLE_ERROR() -- test for possible MMIO failure. * * If this macro yields TRUE, the caller relays to eeh_check_failure() * which does further tests out of line. */ -#define EEH_POSSIBLE_ERROR(val, type) ((val) == (type)~0) +#define EEH_POSSIBLE_ERROR(val, type) ((val) == (type)~0 && eeh_subsystem_enabled) /* * Reads from a device which has been isolated by EEH will return @@ -129,7 +111,7 @@ static inline void eeh_remove_device(struct pci_dev *dev) { } #define EEH_IO_ERROR_VALUE(size) (-1UL) #endif /* CONFIG_EEH */ -/* +/* * MMIO read/write operations with EEH support. */ static inline u8 eeh_readb(const volatile void __iomem *addr) diff --git a/include/asm-powerpc/eeh_event.h b/include/asm-powerpc/eeh_event.h new file mode 100644 index 000000000000..d168a30b3866 --- /dev/null +++ b/include/asm-powerpc/eeh_event.h @@ -0,0 +1,52 @@ +/* + * eeh_event.h + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * + * Copyright (c) 2005 Linas Vepstas <linas@linas.org> + */ + +#ifndef ASM_PPC64_EEH_EVENT_H +#define ASM_PPC64_EEH_EVENT_H + +/** EEH event -- structure holding pci controller data that describes + * a change in the isolation status of a PCI slot. A pointer + * to this struct is passed as the data pointer in a notify callback. + */ +struct eeh_event { + struct list_head list; + struct device_node *dn; /* struct device node */ + struct pci_dev *dev; /* affected device */ + int state; + int time_unavail; /* milliseconds until device might be available */ +}; + +/** + * eeh_send_failure_event - generate a PCI error event + * @dev pci device + * + * This routine builds a PCI error event which will be delivered + * to all listeners on the peh_notifier_chain. + * + * This routine can be called within an interrupt context; + * the actual event will be delivered in a normal context + * (from a workqueue). + */ +int eeh_send_failure_event (struct device_node *dn, + struct pci_dev *dev, + int reset_state, + int time_unavail); + +#endif /* ASM_PPC64_EEH_EVENT_H */ diff --git a/include/asm-ppc64/elf.h b/include/asm-powerpc/elf.h index c919a89343db..3dcd65edf978 100644 --- a/include/asm-ppc64/elf.h +++ b/include/asm-powerpc/elf.h @@ -1,10 +1,13 @@ -#ifndef __PPC64_ELF_H -#define __PPC64_ELF_H +#ifndef _ASM_POWERPC_ELF_H +#define _ASM_POWERPC_ELF_H +#include <linux/sched.h> /* for task_struct */ #include <asm/types.h> #include <asm/ptrace.h> #include <asm/cputable.h> #include <asm/auxvec.h> +#include <asm/page.h> +#include <asm/string.h> /* PowerPC relocations defined by the ABIs */ #define R_PPC_NONE 0 @@ -75,7 +78,7 @@ #define R_PPC_GOT_DTPREL16_HI 93 /* half16* (sym+add)@got@dtprel@h */ #define R_PPC_GOT_DTPREL16_HA 94 /* half16* (sym+add)@got@dtprel@ha */ -/* Keep this the last entry. */ +/* keep this the last entry. */ #define R_PPC_NUM 95 /* @@ -90,8 +93,6 @@ #define ELF_NGREG 48 /* includes nip, msr, lr, etc. */ #define ELF_NFPREG 33 /* includes fpscr */ -#define ELF_NVRREG32 33 /* includes vscr & vrsave stuffed together */ -#define ELF_NVRREG 34 /* includes vscr & vrsave in split vectors */ typedef unsigned long elf_greg_t64; typedef elf_greg_t64 elf_gregset_t64[ELF_NGREG]; @@ -100,8 +101,21 @@ typedef unsigned int elf_greg_t32; typedef elf_greg_t32 elf_gregset_t32[ELF_NGREG]; /* - * These are used to set parameters in the core dumps. + * ELF_ARCH, CLASS, and DATA are used to set parameters in the core dumps. */ +#ifdef __powerpc64__ +# define ELF_NVRREG32 33 /* includes vscr & vrsave stuffed together */ +# define ELF_NVRREG 34 /* includes vscr & vrsave in split vectors */ +# define ELF_GREG_TYPE elf_greg_t64 +#else +# define ELF_NEVRREG 34 /* includes acc (as 2) */ +# define ELF_NVRREG 33 /* includes vscr */ +# define ELF_GREG_TYPE elf_greg_t32 +# define ELF_ARCH EM_PPC +# define ELF_CLASS ELFCLASS32 +# define ELF_DATA ELFDATA2MSB +#endif /* __powerpc64__ */ + #ifndef ELF_ARCH # define ELF_ARCH EM_PPC64 # define ELF_CLASS ELFCLASS64 @@ -114,8 +128,9 @@ typedef elf_greg_t32 elf_gregset_t32[ELF_NGREG]; typedef elf_greg_t32 elf_greg_t; typedef elf_gregset_t32 elf_gregset_t; # define elf_addr_t u32 -#endif +#endif /* ELF_ARCH */ +/* Floating point registers */ typedef double elf_fpreg_t; typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG]; @@ -125,7 +140,9 @@ typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG]; * The entry with index 32 contains the vscr as the last word (offset 12) * within the quadword. This allows the vscr to be stored as either a * quadword (since it must be copied via a vector register to/from storage) - * or as a word. The entry with index 33 contains the vrsave as the first + * or as a word. + * + * 64-bit kernel notes: The entry at index 33 contains the vrsave as the first * word (offset 0) within the quadword. * * This definition of the VMX state is compatible with the current PPC32 @@ -138,7 +155,9 @@ typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG]; */ typedef __vector128 elf_vrreg_t; typedef elf_vrreg_t elf_vrregset_t[ELF_NVRREG]; +#ifdef __powerpc64__ typedef elf_vrreg_t elf_vrregset_t32[ELF_NVRREG32]; +#endif /* * This is used to ensure we don't load something for the wrong architecture. @@ -146,7 +165,7 @@ typedef elf_vrreg_t elf_vrregset_t32[ELF_NVRREG32]; #define elf_check_arch(x) ((x)->e_machine == ELF_ARCH) #define USE_ELF_CORE_DUMP -#define ELF_EXEC_PAGESIZE 4096 +#define ELF_EXEC_PAGESIZE PAGE_SIZE /* This is the location that an ET_DYN program is loaded if exec'ed. Typical use of this is to invoke "./ld.so someprog" to test out a new version of @@ -158,26 +177,34 @@ typedef elf_vrreg_t elf_vrregset_t32[ELF_NVRREG32]; #ifdef __KERNEL__ /* Common routine for both 32-bit and 64-bit processes */ -static inline void ppc64_elf_core_copy_regs(elf_gregset_t elf_regs, +static inline void ppc_elf_core_copy_regs(elf_gregset_t elf_regs, struct pt_regs *regs) { - int i; - int gprs = sizeof(struct pt_regs)/sizeof(elf_greg_t64); - - if (gprs > ELF_NGREG) - gprs = ELF_NGREG; - - for (i=0; i < gprs; i++) - elf_regs[i] = (elf_greg_t)((elf_greg_t64 *)regs)[i]; + int i, nregs; + + memset((void *)elf_regs, 0, sizeof(elf_gregset_t)); + + /* Our registers are always unsigned longs, whether we're a 32 bit + * process or 64 bit, on either a 64 bit or 32 bit kernel. + * Don't use ELF_GREG_TYPE here. */ + nregs = sizeof(struct pt_regs) / sizeof(unsigned long); + if (nregs > ELF_NGREG) + nregs = ELF_NGREG; + + for (i = 0; i < nregs; i++) { + /* This will correctly truncate 64 bit registers to 32 bits + * for a 32 bit process on a 64 bit kernel. */ + elf_regs[i] = (elf_greg_t)((ELF_GREG_TYPE *)regs)[i]; + } } -#define ELF_CORE_COPY_REGS(gregs, regs) ppc64_elf_core_copy_regs(gregs, regs); +#define ELF_CORE_COPY_REGS(gregs, regs) ppc_elf_core_copy_regs(gregs, regs); static inline int dump_task_regs(struct task_struct *tsk, elf_gregset_t *elf_regs) { struct pt_regs *regs = tsk->thread.regs; if (regs) - ppc64_elf_core_copy_regs(*elf_regs, regs); + ppc_elf_core_copy_regs(*elf_regs, regs); return 1; } @@ -186,15 +213,17 @@ static inline int dump_task_regs(struct task_struct *tsk, extern int dump_task_fpu(struct task_struct *, elf_fpregset_t *); #define ELF_CORE_COPY_FPREGS(tsk, elf_fpregs) dump_task_fpu(tsk, elf_fpregs) -/* XXX Should we define the XFPREGS using altivec ??? */ +#endif /* __KERNEL__ */ -#endif - -/* This yields a mask that user programs can use to figure out what +/* ELF_HWCAP yields a mask that user programs can use to figure out what instruction set this cpu supports. This could be done in userspace, but it's not easy, and we've already done it here. */ - -#define ELF_HWCAP (cur_cpu_spec->cpu_user_features) +# define ELF_HWCAP (cur_cpu_spec->cpu_user_features) +#ifdef __powerpc64__ +# define ELF_PLAT_INIT(_r, load_addr) do { \ + _r->gpr[2] = load_addr; \ +} while (0) +#endif /* __powerpc64__ */ /* This yields a string that ld.so will use to load implementation specific libraries for optimization. This is more specific in @@ -205,14 +234,10 @@ extern int dump_task_fpu(struct task_struct *, elf_fpregset_t *); #define ELF_PLATFORM (NULL) -#define ELF_PLAT_INIT(_r, load_addr) do { \ - memset(_r->gpr, 0, sizeof(_r->gpr)); \ - _r->ctr = _r->link = _r->xer = _r->ccr = 0; \ - _r->gpr[2] = load_addr; \ -} while (0) - #ifdef __KERNEL__ -#define SET_PERSONALITY(ex, ibcs2) \ + +#ifdef __powerpc64__ +# define SET_PERSONALITY(ex, ibcs2) \ do { \ unsigned long new_flags = 0; \ if ((ex).e_ident[EI_CLASS] == ELFCLASS32) \ @@ -225,7 +250,6 @@ do { \ if (personality(current->personality) != PER_LINUX32) \ set_personality(PER_LINUX); \ } while (0) - /* * An executable for which elf_read_implies_exec() returns TRUE will * have the READ_IMPLIES_EXEC personality flag set automatically. This @@ -233,19 +257,24 @@ do { \ * the 64bit ABI has never had these issues dont enable the workaround * even if we have an executable stack. */ -#define elf_read_implies_exec(ex, exec_stk) (test_thread_flag(TIF_32BIT) ? \ +# define elf_read_implies_exec(ex, exec_stk) (test_thread_flag(TIF_32BIT) ? \ (exec_stk != EXSTACK_DISABLE_X) : 0) +#else +# define SET_PERSONALITY(ex, ibcs2) set_personality((ibcs2)?PER_SVR4:PER_LINUX) +#endif /* __powerpc64__ */ -#endif +#endif /* __KERNEL__ */ extern int dcache_bsize; extern int icache_bsize; extern int ucache_bsize; -/* We do have an arch_setup_additional_pages for vDSO matters */ +/* vDSO has arch_setup_additional_pages */ #define ARCH_HAS_SETUP_ADDITIONAL_PAGES struct linux_binprm; -extern int arch_setup_additional_pages(struct linux_binprm *bprm, int executable_stack); +extern int arch_setup_additional_pages(struct linux_binprm *bprm, + int executable_stack); +#define VDSO_AUX_ENT(a,b) NEW_AUX_ENT(a,b); /* * The requirements here are: @@ -265,9 +294,8 @@ do { \ NEW_AUX_ENT(AT_DCACHEBSIZE, dcache_bsize); \ NEW_AUX_ENT(AT_ICACHEBSIZE, icache_bsize); \ NEW_AUX_ENT(AT_UCACHEBSIZE, ucache_bsize); \ - /* vDSO base */ \ - NEW_AUX_ENT(AT_SYSINFO_EHDR, current->thread.vdso_base); \ - } while (0) + VDSO_AUX_ENT(AT_SYSINFO_EHDR, current->thread.vdso_base) \ +} while (0) /* PowerPC64 relocations defined by the ABIs */ #define R_PPC64_NONE R_PPC_NONE @@ -384,4 +412,4 @@ do { \ /* Keep this the last entry. */ #define R_PPC64_NUM 107 -#endif /* __PPC64_ELF_H */ +#endif /* _ASM_POWERPC_ELF_H */ diff --git a/include/asm-ppc64/firmware.h b/include/asm-powerpc/firmware.h index 22bb85cf60af..12fabbcb04f0 100644 --- a/include/asm-ppc64/firmware.h +++ b/include/asm-powerpc/firmware.h @@ -1,8 +1,4 @@ /* - * include/asm-ppc64/firmware.h - * - * Extracted from include/asm-ppc64/cputable.h - * * Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org) * * Modifications for ppc64: @@ -13,8 +9,8 @@ * as published by the Free Software Foundation; either version * 2 of the License, or (at your option) any later version. */ -#ifndef __ASM_PPC_FIRMWARE_H -#define __ASM_PPC_FIRMWARE_H +#ifndef __ASM_POWERPC_FIRMWARE_H +#define __ASM_POWERPC_FIRMWARE_H #ifdef __KERNEL__ @@ -47,6 +43,7 @@ #define FW_FEATURE_ISERIES (1UL<<21) enum { +#ifdef CONFIG_PPC64 FW_FEATURE_PSERIES_POSSIBLE = FW_FEATURE_PFT | FW_FEATURE_TCE | FW_FEATURE_SPRG0 | FW_FEATURE_DABR | FW_FEATURE_COPY | FW_FEATURE_ASR | FW_FEATURE_DEBUG | FW_FEATURE_TERM | @@ -74,6 +71,11 @@ enum { FW_FEATURE_ISERIES_ALWAYS & #endif FW_FEATURE_POSSIBLE, + +#else /* CONFIG_PPC64 */ + FW_FEATURE_POSSIBLE = 0, + FW_FEATURE_ALWAYS = 0, +#endif }; /* This is used to identify firmware features which are available @@ -98,4 +100,4 @@ extern firmware_feature_t firmware_features_table[]; #endif /* __ASSEMBLY__ */ #endif /* __KERNEL__ */ -#endif /* __ASM_PPC_FIRMWARE_H */ +#endif /* __ASM_POWERPC_FIRMWARE_H */ diff --git a/include/asm-ppc64/floppy.h b/include/asm-powerpc/floppy.h index 5c497b588e54..64276a3f6153 100644 --- a/include/asm-ppc64/floppy.h +++ b/include/asm-powerpc/floppy.h @@ -7,22 +7,22 @@ * * Copyright (C) 1995 */ -#ifndef __ASM_PPC64_FLOPPY_H -#define __ASM_PPC64_FLOPPY_H +#ifndef __ASM_POWERPC_FLOPPY_H +#define __ASM_POWERPC_FLOPPY_H #include <linux/config.h> #include <asm/machdep.h> -#define fd_inb(port) inb_p(port) -#define fd_outb(value,port) outb_p(value,port) +#define fd_inb(port) inb_p(port) +#define fd_outb(value,port) outb_p(value,port) #define fd_enable_dma() enable_dma(FLOPPY_DMA) #define fd_disable_dma() disable_dma(FLOPPY_DMA) -#define fd_request_dma() request_dma(FLOPPY_DMA,"floppy") +#define fd_request_dma() request_dma(FLOPPY_DMA, "floppy") #define fd_free_dma() free_dma(FLOPPY_DMA) #define fd_clear_dma_ff() clear_dma_ff(FLOPPY_DMA) -#define fd_set_dma_mode(mode) set_dma_mode(FLOPPY_DMA,mode) -#define fd_set_dma_count(count) set_dma_count(FLOPPY_DMA,count) +#define fd_set_dma_mode(mode) set_dma_mode(FLOPPY_DMA, mode) +#define fd_set_dma_count(count) set_dma_count(FLOPPY_DMA, count) #define fd_enable_irq() enable_irq(FLOPPY_IRQ) #define fd_disable_irq() disable_irq(FLOPPY_IRQ) #define fd_cacheflush(addr,size) /* nothing */ @@ -35,10 +35,10 @@ #include <linux/pci.h> -#define fd_dma_setup(addr,size,mode,io) ppc64_fd_dma_setup(addr,size,mode,io) +#define fd_dma_setup(addr,size,mode,io) powerpc_fd_dma_setup(addr,size,mode,io) -static __inline__ int -ppc64_fd_dma_setup(char *addr, unsigned long size, int mode, int io) +static __inline__ int powerpc_fd_dma_setup(char *addr, unsigned long size, + int mode, int io) { static unsigned long prev_size; static dma_addr_t bus_addr = 0; @@ -55,9 +55,8 @@ ppc64_fd_dma_setup(char *addr, unsigned long size, int mode, int io) bus_addr = 0; } - if (!bus_addr) /* need to map it */ { + if (!bus_addr) /* need to map it */ bus_addr = pci_map_single(NULL, addr, size, dir); - } /* remember this one as prev */ prev_addr = addr; @@ -103,4 +102,4 @@ static int FDC2 = -1; #define EXTRA_FLOPPY_PARAMS -#endif /* __ASM_PPC64_FLOPPY_H */ +#endif /* __ASM_POWERPC_FLOPPY_H */ diff --git a/include/asm-ppc64/futex.h b/include/asm-powerpc/futex.h index cb2640b3a408..f0319d50b129 100644 --- a/include/asm-ppc64/futex.h +++ b/include/asm-powerpc/futex.h @@ -1,34 +1,36 @@ -#ifndef _ASM_FUTEX_H -#define _ASM_FUTEX_H +#ifndef _ASM_POWERPC_FUTEX_H +#define _ASM_POWERPC_FUTEX_H #ifdef __KERNEL__ #include <linux/futex.h> #include <asm/errno.h> -#include <asm/memory.h> +#include <asm/synch.h> #include <asm/uaccess.h> +#include <asm/asm-compat.h> #define __futex_atomic_op(insn, ret, oldval, uaddr, oparg) \ - __asm__ __volatile (SYNC_ON_SMP \ -"1: lwarx %0,0,%2\n" \ - insn \ -"2: stwcx. %1,0,%2\n\ - bne- 1b\n\ - li %1,0\n\ -3: .section .fixup,\"ax\"\n\ -4: li %1,%3\n\ - b 3b\n\ - .previous\n\ - .section __ex_table,\"a\"\n\ - .align 3\n\ - .llong 1b,4b,2b,4b\n\ - .previous" \ - : "=&r" (oldval), "=&r" (ret) \ - : "b" (uaddr), "i" (-EFAULT), "1" (oparg) \ + __asm__ __volatile ( \ + SYNC_ON_SMP \ +"1: lwarx %0,0,%2\n" \ + insn \ + PPC405_ERR77(0, %2) \ +"2: stwcx. %1,0,%2\n" \ + "bne- 1b\n" \ + "li %1,0\n" \ +"3: .section .fixup,\"ax\"\n" \ +"4: li %1,%3\n" \ + "b 3b\n" \ + ".previous\n" \ + ".section __ex_table,\"a\"\n" \ + ".align 3\n" \ + PPC_LONG "1b,4b,2b,4b\n" \ + ".previous" \ + : "=&r" (oldval), "=&r" (ret) \ + : "b" (uaddr), "i" (-EFAULT), "1" (oparg) \ : "cr0", "memory") -static inline int -futex_atomic_op_inuser (int encoded_op, int __user *uaddr) +static inline int futex_atomic_op_inuser (int encoded_op, int __user *uaddr) { int op = (encoded_op >> 28) & 7; int cmp = (encoded_op >> 24) & 15; @@ -79,5 +81,5 @@ futex_atomic_op_inuser (int encoded_op, int __user *uaddr) return ret; } -#endif -#endif +#endif /* __KERNEL__ */ +#endif /* _ASM_POWERPC_FUTEX_H */ diff --git a/include/asm-powerpc/grackle.h b/include/asm-powerpc/grackle.h new file mode 100644 index 000000000000..563c7a5e64c9 --- /dev/null +++ b/include/asm-powerpc/grackle.h @@ -0,0 +1,7 @@ +/* + * Functions for setting up and using a MPC106 northbridge + */ + +#include <asm/pci-bridge.h> + +extern void setup_grackle(struct pci_controller *hose); diff --git a/include/asm-ppc/hardirq.h b/include/asm-powerpc/hardirq.h index 94f1411b1a93..3b3e3b49ec12 100644 --- a/include/asm-ppc/hardirq.h +++ b/include/asm-powerpc/hardirq.h @@ -1,11 +1,8 @@ -#ifdef __KERNEL__ -#ifndef __ASM_HARDIRQ_H -#define __ASM_HARDIRQ_H +#ifndef _ASM_POWERPC_HARDIRQ_H +#define _ASM_POWERPC_HARDIRQ_H -#include <linux/config.h> -#include <linux/cache.h> -#include <linux/smp_lock.h> #include <asm/irq.h> +#include <asm/bug.h> /* The __last_jiffy_stamp field is needed to ensure that no decrementer * interrupt is lost on SMP machines. Since on most CPUs it is in the same @@ -13,7 +10,7 @@ * for uniformity. */ typedef struct { - unsigned long __softirq_pending; /* set_bit is used on this */ + unsigned int __softirq_pending; /* set_bit is used on this */ unsigned int __last_jiffy_stamp; } ____cacheline_aligned irq_cpustat_t; @@ -27,5 +24,4 @@ static inline void ack_bad_irq(int irq) BUG(); } -#endif /* __ASM_HARDIRQ_H */ -#endif /* __KERNEL__ */ +#endif /* _ASM_POWERPC_HARDIRQ_H */ diff --git a/include/asm-ppc/heathrow.h b/include/asm-powerpc/heathrow.h index 22ac179856b9..22ac179856b9 100644 --- a/include/asm-ppc/heathrow.h +++ b/include/asm-powerpc/heathrow.h diff --git a/include/asm-ppc64/hvcall.h b/include/asm-powerpc/hvcall.h index ab7c3cf24888..d36da61dbc53 100644 --- a/include/asm-ppc64/hvcall.h +++ b/include/asm-powerpc/hvcall.h @@ -1,5 +1,5 @@ -#ifndef _PPC64_HVCALL_H -#define _PPC64_HVCALL_H +#ifndef _ASM_POWERPC_HVCALL_H +#define _ASM_POWERPC_HVCALL_H #define HVSC .long 0x44000022 @@ -138,7 +138,7 @@ long plpar_hcall(unsigned long opcode, */ long plpar_hcall_norets(unsigned long opcode, ...); -/* +/* * Special hcall interface for ibmveth support. * Takes 8 input parms. Returns a rc and stores the * R4 return value in *out1. @@ -153,11 +153,11 @@ long plpar_hcall_8arg_2ret(unsigned long opcode, unsigned long arg7, unsigned long arg8, unsigned long *out1); - + /* plpar_hcall_4out() * - * same as plpar_hcall except with 4 output arguments. - * + * same as plpar_hcall except with 4 output arguments. + * */ long plpar_hcall_4out(unsigned long opcode, unsigned long arg1, @@ -170,4 +170,4 @@ long plpar_hcall_4out(unsigned long opcode, unsigned long *out4); #endif /* __ASSEMBLY__ */ -#endif /* _PPC64_HVCALL_H */ +#endif /* _ASM_POWERPC_HVCALL_H */ diff --git a/include/asm-ppc64/hvconsole.h b/include/asm-powerpc/hvconsole.h index 6da93ce74dc0..6da93ce74dc0 100644 --- a/include/asm-ppc64/hvconsole.h +++ b/include/asm-powerpc/hvconsole.h diff --git a/include/asm-ppc64/hvcserver.h b/include/asm-powerpc/hvcserver.h index aecba9665796..aecba9665796 100644 --- a/include/asm-ppc64/hvcserver.h +++ b/include/asm-powerpc/hvcserver.h diff --git a/include/asm-ppc64/hw_irq.h b/include/asm-powerpc/hw_irq.h index baea40e695ec..26b89d859c56 100644 --- a/include/asm-ppc64/hw_irq.h +++ b/include/asm-powerpc/hw_irq.h @@ -1,23 +1,17 @@ /* * Copyright (C) 1999 Cort Dougan <cort@cs.nmt.edu> - * - * Use inline IRQs where possible - Anton Blanchard <anton@au.ibm.com> - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. */ +#ifndef _ASM_POWERPC_HW_IRQ_H +#define _ASM_POWERPC_HW_IRQ_H + #ifdef __KERNEL__ -#ifndef _PPC64_HW_IRQ_H -#define _PPC64_HW_IRQ_H #include <linux/config.h> #include <linux/errno.h> -#include <asm/irq.h> +#include <asm/ptrace.h> +#include <asm/processor.h> -int timer_interrupt(struct pt_regs *); -extern void ppc_irq_dispatch_handler(struct pt_regs *regs, int irq); +extern void timer_interrupt(struct pt_regs *); #ifdef CONFIG_PPC_ISERIES @@ -33,45 +27,60 @@ extern void local_irq_restore(unsigned long); #else -#define local_save_flags(flags) ((flags) = mfmsr()) +#if defined(CONFIG_BOOKE) +#define SET_MSR_EE(x) mtmsr(x) +#define local_irq_restore(flags) __asm__ __volatile__("wrtee %0" : : "r" (flags) : "memory") +#elif defined(__powerpc64__) +#define SET_MSR_EE(x) __mtmsrd(x, 1) #define local_irq_restore(flags) do { \ __asm__ __volatile__("": : :"memory"); \ __mtmsrd((flags), 1); \ } while(0) +#else +#define SET_MSR_EE(x) mtmsr(x) +#define local_irq_restore(flags) mtmsr(flags) +#endif static inline void local_irq_disable(void) { +#ifdef CONFIG_BOOKE + __asm__ __volatile__("wrteei 0": : :"memory"); +#else unsigned long msr; - msr = mfmsr(); - __mtmsrd(msr & ~MSR_EE, 1); __asm__ __volatile__("": : :"memory"); + msr = mfmsr(); + SET_MSR_EE(msr & ~MSR_EE); +#endif } static inline void local_irq_enable(void) { +#ifdef CONFIG_BOOKE + __asm__ __volatile__("wrteei 1": : :"memory"); +#else unsigned long msr; __asm__ __volatile__("": : :"memory"); msr = mfmsr(); - __mtmsrd(msr | MSR_EE, 1); + SET_MSR_EE(msr | MSR_EE); +#endif } -static inline void __do_save_and_cli(unsigned long *flags) +static inline void local_irq_save_ptr(unsigned long *flags) { unsigned long msr; msr = mfmsr(); *flags = msr; - __mtmsrd(msr & ~MSR_EE, 1); +#ifdef CONFIG_BOOKE + __asm__ __volatile__("wrteei 0": : :"memory"); +#else + SET_MSR_EE(msr & ~MSR_EE); +#endif __asm__ __volatile__("": : :"memory"); } -#define local_irq_save(flags) __do_save_and_cli(&flags) - -#define irqs_disabled() \ -({ \ - unsigned long flags; \ - local_save_flags(flags); \ - !(flags & MSR_EE); \ -}) +#define local_save_flags(flags) ((flags) = mfmsr()) +#define local_irq_save(flags) local_irq_save_ptr(&flags) +#define irqs_disabled() ((mfmsr() & MSR_EE) == 0) #endif /* CONFIG_PPC_ISERIES */ @@ -99,6 +108,6 @@ static inline void __do_save_and_cli(unsigned long *flags) */ struct hw_interrupt_type; static inline void hw_resend_irq(struct hw_interrupt_type *h, unsigned int i) {} - -#endif /* _PPC64_HW_IRQ_H */ -#endif /* __KERNEL__ */ + +#endif /* __KERNEL__ */ +#endif /* _ASM_POWERPC_HW_IRQ_H */ diff --git a/include/asm-powerpc/i8259.h b/include/asm-powerpc/i8259.h new file mode 100644 index 000000000000..fc4bfee124d7 --- /dev/null +++ b/include/asm-powerpc/i8259.h @@ -0,0 +1,12 @@ +#ifndef _ASM_POWERPC_I8259_H +#define _ASM_POWERPC_I8259_H + +#include <linux/irq.h> + +extern struct hw_interrupt_type i8259_pic; + +extern void i8259_init(unsigned long intack_addr, int offset); +extern int i8259_irq(struct pt_regs *regs); +extern int i8259_irq_cascade(struct pt_regs *regs, void *unused); + +#endif /* _ASM_POWERPC_I8259_H */ diff --git a/include/asm-ppc/ide.h b/include/asm-powerpc/ide.h index 7d6e6599fac4..da5f640480cf 100644 --- a/include/asm-ppc/ide.h +++ b/include/asm-powerpc/ide.h @@ -1,24 +1,27 @@ /* - * linux/include/asm-ppc/ide.h + * Copyright (C) 1994-1996 Linus Torvalds & authors * - * Copyright (C) 1994-1996 Linus Torvalds & authors */ - -/* - * This file contains the ppc architecture specific IDE code. + * This file contains the powerpc architecture specific IDE code. */ - -#ifndef __ASMPPC_IDE_H -#define __ASMPPC_IDE_H +#ifndef _ASM_POWERPC_IDE_H +#define _ASM_POWERPC_IDE_H #ifdef __KERNEL__ +#ifndef __powerpc64__ #include <linux/sched.h> #include <asm/mpc8xx.h> +#endif #ifndef MAX_HWIFS +#ifdef __powerpc64__ +#define MAX_HWIFS 10 +#else #define MAX_HWIFS 8 #endif +#endif +#ifndef __powerpc64__ #include <linux/config.h> #include <linux/hdreg.h> #include <linux/ioport.h> @@ -59,9 +62,6 @@ static __inline__ unsigned long ide_default_io_base(int index) return 0; } -#define IDE_ARCH_OBSOLETE_INIT -#define ide_default_io_ctl(base) ((base) + 0x206) /* obsolete */ - #ifdef CONFIG_PCI #define ide_init_default_irq(base) (0) #else @@ -73,6 +73,11 @@ static __inline__ unsigned long ide_default_io_base(int index) #define ide_ack_intr(hwif) (hwif->hw.ack_intr ? hwif->hw.ack_intr(hwif) : 1) #endif +#endif /* __powerpc64__ */ + +#define IDE_ARCH_OBSOLETE_INIT +#define ide_default_io_ctl(base) ((base) + 0x206) /* obsolete */ + #endif /* __KERNEL__ */ -#endif /* __ASMPPC_IDE_H */ +#endif /* _ASM_POWERPC_IDE_H */ diff --git a/include/asm-ppc64/io.h b/include/asm-powerpc/io.h index 59c958aea4db..48938d84d055 100644 --- a/include/asm-ppc64/io.h +++ b/include/asm-powerpc/io.h @@ -1,5 +1,5 @@ -#ifndef _PPC64_IO_H -#define _PPC64_IO_H +#ifndef _ASM_POWERPC_IO_H +#define _ASM_POWERPC_IO_H /* * This program is free software; you can redistribute it and/or @@ -8,14 +8,17 @@ * 2 of the License, or (at your option) any later version. */ -#include <linux/config.h> +#ifndef CONFIG_PPC64 +#include <asm-ppc/io.h> +#else + #include <linux/compiler.h> #include <asm/page.h> #include <asm/byteorder.h> #ifdef CONFIG_PPC_ISERIES -#include <asm/iSeries/iSeries_io.h> +#include <asm/iseries/iseries_io.h> #endif -#include <asm/memory.h> +#include <asm/synch.h> #include <asm/delay.h> #include <asm-generic/iomap.h> @@ -455,4 +458,5 @@ extern int check_legacy_ioport(unsigned long base_port); #endif /* __KERNEL__ */ -#endif /* _PPC64_IO_H */ +#endif /* CONFIG_PPC64 */ +#endif /* _ASM_POWERPC_IO_H */ diff --git a/include/asm-powerpc/ioctls.h b/include/asm-powerpc/ioctls.h index 5b94ff489b8b..279a6229584b 100644 --- a/include/asm-powerpc/ioctls.h +++ b/include/asm-powerpc/ioctls.h @@ -62,6 +62,9 @@ # define TIOCM_DSR 0x100 # define TIOCM_CD TIOCM_CAR # define TIOCM_RI TIOCM_RNG +#define TIOCM_OUT1 0x2000 +#define TIOCM_OUT2 0x4000 +#define TIOCM_LOOP 0x8000 #define TIOCGSOFTCAR 0x5419 #define TIOCSSOFTCAR 0x541A diff --git a/include/asm-ppc64/iommu.h b/include/asm-powerpc/iommu.h index 72dcf8116b04..f89f06050893 100644 --- a/include/asm-ppc64/iommu.h +++ b/include/asm-powerpc/iommu.h @@ -1,8 +1,7 @@ /* - * iommu.h * Copyright (C) 2001 Mike Corrigan & Dave Engebretsen, IBM Corporation * Rewrite, cleanup: - * Copyright (C) 2004 Olof Johansson <olof@austin.ibm.com>, IBM Corporation + * Copyright (C) 2004 Olof Johansson <olof@lixom.net>, IBM Corporation * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -22,6 +21,7 @@ #ifndef _ASM_IOMMU_H #define _ASM_IOMMU_H +#include <linux/config.h> #include <asm/types.h> #include <linux/spinlock.h> #include <linux/device.h> @@ -29,44 +29,11 @@ /* * IOMAP_MAX_ORDER defines the largest contiguous block - * of dma (tce) space we can get. IOMAP_MAX_ORDER = 13 + * of dma space we can get. IOMAP_MAX_ORDER = 13 * allows up to 2**12 pages (4096 * 4096) = 16 MB */ #define IOMAP_MAX_ORDER 13 -/* - * Tces come in two formats, one for the virtual bus and a different - * format for PCI - */ -#define TCE_VB 0 -#define TCE_PCI 1 - -/* tce_entry - * Used by pSeries (SMP) and iSeries/pSeries LPAR, but there it's - * abstracted so layout is irrelevant. - */ -union tce_entry { - unsigned long te_word; - struct { - unsigned int tb_cacheBits :6; /* Cache hash bits - not used */ - unsigned int tb_rsvd :6; - unsigned long tb_rpn :40; /* Real page number */ - unsigned int tb_valid :1; /* Tce is valid (vb only) */ - unsigned int tb_allio :1; /* Tce is valid for all lps (vb only) */ - unsigned int tb_lpindex :8; /* LpIndex for user of TCE (vb only) */ - unsigned int tb_pciwr :1; /* Write allowed (pci only) */ - unsigned int tb_rdwr :1; /* Read allowed (pci), Write allowed (vb) */ - } te_bits; -#define te_cacheBits te_bits.tb_cacheBits -#define te_rpn te_bits.tb_rpn -#define te_valid te_bits.tb_valid -#define te_allio te_bits.tb_allio -#define te_lpindex te_bits.tb_lpindex -#define te_pciwr te_bits.tb_pciwr -#define te_rdwr te_bits.tb_rdwr -}; - - struct iommu_table { unsigned long it_busno; /* Bus number this table belongs to */ unsigned long it_size; /* Size of iommu table in entries */ @@ -83,6 +50,7 @@ struct iommu_table { }; struct scatterlist; +struct device_node; #ifdef CONFIG_PPC_MULTIPLATFORM @@ -104,9 +72,13 @@ extern void iommu_devnode_init_pSeries(struct device_node *dn); #ifdef CONFIG_PPC_ISERIES -struct iSeries_Device_Node; /* Creates table for an individual device node */ -extern void iommu_devnode_init_iSeries(struct iSeries_Device_Node *dn); +extern void iommu_devnode_init_iSeries(struct device_node *dn); +/* Get table parameters from HV */ +extern void iommu_table_getparms_iSeries(unsigned long busno, + unsigned char slotno, + unsigned char virtbus, + struct iommu_table* tbl); #endif /* CONFIG_PPC_ISERIES */ @@ -122,7 +94,7 @@ extern void iommu_unmap_sg(struct iommu_table *tbl, struct scatterlist *sglist, int nelems, enum dma_data_direction direction); extern void *iommu_alloc_coherent(struct iommu_table *tbl, size_t size, - dma_addr_t *dma_handle, unsigned int __nocast flag); + dma_addr_t *dma_handle, gfp_t flag); extern void iommu_free_coherent(struct iommu_table *tbl, size_t size, void *vaddr, dma_addr_t dma_handle); extern dma_addr_t iommu_map_single(struct iommu_table *tbl, void *vaddr, diff --git a/include/asm-powerpc/ipcbuf.h b/include/asm-powerpc/ipcbuf.h new file mode 100644 index 000000000000..2c3e1d94db1d --- /dev/null +++ b/include/asm-powerpc/ipcbuf.h @@ -0,0 +1,34 @@ +#ifndef _ASM_POWERPC_IPCBUF_H +#define _ASM_POWERPC_IPCBUF_H + +/* + * The ipc64_perm structure for the powerpc is identical to + * kern_ipc_perm as we have always had 32-bit UIDs and GIDs in the + * kernel. Note extra padding because this structure is passed back + * and forth between kernel and user space. Pad space is left for: + * - 1 32-bit value to fill up for 8-byte alignment + * - 2 miscellaneous 64-bit values + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version + * 2 of the License, or (at your option) any later version. + */ + +#include <linux/types.h> + +struct ipc64_perm +{ + __kernel_key_t key; + __kernel_uid_t uid; + __kernel_gid_t gid; + __kernel_uid_t cuid; + __kernel_gid_t cgid; + __kernel_mode_t mode; + unsigned int seq; + unsigned int __pad1; + unsigned long long __unused1; + unsigned long long __unused2; +}; + +#endif /* _ASM_POWERPC_IPCBUF_H */ diff --git a/include/asm-ppc/irq.h b/include/asm-powerpc/irq.h index bd9674807f05..8eb7e857ec4c 100644 --- a/include/asm-ppc/irq.h +++ b/include/asm-powerpc/irq.h @@ -1,11 +1,23 @@ #ifdef __KERNEL__ -#ifndef _ASM_IRQ_H -#define _ASM_IRQ_H +#ifndef _ASM_POWERPC_IRQ_H +#define _ASM_POWERPC_IRQ_H + +/* + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version + * 2 of the License, or (at your option) any later version. + */ #include <linux/config.h> -#include <asm/machdep.h> /* ppc_md */ +#include <linux/threads.h> + +#include <asm/types.h> #include <asm/atomic.h> +/* this number is used when no interrupt has been assigned */ +#define NO_IRQ (-1) + /* * These constants are used for passing information about interrupt * signal polarity and level/edge sensing to the low-level PIC chip @@ -24,6 +36,50 @@ */ #define ARCH_HAS_IRQ_PER_CPU +#define get_irq_desc(irq) (&irq_desc[(irq)]) + +/* Define a way to iterate across irqs. */ +#define for_each_irq(i) \ + for ((i) = 0; (i) < NR_IRQS; ++(i)) + +#ifdef CONFIG_PPC64 + +/* + * Maximum number of interrupt sources that we can handle. + */ +#define NR_IRQS 512 + +/* Interrupt numbers are virtual in case they are sparsely + * distributed by the hardware. + */ +extern unsigned int virt_irq_to_real_map[NR_IRQS]; + +/* Create a mapping for a real_irq if it doesn't already exist. + * Return the virtual irq as a convenience. + */ +int virt_irq_create_mapping(unsigned int real_irq); +void virt_irq_init(void); + +static inline unsigned int virt_irq_to_real(unsigned int virt_irq) +{ + return virt_irq_to_real_map[virt_irq]; +} + +extern unsigned int real_irq_to_virt_slowpath(unsigned int real_irq); + +/* + * List of interrupt controllers. + */ +#define IC_INVALID 0 +#define IC_OPEN_PIC 1 +#define IC_PPC_XIC 2 +#define IC_CELL_PIC 3 +#define IC_ISERIES 4 + +extern u64 ppc64_interrupt_controller; + +#else /* 32-bit */ + #if defined(CONFIG_40x) #include <asm/ibm4xx.h> @@ -66,11 +122,6 @@ #define NR_UIC_IRQS UIC_WIDTH #define NR_IRQS ((NR_UIC_IRQS * NR_UICS) + NR_BOARD_IRQS) #endif -static __inline__ int -irq_canonicalize(int irq) -{ - return (irq); -} #elif defined(CONFIG_44x) #include <asm/ibm44x.h> @@ -78,12 +129,6 @@ irq_canonicalize(int irq) #define NR_UIC_IRQS 32 #define NR_IRQS ((NR_UIC_IRQS * NR_UICS) + NR_BOARD_IRQS) -static __inline__ int -irq_canonicalize(int irq) -{ - return (irq); -} - #elif defined(CONFIG_8xx) /* Now include the board configuration specific associations. @@ -170,20 +215,9 @@ irq_canonicalize(int irq) */ #define mk_int_int_mask(IL) (1 << (7 - (IL/2))) -/* always the same on 8xx -- Cort */ -static __inline__ int irq_canonicalize(int irq) -{ - return irq; -} - #elif defined(CONFIG_83xx) #include <asm/mpc83xx.h> -static __inline__ int irq_canonicalize(int irq) -{ - return irq; -} - #define NR_IRQS (NR_IPIC_INTS) #elif defined(CONFIG_85xx) @@ -307,17 +341,13 @@ static __inline__ int irq_canonicalize(int irq) #define SIU_INT_PC1 ((uint)0x3e+CPM_IRQ_OFFSET) #define SIU_INT_PC0 ((uint)0x3f+CPM_IRQ_OFFSET) -static __inline__ int irq_canonicalize(int irq) -{ - return irq; -} - #else /* CONFIG_40x + CONFIG_8xx */ /* * this is the # irq's for all ppc arch's (pmac/chrp/prep) * so it is the max of them all */ #define NR_IRQS 256 +#define __DO_IRQ_CANON 1 #ifndef CONFIG_8260 @@ -359,6 +389,7 @@ static __inline__ int irq_canonicalize(int irq) #define SIU_INT_TIMER4 ((uint)0x0f + CPM_IRQ_OFFSET) #define SIU_INT_TMCNT ((uint)0x10 + CPM_IRQ_OFFSET) #define SIU_INT_PIT ((uint)0x11 + CPM_IRQ_OFFSET) +#define SIU_INT_PCI ((uint)0x12 + CPM_IRQ_OFFSET) #define SIU_INT_IRQ1 ((uint)0x13 + CPM_IRQ_OFFSET) #define SIU_INT_IRQ2 ((uint)0x14 + CPM_IRQ_OFFSET) #define SIU_INT_IRQ3 ((uint)0x15 + CPM_IRQ_OFFSET) @@ -394,25 +425,80 @@ static __inline__ int irq_canonicalize(int irq) #endif /* CONFIG_8260 */ +#endif + +#define NR_MASK_WORDS ((NR_IRQS + 31) / 32) +/* pedantic: these are long because they are used with set_bit --RR */ +extern unsigned long ppc_cached_irq_mask[NR_MASK_WORDS]; +extern atomic_t ppc_n_lost_interrupts; + +#define virt_irq_create_mapping(x) (x) + +#endif + /* - * This gets called from serial.c, which is now used on - * powermacs as well as prep/chrp boxes. - * Prep and chrp both have cascaded 8259 PICs. + * Because many systems have two overlapping names spaces for + * interrupts (ISA and XICS for example), and the ISA interrupts + * have historically not been easy to renumber, we allow ISA + * interrupts to take values 0 - 15, and shift up the remaining + * interrupts by 0x10. */ +#define NUM_ISA_INTERRUPTS 0x10 +extern int __irq_offset_value; + +static inline int irq_offset_up(int irq) +{ + return(irq + __irq_offset_value); +} + +static inline int irq_offset_down(int irq) +{ + return(irq - __irq_offset_value); +} + +static inline int irq_offset_value(void) +{ + return __irq_offset_value; +} + +#ifdef __DO_IRQ_CANON +extern int ppc_do_canonicalize_irqs; +#else +#define ppc_do_canonicalize_irqs 0 +#endif + static __inline__ int irq_canonicalize(int irq) { - if (ppc_md.irq_canonicalize) - return ppc_md.irq_canonicalize(irq); + if (ppc_do_canonicalize_irqs && irq == 2) + irq = 9; return irq; } -#endif +extern int distribute_irqs; -#define NR_MASK_WORDS ((NR_IRQS + 31) / 32) -/* pedantic: these are long because they are used with set_bit --RR */ -extern unsigned long ppc_cached_irq_mask[NR_MASK_WORDS]; -extern unsigned long ppc_lost_interrupts[NR_MASK_WORDS]; -extern atomic_t ppc_n_lost_interrupts; +struct irqaction; +struct pt_regs; + +#ifdef CONFIG_IRQSTACKS +/* + * Per-cpu stacks for handling hard and soft interrupts. + */ +extern struct thread_info *hardirq_ctx[NR_CPUS]; +extern struct thread_info *softirq_ctx[NR_CPUS]; + +extern void irq_ctx_init(void); +extern void call_do_softirq(struct thread_info *tp); +extern int call___do_IRQ(int irq, struct pt_regs *regs, + struct thread_info *tp); + +#define __ARCH_HAS_DO_SOFTIRQ + +#else +#define irq_ctx_init() + +#endif /* CONFIG_IRQSTACKS */ + +extern void do_IRQ(struct pt_regs *regs); #endif /* _ASM_IRQ_H */ #endif /* __KERNEL__ */ diff --git a/include/asm-ppc64/iSeries/HvCall.h b/include/asm-powerpc/iseries/hv_call.h index c3f19475c0d9..e9f831c9a5e5 100644 --- a/include/asm-ppc64/iSeries/HvCall.h +++ b/include/asm-powerpc/iseries/hv_call.h @@ -20,11 +20,11 @@ * This file contains the "hypervisor call" interface which is used to * drive the hypervisor from the OS. */ -#ifndef _HVCALL_H -#define _HVCALL_H +#ifndef _ASM_POWERPC_ISERIES_HV_CALL_H +#define _ASM_POWERPC_ISERIES_HV_CALL_H -#include <asm/iSeries/HvCallSc.h> -#include <asm/iSeries/HvTypes.h> +#include <asm/iseries/hv_call_sc.h> +#include <asm/iseries/hv_types.h> #include <asm/paca.h> /* Type of yield for HvCallBaseYieldProcessor */ @@ -110,4 +110,4 @@ static inline void HvCall_sendIPI(struct paca_struct *targetPaca) HvCall1(HvCallBaseSendIPI, targetPaca->paca_index); } -#endif /* _HVCALL_H */ +#endif /* _ASM_POWERPC_ISERIES_HV_CALL_H */ diff --git a/include/asm-ppc64/iSeries/HvCallEvent.h b/include/asm-powerpc/iseries/hv_call_event.h index 5d9a327d0122..46763a30590a 100644 --- a/include/asm-ppc64/iSeries/HvCallEvent.h +++ b/include/asm-powerpc/iseries/hv_call_event.h @@ -20,11 +20,11 @@ * This file contains the "hypervisor call" interface which is used to * drive the hypervisor from the OS. */ -#ifndef _HVCALLEVENT_H -#define _HVCALLEVENT_H +#ifndef _ASM_POWERPC_ISERIES_HV_CALL_EVENT_H +#define _ASM_POWERPC_ISERIES_HV_CALL_EVENT_H -#include <asm/iSeries/HvCallSc.h> -#include <asm/iSeries/HvTypes.h> +#include <asm/iseries/hv_call_sc.h> +#include <asm/iseries/hv_types.h> #include <asm/abs_addr.h> struct HvLpEvent; @@ -250,4 +250,4 @@ static inline HvLpDma_Rc HvCallEvent_dmaToSp(void *local, u32 remote, return HvCall4(HvCallEventDmaToSp, abs_addr, remote, length, dir); } -#endif /* _HVCALLEVENT_H */ +#endif /* _ASM_POWERPC_ISERIES_HV_CALL_EVENT_H */ diff --git a/include/asm-ppc64/iSeries/HvCallSc.h b/include/asm-powerpc/iseries/hv_call_sc.h index a62cef3822f9..dec7e9d9ab78 100644 --- a/include/asm-ppc64/iSeries/HvCallSc.h +++ b/include/asm-powerpc/iseries/hv_call_sc.h @@ -16,8 +16,8 @@ * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ -#ifndef _HVCALLSC_H -#define _HVCALLSC_H +#ifndef _ASM_POWERPC_ISERIES_HV_CALL_SC_H +#define _ASM_POWERPC_ISERIES_HV_CALL_SC_H #include <linux/types.h> @@ -48,4 +48,4 @@ extern u64 HvCall5Ret16(u64, void *, u64, u64, u64, u64, u64); extern u64 HvCall6Ret16(u64, void *, u64, u64, u64, u64, u64, u64); extern u64 HvCall7Ret16(u64, void *, u64, u64 ,u64 ,u64 ,u64 ,u64 ,u64); -#endif /* _HVCALLSC_H */ +#endif /* _ASM_POWERPC_ISERIES_HV_CALL_SC_H */ diff --git a/include/asm-ppc64/iSeries/HvCallXm.h b/include/asm-powerpc/iseries/hv_call_xm.h index 8b9ba608daaf..ca9202cb01ed 100644 --- a/include/asm-ppc64/iSeries/HvCallXm.h +++ b/include/asm-powerpc/iseries/hv_call_xm.h @@ -2,11 +2,11 @@ * This file contains the "hypervisor call" interface which is used to * drive the hypervisor from SLIC. */ -#ifndef _HVCALLXM_H -#define _HVCALLXM_H +#ifndef _ASM_POWERPC_ISERIES_HV_CALL_XM_H +#define _ASM_POWERPC_ISERIES_HV_CALL_XM_H -#include <asm/iSeries/HvCallSc.h> -#include <asm/iSeries/HvTypes.h> +#include <asm/iseries/hv_call_sc.h> +#include <asm/iseries/hv_types.h> #define HvCallXmGetTceTableParms HvCallXm + 0 #define HvCallXmTestBus HvCallXm + 1 @@ -75,4 +75,4 @@ static inline u64 HvCallXm_loadTod(void) return HvCall0(HvCallXmLoadTod); } -#endif /* _HVCALLXM_H */ +#endif /* _ASM_POWERPC_ISERIES_HV_CALL_XM_H */ diff --git a/include/asm-ppc64/iSeries/HvLpConfig.h b/include/asm-powerpc/iseries/hv_lp_config.h index f1cf1e70ca3c..bc00f036bca0 100644 --- a/include/asm-ppc64/iSeries/HvLpConfig.h +++ b/include/asm-powerpc/iseries/hv_lp_config.h @@ -16,17 +16,17 @@ * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ -#ifndef _HVLPCONFIG_H -#define _HVLPCONFIG_H +#ifndef _ASM_POWERPC_ISERIES_HV_LP_CONFIG_H +#define _ASM_POWERPC_ISERIES_HV_LP_CONFIG_H /* * This file contains the interface to the LPAR configuration data * to determine which resources should be allocated to each partition. */ -#include <asm/iSeries/HvCallSc.h> -#include <asm/iSeries/HvTypes.h> -#include <asm/iSeries/ItLpNaca.h> +#include <asm/iseries/hv_call_sc.h> +#include <asm/iseries/hv_types.h> +#include <asm/iseries/it_lp_naca.h> enum { HvCallCfg_Cur = 0, @@ -135,4 +135,4 @@ static inline HvLpIndex HvLpConfig_getHostingLpIndex(HvLpIndex lp) return HvCall1(HvCallCfgGetHostingLpIndex, lp); } -#endif /* _HVLPCONFIG_H */ +#endif /* _ASM_POWERPC_ISERIES_HV_LP_CONFIG_H */ diff --git a/include/asm-ppc64/iSeries/HvLpEvent.h b/include/asm-powerpc/iseries/hv_lp_event.h index 865000de79b6..499ab1ad0185 100644 --- a/include/asm-ppc64/iSeries/HvLpEvent.h +++ b/include/asm-powerpc/iseries/hv_lp_event.h @@ -19,13 +19,13 @@ /* This file contains the class for HV events in the system. */ -#ifndef _HVLPEVENT_H -#define _HVLPEVENT_H +#ifndef _ASM_POWERPC_ISERIES_HV_LP_EVENT_H +#define _ASM_POWERPC_ISERIES_HV_LP_EVENT_H #include <asm/types.h> #include <asm/ptrace.h> -#include <asm/iSeries/HvTypes.h> -#include <asm/iSeries/HvCallEvent.h> +#include <asm/iseries/hv_types.h> +#include <asm/iseries/hv_call_event.h> /* * HvLpEvent is the structure for Lp Event messages passed between @@ -139,4 +139,4 @@ extern int HvLpEvent_closePath(HvLpEvent_Type eventType, HvLpIndex lpIndex); #define HvLpDma_Rc_InvalidAddress 4 #define HvLpDma_Rc_InvalidLength 5 -#endif /* _HVLPEVENT_H */ +#endif /* _ASM_POWERPC_ISERIES_HV_LP_EVENT_H */ diff --git a/include/asm-ppc64/iSeries/HvTypes.h b/include/asm-powerpc/iseries/hv_types.h index b1ef2b4cb3e3..c38f7e3d01dc 100644 --- a/include/asm-ppc64/iSeries/HvTypes.h +++ b/include/asm-powerpc/iseries/hv_types.h @@ -16,8 +16,8 @@ * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ -#ifndef _HVTYPES_H -#define _HVTYPES_H +#ifndef _ASM_POWERPC_ISERIES_HV_TYPES_H +#define _ASM_POWERPC_ISERIES_HV_TYPES_H /* * General typedefs for the hypervisor. @@ -110,4 +110,4 @@ struct HvLpBufferList { u64 len; }; -#endif /* _HVTYPES_H */ +#endif /* _ASM_POWERPC_ISERIES_HV_TYPES_H */ diff --git a/include/asm-ppc64/iSeries/iSeries_io.h b/include/asm-powerpc/iseries/iseries_io.h index 9f79413342b3..56b2113ff0f5 100644 --- a/include/asm-ppc64/iSeries/iSeries_io.h +++ b/include/asm-powerpc/iseries/iseries_io.h @@ -1,5 +1,5 @@ -#ifndef _ISERIES_IO_H -#define _ISERIES_IO_H +#ifndef _ASM_POWERPC_ISERIES_ISERIES_IO_H +#define _ASM_POWERPC_ISERIES_ISERIES_IO_H #include <linux/config.h> @@ -46,4 +46,4 @@ extern void iSeries_memcpy_fromio(void *dest, const volatile void __iomem *source, size_t n); #endif /* CONFIG_PPC_ISERIES */ -#endif /* _ISERIES_IO_H */ +#endif /* _ASM_POWERPC_ISERIES_ISERIES_IO_H */ diff --git a/include/asm-ppc64/iSeries/ItExtVpdPanel.h b/include/asm-powerpc/iseries/it_exp_vpd_panel.h index 4c546a8802b4..66a17a230c52 100644 --- a/include/asm-ppc64/iSeries/ItExtVpdPanel.h +++ b/include/asm-powerpc/iseries/it_exp_vpd_panel.h @@ -16,8 +16,8 @@ * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ -#ifndef _ITEXTVPDPANEL_H -#define _ITEXTVPDPANEL_H +#ifndef _ASM_POWERPC_ISERIES_IT_EXT_VPD_PANEL_H +#define _ASM_POWERPC_ISERIES_IT_EXT_VPD_PANEL_H /* * This struct maps the panel information @@ -49,4 +49,4 @@ struct ItExtVpdPanel { extern struct ItExtVpdPanel xItExtVpdPanel; -#endif /* _ITEXTVPDPANEL_H */ +#endif /* _ASM_POWERPC_ISERIES_IT_EXT_VPD_PANEL_H */ diff --git a/include/asm-ppc64/iSeries/ItLpNaca.h b/include/asm-powerpc/iseries/it_lp_naca.h index 225d0176779d..c3ef1de45d82 100644 --- a/include/asm-ppc64/iSeries/ItLpNaca.h +++ b/include/asm-powerpc/iseries/it_lp_naca.h @@ -16,8 +16,8 @@ * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ -#ifndef _ITLPNACA_H -#define _ITLPNACA_H +#ifndef _ASM_POWERPC_ISERIES_IT_LP_NACA_H +#define _ASM_POWERPC_ISERIES_IT_LP_NACA_H #include <linux/types.h> @@ -77,4 +77,4 @@ struct ItLpNaca { extern struct ItLpNaca itLpNaca; -#endif /* _ITLPNACA_H */ +#endif /* _ASM_POWERPC_ISERIES_IT_LP_NACA_H */ diff --git a/include/asm-ppc64/iSeries/ItLpQueue.h b/include/asm-powerpc/iseries/it_lp_queue.h index 69b26ad74135..a60d03afbf95 100644 --- a/include/asm-ppc64/iSeries/ItLpQueue.h +++ b/include/asm-powerpc/iseries/it_lp_queue.h @@ -16,8 +16,8 @@ * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ -#ifndef _ITLPQUEUE_H -#define _ITLPQUEUE_H +#ifndef _ASM_POWERPC_ISERIES_IT_LP_QUEUE_H +#define _ASM_POWERPC_ISERIES_IT_LP_QUEUE_H /* * This control block defines the simple LP queue structure that is @@ -78,4 +78,4 @@ extern int hvlpevent_is_pending(void); extern void process_hvlpevents(struct pt_regs *); extern void setup_hvlpevent_queue(void); -#endif /* _ITLPQUEUE_H */ +#endif /* _ASM_POWERPC_ISERIES_IT_LP_QUEUE_H */ diff --git a/include/asm-ppc64/iSeries/ItLpRegSave.h b/include/asm-powerpc/iseries/it_lp_reg_save.h index 1b3087e76205..288044b702de 100644 --- a/include/asm-ppc64/iSeries/ItLpRegSave.h +++ b/include/asm-powerpc/iseries/it_lp_reg_save.h @@ -16,8 +16,8 @@ * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ -#ifndef _ITLPREGSAVE_H -#define _ITLPREGSAVE_H +#ifndef _ASM_POWERPC_ISERIES_IT_LP_REG_SAVE_H +#define _ASM_POWERPC_ISERIES_IT_LP_REG_SAVE_H /* * This control block contains the data that is shared between PLIC diff --git a/include/asm-ppc64/iSeries/LparMap.h b/include/asm-powerpc/iseries/lpar_map.h index a6840b186d03..84fc321615bf 100644 --- a/include/asm-ppc64/iSeries/LparMap.h +++ b/include/asm-powerpc/iseries/lpar_map.h @@ -16,8 +16,8 @@ * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ -#ifndef _LPARMAP_H -#define _LPARMAP_H +#ifndef _ASM_POWERPC_ISERIES_LPAR_MAP_H +#define _ASM_POWERPC_ISERIES_LPAR_MAP_H #ifndef __ASSEMBLY__ @@ -80,4 +80,4 @@ extern const struct LparMap xLparMap; /* the fixed address where the LparMap exists */ #define LPARMAP_PHYS 0x7000 -#endif /* _LPARMAP_H */ +#endif /* _ASM_POWERPC_ISERIES_LPAR_MAP_H */ diff --git a/include/asm-ppc64/iSeries/mf.h b/include/asm-powerpc/iseries/mf.h index 7e6a0d936999..e7bd57a03fb1 100644 --- a/include/asm-ppc64/iSeries/mf.h +++ b/include/asm-powerpc/iseries/mf.h @@ -23,13 +23,13 @@ * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ -#ifndef _ASM_PPC64_ISERIES_MF_H -#define _ASM_PPC64_ISERIES_MF_H +#ifndef _ASM_POWERPC_ISERIES_MF_H +#define _ASM_POWERPC_ISERIES_MF_H #include <linux/types.h> -#include <asm/iSeries/HvTypes.h> -#include <asm/iSeries/HvCallEvent.h> +#include <asm/iseries/hv_types.h> +#include <asm/iseries/hv_call_event.h> struct rtc_time; @@ -54,4 +54,4 @@ extern int mf_get_rtc(struct rtc_time *tm); extern int mf_get_boot_rtc(struct rtc_time *tm); extern int mf_set_rtc(struct rtc_time *tm); -#endif /* _ASM_PPC64_ISERIES_MF_H */ +#endif /* _ASM_POWERPC_ISERIES_MF_H */ diff --git a/include/asm-ppc64/iSeries/vio.h b/include/asm-powerpc/iseries/vio.h index 6c05e6257f53..7e3a469420dd 100644 --- a/include/asm-ppc64/iSeries/vio.h +++ b/include/asm-powerpc/iseries/vio.h @@ -38,11 +38,11 @@ * Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA * */ -#ifndef _ISERIES_VIO_H -#define _ISERIES_VIO_H +#ifndef _ASM_POWERPC_ISERIES_VIO_H +#define _ASM_POWERPC_ISERIES_VIO_H -#include <asm/iSeries/HvTypes.h> -#include <asm/iSeries/HvLpEvent.h> +#include <asm/iseries/hv_types.h> +#include <asm/iseries/hv_lp_event.h> /* * iSeries virtual I/O events use the subtype field in @@ -127,4 +127,4 @@ struct device; extern struct device *iSeries_vio_dev; -#endif /* _ISERIES_VIO_H */ +#endif /* _ASM_POWERPC_ISERIES_VIO_H */ diff --git a/include/asm-ppc64/kdebug.h b/include/asm-powerpc/kdebug.h index d383d161cf8d..9dcbac674811 100644 --- a/include/asm-ppc64/kdebug.h +++ b/include/asm-powerpc/kdebug.h @@ -1,5 +1,5 @@ -#ifndef _PPC64_KDEBUG_H -#define _PPC64_KDEBUG_H 1 +#ifndef _ASM_POWERPC_KDEBUG_H +#define _ASM_POWERPC_KDEBUG_H /* nearly identical to x86_64/i386 code */ @@ -21,7 +21,7 @@ struct die_args { then free. */ int register_die_notifier(struct notifier_block *nb); -extern struct notifier_block *ppc64_die_chain; +extern struct notifier_block *powerpc_die_chain; /* Grossly misnamed. */ enum die_val { @@ -30,14 +30,13 @@ enum die_val { DIE_DABR_MATCH, DIE_BPT, DIE_SSTEP, - DIE_GPF, DIE_PAGE_FAULT, }; static inline int notify_die(enum die_val val,char *str,struct pt_regs *regs,long err,int trap, int sig) { struct die_args args = { .regs=regs, .str=str, .err=err, .trapnr=trap,.signr=sig }; - return notifier_call_chain(&ppc64_die_chain, val, &args); + return notifier_call_chain(&powerpc_die_chain, val, &args); } -#endif +#endif /* _ASM_POWERPC_KDEBUG_H */ diff --git a/include/asm-powerpc/kexec.h b/include/asm-powerpc/kexec.h new file mode 100644 index 000000000000..c72ffc709ea8 --- /dev/null +++ b/include/asm-powerpc/kexec.h @@ -0,0 +1,50 @@ +#ifndef _ASM_POWERPC_KEXEC_H +#define _ASM_POWERPC_KEXEC_H + +/* + * Maximum page that is mapped directly into kernel memory. + * XXX: Since we copy virt we can use any page we allocate + */ +#define KEXEC_SOURCE_MEMORY_LIMIT (-1UL) + +/* + * Maximum address we can reach in physical address mode. + * XXX: I want to allow initrd in highmem. Otherwise set to rmo on LPAR. + */ +#define KEXEC_DESTINATION_MEMORY_LIMIT (-1UL) + +/* Maximum address we can use for the control code buffer */ +#ifdef __powerpc64__ +#define KEXEC_CONTROL_MEMORY_LIMIT (-1UL) +#else +/* TASK_SIZE, probably left over from use_mm ?? */ +#define KEXEC_CONTROL_MEMORY_LIMIT TASK_SIZE +#endif + +#define KEXEC_CONTROL_CODE_SIZE 4096 + +/* The native architecture */ +#ifdef __powerpc64__ +#define KEXEC_ARCH KEXEC_ARCH_PPC64 +#else +#define KEXEC_ARCH KEXEC_ARCH_PPC +#endif + +#ifndef __ASSEMBLY__ + +#define MAX_NOTE_BYTES 1024 +typedef u32 note_buf_t[MAX_NOTE_BYTES / sizeof(u32)]; + +extern note_buf_t crash_notes[]; + +#ifdef __powerpc64__ +extern void kexec_smp_wait(void); /* get and clear naca physid, wait for + master to copy new code to 0 */ +extern void __init kexec_setup(void); +#else +struct kimage; +extern void machine_kexec_simple(struct kimage *image); +#endif + +#endif /* ! __ASSEMBLY__ */ +#endif /* _ASM_POWERPC_KEXEC_H */ diff --git a/include/asm-ppc/keylargo.h b/include/asm-powerpc/keylargo.h index a669a3f0f5a2..a669a3f0f5a2 100644 --- a/include/asm-ppc/keylargo.h +++ b/include/asm-powerpc/keylargo.h diff --git a/include/asm-powerpc/kmap_types.h b/include/asm-powerpc/kmap_types.h new file mode 100644 index 000000000000..b6bac6f61c16 --- /dev/null +++ b/include/asm-powerpc/kmap_types.h @@ -0,0 +1,33 @@ +#ifndef _ASM_POWERPC_KMAP_TYPES_H +#define _ASM_POWERPC_KMAP_TYPES_H + +#ifdef __KERNEL__ + +/* + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version + * 2 of the License, or (at your option) any later version. + */ + +enum km_type { + KM_BOUNCE_READ, + KM_SKB_SUNRPC_DATA, + KM_SKB_DATA_SOFTIRQ, + KM_USER0, + KM_USER1, + KM_BIO_SRC_IRQ, + KM_BIO_DST_IRQ, + KM_PTE0, + KM_PTE1, + KM_IRQ0, + KM_IRQ1, + KM_SOFTIRQ0, + KM_SOFTIRQ1, + KM_PPC_SYNC_PAGE, + KM_PPC_SYNC_ICACHE, + KM_TYPE_NR +}; + +#endif /* __KERNEL__ */ +#endif /* _ASM_POWERPC_KMAP_TYPES_H */ diff --git a/include/asm-ppc64/kprobes.h b/include/asm-powerpc/kprobes.h index d9129d2b038e..6cd0a3bfa280 100644 --- a/include/asm-ppc64/kprobes.h +++ b/include/asm-powerpc/kprobes.h @@ -1,8 +1,7 @@ -#ifndef _ASM_KPROBES_H -#define _ASM_KPROBES_H +#ifndef _ASM_POWERPC_KPROBES_H +#define _ASM_POWERPC_KPROBES_H /* * Kernel Probes (KProbes) - * include/asm-ppc64/kprobes.h * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -28,6 +27,7 @@ */ #include <linux/types.h> #include <linux/ptrace.h> +#include <linux/percpu.h> struct pt_regs; @@ -54,6 +54,20 @@ struct arch_specific_insn { kprobe_opcode_t *insn; }; +struct prev_kprobe { + struct kprobe *kp; + unsigned long status; + unsigned long saved_msr; +}; + +/* per-cpu kprobe control block */ +struct kprobe_ctlblk { + unsigned long kprobe_status; + unsigned long kprobe_saved_msr; + struct pt_regs jprobe_saved_regs; + struct prev_kprobe prev_kprobe; +}; + #ifdef CONFIG_KPROBES extern int kprobe_exceptions_notify(struct notifier_block *self, unsigned long val, void *data); @@ -64,4 +78,4 @@ static inline int kprobe_exceptions_notify(struct notifier_block *self, return 0; } #endif -#endif /* _ASM_KPROBES_H */ +#endif /* _ASM_POWERPC_KPROBES_H */ diff --git a/include/asm-ppc64/lmb.h b/include/asm-powerpc/lmb.h index de91e034bd98..ea0afe343545 100644 --- a/include/asm-ppc64/lmb.h +++ b/include/asm-powerpc/lmb.h @@ -50,7 +50,7 @@ extern unsigned long __init lmb_alloc_base(unsigned long, unsigned long, extern unsigned long __init lmb_phys_mem_size(void); extern unsigned long __init lmb_end_of_DRAM(void); extern unsigned long __init lmb_abs_to_phys(unsigned long); -extern void __init lmb_enforce_memory_limit(void); +extern void __init lmb_enforce_memory_limit(unsigned long); extern void lmb_dump_all(void); diff --git a/include/asm-ppc64/lppaca.h b/include/asm-powerpc/lppaca.h index 9e2a6c0649a0..c1bedab1515b 100644 --- a/include/asm-ppc64/lppaca.h +++ b/include/asm-powerpc/lppaca.h @@ -16,8 +16,8 @@ * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ -#ifndef _ASM_LPPACA_H -#define _ASM_LPPACA_H +#ifndef _ASM_POWERPC_LPPACA_H +#define _ASM_POWERPC_LPPACA_H //============================================================================= // @@ -28,8 +28,7 @@ //---------------------------------------------------------------------------- #include <asm/types.h> -struct lppaca -{ +struct lppaca { //============================================================================= // CACHE_LINE_1 0x0000 - 0x007F Contains read-only data // NOTE: The xDynXyz fields are fields that will be dynamically changed by @@ -129,4 +128,4 @@ struct lppaca u8 pmc_save_area[256]; // PMC interrupt Area x00-xFF }; -#endif /* _ASM_LPPACA_H */ +#endif /* _ASM_POWERPC_LPPACA_H */ diff --git a/include/asm-ppc64/machdep.h b/include/asm-powerpc/machdep.h index 8027160ec96d..c011abb8b600 100644 --- a/include/asm-ppc64/machdep.h +++ b/include/asm-powerpc/machdep.h @@ -1,6 +1,6 @@ +#ifndef _ASM_POWERPC_MACHDEP_H +#define _ASM_POWERPC_MACHDEP_H #ifdef __KERNEL__ -#ifndef _PPC64_MACHDEP_H -#define _PPC64_MACHDEP_H /* * This program is free software; you can redistribute it and/or @@ -16,6 +16,11 @@ #include <asm/setup.h> +/* We export this macro for external modules like Alsa to know if + * ppc_md.feature_call is implemented or not + */ +#define CONFIG_PPC_HAS_FEATURE_CALLS + struct pt_regs; struct pci_bus; struct device_node; @@ -39,26 +44,28 @@ struct smp_ops_t { #endif struct machdep_calls { +#ifdef CONFIG_PPC64 void (*hpte_invalidate)(unsigned long slot, unsigned long va, - int large, + int psize, int local); long (*hpte_updatepp)(unsigned long slot, unsigned long newpp, unsigned long va, - int large, + int pize, int local); void (*hpte_updateboltedpp)(unsigned long newpp, - unsigned long ea); + unsigned long ea, + int psize); long (*hpte_insert)(unsigned long hpte_group, unsigned long va, unsigned long prpn, + unsigned long rflags, unsigned long vflags, - unsigned long rflags); + int psize); long (*hpte_remove)(unsigned long hpte_group); - void (*flush_hash_range)(unsigned long context, - unsigned long number, - int local); + void (*flush_hash_range)(unsigned long number, int local); + /* special for kexec, to be called in real mode, linar mapping is * destroyed as well */ void (*hpte_clear_all)(void); @@ -75,18 +82,23 @@ struct machdep_calls { void (*iommu_dev_setup)(struct pci_dev *dev); void (*iommu_bus_setup)(struct pci_bus *bus); void (*irq_bus_setup)(struct pci_bus *bus); +#endif int (*probe)(int platform); void (*setup_arch)(void); void (*init_early)(void); /* Optional, may be NULL. */ - void (*get_cpuinfo)(struct seq_file *m); + void (*show_cpuinfo)(struct seq_file *m); + void (*show_percpuinfo)(struct seq_file *m, int i); void (*init_IRQ)(void); int (*get_irq)(struct pt_regs *); - void (*cpu_irq_down)(int secondary); +#ifdef CONFIG_KEXEC + void (*kexec_cpu_down)(int crash_shutdown, int secondary); +#endif /* PCI stuff */ + /* Called after scanning the bus, before allocating resources */ void (*pcibios_fixup)(void); int (*pci_probe_mode)(struct pci_bus *); @@ -96,9 +108,13 @@ struct machdep_calls { void (*panic)(char *str); void (*cpu_die)(void); + long (*time_init)(void); /* Optional, may be NULL */ + int (*set_rtc_time)(struct rtc_time *); void (*get_rtc_time)(struct rtc_time *); - void (*get_boot_time)(struct rtc_time *); + unsigned long (*get_boot_time)(void); + unsigned char (*rtc_read_val)(int addr); + void (*rtc_write_val)(int addr, unsigned char val); void (*calibrate_decr)(void); @@ -107,10 +123,12 @@ struct machdep_calls { /* Interface for platform error logging */ void (*log_error)(char *buf, unsigned int err_type, int fatal); + unsigned char (*nvram_read_val)(int addr); + void (*nvram_write_val)(int addr, unsigned char val); ssize_t (*nvram_write)(char *buf, size_t count, loff_t *index); ssize_t (*nvram_read)(char *buf, size_t count, loff_t *index); ssize_t (*nvram_size)(void); - int (*nvram_sync)(void); + void (*nvram_sync)(void); /* Exception handlers */ void (*system_reset_exception)(struct pt_regs *regs); @@ -130,19 +148,100 @@ struct machdep_calls { /* Get access protection for /dev/mem */ pgprot_t (*phys_mem_access_prot)(struct file *file, - unsigned long offset, + unsigned long pfn, unsigned long size, pgprot_t vma_prot); /* Idle loop for this platform, leave empty for default idle loop */ - int (*idle_loop)(void); + void (*idle_loop)(void); - /* Function to enable pmcs for this platform, called once per cpu. */ + /* Function to enable performance monitor counters for this + platform, called once per cpu. */ void (*enable_pmcs)(void); + + /* Set DABR for this platform, leave empty for default implemenation */ + int (*set_dabr)(unsigned long dabr); + +#ifdef CONFIG_PPC32 /* XXX for now */ + /* A general init function, called by ppc_init in init/main.c. + May be NULL. */ + void (*init)(void); + + void (*idle)(void); + void (*power_save)(void); + + void (*heartbeat)(void); + unsigned long heartbeat_reset; + unsigned long heartbeat_count; + + void (*setup_io_mappings)(void); + + void (*early_serial_map)(void); + void (*kgdb_map_scc)(void); + + /* + * optional PCI "hooks" + */ + + /* Called after PPC generic resource fixup to perform + machine specific fixups */ + void (*pcibios_fixup_resources)(struct pci_dev *); + + /* Called for each PCI bus in the system when it's probed */ + void (*pcibios_fixup_bus)(struct pci_bus *); + + /* Called when pci_enable_device() is called (initial=0) or + * when a device with no assigned resource is found (initial=1). + * Returns 0 to allow assignment/enabling of the device. */ + int (*pcibios_enable_device_hook)(struct pci_dev *, int initial); + + /* For interrupt routing */ + unsigned char (*pci_swizzle)(struct pci_dev *, unsigned char *); + int (*pci_map_irq)(struct pci_dev *, unsigned char, unsigned char); + + /* Called in indirect_* to avoid touching devices */ + int (*pci_exclude_device)(unsigned char, unsigned char); + + /* Called at then very end of pcibios_init() */ + void (*pcibios_after_init)(void); + + /* this is for modules, since _machine can be a define -- Cort */ + int ppc_machine; + +#ifdef CONFIG_KEXEC + /* Called to shutdown machine specific hardware not already controlled + * by other drivers. + * XXX Should we move this one out of kexec scope? + */ + void (*machine_shutdown)(void); + + /* Called to do the minimal shutdown needed to run a kexec'd kernel + * to run successfully. + * XXX Should we move this one out of kexec scope? + */ + void (*machine_crash_shutdown)(void); + + /* Called to do what every setup is needed on image and the + * reboot code buffer. Returns 0 on success. + * Provide your own (maybe dummy) implementation if your platform + * claims to support kexec. + */ + int (*machine_kexec_prepare)(struct kimage *image); + + /* Called to handle any machine specific cleanup on image */ + void (*machine_kexec_cleanup)(struct kimage *image); + + /* Called to perform the _real_ kexec. + * Do NOT allocate memory or fail here. We are past the point of + * no return. + */ + void (*machine_kexec)(struct kimage *image); +#endif /* CONFIG_KEXEC */ +#endif /* CONFIG_PPC32 */ }; -extern int default_idle(void); -extern int native_idle(void); +extern void default_idle(void); +extern void native_idle(void); extern struct machdep_calls ppc_md; extern char cmd_line[COMMAND_LINE_SIZE]; @@ -162,6 +261,13 @@ extern sys_ctrler_t sys_ctrler; #endif /* CONFIG_PPC_PMAC */ +extern void setup_pci_ptrs(void); + +#ifdef CONFIG_SMP +/* Poor default implementations */ +extern void __devinit smp_generic_give_timebase(void); +extern void __devinit smp_generic_take_timebase(void); +#endif /* CONFIG_SMP */ /* Functions to produce codes on the leds. @@ -181,5 +287,5 @@ static inline void log_error(char *buf, unsigned int err_type, int fatal) ppc_md.log_error(buf, err_type, fatal); } -#endif /* _PPC64_MACHDEP_H */ #endif /* __KERNEL__ */ +#endif /* _ASM_POWERPC_MACHDEP_H */ diff --git a/include/asm-ppc/macio.h b/include/asm-powerpc/macio.h index a481b772d154..b553dd4b139e 100644 --- a/include/asm-ppc/macio.h +++ b/include/asm-powerpc/macio.h @@ -1,7 +1,6 @@ #ifndef __MACIO_ASIC_H__ #define __MACIO_ASIC_H__ -#include <linux/mod_devicetable.h> #include <asm/of_device.h> extern struct bus_type macio_bus_type; diff --git a/include/asm-ppc/mediabay.h b/include/asm-powerpc/mediabay.h index 9daa3252d7b6..9daa3252d7b6 100644 --- a/include/asm-ppc/mediabay.h +++ b/include/asm-powerpc/mediabay.h diff --git a/include/asm-ppc64/mmu.h b/include/asm-powerpc/mmu.h index 7bc42eb087ad..c1b4bbabbe97 100644 --- a/include/asm-ppc64/mmu.h +++ b/include/asm-powerpc/mmu.h @@ -1,3 +1,10 @@ +#ifndef _ASM_POWERPC_MMU_H_ +#define _ASM_POWERPC_MMU_H_ + +#ifndef CONFIG_PPC64 +#include <asm-ppc/mmu.h> +#else + /* * PowerPC memory management structures * @@ -10,10 +17,7 @@ * 2 of the License, or (at your option) any later version. */ -#ifndef _PPC64_MMU_H_ -#define _PPC64_MMU_H_ - -#include <linux/config.h> +#include <asm/asm-compat.h> #include <asm/page.h> /* @@ -29,7 +33,7 @@ /* Location of cpu0's segment table */ #define STAB0_PAGE 0x6 -#define STAB0_PHYS_ADDR (STAB0_PAGE<<PAGE_SHIFT) +#define STAB0_PHYS_ADDR (STAB0_PAGE<<12) #ifndef __ASSEMBLY__ extern char initial_stab[]; @@ -47,13 +51,21 @@ extern char initial_stab[]; /* Bits in the SLB VSID word */ #define SLB_VSID_SHIFT 12 +#define SLB_VSID_B ASM_CONST(0xc000000000000000) +#define SLB_VSID_B_256M ASM_CONST(0x0000000000000000) +#define SLB_VSID_B_1T ASM_CONST(0x4000000000000000) #define SLB_VSID_KS ASM_CONST(0x0000000000000800) #define SLB_VSID_KP ASM_CONST(0x0000000000000400) #define SLB_VSID_N ASM_CONST(0x0000000000000200) /* no-execute */ -#define SLB_VSID_L ASM_CONST(0x0000000000000100) /* largepage */ +#define SLB_VSID_L ASM_CONST(0x0000000000000100) #define SLB_VSID_C ASM_CONST(0x0000000000000080) /* class */ -#define SLB_VSID_LS ASM_CONST(0x0000000000000070) /* size of largepage */ - +#define SLB_VSID_LP ASM_CONST(0x0000000000000030) +#define SLB_VSID_LP_00 ASM_CONST(0x0000000000000000) +#define SLB_VSID_LP_01 ASM_CONST(0x0000000000000010) +#define SLB_VSID_LP_10 ASM_CONST(0x0000000000000020) +#define SLB_VSID_LP_11 ASM_CONST(0x0000000000000030) +#define SLB_VSID_LLP (SLB_VSID_L|SLB_VSID_LP) + #define SLB_VSID_KERNEL (SLB_VSID_KP) #define SLB_VSID_USER (SLB_VSID_KP|SLB_VSID_KS|SLB_VSID_C) @@ -68,6 +80,7 @@ extern char initial_stab[]; #define HPTE_V_AVPN_SHIFT 7 #define HPTE_V_AVPN ASM_CONST(0xffffffffffffff80) #define HPTE_V_AVPN_VAL(x) (((x) & HPTE_V_AVPN) >> HPTE_V_AVPN_SHIFT) +#define HPTE_V_COMPARE(x,y) (!(((x) ^ (y)) & HPTE_V_AVPN)) #define HPTE_V_BOLTED ASM_CONST(0x0000000000000010) #define HPTE_V_LOCK ASM_CONST(0x0000000000000008) #define HPTE_V_LARGE ASM_CONST(0x0000000000000004) @@ -80,6 +93,7 @@ extern char initial_stab[]; #define HPTE_R_RPN ASM_CONST(0x3ffffffffffff000) #define HPTE_R_FLAGS ASM_CONST(0x00000000000003ff) #define HPTE_R_PP ASM_CONST(0x0000000000000003) +#define HPTE_R_N ASM_CONST(0x0000000000000004) /* Values for PP (assumes Ks=0, Kp=1) */ /* pp0 will always be 0 for linux */ @@ -98,114 +112,146 @@ typedef struct { extern hpte_t *htab_address; extern unsigned long htab_hash_mask; -static inline unsigned long hpt_hash(unsigned long vpn, int large) +/* + * Page size definition + * + * shift : is the "PAGE_SHIFT" value for that page size + * sllp : is a bit mask with the value of SLB L || LP to be or'ed + * directly to a slbmte "vsid" value + * penc : is the HPTE encoding mask for the "LP" field: + * + */ +struct mmu_psize_def { - unsigned long vsid; - unsigned long page; - - if (large) { - vsid = vpn >> 4; - page = vpn & 0xf; - } else { - vsid = vpn >> 16; - page = vpn & 0xffff; - } + unsigned int shift; /* number of bits */ + unsigned int penc; /* HPTE encoding */ + unsigned int tlbiel; /* tlbiel supported for that page size */ + unsigned long avpnm; /* bits to mask out in AVPN in the HPTE */ + unsigned long sllp; /* SLB L||LP (exact mask to use in slbmte) */ +}; - return (vsid & 0x7fffffffffUL) ^ page; -} +#endif /* __ASSEMBLY__ */ -static inline void __tlbie(unsigned long va, int large) -{ - /* clear top 16 bits, non SLS segment */ - va &= ~(0xffffULL << 48); - - if (large) { - va &= HPAGE_MASK; - asm volatile("tlbie %0,1" : : "r"(va) : "memory"); - } else { - va &= PAGE_MASK; - asm volatile("tlbie %0,0" : : "r"(va) : "memory"); - } -} +/* + * The kernel use the constants below to index in the page sizes array. + * The use of fixed constants for this purpose is better for performances + * of the low level hash refill handlers. + * + * A non supported page size has a "shift" field set to 0 + * + * Any new page size being implemented can get a new entry in here. Whether + * the kernel will use it or not is a different matter though. The actual page + * size used by hugetlbfs is not defined here and may be made variable + */ -static inline void tlbie(unsigned long va, int large) -{ - asm volatile("ptesync": : :"memory"); - __tlbie(va, large); - asm volatile("eieio; tlbsync; ptesync": : :"memory"); -} +#define MMU_PAGE_4K 0 /* 4K */ +#define MMU_PAGE_64K 1 /* 64K */ +#define MMU_PAGE_64K_AP 2 /* 64K Admixed (in a 4K segment) */ +#define MMU_PAGE_1M 3 /* 1M */ +#define MMU_PAGE_16M 4 /* 16M */ +#define MMU_PAGE_16G 5 /* 16G */ +#define MMU_PAGE_COUNT 6 -static inline void __tlbiel(unsigned long va) -{ - /* clear top 16 bits, non SLS segment */ - va &= ~(0xffffULL << 48); - va &= PAGE_MASK; - - /* - * Thanks to Alan Modra we are now able to use machine specific - * assembly instructions (like tlbiel) by using the gas -many flag. - * However we have to support older toolchains so for the moment - * we hardwire it. - */ -#if 0 - asm volatile("tlbiel %0" : : "r"(va) : "memory"); -#else - asm volatile(".long 0x7c000224 | (%0 << 11)" : : "r"(va) : "memory"); -#endif -} - -static inline void tlbiel(unsigned long va) -{ - asm volatile("ptesync": : :"memory"); - __tlbiel(va); - asm volatile("ptesync": : :"memory"); -} +#ifndef __ASSEMBLY__ -static inline unsigned long slot2va(unsigned long hpte_v, unsigned long slot) -{ - unsigned long avpn = HPTE_V_AVPN_VAL(hpte_v); - unsigned long va; +/* + * The current system page sizes + */ +extern struct mmu_psize_def mmu_psize_defs[MMU_PAGE_COUNT]; +extern int mmu_linear_psize; +extern int mmu_virtual_psize; - va = avpn << 23; +#ifdef CONFIG_HUGETLB_PAGE +/* + * The page size index of the huge pages for use by hugetlbfs + */ +extern int mmu_huge_psize; - if (! (hpte_v & HPTE_V_LARGE)) { - unsigned long vpi, pteg; +#endif /* CONFIG_HUGETLB_PAGE */ - pteg = slot / HPTES_PER_GROUP; - if (hpte_v & HPTE_V_SECONDARY) - pteg = ~pteg; +/* + * This function sets the AVPN and L fields of the HPTE appropriately + * for the page size + */ +static inline unsigned long hpte_encode_v(unsigned long va, int psize) +{ + unsigned long v = + v = (va >> 23) & ~(mmu_psize_defs[psize].avpnm); + v <<= HPTE_V_AVPN_SHIFT; + if (psize != MMU_PAGE_4K) + v |= HPTE_V_LARGE; + return v; +} - vpi = ((va >> 28) ^ pteg) & htab_hash_mask; +/* + * This function sets the ARPN, and LP fields of the HPTE appropriately + * for the page size. We assume the pa is already "clean" that is properly + * aligned for the requested page size + */ +static inline unsigned long hpte_encode_r(unsigned long pa, int psize) +{ + unsigned long r; - va |= vpi << PAGE_SHIFT; + /* A 4K page needs no special encoding */ + if (psize == MMU_PAGE_4K) + return pa & HPTE_R_RPN; + else { + unsigned int penc = mmu_psize_defs[psize].penc; + unsigned int shift = mmu_psize_defs[psize].shift; + return (pa & ~((1ul << shift) - 1)) | (penc << 12); } - - return va; + return r; } /* - * Handle a fault by adding an HPTE. If the address can't be determined - * to be valid via Linux page tables, return 1. If handled return 0 + * This hashes a virtual address for a 256Mb segment only for now */ -extern int __hash_page(unsigned long ea, unsigned long access, - unsigned long vsid, pte_t *ptep, unsigned long trap, - int local); + +static inline unsigned long hpt_hash(unsigned long va, unsigned int shift) +{ + return ((va >> 28) & 0x7fffffffffUL) ^ ((va & 0x0fffffffUL) >> shift); +} + +extern int __hash_page_4K(unsigned long ea, unsigned long access, + unsigned long vsid, pte_t *ptep, unsigned long trap, + unsigned int local); +extern int __hash_page_64K(unsigned long ea, unsigned long access, + unsigned long vsid, pte_t *ptep, unsigned long trap, + unsigned int local); +struct mm_struct; +extern int hash_huge_page(struct mm_struct *mm, unsigned long access, + unsigned long ea, unsigned long vsid, int local); extern void htab_finish_init(void); +extern int htab_bolt_mapping(unsigned long vstart, unsigned long vend, + unsigned long pstart, unsigned long mode, + int psize); +extern void htab_initialize(void); +extern void htab_initialize_secondary(void); extern void hpte_init_native(void); extern void hpte_init_lpar(void); extern void hpte_init_iSeries(void); +extern void mm_init_ppc64(void); extern long pSeries_lpar_hpte_insert(unsigned long hpte_group, unsigned long va, unsigned long prpn, - unsigned long vflags, - unsigned long rflags); -extern long native_hpte_insert(unsigned long hpte_group, unsigned long va, - unsigned long prpn, - unsigned long vflags, unsigned long rflags); + unsigned long rflags, + unsigned long vflags, int psize); + +extern long native_hpte_insert(unsigned long hpte_group, + unsigned long va, unsigned long prpn, + unsigned long rflags, + unsigned long vflags, int psize); + +extern long iSeries_hpte_insert(unsigned long hpte_group, + unsigned long va, unsigned long prpn, + unsigned long rflags, + unsigned long vflags, int psize); extern void stabs_alloc(void); +extern void slb_initialize(void); +extern void stab_initialize(unsigned long stab); #endif /* __ASSEMBLY__ */ @@ -349,4 +395,5 @@ static inline unsigned long get_vsid(unsigned long context, unsigned long ea) #endif /* __ASSEMBLY */ -#endif /* _PPC64_MMU_H_ */ +#endif /* CONFIG_PPC64 */ +#endif /* _ASM_POWERPC_MMU_H_ */ diff --git a/include/asm-ppc64/mmu_context.h b/include/asm-powerpc/mmu_context.h index 77a743402db4..ea6798c7d5fc 100644 --- a/include/asm-ppc64/mmu_context.h +++ b/include/asm-powerpc/mmu_context.h @@ -1,7 +1,10 @@ -#ifndef __PPC64_MMU_CONTEXT_H -#define __PPC64_MMU_CONTEXT_H +#ifndef __ASM_POWERPC_MMU_CONTEXT_H +#define __ASM_POWERPC_MMU_CONTEXT_H + +#ifndef CONFIG_PPC64 +#include <asm-ppc/mmu_context.h> +#else -#include <linux/config.h> #include <linux/kernel.h> #include <linux/mm.h> #include <asm/mmu.h> @@ -17,22 +20,15 @@ */ /* - * Every architecture must define this function. It's the fastest - * way of searching a 140-bit bitmap where the first 100 bits are - * unlikely to be set. It's guaranteed that at least one of the 140 - * bits is cleared. + * Getting into a kernel thread, there is no valid user segment, mark + * paca->pgdir NULL so that SLB miss on user addresses will fault */ -static inline int sched_find_first_bit(unsigned long *b) -{ - if (unlikely(b[0])) - return __ffs(b[0]); - if (unlikely(b[1])) - return __ffs(b[1]) + 64; - return __ffs(b[2]) + 128; -} - -static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk) +static inline void enter_lazy_tlb(struct mm_struct *mm, + struct task_struct *tsk) { +#ifdef CONFIG_PPC_64K_PAGES + get_paca()->pgdir = NULL; +#endif /* CONFIG_PPC_64K_PAGES */ } #define NO_CONTEXT 0 @@ -55,8 +51,13 @@ static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next, cpu_set(smp_processor_id(), next->cpu_vm_mask); /* No need to flush userspace segments if the mm doesnt change */ +#ifdef CONFIG_PPC_64K_PAGES + if (prev == next && get_paca()->pgdir == next->pgd) + return; +#else if (prev == next) return; +#endif /* CONFIG_PPC_64K_PAGES */ #ifdef CONFIG_ALTIVEC if (cpu_has_feature(CPU_FTR_ALTIVEC)) @@ -84,4 +85,5 @@ static inline void activate_mm(struct mm_struct *prev, struct mm_struct *next) local_irq_restore(flags); } -#endif /* __PPC64_MMU_CONTEXT_H */ +#endif /* CONFIG_PPC64 */ +#endif /* __ASM_POWERPC_MMU_CONTEXT_H */ diff --git a/include/asm-powerpc/mmzone.h b/include/asm-powerpc/mmzone.h new file mode 100644 index 000000000000..54958d6cae04 --- /dev/null +++ b/include/asm-powerpc/mmzone.h @@ -0,0 +1,50 @@ +/* + * Written by Kanoj Sarcar (kanoj@sgi.com) Aug 99 + * + * PowerPC64 port: + * Copyright (C) 2002 Anton Blanchard, IBM Corp. + */ +#ifndef _ASM_MMZONE_H_ +#define _ASM_MMZONE_H_ + +#include <linux/config.h> + +/* + * generic non-linear memory support: + * + * 1) we will not split memory into more chunks than will fit into the + * flags field of the struct page + */ + +#ifdef CONFIG_NEED_MULTIPLE_NODES + +extern struct pglist_data *node_data[]; +/* + * Return a pointer to the node data for node n. + */ +#define NODE_DATA(nid) (node_data[nid]) + +/* + * Following are specific to this numa platform. + */ + +extern int numa_cpu_lookup_table[]; +extern cpumask_t numa_cpumask_lookup_table[]; +#ifdef CONFIG_MEMORY_HOTPLUG +extern unsigned long max_pfn; +#endif + +/* + * Following are macros that each numa implmentation must define. + */ + +#define node_start_pfn(nid) (NODE_DATA(nid)->node_start_pfn) +#define node_end_pfn(nid) (NODE_DATA(nid)->node_end_pfn) + +#endif /* CONFIG_NEED_MULTIPLE_NODES */ + +#ifdef CONFIG_HAVE_ARCH_EARLY_PFN_TO_NID +extern int __init early_pfn_to_nid(unsigned long pfn); +#endif + +#endif /* _ASM_MMZONE_H_ */ diff --git a/include/asm-powerpc/mpic.h b/include/asm-powerpc/mpic.h new file mode 100644 index 000000000000..7083d1f74260 --- /dev/null +++ b/include/asm-powerpc/mpic.h @@ -0,0 +1,287 @@ +#ifndef _ASM_POWERPC_MPIC_H +#define _ASM_POWERPC_MPIC_H + +#include <linux/irq.h> + +/* + * Global registers + */ + +#define MPIC_GREG_BASE 0x01000 + +#define MPIC_GREG_FEATURE_0 0x00000 +#define MPIC_GREG_FEATURE_LAST_SRC_MASK 0x07ff0000 +#define MPIC_GREG_FEATURE_LAST_SRC_SHIFT 16 +#define MPIC_GREG_FEATURE_LAST_CPU_MASK 0x00001f00 +#define MPIC_GREG_FEATURE_LAST_CPU_SHIFT 8 +#define MPIC_GREG_FEATURE_VERSION_MASK 0xff +#define MPIC_GREG_FEATURE_1 0x00010 +#define MPIC_GREG_GLOBAL_CONF_0 0x00020 +#define MPIC_GREG_GCONF_RESET 0x80000000 +#define MPIC_GREG_GCONF_8259_PTHROU_DIS 0x20000000 +#define MPIC_GREG_GCONF_BASE_MASK 0x000fffff +#define MPIC_GREG_GLOBAL_CONF_1 0x00030 +#define MPIC_GREG_VENDOR_0 0x00040 +#define MPIC_GREG_VENDOR_1 0x00050 +#define MPIC_GREG_VENDOR_2 0x00060 +#define MPIC_GREG_VENDOR_3 0x00070 +#define MPIC_GREG_VENDOR_ID 0x00080 +#define MPIC_GREG_VENDOR_ID_STEPPING_MASK 0x00ff0000 +#define MPIC_GREG_VENDOR_ID_STEPPING_SHIFT 16 +#define MPIC_GREG_VENDOR_ID_DEVICE_ID_MASK 0x0000ff00 +#define MPIC_GREG_VENDOR_ID_DEVICE_ID_SHIFT 8 +#define MPIC_GREG_VENDOR_ID_VENDOR_ID_MASK 0x000000ff +#define MPIC_GREG_PROCESSOR_INIT 0x00090 +#define MPIC_GREG_IPI_VECTOR_PRI_0 0x000a0 +#define MPIC_GREG_IPI_VECTOR_PRI_1 0x000b0 +#define MPIC_GREG_IPI_VECTOR_PRI_2 0x000c0 +#define MPIC_GREG_IPI_VECTOR_PRI_3 0x000d0 +#define MPIC_GREG_SPURIOUS 0x000e0 +#define MPIC_GREG_TIMER_FREQ 0x000f0 + +/* + * + * Timer registers + */ +#define MPIC_TIMER_BASE 0x01100 +#define MPIC_TIMER_STRIDE 0x40 + +#define MPIC_TIMER_CURRENT_CNT 0x00000 +#define MPIC_TIMER_BASE_CNT 0x00010 +#define MPIC_TIMER_VECTOR_PRI 0x00020 +#define MPIC_TIMER_DESTINATION 0x00030 + +/* + * Per-Processor registers + */ + +#define MPIC_CPU_THISBASE 0x00000 +#define MPIC_CPU_BASE 0x20000 +#define MPIC_CPU_STRIDE 0x01000 + +#define MPIC_CPU_IPI_DISPATCH_0 0x00040 +#define MPIC_CPU_IPI_DISPATCH_1 0x00050 +#define MPIC_CPU_IPI_DISPATCH_2 0x00060 +#define MPIC_CPU_IPI_DISPATCH_3 0x00070 +#define MPIC_CPU_CURRENT_TASK_PRI 0x00080 +#define MPIC_CPU_TASKPRI_MASK 0x0000000f +#define MPIC_CPU_WHOAMI 0x00090 +#define MPIC_CPU_WHOAMI_MASK 0x0000001f +#define MPIC_CPU_INTACK 0x000a0 +#define MPIC_CPU_EOI 0x000b0 + +/* + * Per-source registers + */ + +#define MPIC_IRQ_BASE 0x10000 +#define MPIC_IRQ_STRIDE 0x00020 +#define MPIC_IRQ_VECTOR_PRI 0x00000 +#define MPIC_VECPRI_MASK 0x80000000 +#define MPIC_VECPRI_ACTIVITY 0x40000000 /* Read Only */ +#define MPIC_VECPRI_PRIORITY_MASK 0x000f0000 +#define MPIC_VECPRI_PRIORITY_SHIFT 16 +#define MPIC_VECPRI_VECTOR_MASK 0x000007ff +#define MPIC_VECPRI_POLARITY_POSITIVE 0x00800000 +#define MPIC_VECPRI_POLARITY_NEGATIVE 0x00000000 +#define MPIC_VECPRI_POLARITY_MASK 0x00800000 +#define MPIC_VECPRI_SENSE_LEVEL 0x00400000 +#define MPIC_VECPRI_SENSE_EDGE 0x00000000 +#define MPIC_VECPRI_SENSE_MASK 0x00400000 +#define MPIC_IRQ_DESTINATION 0x00010 + +#define MPIC_MAX_IRQ_SOURCES 2048 +#define MPIC_MAX_CPUS 32 +#define MPIC_MAX_ISU 32 + +/* + * Special vector numbers (internal use only) + */ +#define MPIC_VEC_SPURRIOUS 255 +#define MPIC_VEC_IPI_3 254 +#define MPIC_VEC_IPI_2 253 +#define MPIC_VEC_IPI_1 252 +#define MPIC_VEC_IPI_0 251 + +/* unused */ +#define MPIC_VEC_TIMER_3 250 +#define MPIC_VEC_TIMER_2 249 +#define MPIC_VEC_TIMER_1 248 +#define MPIC_VEC_TIMER_0 247 + +/* Type definition of the cascade handler */ +typedef int (*mpic_cascade_t)(struct pt_regs *regs, void *data); + +#ifdef CONFIG_MPIC_BROKEN_U3 +/* Fixup table entry */ +struct mpic_irq_fixup +{ + u8 __iomem *base; + unsigned int irq; +}; +#endif /* CONFIG_MPIC_BROKEN_U3 */ + + +/* The instance data of a given MPIC */ +struct mpic +{ + /* The "linux" controller struct */ + hw_irq_controller hc_irq; +#ifdef CONFIG_SMP + hw_irq_controller hc_ipi; +#endif + const char *name; + /* Flags */ + unsigned int flags; + /* How many irq sources in a given ISU */ + unsigned int isu_size; + unsigned int isu_shift; + unsigned int isu_mask; + /* Offset of irq vector numbers */ + unsigned int irq_offset; + unsigned int irq_count; + /* Offset of ipi vector numbers */ + unsigned int ipi_offset; + /* Number of sources */ + unsigned int num_sources; + /* Number of CPUs */ + unsigned int num_cpus; + /* cascade handler */ + mpic_cascade_t cascade; + void *cascade_data; + unsigned int cascade_vec; + /* senses array */ + unsigned char *senses; + unsigned int senses_count; + +#ifdef CONFIG_MPIC_BROKEN_U3 + /* The fixup table */ + struct mpic_irq_fixup *fixups; + spinlock_t fixup_lock; +#endif + + /* The various ioremap'ed bases */ + volatile u32 __iomem *gregs; + volatile u32 __iomem *tmregs; + volatile u32 __iomem *cpuregs[MPIC_MAX_CPUS]; + volatile u32 __iomem *isus[MPIC_MAX_ISU]; + + /* link */ + struct mpic *next; +}; + +/* This is the primary controller, only that one has IPIs and + * has afinity control. A non-primary MPIC always uses CPU0 + * registers only + */ +#define MPIC_PRIMARY 0x00000001 +/* Set this for a big-endian MPIC */ +#define MPIC_BIG_ENDIAN 0x00000002 +/* Broken U3 MPIC */ +#define MPIC_BROKEN_U3 0x00000004 +/* Broken IPI registers (autodetected) */ +#define MPIC_BROKEN_IPI 0x00000008 +/* MPIC wants a reset */ +#define MPIC_WANTS_RESET 0x00000010 + +/* Allocate the controller structure and setup the linux irq descs + * for the range if interrupts passed in. No HW initialization is + * actually performed. + * + * @phys_addr: physial base address of the MPIC + * @flags: flags, see constants above + * @isu_size: number of interrupts in an ISU. Use 0 to use a + * standard ISU-less setup (aka powermac) + * @irq_offset: first irq number to assign to this mpic + * @irq_count: number of irqs to use with this mpic IRQ sources. Pass 0 + * to match the number of sources + * @ipi_offset: first irq number to assign to this mpic IPI sources, + * used only on primary mpic + * @senses: array of sense values + * @senses_num: number of entries in the array + * + * Note about the sense array. If none is passed, all interrupts are + * setup to be level negative unless MPIC_BROKEN_U3 is set in which + * case they are edge positive (and the array is ignored anyway). + * The values in the array start at the first source of the MPIC, + * that is senses[0] correspond to linux irq "irq_offset". + */ +extern struct mpic *mpic_alloc(unsigned long phys_addr, + unsigned int flags, + unsigned int isu_size, + unsigned int irq_offset, + unsigned int irq_count, + unsigned int ipi_offset, + unsigned char *senses, + unsigned int senses_num, + const char *name); + +/* Assign ISUs, to call before mpic_init() + * + * @mpic: controller structure as returned by mpic_alloc() + * @isu_num: ISU number + * @phys_addr: physical address of the ISU + */ +extern void mpic_assign_isu(struct mpic *mpic, unsigned int isu_num, + unsigned long phys_addr); + +/* Initialize the controller. After this has been called, none of the above + * should be called again for this mpic + */ +extern void mpic_init(struct mpic *mpic); + +/* Setup a cascade. Currently, only one cascade is supported this + * way, though you can always do a normal request_irq() and add + * other cascades this way. You should call this _after_ having + * added all the ISUs + * + * @irq_no: "linux" irq number of the cascade (that is offset'ed vector) + * @handler: cascade handler function + */ +extern void mpic_setup_cascade(unsigned int irq_no, mpic_cascade_t hanlder, + void *data); + +/* + * All of the following functions must only be used after the + * ISUs have been assigned and the controller fully initialized + * with mpic_init() + */ + + +/* Change/Read the priority of an interrupt. Default is 8 for irqs and + * 10 for IPIs. You can call this on both IPIs and IRQ numbers, but the + * IPI number is then the offset'ed (linux irq number mapped to the IPI) + */ +extern void mpic_irq_set_priority(unsigned int irq, unsigned int pri); +extern unsigned int mpic_irq_get_priority(unsigned int irq); + +/* Setup a non-boot CPU */ +extern void mpic_setup_this_cpu(void); + +/* Clean up for kexec (or cpu offline or ...) */ +extern void mpic_teardown_this_cpu(int secondary); + +/* Get the current cpu priority for this cpu (0..15) */ +extern int mpic_cpu_get_priority(void); + +/* Set the current cpu priority for this cpu */ +extern void mpic_cpu_set_priority(int prio); + +/* Request IPIs on primary mpic */ +extern void mpic_request_ipis(void); + +/* Send an IPI (non offseted number 0..3) */ +extern void mpic_send_ipi(unsigned int ipi_no, unsigned int cpu_mask); + +/* Send a message (IPI) to a given target (cpu number or MSG_*) */ +void smp_mpic_message_pass(int target, int msg); + +/* Fetch interrupt from a given mpic */ +extern int mpic_get_one_irq(struct mpic *mpic, struct pt_regs *regs); +/* This one gets to the primary mpic */ +extern int mpic_get_irq(struct pt_regs *regs); + +/* global mpic for pSeries */ +extern struct mpic *pSeries_mpic; + +#endif /* _ASM_POWERPC_MPIC_H */ diff --git a/include/asm-powerpc/numnodes.h b/include/asm-powerpc/numnodes.h new file mode 100644 index 000000000000..795533aca095 --- /dev/null +++ b/include/asm-powerpc/numnodes.h @@ -0,0 +1,7 @@ +#ifndef _ASM_POWERPC_MAX_NUMNODES_H +#define _ASM_POWERPC_MAX_NUMNODES_H + +/* Max 16 Nodes */ +#define NODES_SHIFT 4 + +#endif /* _ASM_POWERPC_MAX_NUMNODES_H */ diff --git a/include/asm-ppc64/nvram.h b/include/asm-powerpc/nvram.h index dfaa21566c9a..24bd8c2388ea 100644 --- a/include/asm-ppc64/nvram.h +++ b/include/asm-powerpc/nvram.h @@ -1,6 +1,5 @@ /* - * PreP compliant NVRAM access - * This needs to be updated for PPC64 + * NVRAM definitions and access functions. * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License @@ -8,8 +7,8 @@ * 2 of the License, or (at your option) any later version. */ -#ifndef _PPC64_NVRAM_H -#define _PPC64_NVRAM_H +#ifndef _ASM_POWERPC_NVRAM_H +#define _ASM_POWERPC_NVRAM_H #define NVRW_CNT 0x20 #define NVRAM_HEADER_LEN 16 /* sizeof(struct nvram_header) */ @@ -69,8 +68,7 @@ extern int nvram_clear_error_log(void); extern struct nvram_partition *nvram_find_partition(int sig, const char *name); extern int pSeries_nvram_init(void); -extern int pmac_nvram_init(void); -extern int bpa_nvram_init(void); +extern int mmio_nvram_init(void); /* PowerMac specific nvram stuffs */ @@ -88,7 +86,11 @@ extern u8 pmac_xpram_read(int xpaddr); extern void pmac_xpram_write(int xpaddr, u8 data); /* Synchronize NVRAM */ -extern int nvram_sync(void); +extern void nvram_sync(void); + +/* Normal access to NVRAM */ +extern unsigned char nvram_read_byte(int i); +extern void nvram_write_byte(unsigned char c, int i); /* Some offsets in XPRAM */ #define PMAC_XPRAM_MACHINE_LOC 0xe4 @@ -112,5 +114,6 @@ struct pmac_machine_location { _IOWR('p', 0x40, int) #define IOC_NVRAM_GET_OFFSET _IOWR('p', 0x42, int) /* Get NVRAM partition offset */ +#define IOC_NVRAM_SYNC _IO('p', 0x43) /* Sync NVRAM image */ -#endif /* _PPC64_NVRAM_H */ +#endif /* _ASM_POWERPC_NVRAM_H */ diff --git a/include/asm-ppc/of_device.h b/include/asm-powerpc/of_device.h index 4b264cfd3998..ddb16aae0bd6 100644 --- a/include/asm-ppc/of_device.h +++ b/include/asm-powerpc/of_device.h @@ -1,7 +1,8 @@ -#ifndef __OF_DEVICE_H__ -#define __OF_DEVICE_H__ +#ifndef _ASM_POWERPC_OF_DEVICE_H +#define _ASM_POWERPC_OF_DEVICE_H #include <linux/device.h> +#include <linux/mod_devicetable.h> #include <asm/prom.h> /* @@ -55,8 +56,9 @@ extern int of_register_driver(struct of_platform_driver *drv); extern void of_unregister_driver(struct of_platform_driver *drv); extern int of_device_register(struct of_device *ofdev); extern void of_device_unregister(struct of_device *ofdev); -extern struct of_device *of_platform_device_create(struct device_node *np, const char *bus_id); +extern struct of_device *of_platform_device_create(struct device_node *np, + const char *bus_id, + struct device *parent); extern void of_release_dev(struct device *dev); -#endif /* __OF_DEVICE_H__ */ - +#endif /* _ASM_POWERPC_OF_DEVICE_H */ diff --git a/include/asm-ppc/ohare.h b/include/asm-powerpc/ohare.h index 023b59772231..023b59772231 100644 --- a/include/asm-ppc/ohare.h +++ b/include/asm-powerpc/ohare.h diff --git a/include/asm-ppc64/oprofile_impl.h b/include/asm-powerpc/oprofile_impl.h index b04f1dfb1421..8013cd273ced 100644 --- a/include/asm-ppc64/oprofile_impl.h +++ b/include/asm-powerpc/oprofile_impl.h @@ -9,39 +9,49 @@ * 2 of the License, or (at your option) any later version. */ -#ifndef OP_IMPL_H -#define OP_IMPL_H 1 +#ifndef _ASM_POWERPC_OPROFILE_IMPL_H +#define _ASM_POWERPC_OPROFILE_IMPL_H #define OP_MAX_COUNTER 8 /* Per-counter configuration as set via oprofilefs. */ struct op_counter_config { +#ifdef __powerpc64__ unsigned long valid; +#endif unsigned long enabled; unsigned long event; unsigned long count; unsigned long kernel; +#ifdef __powerpc64__ /* We dont support per counter user/kernel selection */ +#endif unsigned long user; unsigned long unit_mask; }; /* System-wide configuration as set via oprofilefs. */ struct op_system_config { +#ifdef __powerpc64__ unsigned long mmcr0; unsigned long mmcr1; unsigned long mmcra; +#endif unsigned long enable_kernel; unsigned long enable_user; +#ifdef __powerpc64__ unsigned long backtrace_spinlocks; +#endif }; /* Per-arch configuration */ -struct op_ppc64_model { +struct op_powerpc_model { void (*reg_setup) (struct op_counter_config *, struct op_system_config *, int num_counters); +#ifdef __powerpc64__ void (*cpu_setup) (void *); +#endif void (*start) (struct op_counter_config *); void (*stop) (void); void (*handle_interrupt) (struct pt_regs *, @@ -49,8 +59,9 @@ struct op_ppc64_model { int num_counters; }; -extern struct op_ppc64_model op_model_rs64; -extern struct op_ppc64_model op_model_power4; +#ifdef __powerpc64__ +extern struct op_powerpc_model op_model_rs64; +extern struct op_powerpc_model op_model_power4; static inline unsigned int ctr_read(unsigned int i) { @@ -107,5 +118,6 @@ static inline void ctr_write(unsigned int i, unsigned int val) break; } } +#endif /* __powerpc64__ */ -#endif +#endif /* _ASM_POWERPC_OPROFILE_IMPL_H */ diff --git a/include/asm-ppc64/pSeries_reconfig.h b/include/asm-powerpc/pSeries_reconfig.h index c0db1ea7f7d1..c0db1ea7f7d1 100644 --- a/include/asm-ppc64/pSeries_reconfig.h +++ b/include/asm-powerpc/pSeries_reconfig.h diff --git a/include/asm-ppc64/paca.h b/include/asm-powerpc/paca.h index 2f0f36f73d38..92c765c35bd0 100644 --- a/include/asm-ppc64/paca.h +++ b/include/asm-powerpc/paca.h @@ -1,11 +1,8 @@ -#ifndef _PPC64_PACA_H -#define _PPC64_PACA_H - /* - * include/asm-ppc64/paca.h + * include/asm-powerpc/paca.h * - * This control block defines the PACA which defines the processor - * specific data for each logical processor on the system. + * This control block defines the PACA which defines the processor + * specific data for each logical processor on the system. * There are some pointers defined that are utilized by PLIC. * * C 2001 PPC 64 Team, IBM Corp @@ -14,12 +11,14 @@ * modify it under the terms of the GNU General Public License * as published by the Free Software Foundation; either version * 2 of the License, or (at your option) any later version. - */ + */ +#ifndef _ASM_POWERPC_PACA_H +#define _ASM_POWERPC_PACA_H #include <linux/config.h> #include <asm/types.h> #include <asm/lppaca.h> -#include <asm/iSeries/ItLpRegSave.h> +#include <asm/iseries/it_lp_reg_save.h> #include <asm/mmu.h> register struct paca_struct *local_paca asm("r13"); @@ -72,10 +71,15 @@ struct paca_struct { /* * Now, starting in cacheline 2, the exception save areas */ - u64 exgen[8] __attribute__((aligned(0x80))); /* used for most interrupts/exceptions */ - u64 exmc[8]; /* used for machine checks */ - u64 exslb[8]; /* used for SLB/segment table misses - * on the linear mapping */ + /* used for most interrupts/exceptions */ + u64 exgen[10] __attribute__((aligned(0x80))); + u64 exmc[10]; /* used for machine checks */ + u64 exslb[10]; /* used for SLB/segment table misses + * on the linear mapping */ +#ifdef CONFIG_PPC_64K_PAGES + pgd_t *pgdir; +#endif /* CONFIG_PPC_64K_PAGES */ + mm_context_t context; u16 slb_cache[SLB_CACHE_ENTRIES]; u16 slb_cache_ptr; @@ -113,4 +117,4 @@ struct paca_struct { extern struct paca_struct paca[]; -#endif /* _PPC64_PACA_H */ +#endif /* _ASM_POWERPC_PACA_H */ diff --git a/include/asm-powerpc/page.h b/include/asm-powerpc/page.h new file mode 100644 index 000000000000..18c1e5ee81a3 --- /dev/null +++ b/include/asm-powerpc/page.h @@ -0,0 +1,179 @@ +#ifndef _ASM_POWERPC_PAGE_H +#define _ASM_POWERPC_PAGE_H + +/* + * Copyright (C) 2001,2005 IBM Corporation. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version + * 2 of the License, or (at your option) any later version. + */ + +#ifdef __KERNEL__ +#include <linux/config.h> +#include <asm/asm-compat.h> + +/* + * On PPC32 page size is 4K. For PPC64 we support either 4K or 64K software + * page size. When using 64K pages however, whether we are really supporting + * 64K pages in HW or not is irrelevant to those definitions. + */ +#ifdef CONFIG_PPC_64K_PAGES +#define PAGE_SHIFT 16 +#else +#define PAGE_SHIFT 12 +#endif + +#define PAGE_SIZE (ASM_CONST(1) << PAGE_SHIFT) + +/* We do define AT_SYSINFO_EHDR but don't use the gate mechanism */ +#define __HAVE_ARCH_GATE_AREA 1 + +/* + * Subtle: (1 << PAGE_SHIFT) is an int, not an unsigned long. So if we + * assign PAGE_MASK to a larger type it gets extended the way we want + * (i.e. with 1s in the high bits) + */ +#define PAGE_MASK (~((1 << PAGE_SHIFT) - 1)) + +#define PAGE_OFFSET ASM_CONST(CONFIG_KERNEL_START) +#define KERNELBASE PAGE_OFFSET + +#ifdef CONFIG_DISCONTIGMEM +#define page_to_pfn(page) discontigmem_page_to_pfn(page) +#define pfn_to_page(pfn) discontigmem_pfn_to_page(pfn) +#define pfn_valid(pfn) discontigmem_pfn_valid(pfn) +#endif + +#ifdef CONFIG_FLATMEM +#define pfn_to_page(pfn) (mem_map + (pfn)) +#define page_to_pfn(page) ((unsigned long)((page) - mem_map)) +#define pfn_valid(pfn) ((pfn) < max_mapnr) +#endif + +#define virt_to_page(kaddr) pfn_to_page(__pa(kaddr) >> PAGE_SHIFT) +#define pfn_to_kaddr(pfn) __va((pfn) << PAGE_SHIFT) +#define virt_addr_valid(kaddr) pfn_valid(__pa(kaddr) >> PAGE_SHIFT) + +#define __va(x) ((void *)((unsigned long)(x) + KERNELBASE)) +#define __pa(x) ((unsigned long)(x) - PAGE_OFFSET) + +/* + * Unfortunately the PLT is in the BSS in the PPC32 ELF ABI, + * and needs to be executable. This means the whole heap ends + * up being executable. + */ +#define VM_DATA_DEFAULT_FLAGS32 (VM_READ | VM_WRITE | VM_EXEC | \ + VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC) + +#define VM_DATA_DEFAULT_FLAGS64 (VM_READ | VM_WRITE | \ + VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC) + +#ifdef __powerpc64__ +#include <asm/page_64.h> +#else +#include <asm/page_32.h> +#endif + +/* align addr on a size boundary - adjust address up/down if needed */ +#define _ALIGN_UP(addr,size) (((addr)+((size)-1))&(~((size)-1))) +#define _ALIGN_DOWN(addr,size) ((addr)&(~((size)-1))) + +/* align addr on a size boundary - adjust address up if needed */ +#define _ALIGN(addr,size) _ALIGN_UP(addr,size) + +/* to align the pointer to the (next) page boundary */ +#define PAGE_ALIGN(addr) _ALIGN(addr, PAGE_SIZE) + +#ifndef __ASSEMBLY__ + +#undef STRICT_MM_TYPECHECKS + +#ifdef STRICT_MM_TYPECHECKS +/* These are used to make use of C type-checking. */ + +/* PTE level */ +typedef struct { pte_basic_t pte; } pte_t; +#define pte_val(x) ((x).pte) +#define __pte(x) ((pte_t) { (x) }) + +/* 64k pages additionally define a bigger "real PTE" type that gathers + * the "second half" part of the PTE for pseudo 64k pages + */ +#ifdef CONFIG_PPC_64K_PAGES +typedef struct { pte_t pte; unsigned long hidx; } real_pte_t; +#else +typedef struct { pte_t pte; } real_pte_t; +#endif + +/* PMD level */ +typedef struct { unsigned long pmd; } pmd_t; +#define pmd_val(x) ((x).pmd) +#define __pmd(x) ((pmd_t) { (x) }) + +/* PUD level exusts only on 4k pages */ +#ifndef CONFIG_PPC_64K_PAGES +typedef struct { unsigned long pud; } pud_t; +#define pud_val(x) ((x).pud) +#define __pud(x) ((pud_t) { (x) }) +#endif + +/* PGD level */ +typedef struct { unsigned long pgd; } pgd_t; +#define pgd_val(x) ((x).pgd) +#define __pgd(x) ((pgd_t) { (x) }) + +/* Page protection bits */ +typedef struct { unsigned long pgprot; } pgprot_t; +#define pgprot_val(x) ((x).pgprot) +#define __pgprot(x) ((pgprot_t) { (x) }) + +#else + +/* + * .. while these make it easier on the compiler + */ + +typedef pte_basic_t pte_t; +#define pte_val(x) (x) +#define __pte(x) (x) + +#ifdef CONFIG_PPC_64K_PAGES +typedef struct { pte_t pte; unsigned long hidx; } real_pte_t; +#else +typedef unsigned long real_pte_t; +#endif + + +typedef unsigned long pmd_t; +#define pmd_val(x) (x) +#define __pmd(x) (x) + +#ifndef CONFIG_PPC_64K_PAGES +typedef unsigned long pud_t; +#define pud_val(x) (x) +#define __pud(x) (x) +#endif + +typedef unsigned long pgd_t; +#define pgd_val(x) (x) +#define pgprot_val(x) (x) + +typedef unsigned long pgprot_t; +#define __pgd(x) (x) +#define __pgprot(x) (x) + +#endif + +struct page; +extern void clear_user_page(void *page, unsigned long vaddr, struct page *pg); +extern void copy_user_page(void *to, void *from, unsigned long vaddr, + struct page *p); +extern int page_is_ram(unsigned long pfn); + +#endif /* __ASSEMBLY__ */ + +#endif /* __KERNEL__ */ + +#endif /* _ASM_POWERPC_PAGE_H */ diff --git a/include/asm-powerpc/page_32.h b/include/asm-powerpc/page_32.h new file mode 100644 index 000000000000..7259cfd85da9 --- /dev/null +++ b/include/asm-powerpc/page_32.h @@ -0,0 +1,40 @@ +#ifndef _ASM_POWERPC_PAGE_32_H +#define _ASM_POWERPC_PAGE_32_H + +#define VM_DATA_DEFAULT_FLAGS VM_DATA_DEFAULT_FLAGS32 + +#define PPC_MEMSTART 0 + +#ifndef __ASSEMBLY__ +/* + * The basic type of a PTE - 64 bits for those CPUs with > 32 bit + * physical addressing. For now this just the IBM PPC440. + */ +#ifdef CONFIG_PTE_64BIT +typedef unsigned long long pte_basic_t; +#define PTE_SHIFT (PAGE_SHIFT - 3) /* 512 ptes per page */ +#define PTE_FMT "%16Lx" +#else +typedef unsigned long pte_basic_t; +#define PTE_SHIFT (PAGE_SHIFT - 2) /* 1024 ptes per page */ +#define PTE_FMT "%.8lx" +#endif + +struct page; +extern void clear_pages(void *page, int order); +static inline void clear_page(void *page) { clear_pages(page, 0); } +extern void copy_page(void *to, void *from); + +/* Pure 2^n version of get_order */ +extern __inline__ int get_order(unsigned long size) +{ + int lz; + + size = (size-1) >> PAGE_SHIFT; + asm ("cntlzw %0,%1" : "=r" (lz) : "r" (size)); + return 32 - lz; +} + +#endif /* __ASSEMBLY__ */ + +#endif /* _ASM_POWERPC_PAGE_32_H */ diff --git a/include/asm-powerpc/page_64.h b/include/asm-powerpc/page_64.h new file mode 100644 index 000000000000..6642c0125001 --- /dev/null +++ b/include/asm-powerpc/page_64.h @@ -0,0 +1,183 @@ +#ifndef _ASM_POWERPC_PAGE_64_H +#define _ASM_POWERPC_PAGE_64_H + +/* + * Copyright (C) 2001 PPC64 Team, IBM Corp + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version + * 2 of the License, or (at your option) any later version. + */ + +/* + * We always define HW_PAGE_SHIFT to 12 as use of 64K pages remains Linux + * specific, every notion of page number shared with the firmware, TCEs, + * iommu, etc... still uses a page size of 4K. + */ +#define HW_PAGE_SHIFT 12 +#define HW_PAGE_SIZE (ASM_CONST(1) << HW_PAGE_SHIFT) +#define HW_PAGE_MASK (~(HW_PAGE_SIZE-1)) + +/* + * PAGE_FACTOR is the number of bits factor between PAGE_SHIFT and + * HW_PAGE_SHIFT, that is 4K pages. + */ +#define PAGE_FACTOR (PAGE_SHIFT - HW_PAGE_SHIFT) + +#define REGION_SIZE 4UL +#define REGION_SHIFT 60UL +#define REGION_MASK (((1UL<<REGION_SIZE)-1UL)<<REGION_SHIFT) + +#define VMALLOCBASE ASM_CONST(0xD000000000000000) +#define VMALLOC_REGION_ID (VMALLOCBASE >> REGION_SHIFT) +#define KERNEL_REGION_ID (KERNELBASE >> REGION_SHIFT) +#define USER_REGION_ID (0UL) +#define REGION_ID(ea) (((unsigned long)(ea)) >> REGION_SHIFT) + +/* Segment size */ +#define SID_SHIFT 28 +#define SID_MASK 0xfffffffffUL +#define ESID_MASK 0xfffffffff0000000UL +#define GET_ESID(x) (((x) >> SID_SHIFT) & SID_MASK) + +#ifndef __ASSEMBLY__ +#include <asm/cache.h> + +typedef unsigned long pte_basic_t; + +static __inline__ void clear_page(void *addr) +{ + unsigned long lines, line_size; + + line_size = ppc64_caches.dline_size; + lines = ppc64_caches.dlines_per_page; + + __asm__ __volatile__( + "mtctr %1 # clear_page\n\ +1: dcbz 0,%0\n\ + add %0,%0,%3\n\ + bdnz+ 1b" + : "=r" (addr) + : "r" (lines), "0" (addr), "r" (line_size) + : "ctr", "memory"); +} + +extern void copy_4K_page(void *to, void *from); + +#ifdef CONFIG_PPC_64K_PAGES +static inline void copy_page(void *to, void *from) +{ + unsigned int i; + for (i=0; i < (1 << (PAGE_SHIFT - 12)); i++) { + copy_4K_page(to, from); + to += 4096; + from += 4096; + } +} +#else /* CONFIG_PPC_64K_PAGES */ +static inline void copy_page(void *to, void *from) +{ + copy_4K_page(to, from); +} +#endif /* CONFIG_PPC_64K_PAGES */ + +/* Log 2 of page table size */ +extern u64 ppc64_pft_size; + +/* Large pages size */ +#ifdef CONFIG_HUGETLB_PAGE +extern unsigned int HPAGE_SHIFT; +#else +#define HPAGE_SHIFT PAGE_SHIFT +#endif +#define HPAGE_SIZE ((1UL) << HPAGE_SHIFT) +#define HPAGE_MASK (~(HPAGE_SIZE - 1)) +#define HUGETLB_PAGE_ORDER (HPAGE_SHIFT - PAGE_SHIFT) + +#endif /* __ASSEMBLY__ */ + +#ifdef CONFIG_HUGETLB_PAGE + +#define HTLB_AREA_SHIFT 40 +#define HTLB_AREA_SIZE (1UL << HTLB_AREA_SHIFT) +#define GET_HTLB_AREA(x) ((x) >> HTLB_AREA_SHIFT) + +#define LOW_ESID_MASK(addr, len) \ + (((1U << (GET_ESID(min((addr)+(len)-1, 0x100000000UL))+1)) \ + - (1U << GET_ESID(min((addr), 0x100000000UL)))) & 0xffff) +#define HTLB_AREA_MASK(addr, len) (((1U << (GET_HTLB_AREA(addr+len-1)+1)) \ + - (1U << GET_HTLB_AREA(addr))) & 0xffff) + +#define ARCH_HAS_HUGEPAGE_ONLY_RANGE +#define ARCH_HAS_PREPARE_HUGEPAGE_RANGE +#define ARCH_HAS_SETCLEAR_HUGE_PTE + +#define touches_hugepage_low_range(mm, addr, len) \ + (((addr) < 0x100000000UL) \ + && (LOW_ESID_MASK((addr), (len)) & (mm)->context.low_htlb_areas)) +#define touches_hugepage_high_range(mm, addr, len) \ + ((((addr) + (len)) > 0x100000000UL) \ + && (HTLB_AREA_MASK((addr), (len)) & (mm)->context.high_htlb_areas)) + +#define __within_hugepage_low_range(addr, len, segmask) \ + ( (((addr)+(len)) <= 0x100000000UL) \ + && ((LOW_ESID_MASK((addr), (len)) | (segmask)) == (segmask))) +#define within_hugepage_low_range(addr, len) \ + __within_hugepage_low_range((addr), (len), \ + current->mm->context.low_htlb_areas) +#define __within_hugepage_high_range(addr, len, zonemask) \ + ( ((addr) >= 0x100000000UL) \ + && ((HTLB_AREA_MASK((addr), (len)) | (zonemask)) == (zonemask))) +#define within_hugepage_high_range(addr, len) \ + __within_hugepage_high_range((addr), (len), \ + current->mm->context.high_htlb_areas) + +#define is_hugepage_only_range(mm, addr, len) \ + (touches_hugepage_high_range((mm), (addr), (len)) || \ + touches_hugepage_low_range((mm), (addr), (len))) +#define HAVE_ARCH_HUGETLB_UNMAPPED_AREA + +#define in_hugepage_area(context, addr) \ + (cpu_has_feature(CPU_FTR_16M_PAGE) && \ + ( ( (addr) >= 0x100000000UL) \ + ? ((1 << GET_HTLB_AREA(addr)) & (context).high_htlb_areas) \ + : ((1 << GET_ESID(addr)) & (context).low_htlb_areas) ) ) + +#else /* !CONFIG_HUGETLB_PAGE */ + +#define in_hugepage_area(mm, addr) 0 + +#endif /* !CONFIG_HUGETLB_PAGE */ + +#ifdef MODULE +#define __page_aligned __attribute__((__aligned__(PAGE_SIZE))) +#else +#define __page_aligned \ + __attribute__((__aligned__(PAGE_SIZE), \ + __section__(".data.page_aligned"))) +#endif + +#define VM_DATA_DEFAULT_FLAGS \ + (test_thread_flag(TIF_32BIT) ? \ + VM_DATA_DEFAULT_FLAGS32 : VM_DATA_DEFAULT_FLAGS64) + +/* + * This is the default if a program doesn't have a PT_GNU_STACK + * program header entry. The PPC64 ELF ABI has a non executable stack + * stack by default, so in the absense of a PT_GNU_STACK program header + * we turn execute permission off. + */ +#define VM_STACK_DEFAULT_FLAGS32 (VM_READ | VM_WRITE | VM_EXEC | \ + VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC) + +#define VM_STACK_DEFAULT_FLAGS64 (VM_READ | VM_WRITE | \ + VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC) + +#define VM_STACK_DEFAULT_FLAGS \ + (test_thread_flag(TIF_32BIT) ? \ + VM_STACK_DEFAULT_FLAGS32 : VM_STACK_DEFAULT_FLAGS64) + +#include <asm-generic/page.h> + +#endif /* _ASM_POWERPC_PAGE_64_H */ diff --git a/include/asm-ppc64/parport.h b/include/asm-powerpc/parport.h index 2f8874c581cc..d86b410a6f8b 100644 --- a/include/asm-ppc64/parport.h +++ b/include/asm-powerpc/parport.h @@ -6,8 +6,8 @@ * This file should only be included by drivers/parport/parport_pc.c. */ -#ifndef _ASM_PPC64_PARPORT_H -#define _ASM_PPC64_PARPORT_H +#ifndef _ASM_POWERPC_PARPORT_H +#define _ASM_POWERPC_PARPORT_H static int __devinit parport_pc_find_isa_ports (int autoirq, int autodma); static int __devinit parport_pc_find_nonpci_ports (int autoirq, int autodma) @@ -15,4 +15,4 @@ static int __devinit parport_pc_find_nonpci_ports (int autoirq, int autodma) return parport_pc_find_isa_ports (autoirq, autodma); } -#endif /* !(_ASM_PPC_PARPORT_H) */ +#endif /* !(_ASM_POWERPC_PARPORT_H) */ diff --git a/include/asm-ppc64/pci-bridge.h b/include/asm-powerpc/pci-bridge.h index d8991389ab39..223ec7bd81da 100644 --- a/include/asm-ppc64/pci-bridge.h +++ b/include/asm-powerpc/pci-bridge.h @@ -1,8 +1,12 @@ -#ifdef __KERNEL__ -#ifndef _ASM_PCI_BRIDGE_H -#define _ASM_PCI_BRIDGE_H +#ifndef _ASM_POWERPC_PCI_BRIDGE_H +#define _ASM_POWERPC_PCI_BRIDGE_H + +#ifndef CONFIG_PPC64 +#include <asm-ppc/pci-bridge.h> +#else #include <linux/pci.h> +#include <linux/list.h> /* * This program is free software; you can redistribute it and/or @@ -34,7 +38,7 @@ struct pci_controller { struct pci_ops *ops; volatile unsigned int __iomem *cfg_addr; - volatile unsigned char __iomem *cfg_data; + volatile void __iomem *cfg_data; /* Currently, we limit ourselves to 1 IO range and 3 mem * ranges since the common pci_bus structure can't handle more @@ -59,18 +63,25 @@ struct pci_dn { int busno; /* for pci devices */ int bussubno; /* for pci devices */ int devfn; /* for pci devices */ + +#ifdef CONFIG_PPC_PSERIES int eeh_mode; /* See eeh.h for possible EEH_MODEs */ int eeh_config_addr; - int eeh_capable; /* from firmware */ int eeh_check_count; /* # times driver ignored error */ int eeh_freeze_count; /* # times this device froze up. */ int eeh_is_bridge; /* device is pci-to-pci bridge */ - +#endif int pci_ext_config_space; /* for pci devices */ struct pci_controller *phb; /* for pci devices */ struct iommu_table *iommu_table; /* for phb's or bridges */ struct pci_dev *pcidev; /* back-pointer to the pci device */ struct device_node *node; /* back-pointer to the device_node */ +#ifdef CONFIG_PPC_ISERIES + struct list_head Device_List; + int Irq; /* Assigned IRQ */ + int Flags; /* Possible flags(disable/bist)*/ + u8 LogicalSlot; /* Hv Slot Index for Tces */ +#endif u32 config_space[16]; /* saved PCI config space */ }; @@ -96,6 +107,16 @@ static inline struct device_node *pci_device_to_OF_node(struct pci_dev *dev) return fetch_dev_dn(dev); } +static inline int pci_device_from_OF_node(struct device_node *np, + u8 *bus, u8 *devfn) +{ + if (!PCI_DN(np)) + return -ENODEV; + *bus = PCI_DN(np)->busno; + *devfn = PCI_DN(np)->devfn; + return 0; +} + static inline struct device_node *pci_bus_to_OF_node(struct pci_bus *bus) { if (bus->self) @@ -105,7 +126,7 @@ static inline struct device_node *pci_bus_to_OF_node(struct pci_bus *bus) } extern void pci_process_bridge_OF_ranges(struct pci_controller *hose, - struct device_node *dev); + struct device_node *dev, int primary); extern int pcibios_remove_root_bus(struct pci_controller *phb); @@ -119,10 +140,14 @@ static inline struct pci_controller *pci_bus_to_host(struct pci_bus *bus) return PCI_DN(busdn)->phb; } +extern struct pci_controller * +pcibios_alloc_controller(struct device_node *dev); +extern void pcibios_free_controller(struct pci_controller *phb); + /* Return values for ppc_md.pci_probe_mode function */ #define PCI_PROBE_NONE -1 /* Don't look at this bus at all */ #define PCI_PROBE_NORMAL 0 /* Do normal PCI probing */ #define PCI_PROBE_DEVTREE 1 /* Instantiate from device tree */ +#endif /* CONFIG_PPC64 */ #endif -#endif /* __KERNEL__ */ diff --git a/include/asm-ppc64/pci.h b/include/asm-powerpc/pci.h index a88bbfc26967..d5934a076bd0 100644 --- a/include/asm-ppc64/pci.h +++ b/include/asm-powerpc/pci.h @@ -1,5 +1,5 @@ -#ifndef __PPC64_PCI_H -#define __PPC64_PCI_H +#ifndef __ASM_POWERPC_PCI_H +#define __ASM_POWERPC_PCI_H #ifdef __KERNEL__ /* @@ -18,6 +18,7 @@ #include <asm/scatterlist.h> #include <asm/io.h> #include <asm/prom.h> +#include <asm/pci-bridge.h> #include <asm-generic/pci-dma-compat.h> @@ -26,11 +27,21 @@ struct pci_dev; -#ifdef CONFIG_PPC_ISERIES +/* Values for the `which' argument to sys_pciconfig_iobase syscall. */ +#define IOBASE_BRIDGE_NUMBER 0 +#define IOBASE_MEMORY 1 +#define IOBASE_IO 2 +#define IOBASE_ISA_IO 3 +#define IOBASE_ISA_MEM 4 + +/* + * Set this to 1 if you want the kernel to re-assign all PCI + * bus numbers + */ +extern int pci_assign_all_buses; +#define pcibios_assign_all_busses() (pci_assign_all_buses) + #define pcibios_scan_all_fns(a, b) 0 -#else -extern int pcibios_scan_all_fns(struct pci_bus *bus, int devfn); -#endif static inline void pcibios_set_master(struct pci_dev *dev) { @@ -50,6 +61,7 @@ static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel) return channel ? 15 : 14; } +#ifdef CONFIG_PPC64 #define HAVE_ARCH_PCI_MWI 1 static inline int pcibios_prep_mwi(struct pci_dev *dev) { @@ -64,12 +76,10 @@ static inline int pcibios_prep_mwi(struct pci_dev *dev) return 0; } -extern unsigned int pcibios_assign_all_busses(void); - extern struct dma_mapping_ops pci_dma_ops; /* For DAC DMA, we currently don't support it by default, but - * we let the platform override this + * we let 64-bit platforms override this. */ static inline int pci_dac_dma_supported(struct pci_dev *hwdev,u64 mask) { @@ -102,6 +112,35 @@ extern int pci_domain_nr(struct pci_bus *bus); /* Decide whether to display the domain number in /proc */ extern int pci_proc_domain(struct pci_bus *bus); +#else /* 32-bit */ + +#ifdef CONFIG_PCI +static inline void pci_dma_burst_advice(struct pci_dev *pdev, + enum pci_dma_burst_strategy *strat, + unsigned long *strategy_parameter) +{ + *strat = PCI_DMA_BURST_INFINITY; + *strategy_parameter = ~0UL; +} +#endif + +/* + * At present there are very few 32-bit PPC machines that can have + * memory above the 4GB point, and we don't support that. + */ +#define pci_dac_dma_supported(pci_dev, mask) (0) + +/* Return the index of the PCI controller for device PDEV. */ +#define pci_domain_nr(bus) ((struct pci_controller *)(bus)->sysdata)->index + +/* Set the name of the bus as it appears in /proc/bus/pci */ +static inline int pci_proc_domain(struct pci_bus *bus) +{ + return 0; +} + +#endif /* CONFIG_PPC64 */ + struct vm_area_struct; /* Map a range of PCI memory or I/O space for a device into user space */ int pci_mmap_page_range(struct pci_dev *pdev, struct vm_area_struct *vma, @@ -110,6 +149,7 @@ int pci_mmap_page_range(struct pci_dev *pdev, struct vm_area_struct *vma, /* Tell drivers/pci/proc.c that we have pci_mmap_page_range() */ #define HAVE_PCI_MMAP 1 +#ifdef CONFIG_PPC64 /* pci_unmap_{single,page} is not a nop, thus... */ #define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) \ dma_addr_t ADDR_NAME; @@ -124,22 +164,40 @@ int pci_mmap_page_range(struct pci_dev *pdev, struct vm_area_struct *vma, #define pci_unmap_len_set(PTR, LEN_NAME, VAL) \ (((PTR)->LEN_NAME) = (VAL)) -/* The PCI address space does equal the physical memory - * address space. The networking and block device layers use +/* The PCI address space does not equal the physical memory address + * space (we have an IOMMU). The IDE and SCSI device layers use * this boolean for bounce buffer decisions. */ #define PCI_DMA_BUS_IS_PHYS (0) + +#else /* 32-bit */ + +/* The PCI address space does equal the physical memory + * address space (no IOMMU). The IDE and SCSI device layers use + * this boolean for bounce buffer decisions. + */ +#define PCI_DMA_BUS_IS_PHYS (1) + +/* pci_unmap_{page,single} is a nop so... */ +#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) +#define DECLARE_PCI_UNMAP_LEN(LEN_NAME) +#define pci_unmap_addr(PTR, ADDR_NAME) (0) +#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) do { } while (0) +#define pci_unmap_len(PTR, LEN_NAME) (0) +#define pci_unmap_len_set(PTR, LEN_NAME, VAL) do { } while (0) + +#endif /* CONFIG_PPC64 */ -extern void -pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region, +extern void pcibios_resource_to_bus(struct pci_dev *dev, + struct pci_bus_region *region, struct resource *res); -extern void -pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res, +extern void pcibios_bus_to_resource(struct pci_dev *dev, + struct resource *res, struct pci_bus_region *region); -static inline struct resource * -pcibios_select_root(struct pci_dev *pdev, struct resource *res) +static inline struct resource *pcibios_select_root(struct pci_dev *pdev, + struct resource *res) { struct resource *root = NULL; @@ -151,35 +209,39 @@ pcibios_select_root(struct pci_dev *pdev, struct resource *res) return root; } -extern int -unmap_bus_range(struct pci_bus *bus); +extern int unmap_bus_range(struct pci_bus *bus); -extern int -remap_bus_range(struct pci_bus *bus); +extern int remap_bus_range(struct pci_bus *bus); -extern void -pcibios_fixup_device_resources(struct pci_dev *dev, struct pci_bus *bus); +extern void pcibios_fixup_device_resources(struct pci_dev *dev, + struct pci_bus *bus); extern struct pci_controller *init_phb_dynamic(struct device_node *dn); +extern struct pci_dev *of_create_pci_dev(struct device_node *node, + struct pci_bus *bus, int devfn); + +extern void of_scan_pci_bridge(struct device_node *node, + struct pci_dev *dev); + +extern void of_scan_bus(struct device_node *node, struct pci_bus *bus); + extern int pci_read_irq_line(struct pci_dev *dev); extern void pcibios_add_platform_entries(struct pci_dev *dev); struct file; extern pgprot_t pci_phys_mem_access_prot(struct file *file, - unsigned long offset, + unsigned long pfn, unsigned long size, pgprot_t prot); -#ifdef CONFIG_PPC_MULTIPLATFORM +#if defined(CONFIG_PPC_MULTIPLATFORM) || defined(CONFIG_PPC32) #define HAVE_ARCH_PCI_RESOURCE_TO_USER extern void pci_resource_to_user(const struct pci_dev *dev, int bar, const struct resource *rsrc, u64 *start, u64 *end); -#endif /* CONFIG_PPC_MULTIPLATFORM */ - +#endif /* CONFIG_PPC_MULTIPLATFORM || CONFIG_PPC32 */ #endif /* __KERNEL__ */ - -#endif /* __PPC64_PCI_H */ +#endif /* __ASM_POWERPC_PCI_H */ diff --git a/include/asm-ppc64/pgalloc.h b/include/asm-powerpc/pgalloc.h index 26bc49c1108d..bfc2113b3630 100644 --- a/include/asm-ppc64/pgalloc.h +++ b/include/asm-powerpc/pgalloc.h @@ -1,5 +1,9 @@ -#ifndef _PPC64_PGALLOC_H -#define _PPC64_PGALLOC_H +#ifndef _ASM_POWERPC_PGALLOC_H +#define _ASM_POWERPC_PGALLOC_H + +#ifndef CONFIG_PPC64 +#include <asm-ppc/pgalloc.h> +#else #include <linux/mm.h> #include <linux/slab.h> @@ -8,10 +12,16 @@ extern kmem_cache_t *pgtable_cache[]; +#ifdef CONFIG_PPC_64K_PAGES +#define PTE_CACHE_NUM 0 +#define PMD_CACHE_NUM 1 +#define PGD_CACHE_NUM 2 +#else #define PTE_CACHE_NUM 0 #define PMD_CACHE_NUM 1 #define PUD_CACHE_NUM 1 #define PGD_CACHE_NUM 0 +#endif /* * This program is free software; you can redistribute it and/or @@ -30,6 +40,8 @@ static inline void pgd_free(pgd_t *pgd) kmem_cache_free(pgtable_cache[PGD_CACHE_NUM], pgd); } +#ifndef CONFIG_PPC_64K_PAGES + #define pgd_populate(MM, PGD, PUD) pgd_set(PGD, PUD) static inline pud_t *pud_alloc_one(struct mm_struct *mm, unsigned long addr) @@ -43,7 +55,30 @@ static inline void pud_free(pud_t *pud) kmem_cache_free(pgtable_cache[PUD_CACHE_NUM], pud); } -#define pud_populate(MM, PUD, PMD) pud_set(PUD, PMD) +static inline void pud_populate(struct mm_struct *mm, pud_t *pud, pmd_t *pmd) +{ + pud_set(pud, (unsigned long)pmd); +} + +#define pmd_populate(mm, pmd, pte_page) \ + pmd_populate_kernel(mm, pmd, page_address(pte_page)) +#define pmd_populate_kernel(mm, pmd, pte) pmd_set(pmd, (unsigned long)(pte)) + + +#else /* CONFIG_PPC_64K_PAGES */ + +#define pud_populate(mm, pud, pmd) pud_set(pud, (unsigned long)pmd) + +static inline void pmd_populate_kernel(struct mm_struct *mm, pmd_t *pmd, + pte_t *pte) +{ + pmd_set(pmd, (unsigned long)pte); +} + +#define pmd_populate(mm, pmd, pte_page) \ + pmd_populate_kernel(mm, pmd, page_address(pte_page)) + +#endif /* CONFIG_PPC_64K_PAGES */ static inline pmd_t *pmd_alloc_one(struct mm_struct *mm, unsigned long addr) { @@ -56,17 +91,15 @@ static inline void pmd_free(pmd_t *pmd) kmem_cache_free(pgtable_cache[PMD_CACHE_NUM], pmd); } -#define pmd_populate_kernel(mm, pmd, pte) pmd_set(pmd, pte) -#define pmd_populate(mm, pmd, pte_page) \ - pmd_populate_kernel(mm, pmd, page_address(pte_page)) - -static inline pte_t *pte_alloc_one_kernel(struct mm_struct *mm, unsigned long address) +static inline pte_t *pte_alloc_one_kernel(struct mm_struct *mm, + unsigned long address) { return kmem_cache_alloc(pgtable_cache[PTE_CACHE_NUM], GFP_KERNEL|__GFP_REPEAT); } -static inline struct page *pte_alloc_one(struct mm_struct *mm, unsigned long address) +static inline struct page *pte_alloc_one(struct mm_struct *mm, + unsigned long address) { return virt_to_page(pte_alloc_one_kernel(mm, address)); } @@ -103,7 +136,7 @@ static inline void pgtable_free(pgtable_free_t pgf) kmem_cache_free(pgtable_cache[cachenum], p); } -void pgtable_free_tlb(struct mmu_gather *tlb, pgtable_free_t pgf); +extern void pgtable_free_tlb(struct mmu_gather *tlb, pgtable_free_t pgf); #define __pte_free_tlb(tlb, ptepage) \ pgtable_free_tlb(tlb, pgtable_free_cache(page_address(ptepage), \ @@ -111,10 +144,13 @@ void pgtable_free_tlb(struct mmu_gather *tlb, pgtable_free_t pgf); #define __pmd_free_tlb(tlb, pmd) \ pgtable_free_tlb(tlb, pgtable_free_cache(pmd, \ PMD_CACHE_NUM, PMD_TABLE_SIZE-1)) +#ifndef CONFIG_PPC_64K_PAGES #define __pud_free_tlb(tlb, pmd) \ pgtable_free_tlb(tlb, pgtable_free_cache(pud, \ PUD_CACHE_NUM, PUD_TABLE_SIZE-1)) +#endif /* CONFIG_PPC_64K_PAGES */ #define check_pgt_cache() do { } while (0) -#endif /* _PPC64_PGALLOC_H */ +#endif /* CONFIG_PPC64 */ +#endif /* _ASM_POWERPC_PGALLOC_H */ diff --git a/include/asm-powerpc/pgtable-4k.h b/include/asm-powerpc/pgtable-4k.h new file mode 100644 index 000000000000..e9590c06ad92 --- /dev/null +++ b/include/asm-powerpc/pgtable-4k.h @@ -0,0 +1,91 @@ +/* + * Entries per page directory level. The PTE level must use a 64b record + * for each page table entry. The PMD and PGD level use a 32b record for + * each entry by assuming that each entry is page aligned. + */ +#define PTE_INDEX_SIZE 9 +#define PMD_INDEX_SIZE 7 +#define PUD_INDEX_SIZE 7 +#define PGD_INDEX_SIZE 9 + +#define PTE_TABLE_SIZE (sizeof(pte_t) << PTE_INDEX_SIZE) +#define PMD_TABLE_SIZE (sizeof(pmd_t) << PMD_INDEX_SIZE) +#define PUD_TABLE_SIZE (sizeof(pud_t) << PUD_INDEX_SIZE) +#define PGD_TABLE_SIZE (sizeof(pgd_t) << PGD_INDEX_SIZE) + +#define PTRS_PER_PTE (1 << PTE_INDEX_SIZE) +#define PTRS_PER_PMD (1 << PMD_INDEX_SIZE) +#define PTRS_PER_PUD (1 << PMD_INDEX_SIZE) +#define PTRS_PER_PGD (1 << PGD_INDEX_SIZE) + +/* PMD_SHIFT determines what a second-level page table entry can map */ +#define PMD_SHIFT (PAGE_SHIFT + PTE_INDEX_SIZE) +#define PMD_SIZE (1UL << PMD_SHIFT) +#define PMD_MASK (~(PMD_SIZE-1)) + +/* With 4k base page size, hugepage PTEs go at the PMD level */ +#define MIN_HUGEPTE_SHIFT PMD_SHIFT + +/* PUD_SHIFT determines what a third-level page table entry can map */ +#define PUD_SHIFT (PMD_SHIFT + PMD_INDEX_SIZE) +#define PUD_SIZE (1UL << PUD_SHIFT) +#define PUD_MASK (~(PUD_SIZE-1)) + +/* PGDIR_SHIFT determines what a fourth-level page table entry can map */ +#define PGDIR_SHIFT (PUD_SHIFT + PUD_INDEX_SIZE) +#define PGDIR_SIZE (1UL << PGDIR_SHIFT) +#define PGDIR_MASK (~(PGDIR_SIZE-1)) + +/* PTE bits */ +#define _PAGE_SECONDARY 0x8000 /* software: HPTE is in secondary group */ +#define _PAGE_GROUP_IX 0x7000 /* software: HPTE index within group */ +#define _PAGE_F_SECOND _PAGE_SECONDARY +#define _PAGE_F_GIX _PAGE_GROUP_IX + +/* PTE flags to conserve for HPTE identification */ +#define _PAGE_HPTEFLAGS (_PAGE_BUSY | _PAGE_HASHPTE | \ + _PAGE_SECONDARY | _PAGE_GROUP_IX) + +/* PAGE_MASK gives the right answer below, but only by accident */ +/* It should be preserving the high 48 bits and then specifically */ +/* preserving _PAGE_SECONDARY | _PAGE_GROUP_IX */ +#define _PAGE_CHG_MASK (PAGE_MASK | _PAGE_ACCESSED | _PAGE_DIRTY | \ + _PAGE_HPTEFLAGS) + +/* Bits to mask out from a PMD to get to the PTE page */ +#define PMD_MASKED_BITS 0 +/* Bits to mask out from a PUD to get to the PMD page */ +#define PUD_MASKED_BITS 0 +/* Bits to mask out from a PGD to get to the PUD page */ +#define PGD_MASKED_BITS 0 + +/* shift to put page number into pte */ +#define PTE_RPN_SHIFT (17) + +#define __real_pte(e,p) ((real_pte_t)(e)) +#define __rpte_to_pte(r) (r) +#define __rpte_to_hidx(r,index) (pte_val((r)) >> 12) + +#define pte_iterate_hashed_subpages(rpte, psize, va, index, shift) \ + do { \ + index = 0; \ + shift = mmu_psize_defs[psize].shift; \ + +#define pte_iterate_hashed_end() } while(0) + +/* + * 4-level page tables related bits + */ + +#define pgd_none(pgd) (!pgd_val(pgd)) +#define pgd_bad(pgd) (pgd_val(pgd) == 0) +#define pgd_present(pgd) (pgd_val(pgd) != 0) +#define pgd_clear(pgdp) (pgd_val(*(pgdp)) = 0) +#define pgd_page(pgd) (pgd_val(pgd) & ~PGD_MASKED_BITS) + +#define pud_offset(pgdp, addr) \ + (((pud_t *) pgd_page(*(pgdp))) + \ + (((addr) >> PUD_SHIFT) & (PTRS_PER_PUD - 1))) + +#define pud_ERROR(e) \ + printk("%s:%d: bad pmd %08lx.\n", __FILE__, __LINE__, pud_val(e)) diff --git a/include/asm-powerpc/pgtable-64k.h b/include/asm-powerpc/pgtable-64k.h new file mode 100644 index 000000000000..154f1840ece4 --- /dev/null +++ b/include/asm-powerpc/pgtable-64k.h @@ -0,0 +1,90 @@ +#include <asm-generic/pgtable-nopud.h> + + +#define PTE_INDEX_SIZE 12 +#define PMD_INDEX_SIZE 12 +#define PUD_INDEX_SIZE 0 +#define PGD_INDEX_SIZE 4 + +#define PTE_TABLE_SIZE (sizeof(real_pte_t) << PTE_INDEX_SIZE) +#define PMD_TABLE_SIZE (sizeof(pmd_t) << PMD_INDEX_SIZE) +#define PGD_TABLE_SIZE (sizeof(pgd_t) << PGD_INDEX_SIZE) + +#define PTRS_PER_PTE (1 << PTE_INDEX_SIZE) +#define PTRS_PER_PMD (1 << PMD_INDEX_SIZE) +#define PTRS_PER_PGD (1 << PGD_INDEX_SIZE) + +/* With 4k base page size, hugepage PTEs go at the PMD level */ +#define MIN_HUGEPTE_SHIFT PAGE_SHIFT + +/* PMD_SHIFT determines what a second-level page table entry can map */ +#define PMD_SHIFT (PAGE_SHIFT + PTE_INDEX_SIZE) +#define PMD_SIZE (1UL << PMD_SHIFT) +#define PMD_MASK (~(PMD_SIZE-1)) + +/* PGDIR_SHIFT determines what a third-level page table entry can map */ +#define PGDIR_SHIFT (PMD_SHIFT + PMD_INDEX_SIZE) +#define PGDIR_SIZE (1UL << PGDIR_SHIFT) +#define PGDIR_MASK (~(PGDIR_SIZE-1)) + +/* Additional PTE bits (don't change without checking asm in hash_low.S) */ +#define _PAGE_HPTE_SUB 0x0ffff000 /* combo only: sub pages HPTE bits */ +#define _PAGE_HPTE_SUB0 0x08000000 /* combo only: first sub page */ +#define _PAGE_COMBO 0x10000000 /* this is a combo 4k page */ +#define _PAGE_F_SECOND 0x00008000 /* full page: hidx bits */ +#define _PAGE_F_GIX 0x00007000 /* full page: hidx bits */ + +/* PTE flags to conserve for HPTE identification */ +#define _PAGE_HPTEFLAGS (_PAGE_BUSY | _PAGE_HASHPTE | _PAGE_HPTE_SUB |\ + _PAGE_COMBO) + +/* Shift to put page number into pte. + * + * That gives us a max RPN of 32 bits, which means a max of 48 bits + * of addressable physical space. + * We could get 3 more bits here by setting PTE_RPN_SHIFT to 29 but + * 32 makes PTEs more readable for debugging for now :) + */ +#define PTE_RPN_SHIFT (32) +#define PTE_RPN_MAX (1UL << (64 - PTE_RPN_SHIFT)) +#define PTE_RPN_MASK (~((1UL<<PTE_RPN_SHIFT)-1)) + +/* _PAGE_CHG_MASK masks of bits that are to be preserved accross + * pgprot changes + */ +#define _PAGE_CHG_MASK (PTE_RPN_MASK | _PAGE_HPTEFLAGS | _PAGE_DIRTY | \ + _PAGE_ACCESSED) + +/* Bits to mask out from a PMD to get to the PTE page */ +#define PMD_MASKED_BITS 0x1ff +/* Bits to mask out from a PGD/PUD to get to the PMD page */ +#define PUD_MASKED_BITS 0x1ff + +#ifndef __ASSEMBLY__ + +/* Manipulate "rpte" values */ +#define __real_pte(e,p) ((real_pte_t) { \ + (e), pte_val(*((p) + PTRS_PER_PTE)) }) +#define __rpte_to_hidx(r,index) ((pte_val((r).pte) & _PAGE_COMBO) ? \ + (((r).hidx >> ((index)<<2)) & 0xf) : ((pte_val((r).pte) >> 12) & 0xf)) +#define __rpte_to_pte(r) ((r).pte) +#define __rpte_sub_valid(rpte, index) \ + (pte_val(rpte.pte) & (_PAGE_HPTE_SUB0 >> (index))) + + +/* Trick: we set __end to va + 64k, which happens works for + * a 16M page as well as we want only one iteration + */ +#define pte_iterate_hashed_subpages(rpte, psize, va, index, shift) \ + do { \ + unsigned long __end = va + PAGE_SIZE; \ + unsigned __split = (psize == MMU_PAGE_4K || \ + psize == MMU_PAGE_64K_AP); \ + shift = mmu_psize_defs[psize].shift; \ + for (index = 0; va < __end; index++, va += (1 << shift)) { \ + if (!__split || __rpte_sub_valid(rpte, index)) do { \ + +#define pte_iterate_hashed_end() } while(0); } } while(0) + + +#endif /* __ASSEMBLY__ */ diff --git a/include/asm-ppc64/pgtable.h b/include/asm-powerpc/pgtable.h index c83679c9d2b0..0303f57366c1 100644 --- a/include/asm-ppc64/pgtable.h +++ b/include/asm-powerpc/pgtable.h @@ -1,5 +1,9 @@ -#ifndef _PPC64_PGTABLE_H -#define _PPC64_PGTABLE_H +#ifndef _ASM_POWERPC_PGTABLE_H +#define _ASM_POWERPC_PGTABLE_H + +#ifndef CONFIG_PPC64 +#include <asm-ppc/pgtable.h> +#else /* * This file contains the functions and defines necessary to modify and use @@ -13,42 +17,14 @@ #include <asm/mmu.h> #include <asm/page.h> #include <asm/tlbflush.h> +struct mm_struct; #endif /* __ASSEMBLY__ */ -/* - * Entries per page directory level. The PTE level must use a 64b record - * for each page table entry. The PMD and PGD level use a 32b record for - * each entry by assuming that each entry is page aligned. - */ -#define PTE_INDEX_SIZE 9 -#define PMD_INDEX_SIZE 7 -#define PUD_INDEX_SIZE 7 -#define PGD_INDEX_SIZE 9 - -#define PTE_TABLE_SIZE (sizeof(pte_t) << PTE_INDEX_SIZE) -#define PMD_TABLE_SIZE (sizeof(pmd_t) << PMD_INDEX_SIZE) -#define PUD_TABLE_SIZE (sizeof(pud_t) << PUD_INDEX_SIZE) -#define PGD_TABLE_SIZE (sizeof(pgd_t) << PGD_INDEX_SIZE) - -#define PTRS_PER_PTE (1 << PTE_INDEX_SIZE) -#define PTRS_PER_PMD (1 << PMD_INDEX_SIZE) -#define PTRS_PER_PUD (1 << PMD_INDEX_SIZE) -#define PTRS_PER_PGD (1 << PGD_INDEX_SIZE) - -/* PMD_SHIFT determines what a second-level page table entry can map */ -#define PMD_SHIFT (PAGE_SHIFT + PTE_INDEX_SIZE) -#define PMD_SIZE (1UL << PMD_SHIFT) -#define PMD_MASK (~(PMD_SIZE-1)) - -/* PUD_SHIFT determines what a third-level page table entry can map */ -#define PUD_SHIFT (PMD_SHIFT + PMD_INDEX_SIZE) -#define PUD_SIZE (1UL << PUD_SHIFT) -#define PUD_MASK (~(PUD_SIZE-1)) - -/* PGDIR_SHIFT determines what a fourth-level page table entry can map */ -#define PGDIR_SHIFT (PUD_SHIFT + PUD_INDEX_SIZE) -#define PGDIR_SIZE (1UL << PGDIR_SHIFT) -#define PGDIR_MASK (~(PGDIR_SIZE-1)) +#ifdef CONFIG_PPC_64K_PAGES +#include <asm/pgtable-64k.h> +#else +#include <asm/pgtable-4k.h> +#endif #define FIRST_USER_ADDRESS 0 @@ -75,8 +51,16 @@ #define VMALLOC_END (VMALLOC_START + VMALLOC_SIZE) /* - * Bits in a linux-style PTE. These match the bits in the - * (hardware-defined) PowerPC PTE as closely as possible. + * Define the address range of the imalloc VM area. + */ +#define PHBS_IO_BASE VMALLOC_END +#define IMALLOC_BASE (PHBS_IO_BASE + 0x80000000ul) /* Reserve 2 gigs for PHBs */ +#define IMALLOC_END (VMALLOC_START + PGTABLE_RANGE) + +/* + * Common bits in a linux-style PTE. These match the bits in the + * (hardware-defined) PowerPC PTE as closely as possible. Additional + * bits may be defined in pgtable-*.h */ #define _PAGE_PRESENT 0x0001 /* software: pte contains a translation */ #define _PAGE_USER 0x0002 /* matches one of the PP bits */ @@ -91,21 +75,12 @@ #define _PAGE_RW 0x0200 /* software: user write access allowed */ #define _PAGE_HASHPTE 0x0400 /* software: pte has an associated HPTE */ #define _PAGE_BUSY 0x0800 /* software: PTE & hash are busy */ -#define _PAGE_SECONDARY 0x8000 /* software: HPTE is in secondary group */ -#define _PAGE_GROUP_IX 0x7000 /* software: HPTE index within group */ -#define _PAGE_HUGE 0x10000 /* 16MB page */ -/* Bits 0x7000 identify the index within an HPT Group */ -#define _PAGE_HPTEFLAGS (_PAGE_BUSY | _PAGE_HASHPTE | _PAGE_SECONDARY | _PAGE_GROUP_IX) -/* PAGE_MASK gives the right answer below, but only by accident */ -/* It should be preserving the high 48 bits and then specifically */ -/* preserving _PAGE_SECONDARY | _PAGE_GROUP_IX */ -#define _PAGE_CHG_MASK (PAGE_MASK | _PAGE_ACCESSED | _PAGE_DIRTY | _PAGE_HPTEFLAGS) #define _PAGE_BASE (_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_COHERENT) #define _PAGE_WRENABLE (_PAGE_RW | _PAGE_DIRTY) -/* __pgprot defined in asm-ppc64/page.h */ +/* __pgprot defined in asm-powerpc/page.h */ #define PAGE_NONE __pgprot(_PAGE_PRESENT | _PAGE_ACCESSED) #define PAGE_SHARED __pgprot(_PAGE_BASE | _PAGE_RW | _PAGE_USER) @@ -122,10 +97,10 @@ #define PAGE_AGP __pgprot(_PAGE_BASE | _PAGE_WRENABLE | _PAGE_NO_CACHE) #define HAVE_PAGE_AGP -/* - * This bit in a hardware PTE indicates that the page is *not* executable. - */ -#define HW_NO_EXEC _PAGE_EXEC +/* PTEIDX nibble */ +#define _PTEIDX_SECONDARY 0x8 +#define _PTEIDX_GROUP_IX 0x7 + /* * POWER4 and newer have per page execute protection, older chips can only @@ -164,21 +139,10 @@ extern unsigned long empty_zero_page[PAGE_SIZE/sizeof(unsigned long)]; #define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page)) #endif /* __ASSEMBLY__ */ -/* shift to put page number into pte */ -#define PTE_SHIFT (17) - #ifdef CONFIG_HUGETLB_PAGE -#ifndef __ASSEMBLY__ -int hash_huge_page(struct mm_struct *mm, unsigned long access, - unsigned long ea, unsigned long vsid, int local); -#endif /* __ASSEMBLY__ */ - #define HAVE_ARCH_UNMAPPED_AREA #define HAVE_ARCH_UNMAPPED_AREA_TOPDOWN -#else - -#define hash_huge_page(mm,a,ea,vsid,local) -1 #endif @@ -197,7 +161,7 @@ static inline pte_t pfn_pte(unsigned long pfn, pgprot_t pgprot) pte_t pte; - pte_val(pte) = (pfn << PTE_SHIFT) | pgprot_val(pgprot); + pte_val(pte) = (pfn << PTE_RPN_SHIFT) | pgprot_val(pgprot); return pte; } @@ -209,30 +173,25 @@ static inline pte_t pfn_pte(unsigned long pfn, pgprot_t pgprot) /* pte_clear moved to later in this file */ -#define pte_pfn(x) ((unsigned long)((pte_val(x) >> PTE_SHIFT))) +#define pte_pfn(x) ((unsigned long)((pte_val(x)>>PTE_RPN_SHIFT))) #define pte_page(x) pfn_to_page(pte_pfn(x)) -#define pmd_set(pmdp, ptep) ({BUG_ON((u64)ptep < KERNELBASE); pmd_val(*(pmdp)) = (unsigned long)(ptep);}) +#define pmd_set(pmdp, pmdval) (pmd_val(*(pmdp)) = (pmdval)) #define pmd_none(pmd) (!pmd_val(pmd)) #define pmd_bad(pmd) (pmd_val(pmd) == 0) #define pmd_present(pmd) (pmd_val(pmd) != 0) #define pmd_clear(pmdp) (pmd_val(*(pmdp)) = 0) -#define pmd_page_kernel(pmd) (pmd_val(pmd)) +#define pmd_page_kernel(pmd) (pmd_val(pmd) & ~PMD_MASKED_BITS) #define pmd_page(pmd) virt_to_page(pmd_page_kernel(pmd)) -#define pud_set(pudp, pmdp) (pud_val(*(pudp)) = (unsigned long)(pmdp)) +#define pud_set(pudp, pudval) (pud_val(*(pudp)) = (pudval)) #define pud_none(pud) (!pud_val(pud)) #define pud_bad(pud) ((pud_val(pud)) == 0) #define pud_present(pud) (pud_val(pud) != 0) #define pud_clear(pudp) (pud_val(*(pudp)) = 0) -#define pud_page(pud) (pud_val(pud)) +#define pud_page(pud) (pud_val(pud) & ~PUD_MASKED_BITS) #define pgd_set(pgdp, pudp) ({pgd_val(*(pgdp)) = (unsigned long)(pudp);}) -#define pgd_none(pgd) (!pgd_val(pgd)) -#define pgd_bad(pgd) (pgd_val(pgd) == 0) -#define pgd_present(pgd) (pgd_val(pgd) != 0) -#define pgd_clear(pgdp) (pgd_val(*(pgdp)) = 0) -#define pgd_page(pgd) (pgd_val(pgd)) /* * Find an entry in a page-table-directory. We combine the address region @@ -243,9 +202,6 @@ static inline pte_t pfn_pte(unsigned long pfn, pgprot_t pgprot) #define pgd_offset(mm, address) ((mm)->pgd + pgd_index(address)) -#define pud_offset(pgdp, addr) \ - (((pud_t *) pgd_page(*(pgdp))) + (((addr) >> PUD_SHIFT) & (PTRS_PER_PUD - 1))) - #define pmd_offset(pudp,addr) \ (((pmd_t *) pud_page(*(pudp))) + (((addr) >> PMD_SHIFT) & (PTRS_PER_PMD - 1))) @@ -271,7 +227,6 @@ static inline int pte_exec(pte_t pte) { return pte_val(pte) & _PAGE_EXEC;} static inline int pte_dirty(pte_t pte) { return pte_val(pte) & _PAGE_DIRTY;} static inline int pte_young(pte_t pte) { return pte_val(pte) & _PAGE_ACCESSED;} static inline int pte_file(pte_t pte) { return pte_val(pte) & _PAGE_FILE;} -static inline int pte_huge(pte_t pte) { return pte_val(pte) & _PAGE_HUGE;} static inline void pte_uncache(pte_t pte) { pte_val(pte) |= _PAGE_NO_CACHE; } static inline void pte_cache(pte_t pte) { pte_val(pte) &= ~_PAGE_NO_CACHE; } @@ -286,7 +241,6 @@ static inline pte_t pte_mkclean(pte_t pte) { pte_val(pte) &= ~(_PAGE_DIRTY); return pte; } static inline pte_t pte_mkold(pte_t pte) { pte_val(pte) &= ~_PAGE_ACCESSED; return pte; } - static inline pte_t pte_mkread(pte_t pte) { pte_val(pte) |= _PAGE_USER; return pte; } static inline pte_t pte_mkexec(pte_t pte) { @@ -298,7 +252,7 @@ static inline pte_t pte_mkdirty(pte_t pte) { static inline pte_t pte_mkyoung(pte_t pte) { pte_val(pte) |= _PAGE_ACCESSED; return pte; } static inline pte_t pte_mkhuge(pte_t pte) { - pte_val(pte) |= _PAGE_HUGE; return pte; } + return pte; } /* Atomic PTE updates */ static inline unsigned long pte_update(pte_t *p, unsigned long clr) @@ -321,11 +275,13 @@ static inline unsigned long pte_update(pte_t *p, unsigned long clr) /* PTE updating functions, this function puts the PTE in the * batch, doesn't actually triggers the hash flush immediately, * you need to call flush_tlb_pending() to do that. + * Pass -1 for "normal" size (4K or 64K) */ -extern void hpte_update(struct mm_struct *mm, unsigned long addr, unsigned long pte, - int wrprot); +extern void hpte_update(struct mm_struct *mm, unsigned long addr, + pte_t *ptep, unsigned long pte, int huge); -static inline int __ptep_test_and_clear_young(struct mm_struct *mm, unsigned long addr, pte_t *ptep) +static inline int __ptep_test_and_clear_young(struct mm_struct *mm, + unsigned long addr, pte_t *ptep) { unsigned long old; @@ -333,7 +289,7 @@ static inline int __ptep_test_and_clear_young(struct mm_struct *mm, unsigned lon return 0; old = pte_update(ptep, _PAGE_ACCESSED); if (old & _PAGE_HASHPTE) { - hpte_update(mm, addr, old, 0); + hpte_update(mm, addr, ptep, old, 0); flush_tlb_pending(); } return (old & _PAGE_ACCESSED) != 0; @@ -351,7 +307,8 @@ static inline int __ptep_test_and_clear_young(struct mm_struct *mm, unsigned lon * moment we always flush but we need to fix hpte_update and test if the * optimisation is worth it. */ -static inline int __ptep_test_and_clear_dirty(struct mm_struct *mm, unsigned long addr, pte_t *ptep) +static inline int __ptep_test_and_clear_dirty(struct mm_struct *mm, + unsigned long addr, pte_t *ptep) { unsigned long old; @@ -359,7 +316,7 @@ static inline int __ptep_test_and_clear_dirty(struct mm_struct *mm, unsigned lon return 0; old = pte_update(ptep, _PAGE_DIRTY); if (old & _PAGE_HASHPTE) - hpte_update(mm, addr, old, 0); + hpte_update(mm, addr, ptep, old, 0); return (old & _PAGE_DIRTY) != 0; } #define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_DIRTY @@ -371,7 +328,8 @@ static inline int __ptep_test_and_clear_dirty(struct mm_struct *mm, unsigned lon }) #define __HAVE_ARCH_PTEP_SET_WRPROTECT -static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long addr, pte_t *ptep) +static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long addr, + pte_t *ptep) { unsigned long old; @@ -379,7 +337,7 @@ static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long addr, return; old = pte_update(ptep, _PAGE_RW); if (old & _PAGE_HASHPTE) - hpte_update(mm, addr, old, 0); + hpte_update(mm, addr, ptep, old, 0); } /* @@ -408,21 +366,23 @@ static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long addr, }) #define __HAVE_ARCH_PTEP_GET_AND_CLEAR -static inline pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep) +static inline pte_t ptep_get_and_clear(struct mm_struct *mm, + unsigned long addr, pte_t *ptep) { unsigned long old = pte_update(ptep, ~0UL); if (old & _PAGE_HASHPTE) - hpte_update(mm, addr, old, 0); + hpte_update(mm, addr, ptep, old, 0); return __pte(old); } -static inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte_t * ptep) +static inline void pte_clear(struct mm_struct *mm, unsigned long addr, + pte_t * ptep) { unsigned long old = pte_update(ptep, ~0UL); if (old & _PAGE_HASHPTE) - hpte_update(mm, addr, old, 0); + hpte_update(mm, addr, ptep, old, 0); } /* @@ -435,7 +395,14 @@ static inline void set_pte_at(struct mm_struct *mm, unsigned long addr, pte_clear(mm, addr, ptep); flush_tlb_pending(); } - *ptep = __pte(pte_val(pte) & ~_PAGE_HPTEFLAGS); + pte = __pte(pte_val(pte) & ~_PAGE_HPTEFLAGS); + +#ifdef CONFIG_PPC_64K_PAGES + if (mmu_virtual_psize != MMU_PAGE_64K) + pte = __pte(pte_val(pte) | _PAGE_COMBO); +#endif /* CONFIG_PPC_64K_PAGES */ + + *ptep = pte; } /* Set the dirty and/or accessed bits atomically in a linux PTE, this @@ -471,17 +438,17 @@ static inline void __ptep_set_access_flags(pte_t *ptep, pte_t entry, int dirty) #define pgprot_noncached(prot) (__pgprot(pgprot_val(prot) | _PAGE_NO_CACHE | _PAGE_GUARDED)) struct file; -extern pgprot_t phys_mem_access_prot(struct file *file, unsigned long addr, +extern pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn, unsigned long size, pgprot_t vma_prot); #define __HAVE_PHYS_MEM_ACCESS_PROT #define __HAVE_ARCH_PTE_SAME #define pte_same(A,B) (((pte_val(A) ^ pte_val(B)) & ~_PAGE_HPTEFLAGS) == 0) +#define pte_ERROR(e) \ + printk("%s:%d: bad pte %08lx.\n", __FILE__, __LINE__, pte_val(e)) #define pmd_ERROR(e) \ printk("%s:%d: bad pmd %08lx.\n", __FILE__, __LINE__, pmd_val(e)) -#define pud_ERROR(e) \ - printk("%s:%d: bad pmd %08lx.\n", __FILE__, __LINE__, pud_val(e)) #define pgd_ERROR(e) \ printk("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, pgd_val(e)) @@ -507,12 +474,12 @@ extern void update_mmu_cache(struct vm_area_struct *, unsigned long, pte_t); /* Encode and de-code a swap entry */ #define __swp_type(entry) (((entry).val >> 1) & 0x3f) #define __swp_offset(entry) ((entry).val >> 8) -#define __swp_entry(type, offset) ((swp_entry_t) { ((type) << 1) | ((offset) << 8) }) -#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) >> PTE_SHIFT }) -#define __swp_entry_to_pte(x) ((pte_t) { (x).val << PTE_SHIFT }) -#define pte_to_pgoff(pte) (pte_val(pte) >> PTE_SHIFT) -#define pgoff_to_pte(off) ((pte_t) {((off) << PTE_SHIFT)|_PAGE_FILE}) -#define PTE_FILE_MAX_BITS (BITS_PER_LONG - PTE_SHIFT) +#define __swp_entry(type, offset) ((swp_entry_t){((type)<< 1)|((offset)<<8)}) +#define __pte_to_swp_entry(pte) ((swp_entry_t){pte_val(pte) >> PTE_RPN_SHIFT}) +#define __swp_entry_to_pte(x) ((pte_t) { (x).val << PTE_RPN_SHIFT }) +#define pte_to_pgoff(pte) (pte_val(pte) >> PTE_RPN_SHIFT) +#define pgoff_to_pte(off) ((pte_t) {((off) << PTE_RPN_SHIFT)|_PAGE_FILE}) +#define PTE_FILE_MAX_BITS (BITS_PER_LONG - PTE_RPN_SHIFT) /* * kern_addr_valid is intended to indicate whether an address is a valid @@ -530,29 +497,22 @@ void pgtable_cache_init(void); /* * find_linux_pte returns the address of a linux pte for a given * effective address and directory. If not found, it returns zero. - */ -static inline pte_t *find_linux_pte(pgd_t *pgdir, unsigned long ea) + */static inline pte_t *find_linux_pte(pgd_t *pgdir, unsigned long ea) { pgd_t *pg; pud_t *pu; pmd_t *pm; pte_t *pt = NULL; - pte_t pte; pg = pgdir + pgd_index(ea); if (!pgd_none(*pg)) { pu = pud_offset(pg, ea); if (!pud_none(*pu)) { pm = pmd_offset(pu, ea); - if (pmd_present(*pm)) { + if (pmd_present(*pm)) pt = pte_offset_kernel(pm, ea); - pte = *pt; - if (!pte_present(pte)) - pt = NULL; - } } } - return pt; } @@ -560,4 +520,5 @@ static inline pte_t *find_linux_pte(pgd_t *pgdir, unsigned long ea) #endif /* __ASSEMBLY__ */ -#endif /* _PPC64_PGTABLE_H */ +#endif /* CONFIG_PPC64 */ +#endif /* _ASM_POWERPC_PGTABLE_H */ diff --git a/include/asm-ppc/pmac_feature.h b/include/asm-powerpc/pmac_feature.h index e9683bcff19b..e9683bcff19b 100644 --- a/include/asm-ppc/pmac_feature.h +++ b/include/asm-powerpc/pmac_feature.h diff --git a/include/asm-ppc/pmac_low_i2c.h b/include/asm-powerpc/pmac_low_i2c.h index 809a5963d5e7..809a5963d5e7 100644 --- a/include/asm-ppc/pmac_low_i2c.h +++ b/include/asm-powerpc/pmac_low_i2c.h diff --git a/include/asm-powerpc/pmc.h b/include/asm-powerpc/pmc.h new file mode 100644 index 000000000000..5f41f3a2b293 --- /dev/null +++ b/include/asm-powerpc/pmc.h @@ -0,0 +1,47 @@ +/* + * pmc.h + * Copyright (C) 2004 David Gibson, IBM Corporation + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ +#ifndef _POWERPC_PMC_H +#define _POWERPC_PMC_H + +#include <asm/ptrace.h> + +typedef void (*perf_irq_t)(struct pt_regs *); +extern perf_irq_t perf_irq; + +int reserve_pmc_hardware(perf_irq_t new_perf_irq); +void release_pmc_hardware(void); + +#ifdef CONFIG_PPC64 +void power4_enable_pmcs(void); +#endif + +#ifdef CONFIG_FSL_BOOKE +void init_pmc_stop(int ctr); +void set_pmc_event(int ctr, int event); +void set_pmc_user_kernel(int ctr, int user, int kernel); +void set_pmc_marked(int ctr, int mark0, int mark1); +void pmc_start_ctr(int ctr, int enable); +void pmc_start_ctrs(int enable); +void pmc_stop_ctrs(void); +void dump_pmcs(void); + +extern struct op_powerpc_model op_model_fsl_booke; +#endif + +#endif /* _POWERPC_PMC_H */ diff --git a/include/asm-ppc64/posix_types.h b/include/asm-powerpc/posix_types.h index 516de7201b5d..c6391077224f 100644 --- a/include/asm-ppc64/posix_types.h +++ b/include/asm-powerpc/posix_types.h @@ -1,44 +1,54 @@ -#ifndef _PPC64_POSIX_TYPES_H -#define _PPC64_POSIX_TYPES_H +#ifndef _ASM_POWERPC_POSIX_TYPES_H +#define _ASM_POWERPC_POSIX_TYPES_H /* * This file is generally used by user-level software, so you need to * be a little careful about namespace pollution etc. Also, we cannot * assume GCC is being used. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. */ typedef unsigned long __kernel_ino_t; -typedef unsigned long __kernel_nlink_t; typedef unsigned int __kernel_mode_t; typedef long __kernel_off_t; -typedef long long __kernel_loff_t; typedef int __kernel_pid_t; -typedef int __kernel_ipc_pid_t; typedef unsigned int __kernel_uid_t; typedef unsigned int __kernel_gid_t; -typedef unsigned long __kernel_size_t; -typedef long __kernel_ssize_t; typedef long __kernel_ptrdiff_t; typedef long __kernel_time_t; +typedef long __kernel_clock_t; typedef int __kernel_timer_t; typedef int __kernel_clockid_t; typedef long __kernel_suseconds_t; -typedef long __kernel_clock_t; typedef int __kernel_daddr_t; typedef char * __kernel_caddr_t; typedef unsigned short __kernel_uid16_t; typedef unsigned short __kernel_gid16_t; typedef unsigned int __kernel_uid32_t; typedef unsigned int __kernel_gid32_t; - typedef unsigned int __kernel_old_uid_t; typedef unsigned int __kernel_old_gid_t; + +#ifdef __powerpc64__ +typedef unsigned long __kernel_nlink_t; +typedef int __kernel_ipc_pid_t; +typedef unsigned long __kernel_size_t; +typedef long __kernel_ssize_t; typedef unsigned long __kernel_old_dev_t; +#else +typedef unsigned short __kernel_nlink_t; +typedef short __kernel_ipc_pid_t; +typedef unsigned int __kernel_size_t; +typedef int __kernel_ssize_t; +typedef unsigned int __kernel_old_dev_t; +#endif + +#ifdef __powerpc64__ +typedef long long __kernel_loff_t; +#else +#ifdef __GNUC__ +typedef long long __kernel_loff_t; +#endif +#endif typedef struct { int val[2]; @@ -116,4 +126,4 @@ static __inline__ void __FD_ZERO(__kernel_fd_set *p) #endif /* defined(__KERNEL__) || !defined(__GLIBC__) || (__GLIBC__ < 2) */ #endif /* __GNUC__ */ -#endif /* _PPC64_POSIX_TYPES_H */ +#endif /* _ASM_POWERPC_POSIX_TYPES_H */ diff --git a/include/asm-powerpc/ppc-pci.h b/include/asm-powerpc/ppc-pci.h new file mode 100644 index 000000000000..36cdc869e580 --- /dev/null +++ b/include/asm-powerpc/ppc-pci.h @@ -0,0 +1,96 @@ +/* + * c 2001 PPC 64 Team, IBM Corp + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version + * 2 of the License, or (at your option) any later version. + */ +#ifndef _ASM_POWERPC_PPC_PCI_H +#define _ASM_POWERPC_PPC_PCI_H + +#include <linux/pci.h> +#include <asm/pci-bridge.h> + +extern unsigned long isa_io_base; + +extern void pci_setup_phb_io(struct pci_controller *hose, int primary); +extern void pci_setup_phb_io_dynamic(struct pci_controller *hose, int primary); + + +extern struct list_head hose_list; +extern int global_phb_number; + +extern unsigned long find_and_init_phbs(void); + +extern struct pci_dev *ppc64_isabridge_dev; /* may be NULL if no ISA bus */ + +/** Bus Unit ID macros; get low and hi 32-bits of the 64-bit BUID */ +#define BUID_HI(buid) ((buid) >> 32) +#define BUID_LO(buid) ((buid) & 0xffffffff) + +/* PCI device_node operations */ +struct device_node; +typedef void *(*traverse_func)(struct device_node *me, void *data); +void *traverse_pci_devices(struct device_node *start, traverse_func pre, + void *data); + +void pci_devs_phb_init(void); +void pci_devs_phb_init_dynamic(struct pci_controller *phb); +void __devinit scan_phb(struct pci_controller *hose); + +/* From rtas_pci.h */ +void init_pci_config_tokens (void); +unsigned long get_phb_buid (struct device_node *); + +/* From pSeries_pci.h */ +extern void pSeries_final_fixup(void); +extern void pSeries_irq_bus_setup(struct pci_bus *bus); + +extern unsigned long pci_probe_only; + +/* ---- EEH internal-use-only related routines ---- */ +#ifdef CONFIG_EEH +/** + * rtas_set_slot_reset -- unfreeze a frozen slot + * + * Clear the EEH-frozen condition on a slot. This routine + * does this by asserting the PCI #RST line for 1/8th of + * a second; this routine will sleep while the adapter is + * being reset. + */ +void rtas_set_slot_reset (struct pci_dn *); + +/** + * eeh_restore_bars - Restore device configuration info. + * + * A reset of a PCI device will clear out its config space. + * This routines will restore the config space for this + * device, and is children, to values previously obtained + * from the firmware. + */ +void eeh_restore_bars(struct pci_dn *); + +/** + * rtas_configure_bridge -- firmware initialization of pci bridge + * + * Ask the firmware to configure all PCI bridges devices + * located behind the indicated node. Required after a + * pci device reset. Does essentially the same hing as + * eeh_restore_bars, but for brdges, and lets firmware + * do the work. + */ +void rtas_configure_bridge(struct pci_dn *); + +int rtas_write_config(struct pci_dn *, int where, int size, u32 val); + +/** + * mark and clear slots: find "partition endpoint" PE and set or + * clear the flags for each subnode of the PE. + */ +void eeh_mark_slot (struct device_node *dn, int mode_flag); +void eeh_clear_slot (struct device_node *dn, int mode_flag); + +#endif + +#endif /* _ASM_POWERPC_PPC_PCI_H */ diff --git a/include/asm-ppc/ppc_asm.h b/include/asm-powerpc/ppc_asm.h index bb53e2def363..c27baa0563fe 100644 --- a/include/asm-ppc/ppc_asm.h +++ b/include/asm-powerpc/ppc_asm.h @@ -1,38 +1,47 @@ /* - * include/asm-ppc/ppc_asm.h - * - * Definitions used by various bits of low-level assembly code on PowerPC. - * * Copyright (C) 1995-1999 Gary Thomas, Paul Mackerras, Cort Dougan. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. */ +#ifndef _ASM_POWERPC_PPC_ASM_H +#define _ASM_POWERPC_PPC_ASM_H +#include <linux/stringify.h> #include <linux/config.h> +#include <asm/asm-compat.h> + +#ifndef __ASSEMBLY__ +#error __FILE__ should only be used in assembler files +#else + +#define SZL (BITS_PER_LONG/8) /* * Macros for storing registers into and loading registers from * exception frames. */ +#ifdef __powerpc64__ +#define SAVE_GPR(n, base) std n,GPR0+8*(n)(base) +#define REST_GPR(n, base) ld n,GPR0+8*(n)(base) +#define SAVE_NVGPRS(base) SAVE_8GPRS(14, base); SAVE_10GPRS(22, base) +#define REST_NVGPRS(base) REST_8GPRS(14, base); REST_10GPRS(22, base) +#else #define SAVE_GPR(n, base) stw n,GPR0+4*(n)(base) +#define REST_GPR(n, base) lwz n,GPR0+4*(n)(base) +#define SAVE_NVGPRS(base) SAVE_GPR(13, base); SAVE_8GPRS(14, base); \ + SAVE_10GPRS(22, base) +#define REST_NVGPRS(base) REST_GPR(13, base); REST_8GPRS(14, base); \ + REST_10GPRS(22, base) +#endif + + #define SAVE_2GPRS(n, base) SAVE_GPR(n, base); SAVE_GPR(n+1, base) #define SAVE_4GPRS(n, base) SAVE_2GPRS(n, base); SAVE_2GPRS(n+2, base) #define SAVE_8GPRS(n, base) SAVE_4GPRS(n, base); SAVE_4GPRS(n+4, base) #define SAVE_10GPRS(n, base) SAVE_8GPRS(n, base); SAVE_2GPRS(n+8, base) -#define REST_GPR(n, base) lwz n,GPR0+4*(n)(base) #define REST_2GPRS(n, base) REST_GPR(n, base); REST_GPR(n+1, base) #define REST_4GPRS(n, base) REST_2GPRS(n, base); REST_2GPRS(n+2, base) #define REST_8GPRS(n, base) REST_4GPRS(n, base); REST_4GPRS(n+4, base) #define REST_10GPRS(n, base) REST_8GPRS(n, base); REST_2GPRS(n+8, base) -#define SAVE_NVGPRS(base) SAVE_GPR(13, base); SAVE_8GPRS(14, base); \ - SAVE_10GPRS(22, base) -#define REST_NVGPRS(base) REST_GPR(13, base); REST_8GPRS(14, base); \ - REST_10GPRS(22, base) - #define SAVE_FPR(n, base) stfd n,THREAD_FPR0+8*(n)(base) #define SAVE_2FPRS(n, base) SAVE_FPR(n, base); SAVE_FPR(n+1, base) #define SAVE_4FPRS(n, base) SAVE_2FPRS(n, base); SAVE_2FPRS(n+2, base) @@ -47,32 +56,158 @@ #define REST_32FPRS(n, base) REST_16FPRS(n, base); REST_16FPRS(n+16, base) #define SAVE_VR(n,b,base) li b,THREAD_VR0+(16*(n)); stvx n,b,base -#define SAVE_2VR(n,b,base) SAVE_VR(n,b,base); SAVE_VR(n+1,b,base) -#define SAVE_4VR(n,b,base) SAVE_2VR(n,b,base); SAVE_2VR(n+2,b,base) -#define SAVE_8VR(n,b,base) SAVE_4VR(n,b,base); SAVE_4VR(n+4,b,base) -#define SAVE_16VR(n,b,base) SAVE_8VR(n,b,base); SAVE_8VR(n+8,b,base) -#define SAVE_32VR(n,b,base) SAVE_16VR(n,b,base); SAVE_16VR(n+16,b,base) +#define SAVE_2VRS(n,b,base) SAVE_VR(n,b,base); SAVE_VR(n+1,b,base) +#define SAVE_4VRS(n,b,base) SAVE_2VRS(n,b,base); SAVE_2VRS(n+2,b,base) +#define SAVE_8VRS(n,b,base) SAVE_4VRS(n,b,base); SAVE_4VRS(n+4,b,base) +#define SAVE_16VRS(n,b,base) SAVE_8VRS(n,b,base); SAVE_8VRS(n+8,b,base) +#define SAVE_32VRS(n,b,base) SAVE_16VRS(n,b,base); SAVE_16VRS(n+16,b,base) #define REST_VR(n,b,base) li b,THREAD_VR0+(16*(n)); lvx n,b,base -#define REST_2VR(n,b,base) REST_VR(n,b,base); REST_VR(n+1,b,base) -#define REST_4VR(n,b,base) REST_2VR(n,b,base); REST_2VR(n+2,b,base) -#define REST_8VR(n,b,base) REST_4VR(n,b,base); REST_4VR(n+4,b,base) -#define REST_16VR(n,b,base) REST_8VR(n,b,base); REST_8VR(n+8,b,base) -#define REST_32VR(n,b,base) REST_16VR(n,b,base); REST_16VR(n+16,b,base) +#define REST_2VRS(n,b,base) REST_VR(n,b,base); REST_VR(n+1,b,base) +#define REST_4VRS(n,b,base) REST_2VRS(n,b,base); REST_2VRS(n+2,b,base) +#define REST_8VRS(n,b,base) REST_4VRS(n,b,base); REST_4VRS(n+4,b,base) +#define REST_16VRS(n,b,base) REST_8VRS(n,b,base); REST_8VRS(n+8,b,base) +#define REST_32VRS(n,b,base) REST_16VRS(n,b,base); REST_16VRS(n+16,b,base) #define SAVE_EVR(n,s,base) evmergehi s,s,n; stw s,THREAD_EVR0+4*(n)(base) -#define SAVE_2EVR(n,s,base) SAVE_EVR(n,s,base); SAVE_EVR(n+1,s,base) -#define SAVE_4EVR(n,s,base) SAVE_2EVR(n,s,base); SAVE_2EVR(n+2,s,base) -#define SAVE_8EVR(n,s,base) SAVE_4EVR(n,s,base); SAVE_4EVR(n+4,s,base) -#define SAVE_16EVR(n,s,base) SAVE_8EVR(n,s,base); SAVE_8EVR(n+8,s,base) -#define SAVE_32EVR(n,s,base) SAVE_16EVR(n,s,base); SAVE_16EVR(n+16,s,base) - +#define SAVE_2EVRS(n,s,base) SAVE_EVR(n,s,base); SAVE_EVR(n+1,s,base) +#define SAVE_4EVRS(n,s,base) SAVE_2EVRS(n,s,base); SAVE_2EVRS(n+2,s,base) +#define SAVE_8EVRS(n,s,base) SAVE_4EVRS(n,s,base); SAVE_4EVRS(n+4,s,base) +#define SAVE_16EVRS(n,s,base) SAVE_8EVRS(n,s,base); SAVE_8EVRS(n+8,s,base) +#define SAVE_32EVRS(n,s,base) SAVE_16EVRS(n,s,base); SAVE_16EVRS(n+16,s,base) #define REST_EVR(n,s,base) lwz s,THREAD_EVR0+4*(n)(base); evmergelo n,s,n -#define REST_2EVR(n,s,base) REST_EVR(n,s,base); REST_EVR(n+1,s,base) -#define REST_4EVR(n,s,base) REST_2EVR(n,s,base); REST_2EVR(n+2,s,base) -#define REST_8EVR(n,s,base) REST_4EVR(n,s,base); REST_4EVR(n+4,s,base) -#define REST_16EVR(n,s,base) REST_8EVR(n,s,base); REST_8EVR(n+8,s,base) -#define REST_32EVR(n,s,base) REST_16EVR(n,s,base); REST_16EVR(n+16,s,base) +#define REST_2EVRS(n,s,base) REST_EVR(n,s,base); REST_EVR(n+1,s,base) +#define REST_4EVRS(n,s,base) REST_2EVRS(n,s,base); REST_2EVRS(n+2,s,base) +#define REST_8EVRS(n,s,base) REST_4EVRS(n,s,base); REST_4EVRS(n+4,s,base) +#define REST_16EVRS(n,s,base) REST_8EVRS(n,s,base); REST_8EVRS(n+8,s,base) +#define REST_32EVRS(n,s,base) REST_16EVRS(n,s,base); REST_16EVRS(n+16,s,base) + +/* Macros to adjust thread priority for hardware multithreading */ +#define HMT_VERY_LOW or 31,31,31 # very low priority +#define HMT_LOW or 1,1,1 +#define HMT_MEDIUM_LOW or 6,6,6 # medium low priority +#define HMT_MEDIUM or 2,2,2 +#define HMT_MEDIUM_HIGH or 5,5,5 # medium high priority +#define HMT_HIGH or 3,3,3 + +/* handle instructions that older assemblers may not know */ +#define RFCI .long 0x4c000066 /* rfci instruction */ +#define RFDI .long 0x4c00004e /* rfdi instruction */ +#define RFMCI .long 0x4c00004c /* rfmci instruction */ + +#ifdef CONFIG_PPC64 + +#define XGLUE(a,b) a##b +#define GLUE(a,b) XGLUE(a,b) + +#define _GLOBAL(name) \ + .section ".text"; \ + .align 2 ; \ + .globl name; \ + .globl GLUE(.,name); \ + .section ".opd","aw"; \ +name: \ + .quad GLUE(.,name); \ + .quad .TOC.@tocbase; \ + .quad 0; \ + .previous; \ + .type GLUE(.,name),@function; \ +GLUE(.,name): + +#define _KPROBE(name) \ + .section ".kprobes.text","a"; \ + .align 2 ; \ + .globl name; \ + .globl GLUE(.,name); \ + .section ".opd","aw"; \ +name: \ + .quad GLUE(.,name); \ + .quad .TOC.@tocbase; \ + .quad 0; \ + .previous; \ + .type GLUE(.,name),@function; \ +GLUE(.,name): + +#define _STATIC(name) \ + .section ".text"; \ + .align 2 ; \ + .section ".opd","aw"; \ +name: \ + .quad GLUE(.,name); \ + .quad .TOC.@tocbase; \ + .quad 0; \ + .previous; \ + .type GLUE(.,name),@function; \ +GLUE(.,name): + +#else /* 32-bit */ + +#define _GLOBAL(n) \ + .text; \ + .stabs __stringify(n:F-1),N_FUN,0,0,n;\ + .globl n; \ +n: + +#define _KPROBE(n) \ + .section ".kprobes.text","a"; \ + .globl n; \ +n: + +#endif + +/* + * LOADADDR( rn, name ) + * loads the address of 'name' into 'rn' + * + * LOADBASE( rn, name ) + * loads the address (possibly without the low 16 bits) of 'name' into 'rn' + * suitable for base+disp addressing + */ +#ifdef __powerpc64__ +#define LOADADDR(rn,name) \ + lis rn,name##@highest; \ + ori rn,rn,name##@higher; \ + rldicr rn,rn,32,31; \ + oris rn,rn,name##@h; \ + ori rn,rn,name##@l + +#define LOADBASE(rn,name) \ + ld rn,name@got(r2) + +#define OFF(name) 0 + +#define SET_REG_TO_CONST(reg, value) \ + lis reg,(((value)>>48)&0xFFFF); \ + ori reg,reg,(((value)>>32)&0xFFFF); \ + rldicr reg,reg,32,31; \ + oris reg,reg,(((value)>>16)&0xFFFF); \ + ori reg,reg,((value)&0xFFFF); + +#define SET_REG_TO_LABEL(reg, label) \ + lis reg,(label)@highest; \ + ori reg,reg,(label)@higher; \ + rldicr reg,reg,32,31; \ + oris reg,reg,(label)@h; \ + ori reg,reg,(label)@l; + +/* offsets for stack frame layout */ +#define LRSAVE 16 + +#else /* 32-bit */ +#define LOADADDR(rn,name) \ + lis rn,name@ha; \ + addi rn,rn,name@l + +#define LOADBASE(rn,name) \ + lis rn,name@ha +#define OFF(name) name@l + +/* offsets for stack frame layout */ +#define LRSAVE 4 + +#endif + +/* various errata or part fixups */ #ifdef CONFIG_PPC601_SYNC_FIX #define SYNC \ BEGIN_FTR_SECTION \ @@ -93,6 +228,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_601) #define ISYNC_601 #endif + #ifndef CONFIG_SMP #define TLBSYNC #else /* CONFIG_SMP */ @@ -104,6 +240,7 @@ BEGIN_FTR_SECTION \ END_FTR_SECTION_IFCLR(CPU_FTR_601) #endif + /* * This instruction is not implemented on the PPC 603 or 601; however, on * the 403GCX and 405GP tlbia IS defined and tlbie is not. @@ -121,18 +258,43 @@ END_FTR_SECTION_IFCLR(CPU_FTR_601) bdnz 0b #endif -#ifdef CONFIG_BOOKE + +#ifdef CONFIG_IBM440EP_ERR42 +#define PPC440EP_ERR42 isync +#else +#define PPC440EP_ERR42 +#endif + + +#if defined(CONFIG_BOOKE) +#define toreal(rd) +#define fromreal(rd) + #define tophys(rd,rs) \ addis rd,rs,0 #define tovirt(rd,rs) \ addis rd,rs,0 -#else /* CONFIG_BOOKE */ +#elif defined(CONFIG_PPC64) +#define toreal(rd) /* we can access c000... in real mode */ +#define fromreal(rd) + +#define tophys(rd,rs) \ + clrldi rd,rs,2 + +#define tovirt(rd,rs) \ + rotldi rd,rs,16; \ + ori rd,rd,((KERNELBASE>>48)&0xFFFF);\ + rotldi rd,rd,48 +#else /* * On APUS (Amiga PowerPC cpu upgrade board), we don't know the * physical base address of RAM at compile time. */ +#define toreal(rd) tophys(rd,rd) +#define fromreal(rd) tovirt(rd,rd) + #define tophys(rd,rs) \ 0: addis rd,rs,-KERNELBASE@h; \ .section ".vtop_fixup","aw"; \ @@ -146,22 +308,11 @@ END_FTR_SECTION_IFCLR(CPU_FTR_601) .align 1; \ .long 0b; \ .previous -#endif /* CONFIG_BOOKE */ +#endif -/* - * On 64-bit cpus, we use the rfid instruction instead of rfi, but - * we then have to make sure we preserve the top 32 bits except for - * the 64-bit mode bit, which we clear. - */ -#ifdef CONFIG_PPC64BRIDGE -#define FIX_SRR1(ra, rb) \ - mr rb,ra; \ - mfmsr ra; \ - clrldi ra,ra,1; /* turn off 64-bit mode */ \ - rldimi ra,rb,0,32 -#define RFI .long 0x4c000024 /* rfid instruction */ -#define MTMSRD(r) .long (0x7c000164 + ((r) << 21)) /* mtmsrd */ -#define CLR_TOP32(r) rlwinm (r),(r),0,0,31 /* clear top 32 bits */ +#ifdef CONFIG_PPC64 +#define RFI rfid +#define MTMSRD(r) mtmsrd r #else #define FIX_SRR1(ra, rb) @@ -172,24 +323,6 @@ END_FTR_SECTION_IFCLR(CPU_FTR_601) #endif #define MTMSRD(r) mtmsr r #define CLR_TOP32(r) -#endif /* CONFIG_PPC64BRIDGE */ - -#define RFCI .long 0x4c000066 /* rfci instruction */ -#define RFDI .long 0x4c00004e /* rfdi instruction */ -#define RFMCI .long 0x4c00004c /* rfmci instruction */ - -#ifdef CONFIG_IBM405_ERR77 -#define PPC405_ERR77(ra,rb) dcbt ra, rb; -#define PPC405_ERR77_SYNC sync; -#else -#define PPC405_ERR77(ra,rb) -#define PPC405_ERR77_SYNC -#endif - -#ifdef CONFIG_IBM440EP_ERR42 -#define PPC440EP_ERR42 isync -#else -#define PPC440EP_ERR42 #endif /* The boring bits... */ @@ -277,6 +410,8 @@ END_FTR_SECTION_IFCLR(CPU_FTR_601) #define fr30 30 #define fr31 31 +/* AltiVec Registers (VPRs) */ + #define vr0 0 #define vr1 1 #define vr2 2 @@ -310,6 +445,8 @@ END_FTR_SECTION_IFCLR(CPU_FTR_601) #define vr30 30 #define vr31 31 +/* SPE Registers (EVPRs) */ + #define evr0 0 #define evr1 1 #define evr2 2 @@ -348,3 +485,7 @@ END_FTR_SECTION_IFCLR(CPU_FTR_601) #define N_RSYM 64 #define N_SLINE 68 #define N_SO 100 + +#endif /* __ASSEMBLY__ */ + +#endif /* _ASM_POWERPC_PPC_ASM_H */ diff --git a/include/asm-powerpc/processor.h b/include/asm-powerpc/processor.h new file mode 100644 index 000000000000..d12382d292d4 --- /dev/null +++ b/include/asm-powerpc/processor.h @@ -0,0 +1,287 @@ +#ifndef _ASM_POWERPC_PROCESSOR_H +#define _ASM_POWERPC_PROCESSOR_H + +/* + * Copyright (C) 2001 PPC 64 Team, IBM Corp + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version + * 2 of the License, or (at your option) any later version. + */ + +#include <linux/config.h> +#include <asm/reg.h> + +#ifndef __ASSEMBLY__ +#include <linux/compiler.h> +#include <asm/ptrace.h> +#include <asm/types.h> + +/* We do _not_ want to define new machine types at all, those must die + * in favor of using the device-tree + * -- BenH. + */ + +/* Platforms codes (to be obsoleted) */ +#define PLATFORM_PSERIES 0x0100 +#define PLATFORM_PSERIES_LPAR 0x0101 +#define PLATFORM_ISERIES_LPAR 0x0201 +#define PLATFORM_LPAR 0x0001 +#define PLATFORM_POWERMAC 0x0400 +#define PLATFORM_MAPLE 0x0500 +#define PLATFORM_PREP 0x0600 +#define PLATFORM_CHRP 0x0700 +#define PLATFORM_CELL 0x1000 + +/* Compat platform codes for 32 bits */ +#define _MACH_prep PLATFORM_PREP +#define _MACH_Pmac PLATFORM_POWERMAC +#define _MACH_chrp PLATFORM_CHRP + +/* PREP sub-platform types see residual.h for these */ +#define _PREP_Motorola 0x01 /* motorola prep */ +#define _PREP_Firm 0x02 /* firmworks prep */ +#define _PREP_IBM 0x00 /* ibm prep */ +#define _PREP_Bull 0x03 /* bull prep */ + +/* CHRP sub-platform types. These are arbitrary */ +#define _CHRP_Motorola 0x04 /* motorola chrp, the cobra */ +#define _CHRP_IBM 0x05 /* IBM chrp, the longtrail and longtrail 2 */ +#define _CHRP_Pegasos 0x06 /* Genesi/bplan's Pegasos and Pegasos2 */ + +#define platform_is_pseries() (_machine == PLATFORM_PSERIES || \ + _machine == PLATFORM_PSERIES_LPAR) +#define platform_is_lpar() (!!(_machine & PLATFORM_LPAR)) + +#if defined(CONFIG_PPC_MULTIPLATFORM) +extern int _machine; + +#ifdef CONFIG_PPC32 + +/* what kind of prep workstation we are */ +extern int _prep_type; +extern int _chrp_type; + +/* + * This is used to identify the board type from a given PReP board + * vendor. Board revision is also made available. This will be moved + * elsewhere soon + */ +extern unsigned char ucSystemType; +extern unsigned char ucBoardRev; +extern unsigned char ucBoardRevMaj, ucBoardRevMin; + +#endif /* CONFIG_PPC32 */ + +#elif defined(CONFIG_PPC_ISERIES) +/* + * iSeries is soon to become MULTIPLATFORM hopefully ... + */ +#define _machine PLATFORM_ISERIES_LPAR +#else +#define _machine 0 +#endif /* CONFIG_PPC_MULTIPLATFORM */ + +/* + * Default implementation of macro that returns current + * instruction pointer ("program counter"). + */ +#define current_text_addr() ({ __label__ _l; _l: &&_l;}) + +/* Macros for adjusting thread priority (hardware multi-threading) */ +#define HMT_very_low() asm volatile("or 31,31,31 # very low priority") +#define HMT_low() asm volatile("or 1,1,1 # low priority") +#define HMT_medium_low() asm volatile("or 6,6,6 # medium low priority") +#define HMT_medium() asm volatile("or 2,2,2 # medium priority") +#define HMT_medium_high() asm volatile("or 5,5,5 # medium high priority") +#define HMT_high() asm volatile("or 3,3,3 # high priority") + +#ifdef __KERNEL__ + +extern int have_of; + +struct task_struct; +void start_thread(struct pt_regs *regs, unsigned long fdptr, unsigned long sp); +void release_thread(struct task_struct *); + +/* Prepare to copy thread state - unlazy all lazy status */ +extern void prepare_to_copy(struct task_struct *tsk); + +/* Create a new kernel thread. */ +extern long kernel_thread(int (*fn)(void *), void *arg, unsigned long flags); + +/* Lazy FPU handling on uni-processor */ +extern struct task_struct *last_task_used_math; +extern struct task_struct *last_task_used_altivec; +extern struct task_struct *last_task_used_spe; + +#ifdef CONFIG_PPC32 +#define TASK_SIZE (CONFIG_TASK_SIZE) + +/* This decides where the kernel will search for a free chunk of vm + * space during mmap's. + */ +#define TASK_UNMAPPED_BASE (TASK_SIZE / 8 * 3) +#endif + +#ifdef CONFIG_PPC64 +/* 64-bit user address space is 44-bits (16TB user VM) */ +#define TASK_SIZE_USER64 (0x0000100000000000UL) + +/* + * 32-bit user address space is 4GB - 1 page + * (this 1 page is needed so referencing of 0xFFFFFFFF generates EFAULT + */ +#define TASK_SIZE_USER32 (0x0000000100000000UL - (1*PAGE_SIZE)) + +#define TASK_SIZE (test_thread_flag(TIF_32BIT) ? \ + TASK_SIZE_USER32 : TASK_SIZE_USER64) + +/* This decides where the kernel will search for a free chunk of vm + * space during mmap's. + */ +#define TASK_UNMAPPED_BASE_USER32 (PAGE_ALIGN(TASK_SIZE_USER32 / 4)) +#define TASK_UNMAPPED_BASE_USER64 (PAGE_ALIGN(TASK_SIZE_USER64 / 4)) + +#define TASK_UNMAPPED_BASE ((test_thread_flag(TIF_32BIT)) ? \ + TASK_UNMAPPED_BASE_USER32 : TASK_UNMAPPED_BASE_USER64 ) +#endif + +typedef struct { + unsigned long seg; +} mm_segment_t; + +struct thread_struct { + unsigned long ksp; /* Kernel stack pointer */ +#ifdef CONFIG_PPC64 + unsigned long ksp_vsid; +#endif + struct pt_regs *regs; /* Pointer to saved register state */ + mm_segment_t fs; /* for get_fs() validation */ +#ifdef CONFIG_PPC32 + void *pgdir; /* root of page-table tree */ + signed long last_syscall; +#endif +#if defined(CONFIG_4xx) || defined (CONFIG_BOOKE) + unsigned long dbcr0; /* debug control register values */ + unsigned long dbcr1; +#endif + double fpr[32]; /* Complete floating point set */ + struct { /* fpr ... fpscr must be contiguous */ + + unsigned int pad; + unsigned int val; /* Floating point status */ + } fpscr; + int fpexc_mode; /* floating-point exception mode */ +#ifdef CONFIG_PPC64 + unsigned long start_tb; /* Start purr when proc switched in */ + unsigned long accum_tb; /* Total accumilated purr for process */ +#endif + unsigned long vdso_base; /* base of the vDSO library */ + unsigned long dabr; /* Data address breakpoint register */ +#ifdef CONFIG_ALTIVEC + /* Complete AltiVec register set */ + vector128 vr[32] __attribute((aligned(16))); + /* AltiVec status */ + vector128 vscr __attribute((aligned(16))); + unsigned long vrsave; + int used_vr; /* set if process has used altivec */ +#endif /* CONFIG_ALTIVEC */ +#ifdef CONFIG_SPE + unsigned long evr[32]; /* upper 32-bits of SPE regs */ + u64 acc; /* Accumulator */ + unsigned long spefscr; /* SPE & eFP status */ + int used_spe; /* set if process has used spe */ +#endif /* CONFIG_SPE */ +}; + +#define ARCH_MIN_TASKALIGN 16 + +#define INIT_SP (sizeof(init_stack) + (unsigned long) &init_stack) + + +#ifdef CONFIG_PPC32 +#define INIT_THREAD { \ + .ksp = INIT_SP, \ + .fs = KERNEL_DS, \ + .pgdir = swapper_pg_dir, \ + .fpexc_mode = MSR_FE0 | MSR_FE1, \ +} +#else +#define INIT_THREAD { \ + .ksp = INIT_SP, \ + .regs = (struct pt_regs *)INIT_SP - 1, /* XXX bogus, I think */ \ + .fs = KERNEL_DS, \ + .fpr = {0}, \ + .fpscr = { .val = 0, }, \ + .fpexc_mode = MSR_FE0|MSR_FE1, \ +} +#endif + +/* + * Return saved PC of a blocked thread. For now, this is the "user" PC + */ +#define thread_saved_pc(tsk) \ + ((tsk)->thread.regs? (tsk)->thread.regs->nip: 0) + +unsigned long get_wchan(struct task_struct *p); + +#define KSTK_EIP(tsk) ((tsk)->thread.regs? (tsk)->thread.regs->nip: 0) +#define KSTK_ESP(tsk) ((tsk)->thread.regs? (tsk)->thread.regs->gpr[1]: 0) + +/* Get/set floating-point exception mode */ +#define GET_FPEXC_CTL(tsk, adr) get_fpexc_mode((tsk), (adr)) +#define SET_FPEXC_CTL(tsk, val) set_fpexc_mode((tsk), (val)) + +extern int get_fpexc_mode(struct task_struct *tsk, unsigned long adr); +extern int set_fpexc_mode(struct task_struct *tsk, unsigned int val); + +static inline unsigned int __unpack_fe01(unsigned long msr_bits) +{ + return ((msr_bits & MSR_FE0) >> 10) | ((msr_bits & MSR_FE1) >> 8); +} + +static inline unsigned long __pack_fe01(unsigned int fpmode) +{ + return ((fpmode << 10) & MSR_FE0) | ((fpmode << 8) & MSR_FE1); +} + +#ifdef CONFIG_PPC64 +#define cpu_relax() do { HMT_low(); HMT_medium(); barrier(); } while (0) +#else +#define cpu_relax() barrier() +#endif + +/* + * Prefetch macros. + */ +#define ARCH_HAS_PREFETCH +#define ARCH_HAS_PREFETCHW +#define ARCH_HAS_SPINLOCK_PREFETCH + +static inline void prefetch(const void *x) +{ + if (unlikely(!x)) + return; + + __asm__ __volatile__ ("dcbt 0,%0" : : "r" (x)); +} + +static inline void prefetchw(const void *x) +{ + if (unlikely(!x)) + return; + + __asm__ __volatile__ ("dcbtst 0,%0" : : "r" (x)); +} + +#define spin_lock_prefetch(x) prefetchw(x) + +#ifdef CONFIG_PPC64 +#define HAVE_ARCH_PICK_MMAP_LAYOUT +#endif + +#endif /* __KERNEL__ */ +#endif /* __ASSEMBLY__ */ +#endif /* _ASM_POWERPC_PROCESSOR_H */ diff --git a/include/asm-ppc64/prom.h b/include/asm-powerpc/prom.h index c02ec1d6b909..f999df1c5c90 100644 --- a/include/asm-ppc64/prom.h +++ b/include/asm-powerpc/prom.h @@ -1,11 +1,12 @@ -#ifndef _PPC64_PROM_H -#define _PPC64_PROM_H +#ifndef _POWERPC_PROM_H +#define _POWERPC_PROM_H +#ifdef __KERNEL__ /* * Definitions for talking to the Open Firmware PROM on * Power Macintosh computers. * - * Copyright (C) 1996 Paul Mackerras. + * Copyright (C) 1996-2005 Paul Mackerras. * * Updates for PPC64 by Peter Bergner & David Engebretsen, IBM Corp. * @@ -14,13 +15,11 @@ * as published by the Free Software Foundation; either version * 2 of the License, or (at your option) any later version. */ +#include <linux/config.h> +#include <linux/types.h> #include <linux/proc_fs.h> #include <asm/atomic.h> -#define PTRRELOC(x) ((typeof(x))((unsigned long)(x) - offset)) -#define PTRUNRELOC(x) ((typeof(x))((unsigned long)(x) + offset)) -#define RELOC(x) (*PTRRELOC(&(x))) - /* Definitions used by the flattened device tree */ #define OF_DT_HEADER 0xd00dfeed /* marker */ #define OF_DT_BEGIN_NODE 0x1 /* Start of node, full name */ @@ -105,8 +104,8 @@ struct reg_property32 { }; struct reg_property64 { - unsigned long address; - unsigned long size; + u64 address; + u64 size; }; struct property { @@ -147,11 +146,6 @@ extern struct device_node *of_chosen; #define OF_IS_DYNAMIC(x) test_bit(OF_DYNAMIC, &x->_flags) #define OF_MARK_DYNAMIC(x) set_bit(OF_DYNAMIC, &x->_flags) -/* - * Until 32-bit ppc can add proc_dir_entries to its device_node - * definition, we cannot refer to pde, name_link, and addr_link - * in arch-independent code. - */ #define HAVE_ARCH_DEVTREE_FIXUPS static inline void set_node_proc_entry(struct device_node *dn, struct proc_dir_entry *de) @@ -160,7 +154,7 @@ static inline void set_node_proc_entry(struct device_node *dn, struct proc_dir_e } -/* OBSOLETE: Old stlye node lookup */ +/* OBSOLETE: Old style node lookup */ extern struct device_node *find_devices(const char *name); extern struct device_node *find_type_devices(const char *type); extern struct device_node *find_path_device(const char *path); @@ -184,14 +178,22 @@ extern struct device_node *of_get_next_child(const struct device_node *node, extern struct device_node *of_node_get(struct device_node *node); extern void of_node_put(struct device_node *node); +/* For scanning the flat device-tree at boot time */ +int __init of_scan_flat_dt(int (*it)(unsigned long node, + const char *uname, int depth, + void *data), + void *data); +void* __init of_get_flat_dt_prop(unsigned long node, const char *name, + unsigned long *size); + /* For updating the device tree at runtime */ extern void of_attach_node(struct device_node *); extern void of_detach_node(const struct device_node *); /* Other Prototypes */ -extern unsigned long prom_init(unsigned long, unsigned long, unsigned long, - unsigned long, unsigned long); extern void finish_device_tree(void); +extern void unflatten_device_tree(void); +extern void early_init_devtree(void *); extern int device_is_compatible(struct device_node *device, const char *); extern int machine_is_compatible(const char *compat); extern unsigned char *get_property(struct device_node *node, const char *name, @@ -201,6 +203,25 @@ extern int prom_n_addr_cells(struct device_node* np); extern int prom_n_size_cells(struct device_node* np); extern int prom_n_intr_cells(struct device_node* np); extern void prom_get_irq_senses(unsigned char *senses, int off, int max); -extern void prom_add_property(struct device_node* np, struct property* prop); +extern int prom_add_property(struct device_node* np, struct property* prop); -#endif /* _PPC64_PROM_H */ +#ifdef CONFIG_PPC32 +/* + * PCI <-> OF matching functions + * (XXX should these be here?) + */ +struct pci_bus; +struct pci_dev; +extern int pci_device_from_OF_node(struct device_node *node, + u8* bus, u8* devfn); +extern struct device_node* pci_busdev_to_OF_node(struct pci_bus *, int); +extern struct device_node* pci_device_to_OF_node(struct pci_dev *); +extern void pci_create_OF_bus_map(void); +#endif + +extern struct resource *request_OF_resource(struct device_node* node, + int index, const char* name_postfix); +extern int release_OF_resource(struct device_node* node, int index); + +#endif /* __KERNEL__ */ +#endif /* _POWERPC_PROM_H */ diff --git a/include/asm-ppc64/ptrace.h b/include/asm-powerpc/ptrace.h index 3a55377f1fd3..1f7ecdb0b6ce 100644 --- a/include/asm-ppc64/ptrace.h +++ b/include/asm-powerpc/ptrace.h @@ -1,5 +1,5 @@ -#ifndef _PPC64_PTRACE_H -#define _PPC64_PTRACE_H +#ifndef _ASM_POWERPC_PTRACE_H +#define _ASM_POWERPC_PTRACE_H /* * Copyright (C) 2001 PPC64 Team, IBM Corp @@ -16,7 +16,7 @@ * that the overall structure is a multiple of 16 bytes in length. * * Note that the offsets of the fields in this struct correspond with - * the PT_* values below. This simplifies arch/ppc64/kernel/ptrace.c. + * the PT_* values below. This simplifies arch/powerpc/kernel/ptrace.c. * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License @@ -30,70 +30,96 @@ struct pt_regs { unsigned long gpr[32]; unsigned long nip; unsigned long msr; - unsigned long orig_gpr3; /* Used for restarting system calls */ + unsigned long orig_gpr3; /* Used for restarting system calls */ unsigned long ctr; unsigned long link; unsigned long xer; unsigned long ccr; - unsigned long softe; /* Soft enabled/disabled */ - unsigned long trap; /* Reason for being here */ - unsigned long dar; /* Fault registers */ - unsigned long dsisr; - unsigned long result; /* Result of a system call */ +#ifdef __powerpc64__ + unsigned long softe; /* Soft enabled/disabled */ +#else + unsigned long mq; /* 601 only (not used at present) */ + /* Used on APUS to hold IPL value. */ +#endif + unsigned long trap; /* Reason for being here */ + /* N.B. for critical exceptions on 4xx, the dar and dsisr + fields are overloaded to hold srr0 and srr1. */ + unsigned long dar; /* Fault registers */ + unsigned long dsisr; /* on 4xx/Book-E used for ESR */ + unsigned long result; /* Result of a system call */ }; -struct pt_regs32 { - unsigned int gpr[32]; - unsigned int nip; - unsigned int msr; - unsigned int orig_gpr3; /* Used for restarting system calls */ - unsigned int ctr; - unsigned int link; - unsigned int xer; - unsigned int ccr; - unsigned int mq; /* 601 only (not used at present) */ - unsigned int trap; /* Reason for being here */ - unsigned int dar; /* Fault registers */ - unsigned int dsisr; - unsigned int result; /* Result of a system call */ -}; +#endif /* __ASSEMBLY__ */ #ifdef __KERNEL__ -#define instruction_pointer(regs) ((regs)->nip) +#ifdef __powerpc64__ + +#define STACK_FRAME_OVERHEAD 112 /* size of minimum stack frame */ + +/* Size of dummy stack frame allocated when calling signal handler. */ +#define __SIGNAL_FRAMESIZE 128 +#define __SIGNAL_FRAMESIZE32 64 + +#else /* __powerpc64__ */ + +#define STACK_FRAME_OVERHEAD 16 /* size of minimum stack frame */ + +/* Size of stack frame allocated when calling signal handler. */ +#define __SIGNAL_FRAMESIZE 64 + +#endif /* __powerpc64__ */ +#ifndef __ASSEMBLY__ + +#define instruction_pointer(regs) ((regs)->nip) #ifdef CONFIG_SMP extern unsigned long profile_pc(struct pt_regs *regs); #else #define profile_pc(regs) instruction_pointer(regs) #endif +#ifdef __powerpc64__ #define user_mode(regs) ((((regs)->msr) >> MSR_PR_LG) & 0x1) +#else +#define user_mode(regs) (((regs)->msr & MSR_PR) != 0) +#endif #define force_successful_syscall_return() \ - (current_thread_info()->syscall_noerror = 1) + do { \ + current_thread_info()->syscall_noerror = 1; \ + } while(0) /* * We use the least-significant bit of the trap field to indicate * whether we have saved the full set of registers, or only a * partial set. A 1 there means the partial set. + * On 4xx we use the next bit to indicate whether the exception + * is a critical exception (1 means it is). */ #define FULL_REGS(regs) (((regs)->trap & 1) == 0) +#ifndef __powerpc64__ +#define IS_CRITICAL_EXC(regs) (((regs)->trap & 2) == 0) +#endif /* ! __powerpc64__ */ #define TRAP(regs) ((regs)->trap & ~0xF) +#ifdef __powerpc64__ #define CHECK_FULL_REGS(regs) BUG_ON(regs->trap & 1) - -#endif /* __KERNEL__ */ +#else +#define CHECK_FULL_REGS(regs) \ +do { \ + if ((regs)->trap & 1) \ + printk(KERN_CRIT "%s: partial register set\n", __FUNCTION__); \ +} while (0) +#endif /* __powerpc64__ */ #endif /* __ASSEMBLY__ */ -#define STACK_FRAME_OVERHEAD 112 /* size of minimum stack frame */ - -/* Size of dummy stack frame allocated when calling signal handler. */ -#define __SIGNAL_FRAMESIZE 128 -#define __SIGNAL_FRAMESIZE32 64 +#endif /* __KERNEL__ */ /* * Offsets used by 'ptrace' system call interface. + * These can't be changed without breaking binary compatibility + * with MkLinux, etc. */ #define PT_R0 0 #define PT_R1 1 @@ -137,18 +163,25 @@ extern unsigned long profile_pc(struct pt_regs *regs); #define PT_LNK 36 #define PT_XER 37 #define PT_CCR 38 +#ifndef __powerpc64__ +#define PT_MQ 39 +#else #define PT_SOFTE 39 #define PT_TRAP 40 #define PT_DAR 41 #define PT_DSISR 42 #define PT_RESULT 43 +#endif -#define PT_FPR0 48 +#define PT_FPR0 48 /* each FP reg occupies 2 slots in this space */ + +#ifndef __powerpc64__ + +#define PT_FPR31 (PT_FPR0 + 2*31) +#define PT_FPSCR (PT_FPR0 + 2*32 + 1) + +#else /* __powerpc64__ */ -/* - * Kernel and userspace will both use this PT_FPSCR value. 32-bit apps will - * have visibility to the asm-ppc/ptrace.h header instead of this one. - */ #define PT_FPSCR (PT_FPR0 + 32) /* each FP reg occupies 1 slot in 64-bit space */ #ifdef __KERNEL__ @@ -165,29 +198,29 @@ extern unsigned long profile_pc(struct pt_regs *regs); #define PT_VRSAVE_32 (PT_VR0 + 33*4) #endif +#endif /* __powerpc64__ */ + /* - * Get/set all the altivec registers vr0..vr31, vscr, vrsave, in one go. - * The transfer totals 34 quadword. Quadwords 0-31 contain the - * corresponding vector registers. Quadword 32 contains the vscr as the - * last word (offset 12) within that quadword. Quadword 33 contains the + * Get/set all the altivec registers vr0..vr31, vscr, vrsave, in one go. + * The transfer totals 34 quadword. Quadwords 0-31 contain the + * corresponding vector registers. Quadword 32 contains the vscr as the + * last word (offset 12) within that quadword. Quadword 33 contains the * vrsave as the first word (offset 0) within the quadword. * - * This definition of the VMX state is compatible with the current PPC32 - * ptrace interface. This allows signal handling and ptrace to use the same - * structures. This also simplifies the implementation of a bi-arch + * This definition of the VMX state is compatible with the current PPC32 + * ptrace interface. This allows signal handling and ptrace to use the same + * structures. This also simplifies the implementation of a bi-arch * (combined (32- and 64-bit) gdb. */ #define PTRACE_GETVRREGS 18 #define PTRACE_SETVRREGS 19 -/* - * While we dont have 64bit book E processors, we need to reserve the - * relevant ptrace calls for 32bit compatibility. - */ -#if 0 -#define PTRACE_GETEVRREGS 20 -#define PTRACE_SETEVRREGS 21 -#endif +#ifndef __powerpc64__ +/* Get/set all the upper 32-bits of the SPE registers, accumulator, and + * spefscr, in one go */ +#define PTRACE_GETEVRREGS 20 +#define PTRACE_SETEVRREGS 21 +#endif /* __powerpc64__ */ /* * Get or set a debug register. The first 16 are DABR registers and the @@ -196,6 +229,7 @@ extern unsigned long profile_pc(struct pt_regs *regs); #define PTRACE_GET_DEBUGREG 25 #define PTRACE_SET_DEBUGREG 26 +#ifdef __powerpc64__ /* Additional PTRACE requests implemented on PowerPC. */ #define PPC_PTRACE_GETREGS 0x99 /* Get GPRs 0 - 31 */ #define PPC_PTRACE_SETREGS 0x98 /* Set GPRs 0 - 31 */ @@ -209,5 +243,6 @@ extern unsigned long profile_pc(struct pt_regs *regs); #define PPC_PTRACE_POKEDATA_3264 0x92 #define PPC_PTRACE_PEEKUSR_3264 0x91 #define PPC_PTRACE_POKEUSR_3264 0x90 +#endif /* __powerpc64__ */ -#endif /* _PPC64_PTRACE_H */ +#endif /* _ASM_POWERPC_PTRACE_H */ diff --git a/include/asm-ppc/reg.h b/include/asm-powerpc/reg.h index 73c33e3ef9c6..eb392d038ed7 100644 --- a/include/asm-ppc/reg.h +++ b/include/asm-powerpc/reg.h @@ -6,53 +6,111 @@ * Implementations of the PowerPC Architecture (a.k.a. Green Book) here. */ +#ifndef _ASM_POWERPC_REG_H +#define _ASM_POWERPC_REG_H #ifdef __KERNEL__ -#ifndef __ASM_PPC_REGS_H__ -#define __ASM_PPC_REGS_H__ #include <linux/stringify.h> +#include <asm/cputable.h> /* Pickup Book E specific registers. */ #if defined(CONFIG_BOOKE) || defined(CONFIG_40x) #include <asm/reg_booke.h> +#endif /* CONFIG_BOOKE || CONFIG_40x */ + +#ifdef CONFIG_8xx +#include <asm/reg_8xx.h> +#endif /* CONFIG_8xx */ + +#define MSR_SF_LG 63 /* Enable 64 bit mode */ +#define MSR_ISF_LG 61 /* Interrupt 64b mode valid on 630 */ +#define MSR_HV_LG 60 /* Hypervisor state */ +#define MSR_VEC_LG 25 /* Enable AltiVec */ +#define MSR_POW_LG 18 /* Enable Power Management */ +#define MSR_WE_LG 18 /* Wait State Enable */ +#define MSR_TGPR_LG 17 /* TLB Update registers in use */ +#define MSR_CE_LG 17 /* Critical Interrupt Enable */ +#define MSR_ILE_LG 16 /* Interrupt Little Endian */ +#define MSR_EE_LG 15 /* External Interrupt Enable */ +#define MSR_PR_LG 14 /* Problem State / Privilege Level */ +#define MSR_FP_LG 13 /* Floating Point enable */ +#define MSR_ME_LG 12 /* Machine Check Enable */ +#define MSR_FE0_LG 11 /* Floating Exception mode 0 */ +#define MSR_SE_LG 10 /* Single Step */ +#define MSR_BE_LG 9 /* Branch Trace */ +#define MSR_DE_LG 9 /* Debug Exception Enable */ +#define MSR_FE1_LG 8 /* Floating Exception mode 1 */ +#define MSR_IP_LG 6 /* Exception prefix 0x000/0xFFF */ +#define MSR_IR_LG 5 /* Instruction Relocate */ +#define MSR_DR_LG 4 /* Data Relocate */ +#define MSR_PE_LG 3 /* Protection Enable */ +#define MSR_PX_LG 2 /* Protection Exclusive Mode */ +#define MSR_PMM_LG 2 /* Performance monitor */ +#define MSR_RI_LG 1 /* Recoverable Exception */ +#define MSR_LE_LG 0 /* Little Endian */ + +#ifdef __ASSEMBLY__ +#define __MASK(X) (1<<(X)) +#else +#define __MASK(X) (1UL<<(X)) +#endif + +#ifdef CONFIG_PPC64 +#define MSR_SF __MASK(MSR_SF_LG) /* Enable 64 bit mode */ +#define MSR_ISF __MASK(MSR_ISF_LG) /* Interrupt 64b mode valid on 630 */ +#define MSR_HV __MASK(MSR_HV_LG) /* Hypervisor state */ +#else +/* so tests for these bits fail on 32-bit */ +#define MSR_SF 0 +#define MSR_ISF 0 +#define MSR_HV 0 +#endif + +#define MSR_VEC __MASK(MSR_VEC_LG) /* Enable AltiVec */ +#define MSR_POW __MASK(MSR_POW_LG) /* Enable Power Management */ +#define MSR_WE __MASK(MSR_WE_LG) /* Wait State Enable */ +#define MSR_TGPR __MASK(MSR_TGPR_LG) /* TLB Update registers in use */ +#define MSR_CE __MASK(MSR_CE_LG) /* Critical Interrupt Enable */ +#define MSR_ILE __MASK(MSR_ILE_LG) /* Interrupt Little Endian */ +#define MSR_EE __MASK(MSR_EE_LG) /* External Interrupt Enable */ +#define MSR_PR __MASK(MSR_PR_LG) /* Problem State / Privilege Level */ +#define MSR_FP __MASK(MSR_FP_LG) /* Floating Point enable */ +#define MSR_ME __MASK(MSR_ME_LG) /* Machine Check Enable */ +#define MSR_FE0 __MASK(MSR_FE0_LG) /* Floating Exception mode 0 */ +#define MSR_SE __MASK(MSR_SE_LG) /* Single Step */ +#define MSR_BE __MASK(MSR_BE_LG) /* Branch Trace */ +#define MSR_DE __MASK(MSR_DE_LG) /* Debug Exception Enable */ +#define MSR_FE1 __MASK(MSR_FE1_LG) /* Floating Exception mode 1 */ +#define MSR_IP __MASK(MSR_IP_LG) /* Exception prefix 0x000/0xFFF */ +#define MSR_IR __MASK(MSR_IR_LG) /* Instruction Relocate */ +#define MSR_DR __MASK(MSR_DR_LG) /* Data Relocate */ +#define MSR_PE __MASK(MSR_PE_LG) /* Protection Enable */ +#define MSR_PX __MASK(MSR_PX_LG) /* Protection Exclusive Mode */ +#ifndef MSR_PMM +#define MSR_PMM __MASK(MSR_PMM_LG) /* Performance monitor */ #endif +#define MSR_RI __MASK(MSR_RI_LG) /* Recoverable Exception */ +#define MSR_LE __MASK(MSR_LE_LG) /* Little Endian */ -/* Machine State Register (MSR) Fields */ -#define MSR_SF (1<<63) -#define MSR_ISF (1<<61) -#define MSR_VEC (1<<25) /* Enable AltiVec */ -#define MSR_POW (1<<18) /* Enable Power Management */ -#define MSR_WE (1<<18) /* Wait State Enable */ -#define MSR_TGPR (1<<17) /* TLB Update registers in use */ -#define MSR_CE (1<<17) /* Critical Interrupt Enable */ -#define MSR_ILE (1<<16) /* Interrupt Little Endian */ -#define MSR_EE (1<<15) /* External Interrupt Enable */ -#define MSR_PR (1<<14) /* Problem State / Privilege Level */ -#define MSR_FP (1<<13) /* Floating Point enable */ -#define MSR_ME (1<<12) /* Machine Check Enable */ -#define MSR_FE0 (1<<11) /* Floating Exception mode 0 */ -#define MSR_SE (1<<10) /* Single Step */ -#define MSR_BE (1<<9) /* Branch Trace */ -#define MSR_DE (1<<9) /* Debug Exception Enable */ -#define MSR_FE1 (1<<8) /* Floating Exception mode 1 */ -#define MSR_IP (1<<6) /* Exception prefix 0x000/0xFFF */ -#define MSR_IR (1<<5) /* Instruction Relocate */ -#define MSR_DR (1<<4) /* Data Relocate */ -#define MSR_PE (1<<3) /* Protection Enable */ -#define MSR_PX (1<<2) /* Protection Exclusive Mode */ -#define MSR_RI (1<<1) /* Recoverable Exception */ -#define MSR_LE (1<<0) /* Little Endian */ +#ifdef CONFIG_PPC64 +#define MSR_ MSR_ME | MSR_RI | MSR_IR | MSR_DR | MSR_ISF +#define MSR_KERNEL MSR_ | MSR_SF | MSR_HV +#define MSR_USER32 MSR_ | MSR_PR | MSR_EE +#define MSR_USER64 MSR_USER32 | MSR_SF + +#else /* 32-bit */ /* Default MSR for kernel mode. */ +#ifndef MSR_KERNEL /* reg_booke.h also defines this */ #ifdef CONFIG_APUS_FAST_EXCEPT #define MSR_KERNEL (MSR_ME|MSR_IP|MSR_RI|MSR_IR|MSR_DR) -#endif - -#ifndef MSR_KERNEL +#else #define MSR_KERNEL (MSR_ME|MSR_RI|MSR_IR|MSR_DR) #endif +#endif #define MSR_USER (MSR_KERNEL|MSR_PR|MSR_EE) +#endif /* Floating Point Status and Control Register (FPSCR) Fields */ #define FPSCR_FX 0x80000000 /* FPU exception summary */ @@ -60,7 +118,7 @@ #define FPSCR_VX 0x20000000 /* Invalid operation summary */ #define FPSCR_OX 0x10000000 /* Overflow exception summary */ #define FPSCR_UX 0x08000000 /* Underflow exception summary */ -#define FPSCR_ZX 0x04000000 /* Zero-devide exception summary */ +#define FPSCR_ZX 0x04000000 /* Zero-divide exception summary */ #define FPSCR_XX 0x02000000 /* Inexact exception summary */ #define FPSCR_VXSNAN 0x01000000 /* Invalid op for SNaN */ #define FPSCR_VXISI 0x00800000 /* Invalid op for Inv - Inv */ @@ -85,8 +143,18 @@ /* Special Purpose Registers (SPRNs)*/ #define SPRN_CTR 0x009 /* Count Register */ +#define SPRN_CTRLF 0x088 +#define SPRN_CTRLT 0x098 +#define CTRL_RUNLATCH 0x1 #define SPRN_DABR 0x3F5 /* Data Address Breakpoint Register */ +#define DABR_TRANSLATION (1UL << 2) #define SPRN_DAR 0x013 /* Data Address Register */ +#define SPRN_DSISR 0x012 /* Data Storage Interrupt Status Register */ +#define DSISR_NOHPTE 0x40000000 /* no translation found */ +#define DSISR_PROTFAULT 0x08000000 /* protection fault */ +#define DSISR_ISSTORE 0x02000000 /* access was a store */ +#define DSISR_DABRMATCH 0x00400000 /* hit data breakpoint */ +#define DSISR_NOSEGMENT 0x00200000 /* STAB/SLB miss */ #define SPRN_TBRL 0x10C /* Time Base Read Lower Register (user, R/O) */ #define SPRN_TBRU 0x10D /* Time Base Read Upper Register (user, R/O) */ #define SPRN_TBWL 0x11C /* Time Base Lower Register (super, R/W) */ @@ -131,7 +199,6 @@ #define DER_EBRKE 0x00000002 /* External Breakpoint Interrupt */ #define DER_DPIE 0x00000001 /* Dev. Port Nonmaskable Request */ #define SPRN_DMISS 0x3D0 /* Data TLB Miss Register */ -#define SPRN_DSISR 0x012 /* Data Storage Interrupt Status Register */ #define SPRN_EAR 0x11A /* External Address Register */ #define SPRN_HASH1 0x3D2 /* Primary Hash Address Register */ #define SPRN_HASH2 0x3D3 /* Secondary Hash Address Resgister */ @@ -187,6 +254,16 @@ #define SPRN_IABR 0x3F2 /* Instruction Address Breakpoint Register */ #define SPRN_HID4 0x3F4 /* 970 HID4 */ #define SPRN_HID5 0x3F6 /* 970 HID5 */ +#define SPRN_HID6 0x3F9 /* BE HID 6 */ +#define HID6_LB (0x0F<<12) /* Concurrent Large Page Modes */ +#define HID6_DLP (1<<20) /* Disable all large page modes (4K only) */ +#define SPRN_TSCR 0x399 /* Thread switch control on BE */ +#define SPRN_TTR 0x39A /* Thread switch timeout on BE */ +#define TSCR_DEC_ENABLE 0x200000 /* Decrementer Interrupt */ +#define TSCR_EE_ENABLE 0x100000 /* External Interrupt */ +#define TSCR_EE_BOOST 0x080000 /* External Interrupt Boost */ +#define SPRN_TSC 0x3FD /* Thread switch control on others */ +#define SPRN_TST 0x3FC /* Thread switch timeout on others */ #if !defined(SPRN_IAC1) && !defined(SPRN_IAC2) #define SPRN_IAC1 0x3F4 /* Instruction Address Compare 1 */ #define SPRN_IAC2 0x3F5 /* Instruction Address Compare 2 */ @@ -270,26 +347,23 @@ #define L3CR_L3DO 0x00000040 /* L3 data only mode */ #define L3CR_PMEN 0x00000004 /* L3 private memory enable */ #define L3CR_PMSIZ 0x00000001 /* L3 private memory size */ + #define SPRN_MSSCR0 0x3f6 /* Memory Subsystem Control Register 0 */ #define SPRN_MSSSR0 0x3f7 /* Memory Subsystem Status Register 1 */ #define SPRN_LDSTCR 0x3f8 /* Load/Store control register */ #define SPRN_LDSTDB 0x3f4 /* */ #define SPRN_LR 0x008 /* Link Register */ -#define SPRN_MMCR0 0x3B8 /* Monitor Mode Control Register 0 */ -#define SPRN_MMCR1 0x3BC /* Monitor Mode Control Register 1 */ #ifndef SPRN_PIR #define SPRN_PIR 0x3FF /* Processor Identification Register */ #endif -#define SPRN_PMC1 0x3B9 /* Performance Counter Register 1 */ -#define SPRN_PMC2 0x3BA /* Performance Counter Register 2 */ -#define SPRN_PMC3 0x3BD /* Performance Counter Register 3 */ -#define SPRN_PMC4 0x3BE /* Performance Counter Register 4 */ #define SPRN_PTEHI 0x3D5 /* 981 7450 PTE HI word (S/W TLB load) */ #define SPRN_PTELO 0x3D6 /* 982 7450 PTE LO word (S/W TLB load) */ +#define SPRN_PURR 0x135 /* Processor Utilization of Resources Reg */ #define SPRN_PVR 0x11F /* Processor Version Register */ #define SPRN_RPA 0x3D6 /* Required Physical Address Register */ #define SPRN_SDA 0x3BF /* Sampled Data Address Register */ #define SPRN_SDR1 0x019 /* MMU Hash Base Register */ +#define SPRN_ASR 0x118 /* Address Space Register */ #define SPRN_SIA 0x3BB /* Sampled Instruction Address Register */ #define SPRN_SPRG0 0x110 /* Special Purpose Register General 0 */ #define SPRN_SPRG1 0x111 /* Special Purpose Register General 1 */ @@ -327,6 +401,55 @@ #define SPRN_VRSAVE 0x100 /* Vector Register Save Register */ #define SPRN_XER 0x001 /* Fixed Point Exception Register */ +#define SPRN_SCOMC 0x114 /* SCOM Access Control */ +#define SPRN_SCOMD 0x115 /* SCOM Access DATA */ + +/* Performance monitor SPRs */ +#ifdef CONFIG_PPC64 +#define SPRN_MMCR0 795 +#define MMCR0_FC 0x80000000UL /* freeze counters */ +#define MMCR0_FCS 0x40000000UL /* freeze in supervisor state */ +#define MMCR0_KERNEL_DISABLE MMCR0_FCS +#define MMCR0_FCP 0x20000000UL /* freeze in problem state */ +#define MMCR0_PROBLEM_DISABLE MMCR0_FCP +#define MMCR0_FCM1 0x10000000UL /* freeze counters while MSR mark = 1 */ +#define MMCR0_FCM0 0x08000000UL /* freeze counters while MSR mark = 0 */ +#define MMCR0_PMXE 0x04000000UL /* performance monitor exception enable */ +#define MMCR0_FCECE 0x02000000UL /* freeze ctrs on enabled cond or event */ +#define MMCR0_TBEE 0x00400000UL /* time base exception enable */ +#define MMCR0_PMC1CE 0x00008000UL /* PMC1 count enable*/ +#define MMCR0_PMCjCE 0x00004000UL /* PMCj count enable*/ +#define MMCR0_TRIGGER 0x00002000UL /* TRIGGER enable */ +#define MMCR0_PMAO 0x00000080UL /* performance monitor alert has occurred, set to 0 after handling exception */ +#define MMCR0_SHRFC 0x00000040UL /* SHRre freeze conditions between threads */ +#define MMCR0_FCTI 0x00000008UL /* freeze counters in tags inactive mode */ +#define MMCR0_FCTA 0x00000004UL /* freeze counters in tags active mode */ +#define MMCR0_FCWAIT 0x00000002UL /* freeze counter in WAIT state */ +#define MMCR0_FCHV 0x00000001UL /* freeze conditions in hypervisor mode */ +#define SPRN_MMCR1 798 +#define SPRN_MMCRA 0x312 +#define MMCRA_SIHV 0x10000000UL /* state of MSR HV when SIAR set */ +#define MMCRA_SIPR 0x08000000UL /* state of MSR PR when SIAR set */ +#define MMCRA_SAMPLE_ENABLE 0x00000001UL /* enable sampling */ +#define SPRN_PMC1 787 +#define SPRN_PMC2 788 +#define SPRN_PMC3 789 +#define SPRN_PMC4 790 +#define SPRN_PMC5 791 +#define SPRN_PMC6 792 +#define SPRN_PMC7 793 +#define SPRN_PMC8 794 +#define SPRN_SIAR 780 +#define SPRN_SDAR 781 + +#else /* 32-bit */ +#define SPRN_MMCR0 0x3B8 /* Monitor Mode Control Register 0 */ +#define SPRN_MMCR1 0x3BC /* Monitor Mode Control Register 1 */ +#define SPRN_PMC1 0x3B9 /* Performance Counter Register 1 */ +#define SPRN_PMC2 0x3BA /* Performance Counter Register 2 */ +#define SPRN_PMC3 0x3BD /* Performance Counter Register 3 */ +#define SPRN_PMC4 0x3BE /* Performance Counter Register 4 */ + /* Bit definitions for MMCR0 and PMC1 / PMC2. */ #define MMCR0_PMC1_CYCLES (1 << 7) #define MMCR0_PMC1_ICACHEMISS (5 << 7) @@ -336,14 +459,15 @@ #define MMCR0_PMC2_ITLB 0x7 #define MMCR0_PMC2_LOADMISSTIME 0x5 #define MMCR0_PMXE (1 << 26) - -/* Processor Version Register */ +#endif /* Processor Version Register (PVR) field extraction */ #define PVR_VER(pvr) (((pvr) >> 16) & 0xFFFF) /* Version field */ #define PVR_REV(pvr) (((pvr) >> 0) & 0xFFFF) /* Revison field */ +#define __is_processor(pv) (PVR_VER(mfspr(SPRN_PVR)) == (pv)) + /* * IBM has further subdivided the standard PowerPC 16-bit version and * revision subfields of the PVR for the PowerPC 403s into the following: @@ -399,42 +523,103 @@ #define PVR_8245 0x80811014 #define PVR_8260 PVR_8240 -#if 0 -/* Segment Registers */ -#define SR0 0 -#define SR1 1 -#define SR2 2 -#define SR3 3 -#define SR4 4 -#define SR5 5 -#define SR6 6 -#define SR7 7 -#define SR8 8 -#define SR9 9 -#define SR10 10 -#define SR11 11 -#define SR12 12 -#define SR13 13 -#define SR14 14 -#define SR15 15 -#endif +/* 64-bit processors */ +/* XXX the prefix should be PVR_, we'll do a global sweep to fix it one day */ +#define PV_NORTHSTAR 0x0033 +#define PV_PULSAR 0x0034 +#define PV_POWER4 0x0035 +#define PV_ICESTAR 0x0036 +#define PV_SSTAR 0x0037 +#define PV_POWER4p 0x0038 +#define PV_970 0x0039 +#define PV_POWER5 0x003A +#define PV_POWER5p 0x003B +#define PV_970FX 0x003C +#define PV_630 0x0040 +#define PV_630p 0x0041 +#define PV_970MP 0x0044 +#define PV_BE 0x0070 + +/* + * Number of entries in the SLB. If this ever changes we should handle + * it with a use a cpu feature fixup. + */ +#define SLB_NUM_ENTRIES 64 /* Macros for setting and retrieving special purpose registers */ #ifndef __ASSEMBLY__ -#define mfmsr() ({unsigned int rval; \ +#define mfmsr() ({unsigned long rval; \ asm volatile("mfmsr %0" : "=r" (rval)); rval;}) +#ifdef CONFIG_PPC64 +#define __mtmsrd(v, l) asm volatile("mtmsrd %0," __stringify(l) \ + : : "r" (v)) +#define mtmsrd(v) __mtmsrd((v), 0) +#define mtmsr(v) mtmsrd(v) +#else #define mtmsr(v) asm volatile("mtmsr %0" : : "r" (v)) +#endif -#define mfspr(rn) ({unsigned int rval; \ +#define mfspr(rn) ({unsigned long rval; \ asm volatile("mfspr %0," __stringify(rn) \ : "=r" (rval)); rval;}) #define mtspr(rn, v) asm volatile("mtspr " __stringify(rn) ",%0" : : "r" (v)) +#define mftb() ({unsigned long rval; \ + asm volatile("mftb %0" : "=r" (rval)); rval;}) +#define mftbl() ({unsigned long rval; \ + asm volatile("mftbl %0" : "=r" (rval)); rval;}) + +#define mttbl(v) asm volatile("mttbl %0":: "r"(v)) +#define mttbu(v) asm volatile("mttbu %0":: "r"(v)) + +#ifdef CONFIG_PPC32 #define mfsrin(v) ({unsigned int rval; \ asm volatile("mfsrin %0,%1" : "=r" (rval) : "r" (v)); \ rval;}) +#endif #define proc_trap() asm volatile("trap") + +#ifdef CONFIG_PPC64 +static inline void ppc64_runlatch_on(void) +{ + unsigned long ctrl; + + if (cpu_has_feature(CPU_FTR_CTRL)) { + ctrl = mfspr(SPRN_CTRLF); + ctrl |= CTRL_RUNLATCH; + mtspr(SPRN_CTRLT, ctrl); + } +} + +static inline void ppc64_runlatch_off(void) +{ + unsigned long ctrl; + + if (cpu_has_feature(CPU_FTR_CTRL)) { + ctrl = mfspr(SPRN_CTRLF); + ctrl &= ~CTRL_RUNLATCH; + mtspr(SPRN_CTRLT, ctrl); + } +} + +extern unsigned long scom970_read(unsigned int address); +extern void scom970_write(unsigned int address, unsigned long value); + +#endif /* CONFIG_PPC64 */ + +#define __get_SP() ({unsigned long sp; \ + asm volatile("mr %0,1": "=r" (sp)); sp;}) + +#else /* __ASSEMBLY__ */ + +#define RUNLATCH_ON(REG) \ +BEGIN_FTR_SECTION \ + mfspr (REG),SPRN_CTRLF; \ + ori (REG),(REG),CTRL_RUNLATCH; \ + mtspr SPRN_CTRLT,(REG); \ +END_FTR_SECTION_IFSET(CPU_FTR_CTRL) + #endif /* __ASSEMBLY__ */ -#endif /* __ASM_PPC_REGS_H__ */ #endif /* __KERNEL__ */ +#endif /* _ASM_POWERPC_REG_H */ diff --git a/include/asm-powerpc/reg_8xx.h b/include/asm-powerpc/reg_8xx.h new file mode 100644 index 000000000000..e8ea346b21d3 --- /dev/null +++ b/include/asm-powerpc/reg_8xx.h @@ -0,0 +1,42 @@ +/* + * Contains register definitions common to PowerPC 8xx CPUs. Notice + */ +#ifndef _ASM_POWERPC_REG_8xx_H +#define _ASM_POWERPC_REG_8xx_H + +/* Cache control on the MPC8xx is provided through some additional + * special purpose registers. + */ +#define SPRN_IC_CST 560 /* Instruction cache control/status */ +#define SPRN_IC_ADR 561 /* Address needed for some commands */ +#define SPRN_IC_DAT 562 /* Read-only data register */ +#define SPRN_DC_CST 568 /* Data cache control/status */ +#define SPRN_DC_ADR 569 /* Address needed for some commands */ +#define SPRN_DC_DAT 570 /* Read-only data register */ + +/* Commands. Only the first few are available to the instruction cache. +*/ +#define IDC_ENABLE 0x02000000 /* Cache enable */ +#define IDC_DISABLE 0x04000000 /* Cache disable */ +#define IDC_LDLCK 0x06000000 /* Load and lock */ +#define IDC_UNLINE 0x08000000 /* Unlock line */ +#define IDC_UNALL 0x0a000000 /* Unlock all */ +#define IDC_INVALL 0x0c000000 /* Invalidate all */ + +#define DC_FLINE 0x0e000000 /* Flush data cache line */ +#define DC_SFWT 0x01000000 /* Set forced writethrough mode */ +#define DC_CFWT 0x03000000 /* Clear forced writethrough mode */ +#define DC_SLES 0x05000000 /* Set little endian swap mode */ +#define DC_CLES 0x07000000 /* Clear little endian swap mode */ + +/* Status. +*/ +#define IDC_ENABLED 0x80000000 /* Cache is enabled */ +#define IDC_CERR1 0x00200000 /* Cache error 1 */ +#define IDC_CERR2 0x00100000 /* Cache error 2 */ +#define IDC_CERR3 0x00080000 /* Cache error 3 */ + +#define DC_DFWT 0x40000000 /* Data cache is forced write through */ +#define DC_LES 0x20000000 /* Caches are little endian mode */ + +#endif /* _ASM_POWERPC_REG_8xx_H */ diff --git a/include/asm-ppc64/rtas.h b/include/asm-powerpc/rtas.h index e7d1b5222802..d1bb611ea626 100644 --- a/include/asm-ppc64/rtas.h +++ b/include/asm-powerpc/rtas.h @@ -1,5 +1,5 @@ -#ifndef _PPC64_RTAS_H -#define _PPC64_RTAS_H +#ifndef _POWERPC_RTAS_H +#define _POWERPC_RTAS_H #include <linux/spinlock.h> #include <asm/page.h> @@ -149,28 +149,11 @@ struct rtas_error_log { unsigned char buffer[1]; }; -struct flash_block { - char *data; - unsigned long length; -}; - -/* This struct is very similar but not identical to - * that needed by the rtas flash update. - * All we need to do for rtas is rewrite num_blocks - * into a version/length and translate the pointers - * to absolute. +/* + * This can be set by the rtas_flash module so that it can get called + * as the absolutely last thing before the kernel terminates. */ -#define FLASH_BLOCKS_PER_NODE ((PAGE_SIZE - 16) / sizeof(struct flash_block)) -struct flash_block_list { - unsigned long num_blocks; - struct flash_block_list *next; - struct flash_block blocks[FLASH_BLOCKS_PER_NODE]; -}; -struct flash_block_list_header { /* just the header of flash_block_list */ - unsigned long num_blocks; - struct flash_block_list *next; -}; -extern struct flash_block_list_header rtas_firmware_flash_list; +extern void (*rtas_flash_term_hook)(int); extern struct rtas_t rtas; @@ -190,7 +173,7 @@ extern void rtas_progress(char *s, unsigned short hex); extern void rtas_initialize(void); struct rtc_time; -extern void rtas_get_boot_time(struct rtc_time *rtc_time); +extern unsigned long rtas_get_boot_time(void); extern void rtas_get_rtc_time(struct rtc_time *rtc_time); extern int rtas_set_rtc_time(struct rtc_time *rtc_time); @@ -246,4 +229,4 @@ extern unsigned long rtas_rmo_buf; #define GLOBAL_INTERRUPT_QUEUE 9005 -#endif /* _PPC64_RTAS_H */ +#endif /* _POWERPC_RTAS_H */ diff --git a/include/asm-powerpc/rtc.h b/include/asm-powerpc/rtc.h new file mode 100644 index 000000000000..f5802926b6c0 --- /dev/null +++ b/include/asm-powerpc/rtc.h @@ -0,0 +1,78 @@ +/* + * Real-time clock definitions and interfaces + * + * Author: Tom Rini <trini@mvista.com> + * + * 2002 (c) MontaVista, Software, Inc. This file is licensed under + * the terms of the GNU General Public License version 2. This program + * is licensed "as is" without any warranty of any kind, whether express + * or implied. + * + * Based on: + * include/asm-m68k/rtc.h + * + * Copyright Richard Zidlicky + * implementation details for genrtc/q40rtc driver + * + * And the old drivers/macintosh/rtc.c which was heavily based on: + * Linux/SPARC Real Time Clock Driver + * Copyright (C) 1996 Thomas K. Dyas (tdyas@eden.rutgers.edu) + * + * With additional work by Paul Mackerras and Franz Sirl. + */ + +#ifndef __ASM_POWERPC_RTC_H__ +#define __ASM_POWERPC_RTC_H__ + +#ifdef __KERNEL__ + +#include <linux/rtc.h> + +#include <asm/machdep.h> +#include <asm/time.h> + +#define RTC_PIE 0x40 /* periodic interrupt enable */ +#define RTC_AIE 0x20 /* alarm interrupt enable */ +#define RTC_UIE 0x10 /* update-finished interrupt enable */ + +/* some dummy definitions */ +#define RTC_BATT_BAD 0x100 /* battery bad */ +#define RTC_SQWE 0x08 /* enable square-wave output */ +#define RTC_DM_BINARY 0x04 /* all time/date values are BCD if clear */ +#define RTC_24H 0x02 /* 24 hour mode - else hours bit 7 means pm */ +#define RTC_DST_EN 0x01 /* auto switch DST - works f. USA only */ + +static inline unsigned int get_rtc_time(struct rtc_time *time) +{ + if (ppc_md.get_rtc_time) + ppc_md.get_rtc_time(time); + return RTC_24H; +} + +/* Set the current date and time in the real time clock. */ +static inline int set_rtc_time(struct rtc_time *time) +{ + if (ppc_md.set_rtc_time) + return ppc_md.set_rtc_time(time); + return -EINVAL; +} + +static inline unsigned int get_rtc_ss(void) +{ + struct rtc_time h; + + get_rtc_time(&h); + return h.tm_sec; +} + +static inline int get_rtc_pll(struct rtc_pll_info *pll) +{ + return -EINVAL; +} +static inline int set_rtc_pll(struct rtc_pll_info *pll) +{ + return -EINVAL; +} + +#endif /* __KERNEL__ */ +#endif /* __ASM_POWERPC_RTC_H__ */ diff --git a/include/asm-ppc64/rwsem.h b/include/asm-powerpc/rwsem.h index bd5c2f093575..79bae4933b73 100644 --- a/include/asm-ppc64/rwsem.h +++ b/include/asm-powerpc/rwsem.h @@ -1,18 +1,14 @@ +#ifndef _ASM_POWERPC_RWSEM_H +#define _ASM_POWERPC_RWSEM_H + +#ifdef __KERNEL__ + /* * include/asm-ppc64/rwsem.h: R/W semaphores for PPC using the stuff * in lib/rwsem.c. Adapted largely from include/asm-i386/rwsem.h * by Paul Mackerras <paulus@samba.org>. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. */ -#ifndef _PPC64_RWSEM_H -#define _PPC64_RWSEM_H - -#ifdef __KERNEL__ #include <linux/list.h> #include <linux/spinlock.h> #include <asm/atomic.h> @@ -163,5 +159,10 @@ static inline int rwsem_atomic_update(int delta, struct rw_semaphore *sem) return atomic_add_return(delta, (atomic_t *)(&sem->count)); } -#endif /* __KERNEL__ */ -#endif /* _PPC_RWSEM_XADD_H */ +static inline int rwsem_is_locked(struct rw_semaphore *sem) +{ + return (sem->count != 0); +} + +#endif /* __KERNEL__ */ +#endif /* _ASM_POWERPC_RWSEM_H */ diff --git a/include/asm-ppc64/scatterlist.h b/include/asm-powerpc/scatterlist.h index cecce6c6dfbb..8c992d1491d4 100644 --- a/include/asm-ppc64/scatterlist.h +++ b/include/asm-powerpc/scatterlist.h @@ -1,6 +1,5 @@ -#ifndef _PPC64_SCATTERLIST_H -#define _PPC64_SCATTERLIST_H - +#ifndef _ASM_POWERPC_SCATTERLIST_H +#define _ASM_POWERPC_SCATTERLIST_H /* * Copyright (C) 2001 PPC64 Team, IBM Corp * @@ -10,6 +9,7 @@ * 2 of the License, or (at your option) any later version. */ +#ifdef __KERNEL__ #include <linux/types.h> #include <asm/dma.h> @@ -19,13 +19,27 @@ struct scatterlist { unsigned int length; /* For TCE support */ - u32 dma_address; + dma_addr_t dma_address; u32 dma_length; }; +/* + * These macros should be used after a dma_map_sg call has been done + * to get bus addresses of each of the SG entries and their lengths. + * You should only work with the number of sg entries pci_map_sg + * returns, or alternatively stop on the first sg_dma_len(sg) which + * is 0. + */ #define sg_dma_address(sg) ((sg)->dma_address) +#ifdef __powerpc64__ #define sg_dma_len(sg) ((sg)->dma_length) +#else +#define sg_dma_len(sg) ((sg)->length) +#endif +#ifdef __powerpc64__ #define ISA_DMA_THRESHOLD (~0UL) +#endif -#endif /* !(_PPC64_SCATTERLIST_H) */ +#endif /* __KERNEL__ */ +#endif /* _ASM_POWERPC_SCATTERLIST_H */ diff --git a/include/asm-ppc64/seccomp.h b/include/asm-powerpc/seccomp.h index c130c334bda1..1e1cfe12882b 100644 --- a/include/asm-ppc64/seccomp.h +++ b/include/asm-powerpc/seccomp.h @@ -1,11 +1,6 @@ -#ifndef _ASM_SECCOMP_H - -#include <linux/thread_info.h> /* already defines TIF_32BIT */ - -#ifndef TIF_32BIT -#error "unexpected TIF_32BIT on ppc64" -#endif +#ifndef _ASM_POWERPC_SECCOMP_H +#include <linux/thread_info.h> #include <linux/unistd.h> #define __NR_seccomp_read __NR_read @@ -18,4 +13,4 @@ #define __NR_seccomp_exit_32 __NR_exit #define __NR_seccomp_sigreturn_32 __NR_sigreturn -#endif /* _ASM_SECCOMP_H */ +#endif /* _ASM_POWERPC_SECCOMP_H */ diff --git a/include/asm-ppc64/sections.h b/include/asm-powerpc/sections.h index 308ca6f5ced2..47be2ac2a925 100644 --- a/include/asm-ppc64/sections.h +++ b/include/asm-powerpc/sections.h @@ -1,22 +1,11 @@ -#ifndef _PPC64_SECTIONS_H -#define _PPC64_SECTIONS_H - -extern char _end[]; +#ifndef _ASM_POWERPC_SECTIONS_H +#define _ASM_POWERPC_SECTIONS_H #include <asm-generic/sections.h> -#define __pmac -#define __pmacdata - -#define __prep -#define __prepdata - -#define __chrp -#define __chrpdata - -#define __openfirmware -#define __openfirmwaredata +#ifdef __powerpc64__ +extern char _end[]; static inline int in_kernel_text(unsigned long addr) { @@ -27,3 +16,5 @@ static inline int in_kernel_text(unsigned long addr) } #endif + +#endif /* _ASM_POWERPC_SECTIONS_H */ diff --git a/include/asm-ppc64/semaphore.h b/include/asm-powerpc/semaphore.h index aefe7753ea41..57369d2cadef 100644 --- a/include/asm-ppc64/semaphore.h +++ b/include/asm-powerpc/semaphore.h @@ -1,5 +1,5 @@ -#ifndef _PPC64_SEMAPHORE_H -#define _PPC64_SEMAPHORE_H +#ifndef _ASM_POWERPC_SEMAPHORE_H +#define _ASM_POWERPC_SEMAPHORE_H /* * Remove spinlock-based RW semaphores; RW semaphore definitions are @@ -31,9 +31,6 @@ struct semaphore { .wait = __WAIT_QUEUE_HEAD_INITIALIZER((name).wait) \ } -#define __MUTEX_INITIALIZER(name) \ - __SEMAPHORE_INITIALIZER(name, 1) - #define __DECLARE_SEMAPHORE_GENERIC(name, count) \ struct semaphore name = __SEMAPHORE_INITIALIZER(name,count) @@ -95,4 +92,4 @@ static inline void up(struct semaphore * sem) #endif /* __KERNEL__ */ -#endif /* !(_PPC64_SEMAPHORE_H) */ +#endif /* _ASM_POWERPC_SEMAPHORE_H */ diff --git a/include/asm-ppc64/serial.h b/include/asm-powerpc/serial.h index d6bcb79b7d7b..b273d630b32f 100644 --- a/include/asm-ppc64/serial.h +++ b/include/asm-powerpc/serial.h @@ -1,21 +1,16 @@ /* - * include/asm-ppc64/serial.h - */ -#ifndef _PPC64_SERIAL_H -#define _PPC64_SERIAL_H - -/* - * This assumes you have a 1.8432 MHz clock for your UART. - * - * It'd be nice if someone built a serial card with a 24.576 MHz - * clock, since the 16550A is capable of handling a top speed of 1.5 - * megabits/second; but this requires the faster clock. - * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License * as published by the Free Software Foundation; either version * 2 of the License, or (at your option) any later version. */ +#ifndef _ASM_POWERPC_SERIAL_H +#define _ASM_POWERPC_SERIAL_H + +/* + * Serial ports are not listed here, because they are discovered + * through the device tree. + */ /* Default baud base if not found in device-tree */ #define BASE_BAUD ( 1843200 / 16 ) diff --git a/include/asm-ppc64/sigcontext.h b/include/asm-powerpc/sigcontext.h index 6f8aee768c5e..165d630e1cf3 100644 --- a/include/asm-ppc64/sigcontext.h +++ b/include/asm-powerpc/sigcontext.h @@ -1,5 +1,5 @@ -#ifndef _ASM_PPC64_SIGCONTEXT_H -#define _ASM_PPC64_SIGCONTEXT_H +#ifndef _ASM_POWERPC_SIGCONTEXT_H +#define _ASM_POWERPC_SIGCONTEXT_H /* * This program is free software; you can redistribute it and/or @@ -9,39 +9,44 @@ */ #include <linux/compiler.h> #include <asm/ptrace.h> +#ifdef __powerpc64__ #include <asm/elf.h> - +#endif struct sigcontext { unsigned long _unused[4]; int signal; +#ifdef __powerpc64__ int _pad0; +#endif unsigned long handler; unsigned long oldmask; struct pt_regs __user *regs; +#ifdef __powerpc64__ elf_gregset_t gp_regs; elf_fpregset_t fp_regs; /* - * To maintain compatibility with current implementations the sigcontext is - * extended by appending a pointer (v_regs) to a quadword type (elf_vrreg_t) - * followed by an unstructured (vmx_reserve) field of 69 doublewords. This - * allows the array of vector registers to be quadword aligned independent of - * the alignment of the containing sigcontext or ucontext. It is the - * responsibility of the code setting the sigcontext to set this pointer to - * either NULL (if this processor does not support the VMX feature) or the + * To maintain compatibility with current implementations the sigcontext is + * extended by appending a pointer (v_regs) to a quadword type (elf_vrreg_t) + * followed by an unstructured (vmx_reserve) field of 69 doublewords. This + * allows the array of vector registers to be quadword aligned independent of + * the alignment of the containing sigcontext or ucontext. It is the + * responsibility of the code setting the sigcontext to set this pointer to + * either NULL (if this processor does not support the VMX feature) or the * address of the first quadword within the allocated (vmx_reserve) area. * - * The pointer (v_regs) of vector type (elf_vrreg_t) is type compatible with - * an array of 34 quadword entries (elf_vrregset_t). The entries with - * indexes 0-31 contain the corresponding vector registers. The entry with - * index 32 contains the vscr as the last word (offset 12) within the - * quadword. This allows the vscr to be stored as either a quadword (since - * it must be copied via a vector register to/from storage) or as a word. - * The entry with index 33 contains the vrsave as the first word (offset 0) + * The pointer (v_regs) of vector type (elf_vrreg_t) is type compatible with + * an array of 34 quadword entries (elf_vrregset_t). The entries with + * indexes 0-31 contain the corresponding vector registers. The entry with + * index 32 contains the vscr as the last word (offset 12) within the + * quadword. This allows the vscr to be stored as either a quadword (since + * it must be copied via a vector register to/from storage) or as a word. + * The entry with index 33 contains the vrsave as the first word (offset 0) * within the quadword. */ elf_vrreg_t __user *v_regs; long vmx_reserve[ELF_NVRREG+ELF_NVRREG+1]; +#endif }; -#endif /* _ASM_PPC64_SIGCONTEXT_H */ +#endif /* _ASM_POWERPC_SIGCONTEXT_H */ diff --git a/include/asm-ppc/signal.h b/include/asm-powerpc/signal.h index caf6ede3710f..694c8d2dab87 100644 --- a/include/asm-ppc/signal.h +++ b/include/asm-powerpc/signal.h @@ -1,18 +1,11 @@ -#ifndef _ASMPPC_SIGNAL_H -#define _ASMPPC_SIGNAL_H +#ifndef _ASM_POWERPC_SIGNAL_H +#define _ASM_POWERPC_SIGNAL_H -#ifdef __KERNEL__ #include <linux/types.h> -#endif /* __KERNEL__ */ - -/* Avoid too many header ordering problems. */ -struct siginfo; - -/* Most things should be clean enough to redefine this at will, if care - is taken to make libc match. */ +#include <linux/config.h> #define _NSIG 64 -#define _NSIG_BPW 32 +#define _NSIG_BPW BITS_PER_LONG #define _NSIG_WORDS (_NSIG / _NSIG_BPW) typedef unsigned long old_sigset_t; /* at least 32 bits */ @@ -77,19 +70,19 @@ typedef struct { * SA_ONESHOT and SA_NOMASK are the historical Linux names for the Single * Unix names RESETHAND and NODEFER respectively. */ -#define SA_NOCLDSTOP 0x00000001 -#define SA_NOCLDWAIT 0x00000002 -#define SA_SIGINFO 0x00000004 -#define SA_ONSTACK 0x08000000 -#define SA_RESTART 0x10000000 -#define SA_NODEFER 0x40000000 -#define SA_RESETHAND 0x80000000 +#define SA_NOCLDSTOP 0x00000001U +#define SA_NOCLDWAIT 0x00000002U +#define SA_SIGINFO 0x00000004U +#define SA_ONSTACK 0x08000000U +#define SA_RESTART 0x10000000U +#define SA_NODEFER 0x40000000U +#define SA_RESETHAND 0x80000000U #define SA_NOMASK SA_NODEFER #define SA_ONESHOT SA_RESETHAND -#define SA_INTERRUPT 0x20000000 /* dummy -- ignored */ +#define SA_INTERRUPT 0x20000000u /* dummy -- ignored */ -#define SA_RESTORER 0x04000000 +#define SA_RESTORER 0x04000000U /* * sigaltstack controls @@ -127,10 +120,13 @@ typedef struct sigaltstack { } stack_t; #ifdef __KERNEL__ -#include <asm/sigcontext.h> +struct pt_regs; +extern int do_signal(sigset_t *oldset, struct pt_regs *regs); +extern int do_signal32(sigset_t *oldset, struct pt_regs *regs); #define ptrace_signal_deliver(regs, cookie) do { } while (0) #endif /* __KERNEL__ */ +#ifndef __powerpc64__ /* * These are parameters to dbg_sigreturn syscall. They enable or * disable certain debugging things that can be done from signal @@ -149,5 +145,6 @@ struct sig_dbg_op { /* Enable or disable branch tracing. The value sets the state. */ #define SIG_DBG_BRANCH_TRACING 2 +#endif /* ! __powerpc64__ */ -#endif +#endif /* _ASM_POWERPC_SIGNAL_H */ diff --git a/include/asm-ppc64/smp.h b/include/asm-powerpc/smp.h index d86f742e9a21..98581e5a8279 100644 --- a/include/asm-ppc64/smp.h +++ b/include/asm-powerpc/smp.h @@ -1,5 +1,5 @@ /* - * smp.h: PPC64 specific SMP code. + * smp.h: PowerPC-specific SMP code. * * Original was a copy of sparc smp.h. Now heavily modified * for PPC. @@ -13,9 +13,9 @@ * 2 of the License, or (at your option) any later version. */ +#ifndef _ASM_POWERPC_SMP_H +#define _ASM_POWERPC_SMP_H #ifdef __KERNEL__ -#ifndef _PPC64_SMP_H -#define _PPC64_SMP_H #include <linux/config.h> #include <linux/threads.h> @@ -24,7 +24,9 @@ #ifndef __ASSEMBLY__ +#ifdef CONFIG_PPC64 #include <asm/paca.h> +#endif extern int boot_cpuid; extern int boot_cpuid_phys; @@ -45,8 +47,19 @@ void generic_cpu_die(unsigned int cpu); void generic_mach_cpu_die(void); #endif +#ifdef CONFIG_PPC64 #define raw_smp_processor_id() (get_paca()->paca_index) #define hard_smp_processor_id() (get_paca()->hw_cpu_id) +#else +/* 32-bit */ +extern int smp_hw_index[]; + +#define raw_smp_processor_id() (current_thread_info()->cpu) +#define hard_smp_processor_id() (smp_hw_index[smp_processor_id()]) +#define get_hard_smp_processor_id(cpu) (smp_hw_index[(cpu)]) +#define set_hard_smp_processor_id(cpu, phys)\ + (smp_hw_index[(cpu)] = (phys)) +#endif extern cpumask_t cpu_sibling_map[NR_CPUS]; @@ -64,20 +77,37 @@ extern cpumask_t cpu_sibling_map[NR_CPUS]; void smp_init_iSeries(void); void smp_init_pSeries(void); +void smp_init_cell(void); +void smp_setup_cpu_maps(void); extern int __cpu_disable(void); extern void __cpu_die(unsigned int cpu); + +#else +/* for UP */ +#define smp_setup_cpu_maps() + #endif /* CONFIG_SMP */ +#ifdef CONFIG_PPC64 #define get_hard_smp_processor_id(CPU) (paca[(CPU)].hw_cpu_id) #define set_hard_smp_processor_id(CPU, VAL) \ do { (paca[(CPU)].hw_cpu_id = (VAL)); } while (0) +extern void smp_release_cpus(void); + +#else +/* 32-bit */ +#ifndef CONFIG_SMP +#define get_hard_smp_processor_id(cpu) boot_cpuid_phys +#define set_hard_smp_processor_id(cpu, phys) +#endif +#endif + extern int smt_enabled_at_boot; extern int smp_mpic_probe(void); extern void smp_mpic_setup_cpu(int cpu); -extern void smp_mpic_message_pass(int target, int msg); extern void smp_generic_kick_cpu(int nr); extern void smp_generic_give_timebase(void); @@ -85,15 +115,7 @@ extern void smp_generic_take_timebase(void); extern struct smp_ops_t *smp_ops; -#ifdef CONFIG_PPC_PSERIES -void vpa_init(int cpu); -#else -static inline void vpa_init(int cpu) -{ -} -#endif /* CONFIG_PPC_PSERIES */ - #endif /* __ASSEMBLY__ */ -#endif /* !(_PPC64_SMP_H) */ #endif /* __KERNEL__ */ +#endif /* _ASM_POWERPC_SMP_H) */ diff --git a/include/asm-powerpc/smu.h b/include/asm-powerpc/smu.h new file mode 100644 index 000000000000..76c29a9784dd --- /dev/null +++ b/include/asm-powerpc/smu.h @@ -0,0 +1,570 @@ +#ifndef _SMU_H +#define _SMU_H + +/* + * Definitions for talking to the SMU chip in newer G5 PowerMacs + */ + +#include <linux/config.h> +#include <linux/list.h> + +/* + * Known SMU commands + * + * Most of what is below comes from looking at the Open Firmware driver, + * though this is still incomplete and could use better documentation here + * or there... + */ + + +/* + * Partition info commands + * + * These commands are used to retreive the sdb-partition-XX datas from + * the SMU. The lenght is always 2. First byte is the subcommand code + * and second byte is the partition ID. + * + * The reply is 6 bytes: + * + * - 0..1 : partition address + * - 2 : a byte containing the partition ID + * - 3 : length (maybe other bits are rest of header ?) + * + * The data must then be obtained with calls to another command: + * SMU_CMD_MISC_ee_GET_DATABLOCK_REC (described below). + */ +#define SMU_CMD_PARTITION_COMMAND 0x3e +#define SMU_CMD_PARTITION_LATEST 0x01 +#define SMU_CMD_PARTITION_BASE 0x02 +#define SMU_CMD_PARTITION_UPDATE 0x03 + + +/* + * Fan control + * + * This is a "mux" for fan control commands. The command seem to + * act differently based on the number of arguments. With 1 byte + * of argument, this seem to be queries for fans status, setpoint, + * etc..., while with 0xe arguments, we will set the fans speeds. + * + * Queries (1 byte arg): + * --------------------- + * + * arg=0x01: read RPM fans status + * arg=0x02: read RPM fans setpoint + * arg=0x11: read PWM fans status + * arg=0x12: read PWM fans setpoint + * + * the "status" queries return the current speed while the "setpoint" ones + * return the programmed/target speed. It _seems_ that the result is a bit + * mask in the first byte of active/available fans, followed by 6 words (16 + * bits) containing the requested speed. + * + * Setpoint (14 bytes arg): + * ------------------------ + * + * first arg byte is 0 for RPM fans and 0x10 for PWM. Second arg byte is the + * mask of fans affected by the command. Followed by 6 words containing the + * setpoint value for selected fans in the mask (or 0 if mask value is 0) + */ +#define SMU_CMD_FAN_COMMAND 0x4a + + +/* + * Battery access + * + * Same command number as the PMU, could it be same syntax ? + */ +#define SMU_CMD_BATTERY_COMMAND 0x6f +#define SMU_CMD_GET_BATTERY_INFO 0x00 + +/* + * Real time clock control + * + * This is a "mux", first data byte contains the "sub" command. + * The "RTC" part of the SMU controls the date, time, powerup + * timer, but also a PRAM + * + * Dates are in BCD format on 7 bytes: + * [sec] [min] [hour] [weekday] [month day] [month] [year] + * with month being 1 based and year minus 100 + */ +#define SMU_CMD_RTC_COMMAND 0x8e +#define SMU_CMD_RTC_SET_PWRUP_TIMER 0x00 /* i: 7 bytes date */ +#define SMU_CMD_RTC_GET_PWRUP_TIMER 0x01 /* o: 7 bytes date */ +#define SMU_CMD_RTC_STOP_PWRUP_TIMER 0x02 +#define SMU_CMD_RTC_SET_PRAM_BYTE_ACC 0x20 /* i: 1 byte (address?) */ +#define SMU_CMD_RTC_SET_PRAM_AUTOINC 0x21 /* i: 1 byte (data?) */ +#define SMU_CMD_RTC_SET_PRAM_LO_BYTES 0x22 /* i: 10 bytes */ +#define SMU_CMD_RTC_SET_PRAM_HI_BYTES 0x23 /* i: 10 bytes */ +#define SMU_CMD_RTC_GET_PRAM_BYTE 0x28 /* i: 1 bytes (address?) */ +#define SMU_CMD_RTC_GET_PRAM_LO_BYTES 0x29 /* o: 10 bytes */ +#define SMU_CMD_RTC_GET_PRAM_HI_BYTES 0x2a /* o: 10 bytes */ +#define SMU_CMD_RTC_SET_DATETIME 0x80 /* i: 7 bytes date */ +#define SMU_CMD_RTC_GET_DATETIME 0x81 /* o: 7 bytes date */ + + /* + * i2c commands + * + * To issue an i2c command, first is to send a parameter block to the + * the SMU. This is a command of type 0x9a with 9 bytes of header + * eventually followed by data for a write: + * + * 0: bus number (from device-tree usually, SMU has lots of busses !) + * 1: transfer type/format (see below) + * 2: device address. For combined and combined4 type transfers, this + * is the "write" version of the address (bit 0x01 cleared) + * 3: subaddress length (0..3) + * 4: subaddress byte 0 (or only byte for subaddress length 1) + * 5: subaddress byte 1 + * 6: subaddress byte 2 + * 7: combined address (device address for combined mode data phase) + * 8: data length + * + * The transfer types are the same good old Apple ones it seems, + * that is: + * - 0x00: Simple transfer + * - 0x01: Subaddress transfer (addr write + data tx, no restart) + * - 0x02: Combined transfer (addr write + restart + data tx) + * + * This is then followed by actual data for a write. + * + * At this point, the OF driver seems to have a limitation on transfer + * sizes of 0xd bytes on reads and 0x5 bytes on writes. I do not know + * wether this is just an OF limit due to some temporary buffer size + * or if this is an SMU imposed limit. This driver has the same limitation + * for now as I use a 0x10 bytes temporary buffer as well + * + * Once that is completed, a response is expected from the SMU. This is + * obtained via a command of type 0x9a with a length of 1 byte containing + * 0 as the data byte. OF also fills the rest of the data buffer with 0xff's + * though I can't tell yet if this is actually necessary. Once this command + * is complete, at this point, all I can tell is what OF does. OF tests + * byte 0 of the reply: + * - on read, 0xfe or 0xfc : bus is busy, wait (see below) or nak ? + * - on read, 0x00 or 0x01 : reply is in buffer (after the byte 0) + * - on write, < 0 -> failure (immediate exit) + * - else, OF just exists (without error, weird) + * + * So on read, there is this wait-for-busy thing when getting a 0xfc or + * 0xfe result. OF does a loop of up to 64 retries, waiting 20ms and + * doing the above again until either the retries expire or the result + * is no longer 0xfe or 0xfc + * + * The Darwin I2C driver is less subtle though. On any non-success status + * from the response command, it waits 5ms and tries again up to 20 times, + * it doesn't differenciate between fatal errors or "busy" status. + * + * This driver provides an asynchronous paramblock based i2c command + * interface to be used either directly by low level code or by a higher + * level driver interfacing to the linux i2c layer. The current + * implementation of this relies on working timers & timer interrupts + * though, so be careful of calling context for now. This may be "fixed" + * in the future by adding a polling facility. + */ +#define SMU_CMD_I2C_COMMAND 0x9a + /* transfer types */ +#define SMU_I2C_TRANSFER_SIMPLE 0x00 +#define SMU_I2C_TRANSFER_STDSUB 0x01 +#define SMU_I2C_TRANSFER_COMBINED 0x02 + +/* + * Power supply control + * + * The "sub" command is an ASCII string in the data, the + * data lenght is that of the string. + * + * The VSLEW command can be used to get or set the voltage slewing. + * - lenght 5 (only "VSLEW") : it returns "DONE" and 3 bytes of + * reply at data offset 6, 7 and 8. + * - lenght 8 ("VSLEWxyz") has 3 additional bytes appended, and is + * used to set the voltage slewing point. The SMU replies with "DONE" + * I yet have to figure out their exact meaning of those 3 bytes in + * both cases. They seem to be: + * x = processor mask + * y = op. point index + * z = processor freq. step index + * I haven't yet decyphered result codes + * + */ +#define SMU_CMD_POWER_COMMAND 0xaa +#define SMU_CMD_POWER_RESTART "RESTART" +#define SMU_CMD_POWER_SHUTDOWN "SHUTDOWN" +#define SMU_CMD_POWER_VOLTAGE_SLEW "VSLEW" + +/* + * Read ADC sensors + * + * This command takes one byte of parameter: the sensor ID (or "reg" + * value in the device-tree) and returns a 16 bits value + */ +#define SMU_CMD_READ_ADC 0xd8 + +/* Misc commands + * + * This command seem to be a grab bag of various things + */ +#define SMU_CMD_MISC_df_COMMAND 0xdf +#define SMU_CMD_MISC_df_SET_DISPLAY_LIT 0x02 /* i: 1 byte */ +#define SMU_CMD_MISC_df_NMI_OPTION 0x04 + +/* + * Version info commands + * + * I haven't quite tried to figure out how these work + */ +#define SMU_CMD_VERSION_COMMAND 0xea + + +/* + * Misc commands + * + * This command seem to be a grab bag of various things + * + * SMU_CMD_MISC_ee_GET_DATABLOCK_REC is used, among others, to + * transfer blocks of data from the SMU. So far, I've decrypted it's + * usage to retreive partition data. In order to do that, you have to + * break your transfer in "chunks" since that command cannot transfer + * more than a chunk at a time. The chunk size used by OF is 0xe bytes, + * but it seems that the darwin driver will let you do 0x1e bytes if + * your "PMU" version is >= 0x30. You can get the "PMU" version apparently + * either in the last 16 bits of property "smu-version-pmu" or as the 16 + * bytes at offset 1 of "smu-version-info" + * + * For each chunk, the command takes 7 bytes of arguments: + * byte 0: subcommand code (0x02) + * byte 1: 0x04 (always, I don't know what it means, maybe the address + * space to use or some other nicety. It's hard coded in OF) + * byte 2..5: SMU address of the chunk (big endian 32 bits) + * byte 6: size to transfer (up to max chunk size) + * + * The data is returned directly + */ +#define SMU_CMD_MISC_ee_COMMAND 0xee +#define SMU_CMD_MISC_ee_GET_DATABLOCK_REC 0x02 +#define SMU_CMD_MISC_ee_LEDS_CTRL 0x04 /* i: 00 (00,01) [00] */ +#define SMU_CMD_MISC_ee_GET_DATA 0x05 /* i: 00 , o: ?? */ + + + +/* + * - Kernel side interface - + */ + +#ifdef __KERNEL__ + +/* + * Asynchronous SMU commands + * + * Fill up this structure and submit it via smu_queue_command(), + * and get notified by the optional done() callback, or because + * status becomes != 1 + */ + +struct smu_cmd; + +struct smu_cmd +{ + /* public */ + u8 cmd; /* command */ + int data_len; /* data len */ + int reply_len; /* reply len */ + void *data_buf; /* data buffer */ + void *reply_buf; /* reply buffer */ + int status; /* command status */ + void (*done)(struct smu_cmd *cmd, void *misc); + void *misc; + + /* private */ + struct list_head link; +}; + +/* + * Queues an SMU command, all fields have to be initialized + */ +extern int smu_queue_cmd(struct smu_cmd *cmd); + +/* + * Simple command wrapper. This structure embeds a small buffer + * to ease sending simple SMU commands from the stack + */ +struct smu_simple_cmd +{ + struct smu_cmd cmd; + u8 buffer[16]; +}; + +/* + * Queues a simple command. All fields will be initialized by that + * function + */ +extern int smu_queue_simple(struct smu_simple_cmd *scmd, u8 command, + unsigned int data_len, + void (*done)(struct smu_cmd *cmd, void *misc), + void *misc, + ...); + +/* + * Completion helper. Pass it to smu_queue_simple or as 'done' + * member to smu_queue_cmd, it will call complete() on the struct + * completion passed in the "misc" argument + */ +extern void smu_done_complete(struct smu_cmd *cmd, void *misc); + +/* + * Synchronous helpers. Will spin-wait for completion of a command + */ +extern void smu_spinwait_cmd(struct smu_cmd *cmd); + +static inline void smu_spinwait_simple(struct smu_simple_cmd *scmd) +{ + smu_spinwait_cmd(&scmd->cmd); +} + +/* + * Poll routine to call if blocked with irqs off + */ +extern void smu_poll(void); + + +/* + * Init routine, presence check.... + */ +extern int smu_init(void); +extern int smu_present(void); +struct of_device; +extern struct of_device *smu_get_ofdev(void); + + +/* + * Common command wrappers + */ +extern void smu_shutdown(void); +extern void smu_restart(void); +struct rtc_time; +extern int smu_get_rtc_time(struct rtc_time *time, int spinwait); +extern int smu_set_rtc_time(struct rtc_time *time, int spinwait); + +/* + * SMU command buffer absolute address, exported by pmac_setup, + * this is allocated very early during boot. + */ +extern unsigned long smu_cmdbuf_abs; + + +/* + * Kenrel asynchronous i2c interface + */ + +/* SMU i2c header, exactly matches i2c header on wire */ +struct smu_i2c_param +{ + u8 bus; /* SMU bus ID (from device tree) */ + u8 type; /* i2c transfer type */ + u8 devaddr; /* device address (includes direction) */ + u8 sublen; /* subaddress length */ + u8 subaddr[3]; /* subaddress */ + u8 caddr; /* combined address, filled by SMU driver */ + u8 datalen; /* length of transfer */ + u8 data[7]; /* data */ +}; + +#define SMU_I2C_READ_MAX 0x0d +#define SMU_I2C_WRITE_MAX 0x05 + +struct smu_i2c_cmd +{ + /* public */ + struct smu_i2c_param info; + void (*done)(struct smu_i2c_cmd *cmd, void *misc); + void *misc; + int status; /* 1 = pending, 0 = ok, <0 = fail */ + + /* private */ + struct smu_cmd scmd; + int read; + int stage; + int retries; + u8 pdata[0x10]; + struct list_head link; +}; + +/* + * Call this to queue an i2c command to the SMU. You must fill info, + * including info.data for a write, done and misc. + * For now, no polling interface is provided so you have to use completion + * callback. + */ +extern int smu_queue_i2c(struct smu_i2c_cmd *cmd); + + +#endif /* __KERNEL__ */ + + +/* + * - SMU "sdb" partitions informations - + */ + + +/* + * Partition header format + */ +struct smu_sdbp_header { + __u8 id; + __u8 len; + __u8 version; + __u8 flags; +}; + + + /* + * demangle 16 and 32 bits integer in some SMU partitions + * (currently, afaik, this concerns only the FVT partition + * (0x12) + */ +#define SMU_U16_MIX(x) le16_to_cpu(x); +#define SMU_U32_MIX(x) ((((x) & 0xff00ff00u) >> 8)|(((x) & 0x00ff00ffu) << 8)) + + +/* This is the definition of the SMU sdb-partition-0x12 table (called + * CPU F/V/T operating points in Darwin). The definition for all those + * SMU tables should be moved to some separate file + */ +#define SMU_SDB_FVT_ID 0x12 + +struct smu_sdbp_fvt { + __u32 sysclk; /* Base SysClk frequency in Hz for + * this operating point. Value need to + * be unmixed with SMU_U32_MIX() + */ + __u8 pad; + __u8 maxtemp; /* Max temp. supported by this + * operating point + */ + + __u16 volts[3]; /* CPU core voltage for the 3 + * PowerTune modes, a mode with + * 0V = not supported. Value need + * to be unmixed with SMU_U16_MIX() + */ +}; + +/* This partition contains voltage & current sensor calibration + * informations + */ +#define SMU_SDB_CPUVCP_ID 0x21 + +struct smu_sdbp_cpuvcp { + __u16 volt_scale; /* u4.12 fixed point */ + __s16 volt_offset; /* s4.12 fixed point */ + __u16 curr_scale; /* u4.12 fixed point */ + __s16 curr_offset; /* s4.12 fixed point */ + __s32 power_quads[3]; /* s4.28 fixed point */ +}; + +/* This partition contains CPU thermal diode calibration + */ +#define SMU_SDB_CPUDIODE_ID 0x18 + +struct smu_sdbp_cpudiode { + __u16 m_value; /* u1.15 fixed point */ + __s16 b_value; /* s10.6 fixed point */ + +}; + +/* This partition contains Slots power calibration + */ +#define SMU_SDB_SLOTSPOW_ID 0x78 + +struct smu_sdbp_slotspow { + __u16 pow_scale; /* u4.12 fixed point */ + __s16 pow_offset; /* s4.12 fixed point */ +}; + +/* This partition contains machine specific version information about + * the sensor/control layout + */ +#define SMU_SDB_SENSORTREE_ID 0x25 + +struct smu_sdbp_sensortree { + u8 model_id; + u8 unknown[3]; +}; + +/* This partition contains CPU thermal control PID informations. So far + * only single CPU machines have been seen with an SMU, so we assume this + * carries only informations for those + */ +#define SMU_SDB_CPUPIDDATA_ID 0x17 + +struct smu_sdbp_cpupiddata { + u8 unknown1; + u8 target_temp_delta; + u8 unknown2; + u8 history_len; + s16 power_adj; + u16 max_power; + s32 gp,gr,gd; +}; + + +/* Other partitions without known structures */ +#define SMU_SDB_DEBUG_SWITCHES_ID 0x05 + +#ifdef __KERNEL__ +/* + * This returns the pointer to an SMU "sdb" partition data or NULL + * if not found. The data format is described below + */ +extern struct smu_sdbp_header *smu_get_sdb_partition(int id, + unsigned int *size); + +#endif /* __KERNEL__ */ + + +/* + * - Userland interface - + */ + +/* + * A given instance of the device can be configured for 2 different + * things at the moment: + * + * - sending SMU commands (default at open() time) + * - receiving SMU events (not yet implemented) + * + * Commands are written with write() of a command block. They can be + * "driver" commands (for example to switch to event reception mode) + * or real SMU commands. They are made of a header followed by command + * data if any. + * + * For SMU commands (not for driver commands), you can then read() back + * a reply. The reader will be blocked or not depending on how the device + * file is opened. poll() isn't implemented yet. The reply will consist + * of a header as well, followed by the reply data if any. You should + * always provide a buffer large enough for the maximum reply data, I + * recommand one page. + * + * It is illegal to send SMU commands through a file descriptor configured + * for events reception + * + */ +struct smu_user_cmd_hdr +{ + __u32 cmdtype; +#define SMU_CMDTYPE_SMU 0 /* SMU command */ +#define SMU_CMDTYPE_WANTS_EVENTS 1 /* switch fd to events mode */ +#define SMU_CMDTYPE_GET_PARTITION 2 /* retreive an sdb partition */ + + __u8 cmd; /* SMU command byte */ + __u8 pad[3]; /* padding */ + __u32 data_len; /* Lenght of data following */ +}; + +struct smu_user_reply_hdr +{ + __u32 status; /* Command status */ + __u32 reply_len; /* Lenght of data follwing */ +}; + +#endif /* _SMU_H */ diff --git a/include/asm-powerpc/sparsemem.h b/include/asm-powerpc/sparsemem.h new file mode 100644 index 000000000000..ba1b34fdb967 --- /dev/null +++ b/include/asm-powerpc/sparsemem.h @@ -0,0 +1,20 @@ +#ifndef _ASM_POWERPC_SPARSEMEM_H +#define _ASM_POWERPC_SPARSEMEM_H 1 + +#ifdef CONFIG_SPARSEMEM +/* + * SECTION_SIZE_BITS 2^N: how big each section will be + * MAX_PHYSADDR_BITS 2^N: how much physical address space we have + * MAX_PHYSMEM_BITS 2^N: how much memory we can have in that space + */ +#define SECTION_SIZE_BITS 24 +#define MAX_PHYSADDR_BITS 44 +#define MAX_PHYSMEM_BITS 44 + +#ifdef CONFIG_MEMORY_HOTPLUG +extern void create_section_mapping(unsigned long start, unsigned long end); +#endif /* CONFIG_MEMORY_HOTPLUG */ + +#endif /* CONFIG_SPARSEMEM */ + +#endif /* _ASM_POWERPC_SPARSEMEM_H */ diff --git a/include/asm-ppc64/spinlock.h b/include/asm-powerpc/spinlock.h index 14cb895bb607..caa4b14e0e94 100644 --- a/include/asm-ppc64/spinlock.h +++ b/include/asm-powerpc/spinlock.h @@ -18,31 +18,41 @@ * * (the type definitions are in asm/spinlock_types.h) */ -#include <linux/config.h> +#ifdef CONFIG_PPC64 #include <asm/paca.h> #include <asm/hvcall.h> -#include <asm/iSeries/HvCall.h> +#include <asm/iseries/hv_call.h> +#endif +#include <asm/asm-compat.h> +#include <asm/synch.h> #define __raw_spin_is_locked(x) ((x)->slock != 0) +#ifdef CONFIG_PPC64 +/* use 0x800000yy when locked, where yy == CPU number */ +#define LOCK_TOKEN (*(u32 *)(&get_paca()->lock_token)) +#else +#define LOCK_TOKEN 1 +#endif + /* * This returns the old value in the lock, so we succeeded * in getting the lock if the return value is 0. */ static __inline__ unsigned long __spin_trylock(raw_spinlock_t *lock) { - unsigned long tmp, tmp2; + unsigned long tmp, token; + token = LOCK_TOKEN; __asm__ __volatile__( -" lwz %1,%3(13) # __spin_trylock\n\ -1: lwarx %0,0,%2\n\ +"1: lwarx %0,0,%2 # __spin_trylock\n\ cmpwi 0,%0,0\n\ bne- 2f\n\ stwcx. %1,0,%2\n\ bne- 1b\n\ isync\n\ -2:" : "=&r" (tmp), "=&r" (tmp2) - : "r" (&lock->slock), "i" (offsetof(struct paca_struct, lock_token)) +2:" : "=&r" (tmp) + : "r" (token), "r" (&lock->slock) : "cr0", "memory"); return tmp; @@ -113,11 +123,17 @@ static void __inline__ __raw_spin_lock_flags(raw_spinlock_t *lock, unsigned long static __inline__ void __raw_spin_unlock(raw_spinlock_t *lock) { - __asm__ __volatile__("lwsync # __raw_spin_unlock": : :"memory"); + __asm__ __volatile__(SYNC_ON_SMP" # __raw_spin_unlock" + : : :"memory"); lock->slock = 0; } +#ifdef CONFIG_PPC64 extern void __raw_spin_unlock_wait(raw_spinlock_t *lock); +#else +#define __raw_spin_unlock_wait(lock) \ + do { while (__raw_spin_is_locked(lock)) cpu_relax(); } while (0) +#endif /* * Read-write spinlocks, allowing multiple readers @@ -133,6 +149,14 @@ extern void __raw_spin_unlock_wait(raw_spinlock_t *lock); #define __raw_read_can_lock(rw) ((rw)->lock >= 0) #define __raw_write_can_lock(rw) (!(rw)->lock) +#ifdef CONFIG_PPC64 +#define __DO_SIGN_EXTEND "extsw %0,%0\n" +#define WRLOCK_TOKEN LOCK_TOKEN /* it's negative */ +#else +#define __DO_SIGN_EXTEND +#define WRLOCK_TOKEN (-1) +#endif + /* * This returns the old value in the lock + 1, * so we got a read lock if the return value is > 0. @@ -142,11 +166,12 @@ static long __inline__ __read_trylock(raw_rwlock_t *rw) long tmp; __asm__ __volatile__( -"1: lwarx %0,0,%1 # read_trylock\n\ - extsw %0,%0\n\ - addic. %0,%0,1\n\ - ble- 2f\n\ - stwcx. %0,0,%1\n\ +"1: lwarx %0,0,%1 # read_trylock\n" + __DO_SIGN_EXTEND +" addic. %0,%0,1\n\ + ble- 2f\n" + PPC405_ERR77(0,%1) +" stwcx. %0,0,%1\n\ bne- 1b\n\ isync\n\ 2:" : "=&r" (tmp) @@ -162,18 +187,19 @@ static long __inline__ __read_trylock(raw_rwlock_t *rw) */ static __inline__ long __write_trylock(raw_rwlock_t *rw) { - long tmp, tmp2; + long tmp, token; + token = WRLOCK_TOKEN; __asm__ __volatile__( -" lwz %1,%3(13) # write_trylock\n\ -1: lwarx %0,0,%2\n\ +"1: lwarx %0,0,%2 # write_trylock\n\ cmpwi 0,%0,0\n\ - bne- 2f\n\ - stwcx. %1,0,%2\n\ + bne- 2f\n" + PPC405_ERR77(0,%1) +" stwcx. %1,0,%2\n\ bne- 1b\n\ isync\n\ -2:" : "=&r" (tmp), "=&r" (tmp2) - : "r" (&rw->lock), "i" (offsetof(struct paca_struct, lock_token)) +2:" : "=&r" (tmp) + : "r" (token), "r" (&rw->lock) : "cr0", "memory"); return tmp; @@ -224,8 +250,9 @@ static void __inline__ __raw_read_unlock(raw_rwlock_t *rw) __asm__ __volatile__( "eieio # read_unlock\n\ 1: lwarx %0,0,%1\n\ - addic %0,%0,-1\n\ - stwcx. %0,0,%1\n\ + addic %0,%0,-1\n" + PPC405_ERR77(0,%1) +" stwcx. %0,0,%1\n\ bne- 1b" : "=&r"(tmp) : "r"(&rw->lock) @@ -234,7 +261,8 @@ static void __inline__ __raw_read_unlock(raw_rwlock_t *rw) static __inline__ void __raw_write_unlock(raw_rwlock_t *rw) { - __asm__ __volatile__("lwsync # write_unlock": : :"memory"); + __asm__ __volatile__(SYNC_ON_SMP" # write_unlock" + : : :"memory"); rw->lock = 0; } diff --git a/include/asm-ppc64/spinlock_types.h b/include/asm-powerpc/spinlock_types.h index a37c8eabb9f2..74236c9f05b1 100644 --- a/include/asm-ppc64/spinlock_types.h +++ b/include/asm-powerpc/spinlock_types.h @@ -1,5 +1,5 @@ -#ifndef __ASM_SPINLOCK_TYPES_H -#define __ASM_SPINLOCK_TYPES_H +#ifndef _ASM_POWERPC_SPINLOCK_TYPES_H +#define _ASM_POWERPC_SPINLOCK_TYPES_H #ifndef __LINUX_SPINLOCK_TYPES_H # error "please don't include this file directly" diff --git a/include/asm-ppc64/sstep.h b/include/asm-powerpc/sstep.h index 4a68db50ee6f..630a9889c07c 100644 --- a/include/asm-ppc64/sstep.h +++ b/include/asm-powerpc/sstep.h @@ -16,8 +16,10 @@ struct pt_regs; * we don't allow putting a breakpoint on an mtmsrd instruction. * Similarly we don't allow breakpoints on rfid instructions. * These macros tell us if an instruction is a mtmsrd or rfid. + * Note that IS_MTMSRD returns true for both an mtmsr (32-bit) + * and an mtmsrd (64-bit). */ -#define IS_MTMSRD(instr) (((instr) & 0xfc0007fe) == 0x7c000164) +#define IS_MTMSRD(instr) (((instr) & 0xfc0007be) == 0x7c000124) #define IS_RFID(instr) (((instr) & 0xfc0007fe) == 0x4c000024) /* Emulate instructions that cause a transfer of control. */ diff --git a/include/asm-powerpc/stat.h b/include/asm-powerpc/stat.h new file mode 100644 index 000000000000..e4edc510b530 --- /dev/null +++ b/include/asm-powerpc/stat.h @@ -0,0 +1,81 @@ +#ifndef _ASM_POWERPC_STAT_H +#define _ASM_POWERPC_STAT_H +/* + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version + * 2 of the License, or (at your option) any later version. + */ +#include <linux/types.h> + +#define STAT_HAVE_NSEC 1 + +#ifndef __powerpc64__ +struct __old_kernel_stat { + unsigned short st_dev; + unsigned short st_ino; + unsigned short st_mode; + unsigned short st_nlink; + unsigned short st_uid; + unsigned short st_gid; + unsigned short st_rdev; + unsigned long st_size; + unsigned long st_atime; + unsigned long st_mtime; + unsigned long st_ctime; +}; +#endif /* !__powerpc64__ */ + +struct stat { + unsigned long st_dev; + ino_t st_ino; +#ifdef __powerpc64__ + nlink_t st_nlink; + mode_t st_mode; +#else + mode_t st_mode; + nlink_t st_nlink; +#endif + uid_t st_uid; + gid_t st_gid; + unsigned long st_rdev; + off_t st_size; + unsigned long st_blksize; + unsigned long st_blocks; + unsigned long st_atime; + unsigned long st_atime_nsec; + unsigned long st_mtime; + unsigned long st_mtime_nsec; + unsigned long st_ctime; + unsigned long st_ctime_nsec; + unsigned long __unused4; + unsigned long __unused5; +#ifdef __powerpc64__ + unsigned long __unused6; +#endif +}; + +/* This matches struct stat64 in glibc2.1. Only used for 32 bit. */ +struct stat64 { + unsigned long long st_dev; /* Device. */ + unsigned long long st_ino; /* File serial number. */ + unsigned int st_mode; /* File mode. */ + unsigned int st_nlink; /* Link count. */ + unsigned int st_uid; /* User ID of the file's owner. */ + unsigned int st_gid; /* Group ID of the file's group. */ + unsigned long long st_rdev; /* Device number, if device. */ + unsigned short __pad2; + long long st_size; /* Size of file, in bytes. */ + int st_blksize; /* Optimal block size for I/O. */ + long long st_blocks; /* Number 512-byte blocks allocated. */ + int st_atime; /* Time of last access. */ + unsigned int st_atime_nsec; + int st_mtime; /* Time of last modification. */ + unsigned int st_mtime_nsec; + int st_ctime; /* Time of last status change. */ + unsigned int st_ctime_nsec; + unsigned int __unused4; + unsigned int __unused5; +}; + +#endif /* _ASM_POWERPC_STAT_H */ diff --git a/include/asm-ppc64/statfs.h b/include/asm-powerpc/statfs.h index 3c985e5246a7..67024026c10d 100644 --- a/include/asm-ppc64/statfs.h +++ b/include/asm-powerpc/statfs.h @@ -1,12 +1,11 @@ -#ifndef _PPC64_STATFS_H -#define _PPC64_STATFS_H +#ifndef _ASM_POWERPC_STATFS_H +#define _ASM_POWERPC_STATFS_H -/* - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ +/* For ppc32 we just use the generic definitions, not so simple on ppc64 */ + +#ifndef __powerpc64__ +#include <asm-generic/statfs.h> +#else #ifndef __KERNEL_STRICT_NAMES #include <linux/types.h> @@ -57,5 +56,5 @@ struct compat_statfs64 { __u32 f_frsize; __u32 f_spare[5]; }; - -#endif /* _PPC64_STATFS_H */ +#endif /* ! __powerpc64__ */ +#endif diff --git a/include/asm-powerpc/synch.h b/include/asm-powerpc/synch.h new file mode 100644 index 000000000000..4660c0394a77 --- /dev/null +++ b/include/asm-powerpc/synch.h @@ -0,0 +1,51 @@ +#ifndef _ASM_POWERPC_SYNCH_H +#define _ASM_POWERPC_SYNCH_H + +#include <linux/config.h> + +#ifdef __powerpc64__ +#define __SUBARCH_HAS_LWSYNC +#endif + +#ifdef __SUBARCH_HAS_LWSYNC +# define LWSYNC lwsync +#else +# define LWSYNC sync +#endif + + +/* + * Arguably the bitops and *xchg operations don't imply any memory barrier + * or SMP ordering, but in fact a lot of drivers expect them to imply + * both, since they do on x86 cpus. + */ +#ifdef CONFIG_SMP +#define EIEIO_ON_SMP "eieio\n" +#define ISYNC_ON_SMP "\n\tisync" +#define SYNC_ON_SMP __stringify(LWSYNC) "\n" +#else +#define EIEIO_ON_SMP +#define ISYNC_ON_SMP +#define SYNC_ON_SMP +#endif + +static inline void eieio(void) +{ + __asm__ __volatile__ ("eieio" : : : "memory"); +} + +static inline void isync(void) +{ + __asm__ __volatile__ ("isync" : : : "memory"); +} + +#ifdef CONFIG_SMP +#define eieio_on_smp() eieio() +#define isync_on_smp() isync() +#else +#define eieio_on_smp() __asm__ __volatile__("": : :"memory") +#define isync_on_smp() __asm__ __volatile__("": : :"memory") +#endif + +#endif /* _ASM_POWERPC_SYNCH_H */ + diff --git a/include/asm-ppc64/system.h b/include/asm-powerpc/system.h index 375015c62f20..5341b75c75cb 100644 --- a/include/asm-ppc64/system.h +++ b/include/asm-powerpc/system.h @@ -1,19 +1,14 @@ -#ifndef __PPC64_SYSTEM_H -#define __PPC64_SYSTEM_H - /* - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. + * Copyright (C) 1999 Cort Dougan <cort@cs.nmt.edu> */ +#ifndef _ASM_POWERPC_SYSTEM_H +#define _ASM_POWERPC_SYSTEM_H #include <linux/config.h> -#include <linux/compiler.h> -#include <asm/page.h> -#include <asm/processor.h> +#include <linux/kernel.h> + #include <asm/hw_irq.h> -#include <asm/memory.h> +#include <asm/atomic.h> /* * Memory barrier. @@ -31,7 +26,9 @@ * * We have to use the sync instructions for mb(), since lwsync doesn't * order loads with respect to previous stores. Lwsync is fine for - * rmb(), though. + * rmb(), though. Note that lwsync is interpreted as sync by + * 32-bit and older 64-bit CPUs. + * * For wmb(), we use sync since wmb is used in drivers to order * stores to system memory with respect to writes to the device. * However, smp_wmb() can be a lighter-weight eieio barrier on @@ -42,19 +39,19 @@ #define wmb() __asm__ __volatile__ ("sync" : : : "memory") #define read_barrier_depends() do { } while(0) -#define set_mb(var, value) do { var = value; smp_mb(); } while (0) -#define set_wmb(var, value) do { var = value; smp_wmb(); } while (0) +#define set_mb(var, value) do { var = value; mb(); } while (0) +#define set_wmb(var, value) do { var = value; wmb(); } while (0) #ifdef CONFIG_SMP #define smp_mb() mb() #define smp_rmb() rmb() #define smp_wmb() __asm__ __volatile__ ("eieio" : : : "memory") -#define smp_read_barrier_depends() read_barrier_depends() +#define smp_read_barrier_depends() read_barrier_depends() #else -#define smp_mb() __asm__ __volatile__("": : :"memory") -#define smp_rmb() __asm__ __volatile__("": : :"memory") -#define smp_wmb() __asm__ __volatile__("": : :"memory") -#define smp_read_barrier_depends() do { } while(0) +#define smp_mb() barrier() +#define smp_rmb() barrier() +#define smp_wmb() barrier() +#define smp_read_barrier_depends() do { } while(0) #endif /* CONFIG_SMP */ #ifdef __KERNEL__ @@ -102,26 +99,40 @@ static inline int debugger_fault_handler(struct pt_regs *regs) { return 0; } #endif extern int set_dabr(unsigned long dabr); -extern void _exception(int signr, struct pt_regs *regs, int code, - unsigned long addr); -extern int fix_alignment(struct pt_regs *regs); -extern void bad_page_fault(struct pt_regs *regs, unsigned long address, - int sig); +extern void print_backtrace(unsigned long *); extern void show_regs(struct pt_regs * regs); -extern void low_hash_fault(struct pt_regs *regs, unsigned long address); -extern int die(const char *str, struct pt_regs *regs, long err); +extern void flush_instruction_cache(void); +extern void hard_reset_now(void); +extern void poweroff_now(void); + +#ifdef CONFIG_6xx +extern long _get_L2CR(void); +extern long _get_L3CR(void); +extern void _set_L2CR(unsigned long); +extern void _set_L3CR(unsigned long); +#else +#define _get_L2CR() 0L +#define _get_L3CR() 0L +#define _set_L2CR(val) do { } while(0) +#define _set_L3CR(val) do { } while(0) +#endif -extern int _get_PVR(void); +extern void via_cuda_init(void); +extern void read_rtc_time(void); +extern void pmac_find_display(void); extern void giveup_fpu(struct task_struct *); extern void disable_kernel_fp(void); -extern void flush_fp_to_thread(struct task_struct *); extern void enable_kernel_fp(void); -extern void giveup_altivec(struct task_struct *); -extern void disable_kernel_altivec(void); +extern void flush_fp_to_thread(struct task_struct *); extern void enable_kernel_altivec(void); +extern void giveup_altivec(struct task_struct *); +extern void load_up_altivec(struct task_struct *); extern int emulate_altivec(struct pt_regs *); -extern void cvt_fd(float *from, double *to, unsigned long *fpscr); -extern void cvt_df(double *from, float *to, unsigned long *fpscr); +extern void giveup_spe(struct task_struct *); +extern void load_up_spe(struct task_struct *); +extern int fix_alignment(struct pt_regs *); +extern void cvt_fd(float *from, double *to, struct thread_struct *thread); +extern void cvt_df(double *from, float *to, struct thread_struct *thread); #ifdef CONFIG_ALTIVEC extern void flush_altivec_to_thread(struct task_struct *); @@ -131,70 +142,92 @@ static inline void flush_altivec_to_thread(struct task_struct *t) } #endif -extern int mem_init_done; /* set on boot once kmalloc can be called */ +#ifdef CONFIG_SPE +extern void flush_spe_to_thread(struct task_struct *); +#else +static inline void flush_spe_to_thread(struct task_struct *t) +{ +} +#endif + +extern int call_rtas(const char *, int, int, unsigned long *, ...); +extern void cacheable_memzero(void *p, unsigned int nb); +extern void *cacheable_memcpy(void *, const void *, unsigned int); +extern int do_page_fault(struct pt_regs *, unsigned long, unsigned long); +extern void bad_page_fault(struct pt_regs *, unsigned long, int); +extern int die(const char *, struct pt_regs *, long); +extern void _exception(int, struct pt_regs *, int, unsigned long); +#ifdef CONFIG_BOOKE_WDT +extern u32 booke_wdt_enabled; +extern u32 booke_wdt_period; +#endif /* CONFIG_BOOKE_WDT */ /* EBCDIC -> ASCII conversion for [0-9A-Z] on iSeries */ extern unsigned char e2a(unsigned char); +struct device_node; +extern void note_scsi_host(struct device_node *, void *); + extern struct task_struct *__switch_to(struct task_struct *, - struct task_struct *); + struct task_struct *); #define switch_to(prev, next, last) ((last) = __switch_to((prev), (next))) struct thread_struct; -extern struct task_struct * _switch(struct thread_struct *prev, - struct thread_struct *next); +extern struct task_struct *_switch(struct thread_struct *prev, + struct thread_struct *next); -static inline int __is_processor(unsigned long pv) -{ - unsigned long pvr; - asm("mfspr %0, 0x11F" : "=r" (pvr)); - return(PVR_VER(pvr) == pv); -} +extern unsigned int rtas_data; +extern int mem_init_done; /* set on boot once kmalloc can be called */ +extern unsigned long memory_limit; +extern unsigned long klimit; + +extern int powersave_nap; /* set if nap mode can be used in idle loop */ /* * Atomic exchange * * Changes the memory location '*ptr' to be val and returns * the previous value stored there. - * - * Inline asm pulled from arch/ppc/kernel/misc.S so ppc64 - * is more like most of the other architectures. */ static __inline__ unsigned long -__xchg_u32(volatile unsigned int *m, unsigned long val) +__xchg_u32(volatile void *p, unsigned long val) { - unsigned long dummy; + unsigned long prev; __asm__ __volatile__( EIEIO_ON_SMP -"1: lwarx %0,0,%3 # __xchg_u32\n\ - stwcx. %2,0,%3\n\ -2: bne- 1b" +"1: lwarx %0,0,%2 \n" + PPC405_ERR77(0,%2) +" stwcx. %3,0,%2 \n\ + bne- 1b" ISYNC_ON_SMP - : "=&r" (dummy), "=m" (*m) - : "r" (val), "r" (m) + : "=&r" (prev), "=m" (*(volatile unsigned int *)p) + : "r" (p), "r" (val), "m" (*(volatile unsigned int *)p) : "cc", "memory"); - return (dummy); + return prev; } +#ifdef CONFIG_PPC64 static __inline__ unsigned long -__xchg_u64(volatile long *m, unsigned long val) +__xchg_u64(volatile void *p, unsigned long val) { - unsigned long dummy; + unsigned long prev; __asm__ __volatile__( EIEIO_ON_SMP -"1: ldarx %0,0,%3 # __xchg_u64\n\ - stdcx. %2,0,%3\n\ -2: bne- 1b" +"1: ldarx %0,0,%2 \n" + PPC405_ERR77(0,%2) +" stdcx. %3,0,%2 \n\ + bne- 1b" ISYNC_ON_SMP - : "=&r" (dummy), "=m" (*m) - : "r" (val), "r" (m) + : "=&r" (prev), "=m" (*(volatile unsigned long *)p) + : "r" (p), "r" (val), "m" (*(volatile unsigned long *)p) : "cc", "memory"); - return (dummy); + return prev; } +#endif /* * This function doesn't exist, so you'll get a linker error @@ -208,8 +241,10 @@ __xchg(volatile void *ptr, unsigned long x, unsigned int size) switch (size) { case 4: return __xchg_u32(ptr, x); +#ifdef CONFIG_PPC64 case 8: return __xchg_u64(ptr, x); +#endif } __xchg_called_with_bad_pointer(); return x; @@ -223,6 +258,10 @@ __xchg(volatile void *ptr, unsigned long x, unsigned int size) #define tas(ptr) (xchg((ptr),1)) +/* + * Compare and exchange - if *p == old, set it to new, + * and return the old value of *p. + */ #define __HAVE_ARCH_CMPXCHG 1 static __inline__ unsigned long @@ -234,8 +273,9 @@ __cmpxchg_u32(volatile unsigned int *p, unsigned long old, unsigned long new) EIEIO_ON_SMP "1: lwarx %0,0,%2 # __cmpxchg_u32\n\ cmpw 0,%0,%3\n\ - bne- 2f\n\ - stwcx. %4,0,%2\n\ + bne- 2f\n" + PPC405_ERR77(0,%2) +" stwcx. %4,0,%2\n\ bne- 1b" ISYNC_ON_SMP "\n\ @@ -247,8 +287,9 @@ __cmpxchg_u32(volatile unsigned int *p, unsigned long old, unsigned long new) return prev; } +#ifdef CONFIG_PPC64 static __inline__ unsigned long -__cmpxchg_u64(volatile long *p, unsigned long old, unsigned long new) +__cmpxchg_u64(volatile unsigned long *p, unsigned long old, unsigned long new) { unsigned long prev; @@ -268,6 +309,7 @@ __cmpxchg_u64(volatile long *p, unsigned long old, unsigned long new) return prev; } +#endif /* This function doesn't exist, so you'll get a linker error if something tries to do an invalid cmpxchg(). */ @@ -280,17 +322,24 @@ __cmpxchg(volatile void *ptr, unsigned long old, unsigned long new, switch (size) { case 4: return __cmpxchg_u32(ptr, old, new); +#ifdef CONFIG_PPC64 case 8: return __cmpxchg_u64(ptr, old, new); +#endif } __cmpxchg_called_with_bad_pointer(); return old; } -#define cmpxchg(ptr,o,n)\ - ((__typeof__(*(ptr)))__cmpxchg((ptr),(unsigned long)(o),\ - (unsigned long)(n),sizeof(*(ptr)))) +#define cmpxchg(ptr,o,n) \ + ({ \ + __typeof__(*(ptr)) _o_ = (o); \ + __typeof__(*(ptr)) _n_ = (n); \ + (__typeof__(*(ptr))) __cmpxchg((ptr), (unsigned long)_o_, \ + (unsigned long)_n_, sizeof(*(ptr))); \ + }) +#ifdef CONFIG_PPC64 /* * We handle most unaligned accesses in hardware. On the other hand * unaligned DMA can be very expensive on some ppc64 IO chips (it does @@ -299,10 +348,64 @@ __cmpxchg(volatile void *ptr, unsigned long old, unsigned long new, * Based on this we disable the IP header alignment in network drivers. */ #define NET_IP_ALIGN 0 +#endif #define arch_align_stack(x) (x) +/* Used in very early kernel initialization. */ extern unsigned long reloc_offset(void); +extern unsigned long add_reloc_offset(unsigned long); +extern void reloc_got2(unsigned long); -#endif /* __KERNEL__ */ +#define PTRRELOC(x) ((typeof(x)) add_reloc_offset((unsigned long)(x))) + +static inline void create_instruction(unsigned long addr, unsigned int instr) +{ + unsigned int *p; + p = (unsigned int *)addr; + *p = instr; + asm ("dcbst 0, %0; sync; icbi 0,%0; sync; isync" : : "r" (p)); +} + +/* Flags for create_branch: + * "b" == create_branch(addr, target, 0); + * "ba" == create_branch(addr, target, BRANCH_ABSOLUTE); + * "bl" == create_branch(addr, target, BRANCH_SET_LINK); + * "bla" == create_branch(addr, target, BRANCH_ABSOLUTE | BRANCH_SET_LINK); + */ +#define BRANCH_SET_LINK 0x1 +#define BRANCH_ABSOLUTE 0x2 + +static inline void create_branch(unsigned long addr, + unsigned long target, int flags) +{ + unsigned int instruction; + + if (! (flags & BRANCH_ABSOLUTE)) + target = target - addr; + + /* Mask out the flags and target, so they don't step on each other. */ + instruction = 0x48000000 | (flags & 0x3) | (target & 0x03FFFFFC); + + create_instruction(addr, instruction); +} + +static inline void create_function_call(unsigned long addr, void * func) +{ + unsigned long func_addr; + +#ifdef CONFIG_PPC64 + /* + * On PPC64 the function pointer actually points to the function's + * descriptor. The first entry in the descriptor is the address + * of the function text. + */ + func_addr = *(unsigned long *)func; +#else + func_addr = (unsigned long)func; #endif + create_branch(addr, func_addr, BRANCH_SET_LINK); +} + +#endif /* __KERNEL__ */ +#endif /* _ASM_POWERPC_SYSTEM_H */ diff --git a/include/asm-powerpc/tce.h b/include/asm-powerpc/tce.h new file mode 100644 index 000000000000..980a094fd5a7 --- /dev/null +++ b/include/asm-powerpc/tce.h @@ -0,0 +1,64 @@ +/* + * Copyright (C) 2001 Mike Corrigan & Dave Engebretsen, IBM Corporation + * Rewrite, cleanup: + * Copyright (C) 2004 Olof Johansson <olof@lixom.net>, IBM Corporation + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#ifndef _ASM_POWERPC_TCE_H +#define _ASM_POWERPC_TCE_H + +/* + * Tces come in two formats, one for the virtual bus and a different + * format for PCI + */ +#define TCE_VB 0 +#define TCE_PCI 1 + +/* TCE page size is 4096 bytes (1 << 12) */ + +#define TCE_SHIFT 12 +#define TCE_PAGE_SIZE (1 << TCE_SHIFT) +#define TCE_PAGE_FACTOR (PAGE_SHIFT - TCE_SHIFT) + + +/* tce_entry + * Used by pSeries (SMP) and iSeries/pSeries LPAR, but there it's + * abstracted so layout is irrelevant. + */ +union tce_entry { + unsigned long te_word; + struct { + unsigned int tb_cacheBits :6; /* Cache hash bits - not used */ + unsigned int tb_rsvd :6; + unsigned long tb_rpn :40; /* Real page number */ + unsigned int tb_valid :1; /* Tce is valid (vb only) */ + unsigned int tb_allio :1; /* Tce is valid for all lps (vb only) */ + unsigned int tb_lpindex :8; /* LpIndex for user of TCE (vb only) */ + unsigned int tb_pciwr :1; /* Write allowed (pci only) */ + unsigned int tb_rdwr :1; /* Read allowed (pci), Write allowed (vb) */ + } te_bits; +#define te_cacheBits te_bits.tb_cacheBits +#define te_rpn te_bits.tb_rpn +#define te_valid te_bits.tb_valid +#define te_allio te_bits.tb_allio +#define te_lpindex te_bits.tb_lpindex +#define te_pciwr te_bits.tb_pciwr +#define te_rdwr te_bits.tb_rdwr +}; + + +#endif /* _ASM_POWERPC_TCE_H */ diff --git a/include/asm-powerpc/termios.h b/include/asm-powerpc/termios.h index c5b8e5358f83..7f80a019b6a0 100644 --- a/include/asm-powerpc/termios.h +++ b/include/asm-powerpc/termios.h @@ -94,142 +94,9 @@ struct termio { #define INIT_C_CC "\003\034\177\025\004\001\000\000\000\000\027\022\032\021\023\026\025" #endif -#define FIOCLEX _IO('f', 1) -#define FIONCLEX _IO('f', 2) -#define FIOASYNC _IOW('f', 125, int) -#define FIONBIO _IOW('f', 126, int) -#define FIONREAD _IOR('f', 127, int) -#define TIOCINQ FIONREAD - -#define TIOCGETP _IOR('t', 8, struct sgttyb) -#define TIOCSETP _IOW('t', 9, struct sgttyb) -#define TIOCSETN _IOW('t', 10, struct sgttyb) /* TIOCSETP wo flush */ - -#define TIOCSETC _IOW('t', 17, struct tchars) -#define TIOCGETC _IOR('t', 18, struct tchars) -#define TCGETS _IOR('t', 19, struct termios) -#define TCSETS _IOW('t', 20, struct termios) -#define TCSETSW _IOW('t', 21, struct termios) -#define TCSETSF _IOW('t', 22, struct termios) - -#define TCGETA _IOR('t', 23, struct termio) -#define TCSETA _IOW('t', 24, struct termio) -#define TCSETAW _IOW('t', 25, struct termio) -#define TCSETAF _IOW('t', 28, struct termio) - -#define TCSBRK _IO('t', 29) -#define TCXONC _IO('t', 30) -#define TCFLSH _IO('t', 31) - -#define TIOCSWINSZ _IOW('t', 103, struct winsize) -#define TIOCGWINSZ _IOR('t', 104, struct winsize) -#define TIOCSTART _IO('t', 110) /* start output, like ^Q */ -#define TIOCSTOP _IO('t', 111) /* stop output, like ^S */ -#define TIOCOUTQ _IOR('t', 115, int) /* output queue size */ - -#define TIOCGLTC _IOR('t', 116, struct ltchars) -#define TIOCSLTC _IOW('t', 117, struct ltchars) -#define TIOCSPGRP _IOW('t', 118, int) -#define TIOCGPGRP _IOR('t', 119, int) - -#define TIOCEXCL 0x540C -#define TIOCNXCL 0x540D -#define TIOCSCTTY 0x540E - -#define TIOCSTI 0x5412 -#define TIOCMGET 0x5415 -#define TIOCMBIS 0x5416 -#define TIOCMBIC 0x5417 -#define TIOCMSET 0x5418 -#define TIOCGSOFTCAR 0x5419 -#define TIOCSSOFTCAR 0x541A -#define TIOCLINUX 0x541C -#define TIOCCONS 0x541D -#define TIOCGSERIAL 0x541E -#define TIOCSSERIAL 0x541F -#define TIOCPKT 0x5420 - -#define TIOCNOTTY 0x5422 -#define TIOCSETD 0x5423 -#define TIOCGETD 0x5424 -#define TCSBRKP 0x5425 /* Needed for POSIX tcsendbreak() */ - -#define TIOCSERCONFIG 0x5453 -#define TIOCSERGWILD 0x5454 -#define TIOCSERSWILD 0x5455 -#define TIOCGLCKTRMIOS 0x5456 -#define TIOCSLCKTRMIOS 0x5457 -#define TIOCSERGSTRUCT 0x5458 /* For debugging only */ -#define TIOCSERGETLSR 0x5459 /* Get line status register */ -#define TIOCSERGETMULTI 0x545A /* Get multiport config */ -#define TIOCSERSETMULTI 0x545B /* Set multiport config */ - -#define TIOCMIWAIT 0x545C /* wait for a change on serial input line(s) */ -#define TIOCGICOUNT 0x545D /* read serial port inline interrupt counts */ - -/* Used for packet mode */ -#define TIOCPKT_DATA 0 -#define TIOCPKT_FLUSHREAD 1 -#define TIOCPKT_FLUSHWRITE 2 -#define TIOCPKT_STOP 4 -#define TIOCPKT_START 8 -#define TIOCPKT_NOSTOP 16 -#define TIOCPKT_DOSTOP 32 - -/* modem lines */ -#define TIOCM_LE 0x001 -#define TIOCM_DTR 0x002 -#define TIOCM_RTS 0x004 -#define TIOCM_ST 0x008 -#define TIOCM_SR 0x010 -#define TIOCM_CTS 0x020 -#define TIOCM_CAR 0x040 -#define TIOCM_RNG 0x080 -#define TIOCM_DSR 0x100 -#define TIOCM_CD TIOCM_CAR -#define TIOCM_RI TIOCM_RNG -#define TIOCM_OUT1 0x2000 -#define TIOCM_OUT2 0x4000 -#define TIOCM_LOOP 0x8000 - -/* ioctl (fd, TIOCSERGETLSR, &result) where result may be as below */ -#define TIOCSER_TEMT 0x01 /* Transmitter physically empty */ - #ifdef __KERNEL__ -/* - * Translate a "termio" structure into a "termios". Ugh. - */ -#define SET_LOW_TERMIOS_BITS(termios, termio, x) { \ - unsigned short __tmp; \ - get_user(__tmp,&(termio)->x); \ - (termios)->x = (0xffff0000 & (termios)->x) | __tmp; \ -} - -#define user_termio_to_kernel_termios(termios, termio) \ -({ \ - SET_LOW_TERMIOS_BITS(termios, termio, c_iflag); \ - SET_LOW_TERMIOS_BITS(termios, termio, c_oflag); \ - SET_LOW_TERMIOS_BITS(termios, termio, c_cflag); \ - SET_LOW_TERMIOS_BITS(termios, termio, c_lflag); \ - copy_from_user((termios)->c_cc, (termio)->c_cc, NCC); \ -}) - -/* - * Translate a "termios" structure into a "termio". Ugh. - */ -#define kernel_termios_to_user_termio(termio, termios) \ -({ \ - put_user((termios)->c_iflag, &(termio)->c_iflag); \ - put_user((termios)->c_oflag, &(termio)->c_oflag); \ - put_user((termios)->c_cflag, &(termio)->c_cflag); \ - put_user((termios)->c_lflag, &(termio)->c_lflag); \ - put_user((termios)->c_line, &(termio)->c_line); \ - copy_to_user((termio)->c_cc, (termios)->c_cc, NCC); \ -}) - -#define user_termios_to_kernel_termios(k, u) copy_from_user(k, u, sizeof(struct termios)) -#define kernel_termios_to_user_termios(u, k) copy_to_user(u, k, sizeof(struct termios)) +#include <asm-generic/termios.h> #endif /* __KERNEL__ */ diff --git a/include/asm-ppc64/thread_info.h b/include/asm-powerpc/thread_info.h index 0494df6fca74..e525f49bd179 100644 --- a/include/asm-ppc64/thread_info.h +++ b/include/asm-powerpc/thread_info.h @@ -1,15 +1,25 @@ -/* thread_info.h: PPC low-level thread information +/* thread_info.h: PowerPC low-level thread information * adapted from the i386 version by Paul Mackerras * * Copyright (C) 2002 David Howells (dhowells@redhat.com) * - Incorporating suggestions made by Linus Torvalds and Dave Miller */ -#ifndef _ASM_THREAD_INFO_H -#define _ASM_THREAD_INFO_H +#ifndef _ASM_POWERPC_THREAD_INFO_H +#define _ASM_POWERPC_THREAD_INFO_H #ifdef __KERNEL__ +/* We have 8k stacks on ppc32 and 16k on ppc64 */ + +#ifdef CONFIG_PPC64 +#define THREAD_SHIFT 14 +#else +#define THREAD_SHIFT 13 +#endif + +#define THREAD_SIZE (1 << THREAD_SHIFT) + #ifndef __ASSEMBLY__ #include <linux/config.h> #include <linux/cache.h> @@ -24,7 +34,8 @@ struct thread_info { struct task_struct *task; /* main task structure */ struct exec_domain *exec_domain; /* execution domain */ int cpu; /* cpu we're on */ - int preempt_count; /* 0 => preemptable, <0 => BUG */ + int preempt_count; /* 0 => preemptable, + <0 => BUG */ struct restart_block restart_block; /* set by force_successful_syscall_return */ unsigned char syscall_noerror; @@ -54,32 +65,42 @@ struct thread_info { /* thread information allocation */ -#define THREAD_ORDER 2 -#define THREAD_SIZE (PAGE_SIZE << THREAD_ORDER) -#define THREAD_SHIFT (PAGE_SHIFT + THREAD_ORDER) +#if THREAD_SHIFT >= PAGE_SHIFT + +#define THREAD_ORDER (THREAD_SHIFT - PAGE_SHIFT) + #ifdef CONFIG_DEBUG_STACK_USAGE -#define alloc_thread_info(tsk) \ - ({ \ - struct thread_info *ret; \ - \ - ret = kmalloc(THREAD_SIZE, GFP_KERNEL); \ - if (ret) \ - memset(ret, 0, THREAD_SIZE); \ - ret; \ - }) +#define alloc_thread_info(tsk) \ + ((struct thread_info *)__get_free_pages(GFP_KERNEL | \ + __GFP_ZERO, THREAD_ORDER)) #else -#define alloc_thread_info(tsk) kmalloc(THREAD_SIZE, GFP_KERNEL) +#define alloc_thread_info(tsk) \ + ((struct thread_info *)__get_free_pages(GFP_KERNEL, THREAD_ORDER)) +#endif +#define free_thread_info(ti) free_pages((unsigned long)ti, THREAD_ORDER) + +#else /* THREAD_SHIFT < PAGE_SHIFT */ + +#ifdef CONFIG_DEBUG_STACK_USAGE +#define alloc_thread_info(tsk) kzalloc(THREAD_SIZE, GFP_KERNEL) +#else +#define alloc_thread_info(tsk) kmalloc(THREAD_SIZE, GFP_KERNEL) #endif #define free_thread_info(ti) kfree(ti) + +#endif /* THREAD_SHIFT < PAGE_SHIFT */ + #define get_thread_info(ti) get_task_struct((ti)->task) #define put_thread_info(ti) put_task_struct((ti)->task) /* how to get the thread information struct from C */ static inline struct thread_info *current_thread_info(void) { - struct thread_info *ti; - __asm__("clrrdi %0,1,%1" : "=r"(ti) : "i" (THREAD_SHIFT)); - return ti; + register unsigned long sp asm("r1"); + + /* gcc4, at least, is smart enough to turn this into a single + * rlwinm for ppc32 and clrrdi for ppc64 */ + return (struct thread_info *)(sp & ~(THREAD_SIZE-1)); } #endif /* __ASSEMBLY__ */ @@ -122,4 +143,4 @@ static inline struct thread_info *current_thread_info(void) #endif /* __KERNEL__ */ -#endif /* _ASM_THREAD_INFO_H */ +#endif /* _ASM_POWERPC_THREAD_INFO_H */ diff --git a/include/asm-powerpc/time.h b/include/asm-powerpc/time.h new file mode 100644 index 000000000000..d9b86a17271b --- /dev/null +++ b/include/asm-powerpc/time.h @@ -0,0 +1,226 @@ +/* + * Common time prototypes and such for all ppc machines. + * + * Written by Cort Dougan (cort@cs.nmt.edu) to merge + * Paul Mackerras' version and mine for PReP and Pmac. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version + * 2 of the License, or (at your option) any later version. + */ + +#ifndef __POWERPC_TIME_H +#define __POWERPC_TIME_H + +#ifdef __KERNEL__ +#include <linux/config.h> +#include <linux/types.h> +#include <linux/percpu.h> + +#include <asm/processor.h> +#ifdef CONFIG_PPC64 +#include <asm/paca.h> +#include <asm/iseries/hv_call.h> +#endif + +/* time.c */ +extern unsigned long tb_ticks_per_jiffy; +extern unsigned long tb_ticks_per_usec; +extern unsigned long tb_ticks_per_sec; +extern u64 tb_to_xs; +extern unsigned tb_to_us; +extern unsigned long tb_last_stamp; +extern u64 tb_last_jiffy; + +DECLARE_PER_CPU(unsigned long, last_jiffy); + +struct rtc_time; +extern void to_tm(int tim, struct rtc_time * tm); +extern time_t last_rtc_update; + +extern void generic_calibrate_decr(void); +extern void wakeup_decrementer(void); + +/* Some sane defaults: 125 MHz timebase, 1GHz processor */ +extern unsigned long ppc_proc_freq; +#define DEFAULT_PROC_FREQ (DEFAULT_TB_FREQ * 8) +extern unsigned long ppc_tb_freq; +#define DEFAULT_TB_FREQ 125000000UL + +/* + * By putting all of this stuff into a single struct we + * reduce the number of cache lines touched by do_gettimeofday. + * Both by collecting all of the data in one cache line and + * by touching only one TOC entry on ppc64. + */ +struct gettimeofday_vars { + u64 tb_to_xs; + u64 stamp_xsec; + u64 tb_orig_stamp; +}; + +struct gettimeofday_struct { + unsigned long tb_ticks_per_sec; + struct gettimeofday_vars vars[2]; + struct gettimeofday_vars * volatile varp; + unsigned var_idx; + unsigned tb_to_us; +}; + +struct div_result { + u64 result_high; + u64 result_low; +}; + +/* Accessor functions for the timebase (RTC on 601) registers. */ +/* If one day CONFIG_POWER is added just define __USE_RTC as 1 */ +#ifdef CONFIG_6xx +#define __USE_RTC() (!cpu_has_feature(CPU_FTR_USE_TB)) +#else +#define __USE_RTC() 0 +#endif + +/* On ppc64 this gets us the whole timebase; on ppc32 just the lower half */ +static inline unsigned long get_tbl(void) +{ + unsigned long tbl; + +#if defined(CONFIG_403GCX) + asm volatile("mfspr %0, 0x3dd" : "=r" (tbl)); +#else + asm volatile("mftb %0" : "=r" (tbl)); +#endif + return tbl; +} + +static inline unsigned int get_tbu(void) +{ + unsigned int tbu; + +#if defined(CONFIG_403GCX) + asm volatile("mfspr %0, 0x3dc" : "=r" (tbu)); +#else + asm volatile("mftbu %0" : "=r" (tbu)); +#endif + return tbu; +} + +static inline unsigned int get_rtcl(void) +{ + unsigned int rtcl; + + asm volatile("mfrtcl %0" : "=r" (rtcl)); + return rtcl; +} + +static inline u64 get_rtc(void) +{ + unsigned int hi, lo, hi2; + + do { + asm volatile("mfrtcu %0; mfrtcl %1; mfrtcu %2" + : "=r" (hi), "=r" (lo), "=r" (hi2)); + } while (hi2 != hi); + return (u64)hi * 1000000000 + lo; +} + +#ifdef CONFIG_PPC64 +static inline u64 get_tb(void) +{ + return mftb(); +} +#else +static inline u64 get_tb(void) +{ + unsigned int tbhi, tblo, tbhi2; + + do { + tbhi = get_tbu(); + tblo = get_tbl(); + tbhi2 = get_tbu(); + } while (tbhi != tbhi2); + + return ((u64)tbhi << 32) | tblo; +} +#endif + +static inline void set_tb(unsigned int upper, unsigned int lower) +{ + mtspr(SPRN_TBWL, 0); + mtspr(SPRN_TBWU, upper); + mtspr(SPRN_TBWL, lower); +} + +/* Accessor functions for the decrementer register. + * The 4xx doesn't even have a decrementer. I tried to use the + * generic timer interrupt code, which seems OK, with the 4xx PIT + * in auto-reload mode. The problem is PIT stops counting when it + * hits zero. If it would wrap, we could use it just like a decrementer. + */ +static inline unsigned int get_dec(void) +{ +#if defined(CONFIG_40x) + return (mfspr(SPRN_PIT)); +#else + return (mfspr(SPRN_DEC)); +#endif +} + +static inline void set_dec(int val) +{ +#if defined(CONFIG_40x) + return; /* Have to let it auto-reload */ +#elif defined(CONFIG_8xx_CPU6) + set_dec_cpu6(val); +#else +#ifdef CONFIG_PPC_ISERIES + struct paca_struct *lpaca = get_paca(); + int cur_dec; + + if (lpaca->lppaca.shared_proc) { + lpaca->lppaca.virtual_decr = val; + cur_dec = get_dec(); + if (cur_dec > val) + HvCall_setVirtualDecr(); + } else +#endif + mtspr(SPRN_DEC, val); +#endif /* not 40x or 8xx_CPU6 */ +} + +static inline unsigned long tb_ticks_since(unsigned long tstamp) +{ + if (__USE_RTC()) { + int delta = get_rtcl() - (unsigned int) tstamp; + return delta < 0 ? delta + 1000000000 : delta; + } + return get_tbl() - tstamp; +} + +#define mulhwu(x,y) \ +({unsigned z; asm ("mulhwu %0,%1,%2" : "=r" (z) : "r" (x), "r" (y)); z;}) + +#ifdef CONFIG_PPC64 +#define mulhdu(x,y) \ +({unsigned long z; asm ("mulhdu %0,%1,%2" : "=r" (z) : "r" (x), "r" (y)); z;}) +#else +extern u64 mulhdu(u64, u64); +#endif + +extern void smp_space_timers(unsigned int); + +extern unsigned mulhwu_scale_factor(unsigned, unsigned); +extern void div128_by_32(u64 dividend_high, u64 dividend_low, + unsigned divisor, struct div_result *dr); + +/* Used to store Processor Utilization register (purr) values */ + +struct cpu_usage { + u64 current_tb; /* Holds the current purr register values */ +}; + +DECLARE_PER_CPU(struct cpu_usage, cpu_usage_array); + +#endif /* __KERNEL__ */ +#endif /* __PPC64_TIME_H */ diff --git a/include/asm-powerpc/timex.h b/include/asm-powerpc/timex.h index 51c5b316be55..c02d15aced91 100644 --- a/include/asm-powerpc/timex.h +++ b/include/asm-powerpc/timex.h @@ -10,7 +10,7 @@ #include <linux/config.h> #include <asm/cputable.h> -#define CLOCK_TICK_RATE 1193180 /* Underlying HZ */ +#define CLOCK_TICK_RATE 1024000 /* Underlying HZ */ typedef unsigned long cycles_t; diff --git a/include/asm-ppc/tlb.h b/include/asm-powerpc/tlb.h index 2c142c5d8584..56659f121779 100644 --- a/include/asm-ppc/tlb.h +++ b/include/asm-powerpc/tlb.h @@ -1,6 +1,7 @@ /* - * TLB shootdown specifics for PPC + * TLB shootdown specifics for powerpc * + * Copyright (C) 2002 Anton Blanchard, IBM Corp. * Copyright (C) 2002 Paul Mackerras, IBM Corp. * * This program is free software; you can redistribute it and/or @@ -8,29 +9,53 @@ * as published by the Free Software Foundation; either version * 2 of the License, or (at your option) any later version. */ -#ifndef _PPC_TLB_H -#define _PPC_TLB_H +#ifndef _ASM_POWERPC_TLB_H +#define _ASM_POWERPC_TLB_H #include <linux/config.h> +#ifndef __powerpc64__ #include <asm/pgtable.h> +#endif #include <asm/pgalloc.h> #include <asm/tlbflush.h> +#ifndef __powerpc64__ #include <asm/page.h> #include <asm/mmu.h> - -#ifdef CONFIG_PPC_STD_MMU -/* Classic PPC with hash-table based MMU... */ +#endif struct mmu_gather; + +#define tlb_start_vma(tlb, vma) do { } while (0) +#define tlb_end_vma(tlb, vma) do { } while (0) + +#if !defined(CONFIG_PPC_STD_MMU) + +#define tlb_flush(tlb) flush_tlb_mm((tlb)->mm) + +#elif defined(__powerpc64__) + +extern void pte_free_finish(void); + +static inline void tlb_flush(struct mmu_gather *tlb) +{ + flush_tlb_pending(); + pte_free_finish(); +} + +#else + extern void tlb_flush(struct mmu_gather *tlb); +#endif + /* Get the generic bits... */ #include <asm-generic/tlb.h> -/* Nothing needed here in fact... */ -#define tlb_start_vma(tlb, vma) do { } while (0) -#define tlb_end_vma(tlb, vma) do { } while (0) +#if !defined(CONFIG_PPC_STD_MMU) || defined(__powerpc64__) + +#define __tlb_remove_tlb_entry(tlb, pte, address) do { } while (0) +#else extern void flush_hash_entry(struct mm_struct *mm, pte_t *ptep, unsigned long address); @@ -41,17 +66,5 @@ static inline void __tlb_remove_tlb_entry(struct mmu_gather *tlb, pte_t *ptep, flush_hash_entry(tlb->mm, ptep, address); } -#else -/* Embedded PPC with software-loaded TLB, very simple... */ - -#define tlb_start_vma(tlb, vma) do { } while (0) -#define tlb_end_vma(tlb, vma) do { } while (0) -#define __tlb_remove_tlb_entry(tlb, pte, address) do { } while (0) -#define tlb_flush(tlb) flush_tlb_mm((tlb)->mm) - -/* Get the generic bits... */ -#include <asm-generic/tlb.h> - -#endif /* CONFIG_PPC_STD_MMU */ - -#endif /* __PPC_TLB_H */ +#endif +#endif /* __ASM_POWERPC_TLB_H */ diff --git a/include/asm-powerpc/tlbflush.h b/include/asm-powerpc/tlbflush.h new file mode 100644 index 000000000000..a2998eee37bb --- /dev/null +++ b/include/asm-powerpc/tlbflush.h @@ -0,0 +1,147 @@ +#ifndef _ASM_POWERPC_TLBFLUSH_H +#define _ASM_POWERPC_TLBFLUSH_H +/* + * TLB flushing: + * + * - flush_tlb_mm(mm) flushes the specified mm context TLB's + * - flush_tlb_page(vma, vmaddr) flushes one page + * - flush_tlb_page_nohash(vma, vmaddr) flushes one page if SW loaded TLB + * - flush_tlb_range(vma, start, end) flushes a range of pages + * - flush_tlb_kernel_range(start, end) flushes a range of kernel pages + * - flush_tlb_pgtables(mm, start, end) flushes a range of page tables + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version + * 2 of the License, or (at your option) any later version. + */ +#ifdef __KERNEL__ + +#include <linux/config.h> + +struct mm_struct; + +#ifdef CONFIG_PPC64 + +#include <linux/percpu.h> +#include <asm/page.h> + +#define PPC64_TLB_BATCH_NR 192 + +struct ppc64_tlb_batch { + unsigned long index; + struct mm_struct *mm; + real_pte_t pte[PPC64_TLB_BATCH_NR]; + unsigned long vaddr[PPC64_TLB_BATCH_NR]; + unsigned int psize; +}; +DECLARE_PER_CPU(struct ppc64_tlb_batch, ppc64_tlb_batch); + +extern void __flush_tlb_pending(struct ppc64_tlb_batch *batch); + +static inline void flush_tlb_pending(void) +{ + struct ppc64_tlb_batch *batch = &get_cpu_var(ppc64_tlb_batch); + + if (batch->index) + __flush_tlb_pending(batch); + put_cpu_var(ppc64_tlb_batch); +} + +extern void flush_hash_page(unsigned long va, real_pte_t pte, int psize, + int local); +extern void flush_hash_range(unsigned long number, int local); + +#else /* CONFIG_PPC64 */ + +#include <linux/mm.h> + +extern void _tlbie(unsigned long address); +extern void _tlbia(void); + +/* + * TODO: (CONFIG_FSL_BOOKE) determine if flush_tlb_range & + * flush_tlb_kernel_range are best implemented as tlbia vs + * specific tlbie's + */ + +#if (defined(CONFIG_4xx) && !defined(CONFIG_44x)) || defined(CONFIG_8xx) +#define flush_tlb_pending() asm volatile ("tlbia; sync" : : : "memory") +#elif defined(CONFIG_4xx) || defined(CONFIG_FSL_BOOKE) +#define flush_tlb_pending() _tlbia() +#endif + +/* + * This gets called at the end of handling a page fault, when + * the kernel has put a new PTE into the page table for the process. + * We use it to ensure coherency between the i-cache and d-cache + * for the page which has just been mapped in. + * On machines which use an MMU hash table, we use this to put a + * corresponding HPTE into the hash table ahead of time, instead of + * waiting for the inevitable extra hash-table miss exception. + */ +extern void update_mmu_cache(struct vm_area_struct *, unsigned long, pte_t); + +#endif /* CONFIG_PPC64 */ + +#if defined(CONFIG_PPC64) || defined(CONFIG_4xx) || \ + defined(CONFIG_FSL_BOOKE) || defined(CONFIG_8xx) + +static inline void flush_tlb_mm(struct mm_struct *mm) +{ + flush_tlb_pending(); +} + +static inline void flush_tlb_page(struct vm_area_struct *vma, + unsigned long vmaddr) +{ +#ifdef CONFIG_PPC64 + flush_tlb_pending(); +#else + _tlbie(vmaddr); +#endif +} + +static inline void flush_tlb_page_nohash(struct vm_area_struct *vma, + unsigned long vmaddr) +{ +#ifndef CONFIG_PPC64 + _tlbie(vmaddr); +#endif +} + +static inline void flush_tlb_range(struct vm_area_struct *vma, + unsigned long start, unsigned long end) +{ + flush_tlb_pending(); +} + +static inline void flush_tlb_kernel_range(unsigned long start, + unsigned long end) +{ + flush_tlb_pending(); +} + +#else /* 6xx, 7xx, 7xxx cpus */ + +extern void flush_tlb_mm(struct mm_struct *mm); +extern void flush_tlb_page(struct vm_area_struct *vma, unsigned long vmaddr); +extern void flush_tlb_page_nohash(struct vm_area_struct *vma, unsigned long addr); +extern void flush_tlb_range(struct vm_area_struct *vma, unsigned long start, + unsigned long end); +extern void flush_tlb_kernel_range(unsigned long start, unsigned long end); + +#endif + +/* + * This is called in munmap when we have freed up some page-table + * pages. We don't need to do anything here, there's nothing special + * about our page-table pages. -- paulus + */ +static inline void flush_tlb_pgtables(struct mm_struct *mm, + unsigned long start, unsigned long end) +{ +} + +#endif /*__KERNEL__ */ +#endif /* _ASM_POWERPC_TLBFLUSH_H */ diff --git a/include/asm-powerpc/topology.h b/include/asm-powerpc/topology.h index 2512e3836bf4..db8095cbe09b 100644 --- a/include/asm-powerpc/topology.h +++ b/include/asm-powerpc/topology.h @@ -9,15 +9,7 @@ static inline int cpu_to_node(int cpu) { - int node; - - node = numa_cpu_lookup_table[cpu]; - -#ifdef DEBUG_NUMA - BUG_ON(node == -1); -#endif - - return node; + return numa_cpu_lookup_table[cpu]; } #define parent_node(node) (node) @@ -37,8 +29,6 @@ static inline int node_to_first_cpu(int node) #define pcibus_to_node(node) (-1) #define pcibus_to_cpumask(bus) (cpu_online_map) -#define nr_cpus_node(node) (nr_cpus_in_node[node]) - /* sched_domains SD_NODE_INIT for PPC64 machines */ #define SD_NODE_INIT (struct sched_domain) { \ .span = CPU_MASK_NONE, \ @@ -51,6 +41,10 @@ static inline int node_to_first_cpu(int node) .cache_hot_time = (10*1000000), \ .cache_nice_tries = 1, \ .per_cpu_gain = 100, \ + .busy_idx = 3, \ + .idle_idx = 1, \ + .newidle_idx = 2, \ + .wake_idx = 1, \ .flags = SD_LOAD_BALANCE \ | SD_BALANCE_EXEC \ | SD_BALANCE_NEWIDLE \ diff --git a/include/asm-ppc64/types.h b/include/asm-powerpc/types.h index bf294c1761b2..ec3c2ee8bf86 100644 --- a/include/asm-ppc64/types.h +++ b/include/asm-powerpc/types.h @@ -1,5 +1,5 @@ -#ifndef _PPC64_TYPES_H -#define _PPC64_TYPES_H +#ifndef _ASM_POWERPC_TYPES_H +#define _ASM_POWERPC_TYPES_H #ifndef __ASSEMBLY__ @@ -16,7 +16,11 @@ * 2 of the License, or (at your option) any later version. */ +#ifdef __powerpc64__ typedef unsigned int umode_t; +#else +typedef unsigned short umode_t; +#endif /* * __xx is ok: it doesn't pollute the POSIX namespace. Use these in the @@ -32,8 +36,15 @@ typedef unsigned short __u16; typedef __signed__ int __s32; typedef unsigned int __u32; +#ifdef __powerpc64__ typedef __signed__ long __s64; typedef unsigned long __u64; +#else +#if defined(__GNUC__) && !defined(__STRICT_ANSI__) +typedef __signed__ long long __s64; +typedef unsigned long long __u64; +#endif +#endif /* __powerpc64__ */ typedef struct { __u32 u[4]; @@ -45,10 +56,16 @@ typedef struct { /* * These aren't exported outside the kernel to avoid name space clashes */ +#ifdef __powerpc64__ #define BITS_PER_LONG 64 +#else +#define BITS_PER_LONG 32 +#endif #ifndef __ASSEMBLY__ +#include <linux/config.h> + typedef signed char s8; typedef unsigned char u8; @@ -58,12 +75,21 @@ typedef unsigned short u16; typedef signed int s32; typedef unsigned int u32; +#ifdef __powerpc64__ typedef signed long s64; typedef unsigned long u64; +#else +typedef signed long long s64; +typedef unsigned long long u64; +#endif typedef __vector128 vector128; +#ifdef __powerpc64__ +typedef u64 dma_addr_t; +#else typedef u32 dma_addr_t; +#endif typedef u64 dma64_addr_t; typedef struct { @@ -72,8 +98,13 @@ typedef struct { unsigned long env; } func_descr_t; +#ifdef CONFIG_LBD +typedef u64 sector_t; +#define HAVE_SECTOR_T +#endif + #endif /* __ASSEMBLY__ */ #endif /* __KERNEL__ */ -#endif /* _PPC64_TYPES_H */ +#endif /* _ASM_POWERPC_TYPES_H */ diff --git a/include/asm-powerpc/uaccess.h b/include/asm-powerpc/uaccess.h new file mode 100644 index 000000000000..3872e924cdd6 --- /dev/null +++ b/include/asm-powerpc/uaccess.h @@ -0,0 +1,464 @@ +#ifndef _ARCH_POWERPC_UACCESS_H +#define _ARCH_POWERPC_UACCESS_H + +#ifdef __KERNEL__ +#ifndef __ASSEMBLY__ + +#include <linux/sched.h> +#include <linux/errno.h> +#include <asm/processor.h> + +#define VERIFY_READ 0 +#define VERIFY_WRITE 1 + +/* + * The fs value determines whether argument validity checking should be + * performed or not. If get_fs() == USER_DS, checking is performed, with + * get_fs() == KERNEL_DS, checking is bypassed. + * + * For historical reasons, these macros are grossly misnamed. + * + * The fs/ds values are now the highest legal address in the "segment". + * This simplifies the checking in the routines below. + */ + +#define MAKE_MM_SEG(s) ((mm_segment_t) { (s) }) + +#define KERNEL_DS MAKE_MM_SEG(~0UL) +#ifdef __powerpc64__ +/* We use TASK_SIZE_USER64 as TASK_SIZE is not constant */ +#define USER_DS MAKE_MM_SEG(TASK_SIZE_USER64 - 1) +#else +#define USER_DS MAKE_MM_SEG(TASK_SIZE - 1) +#endif + +#define get_ds() (KERNEL_DS) +#define get_fs() (current->thread.fs) +#define set_fs(val) (current->thread.fs = (val)) + +#define segment_eq(a, b) ((a).seg == (b).seg) + +#ifdef __powerpc64__ +/* + * This check is sufficient because there is a large enough + * gap between user addresses and the kernel addresses + */ +#define __access_ok(addr, size, segment) \ + (((addr) <= (segment).seg) && ((size) <= (segment).seg)) + +#else + +#define __access_ok(addr, size, segment) \ + (((addr) <= (segment).seg) && \ + (((size) == 0) || (((size) - 1) <= ((segment).seg - (addr))))) + +#endif + +#define access_ok(type, addr, size) \ + (__chk_user_ptr(addr), \ + __access_ok((__force unsigned long)(addr), (size), get_fs())) + +/* + * The exception table consists of pairs of addresses: the first is the + * address of an instruction that is allowed to fault, and the second is + * the address at which the program should continue. No registers are + * modified, so it is entirely up to the continuation code to figure out + * what to do. + * + * All the routines below use bits of fixup code that are out of line + * with the main instruction path. This means when everything is well, + * we don't even have to jump over them. Further, they do not intrude + * on our cache or tlb entries. + */ + +struct exception_table_entry { + unsigned long insn; + unsigned long fixup; +}; + +/* + * These are the main single-value transfer routines. They automatically + * use the right size if we just have the right pointer type. + * + * This gets kind of ugly. We want to return _two_ values in "get_user()" + * and yet we don't want to do any pointers, because that is too much + * of a performance impact. Thus we have a few rather ugly macros here, + * and hide all the ugliness from the user. + * + * The "__xxx" versions of the user access functions are versions that + * do not verify the address space, that must have been done previously + * with a separate "access_ok()" call (this is used when we do multiple + * accesses to the same area of user memory). + * + * As we use the same address space for kernel and user data on the + * PowerPC, we can just do these as direct assignments. (Of course, the + * exception handling means that it's no longer "just"...) + * + * The "user64" versions of the user access functions are versions that + * allow access of 64-bit data. The "get_user" functions do not + * properly handle 64-bit data because the value gets down cast to a long. + * The "put_user" functions already handle 64-bit data properly but we add + * "user64" versions for completeness + */ +#define get_user(x, ptr) \ + __get_user_check((x), (ptr), sizeof(*(ptr))) +#define put_user(x, ptr) \ + __put_user_check((__typeof__(*(ptr)))(x), (ptr), sizeof(*(ptr))) + +#define __get_user(x, ptr) \ + __get_user_nocheck((x), (ptr), sizeof(*(ptr))) +#define __put_user(x, ptr) \ + __put_user_nocheck((__typeof__(*(ptr)))(x), (ptr), sizeof(*(ptr))) +#ifndef __powerpc64__ +#define __get_user64(x, ptr) \ + __get_user64_nocheck((x), (ptr), sizeof(*(ptr))) +#define __put_user64(x, ptr) __put_user(x, ptr) +#endif + +#define __get_user_unaligned __get_user +#define __put_user_unaligned __put_user + +extern long __put_user_bad(void); + +/* + * We don't tell gcc that we are accessing memory, but this is OK + * because we do not write to any memory gcc knows about, so there + * are no aliasing issues. + */ +#define __put_user_asm(x, addr, err, op) \ + __asm__ __volatile__( \ + "1: " op " %1,0(%2) # put_user\n" \ + "2:\n" \ + ".section .fixup,\"ax\"\n" \ + "3: li %0,%3\n" \ + " b 2b\n" \ + ".previous\n" \ + ".section __ex_table,\"a\"\n" \ + " .balign %5\n" \ + PPC_LONG "1b,3b\n" \ + ".previous" \ + : "=r" (err) \ + : "r" (x), "b" (addr), "i" (-EFAULT), "0" (err),\ + "i"(sizeof(unsigned long))) + +#ifdef __powerpc64__ +#define __put_user_asm2(x, ptr, retval) \ + __put_user_asm(x, ptr, retval, "std") +#else /* __powerpc64__ */ +#define __put_user_asm2(x, addr, err) \ + __asm__ __volatile__( \ + "1: stw %1,0(%2)\n" \ + "2: stw %1+1,4(%2)\n" \ + "3:\n" \ + ".section .fixup,\"ax\"\n" \ + "4: li %0,%3\n" \ + " b 3b\n" \ + ".previous\n" \ + ".section __ex_table,\"a\"\n" \ + " .balign %5\n" \ + PPC_LONG "1b,4b\n" \ + PPC_LONG "2b,4b\n" \ + ".previous" \ + : "=r" (err) \ + : "r" (x), "b" (addr), "i" (-EFAULT), "0" (err),\ + "i"(sizeof(unsigned long))) +#endif /* __powerpc64__ */ + +#define __put_user_size(x, ptr, size, retval) \ +do { \ + retval = 0; \ + switch (size) { \ + case 1: __put_user_asm(x, ptr, retval, "stb"); break; \ + case 2: __put_user_asm(x, ptr, retval, "sth"); break; \ + case 4: __put_user_asm(x, ptr, retval, "stw"); break; \ + case 8: __put_user_asm2(x, ptr, retval); break; \ + default: __put_user_bad(); \ + } \ +} while (0) + +#define __put_user_nocheck(x, ptr, size) \ +({ \ + long __pu_err; \ + might_sleep(); \ + __chk_user_ptr(ptr); \ + __put_user_size((x), (ptr), (size), __pu_err); \ + __pu_err; \ +}) + +#define __put_user_check(x, ptr, size) \ +({ \ + long __pu_err = -EFAULT; \ + __typeof__(*(ptr)) __user *__pu_addr = (ptr); \ + might_sleep(); \ + if (access_ok(VERIFY_WRITE, __pu_addr, size)) \ + __put_user_size((x), __pu_addr, (size), __pu_err); \ + __pu_err; \ +}) + +extern long __get_user_bad(void); + +#define __get_user_asm(x, addr, err, op) \ + __asm__ __volatile__( \ + "1: "op" %1,0(%2) # get_user\n" \ + "2:\n" \ + ".section .fixup,\"ax\"\n" \ + "3: li %0,%3\n" \ + " li %1,0\n" \ + " b 2b\n" \ + ".previous\n" \ + ".section __ex_table,\"a\"\n" \ + " .balign %5\n" \ + PPC_LONG "1b,3b\n" \ + ".previous" \ + : "=r" (err), "=r" (x) \ + : "b" (addr), "i" (-EFAULT), "0" (err), \ + "i"(sizeof(unsigned long))) + +#ifdef __powerpc64__ +#define __get_user_asm2(x, addr, err) \ + __get_user_asm(x, addr, err, "ld") +#else /* __powerpc64__ */ +#define __get_user_asm2(x, addr, err) \ + __asm__ __volatile__( \ + "1: lwz %1,0(%2)\n" \ + "2: lwz %1+1,4(%2)\n" \ + "3:\n" \ + ".section .fixup,\"ax\"\n" \ + "4: li %0,%3\n" \ + " li %1,0\n" \ + " li %1+1,0\n" \ + " b 3b\n" \ + ".previous\n" \ + ".section __ex_table,\"a\"\n" \ + " .balign %5\n" \ + PPC_LONG "1b,4b\n" \ + PPC_LONG "2b,4b\n" \ + ".previous" \ + : "=r" (err), "=&r" (x) \ + : "b" (addr), "i" (-EFAULT), "0" (err), \ + "i"(sizeof(unsigned long))) +#endif /* __powerpc64__ */ + +#define __get_user_size(x, ptr, size, retval) \ +do { \ + retval = 0; \ + __chk_user_ptr(ptr); \ + if (size > sizeof(x)) \ + (x) = __get_user_bad(); \ + switch (size) { \ + case 1: __get_user_asm(x, ptr, retval, "lbz"); break; \ + case 2: __get_user_asm(x, ptr, retval, "lhz"); break; \ + case 4: __get_user_asm(x, ptr, retval, "lwz"); break; \ + case 8: __get_user_asm2(x, ptr, retval); break; \ + default: (x) = __get_user_bad(); \ + } \ +} while (0) + +#define __get_user_nocheck(x, ptr, size) \ +({ \ + long __gu_err; \ + unsigned long __gu_val; \ + __chk_user_ptr(ptr); \ + might_sleep(); \ + __get_user_size(__gu_val, (ptr), (size), __gu_err); \ + (x) = (__typeof__(*(ptr)))__gu_val; \ + __gu_err; \ +}) + +#ifndef __powerpc64__ +#define __get_user64_nocheck(x, ptr, size) \ +({ \ + long __gu_err; \ + long long __gu_val; \ + __chk_user_ptr(ptr); \ + might_sleep(); \ + __get_user_size(__gu_val, (ptr), (size), __gu_err); \ + (x) = (__typeof__(*(ptr)))__gu_val; \ + __gu_err; \ +}) +#endif /* __powerpc64__ */ + +#define __get_user_check(x, ptr, size) \ +({ \ + long __gu_err = -EFAULT; \ + unsigned long __gu_val = 0; \ + const __typeof__(*(ptr)) __user *__gu_addr = (ptr); \ + might_sleep(); \ + if (access_ok(VERIFY_READ, __gu_addr, (size))) \ + __get_user_size(__gu_val, __gu_addr, (size), __gu_err); \ + (x) = (__typeof__(*(ptr)))__gu_val; \ + __gu_err; \ +}) + +/* more complex routines */ + +extern unsigned long __copy_tofrom_user(void __user *to, + const void __user *from, unsigned long size); + +#ifndef __powerpc64__ + +extern inline unsigned long copy_from_user(void *to, + const void __user *from, unsigned long n) +{ + unsigned long over; + + if (access_ok(VERIFY_READ, from, n)) + return __copy_tofrom_user((__force void __user *)to, from, n); + if ((unsigned long)from < TASK_SIZE) { + over = (unsigned long)from + n - TASK_SIZE; + return __copy_tofrom_user((__force void __user *)to, from, + n - over) + over; + } + return n; +} + +extern inline unsigned long copy_to_user(void __user *to, + const void *from, unsigned long n) +{ + unsigned long over; + + if (access_ok(VERIFY_WRITE, to, n)) + return __copy_tofrom_user(to, (__force void __user *)from, n); + if ((unsigned long)to < TASK_SIZE) { + over = (unsigned long)to + n - TASK_SIZE; + return __copy_tofrom_user(to, (__force void __user *)from, + n - over) + over; + } + return n; +} + +#else /* __powerpc64__ */ + +#define __copy_in_user(to, from, size) \ + __copy_tofrom_user((to), (from), (size)) + +extern unsigned long copy_from_user(void *to, const void __user *from, + unsigned long n); +extern unsigned long copy_to_user(void __user *to, const void *from, + unsigned long n); +extern unsigned long copy_in_user(void __user *to, const void __user *from, + unsigned long n); + +#endif /* __powerpc64__ */ + +static inline unsigned long __copy_from_user_inatomic(void *to, + const void __user *from, unsigned long n) +{ + if (__builtin_constant_p(n) && (n <= 8)) { + unsigned long ret; + + switch (n) { + case 1: + __get_user_size(*(u8 *)to, from, 1, ret); + break; + case 2: + __get_user_size(*(u16 *)to, from, 2, ret); + break; + case 4: + __get_user_size(*(u32 *)to, from, 4, ret); + break; + case 8: + __get_user_size(*(u64 *)to, from, 8, ret); + break; + } + if (ret == 0) + return 0; + } + return __copy_tofrom_user((__force void __user *)to, from, n); +} + +static inline unsigned long __copy_to_user_inatomic(void __user *to, + const void *from, unsigned long n) +{ + if (__builtin_constant_p(n) && (n <= 8)) { + unsigned long ret; + + switch (n) { + case 1: + __put_user_size(*(u8 *)from, (u8 __user *)to, 1, ret); + break; + case 2: + __put_user_size(*(u16 *)from, (u16 __user *)to, 2, ret); + break; + case 4: + __put_user_size(*(u32 *)from, (u32 __user *)to, 4, ret); + break; + case 8: + __put_user_size(*(u64 *)from, (u64 __user *)to, 8, ret); + break; + } + if (ret == 0) + return 0; + } + return __copy_tofrom_user(to, (__force const void __user *)from, n); +} + +static inline unsigned long __copy_from_user(void *to, + const void __user *from, unsigned long size) +{ + might_sleep(); + return __copy_from_user_inatomic(to, from, size); +} + +static inline unsigned long __copy_to_user(void __user *to, + const void *from, unsigned long size) +{ + might_sleep(); + return __copy_to_user_inatomic(to, from, size); +} + +extern unsigned long __clear_user(void __user *addr, unsigned long size); + +static inline unsigned long clear_user(void __user *addr, unsigned long size) +{ + might_sleep(); + if (likely(access_ok(VERIFY_WRITE, addr, size))) + return __clear_user(addr, size); + if ((unsigned long)addr < TASK_SIZE) { + unsigned long over = (unsigned long)addr + size - TASK_SIZE; + return __clear_user(addr, size - over) + over; + } + return size; +} + +extern int __strncpy_from_user(char *dst, const char __user *src, long count); + +static inline long strncpy_from_user(char *dst, const char __user *src, + long count) +{ + might_sleep(); + if (likely(access_ok(VERIFY_READ, src, 1))) + return __strncpy_from_user(dst, src, count); + return -EFAULT; +} + +/* + * Return the size of a string (including the ending 0) + * + * Return 0 for error + */ +extern int __strnlen_user(const char __user *str, long len, unsigned long top); + +/* + * Returns the length of the string at str (including the null byte), + * or 0 if we hit a page we can't access, + * or something > len if we didn't find a null byte. + * + * The `top' parameter to __strnlen_user is to make sure that + * we can never overflow from the user area into kernel space. + */ +static inline int strnlen_user(const char __user *str, long len) +{ + unsigned long top = current->thread.fs.seg; + + if ((unsigned long)str > top) + return 0; + return __strnlen_user(str, len, top); +} + +#define strlen_user(str) strnlen_user((str), 0x7ffffffe) + +#endif /* __ASSEMBLY__ */ +#endif /* __KERNEL__ */ + +#endif /* _ARCH_POWERPC_UACCESS_H */ diff --git a/include/asm-powerpc/ucontext.h b/include/asm-powerpc/ucontext.h new file mode 100644 index 000000000000..d9a4ddf0cc86 --- /dev/null +++ b/include/asm-powerpc/ucontext.h @@ -0,0 +1,40 @@ +#ifndef _ASM_POWERPC_UCONTEXT_H +#define _ASM_POWERPC_UCONTEXT_H + +#ifdef __powerpc64__ +#include <asm/sigcontext.h> +#else +#include <asm/elf.h> +#endif +#include <asm/signal.h> + +#ifndef __powerpc64__ +struct mcontext { + elf_gregset_t mc_gregs; + elf_fpregset_t mc_fregs; + unsigned long mc_pad[2]; + elf_vrregset_t mc_vregs __attribute__((__aligned__(16))); +}; +#endif + +struct ucontext { + unsigned long uc_flags; + struct ucontext __user *uc_link; + stack_t uc_stack; +#ifndef __powerpc64__ + int uc_pad[7]; + struct mcontext __user *uc_regs;/* points to uc_mcontext field */ +#endif + sigset_t uc_sigmask; + /* glibc has 1024-bit signal masks, ours are 64-bit */ +#ifdef __powerpc64__ + sigset_t __unused[15]; /* Allow for uc_sigmask growth */ + struct sigcontext uc_mcontext; /* last for extensibility */ +#else + int uc_maskext[30]; + int uc_pad2[3]; + struct mcontext uc_mcontext; +#endif +}; + +#endif /* _ASM_POWERPC_UCONTEXT_H */ diff --git a/include/asm-ppc64/udbg.h b/include/asm-powerpc/udbg.h index c786604aef02..a383383bc4d4 100644 --- a/include/asm-ppc64/udbg.h +++ b/include/asm-powerpc/udbg.h @@ -1,9 +1,3 @@ -#ifndef __UDBG_HDR -#define __UDBG_HDR - -#include <linux/compiler.h> -#include <linux/init.h> - /* * c 2001 PPC 64 Team, IBM Corp * @@ -13,6 +7,12 @@ * 2 of the License, or (at your option) any later version. */ +#ifndef _ASM_POWERPC_UDBG_H +#define _ASM_POWERPC_UDBG_H + +#include <linux/compiler.h> +#include <linux/init.h> + extern void (*udbg_putc)(unsigned char c); extern unsigned char (*udbg_getc)(void); extern int (*udbg_getc_poll)(void); @@ -23,9 +23,9 @@ extern int udbg_read(char *buf, int buflen); extern void register_early_udbg_console(void); extern void udbg_printf(const char *fmt, ...); -extern void udbg_ppcdbg(unsigned long flags, const char *fmt, ...); -extern unsigned long udbg_ifdebug(unsigned long flags); -extern void __init ppcdbg_initialize(void); extern void udbg_init_uart(void __iomem *comport, unsigned int speed); -#endif + +struct device_node; +extern void udbg_init_scc(struct device_node *np); +#endif /* _ASM_POWERPC_UDBG_H */ diff --git a/include/asm-ppc/uninorth.h b/include/asm-powerpc/uninorth.h index f737732c3861..f737732c3861 100644 --- a/include/asm-ppc/uninorth.h +++ b/include/asm-powerpc/uninorth.h diff --git a/include/asm-ppc/unistd.h b/include/asm-powerpc/unistd.h index 3173ab3d2eb9..0991dfceef1d 100644 --- a/include/asm-ppc/unistd.h +++ b/include/asm-powerpc/unistd.h @@ -3,7 +3,13 @@ /* * This file contains the system call numbers. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version + * 2 of the License, or (at your option) any later version. */ + #define __NR_restart_syscall 0 #define __NR_exit 1 #define __NR_fork 2 @@ -196,19 +202,23 @@ #define __NR_vfork 189 #define __NR_ugetrlimit 190 /* SuS compliant getrlimit */ #define __NR_readahead 191 +#ifndef __powerpc64__ /* these are 32-bit only */ #define __NR_mmap2 192 #define __NR_truncate64 193 #define __NR_ftruncate64 194 #define __NR_stat64 195 #define __NR_lstat64 196 #define __NR_fstat64 197 +#endif #define __NR_pciconfig_read 198 #define __NR_pciconfig_write 199 #define __NR_pciconfig_iobase 200 #define __NR_multiplexer 201 #define __NR_getdents64 202 #define __NR_pivot_root 203 +#ifndef __powerpc64__ #define __NR_fcntl64 204 +#endif #define __NR_madvise 205 #define __NR_mincore 206 #define __NR_gettid 207 @@ -230,7 +240,9 @@ #define __NR_sched_getaffinity 223 /* 224 currently unused */ #define __NR_tuxcall 225 +#ifndef __powerpc64__ #define __NR_sendfile64 226 +#endif #define __NR_io_setup 227 #define __NR_io_destroy 228 #define __NR_io_getevents 229 @@ -258,14 +270,16 @@ #define __NR_utimes 251 #define __NR_statfs64 252 #define __NR_fstatfs64 253 +#ifndef __powerpc64__ #define __NR_fadvise64_64 254 +#endif #define __NR_rtas 255 #define __NR_sys_debug_setcontext 256 /* Number 257 is reserved for vserver */ /* 258 currently unused */ -/* Number 259 is reserved for new sys_mbind */ -/* Number 260 is reserved for new sys_get_mempolicy */ -/* Number 261 is reserved for new sys_set_mempolicy */ +#define __NR_mbind 259 +#define __NR_get_mempolicy 260 +#define __NR_set_mempolicy 261 #define __NR_mq_open 262 #define __NR_mq_unlink 263 #define __NR_mq_timedsend 264 @@ -285,7 +299,12 @@ #define __NR_syscalls 278 -#define __NR(n) #n +#ifdef __KERNEL__ +#define __NR__exit __NR_exit +#define NR_syscalls __NR_syscalls +#endif + +#ifndef __ASSEMBLY__ /* On powerpc a system call basically clobbers the same registers like a * function call, with the exception of LR (which is needed for the @@ -389,7 +408,6 @@ type name(type1 arg1, type2 arg2, type3 arg3, type4 arg4, type5 arg5) \ { \ __syscall_nr(5, type, name, arg1, arg2, arg3, arg4, arg5); \ } - #define _syscall6(type,name,type1,arg1,type2,arg2,type3,arg3,type4,arg4,type5,arg5,type6,arg6) \ type name(type1 arg1, type2 arg2, type3 arg3, type4 arg4, type5 arg5, type6 arg6) \ { \ @@ -398,12 +416,13 @@ type name(type1 arg1, type2 arg2, type3 arg3, type4 arg4, type5 arg5, type6 arg6 #ifdef __KERNEL__ -#define __NR__exit __NR_exit -#define NR_syscalls __NR_syscalls +#include <linux/config.h> +#include <linux/types.h> +#include <linux/compiler.h> +#include <linux/linkage.h> #define __ARCH_WANT_IPC_PARSE_VERSION #define __ARCH_WANT_OLD_READDIR -#define __ARCH_WANT_OLD_STAT #define __ARCH_WANT_STAT64 #define __ARCH_WANT_SYS_ALARM #define __ARCH_WANT_SYS_GETHOSTNAME @@ -423,23 +442,17 @@ type name(type1 arg1, type2 arg2, type3 arg3, type4 arg4, type5 arg5, type6 arg6 #define __ARCH_WANT_SYS_SIGPENDING #define __ARCH_WANT_SYS_SIGPROCMASK #define __ARCH_WANT_SYS_RT_SIGACTION - -/* - * Forking from kernel space will result in the child getting a new, - * empty kernel stack area. Thus the child cannot access automatic - * variables set in the parent unless they are in registers, and the - * procedure where the fork was done cannot return to its caller in - * the child. - */ - -#ifdef __KERNEL_SYSCALLS__ - -#include <linux/compiler.h> -#include <linux/types.h> +#ifdef CONFIG_PPC32 +#define __ARCH_WANT_OLD_STAT +#endif +#ifdef CONFIG_PPC64 +#define __ARCH_WANT_COMPAT_SYS_TIME +#endif /* * System call prototypes. */ +#ifdef __KERNEL_SYSCALLS__ extern pid_t setsid(void); extern int write(int fd, const char *buf, off_t count); extern int read(int fd, char *buf, off_t count); @@ -449,10 +462,13 @@ extern int execve(const char *file, char **argv, char **envp); extern int open(const char *file, int flag, int mode); extern int close(int fd); extern pid_t waitpid(pid_t pid, int *wait_stat, int options); +#endif /* __KERNEL_SYSCALLS__ */ -unsigned long sys_mmap(unsigned long addr, size_t len, - unsigned long prot, unsigned long flags, - unsigned long fd, off_t offset); +/* + * Functions that implement syscalls. + */ +unsigned long sys_mmap(unsigned long addr, size_t len, unsigned long prot, + unsigned long flags, unsigned long fd, off_t offset); unsigned long sys_mmap2(unsigned long addr, size_t len, unsigned long prot, unsigned long flags, unsigned long fd, unsigned long pgoff); @@ -461,22 +477,18 @@ int sys_execve(unsigned long a0, unsigned long a1, unsigned long a2, unsigned long a3, unsigned long a4, unsigned long a5, struct pt_regs *regs); int sys_clone(unsigned long clone_flags, unsigned long usp, - int __user *parent_tidp, void __user *child_threadptr, - int __user *child_tidp, int p6, - struct pt_regs *regs); -int sys_fork(int p1, int p2, int p3, int p4, int p5, int p6, + int __user *parent_tidp, void __user *child_threadptr, + int __user *child_tidp, int p6, struct pt_regs *regs); +int sys_fork(unsigned long p1, unsigned long p2, unsigned long p3, + unsigned long p4, unsigned long p5, unsigned long p6, struct pt_regs *regs); -int sys_vfork(int p1, int p2, int p3, int p4, int p5, int p6, +int sys_vfork(unsigned long p1, unsigned long p2, unsigned long p3, + unsigned long p4, unsigned long p5, unsigned long p6, struct pt_regs *regs); int sys_pipe(int __user *fildes); -int sys_ptrace(long request, long pid, long addr, long data); struct sigaction; -long sys_rt_sigaction(int sig, - const struct sigaction __user *act, - struct sigaction __user *oact, - size_t sigsetsize); - -#endif /* __KERNEL_SYSCALLS__ */ +long sys_rt_sigaction(int sig, const struct sigaction __user *act, + struct sigaction __user *oact, size_t sigsetsize); /* * "Conditional" syscalls @@ -484,10 +496,14 @@ long sys_rt_sigaction(int sig, * What we want is __attribute__((weak,alias("sys_ni_syscall"))), * but it doesn't work on all toolchains, so we just do it by hand */ -#ifndef cond_syscall +#ifdef CONFIG_PPC32 #define cond_syscall(x) asm(".weak\t" #x "\n\t.set\t" #x ",sys_ni_syscall") +#else +#define cond_syscall(x) asm(".weak\t." #x "\n\t.set\t." #x ",.sys_ni_syscall") #endif -#endif /* __KERNEL__ */ +#endif /* __KERNEL__ */ + +#endif /* __ASSEMBLY__ */ #endif /* _ASM_PPC_UNISTD_H_ */ diff --git a/include/asm-ppc64/vdso.h b/include/asm-powerpc/vdso.h index 85d8a7be25c4..b9f9118b1607 100644 --- a/include/asm-ppc64/vdso.h +++ b/include/asm-powerpc/vdso.h @@ -11,7 +11,7 @@ #define VDSO32_MBASE VDSO32_LBASE #define VDSO64_MBASE VDSO64_LBASE -#define VDSO_VERSION_STRING LINUX_2.6.12 +#define VDSO_VERSION_STRING LINUX_2.6.15 /* Define if 64 bits VDSO has procedure descriptors */ #undef VDS64_HAS_DESCRIPTORS diff --git a/include/asm-powerpc/vdso_datapage.h b/include/asm-powerpc/vdso_datapage.h new file mode 100644 index 000000000000..411832d5bbdb --- /dev/null +++ b/include/asm-powerpc/vdso_datapage.h @@ -0,0 +1,108 @@ +#ifndef _VDSO_DATAPAGE_H +#define _VDSO_DATAPAGE_H + +/* + * Copyright (C) 2002 Peter Bergner <bergner@vnet.ibm.com>, IBM + * Copyright (C) 2005 Benjamin Herrenschmidy <benh@kernel.crashing.org>, + * IBM Corp. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version + * 2 of the License, or (at your option) any later version. + */ + + +/* + * Note about this structure: + * + * This structure was historically called systemcfg and exposed to + * userland via /proc/ppc64/systemcfg. Unfortunately, this became an + * ABI issue as some proprietary software started relying on being able + * to mmap() it, thus we have to keep the base layout at least for a + * few kernel versions. + * + * However, since ppc32 doesn't suffer from this backward handicap, + * a simpler version of the data structure is used there with only the + * fields actually used by the vDSO. + * + */ + +/* + * If the major version changes we are incompatible. + * Minor version changes are a hint. + */ +#define SYSTEMCFG_MAJOR 1 +#define SYSTEMCFG_MINOR 1 + +#ifndef __ASSEMBLY__ + +#include <linux/unistd.h> + +#define SYSCALL_MAP_SIZE ((__NR_syscalls + 31) / 32) + +/* + * So here is the ppc64 backward compatible version + */ + +#ifdef CONFIG_PPC64 + +struct vdso_data { + __u8 eye_catcher[16]; /* Eyecatcher: SYSTEMCFG:PPC64 0x00 */ + struct { /* Systemcfg version numbers */ + __u32 major; /* Major number 0x10 */ + __u32 minor; /* Minor number 0x14 */ + } version; + + __u32 platform; /* Platform flags 0x18 */ + __u32 processor; /* Processor type 0x1C */ + __u64 processorCount; /* # of physical processors 0x20 */ + __u64 physicalMemorySize; /* Size of real memory(B) 0x28 */ + __u64 tb_orig_stamp; /* Timebase at boot 0x30 */ + __u64 tb_ticks_per_sec; /* Timebase tics / sec 0x38 */ + __u64 tb_to_xs; /* Inverse of TB to 2^20 0x40 */ + __u64 stamp_xsec; /* 0x48 */ + __u64 tb_update_count; /* Timebase atomicity ctr 0x50 */ + __u32 tz_minuteswest; /* Minutes west of Greenwich 0x58 */ + __u32 tz_dsttime; /* Type of dst correction 0x5C */ + __u32 dcache_size; /* L1 d-cache size 0x60 */ + __u32 dcache_line_size; /* L1 d-cache line size 0x64 */ + __u32 icache_size; /* L1 i-cache size 0x68 */ + __u32 icache_line_size; /* L1 i-cache line size 0x6C */ + + /* those additional ones don't have to be located anywhere + * special as they were not part of the original systemcfg + */ + __s32 wtom_clock_sec; /* Wall to monotonic clock */ + __s32 wtom_clock_nsec; + __u32 syscall_map_64[SYSCALL_MAP_SIZE]; /* map of syscalls */ + __u32 syscall_map_32[SYSCALL_MAP_SIZE]; /* map of syscalls */ +}; + +#else /* CONFIG_PPC64 */ + +/* + * And here is the simpler 32 bits version + */ +struct vdso_data { + __u64 tb_orig_stamp; /* Timebase at boot 0x30 */ + __u64 tb_ticks_per_sec; /* Timebase tics / sec 0x38 */ + __u64 tb_to_xs; /* Inverse of TB to 2^20 0x40 */ + __u64 stamp_xsec; /* 0x48 */ + __u32 tb_update_count; /* Timebase atomicity ctr 0x50 */ + __u32 tz_minuteswest; /* Minutes west of Greenwich 0x58 */ + __u32 tz_dsttime; /* Type of dst correction 0x5C */ + __s32 wtom_clock_sec; /* Wall to monotonic clock */ + __s32 wtom_clock_nsec; + __u32 syscall_map_32[SYSCALL_MAP_SIZE]; /* map of syscalls */ +}; + +#endif /* CONFIG_PPC64 */ + +#ifdef __KERNEL__ +extern struct vdso_data *vdso_data; +#endif + +#endif /* __ASSEMBLY__ */ + +#endif /* _SYSTEMCFG_H */ diff --git a/include/asm-ppc64/vga.h b/include/asm-powerpc/vga.h index c09849743f45..f8d350aabf1a 100644 --- a/include/asm-ppc64/vga.h +++ b/include/asm-powerpc/vga.h @@ -1,16 +1,14 @@ +#ifndef _ASM_POWERPC_VGA_H_ +#define _ASM_POWERPC_VGA_H_ + +#ifdef __KERNEL__ + /* * Access to VGA videoram * * (c) 1998 Martin Mares <mj@ucw.cz> - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. */ -#ifndef _LINUX_ASM_VGA_H_ -#define _LINUX_ASM_VGA_H_ #include <asm/io.h> @@ -42,9 +40,15 @@ static inline u16 scr_readw(volatile const u16 *addr) #endif /* !CONFIG_VGA_CONSOLE && !CONFIG_MDA_CONSOLE */ extern unsigned long vgacon_remap_base; + +#ifdef __powerpc64__ #define VGA_MAP_MEM(x) ((unsigned long) ioremap((x), 0)) +#else +#define VGA_MAP_MEM(x) (x + vgacon_remap_base) +#endif #define vga_readb(x) (*(x)) #define vga_writeb(x,y) (*(y) = (x)) -#endif +#endif /* __KERNEL__ */ +#endif /* _ASM_POWERPC_VGA_H_ */ diff --git a/include/asm-ppc64/vio.h b/include/asm-powerpc/vio.h index 03f1b95f433b..e0ccf108277c 100644 --- a/include/asm-ppc64/vio.h +++ b/include/asm-powerpc/vio.h @@ -1,18 +1,18 @@ /* * IBM PowerPC Virtual I/O Infrastructure Support. * - * Copyright (c) 2003 IBM Corp. - * Dave Engebretsen engebret@us.ibm.com - * Santiago Leon santil@us.ibm.com + * Copyright (c) 2003 IBM Corp. + * Dave Engebretsen engebret@us.ibm.com + * Santiago Leon santil@us.ibm.com * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version + * 2 of the License, or (at your option) any later version. */ -#ifndef _ASM_VIO_H -#define _ASM_VIO_H +#ifndef _ASM_POWERPC_VIO_H +#define _ASM_POWERPC_VIO_H #include <linux/config.h> #include <linux/init.h> @@ -55,10 +55,10 @@ struct vio_dev { struct vio_driver { struct list_head node; - char *name; const struct vio_device_id *id_table; int (*probe)(struct vio_dev *dev, const struct vio_device_id *id); int (*remove)(struct vio_dev *dev); + void (*shutdown)(struct vio_dev *dev); unsigned long driver_data; struct device_driver driver; }; @@ -103,4 +103,4 @@ static inline struct vio_dev *to_vio_dev(struct device *dev) return container_of(dev, struct vio_dev, dev); } -#endif /* _ASM_VIO_H */ +#endif /* _ASM_POWERPC_VIO_H */ diff --git a/include/asm-powerpc/xmon.h b/include/asm-powerpc/xmon.h new file mode 100644 index 000000000000..43f7129984c7 --- /dev/null +++ b/include/asm-powerpc/xmon.h @@ -0,0 +1,12 @@ +#ifndef __PPC_XMON_H +#define __PPC_XMON_H +#ifdef __KERNEL__ + +struct pt_regs; + +extern int xmon(struct pt_regs *excp); +extern void xmon_printf(const char *fmt, ...); +extern void xmon_init(int); + +#endif +#endif diff --git a/include/asm-ppc/a.out.h b/include/asm-ppc/a.out.h deleted file mode 100644 index 8979a94c4a81..000000000000 --- a/include/asm-ppc/a.out.h +++ /dev/null @@ -1,26 +0,0 @@ -#ifndef __PPC_A_OUT_H__ -#define __PPC_A_OUT_H__ - -/* grabbed from the intel stuff */ -#define STACK_TOP TASK_SIZE - - -struct exec -{ - unsigned long a_info; /* Use macros N_MAGIC, etc for access */ - unsigned a_text; /* length of text, in bytes */ - unsigned a_data; /* length of data, in bytes */ - unsigned a_bss; /* length of uninitialized data area for file, in bytes */ - unsigned a_syms; /* length of symbol table data in file, in bytes */ - unsigned a_entry; /* start address */ - unsigned a_trsize; /* length of relocation info for text, in bytes */ - unsigned a_drsize; /* length of relocation info for data, in bytes */ -}; - - -#define N_TRSIZE(a) ((a).a_trsize) -#define N_DRSIZE(a) ((a).a_drsize) -#define N_SYMSIZE(a) ((a).a_syms) - - -#endif diff --git a/include/asm-ppc/atomic.h b/include/asm-ppc/atomic.h deleted file mode 100644 index eeafd505836e..000000000000 --- a/include/asm-ppc/atomic.h +++ /dev/null @@ -1,214 +0,0 @@ -/* - * PowerPC atomic operations - */ - -#ifndef _ASM_PPC_ATOMIC_H_ -#define _ASM_PPC_ATOMIC_H_ - -typedef struct { volatile int counter; } atomic_t; - -#ifdef __KERNEL__ - -#define ATOMIC_INIT(i) { (i) } - -#define atomic_read(v) ((v)->counter) -#define atomic_set(v,i) (((v)->counter) = (i)) - -extern void atomic_clear_mask(unsigned long mask, unsigned long *addr); - -#ifdef CONFIG_SMP -#define SMP_SYNC "sync" -#define SMP_ISYNC "\n\tisync" -#else -#define SMP_SYNC "" -#define SMP_ISYNC -#endif - -/* Erratum #77 on the 405 means we need a sync or dcbt before every stwcx. - * The old ATOMIC_SYNC_FIX covered some but not all of this. - */ -#ifdef CONFIG_IBM405_ERR77 -#define PPC405_ERR77(ra,rb) "dcbt " #ra "," #rb ";" -#else -#define PPC405_ERR77(ra,rb) -#endif - -static __inline__ void atomic_add(int a, atomic_t *v) -{ - int t; - - __asm__ __volatile__( -"1: lwarx %0,0,%3 # atomic_add\n\ - add %0,%2,%0\n" - PPC405_ERR77(0,%3) -" stwcx. %0,0,%3 \n\ - bne- 1b" - : "=&r" (t), "=m" (v->counter) - : "r" (a), "r" (&v->counter), "m" (v->counter) - : "cc"); -} - -static __inline__ int atomic_add_return(int a, atomic_t *v) -{ - int t; - - __asm__ __volatile__( -"1: lwarx %0,0,%2 # atomic_add_return\n\ - add %0,%1,%0\n" - PPC405_ERR77(0,%2) -" stwcx. %0,0,%2 \n\ - bne- 1b" - SMP_ISYNC - : "=&r" (t) - : "r" (a), "r" (&v->counter) - : "cc", "memory"); - - return t; -} - -#define atomic_add_negative(a, v) (atomic_add_return((a), (v)) < 0) - -static __inline__ void atomic_sub(int a, atomic_t *v) -{ - int t; - - __asm__ __volatile__( -"1: lwarx %0,0,%3 # atomic_sub\n\ - subf %0,%2,%0\n" - PPC405_ERR77(0,%3) -" stwcx. %0,0,%3 \n\ - bne- 1b" - : "=&r" (t), "=m" (v->counter) - : "r" (a), "r" (&v->counter), "m" (v->counter) - : "cc"); -} - -static __inline__ int atomic_sub_return(int a, atomic_t *v) -{ - int t; - - __asm__ __volatile__( -"1: lwarx %0,0,%2 # atomic_sub_return\n\ - subf %0,%1,%0\n" - PPC405_ERR77(0,%2) -" stwcx. %0,0,%2 \n\ - bne- 1b" - SMP_ISYNC - : "=&r" (t) - : "r" (a), "r" (&v->counter) - : "cc", "memory"); - - return t; -} - -static __inline__ void atomic_inc(atomic_t *v) -{ - int t; - - __asm__ __volatile__( -"1: lwarx %0,0,%2 # atomic_inc\n\ - addic %0,%0,1\n" - PPC405_ERR77(0,%2) -" stwcx. %0,0,%2 \n\ - bne- 1b" - : "=&r" (t), "=m" (v->counter) - : "r" (&v->counter), "m" (v->counter) - : "cc"); -} - -static __inline__ int atomic_inc_return(atomic_t *v) -{ - int t; - - __asm__ __volatile__( -"1: lwarx %0,0,%1 # atomic_inc_return\n\ - addic %0,%0,1\n" - PPC405_ERR77(0,%1) -" stwcx. %0,0,%1 \n\ - bne- 1b" - SMP_ISYNC - : "=&r" (t) - : "r" (&v->counter) - : "cc", "memory"); - - return t; -} - -/* - * atomic_inc_and_test - increment and test - * @v: pointer of type atomic_t - * - * Atomically increments @v by 1 - * and returns true if the result is zero, or false for all - * other cases. - */ -#define atomic_inc_and_test(v) (atomic_inc_return(v) == 0) - -static __inline__ void atomic_dec(atomic_t *v) -{ - int t; - - __asm__ __volatile__( -"1: lwarx %0,0,%2 # atomic_dec\n\ - addic %0,%0,-1\n" - PPC405_ERR77(0,%2)\ -" stwcx. %0,0,%2\n\ - bne- 1b" - : "=&r" (t), "=m" (v->counter) - : "r" (&v->counter), "m" (v->counter) - : "cc"); -} - -static __inline__ int atomic_dec_return(atomic_t *v) -{ - int t; - - __asm__ __volatile__( -"1: lwarx %0,0,%1 # atomic_dec_return\n\ - addic %0,%0,-1\n" - PPC405_ERR77(0,%1) -" stwcx. %0,0,%1\n\ - bne- 1b" - SMP_ISYNC - : "=&r" (t) - : "r" (&v->counter) - : "cc", "memory"); - - return t; -} - -#define atomic_sub_and_test(a, v) (atomic_sub_return((a), (v)) == 0) -#define atomic_dec_and_test(v) (atomic_dec_return((v)) == 0) - -/* - * Atomically test *v and decrement if it is greater than 0. - * The function returns the old value of *v minus 1. - */ -static __inline__ int atomic_dec_if_positive(atomic_t *v) -{ - int t; - - __asm__ __volatile__( -"1: lwarx %0,0,%1 # atomic_dec_if_positive\n\ - addic. %0,%0,-1\n\ - blt- 2f\n" - PPC405_ERR77(0,%1) -" stwcx. %0,0,%1\n\ - bne- 1b" - SMP_ISYNC - "\n\ -2:" : "=&r" (t) - : "r" (&v->counter) - : "cc", "memory"); - - return t; -} - -#define __MB __asm__ __volatile__ (SMP_SYNC : : : "memory") -#define smp_mb__before_atomic_dec() __MB -#define smp_mb__after_atomic_dec() __MB -#define smp_mb__before_atomic_inc() __MB -#define smp_mb__after_atomic_inc() __MB - -#endif /* __KERNEL__ */ -#endif /* _ASM_PPC_ATOMIC_H_ */ diff --git a/include/asm-ppc/auxvec.h b/include/asm-ppc/auxvec.h deleted file mode 100644 index 172358df29c8..000000000000 --- a/include/asm-ppc/auxvec.h +++ /dev/null @@ -1,14 +0,0 @@ -#ifndef __PPC_AUXVEC_H -#define __PPC_AUXVEC_H - -/* - * We need to put in some extra aux table entries to tell glibc what - * the cache block size is, so it can use the dcbz instruction safely. - */ -#define AT_DCACHEBSIZE 19 -#define AT_ICACHEBSIZE 20 -#define AT_UCACHEBSIZE 21 -/* A special ignored type value for PPC, for glibc compatibility. */ -#define AT_IGNOREPPC 22 - -#endif diff --git a/include/asm-ppc/bitops.h b/include/asm-ppc/bitops.h deleted file mode 100644 index e30f536fd830..000000000000 --- a/include/asm-ppc/bitops.h +++ /dev/null @@ -1,460 +0,0 @@ -/* - * bitops.h: Bit string operations on the ppc - */ - -#ifdef __KERNEL__ -#ifndef _PPC_BITOPS_H -#define _PPC_BITOPS_H - -#include <linux/config.h> -#include <linux/compiler.h> -#include <asm/byteorder.h> -#include <asm/atomic.h> - -/* - * The test_and_*_bit operations are taken to imply a memory barrier - * on SMP systems. - */ -#ifdef CONFIG_SMP -#define SMP_WMB "eieio\n" -#define SMP_MB "\nsync" -#else -#define SMP_WMB -#define SMP_MB -#endif /* CONFIG_SMP */ - -static __inline__ void set_bit(int nr, volatile unsigned long * addr) -{ - unsigned long old; - unsigned long mask = 1 << (nr & 0x1f); - unsigned long *p = ((unsigned long *)addr) + (nr >> 5); - - __asm__ __volatile__("\n\ -1: lwarx %0,0,%3 \n\ - or %0,%0,%2 \n" - PPC405_ERR77(0,%3) -" stwcx. %0,0,%3 \n\ - bne- 1b" - : "=&r" (old), "=m" (*p) - : "r" (mask), "r" (p), "m" (*p) - : "cc" ); -} - -/* - * non-atomic version - */ -static __inline__ void __set_bit(int nr, volatile unsigned long *addr) -{ - unsigned long mask = 1 << (nr & 0x1f); - unsigned long *p = ((unsigned long *)addr) + (nr >> 5); - - *p |= mask; -} - -/* - * clear_bit doesn't imply a memory barrier - */ -#define smp_mb__before_clear_bit() smp_mb() -#define smp_mb__after_clear_bit() smp_mb() - -static __inline__ void clear_bit(int nr, volatile unsigned long *addr) -{ - unsigned long old; - unsigned long mask = 1 << (nr & 0x1f); - unsigned long *p = ((unsigned long *)addr) + (nr >> 5); - - __asm__ __volatile__("\n\ -1: lwarx %0,0,%3 \n\ - andc %0,%0,%2 \n" - PPC405_ERR77(0,%3) -" stwcx. %0,0,%3 \n\ - bne- 1b" - : "=&r" (old), "=m" (*p) - : "r" (mask), "r" (p), "m" (*p) - : "cc"); -} - -/* - * non-atomic version - */ -static __inline__ void __clear_bit(int nr, volatile unsigned long *addr) -{ - unsigned long mask = 1 << (nr & 0x1f); - unsigned long *p = ((unsigned long *)addr) + (nr >> 5); - - *p &= ~mask; -} - -static __inline__ void change_bit(int nr, volatile unsigned long *addr) -{ - unsigned long old; - unsigned long mask = 1 << (nr & 0x1f); - unsigned long *p = ((unsigned long *)addr) + (nr >> 5); - - __asm__ __volatile__("\n\ -1: lwarx %0,0,%3 \n\ - xor %0,%0,%2 \n" - PPC405_ERR77(0,%3) -" stwcx. %0,0,%3 \n\ - bne- 1b" - : "=&r" (old), "=m" (*p) - : "r" (mask), "r" (p), "m" (*p) - : "cc"); -} - -/* - * non-atomic version - */ -static __inline__ void __change_bit(int nr, volatile unsigned long *addr) -{ - unsigned long mask = 1 << (nr & 0x1f); - unsigned long *p = ((unsigned long *)addr) + (nr >> 5); - - *p ^= mask; -} - -/* - * test_and_*_bit do imply a memory barrier (?) - */ -static __inline__ int test_and_set_bit(int nr, volatile unsigned long *addr) -{ - unsigned int old, t; - unsigned int mask = 1 << (nr & 0x1f); - volatile unsigned int *p = ((volatile unsigned int *)addr) + (nr >> 5); - - __asm__ __volatile__(SMP_WMB "\n\ -1: lwarx %0,0,%4 \n\ - or %1,%0,%3 \n" - PPC405_ERR77(0,%4) -" stwcx. %1,0,%4 \n\ - bne 1b" - SMP_MB - : "=&r" (old), "=&r" (t), "=m" (*p) - : "r" (mask), "r" (p), "m" (*p) - : "cc", "memory"); - - return (old & mask) != 0; -} - -/* - * non-atomic version - */ -static __inline__ int __test_and_set_bit(int nr, volatile unsigned long *addr) -{ - unsigned long mask = 1 << (nr & 0x1f); - unsigned long *p = ((unsigned long *)addr) + (nr >> 5); - unsigned long old = *p; - - *p = old | mask; - return (old & mask) != 0; -} - -static __inline__ int test_and_clear_bit(int nr, volatile unsigned long *addr) -{ - unsigned int old, t; - unsigned int mask = 1 << (nr & 0x1f); - volatile unsigned int *p = ((volatile unsigned int *)addr) + (nr >> 5); - - __asm__ __volatile__(SMP_WMB "\n\ -1: lwarx %0,0,%4 \n\ - andc %1,%0,%3 \n" - PPC405_ERR77(0,%4) -" stwcx. %1,0,%4 \n\ - bne 1b" - SMP_MB - : "=&r" (old), "=&r" (t), "=m" (*p) - : "r" (mask), "r" (p), "m" (*p) - : "cc", "memory"); - - return (old & mask) != 0; -} - -/* - * non-atomic version - */ -static __inline__ int __test_and_clear_bit(int nr, volatile unsigned long *addr) -{ - unsigned long mask = 1 << (nr & 0x1f); - unsigned long *p = ((unsigned long *)addr) + (nr >> 5); - unsigned long old = *p; - - *p = old & ~mask; - return (old & mask) != 0; -} - -static __inline__ int test_and_change_bit(int nr, volatile unsigned long *addr) -{ - unsigned int old, t; - unsigned int mask = 1 << (nr & 0x1f); - volatile unsigned int *p = ((volatile unsigned int *)addr) + (nr >> 5); - - __asm__ __volatile__(SMP_WMB "\n\ -1: lwarx %0,0,%4 \n\ - xor %1,%0,%3 \n" - PPC405_ERR77(0,%4) -" stwcx. %1,0,%4 \n\ - bne 1b" - SMP_MB - : "=&r" (old), "=&r" (t), "=m" (*p) - : "r" (mask), "r" (p), "m" (*p) - : "cc", "memory"); - - return (old & mask) != 0; -} - -/* - * non-atomic version - */ -static __inline__ int __test_and_change_bit(int nr, volatile unsigned long *addr) -{ - unsigned long mask = 1 << (nr & 0x1f); - unsigned long *p = ((unsigned long *)addr) + (nr >> 5); - unsigned long old = *p; - - *p = old ^ mask; - return (old & mask) != 0; -} - -static __inline__ int test_bit(int nr, __const__ volatile unsigned long *addr) -{ - return ((addr[nr >> 5] >> (nr & 0x1f)) & 1) != 0; -} - -/* Return the bit position of the most significant 1 bit in a word */ -static __inline__ int __ilog2(unsigned long x) -{ - int lz; - - asm ("cntlzw %0,%1" : "=r" (lz) : "r" (x)); - return 31 - lz; -} - -static __inline__ int ffz(unsigned long x) -{ - if ((x = ~x) == 0) - return 32; - return __ilog2(x & -x); -} - -static inline int __ffs(unsigned long x) -{ - return __ilog2(x & -x); -} - -/* - * ffs: find first bit set. This is defined the same way as - * the libc and compiler builtin ffs routines, therefore - * differs in spirit from the above ffz (man ffs). - */ -static __inline__ int ffs(int x) -{ - return __ilog2(x & -x) + 1; -} - -/* - * fls: find last (most-significant) bit set. - * Note fls(0) = 0, fls(1) = 1, fls(0x80000000) = 32. - */ -static __inline__ int fls(unsigned int x) -{ - int lz; - - asm ("cntlzw %0,%1" : "=r" (lz) : "r" (x)); - return 32 - lz; -} - -/* - * hweightN: returns the hamming weight (i.e. the number - * of bits set) of a N-bit word - */ - -#define hweight32(x) generic_hweight32(x) -#define hweight16(x) generic_hweight16(x) -#define hweight8(x) generic_hweight8(x) - -/* - * Find the first bit set in a 140-bit bitmap. - * The first 100 bits are unlikely to be set. - */ -static inline int sched_find_first_bit(const unsigned long *b) -{ - if (unlikely(b[0])) - return __ffs(b[0]); - if (unlikely(b[1])) - return __ffs(b[1]) + 32; - if (unlikely(b[2])) - return __ffs(b[2]) + 64; - if (b[3]) - return __ffs(b[3]) + 96; - return __ffs(b[4]) + 128; -} - -/** - * find_next_bit - find the next set bit in a memory region - * @addr: The address to base the search on - * @offset: The bitnumber to start searching at - * @size: The maximum size to search - */ -static __inline__ unsigned long find_next_bit(const unsigned long *addr, - unsigned long size, unsigned long offset) -{ - unsigned int *p = ((unsigned int *) addr) + (offset >> 5); - unsigned int result = offset & ~31UL; - unsigned int tmp; - - if (offset >= size) - return size; - size -= result; - offset &= 31UL; - if (offset) { - tmp = *p++; - tmp &= ~0UL << offset; - if (size < 32) - goto found_first; - if (tmp) - goto found_middle; - size -= 32; - result += 32; - } - while (size >= 32) { - if ((tmp = *p++) != 0) - goto found_middle; - result += 32; - size -= 32; - } - if (!size) - return result; - tmp = *p; - -found_first: - tmp &= ~0UL >> (32 - size); - if (tmp == 0UL) /* Are any bits set? */ - return result + size; /* Nope. */ -found_middle: - return result + __ffs(tmp); -} - -/** - * find_first_bit - find the first set bit in a memory region - * @addr: The address to start the search at - * @size: The maximum size to search - * - * Returns the bit-number of the first set bit, not the number of the byte - * containing a bit. - */ -#define find_first_bit(addr, size) \ - find_next_bit((addr), (size), 0) - -/* - * This implementation of find_{first,next}_zero_bit was stolen from - * Linus' asm-alpha/bitops.h. - */ -#define find_first_zero_bit(addr, size) \ - find_next_zero_bit((addr), (size), 0) - -static __inline__ unsigned long find_next_zero_bit(const unsigned long *addr, - unsigned long size, unsigned long offset) -{ - unsigned int * p = ((unsigned int *) addr) + (offset >> 5); - unsigned int result = offset & ~31UL; - unsigned int tmp; - - if (offset >= size) - return size; - size -= result; - offset &= 31UL; - if (offset) { - tmp = *p++; - tmp |= ~0UL >> (32-offset); - if (size < 32) - goto found_first; - if (tmp != ~0U) - goto found_middle; - size -= 32; - result += 32; - } - while (size >= 32) { - if ((tmp = *p++) != ~0U) - goto found_middle; - result += 32; - size -= 32; - } - if (!size) - return result; - tmp = *p; -found_first: - tmp |= ~0UL << size; - if (tmp == ~0UL) /* Are any bits zero? */ - return result + size; /* Nope. */ -found_middle: - return result + ffz(tmp); -} - - -#define ext2_set_bit(nr, addr) __test_and_set_bit((nr) ^ 0x18, (unsigned long *)(addr)) -#define ext2_set_bit_atomic(lock, nr, addr) test_and_set_bit((nr) ^ 0x18, (unsigned long *)(addr)) -#define ext2_clear_bit(nr, addr) __test_and_clear_bit((nr) ^ 0x18, (unsigned long *)(addr)) -#define ext2_clear_bit_atomic(lock, nr, addr) test_and_clear_bit((nr) ^ 0x18, (unsigned long *)(addr)) - -static __inline__ int ext2_test_bit(int nr, __const__ void * addr) -{ - __const__ unsigned char *ADDR = (__const__ unsigned char *) addr; - - return (ADDR[nr >> 3] >> (nr & 7)) & 1; -} - -/* - * This implementation of ext2_find_{first,next}_zero_bit was stolen from - * Linus' asm-alpha/bitops.h and modified for a big-endian machine. - */ - -#define ext2_find_first_zero_bit(addr, size) \ - ext2_find_next_zero_bit((addr), (size), 0) - -static __inline__ unsigned long ext2_find_next_zero_bit(const void *addr, - unsigned long size, unsigned long offset) -{ - unsigned int *p = ((unsigned int *) addr) + (offset >> 5); - unsigned int result = offset & ~31UL; - unsigned int tmp; - - if (offset >= size) - return size; - size -= result; - offset &= 31UL; - if (offset) { - tmp = cpu_to_le32p(p++); - tmp |= ~0UL >> (32-offset); - if (size < 32) - goto found_first; - if (tmp != ~0U) - goto found_middle; - size -= 32; - result += 32; - } - while (size >= 32) { - if ((tmp = cpu_to_le32p(p++)) != ~0U) - goto found_middle; - result += 32; - size -= 32; - } - if (!size) - return result; - tmp = cpu_to_le32p(p); -found_first: - tmp |= ~0U << size; - if (tmp == ~0UL) /* Are any bits zero? */ - return result + size; /* Nope. */ -found_middle: - return result + ffz(tmp); -} - -/* Bitmap functions for the minix filesystem. */ -#define minix_test_and_set_bit(nr,addr) ext2_set_bit(nr,addr) -#define minix_set_bit(nr,addr) ((void)ext2_set_bit(nr,addr)) -#define minix_test_and_clear_bit(nr,addr) ext2_clear_bit(nr,addr) -#define minix_test_bit(nr,addr) ext2_test_bit(nr,addr) -#define minix_find_first_zero_bit(addr,size) ext2_find_first_zero_bit(addr,size) - -#endif /* _PPC_BITOPS_H */ -#endif /* __KERNEL__ */ diff --git a/include/asm-ppc/btext.h b/include/asm-ppc/btext.h index 36c7640d00f2..ccaefabe0bf5 100644 --- a/include/asm-ppc/btext.h +++ b/include/asm-ppc/btext.h @@ -17,18 +17,18 @@ extern unsigned long disp_BAT[2]; extern boot_infos_t disp_bi; extern int boot_text_mapped; -void btext_init(boot_infos_t *bi); -void btext_welcome(void); -void btext_prepare_BAT(void); -void btext_setup_display(int width, int height, int depth, int pitch, - unsigned long address); -void map_boot_text(void); -void btext_update_display(unsigned long phys, int width, int height, - int depth, int pitch); +extern void init_boot_display(void); +extern void btext_welcome(void); +extern void btext_prepare_BAT(void); +extern void btext_setup_display(int width, int height, int depth, int pitch, + unsigned long address); +extern void map_boot_text(void); +extern void btext_update_display(unsigned long phys, int width, int height, + int depth, int pitch); -void btext_drawchar(char c); -void btext_drawstring(const char *str); -void btext_drawhex(unsigned long v); +extern void btext_drawchar(char c); +extern void btext_drawstring(const char *str); +extern void btext_drawhex(unsigned long v); #endif /* __KERNEL__ */ #endif /* __PPC_BTEXT_H */ diff --git a/include/asm-ppc/bug.h b/include/asm-ppc/bug.h deleted file mode 100644 index 8b34fd682b0d..000000000000 --- a/include/asm-ppc/bug.h +++ /dev/null @@ -1,58 +0,0 @@ -#ifndef _PPC_BUG_H -#define _PPC_BUG_H - -struct bug_entry { - unsigned long bug_addr; - int line; - const char *file; - const char *function; -}; - -/* - * If this bit is set in the line number it means that the trap - * is for WARN_ON rather than BUG or BUG_ON. - */ -#define BUG_WARNING_TRAP 0x1000000 - -#ifdef CONFIG_BUG -#define BUG() do { \ - __asm__ __volatile__( \ - "1: twi 31,0,0\n" \ - ".section __bug_table,\"a\"\n\t" \ - " .long 1b,%0,%1,%2\n" \ - ".previous" \ - : : "i" (__LINE__), "i" (__FILE__), "i" (__FUNCTION__)); \ -} while (0) - -#define BUG_ON(x) do { \ - if (!__builtin_constant_p(x) || (x)) { \ - __asm__ __volatile__( \ - "1: twnei %0,0\n" \ - ".section __bug_table,\"a\"\n\t" \ - " .long 1b,%1,%2,%3\n" \ - ".previous" \ - : : "r" (x), "i" (__LINE__), "i" (__FILE__), \ - "i" (__FUNCTION__)); \ - } \ -} while (0) - -#define WARN_ON(x) do { \ - if (!__builtin_constant_p(x) || (x)) { \ - __asm__ __volatile__( \ - "1: twnei %0,0\n" \ - ".section __bug_table,\"a\"\n\t" \ - " .long 1b,%1,%2,%3\n" \ - ".previous" \ - : : "r" (x), "i" (__LINE__ + BUG_WARNING_TRAP), \ - "i" (__FILE__), "i" (__FUNCTION__)); \ - } \ -} while (0) - -#define HAVE_ARCH_BUG -#define HAVE_ARCH_BUG_ON -#define HAVE_ARCH_WARN_ON -#endif - -#include <asm-generic/bug.h> - -#endif diff --git a/include/asm-ppc/byteorder.h b/include/asm-ppc/byteorder.h deleted file mode 100644 index c63c81ec7968..000000000000 --- a/include/asm-ppc/byteorder.h +++ /dev/null @@ -1,76 +0,0 @@ -#ifndef _PPC_BYTEORDER_H -#define _PPC_BYTEORDER_H - -#include <asm/types.h> -#include <linux/compiler.h> - -#ifdef __GNUC__ -#ifdef __KERNEL__ - -extern __inline__ unsigned ld_le16(const volatile unsigned short *addr) -{ - unsigned val; - - __asm__ __volatile__ ("lhbrx %0,0,%1" : "=r" (val) : "r" (addr), "m" (*addr)); - return val; -} - -extern __inline__ void st_le16(volatile unsigned short *addr, const unsigned val) -{ - __asm__ __volatile__ ("sthbrx %1,0,%2" : "=m" (*addr) : "r" (val), "r" (addr)); -} - -extern __inline__ unsigned ld_le32(const volatile unsigned *addr) -{ - unsigned val; - - __asm__ __volatile__ ("lwbrx %0,0,%1" : "=r" (val) : "r" (addr), "m" (*addr)); - return val; -} - -extern __inline__ void st_le32(volatile unsigned *addr, const unsigned val) -{ - __asm__ __volatile__ ("stwbrx %1,0,%2" : "=m" (*addr) : "r" (val), "r" (addr)); -} - -static __inline__ __attribute_const__ __u16 ___arch__swab16(__u16 value) -{ - __u16 result; - - __asm__("rlwimi %0,%2,8,16,23" : "=&r" (result) : "0" (value >> 8), "r" (value)); - return result; -} - -static __inline__ __attribute_const__ __u32 ___arch__swab32(__u32 value) -{ - __u32 result; - - __asm__("rlwimi %0,%2,24,16,23" : "=&r" (result) : "0" (value>>24), "r" (value)); - __asm__("rlwimi %0,%2,8,8,15" : "=&r" (result) : "0" (result), "r" (value)); - __asm__("rlwimi %0,%2,24,0,7" : "=&r" (result) : "0" (result), "r" (value)); - - return result; -} -#define __arch__swab32(x) ___arch__swab32(x) -#define __arch__swab16(x) ___arch__swab16(x) - -/* The same, but returns converted value from the location pointer by addr. */ -#define __arch__swab16p(addr) ld_le16(addr) -#define __arch__swab32p(addr) ld_le32(addr) - -/* The same, but do the conversion in situ, ie. put the value back to addr. */ -#define __arch__swab16s(addr) st_le16(addr,*addr) -#define __arch__swab32s(addr) st_le32(addr,*addr) - -#endif /* __KERNEL__ */ - -#if !defined(__STRICT_ANSI__) || defined(__KERNEL__) -# define __BYTEORDER_HAS_U64__ -# define __SWAB_64_THRU_32__ -#endif - -#endif /* __GNUC__ */ - -#include <linux/byteorder/big_endian.h> - -#endif /* _PPC_BYTEORDER_H */ diff --git a/include/asm-ppc/cache.h b/include/asm-ppc/cache.h deleted file mode 100644 index 38f2f1be4a87..000000000000 --- a/include/asm-ppc/cache.h +++ /dev/null @@ -1,87 +0,0 @@ -/* - * include/asm-ppc/cache.h - */ -#ifdef __KERNEL__ -#ifndef __ARCH_PPC_CACHE_H -#define __ARCH_PPC_CACHE_H - -#include <linux/config.h> - -/* bytes per L1 cache line */ -#if defined(CONFIG_8xx) || defined(CONFIG_403GCX) -#define L1_CACHE_LINE_SIZE 16 -#define LG_L1_CACHE_LINE_SIZE 4 -#define MAX_COPY_PREFETCH 1 -#elif defined(CONFIG_PPC64BRIDGE) -#define L1_CACHE_LINE_SIZE 128 -#define LG_L1_CACHE_LINE_SIZE 7 -#define MAX_COPY_PREFETCH 1 -#else -#define L1_CACHE_LINE_SIZE 32 -#define LG_L1_CACHE_LINE_SIZE 5 -#define MAX_COPY_PREFETCH 4 -#endif - -#define L1_CACHE_BYTES L1_CACHE_LINE_SIZE -#define L1_CACHE_SHIFT LG_L1_CACHE_LINE_SIZE -#define SMP_CACHE_BYTES L1_CACHE_BYTES -#define L1_CACHE_SHIFT_MAX 7 /* largest L1 which this arch supports */ - -#define L1_CACHE_ALIGN(x) (((x)+(L1_CACHE_BYTES-1))&~(L1_CACHE_BYTES-1)) -#define L1_CACHE_PAGES 8 - -#ifndef __ASSEMBLY__ -extern void clean_dcache_range(unsigned long start, unsigned long stop); -extern void flush_dcache_range(unsigned long start, unsigned long stop); -extern void invalidate_dcache_range(unsigned long start, unsigned long stop); -extern void flush_dcache_all(void); -#endif /* __ASSEMBLY__ */ - -/* prep registers for L2 */ -#define CACHECRBA 0x80000823 /* Cache configuration register address */ -#define L2CACHE_MASK 0x03 /* Mask for 2 L2 Cache bits */ -#define L2CACHE_512KB 0x00 /* 512KB */ -#define L2CACHE_256KB 0x01 /* 256KB */ -#define L2CACHE_1MB 0x02 /* 1MB */ -#define L2CACHE_NONE 0x03 /* NONE */ -#define L2CACHE_PARITY 0x08 /* Mask for L2 Cache Parity Protected bit */ - -#ifdef CONFIG_8xx -/* Cache control on the MPC8xx is provided through some additional - * special purpose registers. - */ -#define SPRN_IC_CST 560 /* Instruction cache control/status */ -#define SPRN_IC_ADR 561 /* Address needed for some commands */ -#define SPRN_IC_DAT 562 /* Read-only data register */ -#define SPRN_DC_CST 568 /* Data cache control/status */ -#define SPRN_DC_ADR 569 /* Address needed for some commands */ -#define SPRN_DC_DAT 570 /* Read-only data register */ - -/* Commands. Only the first few are available to the instruction cache. -*/ -#define IDC_ENABLE 0x02000000 /* Cache enable */ -#define IDC_DISABLE 0x04000000 /* Cache disable */ -#define IDC_LDLCK 0x06000000 /* Load and lock */ -#define IDC_UNLINE 0x08000000 /* Unlock line */ -#define IDC_UNALL 0x0a000000 /* Unlock all */ -#define IDC_INVALL 0x0c000000 /* Invalidate all */ - -#define DC_FLINE 0x0e000000 /* Flush data cache line */ -#define DC_SFWT 0x01000000 /* Set forced writethrough mode */ -#define DC_CFWT 0x03000000 /* Clear forced writethrough mode */ -#define DC_SLES 0x05000000 /* Set little endian swap mode */ -#define DC_CLES 0x07000000 /* Clear little endian swap mode */ - -/* Status. -*/ -#define IDC_ENABLED 0x80000000 /* Cache is enabled */ -#define IDC_CERR1 0x00200000 /* Cache error 1 */ -#define IDC_CERR2 0x00100000 /* Cache error 2 */ -#define IDC_CERR3 0x00080000 /* Cache error 3 */ - -#define DC_DFWT 0x40000000 /* Data cache is forced write through */ -#define DC_LES 0x20000000 /* Caches are little endian mode */ -#endif /* CONFIG_8xx */ - -#endif -#endif /* __KERNEL__ */ diff --git a/include/asm-ppc/cacheflush.h b/include/asm-ppc/cacheflush.h deleted file mode 100644 index 6a243efb3317..000000000000 --- a/include/asm-ppc/cacheflush.h +++ /dev/null @@ -1,49 +0,0 @@ -/* - * include/asm-ppc/cacheflush.h - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ -#ifdef __KERNEL__ -#ifndef _PPC_CACHEFLUSH_H -#define _PPC_CACHEFLUSH_H - -#include <linux/mm.h> - -/* - * No cache flushing is required when address mappings are - * changed, because the caches on PowerPCs are physically - * addressed. -- paulus - * Also, when SMP we use the coherency (M) bit of the - * BATs and PTEs. -- Cort - */ -#define flush_cache_all() do { } while (0) -#define flush_cache_mm(mm) do { } while (0) -#define flush_cache_range(vma, a, b) do { } while (0) -#define flush_cache_page(vma, p, pfn) do { } while (0) -#define flush_icache_page(vma, page) do { } while (0) -#define flush_cache_vmap(start, end) do { } while (0) -#define flush_cache_vunmap(start, end) do { } while (0) - -extern void flush_dcache_page(struct page *page); -#define flush_dcache_mmap_lock(mapping) do { } while (0) -#define flush_dcache_mmap_unlock(mapping) do { } while (0) - -extern void flush_icache_range(unsigned long, unsigned long); -extern void flush_icache_user_range(struct vm_area_struct *vma, - struct page *page, unsigned long addr, int len); - -#define copy_to_user_page(vma, page, vaddr, dst, src, len) \ -do { memcpy(dst, src, len); \ - flush_icache_user_range(vma, page, vaddr, len); \ -} while (0) -#define copy_from_user_page(vma, page, vaddr, dst, src, len) \ - memcpy(dst, src, len) - -extern void __flush_dcache_icache(void *page_va); -extern void __flush_dcache_icache_phys(unsigned long physaddr); -extern void flush_dcache_icache_page(struct page *page); -#endif /* _PPC_CACHEFLUSH_H */ -#endif /* __KERNEL__ */ diff --git a/include/asm-ppc/checksum.h b/include/asm-ppc/checksum.h deleted file mode 100644 index cf953a92c7ab..000000000000 --- a/include/asm-ppc/checksum.h +++ /dev/null @@ -1,107 +0,0 @@ -#ifdef __KERNEL__ -#ifndef _PPC_CHECKSUM_H -#define _PPC_CHECKSUM_H - - -/* - * computes the checksum of a memory block at buff, length len, - * and adds in "sum" (32-bit) - * - * returns a 32-bit number suitable for feeding into itself - * or csum_tcpudp_magic - * - * this function must be called with even lengths, except - * for the last fragment, which may be odd - * - * it's best to have buff aligned on a 32-bit boundary - */ -extern unsigned int csum_partial(const unsigned char * buff, int len, - unsigned int sum); - -/* - * Computes the checksum of a memory block at src, length len, - * and adds in "sum" (32-bit), while copying the block to dst. - * If an access exception occurs on src or dst, it stores -EFAULT - * to *src_err or *dst_err respectively (if that pointer is not - * NULL), and, for an error on src, zeroes the rest of dst. - * - * Like csum_partial, this must be called with even lengths, - * except for the last fragment. - */ -extern unsigned int csum_partial_copy_generic(const char *src, char *dst, - int len, unsigned int sum, - int *src_err, int *dst_err); - -#define csum_partial_copy_from_user(src, dst, len, sum, errp) \ - csum_partial_copy_generic((__force void *)(src), (dst), (len), (sum), (errp), NULL) - -/* FIXME: this needs to be written to really do no check -- Cort */ -#define csum_partial_copy_nocheck(src, dst, len, sum) \ - csum_partial_copy_generic((src), (dst), (len), (sum), NULL, NULL) - -/* - * turns a 32-bit partial checksum (e.g. from csum_partial) into a - * 1's complement 16-bit checksum. - */ -static inline unsigned int csum_fold(unsigned int sum) -{ - unsigned int tmp; - - /* swap the two 16-bit halves of sum */ - __asm__("rlwinm %0,%1,16,0,31" : "=r" (tmp) : "r" (sum)); - /* if there is a carry from adding the two 16-bit halves, - it will carry from the lower half into the upper half, - giving us the correct sum in the upper half. */ - sum = ~(sum + tmp) >> 16; - return sum; -} - -/* - * this routine is used for miscellaneous IP-like checksums, mainly - * in icmp.c - */ -static inline unsigned short ip_compute_csum(unsigned char * buff, int len) -{ - return csum_fold(csum_partial(buff, len, 0)); -} - -/* - * FIXME: I swiped this one from the sparc and made minor modifications. - * It may not be correct. -- Cort - */ -static inline unsigned long csum_tcpudp_nofold(unsigned long saddr, - unsigned long daddr, - unsigned short len, - unsigned short proto, - unsigned int sum) -{ - __asm__("\n\ - addc %0,%0,%1 \n\ - adde %0,%0,%2 \n\ - adde %0,%0,%3 \n\ - addze %0,%0 \n\ - " - : "=r" (sum) - : "r" (daddr), "r"(saddr), "r"((proto<<16)+len), "0"(sum)); - return sum; -} - -/* - * This is a version of ip_compute_csum() optimized for IP headers, - * which always checksum on 4 octet boundaries. ihl is the number - * of 32-bit words and is always >= 5. - */ -extern unsigned short ip_fast_csum(unsigned char * iph, unsigned int ihl); - -/* - * computes the checksum of the TCP/UDP pseudo-header - * returns a 16-bit checksum, already complemented - */ -extern unsigned short csum_tcpudp_magic(unsigned long saddr, - unsigned long daddr, - unsigned short len, - unsigned short proto, - unsigned int sum); - -#endif -#endif /* __KERNEL__ */ diff --git a/include/asm-ppc/commproc.h b/include/asm-ppc/commproc.h index 5bbb8e2c1c6d..973e60908234 100644 --- a/include/asm-ppc/commproc.h +++ b/include/asm-ppc/commproc.h @@ -83,6 +83,8 @@ extern uint m8xx_cpm_hostalloc(uint size); extern int m8xx_cpm_hostfree(uint start); extern void m8xx_cpm_hostdump(void); +extern void cpm_load_patch(volatile immap_t *immr); + /* Buffer descriptors used by many of the CPM protocols. */ typedef struct cpm_buf_desc { diff --git a/include/asm-ppc/cpm2.h b/include/asm-ppc/cpm2.h index 9483d4bfacf7..b638b87cebe3 100644 --- a/include/asm-ppc/cpm2.h +++ b/include/asm-ppc/cpm2.h @@ -1087,6 +1087,11 @@ typedef struct im_idma { #define SCCR_PCIDF_MSK 0x00000078 /* PCI division factor */ #define SCCR_PCIDF_SHIFT 3 +#ifndef CPM_IMMR_OFFSET +#define CPM_IMMR_OFFSET 0x101a8 +#endif + +#define FCC_PSMR_RMII ((uint)0x00020000) /* Use RMII interface */ #endif /* __CPM2__ */ #endif /* __KERNEL__ */ diff --git a/include/asm-ppc/cputable.h b/include/asm-ppc/cputable.h deleted file mode 100644 index 41d8f8425c04..000000000000 --- a/include/asm-ppc/cputable.h +++ /dev/null @@ -1,128 +0,0 @@ -/* - * include/asm-ppc/cputable.h - * - * Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org) - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ - -#ifndef __ASM_PPC_CPUTABLE_H -#define __ASM_PPC_CPUTABLE_H - -/* Exposed to userland CPU features */ -#define PPC_FEATURE_32 0x80000000 -#define PPC_FEATURE_64 0x40000000 -#define PPC_FEATURE_601_INSTR 0x20000000 -#define PPC_FEATURE_HAS_ALTIVEC 0x10000000 -#define PPC_FEATURE_HAS_FPU 0x08000000 -#define PPC_FEATURE_HAS_MMU 0x04000000 -#define PPC_FEATURE_HAS_4xxMAC 0x02000000 -#define PPC_FEATURE_UNIFIED_CACHE 0x01000000 -#define PPC_FEATURE_HAS_SPE 0x00800000 -#define PPC_FEATURE_HAS_EFP_SINGLE 0x00400000 -#define PPC_FEATURE_HAS_EFP_DOUBLE 0x00200000 - -#ifdef __KERNEL__ - -#ifndef __ASSEMBLY__ - -/* This structure can grow, it's real size is used by head.S code - * via the mkdefs mecanism. - */ -struct cpu_spec; - -typedef void (*cpu_setup_t)(unsigned long offset, int cpu_nr, struct cpu_spec* spec); - -struct cpu_spec { - /* CPU is matched via (PVR & pvr_mask) == pvr_value */ - unsigned int pvr_mask; - unsigned int pvr_value; - - char *cpu_name; - unsigned int cpu_features; /* Kernel features */ - unsigned int cpu_user_features; /* Userland features */ - - /* cache line sizes */ - unsigned int icache_bsize; - unsigned int dcache_bsize; - - /* number of performance monitor counters */ - unsigned int num_pmcs; - - /* this is called to initialize various CPU bits like L1 cache, - * BHT, SPD, etc... from head.S before branching to identify_machine - */ - cpu_setup_t cpu_setup; -}; - -extern struct cpu_spec cpu_specs[]; -extern struct cpu_spec *cur_cpu_spec[]; - -static inline unsigned int cpu_has_feature(unsigned int feature) -{ - return cur_cpu_spec[0]->cpu_features & feature; -} - -#endif /* __ASSEMBLY__ */ - -/* CPU kernel features */ -#define CPU_FTR_SPLIT_ID_CACHE 0x00000001 -#define CPU_FTR_L2CR 0x00000002 -#define CPU_FTR_SPEC7450 0x00000004 -#define CPU_FTR_ALTIVEC 0x00000008 -#define CPU_FTR_TAU 0x00000010 -#define CPU_FTR_CAN_DOZE 0x00000020 -#define CPU_FTR_USE_TB 0x00000040 -#define CPU_FTR_604_PERF_MON 0x00000080 -#define CPU_FTR_601 0x00000100 -#define CPU_FTR_HPTE_TABLE 0x00000200 -#define CPU_FTR_CAN_NAP 0x00000400 -#define CPU_FTR_L3CR 0x00000800 -#define CPU_FTR_L3_DISABLE_NAP 0x00001000 -#define CPU_FTR_NAP_DISABLE_L2_PR 0x00002000 -#define CPU_FTR_DUAL_PLL_750FX 0x00004000 -#define CPU_FTR_NO_DPM 0x00008000 -#define CPU_FTR_HAS_HIGH_BATS 0x00010000 -#define CPU_FTR_NEED_COHERENT 0x00020000 -#define CPU_FTR_NO_BTIC 0x00040000 -#define CPU_FTR_BIG_PHYS 0x00080000 - -#ifdef __ASSEMBLY__ - -#define BEGIN_FTR_SECTION 98: - -#define END_FTR_SECTION(msk, val) \ -99: \ - .section __ftr_fixup,"a"; \ - .align 2; \ - .long msk; \ - .long val; \ - .long 98b; \ - .long 99b; \ - .previous - -#else - -#define BEGIN_FTR_SECTION "98:\n" -#define END_FTR_SECTION(msk, val) \ -"99:\n" \ -" .section __ftr_fixup,\"a\";\n" \ -" .align 2;\n" \ -" .long "#msk";\n" \ -" .long "#val";\n" \ -" .long 98b;\n" \ -" .long 99b;\n" \ -" .previous\n" - - -#endif /* __ASSEMBLY__ */ - -#define END_FTR_SECTION_IFSET(msk) END_FTR_SECTION((msk), (msk)) -#define END_FTR_SECTION_IFCLR(msk) END_FTR_SECTION((msk), 0) - -#endif /* __ASM_PPC_CPUTABLE_H */ -#endif /* __KERNEL__ */ - diff --git a/include/asm-ppc/current.h b/include/asm-ppc/current.h deleted file mode 100644 index 8d41501ba10d..000000000000 --- a/include/asm-ppc/current.h +++ /dev/null @@ -1,11 +0,0 @@ -#ifdef __KERNEL__ -#ifndef _PPC_CURRENT_H -#define _PPC_CURRENT_H - -/* - * We keep `current' in r2 for speed. - */ -register struct task_struct *current asm ("r2"); - -#endif /* !(_PPC_CURRENT_H) */ -#endif /* __KERNEL__ */ diff --git a/include/asm-ppc/elf.h b/include/asm-ppc/elf.h deleted file mode 100644 index c25cc35e6ab5..000000000000 --- a/include/asm-ppc/elf.h +++ /dev/null @@ -1,151 +0,0 @@ -#ifndef __PPC_ELF_H -#define __PPC_ELF_H - -/* - * ELF register definitions.. - */ -#include <asm/types.h> -#include <asm/ptrace.h> -#include <asm/cputable.h> -#include <asm/auxvec.h> - -/* PowerPC relocations defined by the ABIs */ -#define R_PPC_NONE 0 -#define R_PPC_ADDR32 1 /* 32bit absolute address */ -#define R_PPC_ADDR24 2 /* 26bit address, 2 bits ignored. */ -#define R_PPC_ADDR16 3 /* 16bit absolute address */ -#define R_PPC_ADDR16_LO 4 /* lower 16bit of absolute address */ -#define R_PPC_ADDR16_HI 5 /* high 16bit of absolute address */ -#define R_PPC_ADDR16_HA 6 /* adjusted high 16bit */ -#define R_PPC_ADDR14 7 /* 16bit address, 2 bits ignored */ -#define R_PPC_ADDR14_BRTAKEN 8 -#define R_PPC_ADDR14_BRNTAKEN 9 -#define R_PPC_REL24 10 /* PC relative 26 bit */ -#define R_PPC_REL14 11 /* PC relative 16 bit */ -#define R_PPC_REL14_BRTAKEN 12 -#define R_PPC_REL14_BRNTAKEN 13 -#define R_PPC_GOT16 14 -#define R_PPC_GOT16_LO 15 -#define R_PPC_GOT16_HI 16 -#define R_PPC_GOT16_HA 17 -#define R_PPC_PLTREL24 18 -#define R_PPC_COPY 19 -#define R_PPC_GLOB_DAT 20 -#define R_PPC_JMP_SLOT 21 -#define R_PPC_RELATIVE 22 -#define R_PPC_LOCAL24PC 23 -#define R_PPC_UADDR32 24 -#define R_PPC_UADDR16 25 -#define R_PPC_REL32 26 -#define R_PPC_PLT32 27 -#define R_PPC_PLTREL32 28 -#define R_PPC_PLT16_LO 29 -#define R_PPC_PLT16_HI 30 -#define R_PPC_PLT16_HA 31 -#define R_PPC_SDAREL16 32 -#define R_PPC_SECTOFF 33 -#define R_PPC_SECTOFF_LO 34 -#define R_PPC_SECTOFF_HI 35 -#define R_PPC_SECTOFF_HA 36 -/* Keep this the last entry. */ -#define R_PPC_NUM 37 - -#define ELF_NGREG 48 /* includes nip, msr, lr, etc. */ -#define ELF_NFPREG 33 /* includes fpscr */ -#define ELF_NVRREG 33 /* includes vscr */ -#define ELF_NEVRREG 34 /* includes acc (as 2) */ - -/* - * These are used to set parameters in the core dumps. - */ -#define ELF_ARCH EM_PPC -#define ELF_CLASS ELFCLASS32 -#define ELF_DATA ELFDATA2MSB - -/* General registers */ -typedef unsigned long elf_greg_t; -typedef elf_greg_t elf_gregset_t[ELF_NGREG]; - -/* Floating point registers */ -typedef double elf_fpreg_t; -typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG]; - -/* Altivec registers */ -typedef __vector128 elf_vrreg_t; -typedef elf_vrreg_t elf_vrregset_t[ELF_NVRREG]; - -#ifdef __KERNEL__ - -struct task_struct; - -/* - * This is used to ensure we don't load something for the wrong architecture. - */ - -#define elf_check_arch(x) ((x)->e_machine == EM_PPC) - -/* This is the location that an ET_DYN program is loaded if exec'ed. Typical - use of this is to invoke "./ld.so someprog" to test out a new version of - the loader. We need to make sure that it is out of the way of the program - that it will "exec", and that there is sufficient room for the brk. */ - -#define ELF_ET_DYN_BASE (0x08000000) - -#define USE_ELF_CORE_DUMP -#define ELF_EXEC_PAGESIZE 4096 - -#define ELF_CORE_COPY_REGS(gregs, regs) \ - memcpy((gregs), (regs), sizeof(struct pt_regs)); \ - memset((char *)(gregs) + sizeof(struct pt_regs), 0, \ - sizeof(elf_gregset_t) - sizeof(struct pt_regs)); - -#define ELF_CORE_COPY_TASK_REGS(t, elfregs) \ - ((t)->thread.regs? \ - ({ ELF_CORE_COPY_REGS((elfregs), (t)->thread.regs); 1; }): 0) - -extern int dump_task_fpu(struct task_struct *t, elf_fpregset_t *fpu); -#define ELF_CORE_COPY_FPREGS(t, fpu) dump_task_fpu((t), (fpu)) - -/* This yields a mask that user programs can use to figure out what - instruction set this cpu supports. This could be done in userspace, - but it's not easy, and we've already done it here. */ - -#define ELF_HWCAP (cur_cpu_spec[0]->cpu_user_features) - -/* This yields a string that ld.so will use to load implementation - specific libraries for optimization. This is more specific in - intent than poking at uname or /proc/cpuinfo. - - For the moment, we have only optimizations for the Intel generations, - but that could change... */ - -#define ELF_PLATFORM (NULL) - -#define SET_PERSONALITY(ex, ibcs2) set_personality((ibcs2)?PER_SVR4:PER_LINUX) - -extern int dcache_bsize; -extern int icache_bsize; -extern int ucache_bsize; - -/* - * The requirements here are: - * - keep the final alignment of sp (sp & 0xf) - * - make sure the 32-bit value at the first 16 byte aligned position of - * AUXV is greater than 16 for glibc compatibility. - * AT_IGNOREPPC is used for that. - * - for compatibility with glibc ARCH_DLINFO must always be defined on PPC, - * even if DLINFO_ARCH_ITEMS goes to zero or is undefined. - */ -#define ARCH_DLINFO \ -do { \ - /* Handle glibc compatibility. */ \ - NEW_AUX_ENT(AT_IGNOREPPC, AT_IGNOREPPC); \ - NEW_AUX_ENT(AT_IGNOREPPC, AT_IGNOREPPC); \ - /* Cache size items */ \ - NEW_AUX_ENT(AT_DCACHEBSIZE, dcache_bsize); \ - NEW_AUX_ENT(AT_ICACHEBSIZE, icache_bsize); \ - NEW_AUX_ENT(AT_UCACHEBSIZE, ucache_bsize); \ - } while (0) - -#endif /* __KERNEL__ */ -#endif diff --git a/include/asm-ppc/futex.h b/include/asm-ppc/futex.h deleted file mode 100644 index 9feff4ce1424..000000000000 --- a/include/asm-ppc/futex.h +++ /dev/null @@ -1,53 +0,0 @@ -#ifndef _ASM_FUTEX_H -#define _ASM_FUTEX_H - -#ifdef __KERNEL__ - -#include <linux/futex.h> -#include <asm/errno.h> -#include <asm/uaccess.h> - -static inline int -futex_atomic_op_inuser (int encoded_op, int __user *uaddr) -{ - int op = (encoded_op >> 28) & 7; - int cmp = (encoded_op >> 24) & 15; - int oparg = (encoded_op << 8) >> 20; - int cmparg = (encoded_op << 20) >> 20; - int oldval = 0, ret; - if (encoded_op & (FUTEX_OP_OPARG_SHIFT << 28)) - oparg = 1 << oparg; - - if (! access_ok (VERIFY_WRITE, uaddr, sizeof(int))) - return -EFAULT; - - inc_preempt_count(); - - switch (op) { - case FUTEX_OP_SET: - case FUTEX_OP_ADD: - case FUTEX_OP_OR: - case FUTEX_OP_ANDN: - case FUTEX_OP_XOR: - default: - ret = -ENOSYS; - } - - dec_preempt_count(); - - if (!ret) { - switch (cmp) { - case FUTEX_OP_CMP_EQ: ret = (oldval == cmparg); break; - case FUTEX_OP_CMP_NE: ret = (oldval != cmparg); break; - case FUTEX_OP_CMP_LT: ret = (oldval < cmparg); break; - case FUTEX_OP_CMP_GE: ret = (oldval >= cmparg); break; - case FUTEX_OP_CMP_LE: ret = (oldval <= cmparg); break; - case FUTEX_OP_CMP_GT: ret = (oldval > cmparg); break; - default: ret = -ENOSYS; - } - } - return ret; -} - -#endif -#endif diff --git a/include/asm-ppc/hw_irq.h b/include/asm-ppc/hw_irq.h deleted file mode 100644 index 47dc7990fb26..000000000000 --- a/include/asm-ppc/hw_irq.h +++ /dev/null @@ -1,74 +0,0 @@ -/* - * Copyright (C) 1999 Cort Dougan <cort@cs.nmt.edu> - */ -#ifdef __KERNEL__ -#ifndef _PPC_HW_IRQ_H -#define _PPC_HW_IRQ_H - -#include <asm/ptrace.h> -#include <asm/reg.h> - -extern void timer_interrupt(struct pt_regs *); - -#define INLINE_IRQS - -#define irqs_disabled() ((mfmsr() & MSR_EE) == 0) - -#ifdef INLINE_IRQS - -static inline void local_irq_disable(void) -{ - unsigned long msr; - msr = mfmsr(); - mtmsr(msr & ~MSR_EE); - __asm__ __volatile__("": : :"memory"); -} - -static inline void local_irq_enable(void) -{ - unsigned long msr; - __asm__ __volatile__("": : :"memory"); - msr = mfmsr(); - mtmsr(msr | MSR_EE); -} - -static inline void local_irq_save_ptr(unsigned long *flags) -{ - unsigned long msr; - msr = mfmsr(); - *flags = msr; - mtmsr(msr & ~MSR_EE); - __asm__ __volatile__("": : :"memory"); -} - -#define local_save_flags(flags) ((flags) = mfmsr()) -#define local_irq_save(flags) local_irq_save_ptr(&flags) -#define local_irq_restore(flags) mtmsr(flags) - -#else - -extern void local_irq_enable(void); -extern void local_irq_disable(void); -extern void local_irq_restore(unsigned long); -extern void local_save_flags_ptr(unsigned long *); - -#define local_save_flags(flags) local_save_flags_ptr(&flags) -#define local_irq_save(flags) ({local_save_flags(flags);local_irq_disable();}) - -#endif - -extern void do_lost_interrupts(unsigned long); - -#define mask_irq(irq) ({if (irq_desc[irq].handler && irq_desc[irq].handler->disable) irq_desc[irq].handler->disable(irq);}) -#define unmask_irq(irq) ({if (irq_desc[irq].handler && irq_desc[irq].handler->enable) irq_desc[irq].handler->enable(irq);}) -#define ack_irq(irq) ({if (irq_desc[irq].handler && irq_desc[irq].handler->ack) irq_desc[irq].handler->ack(irq);}) - -/* Should we handle this via lost interrupts and IPIs or should we don't care like - * we do now ? --BenH. - */ -struct hw_interrupt_type; -static inline void hw_resend_irq(struct hw_interrupt_type *h, unsigned int i) {} - - -#endif /* _PPC_HW_IRQ_H */ -#endif /* __KERNEL__ */ diff --git a/include/asm-ppc/i8259.h b/include/asm-ppc/i8259.h deleted file mode 100644 index 091b71295de4..000000000000 --- a/include/asm-ppc/i8259.h +++ /dev/null @@ -1,11 +0,0 @@ -#ifndef _PPC_KERNEL_i8259_H -#define _PPC_KERNEL_i8259_H - -#include <linux/irq.h> - -extern struct hw_interrupt_type i8259_pic; - -extern void i8259_init(long intack_addr); -extern int i8259_irq(struct pt_regs *regs); - -#endif /* _PPC_KERNEL_i8259_H */ diff --git a/include/asm-ppc/ibm44x.h b/include/asm-ppc/ibm44x.h index e5374be86aef..f835066fb3ca 100644 --- a/include/asm-ppc/ibm44x.h +++ b/include/asm-ppc/ibm44x.h @@ -34,12 +34,20 @@ /* Lowest TLB slot consumed by the default pinned TLBs */ #define PPC44x_LOW_SLOT 63 -/* LS 32-bits of UART0 physical address location for early serial text debug */ +/* + * Least significant 32-bits and extended real page number (ERPN) of + * UART0 physical address location for early serial text debug + */ #if defined(CONFIG_440SP) +#define UART0_PHYS_ERPN 1 +#define UART0_PHYS_IO_BASE 0xf0000200 +#elif defined(CONFIG_440SPE) +#define UART0_PHYS_ERPN 4 #define UART0_PHYS_IO_BASE 0xf0000200 #elif defined(CONFIG_440EP) #define UART0_PHYS_IO_BASE 0xe0000000 #else +#define UART0_PHYS_ERPN 1 #define UART0_PHYS_IO_BASE 0x40000200 #endif @@ -56,6 +64,11 @@ #define PPC44x_PCICFG_PAGE 0x0000000900000000ULL #define PPC44x_PCIIO_PAGE PPC44x_PCICFG_PAGE #define PPC44x_PCIMEM_PAGE 0x0000000a00000000ULL +#elif defined(CONFIG_440SPE) +#define PPC44x_IO_PAGE 0x0000000400000000ULL +#define PPC44x_PCICFG_PAGE 0x0000000c00000000ULL +#define PPC44x_PCIIO_PAGE PPC44x_PCICFG_PAGE +#define PPC44x_PCIMEM_PAGE 0x0000000d00000000ULL #elif defined(CONFIG_440EP) #define PPC44x_IO_PAGE 0x0000000000000000ULL #define PPC44x_PCICFG_PAGE 0x0000000000000000ULL @@ -71,7 +84,7 @@ /* * 36-bit trap ranges */ -#if defined(CONFIG_440SP) +#if defined(CONFIG_440SP) || defined(CONFIG_440SPE) #define PPC44x_IO_LO 0xf0000000UL #define PPC44x_IO_HI 0xf0000fffUL #define PPC44x_PCI0CFG_LO 0x0ec00000UL @@ -109,7 +122,7 @@ */ -/* CPRs (440GX and 440SP) */ +/* CPRs (440GX and 440SP/440SPe) */ #define DCRN_CPR_CONFIG_ADDR 0xc #define DCRN_CPR_CONFIG_DATA 0xd @@ -130,7 +143,7 @@ mtdcr(DCRN_CPR_CONFIG_ADDR, offset); \ mtdcr(DCRN_CPR_CONFIG_DATA, data);}) -/* SDRs (440GX and 440SP) */ +/* SDRs (440GX and 440SP/440SPe) */ #define DCRN_SDR_CONFIG_ADDR 0xe #define DCRN_SDR_CONFIG_DATA 0xf #define DCRN_SDR_PFC0 0x4100 @@ -180,7 +193,7 @@ mtdcr(DCRN_SDR_CONFIG_ADDR, offset); \ mtdcr(DCRN_SDR_CONFIG_DATA,data);}) -/* DMA (excluding 440SP) */ +/* DMA (excluding 440SP/440SPe) */ #define DCRN_DMA0_BASE 0x100 #define DCRN_DMA1_BASE 0x108 #define DCRN_DMA2_BASE 0x110 @@ -200,12 +213,20 @@ /* UIC */ #define DCRN_UIC0_BASE 0xc0 #define DCRN_UIC1_BASE 0xd0 -#define DCRN_UIC2_BASE 0x210 -#define DCRN_UICB_BASE 0x200 #define UIC0 DCRN_UIC0_BASE #define UIC1 DCRN_UIC1_BASE + +#ifdef CONFIG_440SPE +#define DCRN_UIC2_BASE 0xe0 +#define DCRN_UIC3_BASE 0xf0 +#define UIC2 DCRN_UIC2_BASE +#define UIC3 DCRN_UIC3_BASE +#else +#define DCRN_UIC2_BASE 0x210 +#define DCRN_UICB_BASE 0x200 #define UIC2 DCRN_UIC2_BASE #define UICB DCRN_UICB_BASE +#endif #define DCRN_UIC_SR(base) (base + 0x0) #define DCRN_UIC_ER(base) (base + 0x2) @@ -218,6 +239,12 @@ #define UIC0_UIC1NC 0x00000002 +#ifdef CONFIG_440SPE +#define UIC0_UIC1NC 0x00000002 +#define UIC0_UIC2NC 0x00200000 +#define UIC0_UIC3NC 0x00008000 +#endif + #define UICB_UIC0NC 0x40000000 #define UICB_UIC1NC 0x10000000 #define UICB_UIC2NC 0x04000000 @@ -297,6 +324,23 @@ #define MALOBISR_CH0 0x80000000 /* EOB channel 1 bit */ #define MALOBISR_CH2 0x40000000 /* EOB channel 2 bit */ +#if defined(CONFIG_440SP) || defined(CONFIG_440SPE) +/* 440SP/440SPe PLB Arbiter DCRs */ +#define DCRN_PLB_REVID 0x080 /* PLB Revision ID */ +#define DCRN_PLB_CCR 0x088 /* PLB Crossbar Control */ + +#define DCRN_PLB0_ACR 0x081 /* PLB Arbiter Control */ +#define DCRN_PLB0_BESRL 0x082 /* PLB Error Status */ +#define DCRN_PLB0_BESRH 0x083 /* PLB Error Status */ +#define DCRN_PLB0_BEARL 0x084 /* PLB Error Address Low */ +#define DCRN_PLB0_BEARH 0x085 /* PLB Error Address High */ + +#define DCRN_PLB1_ACR 0x089 /* PLB Arbiter Control */ +#define DCRN_PLB1_BESRL 0x08a /* PLB Error Status */ +#define DCRN_PLB1_BESRH 0x08b /* PLB Error Status */ +#define DCRN_PLB1_BEARL 0x08c /* PLB Error Address Low */ +#define DCRN_PLB1_BEARH 0x08d /* PLB Error Address High */ +#else /* 440GP/GX PLB Arbiter DCRs */ #define DCRN_PLB0_REVID 0x082 /* PLB Arbiter Revision ID */ #define DCRN_PLB0_ACR 0x083 /* PLB Arbiter Control */ @@ -304,6 +348,7 @@ #define DCRN_PLB0_BEARL 0x086 /* PLB Error Address Low */ #define DCRN_PLB0_BEAR DCRN_PLB0_BEARL /* 40x compatibility */ #define DCRN_PLB0_BEARH 0x087 /* PLB Error Address High */ +#endif /* 440GP/GX PLB to OPB bridge DCRs */ #define DCRN_POB0_BESR0 0x090 @@ -407,9 +452,13 @@ #define PPC44x_MEM_SIZE_1G 0x40000000 #define PPC44x_MEM_SIZE_2G 0x80000000 -/* 440SP memory controller DCRs */ +/* 440SP/440SPe memory controller DCRs */ #define DCRN_MQ0_BS0BAS 0x40 -#define DCRN_MQ0_BS1BAS 0x41 +#if defined(CONFIG_440SP) +#define MQ0_NUM_BANKS 2 +#elif defined(CONFIG_440SPE) +#define MQ0_NUM_BANKS 4 +#endif #define MQ0_CONFIG_SIZE_MASK 0x0000fff0 #define MQ0_CONFIG_SIZE_8M 0x0000ffc0 @@ -421,8 +470,9 @@ #define MQ0_CONFIG_SIZE_512M 0x0000f000 #define MQ0_CONFIG_SIZE_1G 0x0000e000 #define MQ0_CONFIG_SIZE_2G 0x0000c000 +#define MQ0_CONFIG_SIZE_4G 0x00008000 -/* Internal SRAM Controller 440GX/440SP */ +/* Internal SRAM Controller 440GX/440SP/440SPe */ #define DCRN_SRAM0_BASE 0x000 #define DCRN_SRAM0_SB0CR (DCRN_SRAM0_BASE + 0x020) @@ -446,7 +496,7 @@ #define DCRN_SRAM0_DPC (DCRN_SRAM0_BASE + 0x02a) #define SRAM_DPC_ENABLE 0x80000000 -/* L2 Cache Controller 440GX/440SP */ +/* L2 Cache Controller 440GX/440SP/440SPe */ #define DCRN_L2C0_CFG 0x030 #define L2C_CFG_L2M 0x80000000 #define L2C_CFG_ICU 0x40000000 @@ -610,8 +660,10 @@ #define IIC_CLOCK 50 #undef NR_UICS -#ifdef CONFIG_440GX +#if defined(CONFIG_440GX) #define NR_UICS 3 +#elif defined(CONFIG_440SPE) +#define NR_UICS 4 #else #define NR_UICS 2 #endif diff --git a/include/asm-ppc/ibm4xx.h b/include/asm-ppc/ibm4xx.h index e992369cb8e9..6c28ae7807f4 100644 --- a/include/asm-ppc/ibm4xx.h +++ b/include/asm-ppc/ibm4xx.h @@ -97,6 +97,10 @@ void ppc4xx_init(unsigned long r3, unsigned long r4, unsigned long r5, #include <platforms/4xx/luan.h> #endif +#if defined(CONFIG_YUCCA) +#include <platforms/4xx/yucca.h> +#endif + #if defined(CONFIG_OCOTEA) #include <platforms/4xx/ocotea.h> #endif diff --git a/include/asm-ppc/ibm_ocp.h b/include/asm-ppc/ibm_ocp.h index 6f10a25bd628..9c21de1ff4ed 100644 --- a/include/asm-ppc/ibm_ocp.h +++ b/include/asm-ppc/ibm_ocp.h @@ -131,9 +131,22 @@ static inline void ibm_ocp_set_emac(int start, int end) /* Copy MAC addresses to EMAC additions */ for (i=start; i<=end; i++) { def = ocp_get_one_device(OCP_VENDOR_IBM, OCP_FUNC_EMAC, i); - memcpy(((struct ocp_func_emac_data *)def->additions)->mac_addr, - &__res.bi_enetaddr[i], - 6); + if (i == 0) + memcpy(((struct ocp_func_emac_data *)def->additions)->mac_addr, + __res.bi_enetaddr, 6); +#if defined(CONFIG_405EP) || defined(CONFIG_44x) + else if (i == 1) + memcpy(((struct ocp_func_emac_data *)def->additions)->mac_addr, + __res.bi_enet1addr, 6); +#endif +#if defined(CONFIG_440GX) + else if (i == 2) + memcpy(((struct ocp_func_emac_data *)def->additions)->mac_addr, + __res.bi_enet2addr, 6); + else if (i == 3) + memcpy(((struct ocp_func_emac_data *)def->additions)->mac_addr, + __res.bi_enet3addr, 6); +#endif } } #endif diff --git a/include/asm-ppc/immap_85xx.h b/include/asm-ppc/immap_85xx.h index 50fb5e47094a..9383d0c13ff8 100644 --- a/include/asm-ppc/immap_85xx.h +++ b/include/asm-ppc/immap_85xx.h @@ -3,7 +3,7 @@ * * MPC85xx Internal Memory Map * - * Maintainer: Kumar Gala <kumar.gala@freescale.com> + * Maintainer: Kumar Gala <galak@kernel.crashing.org> * * Copyright 2004 Freescale Semiconductor, Inc * diff --git a/include/asm-ppc/io.h b/include/asm-ppc/io.h index 7eb7cf6360bd..84ac6e258eef 100644 --- a/include/asm-ppc/io.h +++ b/include/asm-ppc/io.h @@ -8,6 +8,7 @@ #include <asm/page.h> #include <asm/byteorder.h> +#include <asm/synch.h> #include <asm/mmu.h> #define SIO_CONFIG_RA 0x398 @@ -56,7 +57,7 @@ extern unsigned long pci_dram_offset; * is actually performed (i.e. the data has come back) before we start * executing any following instructions. */ -extern inline int in_8(volatile unsigned char __iomem *addr) +extern inline int in_8(const volatile unsigned char __iomem *addr) { int ret; @@ -72,7 +73,7 @@ extern inline void out_8(volatile unsigned char __iomem *addr, int val) __asm__ __volatile__("stb%U0%X0 %1,%0; eieio" : "=m" (*addr) : "r" (val)); } -extern inline int in_le16(volatile unsigned short __iomem *addr) +extern inline int in_le16(const volatile unsigned short __iomem *addr) { int ret; @@ -83,7 +84,7 @@ extern inline int in_le16(volatile unsigned short __iomem *addr) return ret; } -extern inline int in_be16(volatile unsigned short __iomem *addr) +extern inline int in_be16(const volatile unsigned short __iomem *addr) { int ret; @@ -104,7 +105,7 @@ extern inline void out_be16(volatile unsigned short __iomem *addr, int val) __asm__ __volatile__("sth%U0%X0 %1,%0; eieio" : "=m" (*addr) : "r" (val)); } -extern inline unsigned in_le32(volatile unsigned __iomem *addr) +extern inline unsigned in_le32(const volatile unsigned __iomem *addr) { unsigned ret; @@ -115,7 +116,7 @@ extern inline unsigned in_le32(volatile unsigned __iomem *addr) return ret; } -extern inline unsigned in_be32(volatile unsigned __iomem *addr) +extern inline unsigned in_be32(const volatile unsigned __iomem *addr) { unsigned ret; @@ -139,7 +140,7 @@ extern inline void out_be32(volatile unsigned __iomem *addr, int val) #define readb(addr) in_8((volatile u8 *)(addr)) #define writeb(b,addr) out_8((volatile u8 *)(addr), (b)) #else -static inline __u8 readb(volatile void __iomem *addr) +static inline __u8 readb(const volatile void __iomem *addr) { return in_8(addr); } @@ -150,11 +151,11 @@ static inline void writeb(__u8 b, volatile void __iomem *addr) #endif #if defined(CONFIG_APUS) -static inline __u16 readw(volatile void __iomem *addr) +static inline __u16 readw(const volatile void __iomem *addr) { return *(__force volatile __u16 *)(addr); } -static inline __u32 readl(volatile void __iomem *addr) +static inline __u32 readl(const volatile void __iomem *addr) { return *(__force volatile __u32 *)(addr); } @@ -173,11 +174,11 @@ static inline void writel(__u32 b, volatile void __iomem *addr) #define writew(b,addr) out_le16((volatile u16 *)(addr),(b)) #define writel(b,addr) out_le32((volatile u32 *)(addr),(b)) #else -static inline __u16 readw(volatile void __iomem *addr) +static inline __u16 readw(const volatile void __iomem *addr) { return in_le16(addr); } -static inline __u32 readl(volatile void __iomem *addr) +static inline __u32 readl(const volatile void __iomem *addr) { return in_le32(addr); } @@ -236,9 +237,9 @@ static inline void __raw_writel(__u32 b, volatile void __iomem *addr) #define outsl(port, buf, nl) _outsl_ns((port)+___IO_BASE, (buf), (nl)) /* - * On powermacs, we will get a machine check exception if we - * try to read data from a non-existent I/O port. Because the - * machine check is an asynchronous exception, it isn't + * On powermacs and 8xx we will get a machine check exception + * if we try to read data from a non-existent I/O port. Because + * the machine check is an asynchronous exception, it isn't * well-defined which instruction SRR0 will point to when the * exception occurs. * With the sequence below (twi; isync; nop), we have found that @@ -257,7 +258,7 @@ extern __inline__ unsigned int name(unsigned int port) \ { \ unsigned int x; \ __asm__ __volatile__( \ - op " %0,0,%1\n" \ + "0:" op " %0,0,%1\n" \ "1: twi 0,%0,0\n" \ "2: isync\n" \ "3: nop\n" \ @@ -268,6 +269,7 @@ extern __inline__ unsigned int name(unsigned int port) \ ".previous\n" \ ".section __ex_table,\"a\"\n" \ " .align 2\n" \ + " .long 0b,5b\n" \ " .long 1b,5b\n" \ " .long 2b,5b\n" \ " .long 3b,5b\n" \ @@ -281,11 +283,12 @@ extern __inline__ unsigned int name(unsigned int port) \ extern __inline__ void name(unsigned int val, unsigned int port) \ { \ __asm__ __volatile__( \ - op " %0,0,%1\n" \ + "0:" op " %0,0,%1\n" \ "1: sync\n" \ "2:\n" \ ".section __ex_table,\"a\"\n" \ " .align 2\n" \ + " .long 0b,2b\n" \ " .long 1b,2b\n" \ ".previous" \ : : "r" (val), "r" (port + ___IO_BASE)); \ @@ -440,16 +443,6 @@ extern inline void * phys_to_virt(unsigned long address) #define page_to_phys(page) (page_to_pfn(page) << PAGE_SHIFT) #define page_to_bus(page) (page_to_phys(page) + PCI_DRAM_OFFSET) -/* - * Enforce In-order Execution of I/O: - * Acts as a barrier to ensure all previous I/O accesses have - * completed before any further ones are issued. - */ -extern inline void eieio(void) -{ - __asm__ __volatile__ ("eieio" : : : "memory"); -} - /* Enforce in-order execution of data I/O. * No distinction between read/write on PPC; use eieio for all three. */ @@ -552,6 +545,23 @@ extern void pci_iounmap(struct pci_dev *dev, void __iomem *); #include <asm/mpc8260_pci9.h> #endif +#ifdef CONFIG_NOT_COHERENT_CACHE + +#define dma_cache_inv(_start,_size) \ + invalidate_dcache_range(_start, (_start + _size)) +#define dma_cache_wback(_start,_size) \ + clean_dcache_range(_start, (_start + _size)) +#define dma_cache_wback_inv(_start,_size) \ + flush_dcache_range(_start, (_start + _size)) + +#else + +#define dma_cache_inv(_start,_size) do { } while (0) +#define dma_cache_wback(_start,_size) do { } while (0) +#define dma_cache_wback_inv(_start,_size) do { } while (0) + +#endif + /* * Convert a physical pointer to a virtual kernel pointer for /dev/mem * access diff --git a/include/asm-ppc/ipcbuf.h b/include/asm-ppc/ipcbuf.h deleted file mode 100644 index fab6752c7480..000000000000 --- a/include/asm-ppc/ipcbuf.h +++ /dev/null @@ -1,29 +0,0 @@ -#ifndef __PPC_IPCBUF_H__ -#define __PPC_IPCBUF_H__ - -/* - * The ipc64_perm structure for PPC architecture. - * Note extra padding because this structure is passed back and forth - * between kernel and user space. - * - * Pad space is left for: - * - 1 32-bit value to fill up for 8-byte alignment - * - 2 miscellaneous 64-bit values (so that this structure matches - * PPC64 ipc64_perm) - */ - -struct ipc64_perm -{ - __kernel_key_t key; - __kernel_uid_t uid; - __kernel_gid_t gid; - __kernel_uid_t cuid; - __kernel_gid_t cgid; - __kernel_mode_t mode; - unsigned long seq; - unsigned int __pad2; - unsigned long long __unused1; - unsigned long long __unused2; -}; - -#endif /* __PPC_IPCBUF_H__ */ diff --git a/include/asm-ppc/ipic.h b/include/asm-ppc/ipic.h index 9092b920997a..0fe396a2b666 100644 --- a/include/asm-ppc/ipic.h +++ b/include/asm-ppc/ipic.h @@ -3,7 +3,7 @@ * * IPIC external definitions and structure. * - * Maintainer: Kumar Gala <kumar.gala@freescale.com> + * Maintainer: Kumar Gala <galak@kernel.crashing.org> * * Copyright 2005 Freescale Semiconductor, Inc * diff --git a/include/asm-ppc/kexec.h b/include/asm-ppc/kexec.h deleted file mode 100644 index 6d2aa0aa4642..000000000000 --- a/include/asm-ppc/kexec.h +++ /dev/null @@ -1,40 +0,0 @@ -#ifndef _PPC_KEXEC_H -#define _PPC_KEXEC_H - -#ifdef CONFIG_KEXEC - -/* - * KEXEC_SOURCE_MEMORY_LIMIT maximum page get_free_page can return. - * I.e. Maximum page that is mapped directly into kernel memory, - * and kmap is not required. - * - * Someone correct me if FIXADDR_START - PAGEOFFSET is not the correct - * calculation for the amount of memory directly mappable into the - * kernel memory space. - */ - -/* Maximum physical address we can use pages from */ -#define KEXEC_SOURCE_MEMORY_LIMIT (-1UL) -/* Maximum address we can reach in physical address mode */ -#define KEXEC_DESTINATION_MEMORY_LIMIT (-1UL) -/* Maximum address we can use for the control code buffer */ -#define KEXEC_CONTROL_MEMORY_LIMIT TASK_SIZE - -#define KEXEC_CONTROL_CODE_SIZE 4096 - -/* The native architecture */ -#define KEXEC_ARCH KEXEC_ARCH_PPC - -#ifndef __ASSEMBLY__ - -extern void *crash_notes; - -struct kimage; - -extern void machine_kexec_simple(struct kimage *image); - -#endif /* __ASSEMBLY__ */ - -#endif /* CONFIG_KEXEC */ - -#endif /* _PPC_KEXEC_H */ diff --git a/include/asm-ppc/kgdb.h b/include/asm-ppc/kgdb.h index 1d3c927ce626..b617dac82969 100644 --- a/include/asm-ppc/kgdb.h +++ b/include/asm-ppc/kgdb.h @@ -31,7 +31,7 @@ extern void breakpoint(void); /* For taking exceptions * these are defined in traps.c */ -extern void (*debugger)(struct pt_regs *regs); +extern int (*debugger)(struct pt_regs *regs); extern int (*debugger_bpt)(struct pt_regs *regs); extern int (*debugger_sstep)(struct pt_regs *regs); extern int (*debugger_iabr_match)(struct pt_regs *regs); diff --git a/include/asm-ppc/kmap_types.h b/include/asm-ppc/kmap_types.h deleted file mode 100644 index 6d6fc78731e5..000000000000 --- a/include/asm-ppc/kmap_types.h +++ /dev/null @@ -1,25 +0,0 @@ -#ifdef __KERNEL__ -#ifndef _ASM_KMAP_TYPES_H -#define _ASM_KMAP_TYPES_H - -enum km_type { - KM_BOUNCE_READ, - KM_SKB_SUNRPC_DATA, - KM_SKB_DATA_SOFTIRQ, - KM_USER0, - KM_USER1, - KM_BIO_SRC_IRQ, - KM_BIO_DST_IRQ, - KM_PTE0, - KM_PTE1, - KM_IRQ0, - KM_IRQ1, - KM_SOFTIRQ0, - KM_SOFTIRQ1, - KM_PPC_SYNC_PAGE, - KM_PPC_SYNC_ICACHE, - KM_TYPE_NR -}; - -#endif -#endif /* __KERNEL__ */ diff --git a/include/asm-ppc/machdep.h b/include/asm-ppc/machdep.h index 1d4ab70a56f3..f01255bd1dc3 100644 --- a/include/asm-ppc/machdep.h +++ b/include/asm-ppc/machdep.h @@ -98,7 +98,7 @@ struct machdep_calls { /* Get access protection for /dev/mem */ pgprot_t (*phys_mem_access_prot)(struct file *file, - unsigned long offset, + unsigned long pfn, unsigned long size, pgprot_t vma_prot); @@ -167,7 +167,7 @@ extern sys_ctrler_t sys_ctrler; #ifdef CONFIG_SMP struct smp_ops_t { - void (*message_pass)(int target, int msg, unsigned long data, int wait); + void (*message_pass)(int target, int msg); int (*probe)(void); void (*kick_cpu)(int nr); void (*setup_cpu)(int nr); diff --git a/include/asm-ppc/mmu_context.h b/include/asm-ppc/mmu_context.h index afe26ffc2e2d..4f152cca13c1 100644 --- a/include/asm-ppc/mmu_context.h +++ b/include/asm-ppc/mmu_context.h @@ -164,13 +164,11 @@ static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next, struct task_struct *tsk) { #ifdef CONFIG_ALTIVEC - asm volatile ( - BEGIN_FTR_SECTION - "dssall;\n" + if (cpu_has_feature(CPU_FTR_ALTIVEC)) + asm volatile ("dssall;\n" #ifndef CONFIG_POWER4 "sync;\n" /* G4 needs a sync here, G5 apparently not */ #endif - END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC) : : ); #endif /* CONFIG_ALTIVEC */ diff --git a/include/asm-ppc/mpc8260.h b/include/asm-ppc/mpc8260.h index 9694eca16e92..321452695039 100644 --- a/include/asm-ppc/mpc8260.h +++ b/include/asm-ppc/mpc8260.h @@ -92,6 +92,10 @@ enum ppc_sys_devices { extern unsigned char __res[]; #endif +#ifndef BOARD_CHIP_NAME +#define BOARD_CHIP_NAME "" +#endif + #endif /* CONFIG_8260 */ #endif /* !__ASM_PPC_MPC8260_H__ */ #endif /* __KERNEL__ */ diff --git a/include/asm-ppc/mpc83xx.h b/include/asm-ppc/mpc83xx.h index bb1b0576c947..7cdf60fa69b6 100644 --- a/include/asm-ppc/mpc83xx.h +++ b/include/asm-ppc/mpc83xx.h @@ -3,7 +3,7 @@ * * MPC83xx definitions * - * Maintainer: Kumar Gala <kumar.gala@freescale.com> + * Maintainer: Kumar Gala <galak@kernel.crashing.org> * * Copyright 2005 Freescale Semiconductor, Inc * @@ -107,6 +107,7 @@ enum ppc_sys_devices { MPC83xx_SEC2, MPC83xx_USB2_DR, MPC83xx_USB2_MPH, + MPC83xx_MDIO, }; #endif /* CONFIG_83xx */ diff --git a/include/asm-ppc/mpc85xx.h b/include/asm-ppc/mpc85xx.h index 516984ee14b5..9d14baea3d71 100644 --- a/include/asm-ppc/mpc85xx.h +++ b/include/asm-ppc/mpc85xx.h @@ -3,7 +3,7 @@ * * MPC85xx definitions * - * Maintainer: Kumar Gala <kumar.gala@freescale.com> + * Maintainer: Kumar Gala <galak@kernel.crashing.org> * * Copyright 2004 Freescale Semiconductor, Inc * @@ -67,6 +67,8 @@ extern unsigned char __res[]; #define MPC85xx_DMA3_SIZE (0x00080) #define MPC85xx_ENET1_OFFSET (0x24000) #define MPC85xx_ENET1_SIZE (0x01000) +#define MPC85xx_MIIM_OFFSET (0x24520) +#define MPC85xx_MIIM_SIZE (0x00018) #define MPC85xx_ENET2_OFFSET (0x25000) #define MPC85xx_ENET2_SIZE (0x01000) #define MPC85xx_ENET3_OFFSET (0x26000) @@ -132,6 +134,7 @@ enum ppc_sys_devices { MPC85xx_eTSEC3, MPC85xx_eTSEC4, MPC85xx_IIC2, + MPC85xx_MDIO, }; /* Internal interrupts are all Level Sensitive, and Positive Polarity */ diff --git a/include/asm-ppc/mpc8xx.h b/include/asm-ppc/mpc8xx.h index 208a2e11daee..46f159cf589e 100644 --- a/include/asm-ppc/mpc8xx.h +++ b/include/asm-ppc/mpc8xx.h @@ -113,6 +113,10 @@ enum ppc_sys_devices { MPC8xx_CPM_USB, }; +#ifndef BOARD_CHIP_NAME +#define BOARD_CHIP_NAME "" +#endif + #endif /* !__ASSEMBLY__ */ #endif /* CONFIG_8xx */ #endif /* __CONFIG_8xx_DEFS */ diff --git a/include/asm-ppc/mv64x60.h b/include/asm-ppc/mv64x60.h index 75c2ffa26b26..4f2405b83612 100644 --- a/include/asm-ppc/mv64x60.h +++ b/include/asm-ppc/mv64x60.h @@ -27,6 +27,8 @@ #include <asm/pci-bridge.h> #include <asm/mv64x60_defs.h> +struct platform_device; + extern u8 mv64x60_pci_exclude_bridge; extern spinlock_t mv64x60_lock; @@ -233,7 +235,7 @@ struct mv64x60_chip_info { struct mv64x60_handle { u32 type; /* type of bridge */ u32 rev; /* revision of bridge */ - void *v_base; /* virtual base addr of bridge regs */ + void __iomem *v_base;/* virtual base addr of bridge regs */ phys_addr_t p_base; /* physical base addr of bridge regs */ u32 pci_mode_a; /* pci 0 mode: conventional pci, pci-x*/ @@ -303,7 +305,7 @@ void mv64x60_alloc_hose(struct mv64x60_handle *bh, u32 cfg_addr, u32 cfg_data, struct pci_controller **hose); int mv64x60_get_type(struct mv64x60_handle *bh); int mv64x60_setup_for_chip(struct mv64x60_handle *bh); -void *mv64x60_get_bridge_vbase(void); +void __iomem *mv64x60_get_bridge_vbase(void); u32 mv64x60_get_bridge_type(void); u32 mv64x60_get_bridge_rev(void); void mv64x60_get_mem_windows(struct mv64x60_handle *bh, diff --git a/include/asm-ppc/nvram.h b/include/asm-ppc/nvram.h deleted file mode 100644 index 31ef16e3fc4f..000000000000 --- a/include/asm-ppc/nvram.h +++ /dev/null @@ -1,73 +0,0 @@ -/* - * PreP compliant NVRAM access - */ - -#ifdef __KERNEL__ -#ifndef _PPC_NVRAM_H -#define _PPC_NVRAM_H - -#define NVRAM_AS0 0x74 -#define NVRAM_AS1 0x75 -#define NVRAM_DATA 0x77 - - -/* RTC Offsets */ - -#define MOTO_RTC_SECONDS 0x1FF9 -#define MOTO_RTC_MINUTES 0x1FFA -#define MOTO_RTC_HOURS 0x1FFB -#define MOTO_RTC_DAY_OF_WEEK 0x1FFC -#define MOTO_RTC_DAY_OF_MONTH 0x1FFD -#define MOTO_RTC_MONTH 0x1FFE -#define MOTO_RTC_YEAR 0x1FFF -#define MOTO_RTC_CONTROLA 0x1FF8 -#define MOTO_RTC_CONTROLB 0x1FF9 - -/* PowerMac specific nvram stuffs */ - -enum { - pmac_nvram_OF, /* Open Firmware partition */ - pmac_nvram_XPRAM, /* MacOS XPRAM partition */ - pmac_nvram_NR /* MacOS Name Registry partition */ -}; - -/* Return partition offset in nvram */ -extern int pmac_get_partition(int partition); - -/* Direct access to XPRAM on PowerMacs */ -extern u8 pmac_xpram_read(int xpaddr); -extern void pmac_xpram_write(int xpaddr, u8 data); - -/* Synchronize NVRAM */ -extern void nvram_sync(void); - -/* Normal access to NVRAM */ -extern unsigned char nvram_read_byte(int i); -extern void nvram_write_byte(unsigned char c, int i); - -/* Some offsets in XPRAM */ -#define PMAC_XPRAM_MACHINE_LOC 0xe4 -#define PMAC_XPRAM_SOUND_VOLUME 0x08 - -/* Machine location structure in PowerMac XPRAM */ -struct pmac_machine_location { - unsigned int latitude; /* 2+30 bit Fractional number */ - unsigned int longitude; /* 2+30 bit Fractional number */ - unsigned int delta; /* mix of GMT delta and DLS */ -}; - -/* - * /dev/nvram ioctls - * - * Note that PMAC_NVRAM_GET_OFFSET is still supported, but is - * definitely obsolete. Do not use it if you can avoid it - */ - -#define OBSOLETE_PMAC_NVRAM_GET_OFFSET \ - _IOWR('p', 0x40, int) - -#define IOC_NVRAM_GET_OFFSET _IOWR('p', 0x42, int) /* Get NVRAM partition offset */ -#define IOC_NVRAM_SYNC _IO('p', 0x43) /* Sync NVRAM image */ - -#endif -#endif /* __KERNEL__ */ diff --git a/include/asm-ppc/open_pic.h b/include/asm-ppc/open_pic.h index 7848aa610c05..ec2f46629ca2 100644 --- a/include/asm-ppc/open_pic.h +++ b/include/asm-ppc/open_pic.h @@ -58,8 +58,7 @@ extern int openpic_get_irq(struct pt_regs *regs); extern void openpic_reset_processor_phys(u_int cpumask); extern void openpic_setup_ISU(int isu_num, unsigned long addr); extern void openpic_cause_IPI(u_int ipi, cpumask_t cpumask); -extern void smp_openpic_message_pass(int target, int msg, unsigned long data, - int wait); +extern void smp_openpic_message_pass(int target, int msg); extern void openpic_set_k2_cascade(int irq); extern void openpic_set_priority(u_int pri); extern u_int openpic_get_priority(void); diff --git a/include/asm-ppc/page.h b/include/asm-ppc/page.h index 4789dc024240..538e0c8ab243 100644 --- a/include/asm-ppc/page.h +++ b/include/asm-ppc/page.h @@ -1,9 +1,12 @@ #ifndef _PPC_PAGE_H #define _PPC_PAGE_H +#include <linux/config.h> +#include <asm/asm-compat.h> + /* PAGE_SHIFT determines the page size */ #define PAGE_SHIFT 12 -#define PAGE_SIZE (1UL << PAGE_SHIFT) +#define PAGE_SIZE (ASM_CONST(1) << PAGE_SHIFT) /* * Subtle: this is an int (not an unsigned long) and so it @@ -34,6 +37,17 @@ typedef unsigned long pte_basic_t; #define PTE_FMT "%.8lx" #endif +/* align addr on a size boundary - adjust address up/down if needed */ +#define _ALIGN_UP(addr,size) (((addr)+((size)-1))&(~((size)-1))) +#define _ALIGN_DOWN(addr,size) ((addr)&(~((size)-1))) + +/* align addr on a size boundary - adjust address up if needed */ +#define _ALIGN(addr,size) _ALIGN_UP(addr,size) + +/* to align the pointer to the (next) page boundary */ +#define PAGE_ALIGN(addr) _ALIGN(addr, PAGE_SIZE) + + #undef STRICT_MM_TYPECHECKS #ifdef STRICT_MM_TYPECHECKS @@ -76,13 +90,6 @@ typedef unsigned long pgprot_t; #endif - -/* align addr on a size boundary - adjust address up if needed -- Cort */ -#define _ALIGN(addr,size) (((addr)+(size)-1)&(~((size)-1))) - -/* to align the pointer to the (next) page boundary */ -#define PAGE_ALIGN(addr) (((addr)+PAGE_SIZE-1)&PAGE_MASK) - struct page; extern void clear_pages(void *page, int order); static inline void clear_page(void *page) { clear_pages(page, 0); } @@ -165,5 +172,8 @@ extern __inline__ int get_order(unsigned long size) #define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | VM_EXEC | \ VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC) +/* We do define AT_SYSINFO_EHDR but don't use the gate mecanism */ +#define __HAVE_ARCH_GATE_AREA 1 + #endif /* __KERNEL__ */ #endif /* _PPC_PAGE_H */ diff --git a/include/asm-ppc/parport.h b/include/asm-ppc/parport.h deleted file mode 100644 index 11f96d3de5b6..000000000000 --- a/include/asm-ppc/parport.h +++ /dev/null @@ -1,18 +0,0 @@ -/* - * parport.h: platform-specific PC-style parport initialisation - * - * Copyright (C) 1999, 2000 Tim Waugh <tim@cyberelk.demon.co.uk> - * - * This file should only be included by drivers/parport/parport_pc.c. - */ - -#ifndef _ASM_PPC_PARPORT_H -#define _ASM_PPC_PARPORT_H - -static int __devinit parport_pc_find_isa_ports (int autoirq, int autodma); -static int __devinit parport_pc_find_nonpci_ports (int autoirq, int autodma) -{ - return parport_pc_find_isa_ports (autoirq, autodma); -} - -#endif /* !(_ASM_PPC_PARPORT_H) */ diff --git a/include/asm-ppc/pci-bridge.h b/include/asm-ppc/pci-bridge.h index ffa423456c2b..e58c78f90a5a 100644 --- a/include/asm-ppc/pci-bridge.h +++ b/include/asm-ppc/pci-bridge.h @@ -79,6 +79,11 @@ struct pci_controller { struct resource mem_space; }; +static inline struct pci_controller *pci_bus_to_host(struct pci_bus *bus) +{ + return bus->sysdata; +} + /* These are used for config access before all the PCI probing has been done. */ int early_read_config_byte(struct pci_controller *hose, int bus, int dev_fn, diff --git a/include/asm-ppc/pci.h b/include/asm-ppc/pci.h index 9dd06cd40096..61434edbad7b 100644 --- a/include/asm-ppc/pci.h +++ b/include/asm-ppc/pci.h @@ -24,9 +24,9 @@ struct pci_dev; * Set this to 1 if you want the kernel to re-assign all PCI * bus numbers */ -extern int pci_assign_all_busses; +extern int pci_assign_all_buses; -#define pcibios_assign_all_busses() (pci_assign_all_busses) +#define pcibios_assign_all_busses() (pci_assign_all_buses) #define pcibios_scan_all_fns(a, b) 0 #define PCIBIOS_MIN_IO 0x1000 @@ -126,7 +126,7 @@ extern void pcibios_add_platform_entries(struct pci_dev *dev); struct file; extern pgprot_t pci_phys_mem_access_prot(struct file *file, - unsigned long offset, + unsigned long pfn, unsigned long size, pgprot_t prot); diff --git a/include/asm-ppc/perfmon.h b/include/asm-ppc/perfmon.h deleted file mode 100644 index 5e7a89c47b5b..000000000000 --- a/include/asm-ppc/perfmon.h +++ /dev/null @@ -1,22 +0,0 @@ -#ifndef __PERFMON_H -#define __PERFMON_H - -extern void (*perf_irq)(struct pt_regs *); - -int request_perfmon_irq(void (*handler)(struct pt_regs *)); -void free_perfmon_irq(void); - -#ifdef CONFIG_FSL_BOOKE -void init_pmc_stop(int ctr); -void set_pmc_event(int ctr, int event); -void set_pmc_user_kernel(int ctr, int user, int kernel); -void set_pmc_marked(int ctr, int mark0, int mark1); -void pmc_start_ctr(int ctr, int enable); -void pmc_start_ctrs(int enable); -void pmc_stop_ctrs(void); -void dump_pmcs(void); - -extern struct op_ppc32_model op_model_fsl_booke; -#endif - -#endif /* __PERFMON_H */ diff --git a/include/asm-ppc/pgalloc.h b/include/asm-ppc/pgalloc.h index 931b6de7ef53..bdefd1c4a558 100644 --- a/include/asm-ppc/pgalloc.h +++ b/include/asm-ppc/pgalloc.h @@ -28,7 +28,7 @@ extern void pgd_free(pgd_t *pgd); #define pmd_populate_kernel(mm, pmd, pte) \ (pmd_val(*(pmd)) = (unsigned long)pte | _PMD_PRESENT) #define pmd_populate(mm, pmd, pte) \ - (pmd_val(*(pmd)) = (unsigned long)page_to_virt(pte) | _PMD_PRESENT) + (pmd_val(*(pmd)) = (unsigned long)lowmem_page_address(pte) | _PMD_PRESENT) #endif extern pte_t *pte_alloc_one_kernel(struct mm_struct *mm, unsigned long addr); diff --git a/include/asm-ppc/pgtable.h b/include/asm-ppc/pgtable.h index eee601bb9ada..6d1c39e8a6af 100644 --- a/include/asm-ppc/pgtable.h +++ b/include/asm-ppc/pgtable.h @@ -12,6 +12,7 @@ #include <asm/processor.h> /* For TASK_SIZE */ #include <asm/mmu.h> #include <asm/page.h> +struct mm_struct; extern unsigned long va_to_phys(unsigned long address); extern pte_t *va_to_pte(unsigned long address); @@ -705,7 +706,7 @@ static inline void __ptep_set_access_flags(pte_t *ptep, pte_t entry, int dirty) #define pgprot_noncached(prot) (__pgprot(pgprot_val(prot) | _PAGE_NO_CACHE | _PAGE_GUARDED)) struct file; -extern pgprot_t phys_mem_access_prot(struct file *file, unsigned long addr, +extern pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn, unsigned long size, pgprot_t vma_prot); #define __HAVE_PHYS_MEM_ACCESS_PROT diff --git a/include/asm-ppc/posix_types.h b/include/asm-ppc/posix_types.h deleted file mode 100644 index a14a82abe8d2..000000000000 --- a/include/asm-ppc/posix_types.h +++ /dev/null @@ -1,111 +0,0 @@ -#ifndef _PPC_POSIX_TYPES_H -#define _PPC_POSIX_TYPES_H - -/* - * This file is generally used by user-level software, so you need to - * be a little careful about namespace pollution etc. Also, we cannot - * assume GCC is being used. - */ - -typedef unsigned long __kernel_ino_t; -typedef unsigned int __kernel_mode_t; -typedef unsigned short __kernel_nlink_t; -typedef long __kernel_off_t; -typedef int __kernel_pid_t; -typedef unsigned int __kernel_uid_t; -typedef unsigned int __kernel_gid_t; -typedef unsigned int __kernel_size_t; -typedef int __kernel_ssize_t; -typedef long __kernel_ptrdiff_t; -typedef long __kernel_time_t; -typedef long __kernel_suseconds_t; -typedef long __kernel_clock_t; -typedef int __kernel_timer_t; -typedef int __kernel_clockid_t; -typedef int __kernel_daddr_t; -typedef char * __kernel_caddr_t; -typedef short __kernel_ipc_pid_t; -typedef unsigned short __kernel_uid16_t; -typedef unsigned short __kernel_gid16_t; -typedef unsigned int __kernel_uid32_t; -typedef unsigned int __kernel_gid32_t; - -typedef unsigned int __kernel_old_uid_t; -typedef unsigned int __kernel_old_gid_t; -typedef unsigned int __kernel_old_dev_t; - -#ifdef __GNUC__ -typedef long long __kernel_loff_t; -#endif - -typedef struct { - int val[2]; -} __kernel_fsid_t; - -#ifndef __GNUC__ - -#define __FD_SET(d, set) ((set)->fds_bits[__FDELT(d)] |= __FDMASK(d)) -#define __FD_CLR(d, set) ((set)->fds_bits[__FDELT(d)] &= ~__FDMASK(d)) -#define __FD_ISSET(d, set) ((set)->fds_bits[__FDELT(d)] & __FDMASK(d)) -#define __FD_ZERO(set) \ - ((void) memset ((__ptr_t) (set), 0, sizeof (__kernel_fd_set))) - -#else /* __GNUC__ */ - -#if defined(__KERNEL__) || !defined(__GLIBC__) || (__GLIBC__ < 2) \ - || (__GLIBC__ == 2 && __GLIBC_MINOR__ == 0) -/* With GNU C, use inline functions instead so args are evaluated only once: */ - -#undef __FD_SET -static __inline__ void __FD_SET(unsigned long fd, __kernel_fd_set *fdsetp) -{ - unsigned long _tmp = fd / __NFDBITS; - unsigned long _rem = fd % __NFDBITS; - fdsetp->fds_bits[_tmp] |= (1UL<<_rem); -} - -#undef __FD_CLR -static __inline__ void __FD_CLR(unsigned long fd, __kernel_fd_set *fdsetp) -{ - unsigned long _tmp = fd / __NFDBITS; - unsigned long _rem = fd % __NFDBITS; - fdsetp->fds_bits[_tmp] &= ~(1UL<<_rem); -} - -#undef __FD_ISSET -static __inline__ int __FD_ISSET(unsigned long fd, __kernel_fd_set *p) -{ - unsigned long _tmp = fd / __NFDBITS; - unsigned long _rem = fd % __NFDBITS; - return (p->fds_bits[_tmp] & (1UL<<_rem)) != 0; -} - -/* - * This will unroll the loop for the normal constant case (8 ints, - * for a 256-bit fd_set) - */ -#undef __FD_ZERO -static __inline__ void __FD_ZERO(__kernel_fd_set *p) -{ - unsigned int *tmp = (unsigned int *)p->fds_bits; - int i; - - if (__builtin_constant_p(__FDSET_LONGS)) { - switch (__FDSET_LONGS) { - case 8: - tmp[0] = 0; tmp[1] = 0; tmp[2] = 0; tmp[3] = 0; - tmp[4] = 0; tmp[5] = 0; tmp[6] = 0; tmp[7] = 0; - return; - } - } - i = __FDSET_LONGS; - while (i) { - i--; - *tmp = 0; - tmp++; - } -} - -#endif /* defined(__KERNEL__) || !defined(__GLIBC__) || (__GLIBC__ < 2) */ -#endif /* __GNUC__ */ -#endif /* _PPC_POSIX_TYPES_H */ diff --git a/include/asm-ppc/ppc_sys.h b/include/asm-ppc/ppc_sys.h index 549f44843c5e..83d8c77c124d 100644 --- a/include/asm-ppc/ppc_sys.h +++ b/include/asm-ppc/ppc_sys.h @@ -3,7 +3,7 @@ * * PPC system definitions and library functions * - * Maintainer: Kumar Gala <kumar.gala@freescale.com> + * Maintainer: Kumar Gala <galak@kernel.crashing.org> * * Copyright 2005 Freescale Semiconductor, Inc * @@ -18,7 +18,7 @@ #define __ASM_PPC_SYS_H #include <linux/init.h> -#include <linux/device.h> +#include <linux/platform_device.h> #include <linux/types.h> #if defined(CONFIG_8260) diff --git a/include/asm-ppc/ppcboot.h b/include/asm-ppc/ppcboot.h index fe24e4520208..6b7b63f71daa 100644 --- a/include/asm-ppc/ppcboot.h +++ b/include/asm-ppc/ppcboot.h @@ -73,8 +73,8 @@ typedef struct bd_info { #if defined(CONFIG_HYMOD) hymod_conf_t bi_hymod_conf; /* hymod configuration information */ #endif -#if defined(CONFIG_EVB64260) || defined(CONFIG_44x) || defined(CONFIG_85xx) ||\ - defined(CONFIG_83xx) +#if defined(CONFIG_EVB64260) || defined(CONFIG_405EP) || defined(CONFIG_44x) || \ + defined(CONFIG_85xx) || defined(CONFIG_83xx) /* second onboard ethernet port */ unsigned char bi_enet1addr[6]; #endif @@ -96,5 +96,7 @@ typedef struct bd_info { #endif } bd_t; +#define bi_tbfreq bi_intfreq + #endif /* __ASSEMBLY__ */ #endif /* __ASM_PPCBOOT_H__ */ diff --git a/include/asm-ppc/processor.h b/include/asm-ppc/processor.h deleted file mode 100644 index b05b5d9cae20..000000000000 --- a/include/asm-ppc/processor.h +++ /dev/null @@ -1,201 +0,0 @@ -#ifdef __KERNEL__ -#ifndef __ASM_PPC_PROCESSOR_H -#define __ASM_PPC_PROCESSOR_H - -/* - * Default implementation of macro that returns current - * instruction pointer ("program counter"). - */ -#define current_text_addr() ({ __label__ _l; _l: &&_l;}) - -#include <linux/config.h> -#include <linux/stringify.h> - -#include <asm/ptrace.h> -#include <asm/types.h> -#include <asm/mpc8xx.h> -#include <asm/reg.h> - -/* We only need to define a new _MACH_xxx for machines which are part of - * a configuration which supports more than one type of different machine. - * This is currently limited to CONFIG_PPC_MULTIPLATFORM and CHRP/PReP/PMac. - * -- Tom - */ -#define _MACH_prep 0x00000001 -#define _MACH_Pmac 0x00000002 /* pmac or pmac clone (non-chrp) */ -#define _MACH_chrp 0x00000004 /* chrp machine */ - -/* see residual.h for these */ -#define _PREP_Motorola 0x01 /* motorola prep */ -#define _PREP_Firm 0x02 /* firmworks prep */ -#define _PREP_IBM 0x00 /* ibm prep */ -#define _PREP_Bull 0x03 /* bull prep */ - -/* these are arbitrary */ -#define _CHRP_Motorola 0x04 /* motorola chrp, the cobra */ -#define _CHRP_IBM 0x05 /* IBM chrp, the longtrail and longtrail 2 */ -#define _CHRP_Pegasos 0x06 /* Genesi/bplan's Pegasos and Pegasos2 */ - -#define _GLOBAL(n)\ - .stabs __stringify(n:F-1),N_FUN,0,0,n;\ - .globl n;\ -n: - -/* - * this is the minimum allowable io space due to the location - * of the io areas on prep (first one at 0x80000000) but - * as soon as I get around to remapping the io areas with the BATs - * to match the mac we can raise this. -- Cort - */ -#define TASK_SIZE (CONFIG_TASK_SIZE) - -#ifndef __ASSEMBLY__ -#ifdef CONFIG_PPC_MULTIPLATFORM -extern int _machine; - -/* what kind of prep workstation we are */ -extern int _prep_type; -extern int _chrp_type; - -/* - * This is used to identify the board type from a given PReP board - * vendor. Board revision is also made available. - */ -extern unsigned char ucSystemType; -extern unsigned char ucBoardRev; -extern unsigned char ucBoardRevMaj, ucBoardRevMin; -#else -#define _machine 0 -#endif /* CONFIG_PPC_MULTIPLATFORM */ - -struct task_struct; -void start_thread(struct pt_regs *regs, unsigned long nip, unsigned long sp); -void release_thread(struct task_struct *); - -/* Prepare to copy thread state - unlazy all lazy status */ -extern void prepare_to_copy(struct task_struct *tsk); - -/* - * Create a new kernel thread. - */ -extern long kernel_thread(int (*fn)(void *), void *arg, unsigned long flags); - -/* Lazy FPU handling on uni-processor */ -extern struct task_struct *last_task_used_math; -extern struct task_struct *last_task_used_altivec; -extern struct task_struct *last_task_used_spe; - -/* This decides where the kernel will search for a free chunk of vm - * space during mmap's. - */ -#define TASK_UNMAPPED_BASE (TASK_SIZE / 8 * 3) - -typedef struct { - unsigned long seg; -} mm_segment_t; - -struct thread_struct { - unsigned long ksp; /* Kernel stack pointer */ - struct pt_regs *regs; /* Pointer to saved register state */ - mm_segment_t fs; /* for get_fs() validation */ - void *pgdir; /* root of page-table tree */ - int fpexc_mode; /* floating-point exception mode */ - signed long last_syscall; -#if defined(CONFIG_4xx) || defined (CONFIG_BOOKE) - unsigned long dbcr0; /* debug control register values */ - unsigned long dbcr1; -#endif - double fpr[32]; /* Complete floating point set */ - unsigned long fpscr_pad; /* fpr ... fpscr must be contiguous */ - unsigned long fpscr; /* Floating point status */ -#ifdef CONFIG_ALTIVEC - /* Complete AltiVec register set */ - vector128 vr[32] __attribute((aligned(16))); - /* AltiVec status */ - vector128 vscr __attribute((aligned(16))); - unsigned long vrsave; - int used_vr; /* set if process has used altivec */ -#endif /* CONFIG_ALTIVEC */ -#ifdef CONFIG_SPE - unsigned long evr[32]; /* upper 32-bits of SPE regs */ - u64 acc; /* Accumulator */ - unsigned long spefscr; /* SPE & eFP status */ - int used_spe; /* set if process has used spe */ -#endif /* CONFIG_SPE */ -}; - -#define ARCH_MIN_TASKALIGN 16 - -#define INIT_SP (sizeof(init_stack) + (unsigned long) &init_stack) - -#define INIT_THREAD { \ - .ksp = INIT_SP, \ - .fs = KERNEL_DS, \ - .pgdir = swapper_pg_dir, \ - .fpexc_mode = MSR_FE0 | MSR_FE1, \ -} - -/* - * Return saved PC of a blocked thread. For now, this is the "user" PC - */ -#define thread_saved_pc(tsk) \ - ((tsk)->thread.regs? (tsk)->thread.regs->nip: 0) - -unsigned long get_wchan(struct task_struct *p); - -#define KSTK_EIP(tsk) ((tsk)->thread.regs? (tsk)->thread.regs->nip: 0) -#define KSTK_ESP(tsk) ((tsk)->thread.regs? (tsk)->thread.regs->gpr[1]: 0) - -/* Get/set floating-point exception mode */ -#define GET_FPEXC_CTL(tsk, adr) get_fpexc_mode((tsk), (adr)) -#define SET_FPEXC_CTL(tsk, val) set_fpexc_mode((tsk), (val)) - -extern int get_fpexc_mode(struct task_struct *tsk, unsigned long adr); -extern int set_fpexc_mode(struct task_struct *tsk, unsigned int val); - -static inline unsigned int __unpack_fe01(unsigned int msr_bits) -{ - return ((msr_bits & MSR_FE0) >> 10) | ((msr_bits & MSR_FE1) >> 8); -} - -static inline unsigned int __pack_fe01(unsigned int fpmode) -{ - return ((fpmode << 10) & MSR_FE0) | ((fpmode << 8) & MSR_FE1); -} - -/* in process.c - for early bootup debug -- Cort */ -int ll_printk(const char *, ...); -void ll_puts(const char *); - -/* In misc.c */ -void _nmask_and_or_msr(unsigned long nmask, unsigned long or_val); - -#define have_of (_machine == _MACH_chrp || _machine == _MACH_Pmac) - -#define cpu_relax() barrier() - -/* - * Prefetch macros. - */ -#define ARCH_HAS_PREFETCH -#define ARCH_HAS_PREFETCHW -#define ARCH_HAS_SPINLOCK_PREFETCH - -extern inline void prefetch(const void *x) -{ - __asm__ __volatile__ ("dcbt 0,%0" : : "r" (x)); -} - -extern inline void prefetchw(const void *x) -{ - __asm__ __volatile__ ("dcbtst 0,%0" : : "r" (x)); -} - -#define spin_lock_prefetch(x) prefetchw(x) - -extern int emulate_altivec(struct pt_regs *regs); - -#endif /* !__ASSEMBLY__ */ - -#endif /* __ASM_PPC_PROCESSOR_H */ -#endif /* __KERNEL__ */ diff --git a/include/asm-ppc/prom.h b/include/asm-ppc/prom.h index 75c0637acdc8..3e39827ed566 100644 --- a/include/asm-ppc/prom.h +++ b/include/asm-ppc/prom.h @@ -93,7 +93,7 @@ extern int device_is_compatible(struct device_node *device, const char *); extern int machine_is_compatible(const char *compat); extern unsigned char *get_property(struct device_node *node, const char *name, int *lenp); -extern void prom_add_property(struct device_node* np, struct property* prop); +extern int prom_add_property(struct device_node* np, struct property* prop); extern void prom_get_irq_senses(unsigned char *, int, int); extern int prom_n_addr_cells(struct device_node* np); extern int prom_n_size_cells(struct device_node* np); diff --git a/include/asm-ppc/ptrace.h b/include/asm-ppc/ptrace.h deleted file mode 100644 index 7043c164b537..000000000000 --- a/include/asm-ppc/ptrace.h +++ /dev/null @@ -1,152 +0,0 @@ -#ifndef _PPC_PTRACE_H -#define _PPC_PTRACE_H - -/* - * This struct defines the way the registers are stored on the - * kernel stack during a system call or other kernel entry. - * - * this should only contain volatile regs - * since we can keep non-volatile in the thread_struct - * should set this up when only volatiles are saved - * by intr code. - * - * Since this is going on the stack, *CARE MUST BE TAKEN* to insure - * that the overall structure is a multiple of 16 bytes in length. - * - * Note that the offsets of the fields in this struct correspond with - * the PT_* values below. This simplifies arch/ppc/kernel/ptrace.c. - */ - -#ifndef __ASSEMBLY__ -struct pt_regs { - unsigned long gpr[32]; - unsigned long nip; - unsigned long msr; - unsigned long orig_gpr3; /* Used for restarting system calls */ - unsigned long ctr; - unsigned long link; - unsigned long xer; - unsigned long ccr; - unsigned long mq; /* 601 only (not used at present) */ - /* Used on APUS to hold IPL value. */ - unsigned long trap; /* Reason for being here */ - /* N.B. for critical exceptions on 4xx, the dar and dsisr - fields are overloaded to hold srr0 and srr1. */ - unsigned long dar; /* Fault registers */ - unsigned long dsisr; /* on 4xx/Book-E used for ESR */ - unsigned long result; /* Result of a system call */ -}; - -#endif /* __ASSEMBLY__ */ - -#ifdef __KERNEL__ -#define STACK_FRAME_OVERHEAD 16 /* size of minimum stack frame */ - -/* Size of stack frame allocated when calling signal handler. */ -#define __SIGNAL_FRAMESIZE 64 - -#ifndef __ASSEMBLY__ -#define instruction_pointer(regs) ((regs)->nip) -#ifdef CONFIG_SMP -extern unsigned long profile_pc(struct pt_regs *regs); -#else -#define profile_pc(regs) instruction_pointer(regs) -#endif - -#define user_mode(regs) (((regs)->msr & MSR_PR) != 0) - -#define force_successful_syscall_return() \ - do { \ - current_thread_info()->local_flags |= _TIFL_FORCE_NOERROR; \ - } while(0) - -/* - * We use the least-significant bit of the trap field to indicate - * whether we have saved the full set of registers, or only a - * partial set. A 1 there means the partial set. - * On 4xx we use the next bit to indicate whether the exception - * is a critical exception (1 means it is). - */ -#define FULL_REGS(regs) (((regs)->trap & 1) == 0) -#define IS_CRITICAL_EXC(regs) (((regs)->trap & 2) == 0) -#define TRAP(regs) ((regs)->trap & ~0xF) - -#define CHECK_FULL_REGS(regs) \ -do { \ - if ((regs)->trap & 1) \ - printk(KERN_CRIT "%s: partial register set\n", __FUNCTION__); \ -} while (0) -#endif /* __ASSEMBLY__ */ - -#endif /* __KERNEL__ */ - -/* - * Offsets used by 'ptrace' system call interface. - * These can't be changed without breaking binary compatibility - * with MkLinux, etc. - */ -#define PT_R0 0 -#define PT_R1 1 -#define PT_R2 2 -#define PT_R3 3 -#define PT_R4 4 -#define PT_R5 5 -#define PT_R6 6 -#define PT_R7 7 -#define PT_R8 8 -#define PT_R9 9 -#define PT_R10 10 -#define PT_R11 11 -#define PT_R12 12 -#define PT_R13 13 -#define PT_R14 14 -#define PT_R15 15 -#define PT_R16 16 -#define PT_R17 17 -#define PT_R18 18 -#define PT_R19 19 -#define PT_R20 20 -#define PT_R21 21 -#define PT_R22 22 -#define PT_R23 23 -#define PT_R24 24 -#define PT_R25 25 -#define PT_R26 26 -#define PT_R27 27 -#define PT_R28 28 -#define PT_R29 29 -#define PT_R30 30 -#define PT_R31 31 - -#define PT_NIP 32 -#define PT_MSR 33 -#ifdef __KERNEL__ -#define PT_ORIG_R3 34 -#endif -#define PT_CTR 35 -#define PT_LNK 36 -#define PT_XER 37 -#define PT_CCR 38 -#define PT_MQ 39 - -#define PT_FPR0 48 /* each FP reg occupies 2 slots in this space */ -#define PT_FPR31 (PT_FPR0 + 2*31) -#define PT_FPSCR (PT_FPR0 + 2*32 + 1) - -/* Get/set all the altivec registers vr0..vr31, vscr, vrsave, in one go */ -#define PTRACE_GETVRREGS 18 -#define PTRACE_SETVRREGS 19 - -/* Get/set all the upper 32-bits of the SPE registers, accumulator, and - * spefscr, in one go */ -#define PTRACE_GETEVRREGS 20 -#define PTRACE_SETEVRREGS 21 - -/* - * Get or set a debug register. The first 16 are DABR registers and the - * second 16 are IABR registers. - */ -#define PTRACE_GET_DEBUGREG 25 -#define PTRACE_SET_DEBUGREG 26 - -#endif diff --git a/include/asm-ppc/rio.h b/include/asm-ppc/rio.h new file mode 100644 index 000000000000..0018bf80cb25 --- /dev/null +++ b/include/asm-ppc/rio.h @@ -0,0 +1,18 @@ +/* + * RapidIO architecture support + * + * Copyright 2005 MontaVista Software, Inc. + * Matt Porter <mporter@kernel.crashing.org> + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ + +#ifndef ASM_PPC_RIO_H +#define ASM_PPC_RIO_H + +extern void platform_rio_init(void); + +#endif /* ASM_PPC_RIO_H */ diff --git a/include/asm-ppc/rwsem.h b/include/asm-ppc/rwsem.h deleted file mode 100644 index 3e738f483c11..000000000000 --- a/include/asm-ppc/rwsem.h +++ /dev/null @@ -1,172 +0,0 @@ -/* - * include/asm-ppc/rwsem.h: R/W semaphores for PPC using the stuff - * in lib/rwsem.c. Adapted largely from include/asm-i386/rwsem.h - * by Paul Mackerras <paulus@samba.org>. - */ - -#ifndef _PPC_RWSEM_H -#define _PPC_RWSEM_H - -#ifdef __KERNEL__ -#include <linux/list.h> -#include <linux/spinlock.h> -#include <asm/atomic.h> -#include <asm/system.h> - -/* - * the semaphore definition - */ -struct rw_semaphore { - /* XXX this should be able to be an atomic_t -- paulus */ - signed long count; -#define RWSEM_UNLOCKED_VALUE 0x00000000 -#define RWSEM_ACTIVE_BIAS 0x00000001 -#define RWSEM_ACTIVE_MASK 0x0000ffff -#define RWSEM_WAITING_BIAS (-0x00010000) -#define RWSEM_ACTIVE_READ_BIAS RWSEM_ACTIVE_BIAS -#define RWSEM_ACTIVE_WRITE_BIAS (RWSEM_WAITING_BIAS + RWSEM_ACTIVE_BIAS) - spinlock_t wait_lock; - struct list_head wait_list; -#if RWSEM_DEBUG - int debug; -#endif -}; - -/* - * initialisation - */ -#if RWSEM_DEBUG -#define __RWSEM_DEBUG_INIT , 0 -#else -#define __RWSEM_DEBUG_INIT /* */ -#endif - -#define __RWSEM_INITIALIZER(name) \ - { RWSEM_UNLOCKED_VALUE, SPIN_LOCK_UNLOCKED, \ - LIST_HEAD_INIT((name).wait_list) \ - __RWSEM_DEBUG_INIT } - -#define DECLARE_RWSEM(name) \ - struct rw_semaphore name = __RWSEM_INITIALIZER(name) - -extern struct rw_semaphore *rwsem_down_read_failed(struct rw_semaphore *sem); -extern struct rw_semaphore *rwsem_down_write_failed(struct rw_semaphore *sem); -extern struct rw_semaphore *rwsem_wake(struct rw_semaphore *sem); -extern struct rw_semaphore *rwsem_downgrade_wake(struct rw_semaphore *sem); - -static inline void init_rwsem(struct rw_semaphore *sem) -{ - sem->count = RWSEM_UNLOCKED_VALUE; - spin_lock_init(&sem->wait_lock); - INIT_LIST_HEAD(&sem->wait_list); -#if RWSEM_DEBUG - sem->debug = 0; -#endif -} - -/* - * lock for reading - */ -static inline void __down_read(struct rw_semaphore *sem) -{ - if (atomic_inc_return((atomic_t *)(&sem->count)) > 0) - smp_wmb(); - else - rwsem_down_read_failed(sem); -} - -static inline int __down_read_trylock(struct rw_semaphore *sem) -{ - int tmp; - - while ((tmp = sem->count) >= 0) { - if (tmp == cmpxchg(&sem->count, tmp, - tmp + RWSEM_ACTIVE_READ_BIAS)) { - smp_wmb(); - return 1; - } - } - return 0; -} - -/* - * lock for writing - */ -static inline void __down_write(struct rw_semaphore *sem) -{ - int tmp; - - tmp = atomic_add_return(RWSEM_ACTIVE_WRITE_BIAS, - (atomic_t *)(&sem->count)); - if (tmp == RWSEM_ACTIVE_WRITE_BIAS) - smp_wmb(); - else - rwsem_down_write_failed(sem); -} - -static inline int __down_write_trylock(struct rw_semaphore *sem) -{ - int tmp; - - tmp = cmpxchg(&sem->count, RWSEM_UNLOCKED_VALUE, - RWSEM_ACTIVE_WRITE_BIAS); - smp_wmb(); - return tmp == RWSEM_UNLOCKED_VALUE; -} - -/* - * unlock after reading - */ -static inline void __up_read(struct rw_semaphore *sem) -{ - int tmp; - - smp_wmb(); - tmp = atomic_dec_return((atomic_t *)(&sem->count)); - if (tmp < -1 && (tmp & RWSEM_ACTIVE_MASK) == 0) - rwsem_wake(sem); -} - -/* - * unlock after writing - */ -static inline void __up_write(struct rw_semaphore *sem) -{ - smp_wmb(); - if (atomic_sub_return(RWSEM_ACTIVE_WRITE_BIAS, - (atomic_t *)(&sem->count)) < 0) - rwsem_wake(sem); -} - -/* - * implement atomic add functionality - */ -static inline void rwsem_atomic_add(int delta, struct rw_semaphore *sem) -{ - atomic_add(delta, (atomic_t *)(&sem->count)); -} - -/* - * downgrade write lock to read lock - */ -static inline void __downgrade_write(struct rw_semaphore *sem) -{ - int tmp; - - smp_wmb(); - tmp = atomic_add_return(-RWSEM_WAITING_BIAS, (atomic_t *)(&sem->count)); - if (tmp < 0) - rwsem_downgrade_wake(sem); -} - -/* - * implement exchange and add functionality - */ -static inline int rwsem_atomic_update(int delta, struct rw_semaphore *sem) -{ - smp_mb(); - return atomic_add_return(delta, (atomic_t *)(&sem->count)); -} - -#endif /* __KERNEL__ */ -#endif /* _PPC_RWSEM_XADD_H */ diff --git a/include/asm-ppc/scatterlist.h b/include/asm-ppc/scatterlist.h deleted file mode 100644 index f21f18f56548..000000000000 --- a/include/asm-ppc/scatterlist.h +++ /dev/null @@ -1,25 +0,0 @@ -#ifdef __KERNEL__ -#ifndef _PPC_SCATTERLIST_H -#define _PPC_SCATTERLIST_H - -#include <asm/dma.h> - -struct scatterlist { - struct page *page; - unsigned int offset; - dma_addr_t dma_address; - unsigned int length; -}; - -/* - * These macros should be used after a pci_map_sg call has been done - * to get bus addresses of each of the SG entries and their lengths. - * You should only work with the number of sg entries pci_map_sg - * returns, or alternatively stop on the first sg_dma_len(sg) which - * is 0. - */ -#define sg_dma_address(sg) ((sg)->dma_address) -#define sg_dma_len(sg) ((sg)->length) - -#endif /* !(_PPC_SCATTERLIST_H) */ -#endif /* __KERNEL__ */ diff --git a/include/asm-ppc/seccomp.h b/include/asm-ppc/seccomp.h deleted file mode 100644 index 666c4da96d87..000000000000 --- a/include/asm-ppc/seccomp.h +++ /dev/null @@ -1,10 +0,0 @@ -#ifndef _ASM_SECCOMP_H - -#include <linux/unistd.h> - -#define __NR_seccomp_read __NR_read -#define __NR_seccomp_write __NR_write -#define __NR_seccomp_exit __NR_exit -#define __NR_seccomp_sigreturn __NR_rt_sigreturn - -#endif /* _ASM_SECCOMP_H */ diff --git a/include/asm-ppc/sections.h b/include/asm-ppc/sections.h deleted file mode 100644 index ba8f43ac9bf3..000000000000 --- a/include/asm-ppc/sections.h +++ /dev/null @@ -1,33 +0,0 @@ -#ifdef __KERNEL__ -#ifndef _PPC_SECTIONS_H -#define _PPC_SECTIONS_H - -#include <asm-generic/sections.h> - -#define __pmac __attribute__ ((__section__ (".pmac.text"))) -#define __pmacdata __attribute__ ((__section__ (".pmac.data"))) -#define __pmacfunc(__argpmac) \ - __argpmac __pmac; \ - __argpmac - -#define __prep __attribute__ ((__section__ (".prep.text"))) -#define __prepdata __attribute__ ((__section__ (".prep.data"))) -#define __prepfunc(__argprep) \ - __argprep __prep; \ - __argprep - -#define __chrp __attribute__ ((__section__ (".chrp.text"))) -#define __chrpdata __attribute__ ((__section__ (".chrp.data"))) -#define __chrpfunc(__argchrp) \ - __argchrp __chrp; \ - __argchrp - -/* this is actually just common chrp/pmac code, not OF code -- Cort */ -#define __openfirmware __attribute__ ((__section__ (".openfirmware.text"))) -#define __openfirmwaredata __attribute__ ((__section__ (".openfirmware.data"))) -#define __openfirmwarefunc(__argopenfirmware) \ - __argopenfirmware __openfirmware; \ - __argopenfirmware - -#endif /* _PPC_SECTIONS_H */ -#endif /* __KERNEL__ */ diff --git a/include/asm-ppc/semaphore.h b/include/asm-ppc/semaphore.h deleted file mode 100644 index 89e6e73be08c..000000000000 --- a/include/asm-ppc/semaphore.h +++ /dev/null @@ -1,111 +0,0 @@ -#ifndef _PPC_SEMAPHORE_H -#define _PPC_SEMAPHORE_H - -/* - * Swiped from asm-sparc/semaphore.h and modified - * -- Cort (cort@cs.nmt.edu) - * - * Stole some rw spinlock-based semaphore stuff from asm-alpha/semaphore.h - * -- Ani Joshi (ajoshi@unixbox.com) - * - * Remove spinlock-based RW semaphores; RW semaphore definitions are - * now in rwsem.h and we use the generic lib/rwsem.c implementation. - * Rework semaphores to use atomic_dec_if_positive. - * -- Paul Mackerras (paulus@samba.org) - */ - -#ifdef __KERNEL__ - -#include <asm/atomic.h> -#include <asm/system.h> -#include <linux/wait.h> -#include <linux/rwsem.h> - -struct semaphore { - /* - * Note that any negative value of count is equivalent to 0, - * but additionally indicates that some process(es) might be - * sleeping on `wait'. - */ - atomic_t count; - wait_queue_head_t wait; -}; - -#define __SEMAPHORE_INITIALIZER(name, n) \ -{ \ - .count = ATOMIC_INIT(n), \ - .wait = __WAIT_QUEUE_HEAD_INITIALIZER((name).wait) \ -} - -#define __MUTEX_INITIALIZER(name) \ - __SEMAPHORE_INITIALIZER(name, 1) - -#define __DECLARE_SEMAPHORE_GENERIC(name, count) \ - struct semaphore name = __SEMAPHORE_INITIALIZER(name,count) - -#define DECLARE_MUTEX(name) __DECLARE_SEMAPHORE_GENERIC(name, 1) -#define DECLARE_MUTEX_LOCKED(name) __DECLARE_SEMAPHORE_GENERIC(name, 0) - -static inline void sema_init (struct semaphore *sem, int val) -{ - atomic_set(&sem->count, val); - init_waitqueue_head(&sem->wait); -} - -static inline void init_MUTEX (struct semaphore *sem) -{ - sema_init(sem, 1); -} - -static inline void init_MUTEX_LOCKED (struct semaphore *sem) -{ - sema_init(sem, 0); -} - -extern void __down(struct semaphore * sem); -extern int __down_interruptible(struct semaphore * sem); -extern void __up(struct semaphore * sem); - -extern inline void down(struct semaphore * sem) -{ - might_sleep(); - - /* - * Try to get the semaphore, take the slow path if we fail. - */ - if (atomic_dec_return(&sem->count) < 0) - __down(sem); - smp_wmb(); -} - -extern inline int down_interruptible(struct semaphore * sem) -{ - int ret = 0; - - might_sleep(); - - if (atomic_dec_return(&sem->count) < 0) - ret = __down_interruptible(sem); - smp_wmb(); - return ret; -} - -extern inline int down_trylock(struct semaphore * sem) -{ - int ret; - - ret = atomic_dec_if_positive(&sem->count) < 0; - smp_wmb(); - return ret; -} - -extern inline void up(struct semaphore * sem) -{ - smp_wmb(); - if (atomic_inc_return(&sem->count) <= 0) - __up(sem); -} - -#endif /* __KERNEL__ */ - -#endif /* !(_PPC_SEMAPHORE_H) */ diff --git a/include/asm-ppc/sigcontext.h b/include/asm-ppc/sigcontext.h deleted file mode 100644 index b7a417e0a921..000000000000 --- a/include/asm-ppc/sigcontext.h +++ /dev/null @@ -1,15 +0,0 @@ -#ifndef _ASM_PPC_SIGCONTEXT_H -#define _ASM_PPC_SIGCONTEXT_H - -#include <asm/ptrace.h> -#include <linux/compiler.h> - -struct sigcontext { - unsigned long _unused[4]; - int signal; - unsigned long handler; - unsigned long oldmask; - struct pt_regs __user *regs; -}; - -#endif diff --git a/include/asm-ppc/smp.h b/include/asm-ppc/smp.h index 829481c0a9dc..30e9268a888c 100644 --- a/include/asm-ppc/smp.h +++ b/include/asm-ppc/smp.h @@ -35,6 +35,7 @@ extern cpumask_t cpu_possible_map; extern unsigned long smp_proc_in_lock[]; extern volatile unsigned long cpu_callin_map[]; extern int smp_tb_synchronized; +extern struct smp_ops_t *smp_ops; extern void smp_send_tlb_invalidate(int); extern void smp_send_xmon_break(int cpu); @@ -45,32 +46,31 @@ extern int __cpu_disable(void); extern void __cpu_die(unsigned int cpu); extern void cpu_die(void) __attribute__((noreturn)); -#define NO_PROC_ID 0xFF /* No processor magic marker */ -#define PROC_CHANGE_PENALTY 20 - #define raw_smp_processor_id() (current_thread_info()->cpu) extern int __cpu_up(unsigned int cpu); extern int smp_hw_index[]; -#define hard_smp_processor_id() (smp_hw_index[smp_processor_id()]) - -struct klock_info_struct { - unsigned long kernel_flag; - unsigned char akp; -}; - -extern struct klock_info_struct klock_info; -#define KLOCK_HELD 0xffffffff -#define KLOCK_CLEAR 0x0 - +#define hard_smp_processor_id() (smp_hw_index[smp_processor_id()]) +#define get_hard_smp_processor_id(cpu) (smp_hw_index[(cpu)]) +#define set_hard_smp_processor_id(cpu, phys)\ + (smp_hw_index[(cpu)] = (phys)) + #endif /* __ASSEMBLY__ */ #else /* !(CONFIG_SMP) */ static inline void cpu_die(void) { } +#define get_hard_smp_processor_id(cpu) 0 +#define set_hard_smp_processor_id(cpu, phys) +#define hard_smp_processor_id() 0 #endif /* !(CONFIG_SMP) */ +#ifndef __ASSEMBLY__ +extern int boot_cpuid; +extern int boot_cpuid_phys; +#endif + #endif /* !(_PPC_SMP_H) */ #endif /* __KERNEL__ */ diff --git a/include/asm-ppc/spinlock.h b/include/asm-ppc/spinlock.h index 20edcf2a6e0c..5c64b75f0295 100644 --- a/include/asm-ppc/spinlock.h +++ b/include/asm-ppc/spinlock.h @@ -9,7 +9,7 @@ * (the type definitions are in asm/raw_spinlock_types.h) */ -#define __raw_spin_is_locked(x) ((x)->lock != 0) +#define __raw_spin_is_locked(x) ((x)->slock != 0) #define __raw_spin_unlock_wait(lock) \ do { while (__raw_spin_is_locked(lock)) cpu_relax(); } while (0) #define __raw_spin_lock_flags(lock, flags) __raw_spin_lock(lock) @@ -31,17 +31,17 @@ static inline void __raw_spin_lock(raw_spinlock_t *lock) bne- 2b\n\ isync" : "=&r"(tmp) - : "r"(&lock->lock), "r"(1) + : "r"(&lock->slock), "r"(1) : "cr0", "memory"); } static inline void __raw_spin_unlock(raw_spinlock_t *lock) { __asm__ __volatile__("eieio # __raw_spin_unlock": : :"memory"); - lock->lock = 0; + lock->slock = 0; } -#define __raw_spin_trylock(l) (!test_and_set_bit(0,&(l)->lock)) +#define __raw_spin_trylock(l) (!test_and_set_bit(0,(volatile unsigned long *)(&(l)->slock))) /* * Read-write spinlocks, allowing multiple readers diff --git a/include/asm-ppc/spinlock_types.h b/include/asm-ppc/spinlock_types.h deleted file mode 100644 index 7919ccc75b8a..000000000000 --- a/include/asm-ppc/spinlock_types.h +++ /dev/null @@ -1,20 +0,0 @@ -#ifndef __ASM_SPINLOCK_TYPES_H -#define __ASM_SPINLOCK_TYPES_H - -#ifndef __LINUX_SPINLOCK_TYPES_H -# error "please don't include this file directly" -#endif - -typedef struct { - volatile unsigned long lock; -} raw_spinlock_t; - -#define __RAW_SPIN_LOCK_UNLOCKED { 0 } - -typedef struct { - volatile signed int lock; -} raw_rwlock_t; - -#define __RAW_RW_LOCK_UNLOCKED { 0 } - -#endif diff --git a/include/asm-ppc/stat.h b/include/asm-ppc/stat.h deleted file mode 100644 index cadb34298496..000000000000 --- a/include/asm-ppc/stat.h +++ /dev/null @@ -1,69 +0,0 @@ -#ifndef _PPC_STAT_H -#define _PPC_STAT_H - -#ifdef __KERNEL__ -#include <linux/types.h> -#endif /* __KERNEL__ */ - -struct __old_kernel_stat { - unsigned short st_dev; - unsigned short st_ino; - unsigned short st_mode; - unsigned short st_nlink; - unsigned short st_uid; - unsigned short st_gid; - unsigned short st_rdev; - unsigned long st_size; - unsigned long st_atime; - unsigned long st_mtime; - unsigned long st_ctime; -}; - -#define STAT_HAVE_NSEC 1 - -struct stat { - unsigned st_dev; - ino_t st_ino; - mode_t st_mode; - nlink_t st_nlink; - uid_t st_uid; - gid_t st_gid; - unsigned st_rdev; - off_t st_size; - unsigned long st_blksize; - unsigned long st_blocks; - unsigned long st_atime; - unsigned long st_atime_nsec; - unsigned long st_mtime; - unsigned long st_mtime_nsec; - unsigned long st_ctime; - unsigned long st_ctime_nsec; - unsigned long __unused4; - unsigned long __unused5; -}; - -/* This matches struct stat64 in glibc2.1. - */ -struct stat64 { - unsigned long long st_dev; /* Device. */ - unsigned long long st_ino; /* File serial number. */ - unsigned int st_mode; /* File mode. */ - unsigned int st_nlink; /* Link count. */ - unsigned int st_uid; /* User ID of the file's owner. */ - unsigned int st_gid; /* Group ID of the file's group. */ - unsigned long long st_rdev; /* Device number, if device. */ - unsigned short int __pad2; - long long st_size; /* Size of file, in bytes. */ - long st_blksize; /* Optimal block size for I/O. */ - - long long st_blocks; /* Number 512-byte blocks allocated. */ - long st_atime; /* Time of last access. */ - unsigned long st_atime_nsec; - long st_mtime; /* Time of last modification. */ - unsigned long int st_mtime_nsec; - long st_ctime; /* Time of last status change. */ - unsigned long int st_ctime_nsec; - unsigned long int __unused4; - unsigned long int __unused5; -}; -#endif diff --git a/include/asm-ppc/statfs.h b/include/asm-ppc/statfs.h deleted file mode 100644 index 807c69954a1b..000000000000 --- a/include/asm-ppc/statfs.h +++ /dev/null @@ -1,8 +0,0 @@ -#ifndef _PPC_STATFS_H -#define _PPC_STATFS_H - -#include <asm-generic/statfs.h> -#endif - - - diff --git a/include/asm-ppc/system.h b/include/asm-ppc/system.h index d754ab570fe0..bd99cb53a19f 100644 --- a/include/asm-ppc/system.h +++ b/include/asm-ppc/system.h @@ -70,25 +70,47 @@ extern void _set_L3CR(unsigned long); #endif extern void via_cuda_init(void); extern void pmac_nvram_init(void); +extern void chrp_nvram_init(void); extern void read_rtc_time(void); extern void pmac_find_display(void); extern void giveup_fpu(struct task_struct *); extern void enable_kernel_fp(void); +extern void flush_fp_to_thread(struct task_struct *); extern void enable_kernel_altivec(void); extern void giveup_altivec(struct task_struct *); extern void load_up_altivec(struct task_struct *); +extern int emulate_altivec(struct pt_regs *); extern void giveup_spe(struct task_struct *); extern void load_up_spe(struct task_struct *); extern int fix_alignment(struct pt_regs *); -extern void cvt_fd(float *from, double *to, unsigned long *fpscr); -extern void cvt_df(double *from, float *to, unsigned long *fpscr); +extern void cvt_fd(float *from, double *to, struct thread_struct *thread); +extern void cvt_df(double *from, float *to, struct thread_struct *thread); + +#ifdef CONFIG_ALTIVEC +extern void flush_altivec_to_thread(struct task_struct *); +#else +static inline void flush_altivec_to_thread(struct task_struct *t) +{ +} +#endif + +#ifdef CONFIG_SPE +extern void flush_spe_to_thread(struct task_struct *); +#else +static inline void flush_spe_to_thread(struct task_struct *t) +{ +} +#endif + extern int call_rtas(const char *, int, int, unsigned long *, ...); extern void cacheable_memzero(void *p, unsigned int nb); extern void *cacheable_memcpy(void *, const void *, unsigned int); extern int do_page_fault(struct pt_regs *, unsigned long, unsigned long); extern void bad_page_fault(struct pt_regs *, unsigned long, int); -extern void die(const char *, struct pt_regs *, long); +extern int die(const char *, struct pt_regs *, long); extern void _exception(int, struct pt_regs *, int, unsigned long); +void _nmask_and_or_msr(unsigned long nmask, unsigned long or_val); + #ifdef CONFIG_BOOKE_WDT extern u32 booke_wdt_enabled; extern u32 booke_wdt_period; diff --git a/include/asm-ppc/thread_info.h b/include/asm-ppc/thread_info.h deleted file mode 100644 index 27903db42efc..000000000000 --- a/include/asm-ppc/thread_info.h +++ /dev/null @@ -1,107 +0,0 @@ -/* thread_info.h: PPC low-level thread information - * adapted from the i386 version by Paul Mackerras - * - * Copyright (C) 2002 David Howells (dhowells@redhat.com) - * - Incorporating suggestions made by Linus Torvalds and Dave Miller - */ - -#ifndef _ASM_THREAD_INFO_H -#define _ASM_THREAD_INFO_H - -#ifdef __KERNEL__ -#ifndef __ASSEMBLY__ -/* - * low level task data. - * If you change this, change the TI_* offsets below to match. - */ -struct thread_info { - struct task_struct *task; /* main task structure */ - struct exec_domain *exec_domain; /* execution domain */ - unsigned long flags; /* low level flags */ - unsigned long local_flags; /* non-racy flags */ - int cpu; /* cpu we're on */ - int preempt_count; /* 0 => preemptable, - <0 => BUG */ - struct restart_block restart_block; -}; - -#define INIT_THREAD_INFO(tsk) \ -{ \ - .task = &tsk, \ - .exec_domain = &default_exec_domain, \ - .flags = 0, \ - .local_flags = 0, \ - .cpu = 0, \ - .preempt_count = 1, \ - .restart_block = { \ - .fn = do_no_restart_syscall, \ - }, \ -} - -#define init_thread_info (init_thread_union.thread_info) -#define init_stack (init_thread_union.stack) - -/* - * macros/functions for gaining access to the thread information structure - */ - -/* how to get the thread information struct from C */ -static inline struct thread_info *current_thread_info(void) -{ - struct thread_info *ti; - __asm__("rlwinm %0,1,0,0,18" : "=r"(ti)); - return ti; -} - -/* thread information allocation */ -#define alloc_thread_info(tsk) ((struct thread_info *) \ - __get_free_pages(GFP_KERNEL, 1)) -#define free_thread_info(ti) free_pages((unsigned long) (ti), 1) -#define get_thread_info(ti) get_task_struct((ti)->task) -#define put_thread_info(ti) put_task_struct((ti)->task) -#endif /* __ASSEMBLY__ */ - -/* - * Size of kernel stack for each process. - */ -#define THREAD_SIZE 8192 /* 2 pages */ - -#define PREEMPT_ACTIVE 0x10000000 - -/* - * thread information flag bit numbers - */ -#define TIF_SYSCALL_TRACE 0 /* syscall trace active */ -#define TIF_NOTIFY_RESUME 1 /* resumption notification requested */ -#define TIF_SIGPENDING 2 /* signal pending */ -#define TIF_NEED_RESCHED 3 /* rescheduling necessary */ -#define TIF_POLLING_NRFLAG 4 /* true if poll_idle() is polling - TIF_NEED_RESCHED */ -#define TIF_MEMDIE 5 -#define TIF_SYSCALL_AUDIT 6 /* syscall auditing active */ -#define TIF_SECCOMP 7 /* secure computing */ - -/* as above, but as bit values */ -#define _TIF_SYSCALL_TRACE (1<<TIF_SYSCALL_TRACE) -#define _TIF_NOTIFY_RESUME (1<<TIF_NOTIFY_RESUME) -#define _TIF_SIGPENDING (1<<TIF_SIGPENDING) -#define _TIF_NEED_RESCHED (1<<TIF_NEED_RESCHED) -#define _TIF_POLLING_NRFLAG (1<<TIF_POLLING_NRFLAG) -#define _TIF_SYSCALL_AUDIT (1<<TIF_SYSCALL_AUDIT) -#define _TIF_SECCOMP (1<<TIF_SECCOMP) - -#define _TIF_SYSCALL_T_OR_A (_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT|_TIF_SECCOMP) - -/* - * Non racy (local) flags bit numbers - */ -#define TIFL_FORCE_NOERROR 0 /* don't return error from current - syscall even if result < 0 */ - -/* as above, but as bit values */ -#define _TIFL_FORCE_NOERROR (1<<TIFL_FORCE_NOERROR) - - -#endif /* __KERNEL__ */ - -#endif /* _ASM_THREAD_INFO_H */ diff --git a/include/asm-ppc/tlbflush.h b/include/asm-ppc/tlbflush.h deleted file mode 100644 index 9afee4ffc835..000000000000 --- a/include/asm-ppc/tlbflush.h +++ /dev/null @@ -1,115 +0,0 @@ -/* - * include/asm-ppc/tlbflush.h - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ -#ifdef __KERNEL__ -#ifndef _PPC_TLBFLUSH_H -#define _PPC_TLBFLUSH_H - -#include <linux/config.h> -#include <linux/mm.h> - -extern void _tlbie(unsigned long address); -extern void _tlbia(void); - -#if defined(CONFIG_4xx) - -#ifndef CONFIG_44x -#define __tlbia() asm volatile ("sync; tlbia; isync" : : : "memory") -#else -#define __tlbia _tlbia -#endif - -static inline void flush_tlb_mm(struct mm_struct *mm) - { __tlbia(); } -static inline void flush_tlb_page(struct vm_area_struct *vma, - unsigned long vmaddr) - { _tlbie(vmaddr); } -static inline void flush_tlb_page_nohash(struct vm_area_struct *vma, - unsigned long vmaddr) - { _tlbie(vmaddr); } -static inline void flush_tlb_range(struct vm_area_struct *vma, - unsigned long start, unsigned long end) - { __tlbia(); } -static inline void flush_tlb_kernel_range(unsigned long start, - unsigned long end) - { __tlbia(); } - -#elif defined(CONFIG_FSL_BOOKE) - -/* TODO: determine if flush_tlb_range & flush_tlb_kernel_range - * are best implemented as tlbia vs specific tlbie's */ - -#define __tlbia() _tlbia() - -static inline void flush_tlb_mm(struct mm_struct *mm) - { __tlbia(); } -static inline void flush_tlb_page(struct vm_area_struct *vma, - unsigned long vmaddr) - { _tlbie(vmaddr); } -static inline void flush_tlb_page_nohash(struct vm_area_struct *vma, - unsigned long vmaddr) - { _tlbie(vmaddr); } -static inline void flush_tlb_range(struct vm_area_struct *vma, - unsigned long start, unsigned long end) - { __tlbia(); } -static inline void flush_tlb_kernel_range(unsigned long start, - unsigned long end) - { __tlbia(); } - -#elif defined(CONFIG_8xx) -#define __tlbia() asm volatile ("tlbia; sync" : : : "memory") - -static inline void flush_tlb_mm(struct mm_struct *mm) - { __tlbia(); } -static inline void flush_tlb_page(struct vm_area_struct *vma, - unsigned long vmaddr) - { _tlbie(vmaddr); } -static inline void flush_tlb_page_nohash(struct vm_area_struct *vma, - unsigned long vmaddr) - { _tlbie(vmaddr); } -static inline void flush_tlb_range(struct vm_area_struct *vma, - unsigned long start, unsigned long end) - { __tlbia(); } -static inline void flush_tlb_kernel_range(unsigned long start, - unsigned long end) - { __tlbia(); } - -#else /* 6xx, 7xx, 7xxx cpus */ -struct mm_struct; -struct vm_area_struct; -extern void flush_tlb_mm(struct mm_struct *mm); -extern void flush_tlb_page(struct vm_area_struct *vma, unsigned long vmaddr); -extern void flush_tlb_page_nohash(struct vm_area_struct *vma, unsigned long addr); -extern void flush_tlb_range(struct vm_area_struct *vma, unsigned long start, - unsigned long end); -extern void flush_tlb_kernel_range(unsigned long start, unsigned long end); -#endif - -/* - * This is called in munmap when we have freed up some page-table - * pages. We don't need to do anything here, there's nothing special - * about our page-table pages. -- paulus - */ -static inline void flush_tlb_pgtables(struct mm_struct *mm, - unsigned long start, unsigned long end) -{ -} - -/* - * This gets called at the end of handling a page fault, when - * the kernel has put a new PTE into the page table for the process. - * We use it to ensure coherency between the i-cache and d-cache - * for the page which has just been mapped in. - * On machines which use an MMU hash table, we use this to put a - * corresponding HPTE into the hash table ahead of time, instead of - * waiting for the inevitable extra hash-table miss exception. - */ -extern void update_mmu_cache(struct vm_area_struct *, unsigned long, pte_t); - -#endif /* _PPC_TLBFLUSH_H */ -#endif /*__KERNEL__ */ diff --git a/include/asm-ppc/types.h b/include/asm-ppc/types.h deleted file mode 100644 index 77dc24d7d2ad..000000000000 --- a/include/asm-ppc/types.h +++ /dev/null @@ -1,69 +0,0 @@ -#ifndef _PPC_TYPES_H -#define _PPC_TYPES_H - -#ifndef __ASSEMBLY__ - -typedef __signed__ char __s8; -typedef unsigned char __u8; - -typedef __signed__ short __s16; -typedef unsigned short __u16; - -typedef __signed__ int __s32; -typedef unsigned int __u32; - -#if defined(__GNUC__) && !defined(__STRICT_ANSI__) -typedef __signed__ long long __s64; -typedef unsigned long long __u64; -#endif - -typedef struct { - __u32 u[4]; -} __vector128; - -/* - * XXX allowed outside of __KERNEL__ for now, until glibc gets - * a proper set of asm headers of its own. -- paulus - */ -typedef unsigned short umode_t; - -#endif /* __ASSEMBLY__ */ - -#ifdef __KERNEL__ -/* - * These aren't exported outside the kernel to avoid name space clashes - */ -#define BITS_PER_LONG 32 - -#ifndef __ASSEMBLY__ - -#include <linux/config.h> - -typedef signed char s8; -typedef unsigned char u8; - -typedef signed short s16; -typedef unsigned short u16; - -typedef signed int s32; -typedef unsigned int u32; - -typedef signed long long s64; -typedef unsigned long long u64; - -typedef __vector128 vector128; - -/* DMA addresses are 32-bits wide */ -typedef u32 dma_addr_t; -typedef u64 dma64_addr_t; - -#ifdef CONFIG_LBD -typedef u64 sector_t; -#define HAVE_SECTOR_T -#endif - -#endif /* __ASSEMBLY__ */ - -#endif /* __KERNEL__ */ - -#endif diff --git a/include/asm-ppc/uaccess.h b/include/asm-ppc/uaccess.h deleted file mode 100644 index 63f56224da8c..000000000000 --- a/include/asm-ppc/uaccess.h +++ /dev/null @@ -1,393 +0,0 @@ -#ifdef __KERNEL__ -#ifndef _PPC_UACCESS_H -#define _PPC_UACCESS_H - -#ifndef __ASSEMBLY__ -#include <linux/sched.h> -#include <linux/errno.h> -#include <asm/processor.h> - -#define VERIFY_READ 0 -#define VERIFY_WRITE 1 - -/* - * The fs value determines whether argument validity checking should be - * performed or not. If get_fs() == USER_DS, checking is performed, with - * get_fs() == KERNEL_DS, checking is bypassed. - * - * For historical reasons, these macros are grossly misnamed. - * - * The fs/ds values are now the highest legal address in the "segment". - * This simplifies the checking in the routines below. - */ - -#define KERNEL_DS ((mm_segment_t) { ~0UL }) -#define USER_DS ((mm_segment_t) { TASK_SIZE - 1 }) - -#define get_ds() (KERNEL_DS) -#define get_fs() (current->thread.fs) -#define set_fs(val) (current->thread.fs = (val)) - -#define segment_eq(a,b) ((a).seg == (b).seg) - -#define __access_ok(addr,size) \ - ((addr) <= current->thread.fs.seg \ - && ((size) == 0 || (size) - 1 <= current->thread.fs.seg - (addr))) - -#define access_ok(type, addr, size) \ - (__chk_user_ptr(addr),__access_ok((unsigned long)(addr),(size))) - -/* - * The exception table consists of pairs of addresses: the first is the - * address of an instruction that is allowed to fault, and the second is - * the address at which the program should continue. No registers are - * modified, so it is entirely up to the continuation code to figure out - * what to do. - * - * All the routines below use bits of fixup code that are out of line - * with the main instruction path. This means when everything is well, - * we don't even have to jump over them. Further, they do not intrude - * on our cache or tlb entries. - */ - -struct exception_table_entry -{ - unsigned long insn, fixup; -}; - -/* - * These are the main single-value transfer routines. They automatically - * use the right size if we just have the right pointer type. - * - * This gets kind of ugly. We want to return _two_ values in "get_user()" - * and yet we don't want to do any pointers, because that is too much - * of a performance impact. Thus we have a few rather ugly macros here, - * and hide all the ugliness from the user. - * - * The "__xxx" versions of the user access functions are versions that - * do not verify the address space, that must have been done previously - * with a separate "access_ok()" call (this is used when we do multiple - * accesses to the same area of user memory). - * - * As we use the same address space for kernel and user data on the - * PowerPC, we can just do these as direct assignments. (Of course, the - * exception handling means that it's no longer "just"...) - * - * The "user64" versions of the user access functions are versions that - * allow access of 64-bit data. The "get_user" functions do not - * properly handle 64-bit data because the value gets down cast to a long. - * The "put_user" functions already handle 64-bit data properly but we add - * "user64" versions for completeness - */ -#define get_user(x,ptr) \ - __get_user_check((x),(ptr),sizeof(*(ptr))) -#define get_user64(x,ptr) \ - __get_user64_check((x),(ptr),sizeof(*(ptr))) -#define put_user(x,ptr) \ - __put_user_check((__typeof__(*(ptr)))(x),(ptr),sizeof(*(ptr))) -#define put_user64(x,ptr) put_user(x,ptr) - -#define __get_user(x,ptr) \ - __get_user_nocheck((x),(ptr),sizeof(*(ptr))) -#define __get_user64(x,ptr) \ - __get_user64_nocheck((x),(ptr),sizeof(*(ptr))) -#define __put_user(x,ptr) \ - __put_user_nocheck((__typeof__(*(ptr)))(x),(ptr),sizeof(*(ptr))) -#define __put_user64(x,ptr) __put_user(x,ptr) - -extern long __put_user_bad(void); - -#define __put_user_nocheck(x,ptr,size) \ -({ \ - long __pu_err; \ - __chk_user_ptr(ptr); \ - __put_user_size((x),(ptr),(size),__pu_err); \ - __pu_err; \ -}) - -#define __put_user_check(x,ptr,size) \ -({ \ - long __pu_err = -EFAULT; \ - __typeof__(*(ptr)) __user *__pu_addr = (ptr); \ - if (access_ok(VERIFY_WRITE,__pu_addr,size)) \ - __put_user_size((x),__pu_addr,(size),__pu_err); \ - __pu_err; \ -}) - -#define __put_user_size(x,ptr,size,retval) \ -do { \ - retval = 0; \ - switch (size) { \ - case 1: \ - __put_user_asm(x, ptr, retval, "stb"); \ - break; \ - case 2: \ - __put_user_asm(x, ptr, retval, "sth"); \ - break; \ - case 4: \ - __put_user_asm(x, ptr, retval, "stw"); \ - break; \ - case 8: \ - __put_user_asm2(x, ptr, retval); \ - break; \ - default: \ - __put_user_bad(); \ - } \ -} while (0) - -/* - * We don't tell gcc that we are accessing memory, but this is OK - * because we do not write to any memory gcc knows about, so there - * are no aliasing issues. - */ -#define __put_user_asm(x, addr, err, op) \ - __asm__ __volatile__( \ - "1: "op" %1,0(%2)\n" \ - "2:\n" \ - ".section .fixup,\"ax\"\n" \ - "3: li %0,%3\n" \ - " b 2b\n" \ - ".previous\n" \ - ".section __ex_table,\"a\"\n" \ - " .align 2\n" \ - " .long 1b,3b\n" \ - ".previous" \ - : "=r" (err) \ - : "r" (x), "b" (addr), "i" (-EFAULT), "0" (err)) - -#define __put_user_asm2(x, addr, err) \ - __asm__ __volatile__( \ - "1: stw %1,0(%2)\n" \ - "2: stw %1+1,4(%2)\n" \ - "3:\n" \ - ".section .fixup,\"ax\"\n" \ - "4: li %0,%3\n" \ - " b 3b\n" \ - ".previous\n" \ - ".section __ex_table,\"a\"\n" \ - " .align 2\n" \ - " .long 1b,4b\n" \ - " .long 2b,4b\n" \ - ".previous" \ - : "=r" (err) \ - : "r" (x), "b" (addr), "i" (-EFAULT), "0" (err)) - -#define __get_user_nocheck(x, ptr, size) \ -({ \ - long __gu_err; \ - unsigned long __gu_val; \ - __chk_user_ptr(ptr); \ - __get_user_size(__gu_val, (ptr), (size), __gu_err); \ - (x) = (__typeof__(*(ptr)))__gu_val; \ - __gu_err; \ -}) - -#define __get_user64_nocheck(x, ptr, size) \ -({ \ - long __gu_err; \ - long long __gu_val; \ - __chk_user_ptr(ptr); \ - __get_user_size64(__gu_val, (ptr), (size), __gu_err); \ - (x) = (__typeof__(*(ptr)))__gu_val; \ - __gu_err; \ -}) - -#define __get_user_check(x, ptr, size) \ -({ \ - long __gu_err = -EFAULT; \ - unsigned long __gu_val = 0; \ - const __typeof__(*(ptr)) __user *__gu_addr = (ptr); \ - if (access_ok(VERIFY_READ, __gu_addr, (size))) \ - __get_user_size(__gu_val, __gu_addr, (size), __gu_err); \ - (x) = (__typeof__(*(ptr)))__gu_val; \ - __gu_err; \ -}) - -#define __get_user64_check(x, ptr, size) \ -({ \ - long __gu_err = -EFAULT; \ - long long __gu_val = 0; \ - const __typeof__(*(ptr)) __user *__gu_addr = (ptr); \ - if (access_ok(VERIFY_READ, __gu_addr, (size))) \ - __get_user_size64(__gu_val, __gu_addr, (size), __gu_err); \ - (x) = (__typeof__(*(ptr)))__gu_val; \ - __gu_err; \ -}) - -extern long __get_user_bad(void); - -#define __get_user_size(x, ptr, size, retval) \ -do { \ - retval = 0; \ - switch (size) { \ - case 1: \ - __get_user_asm(x, ptr, retval, "lbz"); \ - break; \ - case 2: \ - __get_user_asm(x, ptr, retval, "lhz"); \ - break; \ - case 4: \ - __get_user_asm(x, ptr, retval, "lwz"); \ - break; \ - default: \ - x = __get_user_bad(); \ - } \ -} while (0) - -#define __get_user_size64(x, ptr, size, retval) \ -do { \ - retval = 0; \ - switch (size) { \ - case 1: \ - __get_user_asm(x, ptr, retval, "lbz"); \ - break; \ - case 2: \ - __get_user_asm(x, ptr, retval, "lhz"); \ - break; \ - case 4: \ - __get_user_asm(x, ptr, retval, "lwz"); \ - break; \ - case 8: \ - __get_user_asm2(x, ptr, retval); \ - break; \ - default: \ - x = __get_user_bad(); \ - } \ -} while (0) - -#define __get_user_asm(x, addr, err, op) \ - __asm__ __volatile__( \ - "1: "op" %1,0(%2)\n" \ - "2:\n" \ - ".section .fixup,\"ax\"\n" \ - "3: li %0,%3\n" \ - " li %1,0\n" \ - " b 2b\n" \ - ".previous\n" \ - ".section __ex_table,\"a\"\n" \ - " .align 2\n" \ - " .long 1b,3b\n" \ - ".previous" \ - : "=r"(err), "=r"(x) \ - : "b"(addr), "i"(-EFAULT), "0"(err)) - -#define __get_user_asm2(x, addr, err) \ - __asm__ __volatile__( \ - "1: lwz %1,0(%2)\n" \ - "2: lwz %1+1,4(%2)\n" \ - "3:\n" \ - ".section .fixup,\"ax\"\n" \ - "4: li %0,%3\n" \ - " li %1,0\n" \ - " li %1+1,0\n" \ - " b 3b\n" \ - ".previous\n" \ - ".section __ex_table,\"a\"\n" \ - " .align 2\n" \ - " .long 1b,4b\n" \ - " .long 2b,4b\n" \ - ".previous" \ - : "=r"(err), "=&r"(x) \ - : "b"(addr), "i"(-EFAULT), "0"(err)) - -/* more complex routines */ - -extern int __copy_tofrom_user(void __user *to, const void __user *from, - unsigned long size); - -extern inline unsigned long -copy_from_user(void *to, const void __user *from, unsigned long n) -{ - unsigned long over; - - if (access_ok(VERIFY_READ, from, n)) - return __copy_tofrom_user((__force void __user *)to, from, n); - if ((unsigned long)from < TASK_SIZE) { - over = (unsigned long)from + n - TASK_SIZE; - return __copy_tofrom_user((__force void __user *)to, from, n - over) + over; - } - return n; -} - -extern inline unsigned long -copy_to_user(void __user *to, const void *from, unsigned long n) -{ - unsigned long over; - - if (access_ok(VERIFY_WRITE, to, n)) - return __copy_tofrom_user(to, (__force void __user *) from, n); - if ((unsigned long)to < TASK_SIZE) { - over = (unsigned long)to + n - TASK_SIZE; - return __copy_tofrom_user(to, (__force void __user *) from, n - over) + over; - } - return n; -} - -static inline unsigned long __copy_from_user(void *to, const void __user *from, unsigned long size) -{ - return __copy_tofrom_user((__force void __user *)to, from, size); -} - -static inline unsigned long __copy_to_user(void __user *to, const void *from, unsigned long size) -{ - return __copy_tofrom_user(to, (__force void __user *)from, size); -} - -#define __copy_to_user_inatomic __copy_to_user -#define __copy_from_user_inatomic __copy_from_user - -extern unsigned long __clear_user(void __user *addr, unsigned long size); - -extern inline unsigned long -clear_user(void __user *addr, unsigned long size) -{ - if (access_ok(VERIFY_WRITE, addr, size)) - return __clear_user(addr, size); - if ((unsigned long)addr < TASK_SIZE) { - unsigned long over = (unsigned long)addr + size - TASK_SIZE; - return __clear_user(addr, size - over) + over; - } - return size; -} - -extern int __strncpy_from_user(char *dst, const char __user *src, long count); - -extern inline long -strncpy_from_user(char *dst, const char __user *src, long count) -{ - if (access_ok(VERIFY_READ, src, 1)) - return __strncpy_from_user(dst, src, count); - return -EFAULT; -} - -/* - * Return the size of a string (including the ending 0) - * - * Return 0 for error - */ - -extern int __strnlen_user(const char __user *str, long len, unsigned long top); - -/* - * Returns the length of the string at str (including the null byte), - * or 0 if we hit a page we can't access, - * or something > len if we didn't find a null byte. - * - * The `top' parameter to __strnlen_user is to make sure that - * we can never overflow from the user area into kernel space. - */ -extern __inline__ int strnlen_user(const char __user *str, long len) -{ - unsigned long top = current->thread.fs.seg; - - if ((unsigned long)str > top) - return 0; - return __strnlen_user(str, len, top); -} - -#define strlen_user(str) strnlen_user((str), 0x7ffffffe) - -#endif /* __ASSEMBLY__ */ - -#endif /* _PPC_UACCESS_H */ -#endif /* __KERNEL__ */ diff --git a/include/asm-ppc/ucontext.h b/include/asm-ppc/ucontext.h deleted file mode 100644 index 664bc984d51f..000000000000 --- a/include/asm-ppc/ucontext.h +++ /dev/null @@ -1,27 +0,0 @@ -#ifndef _ASMPPC_UCONTEXT_H -#define _ASMPPC_UCONTEXT_H - -#include <asm/elf.h> -#include <asm/signal.h> - -struct mcontext { - elf_gregset_t mc_gregs; - elf_fpregset_t mc_fregs; - unsigned long mc_pad[2]; - elf_vrregset_t mc_vregs __attribute__((__aligned__(16))); -}; - -struct ucontext { - unsigned long uc_flags; - struct ucontext __user *uc_link; - stack_t uc_stack; - int uc_pad[7]; - struct mcontext __user *uc_regs;/* points to uc_mcontext field */ - sigset_t uc_sigmask; - /* glibc has 1024-bit signal masks, ours are 64-bit */ - int uc_maskext[30]; - int uc_pad2[3]; - struct mcontext uc_mcontext; -}; - -#endif /* !_ASMPPC_UCONTEXT_H */ diff --git a/include/asm-ppc/vga.h b/include/asm-ppc/vga.h deleted file mode 100644 index c5864734e3e1..000000000000 --- a/include/asm-ppc/vga.h +++ /dev/null @@ -1,46 +0,0 @@ -/* - * Access to VGA videoram - * - * (c) 1998 Martin Mares <mj@ucw.cz> - */ - -#ifdef __KERNEL__ -#ifndef _LINUX_ASM_VGA_H_ -#define _LINUX_ASM_VGA_H_ - -#include <asm/io.h> - -#include <linux/config.h> - -#if defined(CONFIG_VGA_CONSOLE) || defined(CONFIG_MDA_CONSOLE) - -#define VT_BUF_HAVE_RW -/* - * These are only needed for supporting VGA or MDA text mode, which use little - * endian byte ordering. - * In other cases, we can optimize by using native byte ordering and - * <linux/vt_buffer.h> has already done the right job for us. - */ - -extern inline void scr_writew(u16 val, volatile u16 *addr) -{ - st_le16(addr, val); -} - -extern inline u16 scr_readw(volatile const u16 *addr) -{ - return ld_le16(addr); -} - -#define VT_BUF_HAVE_MEMCPYW -#define scr_memcpyw memcpy - -#endif /* !CONFIG_VGA_CONSOLE && !CONFIG_MDA_CONSOLE */ - -extern unsigned long vgacon_remap_base; -#define VGA_MAP_MEM(x) (x + vgacon_remap_base) -#define vga_readb(x) (*(x)) -#define vga_writeb(x,y) (*(y) = (x)) - -#endif -#endif /* __KERNEL__ */ diff --git a/include/asm-ppc/xmon.h b/include/asm-ppc/xmon.h deleted file mode 100644 index 042b83e6680d..000000000000 --- a/include/asm-ppc/xmon.h +++ /dev/null @@ -1,17 +0,0 @@ -#ifndef __PPC_XMON_H -#define __PPC_XMON_H -#ifdef __KERNEL__ - -struct pt_regs; - -extern void xmon(struct pt_regs *excp); -extern void xmon_printf(const char *fmt, ...); -extern void xmon_map_scc(void); -extern int xmon_bpt(struct pt_regs *regs); -extern int xmon_sstep(struct pt_regs *regs); -extern int xmon_iabr_match(struct pt_regs *regs); -extern int xmon_dabr_match(struct pt_regs *regs); -extern void (*xmon_fault_handler)(struct pt_regs *regs); - -#endif -#endif diff --git a/include/asm-ppc64/atomic.h b/include/asm-ppc64/atomic.h deleted file mode 100644 index 0e5f25e83bc0..000000000000 --- a/include/asm-ppc64/atomic.h +++ /dev/null @@ -1,197 +0,0 @@ -/* - * PowerPC64 atomic operations - * - * Copyright (C) 2001 Paul Mackerras <paulus@au.ibm.com>, IBM - * Copyright (C) 2001 Anton Blanchard <anton@au.ibm.com>, IBM - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ - -#ifndef _ASM_PPC64_ATOMIC_H_ -#define _ASM_PPC64_ATOMIC_H_ - -#include <asm/memory.h> - -typedef struct { volatile int counter; } atomic_t; - -#define ATOMIC_INIT(i) { (i) } - -#define atomic_read(v) ((v)->counter) -#define atomic_set(v,i) (((v)->counter) = (i)) - -static __inline__ void atomic_add(int a, atomic_t *v) -{ - int t; - - __asm__ __volatile__( -"1: lwarx %0,0,%3 # atomic_add\n\ - add %0,%2,%0\n\ - stwcx. %0,0,%3\n\ - bne- 1b" - : "=&r" (t), "=m" (v->counter) - : "r" (a), "r" (&v->counter), "m" (v->counter) - : "cc"); -} - -static __inline__ int atomic_add_return(int a, atomic_t *v) -{ - int t; - - __asm__ __volatile__( - EIEIO_ON_SMP -"1: lwarx %0,0,%2 # atomic_add_return\n\ - add %0,%1,%0\n\ - stwcx. %0,0,%2\n\ - bne- 1b" - ISYNC_ON_SMP - : "=&r" (t) - : "r" (a), "r" (&v->counter) - : "cc", "memory"); - - return t; -} - -#define atomic_add_negative(a, v) (atomic_add_return((a), (v)) < 0) - -static __inline__ void atomic_sub(int a, atomic_t *v) -{ - int t; - - __asm__ __volatile__( -"1: lwarx %0,0,%3 # atomic_sub\n\ - subf %0,%2,%0\n\ - stwcx. %0,0,%3\n\ - bne- 1b" - : "=&r" (t), "=m" (v->counter) - : "r" (a), "r" (&v->counter), "m" (v->counter) - : "cc"); -} - -static __inline__ int atomic_sub_return(int a, atomic_t *v) -{ - int t; - - __asm__ __volatile__( - EIEIO_ON_SMP -"1: lwarx %0,0,%2 # atomic_sub_return\n\ - subf %0,%1,%0\n\ - stwcx. %0,0,%2\n\ - bne- 1b" - ISYNC_ON_SMP - : "=&r" (t) - : "r" (a), "r" (&v->counter) - : "cc", "memory"); - - return t; -} - -static __inline__ void atomic_inc(atomic_t *v) -{ - int t; - - __asm__ __volatile__( -"1: lwarx %0,0,%2 # atomic_inc\n\ - addic %0,%0,1\n\ - stwcx. %0,0,%2\n\ - bne- 1b" - : "=&r" (t), "=m" (v->counter) - : "r" (&v->counter), "m" (v->counter) - : "cc"); -} - -static __inline__ int atomic_inc_return(atomic_t *v) -{ - int t; - - __asm__ __volatile__( - EIEIO_ON_SMP -"1: lwarx %0,0,%1 # atomic_inc_return\n\ - addic %0,%0,1\n\ - stwcx. %0,0,%1\n\ - bne- 1b" - ISYNC_ON_SMP - : "=&r" (t) - : "r" (&v->counter) - : "cc", "memory"); - - return t; -} - -/* - * atomic_inc_and_test - increment and test - * @v: pointer of type atomic_t - * - * Atomically increments @v by 1 - * and returns true if the result is zero, or false for all - * other cases. - */ -#define atomic_inc_and_test(v) (atomic_inc_return(v) == 0) - -static __inline__ void atomic_dec(atomic_t *v) -{ - int t; - - __asm__ __volatile__( -"1: lwarx %0,0,%2 # atomic_dec\n\ - addic %0,%0,-1\n\ - stwcx. %0,0,%2\n\ - bne- 1b" - : "=&r" (t), "=m" (v->counter) - : "r" (&v->counter), "m" (v->counter) - : "cc"); -} - -static __inline__ int atomic_dec_return(atomic_t *v) -{ - int t; - - __asm__ __volatile__( - EIEIO_ON_SMP -"1: lwarx %0,0,%1 # atomic_dec_return\n\ - addic %0,%0,-1\n\ - stwcx. %0,0,%1\n\ - bne- 1b" - ISYNC_ON_SMP - : "=&r" (t) - : "r" (&v->counter) - : "cc", "memory"); - - return t; -} - -#define atomic_sub_and_test(a, v) (atomic_sub_return((a), (v)) == 0) -#define atomic_dec_and_test(v) (atomic_dec_return((v)) == 0) - -/* - * Atomically test *v and decrement if it is greater than 0. - * The function returns the old value of *v minus 1. - */ -static __inline__ int atomic_dec_if_positive(atomic_t *v) -{ - int t; - - __asm__ __volatile__( - EIEIO_ON_SMP -"1: lwarx %0,0,%1 # atomic_dec_if_positive\n\ - addic. %0,%0,-1\n\ - blt- 2f\n\ - stwcx. %0,0,%1\n\ - bne- 1b" - ISYNC_ON_SMP - "\n\ -2:" : "=&r" (t) - : "r" (&v->counter) - : "cc", "memory"); - - return t; -} - -#define smp_mb__before_atomic_dec() smp_mb() -#define smp_mb__after_atomic_dec() smp_mb() -#define smp_mb__before_atomic_inc() smp_mb() -#define smp_mb__after_atomic_inc() smp_mb() - -#endif /* _ASM_PPC64_ATOMIC_H_ */ diff --git a/include/asm-ppc64/bitops.h b/include/asm-ppc64/bitops.h deleted file mode 100644 index a0f831224f96..000000000000 --- a/include/asm-ppc64/bitops.h +++ /dev/null @@ -1,360 +0,0 @@ -/* - * PowerPC64 atomic bit operations. - * Dave Engebretsen, Todd Inglett, Don Reed, Pat McCarthy, Peter Bergner, - * Anton Blanchard - * - * Originally taken from the 32b PPC code. Modified to use 64b values for - * the various counters & memory references. - * - * Bitops are odd when viewed on big-endian systems. They were designed - * on little endian so the size of the bitset doesn't matter (low order bytes - * come first) as long as the bit in question is valid. - * - * Bits are "tested" often using the C expression (val & (1<<nr)) so we do - * our best to stay compatible with that. The assumption is that val will - * be unsigned long for such tests. As such, we assume the bits are stored - * as an array of unsigned long (the usual case is a single unsigned long, - * of course). Here's an example bitset with bit numbering: - * - * |63..........0|127........64|195.......128|255.......196| - * - * This leads to a problem. If an int, short or char is passed as a bitset - * it will be a bad memory reference since we want to store in chunks - * of unsigned long (64 bits here) size. - * - * There are a few little-endian macros used mostly for filesystem bitmaps, - * these work on similar bit arrays layouts, but byte-oriented: - * - * |7...0|15...8|23...16|31...24|39...32|47...40|55...48|63...56| - * - * The main difference is that bit 3-5 in the bit number field needs to be - * reversed compared to the big-endian bit fields. This can be achieved - * by XOR with 0b111000 (0x38). - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ - -#ifndef _PPC64_BITOPS_H -#define _PPC64_BITOPS_H - -#ifdef __KERNEL__ - -#include <asm/memory.h> - -/* - * clear_bit doesn't imply a memory barrier - */ -#define smp_mb__before_clear_bit() smp_mb() -#define smp_mb__after_clear_bit() smp_mb() - -static __inline__ int test_bit(unsigned long nr, __const__ volatile unsigned long *addr) -{ - return (1UL & (addr[nr >> 6] >> (nr & 63))); -} - -static __inline__ void set_bit(unsigned long nr, volatile unsigned long *addr) -{ - unsigned long old; - unsigned long mask = 1UL << (nr & 0x3f); - unsigned long *p = ((unsigned long *)addr) + (nr >> 6); - - __asm__ __volatile__( -"1: ldarx %0,0,%3 # set_bit\n\ - or %0,%0,%2\n\ - stdcx. %0,0,%3\n\ - bne- 1b" - : "=&r" (old), "=m" (*p) - : "r" (mask), "r" (p), "m" (*p) - : "cc"); -} - -static __inline__ void clear_bit(unsigned long nr, volatile unsigned long *addr) -{ - unsigned long old; - unsigned long mask = 1UL << (nr & 0x3f); - unsigned long *p = ((unsigned long *)addr) + (nr >> 6); - - __asm__ __volatile__( -"1: ldarx %0,0,%3 # clear_bit\n\ - andc %0,%0,%2\n\ - stdcx. %0,0,%3\n\ - bne- 1b" - : "=&r" (old), "=m" (*p) - : "r" (mask), "r" (p), "m" (*p) - : "cc"); -} - -static __inline__ void change_bit(unsigned long nr, volatile unsigned long *addr) -{ - unsigned long old; - unsigned long mask = 1UL << (nr & 0x3f); - unsigned long *p = ((unsigned long *)addr) + (nr >> 6); - - __asm__ __volatile__( -"1: ldarx %0,0,%3 # change_bit\n\ - xor %0,%0,%2\n\ - stdcx. %0,0,%3\n\ - bne- 1b" - : "=&r" (old), "=m" (*p) - : "r" (mask), "r" (p), "m" (*p) - : "cc"); -} - -static __inline__ int test_and_set_bit(unsigned long nr, volatile unsigned long *addr) -{ - unsigned long old, t; - unsigned long mask = 1UL << (nr & 0x3f); - unsigned long *p = ((unsigned long *)addr) + (nr >> 6); - - __asm__ __volatile__( - EIEIO_ON_SMP -"1: ldarx %0,0,%3 # test_and_set_bit\n\ - or %1,%0,%2 \n\ - stdcx. %1,0,%3 \n\ - bne- 1b" - ISYNC_ON_SMP - : "=&r" (old), "=&r" (t) - : "r" (mask), "r" (p) - : "cc", "memory"); - - return (old & mask) != 0; -} - -static __inline__ int test_and_clear_bit(unsigned long nr, volatile unsigned long *addr) -{ - unsigned long old, t; - unsigned long mask = 1UL << (nr & 0x3f); - unsigned long *p = ((unsigned long *)addr) + (nr >> 6); - - __asm__ __volatile__( - EIEIO_ON_SMP -"1: ldarx %0,0,%3 # test_and_clear_bit\n\ - andc %1,%0,%2\n\ - stdcx. %1,0,%3\n\ - bne- 1b" - ISYNC_ON_SMP - : "=&r" (old), "=&r" (t) - : "r" (mask), "r" (p) - : "cc", "memory"); - - return (old & mask) != 0; -} - -static __inline__ int test_and_change_bit(unsigned long nr, volatile unsigned long *addr) -{ - unsigned long old, t; - unsigned long mask = 1UL << (nr & 0x3f); - unsigned long *p = ((unsigned long *)addr) + (nr >> 6); - - __asm__ __volatile__( - EIEIO_ON_SMP -"1: ldarx %0,0,%3 # test_and_change_bit\n\ - xor %1,%0,%2\n\ - stdcx. %1,0,%3\n\ - bne- 1b" - ISYNC_ON_SMP - : "=&r" (old), "=&r" (t) - : "r" (mask), "r" (p) - : "cc", "memory"); - - return (old & mask) != 0; -} - -static __inline__ void set_bits(unsigned long mask, unsigned long *addr) -{ - unsigned long old; - - __asm__ __volatile__( -"1: ldarx %0,0,%3 # set_bit\n\ - or %0,%0,%2\n\ - stdcx. %0,0,%3\n\ - bne- 1b" - : "=&r" (old), "=m" (*addr) - : "r" (mask), "r" (addr), "m" (*addr) - : "cc"); -} - -/* - * non-atomic versions - */ -static __inline__ void __set_bit(unsigned long nr, volatile unsigned long *addr) -{ - unsigned long mask = 1UL << (nr & 0x3f); - unsigned long *p = ((unsigned long *)addr) + (nr >> 6); - - *p |= mask; -} - -static __inline__ void __clear_bit(unsigned long nr, volatile unsigned long *addr) -{ - unsigned long mask = 1UL << (nr & 0x3f); - unsigned long *p = ((unsigned long *)addr) + (nr >> 6); - - *p &= ~mask; -} - -static __inline__ void __change_bit(unsigned long nr, volatile unsigned long *addr) -{ - unsigned long mask = 1UL << (nr & 0x3f); - unsigned long *p = ((unsigned long *)addr) + (nr >> 6); - - *p ^= mask; -} - -static __inline__ int __test_and_set_bit(unsigned long nr, volatile unsigned long *addr) -{ - unsigned long mask = 1UL << (nr & 0x3f); - unsigned long *p = ((unsigned long *)addr) + (nr >> 6); - unsigned long old = *p; - - *p = old | mask; - return (old & mask) != 0; -} - -static __inline__ int __test_and_clear_bit(unsigned long nr, volatile unsigned long *addr) -{ - unsigned long mask = 1UL << (nr & 0x3f); - unsigned long *p = ((unsigned long *)addr) + (nr >> 6); - unsigned long old = *p; - - *p = old & ~mask; - return (old & mask) != 0; -} - -static __inline__ int __test_and_change_bit(unsigned long nr, volatile unsigned long *addr) -{ - unsigned long mask = 1UL << (nr & 0x3f); - unsigned long *p = ((unsigned long *)addr) + (nr >> 6); - unsigned long old = *p; - - *p = old ^ mask; - return (old & mask) != 0; -} - -/* - * Return the zero-based bit position (from RIGHT TO LEFT, 63 -> 0) of the - * most significant (left-most) 1-bit in a double word. - */ -static __inline__ int __ilog2(unsigned long x) -{ - int lz; - - asm ("cntlzd %0,%1" : "=r" (lz) : "r" (x)); - return 63 - lz; -} - -/* - * Determines the bit position of the least significant (rightmost) 0 bit - * in the specified double word. The returned bit position will be zero-based, - * starting from the right side (63 - 0). - */ -static __inline__ unsigned long ffz(unsigned long x) -{ - /* no zero exists anywhere in the 8 byte area. */ - if ((x = ~x) == 0) - return 64; - - /* - * Calculate the bit position of the least signficant '1' bit in x - * (since x has been changed this will actually be the least signficant - * '0' bit in * the original x). Note: (x & -x) gives us a mask that - * is the least significant * (RIGHT-most) 1-bit of the value in x. - */ - return __ilog2(x & -x); -} - -static __inline__ int __ffs(unsigned long x) -{ - return __ilog2(x & -x); -} - -/* - * ffs: find first bit set. This is defined the same way as - * the libc and compiler builtin ffs routines, therefore - * differs in spirit from the above ffz (man ffs). - */ -static __inline__ int ffs(int x) -{ - unsigned long i = (unsigned long)x; - return __ilog2(i & -i) + 1; -} - -/* - * fls: find last (most-significant) bit set. - * Note fls(0) = 0, fls(1) = 1, fls(0x80000000) = 32. - */ -#define fls(x) generic_fls(x) - -/* - * hweightN: returns the hamming weight (i.e. the number - * of bits set) of a N-bit word - */ -#define hweight64(x) generic_hweight64(x) -#define hweight32(x) generic_hweight32(x) -#define hweight16(x) generic_hweight16(x) -#define hweight8(x) generic_hweight8(x) - -extern unsigned long find_next_zero_bit(const unsigned long *addr, unsigned long size, unsigned long offset); -#define find_first_zero_bit(addr, size) \ - find_next_zero_bit((addr), (size), 0) - -extern unsigned long find_next_bit(const unsigned long *addr, unsigned long size, unsigned long offset); -#define find_first_bit(addr, size) \ - find_next_bit((addr), (size), 0) - -extern unsigned long find_next_zero_le_bit(const unsigned long *addr, unsigned long size, unsigned long offset); -#define find_first_zero_le_bit(addr, size) \ - find_next_zero_le_bit((addr), (size), 0) - -static __inline__ int test_le_bit(unsigned long nr, __const__ unsigned long * addr) -{ - __const__ unsigned char *ADDR = (__const__ unsigned char *) addr; - return (ADDR[nr >> 3] >> (nr & 7)) & 1; -} - -#define test_and_clear_le_bit(nr, addr) \ - test_and_clear_bit((nr) ^ 0x38, (addr)) -#define test_and_set_le_bit(nr, addr) \ - test_and_set_bit((nr) ^ 0x38, (addr)) - -/* - * non-atomic versions - */ - -#define __set_le_bit(nr, addr) \ - __set_bit((nr) ^ 0x38, (addr)) -#define __clear_le_bit(nr, addr) \ - __clear_bit((nr) ^ 0x38, (addr)) -#define __test_and_clear_le_bit(nr, addr) \ - __test_and_clear_bit((nr) ^ 0x38, (addr)) -#define __test_and_set_le_bit(nr, addr) \ - __test_and_set_bit((nr) ^ 0x38, (addr)) - -#define ext2_set_bit(nr,addr) \ - __test_and_set_le_bit((nr), (unsigned long*)addr) -#define ext2_clear_bit(nr, addr) \ - __test_and_clear_le_bit((nr), (unsigned long*)addr) - -#define ext2_set_bit_atomic(lock, nr, addr) \ - test_and_set_le_bit((nr), (unsigned long*)addr) -#define ext2_clear_bit_atomic(lock, nr, addr) \ - test_and_clear_le_bit((nr), (unsigned long*)addr) - - -#define ext2_test_bit(nr, addr) test_le_bit((nr),(unsigned long*)addr) -#define ext2_find_first_zero_bit(addr, size) \ - find_first_zero_le_bit((unsigned long*)addr, size) -#define ext2_find_next_zero_bit(addr, size, off) \ - find_next_zero_le_bit((unsigned long*)addr, size, off) - -#define minix_test_and_set_bit(nr,addr) test_and_set_bit(nr,addr) -#define minix_set_bit(nr,addr) set_bit(nr,addr) -#define minix_test_and_clear_bit(nr,addr) test_and_clear_bit(nr,addr) -#define minix_test_bit(nr,addr) test_bit(nr,addr) -#define minix_find_first_zero_bit(addr,size) find_first_zero_bit(addr,size) - -#endif /* __KERNEL__ */ -#endif /* _PPC64_BITOPS_H */ diff --git a/include/asm-ppc64/bootinfo.h b/include/asm-ppc64/bootinfo.h deleted file mode 100644 index f55e7cb48f46..000000000000 --- a/include/asm-ppc64/bootinfo.h +++ /dev/null @@ -1,70 +0,0 @@ -/* - * Non-machine dependent bootinfo structure. Basic idea - * borrowed from the m68k. - * - * Copyright (C) 1999 Cort Dougan <cort@ppc.kernel.org> - * Copyright (c) 2001 PPC64 Team, IBM Corp - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ - - -#ifndef _PPC64_BOOTINFO_H -#define _PPC64_BOOTINFO_H - -#include <asm/types.h> - -/* We use a u32 for the type of the fields since they're written by - * the bootloader which is a 32-bit process and read by the kernel - * which is a 64-bit process. This way they can both agree on the - * size of the type. - */ -typedef u32 bi_rec_field; - -struct bi_record { - bi_rec_field tag; /* tag ID */ - bi_rec_field size; /* size of record (in bytes) */ - bi_rec_field data[0]; /* data */ -}; - -#define BI_FIRST 0x1010 /* first record - marker */ -#define BI_LAST 0x1011 /* last record - marker */ -#define BI_CMD_LINE 0x1012 -#define BI_BOOTLOADER_ID 0x1013 -#define BI_INITRD 0x1014 -#define BI_SYSMAP 0x1015 -#define BI_MACHTYPE 0x1016 - -static __inline__ struct bi_record * bi_rec_init(unsigned long addr) -{ - struct bi_record *bi_recs; - bi_recs = (struct bi_record *)_ALIGN(addr, PAGE_SIZE); - bi_recs->size = 0; - return bi_recs; -} - -static __inline__ struct bi_record * bi_rec_alloc(struct bi_record *rec, - unsigned long args) -{ - rec = (struct bi_record *)((unsigned long)rec + rec->size); - rec->size = sizeof(struct bi_record) + args*sizeof(bi_rec_field); - return rec; -} - -static __inline__ struct bi_record * bi_rec_alloc_bytes(struct bi_record *rec, - unsigned long bytes) -{ - rec = (struct bi_record *)((unsigned long)rec + rec->size); - rec->size = sizeof(struct bi_record) + bytes; - return rec; -} - -static __inline__ struct bi_record * bi_rec_next(struct bi_record *rec) -{ - return (struct bi_record *)((unsigned long)rec + rec->size); -} - -#endif /* _PPC64_BOOTINFO_H */ diff --git a/include/asm-ppc64/cache.h b/include/asm-ppc64/cache.h deleted file mode 100644 index 92140a7efbd1..000000000000 --- a/include/asm-ppc64/cache.h +++ /dev/null @@ -1,36 +0,0 @@ -/* - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ -#ifndef __ARCH_PPC64_CACHE_H -#define __ARCH_PPC64_CACHE_H - -#include <asm/types.h> - -/* bytes per L1 cache line */ -#define L1_CACHE_SHIFT 7 -#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT) - -#define SMP_CACHE_BYTES L1_CACHE_BYTES -#define L1_CACHE_SHIFT_MAX 7 /* largest L1 which this arch supports */ - -#ifndef __ASSEMBLY__ - -struct ppc64_caches { - u32 dsize; /* L1 d-cache size */ - u32 dline_size; /* L1 d-cache line size */ - u32 log_dline_size; - u32 dlines_per_page; - u32 isize; /* L1 i-cache size */ - u32 iline_size; /* L1 i-cache line size */ - u32 log_iline_size; - u32 ilines_per_page; -}; - -extern struct ppc64_caches ppc64_caches; - -#endif - -#endif diff --git a/include/asm-ppc64/cputable.h b/include/asm-ppc64/cputable.h deleted file mode 100644 index acc9b4d6c168..000000000000 --- a/include/asm-ppc64/cputable.h +++ /dev/null @@ -1,167 +0,0 @@ -/* - * include/asm-ppc64/cputable.h - * - * Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org) - * - * Modifications for ppc64: - * Copyright (C) 2003 Dave Engebretsen <engebret@us.ibm.com> - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ - -#ifndef __ASM_PPC_CPUTABLE_H -#define __ASM_PPC_CPUTABLE_H - -#include <linux/config.h> -#include <asm/page.h> /* for ASM_CONST */ - -/* Exposed to userland CPU features - Must match ppc32 definitions */ -#define PPC_FEATURE_32 0x80000000 -#define PPC_FEATURE_64 0x40000000 -#define PPC_FEATURE_601_INSTR 0x20000000 -#define PPC_FEATURE_HAS_ALTIVEC 0x10000000 -#define PPC_FEATURE_HAS_FPU 0x08000000 -#define PPC_FEATURE_HAS_MMU 0x04000000 -#define PPC_FEATURE_HAS_4xxMAC 0x02000000 -#define PPC_FEATURE_UNIFIED_CACHE 0x01000000 - -#ifdef __KERNEL__ - -#ifndef __ASSEMBLY__ - -/* This structure can grow, it's real size is used by head.S code - * via the mkdefs mechanism. - */ -struct cpu_spec; -struct op_ppc64_model; - -typedef void (*cpu_setup_t)(unsigned long offset, struct cpu_spec* spec); - -struct cpu_spec { - /* CPU is matched via (PVR & pvr_mask) == pvr_value */ - unsigned int pvr_mask; - unsigned int pvr_value; - - char *cpu_name; - unsigned long cpu_features; /* Kernel features */ - unsigned int cpu_user_features; /* Userland features */ - - /* cache line sizes */ - unsigned int icache_bsize; - unsigned int dcache_bsize; - - /* number of performance monitor counters */ - unsigned int num_pmcs; - - /* this is called to initialize various CPU bits like L1 cache, - * BHT, SPD, etc... from head.S before branching to identify_machine - */ - cpu_setup_t cpu_setup; - - /* Used by oprofile userspace to select the right counters */ - char *oprofile_cpu_type; - - /* Processor specific oprofile operations */ - struct op_ppc64_model *oprofile_model; -}; - -extern struct cpu_spec cpu_specs[]; -extern struct cpu_spec *cur_cpu_spec; - -static inline unsigned long cpu_has_feature(unsigned long feature) -{ - return cur_cpu_spec->cpu_features & feature; -} - -#endif /* __ASSEMBLY__ */ - -/* CPU kernel features */ - -/* Retain the 32b definitions for the time being - use bottom half of word */ -#define CPU_FTR_SPLIT_ID_CACHE ASM_CONST(0x0000000000000001) -#define CPU_FTR_L2CR ASM_CONST(0x0000000000000002) -#define CPU_FTR_SPEC7450 ASM_CONST(0x0000000000000004) -#define CPU_FTR_ALTIVEC ASM_CONST(0x0000000000000008) -#define CPU_FTR_TAU ASM_CONST(0x0000000000000010) -#define CPU_FTR_CAN_DOZE ASM_CONST(0x0000000000000020) -#define CPU_FTR_USE_TB ASM_CONST(0x0000000000000040) -#define CPU_FTR_604_PERF_MON ASM_CONST(0x0000000000000080) -#define CPU_FTR_601 ASM_CONST(0x0000000000000100) -#define CPU_FTR_HPTE_TABLE ASM_CONST(0x0000000000000200) -#define CPU_FTR_CAN_NAP ASM_CONST(0x0000000000000400) -#define CPU_FTR_L3CR ASM_CONST(0x0000000000000800) -#define CPU_FTR_L3_DISABLE_NAP ASM_CONST(0x0000000000001000) -#define CPU_FTR_NAP_DISABLE_L2_PR ASM_CONST(0x0000000000002000) -#define CPU_FTR_DUAL_PLL_750FX ASM_CONST(0x0000000000004000) - -/* Add the 64b processor unique features in the top half of the word */ -#define CPU_FTR_SLB ASM_CONST(0x0000000100000000) -#define CPU_FTR_16M_PAGE ASM_CONST(0x0000000200000000) -#define CPU_FTR_TLBIEL ASM_CONST(0x0000000400000000) -#define CPU_FTR_NOEXECUTE ASM_CONST(0x0000000800000000) -#define CPU_FTR_NODSISRALIGN ASM_CONST(0x0000001000000000) -#define CPU_FTR_IABR ASM_CONST(0x0000002000000000) -#define CPU_FTR_MMCRA ASM_CONST(0x0000004000000000) -/* unused ASM_CONST(0x0000008000000000) */ -#define CPU_FTR_SMT ASM_CONST(0x0000010000000000) -#define CPU_FTR_COHERENT_ICACHE ASM_CONST(0x0000020000000000) -#define CPU_FTR_LOCKLESS_TLBIE ASM_CONST(0x0000040000000000) -#define CPU_FTR_MMCRA_SIHV ASM_CONST(0x0000080000000000) -#define CPU_FTR_CTRL ASM_CONST(0x0000100000000000) - -#ifndef __ASSEMBLY__ - -#define COMMON_USER_PPC64 (PPC_FEATURE_32 | PPC_FEATURE_64 | \ - PPC_FEATURE_HAS_FPU | PPC_FEATURE_HAS_MMU) - -#define CPU_FTR_PPCAS_ARCH_V2_BASE (CPU_FTR_SLB | \ - CPU_FTR_TLBIEL | CPU_FTR_NOEXECUTE | \ - CPU_FTR_NODSISRALIGN | CPU_FTR_CTRL) - -/* iSeries doesn't support large pages */ -#ifdef CONFIG_PPC_ISERIES -#define CPU_FTR_PPCAS_ARCH_V2 (CPU_FTR_PPCAS_ARCH_V2_BASE) -#else -#define CPU_FTR_PPCAS_ARCH_V2 (CPU_FTR_PPCAS_ARCH_V2_BASE | CPU_FTR_16M_PAGE) -#endif /* CONFIG_PPC_ISERIES */ - -#endif /* __ASSEMBLY */ - -#ifdef __ASSEMBLY__ - -#define BEGIN_FTR_SECTION 98: - -#define END_FTR_SECTION(msk, val) \ -99: \ - .section __ftr_fixup,"a"; \ - .align 3; \ - .llong msk; \ - .llong val; \ - .llong 98b; \ - .llong 99b; \ - .previous - -#else - -#define BEGIN_FTR_SECTION "98:\n" -#define END_FTR_SECTION(msk, val) \ -"99:\n" \ -" .section __ftr_fixup,\"a\";\n" \ -" .align 3;\n" \ -" .llong "#msk";\n" \ -" .llong "#val";\n" \ -" .llong 98b;\n" \ -" .llong 99b;\n" \ -" .previous\n" - -#endif /* __ASSEMBLY__ */ - -#define END_FTR_SECTION_IFSET(msk) END_FTR_SECTION((msk), (msk)) -#define END_FTR_SECTION_IFCLR(msk) END_FTR_SECTION((msk), 0) - -#endif /* __ASM_PPC_CPUTABLE_H */ -#endif /* __KERNEL__ */ - diff --git a/include/asm-ppc64/current.h b/include/asm-ppc64/current.h deleted file mode 100644 index 52ddc60c8b65..000000000000 --- a/include/asm-ppc64/current.h +++ /dev/null @@ -1,16 +0,0 @@ -#ifndef _PPC64_CURRENT_H -#define _PPC64_CURRENT_H - -#include <asm/paca.h> - -/* - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ - -#define get_current() (get_paca()->__current) -#define current get_current() - -#endif /* !(_PPC64_CURRENT_H) */ diff --git a/include/asm-ppc64/dbdma.h b/include/asm-ppc64/dbdma.h deleted file mode 100644 index f2d5d5dc3377..000000000000 --- a/include/asm-ppc64/dbdma.h +++ /dev/null @@ -1,2 +0,0 @@ -#include <asm-ppc/dbdma.h> - diff --git a/include/asm-ppc64/delay.h b/include/asm-ppc64/delay.h deleted file mode 100644 index 05f198cf73d9..000000000000 --- a/include/asm-ppc64/delay.h +++ /dev/null @@ -1,48 +0,0 @@ -#ifndef _PPC64_DELAY_H -#define _PPC64_DELAY_H - -/* - * Copyright 1996, Paul Mackerras. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - * - * PPC64 Support added by Dave Engebretsen, Todd Inglett, Mike Corrigan, - * Anton Blanchard. - */ - -extern unsigned long tb_ticks_per_usec; - -/* define these here to prevent circular dependencies */ -#define __HMT_low() asm volatile("or 1,1,1") -#define __HMT_medium() asm volatile("or 2,2,2") -#define __barrier() asm volatile("":::"memory") - -static inline unsigned long __get_tb(void) -{ - unsigned long rval; - - asm volatile("mftb %0" : "=r" (rval)); - return rval; -} - -static inline void __delay(unsigned long loops) -{ - unsigned long start = __get_tb(); - - while((__get_tb()-start) < loops) - __HMT_low(); - __HMT_medium(); - __barrier(); -} - -static inline void udelay(unsigned long usecs) -{ - unsigned long loops = tb_ticks_per_usec * usecs; - - __delay(loops); -} - -#endif /* _PPC64_DELAY_H */ diff --git a/include/asm-ppc64/dma-mapping.h b/include/asm-ppc64/dma-mapping.h deleted file mode 100644 index 9ad8adee0067..000000000000 --- a/include/asm-ppc64/dma-mapping.h +++ /dev/null @@ -1,136 +0,0 @@ -/* Copyright (C) 2004 IBM - * - * Implements the generic device dma API for ppc64. Handles - * the pci and vio busses - */ - -#ifndef _ASM_DMA_MAPPING_H -#define _ASM_DMA_MAPPING_H - -#include <linux/types.h> -#include <linux/cache.h> -/* need struct page definitions */ -#include <linux/mm.h> -#include <asm/scatterlist.h> -#include <asm/bug.h> - -#define DMA_ERROR_CODE (~(dma_addr_t)0x0) - -extern int dma_supported(struct device *dev, u64 mask); -extern int dma_set_mask(struct device *dev, u64 dma_mask); -extern void *dma_alloc_coherent(struct device *dev, size_t size, - dma_addr_t *dma_handle, unsigned int __nocast flag); -extern void dma_free_coherent(struct device *dev, size_t size, void *cpu_addr, - dma_addr_t dma_handle); -extern dma_addr_t dma_map_single(struct device *dev, void *cpu_addr, - size_t size, enum dma_data_direction direction); -extern void dma_unmap_single(struct device *dev, dma_addr_t dma_addr, - size_t size, enum dma_data_direction direction); -extern dma_addr_t dma_map_page(struct device *dev, struct page *page, - unsigned long offset, size_t size, - enum dma_data_direction direction); -extern void dma_unmap_page(struct device *dev, dma_addr_t dma_address, - size_t size, enum dma_data_direction direction); -extern int dma_map_sg(struct device *dev, struct scatterlist *sg, int nents, - enum dma_data_direction direction); -extern void dma_unmap_sg(struct device *dev, struct scatterlist *sg, - int nhwentries, enum dma_data_direction direction); - -static inline void -dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle, size_t size, - enum dma_data_direction direction) -{ - BUG_ON(direction == DMA_NONE); - /* nothing to do */ -} - -static inline void -dma_sync_single_for_device(struct device *dev, dma_addr_t dma_handle, size_t size, - enum dma_data_direction direction) -{ - BUG_ON(direction == DMA_NONE); - /* nothing to do */ -} - -static inline void -dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, int nelems, - enum dma_data_direction direction) -{ - BUG_ON(direction == DMA_NONE); - /* nothing to do */ -} - -static inline void -dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nelems, - enum dma_data_direction direction) -{ - BUG_ON(direction == DMA_NONE); - /* nothing to do */ -} - -static inline int dma_mapping_error(dma_addr_t dma_addr) -{ - return (dma_addr == DMA_ERROR_CODE); -} - -/* Now for the API extensions over the pci_ one */ - -#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f) -#define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h) -#define dma_is_consistent(d) (1) - -static inline int -dma_get_cache_alignment(void) -{ - /* no easy way to get cache size on all processors, so return - * the maximum possible, to be safe */ - return (1 << L1_CACHE_SHIFT_MAX); -} - -static inline void -dma_sync_single_range_for_cpu(struct device *dev, dma_addr_t dma_handle, - unsigned long offset, size_t size, - enum dma_data_direction direction) -{ - BUG_ON(direction == DMA_NONE); - /* nothing to do */ -} - -static inline void -dma_sync_single_range_for_device(struct device *dev, dma_addr_t dma_handle, - unsigned long offset, size_t size, - enum dma_data_direction direction) -{ - BUG_ON(direction == DMA_NONE); - /* nothing to do */ -} - -static inline void -dma_cache_sync(void *vaddr, size_t size, - enum dma_data_direction direction) -{ - BUG_ON(direction == DMA_NONE); - /* nothing to do */ -} - -/* - * DMA operations are abstracted for G5 vs. i/pSeries, PCI vs. VIO - */ -struct dma_mapping_ops { - void * (*alloc_coherent)(struct device *dev, size_t size, - dma_addr_t *dma_handle, unsigned int __nocast flag); - void (*free_coherent)(struct device *dev, size_t size, - void *vaddr, dma_addr_t dma_handle); - dma_addr_t (*map_single)(struct device *dev, void *ptr, - size_t size, enum dma_data_direction direction); - void (*unmap_single)(struct device *dev, dma_addr_t dma_addr, - size_t size, enum dma_data_direction direction); - int (*map_sg)(struct device *dev, struct scatterlist *sg, - int nents, enum dma_data_direction direction); - void (*unmap_sg)(struct device *dev, struct scatterlist *sg, - int nents, enum dma_data_direction direction); - int (*dma_supported)(struct device *dev, u64 mask); - int (*dac_dma_supported)(struct device *dev, u64 mask); -}; - -#endif /* _ASM_DMA_MAPPING_H */ diff --git a/include/asm-ppc64/dma.h b/include/asm-ppc64/dma.h deleted file mode 100644 index dfd1f69059ba..000000000000 --- a/include/asm-ppc64/dma.h +++ /dev/null @@ -1,329 +0,0 @@ -/* - * linux/include/asm/dma.h: Defines for using and allocating dma channels. - * Written by Hennus Bergman, 1992. - * High DMA channel support & info by Hannu Savolainen - * and John Boyd, Nov. 1992. - * Changes for ppc sound by Christoph Nadig - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ - -#ifndef _ASM_DMA_H -#define _ASM_DMA_H - -#include <linux/config.h> -#include <asm/io.h> -#include <linux/spinlock.h> -#include <asm/system.h> - -#ifndef MAX_DMA_CHANNELS -#define MAX_DMA_CHANNELS 8 -#endif - -/* The maximum address that we can perform a DMA transfer to on this platform */ -/* Doesn't really apply... */ -#define MAX_DMA_ADDRESS (~0UL) - -#if !defined(CONFIG_PPC_ISERIES) || defined(CONFIG_PCI) - -#define dma_outb outb -#define dma_inb inb - -/* - * NOTES about DMA transfers: - * - * controller 1: channels 0-3, byte operations, ports 00-1F - * controller 2: channels 4-7, word operations, ports C0-DF - * - * - ALL registers are 8 bits only, regardless of transfer size - * - channel 4 is not used - cascades 1 into 2. - * - channels 0-3 are byte - addresses/counts are for physical bytes - * - channels 5-7 are word - addresses/counts are for physical words - * - transfers must not cross physical 64K (0-3) or 128K (5-7) boundaries - * - transfer count loaded to registers is 1 less than actual count - * - controller 2 offsets are all even (2x offsets for controller 1) - * - page registers for 5-7 don't use data bit 0, represent 128K pages - * - page registers for 0-3 use bit 0, represent 64K pages - * - * On PReP, DMA transfers are limited to the lower 16MB of _physical_ memory. - * On CHRP, the W83C553F (and VLSI Tollgate?) support full 32 bit addressing. - * Note that addresses loaded into registers must be _physical_ addresses, - * not logical addresses (which may differ if paging is active). - * - * Address mapping for channels 0-3: - * - * A23 ... A16 A15 ... A8 A7 ... A0 (Physical addresses) - * | ... | | ... | | ... | - * | ... | | ... | | ... | - * | ... | | ... | | ... | - * P7 ... P0 A7 ... A0 A7 ... A0 - * | Page | Addr MSB | Addr LSB | (DMA registers) - * - * Address mapping for channels 5-7: - * - * A23 ... A17 A16 A15 ... A9 A8 A7 ... A1 A0 (Physical addresses) - * | ... | \ \ ... \ \ \ ... \ \ - * | ... | \ \ ... \ \ \ ... \ (not used) - * | ... | \ \ ... \ \ \ ... \ - * P7 ... P1 (0) A7 A6 ... A0 A7 A6 ... A0 - * | Page | Addr MSB | Addr LSB | (DMA registers) - * - * Again, channels 5-7 transfer _physical_ words (16 bits), so addresses - * and counts _must_ be word-aligned (the lowest address bit is _ignored_ at - * the hardware level, so odd-byte transfers aren't possible). - * - * Transfer count (_not # bytes_) is limited to 64K, represented as actual - * count - 1 : 64K => 0xFFFF, 1 => 0x0000. Thus, count is always 1 or more, - * and up to 128K bytes may be transferred on channels 5-7 in one operation. - * - */ - -/* 8237 DMA controllers */ -#define IO_DMA1_BASE 0x00 /* 8 bit slave DMA, channels 0..3 */ -#define IO_DMA2_BASE 0xC0 /* 16 bit master DMA, ch 4(=slave input)..7 */ - -/* DMA controller registers */ -#define DMA1_CMD_REG 0x08 /* command register (w) */ -#define DMA1_STAT_REG 0x08 /* status register (r) */ -#define DMA1_REQ_REG 0x09 /* request register (w) */ -#define DMA1_MASK_REG 0x0A /* single-channel mask (w) */ -#define DMA1_MODE_REG 0x0B /* mode register (w) */ -#define DMA1_CLEAR_FF_REG 0x0C /* clear pointer flip-flop (w) */ -#define DMA1_TEMP_REG 0x0D /* Temporary Register (r) */ -#define DMA1_RESET_REG 0x0D /* Master Clear (w) */ -#define DMA1_CLR_MASK_REG 0x0E /* Clear Mask */ -#define DMA1_MASK_ALL_REG 0x0F /* all-channels mask (w) */ - -#define DMA2_CMD_REG 0xD0 /* command register (w) */ -#define DMA2_STAT_REG 0xD0 /* status register (r) */ -#define DMA2_REQ_REG 0xD2 /* request register (w) */ -#define DMA2_MASK_REG 0xD4 /* single-channel mask (w) */ -#define DMA2_MODE_REG 0xD6 /* mode register (w) */ -#define DMA2_CLEAR_FF_REG 0xD8 /* clear pointer flip-flop (w) */ -#define DMA2_TEMP_REG 0xDA /* Temporary Register (r) */ -#define DMA2_RESET_REG 0xDA /* Master Clear (w) */ -#define DMA2_CLR_MASK_REG 0xDC /* Clear Mask */ -#define DMA2_MASK_ALL_REG 0xDE /* all-channels mask (w) */ - -#define DMA_ADDR_0 0x00 /* DMA address registers */ -#define DMA_ADDR_1 0x02 -#define DMA_ADDR_2 0x04 -#define DMA_ADDR_3 0x06 -#define DMA_ADDR_4 0xC0 -#define DMA_ADDR_5 0xC4 -#define DMA_ADDR_6 0xC8 -#define DMA_ADDR_7 0xCC - -#define DMA_CNT_0 0x01 /* DMA count registers */ -#define DMA_CNT_1 0x03 -#define DMA_CNT_2 0x05 -#define DMA_CNT_3 0x07 -#define DMA_CNT_4 0xC2 -#define DMA_CNT_5 0xC6 -#define DMA_CNT_6 0xCA -#define DMA_CNT_7 0xCE - -#define DMA_LO_PAGE_0 0x87 /* DMA page registers */ -#define DMA_LO_PAGE_1 0x83 -#define DMA_LO_PAGE_2 0x81 -#define DMA_LO_PAGE_3 0x82 -#define DMA_LO_PAGE_5 0x8B -#define DMA_LO_PAGE_6 0x89 -#define DMA_LO_PAGE_7 0x8A - -#define DMA_HI_PAGE_0 0x487 /* DMA page registers */ -#define DMA_HI_PAGE_1 0x483 -#define DMA_HI_PAGE_2 0x481 -#define DMA_HI_PAGE_3 0x482 -#define DMA_HI_PAGE_5 0x48B -#define DMA_HI_PAGE_6 0x489 -#define DMA_HI_PAGE_7 0x48A - -#define DMA1_EXT_REG 0x40B -#define DMA2_EXT_REG 0x4D6 - -#define DMA_MODE_READ 0x44 /* I/O to memory, no autoinit, increment, single mode */ -#define DMA_MODE_WRITE 0x48 /* memory to I/O, no autoinit, increment, single mode */ -#define DMA_MODE_CASCADE 0xC0 /* pass thru DREQ->HRQ, DACK<-HLDA only */ - -#define DMA_AUTOINIT 0x10 - -extern spinlock_t dma_spin_lock; - -static __inline__ unsigned long claim_dma_lock(void) -{ - unsigned long flags; - spin_lock_irqsave(&dma_spin_lock, flags); - return flags; -} - -static __inline__ void release_dma_lock(unsigned long flags) -{ - spin_unlock_irqrestore(&dma_spin_lock, flags); -} - -/* enable/disable a specific DMA channel */ -static __inline__ void enable_dma(unsigned int dmanr) -{ - unsigned char ucDmaCmd=0x00; - - if (dmanr != 4) - { - dma_outb(0, DMA2_MASK_REG); /* This may not be enabled */ - dma_outb(ucDmaCmd, DMA2_CMD_REG); /* Enable group */ - } - if (dmanr<=3) - { - dma_outb(dmanr, DMA1_MASK_REG); - dma_outb(ucDmaCmd, DMA1_CMD_REG); /* Enable group */ - } else - { - dma_outb(dmanr & 3, DMA2_MASK_REG); - } -} - -static __inline__ void disable_dma(unsigned int dmanr) -{ - if (dmanr<=3) - dma_outb(dmanr | 4, DMA1_MASK_REG); - else - dma_outb((dmanr & 3) | 4, DMA2_MASK_REG); -} - -/* Clear the 'DMA Pointer Flip Flop'. - * Write 0 for LSB/MSB, 1 for MSB/LSB access. - * Use this once to initialize the FF to a known state. - * After that, keep track of it. :-) - * --- In order to do that, the DMA routines below should --- - * --- only be used while interrupts are disabled! --- - */ -static __inline__ void clear_dma_ff(unsigned int dmanr) -{ - if (dmanr<=3) - dma_outb(0, DMA1_CLEAR_FF_REG); - else - dma_outb(0, DMA2_CLEAR_FF_REG); -} - -/* set mode (above) for a specific DMA channel */ -static __inline__ void set_dma_mode(unsigned int dmanr, char mode) -{ - if (dmanr<=3) - dma_outb(mode | dmanr, DMA1_MODE_REG); - else - dma_outb(mode | (dmanr&3), DMA2_MODE_REG); -} - -/* Set only the page register bits of the transfer address. - * This is used for successive transfers when we know the contents of - * the lower 16 bits of the DMA current address register, but a 64k boundary - * may have been crossed. - */ -static __inline__ void set_dma_page(unsigned int dmanr, int pagenr) -{ - switch(dmanr) { - case 0: - dma_outb(pagenr, DMA_LO_PAGE_0); - dma_outb(pagenr>>8, DMA_HI_PAGE_0); - break; - case 1: - dma_outb(pagenr, DMA_LO_PAGE_1); - dma_outb(pagenr>>8, DMA_HI_PAGE_1); - break; - case 2: - dma_outb(pagenr, DMA_LO_PAGE_2); - dma_outb(pagenr>>8, DMA_HI_PAGE_2); - break; - case 3: - dma_outb(pagenr, DMA_LO_PAGE_3); - dma_outb(pagenr>>8, DMA_HI_PAGE_3); - break; - case 5: - dma_outb(pagenr & 0xfe, DMA_LO_PAGE_5); - dma_outb(pagenr>>8, DMA_HI_PAGE_5); - break; - case 6: - dma_outb(pagenr & 0xfe, DMA_LO_PAGE_6); - dma_outb(pagenr>>8, DMA_HI_PAGE_6); - break; - case 7: - dma_outb(pagenr & 0xfe, DMA_LO_PAGE_7); - dma_outb(pagenr>>8, DMA_HI_PAGE_7); - break; - } -} - - -/* Set transfer address & page bits for specific DMA channel. - * Assumes dma flipflop is clear. - */ -static __inline__ void set_dma_addr(unsigned int dmanr, unsigned int phys) -{ - if (dmanr <= 3) { - dma_outb( phys & 0xff, ((dmanr&3)<<1) + IO_DMA1_BASE ); - dma_outb( (phys>>8) & 0xff, ((dmanr&3)<<1) + IO_DMA1_BASE ); - } else { - dma_outb( (phys>>1) & 0xff, ((dmanr&3)<<2) + IO_DMA2_BASE ); - dma_outb( (phys>>9) & 0xff, ((dmanr&3)<<2) + IO_DMA2_BASE ); - } - set_dma_page(dmanr, phys>>16); -} - - -/* Set transfer size (max 64k for DMA1..3, 128k for DMA5..7) for - * a specific DMA channel. - * You must ensure the parameters are valid. - * NOTE: from a manual: "the number of transfers is one more - * than the initial word count"! This is taken into account. - * Assumes dma flip-flop is clear. - * NOTE 2: "count" represents _bytes_ and must be even for channels 5-7. - */ -static __inline__ void set_dma_count(unsigned int dmanr, unsigned int count) -{ - count--; - if (dmanr <= 3) { - dma_outb( count & 0xff, ((dmanr&3)<<1) + 1 + IO_DMA1_BASE ); - dma_outb( (count>>8) & 0xff, ((dmanr&3)<<1) + 1 + IO_DMA1_BASE ); - } else { - dma_outb( (count>>1) & 0xff, ((dmanr&3)<<2) + 2 + IO_DMA2_BASE ); - dma_outb( (count>>9) & 0xff, ((dmanr&3)<<2) + 2 + IO_DMA2_BASE ); - } -} - - -/* Get DMA residue count. After a DMA transfer, this - * should return zero. Reading this while a DMA transfer is - * still in progress will return unpredictable results. - * If called before the channel has been used, it may return 1. - * Otherwise, it returns the number of _bytes_ left to transfer. - * - * Assumes DMA flip-flop is clear. - */ -static __inline__ int get_dma_residue(unsigned int dmanr) -{ - unsigned int io_port = (dmanr<=3)? ((dmanr&3)<<1) + 1 + IO_DMA1_BASE - : ((dmanr&3)<<2) + 2 + IO_DMA2_BASE; - - /* using short to get 16-bit wrap around */ - unsigned short count; - - count = 1 + dma_inb(io_port); - count += dma_inb(io_port) << 8; - - return (dmanr <= 3)? count : (count<<1); -} - -/* These are in kernel/dma.c: */ -extern int request_dma(unsigned int dmanr, const char * device_id); /* reserve a DMA channel */ -extern void free_dma(unsigned int dmanr); /* release it again */ - -#ifdef CONFIG_PCI -extern int isa_dma_bridge_buggy; -#else -#define isa_dma_bridge_buggy (0) -#endif -#endif /* !defined(CONFIG_PPC_ISERIES) || defined(CONFIG_PCI) */ -#endif /* _ASM_DMA_H */ diff --git a/include/asm-ppc64/hardirq.h b/include/asm-ppc64/hardirq.h deleted file mode 100644 index 4ee72bb1fd48..000000000000 --- a/include/asm-ppc64/hardirq.h +++ /dev/null @@ -1,27 +0,0 @@ -#ifndef __ASM_HARDIRQ_H -#define __ASM_HARDIRQ_H - -/* - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ - -#include <linux/config.h> -#include <linux/cache.h> -#include <linux/preempt.h> - -typedef struct { - unsigned int __softirq_pending; -} ____cacheline_aligned irq_cpustat_t; - -#include <linux/irq_cpustat.h> /* Standard mappings for irq_cpustat_t above */ - -static inline void ack_bad_irq(int irq) -{ - printk(KERN_CRIT "illegal vector %d received!\n", irq); - BUG(); -} - -#endif /* __ASM_HARDIRQ_H */ diff --git a/include/asm-ppc64/iSeries/HvCallHpt.h b/include/asm-ppc64/iSeries/HvCallHpt.h deleted file mode 100644 index 43a1969230b8..000000000000 --- a/include/asm-ppc64/iSeries/HvCallHpt.h +++ /dev/null @@ -1,102 +0,0 @@ -/* - * HvCallHpt.h - * Copyright (C) 2001 Mike Corrigan IBM Corporation - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -#ifndef _HVCALLHPT_H -#define _HVCALLHPT_H - -/* - * This file contains the "hypervisor call" interface which is used to - * drive the hypervisor from the OS. - */ - -#include <asm/iSeries/HvCallSc.h> -#include <asm/iSeries/HvTypes.h> -#include <asm/mmu.h> - -#define HvCallHptGetHptAddress HvCallHpt + 0 -#define HvCallHptGetHptPages HvCallHpt + 1 -#define HvCallHptSetPp HvCallHpt + 5 -#define HvCallHptSetSwBits HvCallHpt + 6 -#define HvCallHptUpdate HvCallHpt + 7 -#define HvCallHptInvalidateNoSyncICache HvCallHpt + 8 -#define HvCallHptGet HvCallHpt + 11 -#define HvCallHptFindNextValid HvCallHpt + 12 -#define HvCallHptFindValid HvCallHpt + 13 -#define HvCallHptAddValidate HvCallHpt + 16 -#define HvCallHptInvalidateSetSwBitsGet HvCallHpt + 18 - - -static inline u64 HvCallHpt_getHptAddress(void) -{ - return HvCall0(HvCallHptGetHptAddress); -} - -static inline u64 HvCallHpt_getHptPages(void) -{ - return HvCall0(HvCallHptGetHptPages); -} - -static inline void HvCallHpt_setPp(u32 hpteIndex, u8 value) -{ - HvCall2(HvCallHptSetPp, hpteIndex, value); -} - -static inline void HvCallHpt_setSwBits(u32 hpteIndex, u8 bitson, u8 bitsoff) -{ - HvCall3(HvCallHptSetSwBits, hpteIndex, bitson, bitsoff); -} - -static inline void HvCallHpt_invalidateNoSyncICache(u32 hpteIndex) -{ - HvCall1(HvCallHptInvalidateNoSyncICache, hpteIndex); -} - -static inline u64 HvCallHpt_invalidateSetSwBitsGet(u32 hpteIndex, u8 bitson, - u8 bitsoff) -{ - u64 compressedStatus; - - compressedStatus = HvCall4(HvCallHptInvalidateSetSwBitsGet, - hpteIndex, bitson, bitsoff, 1); - HvCall1(HvCallHptInvalidateNoSyncICache, hpteIndex); - return compressedStatus; -} - -static inline u64 HvCallHpt_findValid(hpte_t *hpte, u64 vpn) -{ - return HvCall3Ret16(HvCallHptFindValid, hpte, vpn, 0, 0); -} - -static inline u64 HvCallHpt_findNextValid(hpte_t *hpte, u32 hpteIndex, - u8 bitson, u8 bitsoff) -{ - return HvCall3Ret16(HvCallHptFindNextValid, hpte, hpteIndex, - bitson, bitsoff); -} - -static inline void HvCallHpt_get(hpte_t *hpte, u32 hpteIndex) -{ - HvCall2Ret16(HvCallHptGet, hpte, hpteIndex, 0); -} - -static inline void HvCallHpt_addValidate(u32 hpteIndex, u32 hBit, hpte_t *hpte) -{ - HvCall4(HvCallHptAddValidate, hpteIndex, hBit, hpte->v, hpte->r); -} - -#endif /* _HVCALLHPT_H */ diff --git a/include/asm-ppc64/iSeries/HvCallPci.h b/include/asm-ppc64/iSeries/HvCallPci.h deleted file mode 100644 index c8d675c40f5e..000000000000 --- a/include/asm-ppc64/iSeries/HvCallPci.h +++ /dev/null @@ -1,533 +0,0 @@ -/* - * Provides the Hypervisor PCI calls for iSeries Linux Parition. - * Copyright (C) 2001 <Wayne G Holm> <IBM Corporation> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the: - * Free Software Foundation, Inc., - * 59 Temple Place, Suite 330, - * Boston, MA 02111-1307 USA - * - * Change Activity: - * Created, Jan 9, 2001 - */ - -#ifndef _HVCALLPCI_H -#define _HVCALLPCI_H - -#include <asm/iSeries/HvCallSc.h> -#include <asm/iSeries/HvTypes.h> - -/* - * DSA == Direct Select Address - * this struct must be 64 bits in total - */ -struct HvCallPci_DsaAddr { - u16 busNumber; /* PHB index? */ - u8 subBusNumber; /* PCI bus number? */ - u8 deviceId; /* device and function? */ - u8 barNumber; - u8 reserved[3]; -}; - -union HvDsaMap { - u64 DsaAddr; - struct HvCallPci_DsaAddr Dsa; -}; - -struct HvCallPci_LoadReturn { - u64 rc; - u64 value; -}; - -enum HvCallPci_DeviceType { - HvCallPci_NodeDevice = 1, - HvCallPci_SpDevice = 2, - HvCallPci_IopDevice = 3, - HvCallPci_BridgeDevice = 4, - HvCallPci_MultiFunctionDevice = 5, - HvCallPci_IoaDevice = 6 -}; - - -struct HvCallPci_DeviceInfo { - u32 deviceType; /* See DeviceType enum for values */ -}; - -struct HvCallPci_BusUnitInfo { - u32 sizeReturned; /* length of data returned */ - u32 deviceType; /* see DeviceType enum for values */ -}; - -struct HvCallPci_BridgeInfo { - struct HvCallPci_BusUnitInfo busUnitInfo; /* Generic bus unit info */ - u8 subBusNumber; /* Bus number of secondary bus */ - u8 maxAgents; /* Max idsels on secondary bus */ - u8 maxSubBusNumber; /* Max Sub Bus */ - u8 logicalSlotNumber; /* Logical Slot Number for IOA */ -}; - - -/* - * Maximum BusUnitInfo buffer size. Provided for clients so - * they can allocate a buffer big enough for any type of bus - * unit. Increase as needed. - */ -enum {HvCallPci_MaxBusUnitInfoSize = 128}; - -struct HvCallPci_BarParms { - u64 vaddr; - u64 raddr; - u64 size; - u64 protectStart; - u64 protectEnd; - u64 relocationOffset; - u64 pciAddress; - u64 reserved[3]; -}; - -enum HvCallPci_VpdType { - HvCallPci_BusVpd = 1, - HvCallPci_BusAdapterVpd = 2 -}; - -#define HvCallPciConfigLoad8 HvCallPci + 0 -#define HvCallPciConfigLoad16 HvCallPci + 1 -#define HvCallPciConfigLoad32 HvCallPci + 2 -#define HvCallPciConfigStore8 HvCallPci + 3 -#define HvCallPciConfigStore16 HvCallPci + 4 -#define HvCallPciConfigStore32 HvCallPci + 5 -#define HvCallPciEoi HvCallPci + 16 -#define HvCallPciGetBarParms HvCallPci + 18 -#define HvCallPciMaskFisr HvCallPci + 20 -#define HvCallPciUnmaskFisr HvCallPci + 21 -#define HvCallPciSetSlotReset HvCallPci + 25 -#define HvCallPciGetDeviceInfo HvCallPci + 27 -#define HvCallPciGetCardVpd HvCallPci + 28 -#define HvCallPciBarLoad8 HvCallPci + 40 -#define HvCallPciBarLoad16 HvCallPci + 41 -#define HvCallPciBarLoad32 HvCallPci + 42 -#define HvCallPciBarLoad64 HvCallPci + 43 -#define HvCallPciBarStore8 HvCallPci + 44 -#define HvCallPciBarStore16 HvCallPci + 45 -#define HvCallPciBarStore32 HvCallPci + 46 -#define HvCallPciBarStore64 HvCallPci + 47 -#define HvCallPciMaskInterrupts HvCallPci + 48 -#define HvCallPciUnmaskInterrupts HvCallPci + 49 -#define HvCallPciGetBusUnitInfo HvCallPci + 50 - -static inline u64 HvCallPci_configLoad8(u16 busNumber, u8 subBusNumber, - u8 deviceId, u32 offset, u8 *value) -{ - struct HvCallPci_DsaAddr dsa; - struct HvCallPci_LoadReturn retVal; - - *((u64*)&dsa) = 0; - - dsa.busNumber = busNumber; - dsa.subBusNumber = subBusNumber; - dsa.deviceId = deviceId; - - HvCall3Ret16(HvCallPciConfigLoad8, &retVal, *(u64 *)&dsa, offset, 0); - - *value = retVal.value; - - return retVal.rc; -} - -static inline u64 HvCallPci_configLoad16(u16 busNumber, u8 subBusNumber, - u8 deviceId, u32 offset, u16 *value) -{ - struct HvCallPci_DsaAddr dsa; - struct HvCallPci_LoadReturn retVal; - - *((u64*)&dsa) = 0; - - dsa.busNumber = busNumber; - dsa.subBusNumber = subBusNumber; - dsa.deviceId = deviceId; - - HvCall3Ret16(HvCallPciConfigLoad16, &retVal, *(u64 *)&dsa, offset, 0); - - *value = retVal.value; - - return retVal.rc; -} - -static inline u64 HvCallPci_configLoad32(u16 busNumber, u8 subBusNumber, - u8 deviceId, u32 offset, u32 *value) -{ - struct HvCallPci_DsaAddr dsa; - struct HvCallPci_LoadReturn retVal; - - *((u64*)&dsa) = 0; - - dsa.busNumber = busNumber; - dsa.subBusNumber = subBusNumber; - dsa.deviceId = deviceId; - - HvCall3Ret16(HvCallPciConfigLoad32, &retVal, *(u64 *)&dsa, offset, 0); - - *value = retVal.value; - - return retVal.rc; -} - -static inline u64 HvCallPci_configStore8(u16 busNumber, u8 subBusNumber, - u8 deviceId, u32 offset, u8 value) -{ - struct HvCallPci_DsaAddr dsa; - - *((u64*)&dsa) = 0; - - dsa.busNumber = busNumber; - dsa.subBusNumber = subBusNumber; - dsa.deviceId = deviceId; - - return HvCall4(HvCallPciConfigStore8, *(u64 *)&dsa, offset, value, 0); -} - -static inline u64 HvCallPci_configStore16(u16 busNumber, u8 subBusNumber, - u8 deviceId, u32 offset, u16 value) -{ - struct HvCallPci_DsaAddr dsa; - - *((u64*)&dsa) = 0; - - dsa.busNumber = busNumber; - dsa.subBusNumber = subBusNumber; - dsa.deviceId = deviceId; - - return HvCall4(HvCallPciConfigStore16, *(u64 *)&dsa, offset, value, 0); -} - -static inline u64 HvCallPci_configStore32(u16 busNumber, u8 subBusNumber, - u8 deviceId, u32 offset, u32 value) -{ - struct HvCallPci_DsaAddr dsa; - - *((u64*)&dsa) = 0; - - dsa.busNumber = busNumber; - dsa.subBusNumber = subBusNumber; - dsa.deviceId = deviceId; - - return HvCall4(HvCallPciConfigStore32, *(u64 *)&dsa, offset, value, 0); -} - -static inline u64 HvCallPci_barLoad8(u16 busNumberParm, u8 subBusParm, - u8 deviceIdParm, u8 barNumberParm, u64 offsetParm, - u8 *valueParm) -{ - struct HvCallPci_DsaAddr dsa; - struct HvCallPci_LoadReturn retVal; - - *((u64*)&dsa) = 0; - - dsa.busNumber = busNumberParm; - dsa.subBusNumber = subBusParm; - dsa.deviceId = deviceIdParm; - dsa.barNumber = barNumberParm; - - HvCall3Ret16(HvCallPciBarLoad8, &retVal, *(u64 *)&dsa, offsetParm, 0); - - *valueParm = retVal.value; - - return retVal.rc; -} - -static inline u64 HvCallPci_barLoad16(u16 busNumberParm, u8 subBusParm, - u8 deviceIdParm, u8 barNumberParm, u64 offsetParm, - u16 *valueParm) -{ - struct HvCallPci_DsaAddr dsa; - struct HvCallPci_LoadReturn retVal; - - *((u64*)&dsa) = 0; - - dsa.busNumber = busNumberParm; - dsa.subBusNumber = subBusParm; - dsa.deviceId = deviceIdParm; - dsa.barNumber = barNumberParm; - - HvCall3Ret16(HvCallPciBarLoad16, &retVal, *(u64 *)&dsa, offsetParm, 0); - - *valueParm = retVal.value; - - return retVal.rc; -} - -static inline u64 HvCallPci_barLoad32(u16 busNumberParm, u8 subBusParm, - u8 deviceIdParm, u8 barNumberParm, u64 offsetParm, - u32 *valueParm) -{ - struct HvCallPci_DsaAddr dsa; - struct HvCallPci_LoadReturn retVal; - - *((u64*)&dsa) = 0; - - dsa.busNumber = busNumberParm; - dsa.subBusNumber = subBusParm; - dsa.deviceId = deviceIdParm; - dsa.barNumber = barNumberParm; - - HvCall3Ret16(HvCallPciBarLoad32, &retVal, *(u64 *)&dsa, offsetParm, 0); - - *valueParm = retVal.value; - - return retVal.rc; -} - -static inline u64 HvCallPci_barLoad64(u16 busNumberParm, u8 subBusParm, - u8 deviceIdParm, u8 barNumberParm, u64 offsetParm, - u64 *valueParm) -{ - struct HvCallPci_DsaAddr dsa; - struct HvCallPci_LoadReturn retVal; - - *((u64*)&dsa) = 0; - - dsa.busNumber = busNumberParm; - dsa.subBusNumber = subBusParm; - dsa.deviceId = deviceIdParm; - dsa.barNumber = barNumberParm; - - HvCall3Ret16(HvCallPciBarLoad64, &retVal, *(u64 *)&dsa, offsetParm, 0); - - *valueParm = retVal.value; - - return retVal.rc; -} - -static inline u64 HvCallPci_barStore8(u16 busNumberParm, u8 subBusParm, - u8 deviceIdParm, u8 barNumberParm, u64 offsetParm, - u8 valueParm) -{ - struct HvCallPci_DsaAddr dsa; - - *((u64*)&dsa) = 0; - - dsa.busNumber = busNumberParm; - dsa.subBusNumber = subBusParm; - dsa.deviceId = deviceIdParm; - dsa.barNumber = barNumberParm; - - return HvCall4(HvCallPciBarStore8, *(u64 *)&dsa, offsetParm, - valueParm, 0); -} - -static inline u64 HvCallPci_barStore16(u16 busNumberParm, u8 subBusParm, - u8 deviceIdParm, u8 barNumberParm, u64 offsetParm, - u16 valueParm) -{ - struct HvCallPci_DsaAddr dsa; - - *((u64*)&dsa) = 0; - - dsa.busNumber = busNumberParm; - dsa.subBusNumber = subBusParm; - dsa.deviceId = deviceIdParm; - dsa.barNumber = barNumberParm; - - return HvCall4(HvCallPciBarStore16, *(u64 *)&dsa, offsetParm, - valueParm, 0); -} - -static inline u64 HvCallPci_barStore32(u16 busNumberParm, u8 subBusParm, - u8 deviceIdParm, u8 barNumberParm, u64 offsetParm, - u32 valueParm) -{ - struct HvCallPci_DsaAddr dsa; - - *((u64*)&dsa) = 0; - - dsa.busNumber = busNumberParm; - dsa.subBusNumber = subBusParm; - dsa.deviceId = deviceIdParm; - dsa.barNumber = barNumberParm; - - return HvCall4(HvCallPciBarStore32, *(u64 *)&dsa, offsetParm, - valueParm, 0); -} - -static inline u64 HvCallPci_barStore64(u16 busNumberParm, u8 subBusParm, - u8 deviceIdParm, u8 barNumberParm, u64 offsetParm, - u64 valueParm) -{ - struct HvCallPci_DsaAddr dsa; - - *((u64*)&dsa) = 0; - - dsa.busNumber = busNumberParm; - dsa.subBusNumber = subBusParm; - dsa.deviceId = deviceIdParm; - dsa.barNumber = barNumberParm; - - return HvCall4(HvCallPciBarStore64, *(u64 *)&dsa, offsetParm, - valueParm, 0); -} - -static inline u64 HvCallPci_eoi(u16 busNumberParm, u8 subBusParm, - u8 deviceIdParm) -{ - struct HvCallPci_DsaAddr dsa; - struct HvCallPci_LoadReturn retVal; - - *((u64*)&dsa) = 0; - - dsa.busNumber = busNumberParm; - dsa.subBusNumber = subBusParm; - dsa.deviceId = deviceIdParm; - - HvCall1Ret16(HvCallPciEoi, &retVal, *(u64*)&dsa); - - return retVal.rc; -} - -static inline u64 HvCallPci_getBarParms(u16 busNumberParm, u8 subBusParm, - u8 deviceIdParm, u8 barNumberParm, u64 parms, u32 sizeofParms) -{ - struct HvCallPci_DsaAddr dsa; - - *((u64*)&dsa) = 0; - - dsa.busNumber = busNumberParm; - dsa.subBusNumber = subBusParm; - dsa.deviceId = deviceIdParm; - dsa.barNumber = barNumberParm; - - return HvCall3(HvCallPciGetBarParms, *(u64*)&dsa, parms, sizeofParms); -} - -static inline u64 HvCallPci_maskFisr(u16 busNumberParm, u8 subBusParm, - u8 deviceIdParm, u64 fisrMask) -{ - struct HvCallPci_DsaAddr dsa; - - *((u64*)&dsa) = 0; - - dsa.busNumber = busNumberParm; - dsa.subBusNumber = subBusParm; - dsa.deviceId = deviceIdParm; - - return HvCall2(HvCallPciMaskFisr, *(u64*)&dsa, fisrMask); -} - -static inline u64 HvCallPci_unmaskFisr(u16 busNumberParm, u8 subBusParm, - u8 deviceIdParm, u64 fisrMask) -{ - struct HvCallPci_DsaAddr dsa; - - *((u64*)&dsa) = 0; - - dsa.busNumber = busNumberParm; - dsa.subBusNumber = subBusParm; - dsa.deviceId = deviceIdParm; - - return HvCall2(HvCallPciUnmaskFisr, *(u64*)&dsa, fisrMask); -} - -static inline u64 HvCallPci_setSlotReset(u16 busNumberParm, u8 subBusParm, - u8 deviceIdParm, u64 onNotOff) -{ - struct HvCallPci_DsaAddr dsa; - - *((u64*)&dsa) = 0; - - dsa.busNumber = busNumberParm; - dsa.subBusNumber = subBusParm; - dsa.deviceId = deviceIdParm; - - return HvCall2(HvCallPciSetSlotReset, *(u64*)&dsa, onNotOff); -} - -static inline u64 HvCallPci_getDeviceInfo(u16 busNumberParm, u8 subBusParm, - u8 deviceNumberParm, u64 parms, u32 sizeofParms) -{ - struct HvCallPci_DsaAddr dsa; - - *((u64*)&dsa) = 0; - - dsa.busNumber = busNumberParm; - dsa.subBusNumber = subBusParm; - dsa.deviceId = deviceNumberParm << 4; - - return HvCall3(HvCallPciGetDeviceInfo, *(u64*)&dsa, parms, sizeofParms); -} - -static inline u64 HvCallPci_maskInterrupts(u16 busNumberParm, u8 subBusParm, - u8 deviceIdParm, u64 interruptMask) -{ - struct HvCallPci_DsaAddr dsa; - - *((u64*)&dsa) = 0; - - dsa.busNumber = busNumberParm; - dsa.subBusNumber = subBusParm; - dsa.deviceId = deviceIdParm; - - return HvCall2(HvCallPciMaskInterrupts, *(u64*)&dsa, interruptMask); -} - -static inline u64 HvCallPci_unmaskInterrupts(u16 busNumberParm, u8 subBusParm, - u8 deviceIdParm, u64 interruptMask) -{ - struct HvCallPci_DsaAddr dsa; - - *((u64*)&dsa) = 0; - - dsa.busNumber = busNumberParm; - dsa.subBusNumber = subBusParm; - dsa.deviceId = deviceIdParm; - - return HvCall2(HvCallPciUnmaskInterrupts, *(u64*)&dsa, interruptMask); -} - -static inline u64 HvCallPci_getBusUnitInfo(u16 busNumberParm, u8 subBusParm, - u8 deviceIdParm, u64 parms, u32 sizeofParms) -{ - struct HvCallPci_DsaAddr dsa; - - *((u64*)&dsa) = 0; - - dsa.busNumber = busNumberParm; - dsa.subBusNumber = subBusParm; - dsa.deviceId = deviceIdParm; - - return HvCall3(HvCallPciGetBusUnitInfo, *(u64*)&dsa, parms, - sizeofParms); -} - -static inline int HvCallPci_getBusVpd(u16 busNumParm, u64 destParm, - u16 sizeParm) -{ - u64 xRc = HvCall4(HvCallPciGetCardVpd, busNumParm, destParm, - sizeParm, HvCallPci_BusVpd); - if (xRc == -1) - return -1; - else - return xRc & 0xFFFF; -} - -static inline int HvCallPci_getBusAdapterVpd(u16 busNumParm, u64 destParm, - u16 sizeParm) -{ - u64 xRc = HvCall4(HvCallPciGetCardVpd, busNumParm, destParm, - sizeParm, HvCallPci_BusAdapterVpd); - if (xRc == -1) - return -1; - else - return xRc & 0xFFFF; -} - -#endif /* _HVCALLPCI_H */ diff --git a/include/asm-ppc64/iSeries/HvReleaseData.h b/include/asm-ppc64/iSeries/HvReleaseData.h deleted file mode 100644 index c8162e5ccb21..000000000000 --- a/include/asm-ppc64/iSeries/HvReleaseData.h +++ /dev/null @@ -1,64 +0,0 @@ -/* - * HvReleaseData.h - * Copyright (C) 2001 Mike Corrigan IBM Corporation - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -#ifndef _HVRELEASEDATA_H -#define _HVRELEASEDATA_H - -/* - * This control block contains the critical information about the - * release so that it can be changed in the future (ie, the virtual - * address of the OS's NACA). - */ -#include <asm/types.h> -#include <asm/naca.h> - -/* - * When we IPL a secondary partition, we will check if if the - * secondary xMinPlicVrmIndex > the primary xVrmIndex. - * If it is then this tells PLIC that this secondary is not - * supported running on this "old" of a level of PLIC. - * - * Likewise, we will compare the primary xMinSlicVrmIndex to - * the secondary xVrmIndex. - * If the primary xMinSlicVrmDelta > secondary xVrmDelta then we - * know that this PLIC does not support running an OS "that old". - */ - -#define HVREL_TAGSINACTIVE 0x8000 -#define HVREL_32BIT 0x4000 -#define HVREL_NOSHAREDPROCS 0x2000 -#define HVREL_NOHMT 0x1000 - -struct HvReleaseData { - u32 xDesc; /* Descriptor "HvRD" ebcdic x00-x03 */ - u16 xSize; /* Size of this control block x04-x05 */ - u16 xVpdAreasPtrOffset; /* Offset in NACA of ItVpdAreas x06-x07 */ - struct naca_struct *xSlicNacaAddr; /* Virt addr of SLIC NACA x08-x0F */ - u32 xMsNucDataOffset; /* Offset of Linux Mapping Data x10-x13 */ - u32 xRsvd1; /* Reserved x14-x17 */ - u16 xFlags; - u16 xVrmIndex; /* VRM Index of OS image x1A-x1B */ - u16 xMinSupportedPlicVrmIndex; /* Min PLIC level (soft) x1C-x1D */ - u16 xMinCompatablePlicVrmIndex; /* Min PLIC levelP (hard) x1E-x1F */ - char xVrmName[12]; /* Displayable name x20-x2B */ - char xRsvd3[20]; /* Reserved x2C-x3F */ -}; - -extern struct HvReleaseData hvReleaseData; - -#endif /* _HVRELEASEDATA_H */ diff --git a/include/asm-ppc64/iSeries/IoHriMainStore.h b/include/asm-ppc64/iSeries/IoHriMainStore.h deleted file mode 100644 index 45ed3ea67d06..000000000000 --- a/include/asm-ppc64/iSeries/IoHriMainStore.h +++ /dev/null @@ -1,166 +0,0 @@ -/* - * IoHriMainStore.h - * Copyright (C) 2001 Mike Corrigan IBM Corporation - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ - -#ifndef _IOHRIMAINSTORE_H -#define _IOHRIMAINSTORE_H - -/* Main Store Vpd for Condor,iStar,sStar */ -struct IoHriMainStoreSegment4 { - u8 msArea0Exists:1; - u8 msArea1Exists:1; - u8 msArea2Exists:1; - u8 msArea3Exists:1; - u8 reserved1:4; - u8 reserved2; - - u8 msArea0Functional:1; - u8 msArea1Functional:1; - u8 msArea2Functional:1; - u8 msArea3Functional:1; - u8 reserved3:4; - u8 reserved4; - - u32 totalMainStore; - - u64 msArea0Ptr; - u64 msArea1Ptr; - u64 msArea2Ptr; - u64 msArea3Ptr; - - u32 cardProductionLevel; - - u32 msAdrHole; - - u8 msArea0HasRiserVpd:1; - u8 msArea1HasRiserVpd:1; - u8 msArea2HasRiserVpd:1; - u8 msArea3HasRiserVpd:1; - u8 reserved5:4; - u8 reserved6; - u16 reserved7; - - u8 reserved8[28]; - - u64 nonInterleavedBlocksStartAdr; - u64 nonInterleavedBlocksEndAdr; -}; - -/* Main Store VPD for Power4 */ -struct IoHriMainStoreChipInfo1 { - u32 chipMfgID __attribute((packed)); - char chipECLevel[4] __attribute((packed)); -}; - -struct IoHriMainStoreVpdIdData { - char typeNumber[4]; - char modelNumber[4]; - char partNumber[12]; - char serialNumber[12]; -}; - -struct IoHriMainStoreVpdFruData { - char fruLabel[8] __attribute((packed)); - u8 numberOfSlots __attribute((packed)); - u8 pluggingType __attribute((packed)); - u16 slotMapIndex __attribute((packed)); -}; - -struct IoHriMainStoreAdrRangeBlock { - void *blockStart __attribute((packed)); - void *blockEnd __attribute((packed)); - u32 blockProcChipId __attribute((packed)); -}; - -#define MaxAreaAdrRangeBlocks 4 - -struct IoHriMainStoreArea4 { - u32 msVpdFormat __attribute((packed)); - u8 containedVpdType __attribute((packed)); - u8 reserved1 __attribute((packed)); - u16 reserved2 __attribute((packed)); - - u64 msExists __attribute((packed)); - u64 msFunctional __attribute((packed)); - - u32 memorySize __attribute((packed)); - u32 procNodeId __attribute((packed)); - - u32 numAdrRangeBlocks __attribute((packed)); - struct IoHriMainStoreAdrRangeBlock xAdrRangeBlock[MaxAreaAdrRangeBlocks] __attribute((packed)); - - struct IoHriMainStoreChipInfo1 chipInfo0 __attribute((packed)); - struct IoHriMainStoreChipInfo1 chipInfo1 __attribute((packed)); - struct IoHriMainStoreChipInfo1 chipInfo2 __attribute((packed)); - struct IoHriMainStoreChipInfo1 chipInfo3 __attribute((packed)); - struct IoHriMainStoreChipInfo1 chipInfo4 __attribute((packed)); - struct IoHriMainStoreChipInfo1 chipInfo5 __attribute((packed)); - struct IoHriMainStoreChipInfo1 chipInfo6 __attribute((packed)); - struct IoHriMainStoreChipInfo1 chipInfo7 __attribute((packed)); - - void *msRamAreaArray __attribute((packed)); - u32 msRamAreaArrayNumEntries __attribute((packed)); - u32 msRamAreaArrayEntrySize __attribute((packed)); - - u32 numaDimmExists __attribute((packed)); - u32 numaDimmFunctional __attribute((packed)); - void *numaDimmArray __attribute((packed)); - u32 numaDimmArrayNumEntries __attribute((packed)); - u32 numaDimmArrayEntrySize __attribute((packed)); - - struct IoHriMainStoreVpdIdData idData __attribute((packed)); - - u64 powerData __attribute((packed)); - u64 cardAssemblyPartNum __attribute((packed)); - u64 chipSerialNum __attribute((packed)); - - u64 reserved3 __attribute((packed)); - char reserved4[16] __attribute((packed)); - - struct IoHriMainStoreVpdFruData fruData __attribute((packed)); - - u8 vpdPortNum __attribute((packed)); - u8 reserved5 __attribute((packed)); - u8 frameId __attribute((packed)); - u8 rackUnit __attribute((packed)); - char asciiKeywordVpd[256] __attribute((packed)); - u32 reserved6 __attribute((packed)); -}; - - -struct IoHriMainStoreSegment5 { - u16 reserved1; - u8 reserved2; - u8 msVpdFormat; - - u32 totalMainStore; - u64 maxConfiguredMsAdr; - - struct IoHriMainStoreArea4 *msAreaArray; - u32 msAreaArrayNumEntries; - u32 msAreaArrayEntrySize; - - u32 msAreaExists; - u32 msAreaFunctional; - - u64 reserved3; -}; - -extern u64 xMsVpd[]; - -#endif /* _IOHRIMAINSTORE_H */ diff --git a/include/asm-ppc64/iSeries/IoHriProcessorVpd.h b/include/asm-ppc64/iSeries/IoHriProcessorVpd.h deleted file mode 100644 index 73b73d80b8b1..000000000000 --- a/include/asm-ppc64/iSeries/IoHriProcessorVpd.h +++ /dev/null @@ -1,86 +0,0 @@ -/* - * IoHriProcessorVpd.h - * Copyright (C) 2001 Mike Corrigan IBM Corporation - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -#ifndef _IOHRIPROCESSORVPD_H -#define _IOHRIPROCESSORVPD_H - -#include <asm/types.h> - -/* - * This struct maps Processor Vpd that is DMAd to SLIC by CSP - */ -struct IoHriProcessorVpd { - u8 xFormat; // VPD format indicator x00-x00 - u8 xProcStatus:8; // Processor State x01-x01 - u8 xSecondaryThreadCount; // Secondary thread cnt x02-x02 - u8 xSrcType:1; // Src Type x03-x03 - u8 xSrcSoft:1; // Src stay soft ... - u8 xSrcParable:1; // Src parable ... - u8 xRsvd1:5; // Reserved ... - u16 xHvPhysicalProcIndex; // Hypervisor physical proc index04-x05 - u16 xRsvd2; // Reserved x06-x07 - u32 xHwNodeId; // Hardware node id x08-x0B - u32 xHwProcId; // Hardware processor id x0C-x0F - - u32 xTypeNum; // Card Type/CCIN number x10-x13 - u32 xModelNum; // Model/Feature number x14-x17 - u64 xSerialNum; // Serial number x18-x1F - char xPartNum[12]; // Book Part or FPU number x20-x2B - char xMfgID[4]; // Manufacturing ID x2C-x2F - - u32 xProcFreq; // Processor Frequency x30-x33 - u32 xTimeBaseFreq; // Time Base Frequency x34-x37 - - u32 xChipEcLevel; // Chip EC Levels x38-x3B - u32 xProcIdReg; // PIR SPR value x3C-x3F - u32 xPVR; // PVR value x40-x43 - u8 xRsvd3[12]; // Reserved x44-x4F - - u32 xInstCacheSize; // Instruction cache size in KB x50-x53 - u32 xInstBlockSize; // Instruction cache block size x54-x57 - u32 xDataCacheOperandSize; // Data cache operand size x58-x5B - u32 xInstCacheOperandSize; // Inst cache operand size x5C-x5F - - u32 xDataL1CacheSizeKB; // L1 data cache size in KB x60-x63 - u32 xDataL1CacheLineSize; // L1 data cache block size x64-x67 - u64 xRsvd4; // Reserved x68-x6F - - u32 xDataL2CacheSizeKB; // L2 data cache size in KB x70-x73 - u32 xDataL2CacheLineSize; // L2 data cache block size x74-x77 - u64 xRsvd5; // Reserved x78-x7F - - u32 xDataL3CacheSizeKB; // L3 data cache size in KB x80-x83 - u32 xDataL3CacheLineSize; // L3 data cache block size x84-x87 - u64 xRsvd6; // Reserved x88-x8F - - u64 xFruLabel; // Card Location Label x90-x97 - u8 xSlotsOnCard; // Slots on card (0=no slots) x98-x98 - u8 xPartLocFlag; // Location flag (0-pluggable 1-imbedded) x99-x99 - u16 xSlotMapIndex; // Index in slot map table x9A-x9B - u8 xSmartCardPortNo; // Smart card port number x9C-x9C - u8 xRsvd7; // Reserved x9D-x9D - u16 xFrameIdAndRackUnit; // Frame ID and rack unit adr x9E-x9F - - u8 xRsvd8[24]; // Reserved xA0-xB7 - - char xProcSrc[72]; // CSP format SRC xB8-xFF -}; - -extern struct IoHriProcessorVpd xIoHriProcessorVpd[]; - -#endif /* _IOHRIPROCESSORVPD_H */ diff --git a/include/asm-ppc64/iSeries/ItIplParmsReal.h b/include/asm-ppc64/iSeries/ItIplParmsReal.h deleted file mode 100644 index ae3417dc599e..000000000000 --- a/include/asm-ppc64/iSeries/ItIplParmsReal.h +++ /dev/null @@ -1,71 +0,0 @@ -/* - * ItIplParmsReal.h - * Copyright (C) 2001 Mike Corrigan IBM Corporation - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -#ifndef _ITIPLPARMSREAL_H -#define _ITIPLPARMSREAL_H - -/* - * This struct maps the IPL Parameters DMA'd from the SP. - * - * Warning: - * This data must map in exactly 64 bytes and match the architecture for - * the IPL parms - */ - -#include <asm/types.h> - -struct ItIplParmsReal { - u8 xFormat; // Defines format of IplParms x00-x00 - u8 xRsvd01:6; // Reserved x01-x01 - u8 xAlternateSearch:1; // Alternate search indicator ... - u8 xUaSupplied:1; // UA Supplied on programmed IPL... - u8 xLsUaFormat; // Format byte for UA x02-x02 - u8 xRsvd02; // Reserved x03-x03 - u32 xLsUa; // LS UA x04-x07 - u32 xUnusedLsLid; // First OS LID to load x08-x0B - u16 xLsBusNumber; // LS Bus Number x0C-x0D - u8 xLsCardAdr; // LS Card Address x0E-x0E - u8 xLsBoardAdr; // LS Board Address x0F-x0F - u32 xRsvd03; // Reserved x10-x13 - u8 xSpcnPresent:1; // SPCN present x14-x14 - u8 xCpmPresent:1; // CPM present ... - u8 xRsvd04:6; // Reserved ... - u8 xRsvd05:4; // Reserved x15-x15 - u8 xKeyLock:4; // Keylock setting ... - u8 xRsvd06:6; // Reserved x16-x16 - u8 xIplMode:2; // Ipl mode (A|B|C|D) ... - u8 xHwIplType; // Fast v slow v slow EC HW IPL x17-x17 - u16 xCpmEnabledIpl:1; // CPM in effect when IPL initiatedx18-x19 - u16 xPowerOnResetIpl:1; // Indicate POR condition ... - u16 xMainStorePreserved:1; // Main Storage is preserved ... - u16 xRsvd07:13; // Reserved ... - u16 xIplSource:16; // Ipl source x1A-x1B - u8 xIplReason:8; // Reason for this IPL x1C-x1C - u8 xRsvd08; // Reserved x1D-x1D - u16 xRsvd09; // Reserved x1E-x1F - u16 xSysBoxType; // System Box Type x20-x21 - u16 xSysProcType; // System Processor Type x22-x23 - u32 xRsvd10; // Reserved x24-x27 - u64 xRsvd11; // Reserved x28-x2F - u64 xRsvd12; // Reserved x30-x37 - u64 xRsvd13; // Reserved x38-x3F -}; - -extern struct ItIplParmsReal xItIplParmsReal; - -#endif /* _ITIPLPARMSREAL_H */ diff --git a/include/asm-ppc64/iSeries/ItVpdAreas.h b/include/asm-ppc64/iSeries/ItVpdAreas.h deleted file mode 100644 index 71b3ad24f95a..000000000000 --- a/include/asm-ppc64/iSeries/ItVpdAreas.h +++ /dev/null @@ -1,89 +0,0 @@ -/* - * ItVpdAreas.h - * Copyright (C) 2001 Mike Corrigan IBM Corporation - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -#ifndef _ITVPDAREAS_H -#define _ITVPDAREAS_H - -/* - * This file defines the address and length of all of the VPD area passed to - * the OS from PLIC (most of which start from the SP). - */ - -#include <asm/types.h> - -/* VPD Entry index is carved in stone - cannot be changed (easily). */ -#define ItVpdCecVpd 0 -#define ItVpdDynamicSpace 1 -#define ItVpdExtVpd 2 -#define ItVpdExtVpdOnPanel 3 -#define ItVpdFirstPaca 4 -#define ItVpdIoVpd 5 -#define ItVpdIplParms 6 -#define ItVpdMsVpd 7 -#define ItVpdPanelVpd 8 -#define ItVpdLpNaca 9 -#define ItVpdBackplaneAndMaybeClockCardVpd 10 -#define ItVpdRecoveryLogBuffer 11 -#define ItVpdSpCommArea 12 -#define ItVpdSpLogBuffer 13 -#define ItVpdSpLogBufferSave 14 -#define ItVpdSpCardVpd 15 -#define ItVpdFirstProcVpd 16 -#define ItVpdApModelVpd 17 -#define ItVpdClockCardVpd 18 -#define ItVpdBusExtCardVpd 19 -#define ItVpdProcCapacityVpd 20 -#define ItVpdInteractiveCapacityVpd 21 -#define ItVpdFirstSlotLabel 22 -#define ItVpdFirstLpQueue 23 -#define ItVpdFirstL3CacheVpd 24 -#define ItVpdFirstProcFruVpd 25 - -#define ItVpdMaxEntries 26 - -#define ItDmaMaxEntries 10 - -#define ItVpdAreasMaxSlotLabels 192 - - -struct ItVpdAreas { - u32 xSlicDesc; // Descriptor 000-003 - u16 xSlicSize; // Size of this control block 004-005 - u16 xPlicAdjustVpdLens:1; // Flag to indicate new interface006-007 - u16 xRsvd1:15; // Reserved bits ... - u16 xSlicVpdEntries; // Number of VPD entries 008-009 - u16 xSlicDmaEntries; // Number of DMA entries 00A-00B - u16 xSlicMaxLogicalProcs; // Maximum logical processors 00C-00D - u16 xSlicMaxPhysicalProcs; // Maximum physical processors 00E-00F - u16 xSlicDmaToksOffset; // Offset into this of array 010-011 - u16 xSlicVpdAdrsOffset; // Offset into this of array 012-013 - u16 xSlicDmaLensOffset; // Offset into this of array 014-015 - u16 xSlicVpdLensOffset; // Offset into this of array 016-017 - u16 xSlicMaxSlotLabels; // Maximum number of slot labels018-019 - u16 xSlicMaxLpQueues; // Maximum number of LP Queues 01A-01B - u8 xRsvd2[4]; // Reserved 01C-01F - u64 xRsvd3[12]; // Reserved 020-07F - u32 xPlicDmaLens[ItDmaMaxEntries];// Array of DMA lengths 080-0A7 - u32 xPlicDmaToks[ItDmaMaxEntries];// Array of DMA tokens 0A8-0CF - u32 xSlicVpdLens[ItVpdMaxEntries];// Array of VPD lengths 0D0-12F - void *xSlicVpdAdrs[ItVpdMaxEntries];// Array of VPD buffers 130-1EF -}; - -extern struct ItVpdAreas itVpdAreas; - -#endif /* _ITVPDAREAS_H */ diff --git a/include/asm-ppc64/iSeries/iSeries_irq.h b/include/asm-ppc64/iSeries/iSeries_irq.h deleted file mode 100644 index 6c9767ac1302..000000000000 --- a/include/asm-ppc64/iSeries/iSeries_irq.h +++ /dev/null @@ -1,8 +0,0 @@ -#ifndef __ISERIES_IRQ_H__ -#define __ISERIES_IRQ_H__ - -extern void iSeries_init_IRQ(void); -extern int iSeries_allocate_IRQ(HvBusNumber, HvSubBusNumber, HvAgentId); -extern void iSeries_activate_IRQs(void); - -#endif /* __ISERIES_IRQ_H__ */ diff --git a/include/asm-ppc64/iSeries/iSeries_pci.h b/include/asm-ppc64/iSeries/iSeries_pci.h deleted file mode 100644 index 575f611f8b33..000000000000 --- a/include/asm-ppc64/iSeries/iSeries_pci.h +++ /dev/null @@ -1,88 +0,0 @@ -#ifndef _ISERIES_64_PCI_H -#define _ISERIES_64_PCI_H - -/* - * File iSeries_pci.h created by Allan Trautman on Tue Feb 20, 2001. - * - * Define some useful macros for the iSeries pci routines. - * Copyright (C) 2001 Allan H Trautman, IBM Corporation - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the: - * Free Software Foundation, Inc., - * 59 Temple Place, Suite 330, - * Boston, MA 02111-1307 USA - * - * Change Activity: - * Created Feb 20, 2001 - * Added device reset, March 22, 2001 - * Ported to ppc64, May 25, 2001 - * End Change Activity - */ - -#include <asm/iSeries/HvCallPci.h> -#include <asm/abs_addr.h> - -struct pci_dev; /* For Forward Reference */ -struct iSeries_Device_Node; - -/* - * Gets iSeries Bus, SubBus, DevFn using iSeries_Device_Node structure - */ - -#define ISERIES_BUS(DevPtr) DevPtr->DsaAddr.Dsa.busNumber -#define ISERIES_SUBBUS(DevPtr) DevPtr->DsaAddr.Dsa.subBusNumber -#define ISERIES_DEVICE(DevPtr) DevPtr->DsaAddr.Dsa.deviceId -#define ISERIES_DSA(DevPtr) DevPtr->DsaAddr.DsaAddr -#define ISERIES_DEVNODE(PciDev) ((struct iSeries_Device_Node *)PciDev->sysdata) - -#define EADsMaxAgents 7 - -/* - * Decodes Linux DevFn to iSeries DevFn, bridge device, or function. - * For Linux, see PCI_SLOT and PCI_FUNC in include/linux/pci.h - */ - -#define ISERIES_PCI_AGENTID(idsel, func) \ - (((idsel & 0x0F) << 4) | (func & 0x07)) -#define ISERIES_ENCODE_DEVICE(agentid) \ - ((0x10) | ((agentid & 0x20) >> 2) | (agentid & 0x07)) - -#define ISERIES_GET_DEVICE_FROM_SUBBUS(subbus) ((subbus >> 5) & 0x7) -#define ISERIES_GET_FUNCTION_FROM_SUBBUS(subbus) ((subbus >> 2) & 0x7) - -/* - * Converts Virtual Address to Real Address for Hypervisor calls - */ -#define ISERIES_HV_ADDR(virtaddr) \ - (0x8000000000000000 | virt_to_abs(virtaddr)) - -/* - * iSeries Device Information - */ -struct iSeries_Device_Node { - struct list_head Device_List; - struct pci_dev *PciDev; - union HvDsaMap DsaAddr; /* Direct Select Address */ - /* busNumber, subBusNumber, */ - /* deviceId, barNumber */ - int DevFn; /* Linux devfn */ - int Irq; /* Assigned IRQ */ - int Flags; /* Possible flags(disable/bist)*/ - u8 LogicalSlot; /* Hv Slot Index for Tces */ - struct iommu_table *iommu_table;/* Device TCE Table */ -}; - -extern void iSeries_Device_Information(struct pci_dev*, int); - -#endif /* _ISERIES_64_PCI_H */ diff --git a/include/asm-ppc64/ide.h b/include/asm-ppc64/ide.h deleted file mode 100644 index 0aae1c590c0e..000000000000 --- a/include/asm-ppc64/ide.h +++ /dev/null @@ -1,30 +0,0 @@ -/* - * linux/include/asm-ppc/ide.h - * - * Copyright (C) 1994-1996 Linus Torvalds & authors - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ - -/* - * This file contains the ppc64 architecture specific IDE code. - */ - -#ifndef __ASMPPC64_IDE_H -#define __ASMPPC64_IDE_H - -#ifdef __KERNEL__ - -#ifndef MAX_HWIFS -# define MAX_HWIFS 10 -#endif - -#define IDE_ARCH_OBSOLETE_INIT -#define ide_default_io_ctl(base) ((base) + 0x206) /* obsolete */ - -#endif /* __KERNEL__ */ - -#endif /* __ASMPPC64_IDE_H */ diff --git a/include/asm-ppc64/imalloc.h b/include/asm-ppc64/imalloc.h deleted file mode 100644 index 42adf7033a81..000000000000 --- a/include/asm-ppc64/imalloc.h +++ /dev/null @@ -1,26 +0,0 @@ -#ifndef _PPC64_IMALLOC_H -#define _PPC64_IMALLOC_H - -/* - * Define the address range of the imalloc VM area. - */ -#define PHBS_IO_BASE VMALLOC_END -#define IMALLOC_BASE (PHBS_IO_BASE + 0x80000000ul) /* Reserve 2 gigs for PHBs */ -#define IMALLOC_END (VMALLOC_START + PGTABLE_RANGE) - - -/* imalloc region types */ -#define IM_REGION_UNUSED 0x1 -#define IM_REGION_SUBSET 0x2 -#define IM_REGION_EXISTS 0x4 -#define IM_REGION_OVERLAP 0x8 -#define IM_REGION_SUPERSET 0x10 - -extern struct vm_struct * im_get_free_area(unsigned long size); -extern struct vm_struct * im_get_area(unsigned long v_addr, unsigned long size, - int region_type); -extern void im_free(void *addr); - -extern unsigned long ioremap_bot; - -#endif /* _PPC64_IMALLOC_H */ diff --git a/include/asm-ppc64/ipcbuf.h b/include/asm-ppc64/ipcbuf.h deleted file mode 100644 index fa393c8342af..000000000000 --- a/include/asm-ppc64/ipcbuf.h +++ /dev/null @@ -1,28 +0,0 @@ -#ifndef __PPC64_IPCBUF_H__ -#define __PPC64_IPCBUF_H__ - -/* - * The ipc64_perm structure for the PPC is identical to kern_ipc_perm - * as we have always had 32-bit UIDs and GIDs in the kernel. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ - -struct ipc64_perm -{ - __kernel_key_t key; - __kernel_uid_t uid; - __kernel_gid_t gid; - __kernel_uid_t cuid; - __kernel_gid_t cgid; - __kernel_mode_t mode; - unsigned int seq; - unsigned int __pad1; - unsigned long __unused1; - unsigned long __unused2; -}; - -#endif /* __PPC64_IPCBUF_H__ */ diff --git a/include/asm-ppc64/irq.h b/include/asm-ppc64/irq.h deleted file mode 100644 index 99782afb4cde..000000000000 --- a/include/asm-ppc64/irq.h +++ /dev/null @@ -1,120 +0,0 @@ -#ifdef __KERNEL__ -#ifndef _ASM_IRQ_H -#define _ASM_IRQ_H - -/* - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ - -#include <linux/config.h> -#include <linux/threads.h> - -/* - * Maximum number of interrupt sources that we can handle. - */ -#define NR_IRQS 512 - -/* this number is used when no interrupt has been assigned */ -#define NO_IRQ (-1) - -/* - * These constants are used for passing information about interrupt - * signal polarity and level/edge sensing to the low-level PIC chip - * drivers. - */ -#define IRQ_SENSE_MASK 0x1 -#define IRQ_SENSE_LEVEL 0x1 /* interrupt on active level */ -#define IRQ_SENSE_EDGE 0x0 /* interrupt triggered by edge */ - -#define IRQ_POLARITY_MASK 0x2 -#define IRQ_POLARITY_POSITIVE 0x2 /* high level or low->high edge */ -#define IRQ_POLARITY_NEGATIVE 0x0 /* low level or high->low edge */ - -/* - * IRQ line status macro IRQ_PER_CPU is used - */ -#define ARCH_HAS_IRQ_PER_CPU - -#define get_irq_desc(irq) (&irq_desc[(irq)]) - -/* Define a way to iterate across irqs. */ -#define for_each_irq(i) \ - for ((i) = 0; (i) < NR_IRQS; ++(i)) - -/* Interrupt numbers are virtual in case they are sparsely - * distributed by the hardware. - */ -extern unsigned int virt_irq_to_real_map[NR_IRQS]; - -/* Create a mapping for a real_irq if it doesn't already exist. - * Return the virtual irq as a convenience. - */ -int virt_irq_create_mapping(unsigned int real_irq); -void virt_irq_init(void); - -static inline unsigned int virt_irq_to_real(unsigned int virt_irq) -{ - return virt_irq_to_real_map[virt_irq]; -} - -extern unsigned int real_irq_to_virt_slowpath(unsigned int real_irq); - -/* - * Because many systems have two overlapping names spaces for - * interrupts (ISA and XICS for example), and the ISA interrupts - * have historically not been easy to renumber, we allow ISA - * interrupts to take values 0 - 15, and shift up the remaining - * interrupts by 0x10. - */ -#define NUM_ISA_INTERRUPTS 0x10 -extern int __irq_offset_value; - -static inline int irq_offset_up(int irq) -{ - return(irq + __irq_offset_value); -} - -static inline int irq_offset_down(int irq) -{ - return(irq - __irq_offset_value); -} - -static inline int irq_offset_value(void) -{ - return __irq_offset_value; -} - -static __inline__ int irq_canonicalize(int irq) -{ - return irq; -} - -extern int distribute_irqs; - -struct irqaction; -struct pt_regs; - -#ifdef CONFIG_IRQSTACKS -/* - * Per-cpu stacks for handling hard and soft interrupts. - */ -extern struct thread_info *hardirq_ctx[NR_CPUS]; -extern struct thread_info *softirq_ctx[NR_CPUS]; - -extern void irq_ctx_init(void); -extern void call_do_softirq(struct thread_info *tp); -extern int call_handle_IRQ_event(int irq, struct pt_regs *regs, - struct irqaction *action, struct thread_info *tp); - -#define __ARCH_HAS_DO_SOFTIRQ - -#else -#define irq_ctx_init() - -#endif /* CONFIG_IRQSTACKS */ - -#endif /* _ASM_IRQ_H */ -#endif /* __KERNEL__ */ diff --git a/include/asm-ppc64/kexec.h b/include/asm-ppc64/kexec.h deleted file mode 100644 index 511908afaeeb..000000000000 --- a/include/asm-ppc64/kexec.h +++ /dev/null @@ -1,41 +0,0 @@ -#ifndef _PPC64_KEXEC_H -#define _PPC64_KEXEC_H - -/* - * KEXEC_SOURCE_MEMORY_LIMIT maximum page get_free_page can return. - * I.e. Maximum page that is mapped directly into kernel memory, - * and kmap is not required. - */ - -/* Maximum physical address we can use pages from */ -/* XXX: since we copy virt we can use any page we allocate */ -#define KEXEC_SOURCE_MEMORY_LIMIT (-1UL) - -/* Maximum address we can reach in physical address mode */ -/* XXX: I want to allow initrd in highmem. otherwise set to rmo on lpar */ -#define KEXEC_DESTINATION_MEMORY_LIMIT (-1UL) - -/* Maximum address we can use for the control code buffer */ -/* XXX: unused today, ppc32 uses TASK_SIZE, probably left over from use_mm */ -#define KEXEC_CONTROL_MEMORY_LIMIT (-1UL) - -/* XXX: today we don't use this at all, althogh we have a static stack */ -#define KEXEC_CONTROL_CODE_SIZE 4096 - -/* The native architecture */ -#define KEXEC_ARCH KEXEC_ARCH_PPC64 - -#define MAX_NOTE_BYTES 1024 - -#ifndef __ASSEMBLY__ - -typedef u32 note_buf_t[MAX_NOTE_BYTES/4]; - -extern note_buf_t crash_notes[]; - -extern void kexec_smp_wait(void); /* get and clear naca physid, wait for - master to copy new code to 0 */ - -#endif /* __ASSEMBLY__ */ -#endif /* _PPC_KEXEC_H */ - diff --git a/include/asm-ppc64/keylargo.h b/include/asm-ppc64/keylargo.h deleted file mode 100644 index 4d78e3d0314c..000000000000 --- a/include/asm-ppc64/keylargo.h +++ /dev/null @@ -1,2 +0,0 @@ -#include <asm-ppc/keylargo.h> - diff --git a/include/asm-ppc64/kmap_types.h b/include/asm-ppc64/kmap_types.h deleted file mode 100644 index fd1574648223..000000000000 --- a/include/asm-ppc64/kmap_types.h +++ /dev/null @@ -1,23 +0,0 @@ -#ifdef __KERNEL__ -#ifndef _ASM_KMAP_TYPES_H -#define _ASM_KMAP_TYPES_H - -enum km_type { - KM_BOUNCE_READ, - KM_SKB_SUNRPC_DATA, - KM_SKB_DATA_SOFTIRQ, - KM_USER0, - KM_USER1, - KM_BIO_SRC_IRQ, - KM_BIO_DST_IRQ, - KM_PTE0, - KM_PTE1, - KM_IRQ0, - KM_IRQ1, - KM_SOFTIRQ0, - KM_SOFTIRQ1, - KM_TYPE_NR -}; - -#endif -#endif /* __KERNEL__ */ diff --git a/include/asm-ppc64/macio.h b/include/asm-ppc64/macio.h deleted file mode 100644 index a3028b364f70..000000000000 --- a/include/asm-ppc64/macio.h +++ /dev/null @@ -1,2 +0,0 @@ -#include <asm-ppc/macio.h> - diff --git a/include/asm-ppc64/memory.h b/include/asm-ppc64/memory.h deleted file mode 100644 index af53ffb55726..000000000000 --- a/include/asm-ppc64/memory.h +++ /dev/null @@ -1,61 +0,0 @@ -#ifndef _ASM_PPC64_MEMORY_H_ -#define _ASM_PPC64_MEMORY_H_ - -/* - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ - -#include <linux/config.h> - -/* - * Arguably the bitops and *xchg operations don't imply any memory barrier - * or SMP ordering, but in fact a lot of drivers expect them to imply - * both, since they do on x86 cpus. - */ -#ifdef CONFIG_SMP -#define EIEIO_ON_SMP "eieio\n" -#define ISYNC_ON_SMP "\n\tisync" -#define SYNC_ON_SMP "lwsync\n\t" -#else -#define EIEIO_ON_SMP -#define ISYNC_ON_SMP -#define SYNC_ON_SMP -#endif - -static inline void eieio(void) -{ - __asm__ __volatile__ ("eieio" : : : "memory"); -} - -static inline void isync(void) -{ - __asm__ __volatile__ ("isync" : : : "memory"); -} - -#ifdef CONFIG_SMP -#define eieio_on_smp() eieio() -#define isync_on_smp() isync() -#else -#define eieio_on_smp() __asm__ __volatile__("": : :"memory") -#define isync_on_smp() __asm__ __volatile__("": : :"memory") -#endif - -/* Macros for adjusting thread priority (hardware multi-threading) */ -#define HMT_very_low() asm volatile("or 31,31,31 # very low priority") -#define HMT_low() asm volatile("or 1,1,1 # low priority") -#define HMT_medium_low() asm volatile("or 6,6,6 # medium low priority") -#define HMT_medium() asm volatile("or 2,2,2 # medium priority") -#define HMT_medium_high() asm volatile("or 5,5,5 # medium high priority") -#define HMT_high() asm volatile("or 3,3,3 # high priority") - -#define HMT_VERY_LOW "\tor 31,31,31 # very low priority\n" -#define HMT_LOW "\tor 1,1,1 # low priority\n" -#define HMT_MEDIUM_LOW "\tor 6,6,6 # medium low priority\n" -#define HMT_MEDIUM "\tor 2,2,2 # medium priority\n" -#define HMT_MEDIUM_HIGH "\tor 5,5,5 # medium high priority\n" -#define HMT_HIGH "\tor 3,3,3 # high priority\n" - -#endif diff --git a/include/asm-ppc64/mmzone.h b/include/asm-ppc64/mmzone.h deleted file mode 100644 index ed473f4b0152..000000000000 --- a/include/asm-ppc64/mmzone.h +++ /dev/null @@ -1,108 +0,0 @@ -/* - * Written by Kanoj Sarcar (kanoj@sgi.com) Aug 99 - * - * PowerPC64 port: - * Copyright (C) 2002 Anton Blanchard, IBM Corp. - */ -#ifndef _ASM_MMZONE_H_ -#define _ASM_MMZONE_H_ - -#include <linux/config.h> -#include <asm/smp.h> - -/* generic non-linear memory support: - * - * 1) we will not split memory into more chunks than will fit into the - * flags field of the struct page - */ - - -#ifdef CONFIG_NEED_MULTIPLE_NODES - -extern struct pglist_data *node_data[]; -/* - * Return a pointer to the node data for node n. - */ -#define NODE_DATA(nid) (node_data[nid]) - -/* - * Following are specific to this numa platform. - */ - -extern int numa_cpu_lookup_table[]; -extern char *numa_memory_lookup_table; -extern cpumask_t numa_cpumask_lookup_table[]; -extern int nr_cpus_in_node[]; - -/* 16MB regions */ -#define MEMORY_INCREMENT_SHIFT 24 -#define MEMORY_INCREMENT (1UL << MEMORY_INCREMENT_SHIFT) - -/* NUMA debugging, will not work on a DLPAR machine */ -#undef DEBUG_NUMA - -static inline int pa_to_nid(unsigned long pa) -{ - int nid; - - nid = numa_memory_lookup_table[pa >> MEMORY_INCREMENT_SHIFT]; - -#ifdef DEBUG_NUMA - /* the physical address passed in is not in the map for the system */ - if (nid == -1) { - printk("bad address: %lx\n", pa); - BUG(); - } -#endif - - return nid; -} - -#define node_localnr(pfn, nid) ((pfn) - NODE_DATA(nid)->node_start_pfn) - -/* - * Following are macros that each numa implmentation must define. - */ - -#define node_start_pfn(nid) (NODE_DATA(nid)->node_start_pfn) -#define node_end_pfn(nid) (NODE_DATA(nid)->node_end_pfn) - -#define local_mapnr(kvaddr) \ - ( (__pa(kvaddr) >> PAGE_SHIFT) - node_start_pfn(kvaddr_to_nid(kvaddr)) - -#ifdef CONFIG_DISCONTIGMEM - -/* - * Given a kernel address, find the home node of the underlying memory. - */ -#define kvaddr_to_nid(kaddr) pa_to_nid(__pa(kaddr)) - -#define pfn_to_nid(pfn) pa_to_nid((unsigned long)(pfn) << PAGE_SHIFT) - -/* Written this way to avoid evaluating arguments twice */ -#define discontigmem_pfn_to_page(pfn) \ -({ \ - unsigned long __tmp = pfn; \ - (NODE_DATA(pfn_to_nid(__tmp))->node_mem_map + \ - node_localnr(__tmp, pfn_to_nid(__tmp))); \ -}) - -#define discontigmem_page_to_pfn(p) \ -({ \ - struct page *__tmp = p; \ - (((__tmp) - page_zone(__tmp)->zone_mem_map) + \ - page_zone(__tmp)->zone_start_pfn); \ -}) - -/* XXX fix for discontiguous physical memory */ -#define discontigmem_pfn_valid(pfn) ((pfn) < num_physpages) - -#endif /* CONFIG_DISCONTIGMEM */ - -#endif /* CONFIG_NEED_MULTIPLE_NODES */ - -#ifdef CONFIG_HAVE_ARCH_EARLY_PFN_TO_NID -#define early_pfn_to_nid(pfn) pa_to_nid(((unsigned long)pfn) << PAGE_SHIFT) -#endif - -#endif /* _ASM_MMZONE_H_ */ diff --git a/include/asm-ppc64/naca.h b/include/asm-ppc64/naca.h deleted file mode 100644 index d2afe6447597..000000000000 --- a/include/asm-ppc64/naca.h +++ /dev/null @@ -1,24 +0,0 @@ -#ifndef _NACA_H -#define _NACA_H - -/* - * c 2001 PPC 64 Team, IBM Corp - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ - -#include <asm/types.h> - -struct naca_struct { - /* Kernel only data - undefined for user space */ - void *xItVpdAreas; /* VPD Data 0x00 */ - void *xRamDisk; /* iSeries ramdisk 0x08 */ - u64 xRamDiskSize; /* In pages 0x10 */ -}; - -extern struct naca_struct naca; - -#endif /* _NACA_H */ diff --git a/include/asm-ppc64/numnodes.h b/include/asm-ppc64/numnodes.h deleted file mode 100644 index 75ae0b906708..000000000000 --- a/include/asm-ppc64/numnodes.h +++ /dev/null @@ -1,7 +0,0 @@ -#ifndef _ASM_MAX_NUMNODES_H -#define _ASM_MAX_NUMNODES_H - -/* Max 16 Nodes */ -#define NODES_SHIFT 4 - -#endif /* _ASM_MAX_NUMNODES_H */ diff --git a/include/asm-ppc64/of_device.h b/include/asm-ppc64/of_device.h deleted file mode 100644 index 7bc136e22590..000000000000 --- a/include/asm-ppc64/of_device.h +++ /dev/null @@ -1,2 +0,0 @@ -#include <asm-ppc/of_device.h> - diff --git a/include/asm-ppc64/page.h b/include/asm-ppc64/page.h deleted file mode 100644 index a15422bcf30d..000000000000 --- a/include/asm-ppc64/page.h +++ /dev/null @@ -1,262 +0,0 @@ -#ifndef _PPC64_PAGE_H -#define _PPC64_PAGE_H - -/* - * Copyright (C) 2001 PPC64 Team, IBM Corp - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ - -#include <linux/config.h> - -#ifdef __ASSEMBLY__ - #define ASM_CONST(x) x -#else - #define __ASM_CONST(x) x##UL - #define ASM_CONST(x) __ASM_CONST(x) -#endif - -/* PAGE_SHIFT determines the page size */ -#define PAGE_SHIFT 12 -#define PAGE_SIZE (ASM_CONST(1) << PAGE_SHIFT) -#define PAGE_MASK (~(PAGE_SIZE-1)) - -#define SID_SHIFT 28 -#define SID_MASK 0xfffffffffUL -#define ESID_MASK 0xfffffffff0000000UL -#define GET_ESID(x) (((x) >> SID_SHIFT) & SID_MASK) - -#define HPAGE_SHIFT 24 -#define HPAGE_SIZE ((1UL) << HPAGE_SHIFT) -#define HPAGE_MASK (~(HPAGE_SIZE - 1)) - -#ifdef CONFIG_HUGETLB_PAGE - -#define HUGETLB_PAGE_ORDER (HPAGE_SHIFT - PAGE_SHIFT) - -#define HTLB_AREA_SHIFT 40 -#define HTLB_AREA_SIZE (1UL << HTLB_AREA_SHIFT) -#define GET_HTLB_AREA(x) ((x) >> HTLB_AREA_SHIFT) - -#define LOW_ESID_MASK(addr, len) (((1U << (GET_ESID(addr+len-1)+1)) \ - - (1U << GET_ESID(addr))) & 0xffff) -#define HTLB_AREA_MASK(addr, len) (((1U << (GET_HTLB_AREA(addr+len-1)+1)) \ - - (1U << GET_HTLB_AREA(addr))) & 0xffff) - -#define ARCH_HAS_HUGEPAGE_ONLY_RANGE -#define ARCH_HAS_PREPARE_HUGEPAGE_RANGE -#define ARCH_HAS_SETCLEAR_HUGE_PTE - -#define touches_hugepage_low_range(mm, addr, len) \ - (LOW_ESID_MASK((addr), (len)) & (mm)->context.low_htlb_areas) -#define touches_hugepage_high_range(mm, addr, len) \ - (HTLB_AREA_MASK((addr), (len)) & (mm)->context.high_htlb_areas) - -#define __within_hugepage_low_range(addr, len, segmask) \ - ((LOW_ESID_MASK((addr), (len)) | (segmask)) == (segmask)) -#define within_hugepage_low_range(addr, len) \ - __within_hugepage_low_range((addr), (len), \ - current->mm->context.low_htlb_areas) -#define __within_hugepage_high_range(addr, len, zonemask) \ - ((HTLB_AREA_MASK((addr), (len)) | (zonemask)) == (zonemask)) -#define within_hugepage_high_range(addr, len) \ - __within_hugepage_high_range((addr), (len), \ - current->mm->context.high_htlb_areas) - -#define is_hugepage_only_range(mm, addr, len) \ - (touches_hugepage_high_range((mm), (addr), (len)) || \ - touches_hugepage_low_range((mm), (addr), (len))) -#define HAVE_ARCH_HUGETLB_UNMAPPED_AREA - -#define in_hugepage_area(context, addr) \ - (cpu_has_feature(CPU_FTR_16M_PAGE) && \ - ( ((1 << GET_HTLB_AREA(addr)) & (context).high_htlb_areas) || \ - ( ((addr) < 0x100000000L) && \ - ((1 << GET_ESID(addr)) & (context).low_htlb_areas) ) ) ) - -#else /* !CONFIG_HUGETLB_PAGE */ - -#define in_hugepage_area(mm, addr) 0 - -#endif /* !CONFIG_HUGETLB_PAGE */ - -/* align addr on a size boundary - adjust address up/down if needed */ -#define _ALIGN_UP(addr,size) (((addr)+((size)-1))&(~((size)-1))) -#define _ALIGN_DOWN(addr,size) ((addr)&(~((size)-1))) - -/* align addr on a size boundary - adjust address up if needed */ -#define _ALIGN(addr,size) _ALIGN_UP(addr,size) - -/* to align the pointer to the (next) page boundary */ -#define PAGE_ALIGN(addr) _ALIGN(addr, PAGE_SIZE) - -#ifdef __KERNEL__ -#ifndef __ASSEMBLY__ -#include <asm/cache.h> - -#undef STRICT_MM_TYPECHECKS - -#define REGION_SIZE 4UL -#define REGION_SHIFT 60UL -#define REGION_MASK (((1UL<<REGION_SIZE)-1UL)<<REGION_SHIFT) - -static __inline__ void clear_page(void *addr) -{ - unsigned long lines, line_size; - - line_size = ppc64_caches.dline_size; - lines = ppc64_caches.dlines_per_page; - - __asm__ __volatile__( - "mtctr %1 # clear_page\n\ -1: dcbz 0,%0\n\ - add %0,%0,%3\n\ - bdnz+ 1b" - : "=r" (addr) - : "r" (lines), "0" (addr), "r" (line_size) - : "ctr", "memory"); -} - -extern void copy_page(void *to, void *from); -struct page; -extern void clear_user_page(void *page, unsigned long vaddr, struct page *pg); -extern void copy_user_page(void *to, void *from, unsigned long vaddr, struct page *p); - -#ifdef STRICT_MM_TYPECHECKS -/* - * These are used to make use of C type-checking. - * Entries in the pte table are 64b, while entries in the pgd & pmd are 32b. - */ -typedef struct { unsigned long pte; } pte_t; -typedef struct { unsigned long pmd; } pmd_t; -typedef struct { unsigned long pud; } pud_t; -typedef struct { unsigned long pgd; } pgd_t; -typedef struct { unsigned long pgprot; } pgprot_t; - -#define pte_val(x) ((x).pte) -#define pmd_val(x) ((x).pmd) -#define pud_val(x) ((x).pud) -#define pgd_val(x) ((x).pgd) -#define pgprot_val(x) ((x).pgprot) - -#define __pte(x) ((pte_t) { (x) }) -#define __pmd(x) ((pmd_t) { (x) }) -#define __pud(x) ((pud_t) { (x) }) -#define __pgd(x) ((pgd_t) { (x) }) -#define __pgprot(x) ((pgprot_t) { (x) }) - -#else -/* - * .. while these make it easier on the compiler - */ -typedef unsigned long pte_t; -typedef unsigned long pmd_t; -typedef unsigned long pud_t; -typedef unsigned long pgd_t; -typedef unsigned long pgprot_t; - -#define pte_val(x) (x) -#define pmd_val(x) (x) -#define pud_val(x) (x) -#define pgd_val(x) (x) -#define pgprot_val(x) (x) - -#define __pte(x) (x) -#define __pmd(x) (x) -#define __pud(x) (x) -#define __pgd(x) (x) -#define __pgprot(x) (x) - -#endif - -#define __pa(x) ((unsigned long)(x)-PAGE_OFFSET) - -extern int page_is_ram(unsigned long pfn); - -extern u64 ppc64_pft_size; /* Log 2 of page table size */ - -/* We do define AT_SYSINFO_EHDR but don't use the gate mecanism */ -#define __HAVE_ARCH_GATE_AREA 1 - -#endif /* __ASSEMBLY__ */ - -#ifdef MODULE -#define __page_aligned __attribute__((__aligned__(PAGE_SIZE))) -#else -#define __page_aligned \ - __attribute__((__aligned__(PAGE_SIZE), \ - __section__(".data.page_aligned"))) -#endif - - -/* This must match the -Ttext linker address */ -/* Note: tophys & tovirt make assumptions about how */ -/* KERNELBASE is defined for performance reasons. */ -/* When KERNELBASE moves, those macros may have */ -/* to change! */ -#define PAGE_OFFSET ASM_CONST(0xC000000000000000) -#define KERNELBASE PAGE_OFFSET -#define VMALLOCBASE ASM_CONST(0xD000000000000000) - -#define VMALLOC_REGION_ID (VMALLOCBASE >> REGION_SHIFT) -#define KERNEL_REGION_ID (KERNELBASE >> REGION_SHIFT) -#define USER_REGION_ID (0UL) -#define REGION_ID(ea) (((unsigned long)(ea)) >> REGION_SHIFT) - -#define __va(x) ((void *)((unsigned long)(x) + KERNELBASE)) - -#ifdef CONFIG_DISCONTIGMEM -#define page_to_pfn(page) discontigmem_page_to_pfn(page) -#define pfn_to_page(pfn) discontigmem_pfn_to_page(pfn) -#define pfn_valid(pfn) discontigmem_pfn_valid(pfn) -#endif -#ifdef CONFIG_FLATMEM -#define pfn_to_page(pfn) (mem_map + (pfn)) -#define page_to_pfn(page) ((unsigned long)((page) - mem_map)) -#define pfn_valid(pfn) ((pfn) < max_mapnr) -#endif - -#define virt_to_page(kaddr) pfn_to_page(__pa(kaddr) >> PAGE_SHIFT) -#define pfn_to_kaddr(pfn) __va((pfn) << PAGE_SHIFT) - -#define virt_addr_valid(kaddr) pfn_valid(__pa(kaddr) >> PAGE_SHIFT) - -/* - * Unfortunately the PLT is in the BSS in the PPC32 ELF ABI, - * and needs to be executable. This means the whole heap ends - * up being executable. - */ -#define VM_DATA_DEFAULT_FLAGS32 (VM_READ | VM_WRITE | VM_EXEC | \ - VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC) - -#define VM_DATA_DEFAULT_FLAGS64 (VM_READ | VM_WRITE | \ - VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC) - -#define VM_DATA_DEFAULT_FLAGS \ - (test_thread_flag(TIF_32BIT) ? \ - VM_DATA_DEFAULT_FLAGS32 : VM_DATA_DEFAULT_FLAGS64) - -/* - * This is the default if a program doesn't have a PT_GNU_STACK - * program header entry. The PPC64 ELF ABI has a non executable stack - * stack by default, so in the absense of a PT_GNU_STACK program header - * we turn execute permission off. - */ -#define VM_STACK_DEFAULT_FLAGS32 (VM_READ | VM_WRITE | VM_EXEC | \ - VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC) - -#define VM_STACK_DEFAULT_FLAGS64 (VM_READ | VM_WRITE | \ - VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC) - -#define VM_STACK_DEFAULT_FLAGS \ - (test_thread_flag(TIF_32BIT) ? \ - VM_STACK_DEFAULT_FLAGS32 : VM_STACK_DEFAULT_FLAGS64) - -#endif /* __KERNEL__ */ - -#include <asm-generic/page.h> - -#endif /* _PPC64_PAGE_H */ diff --git a/include/asm-ppc64/plpar_wrappers.h b/include/asm-ppc64/plpar_wrappers.h deleted file mode 100644 index 72dd2449ee76..000000000000 --- a/include/asm-ppc64/plpar_wrappers.h +++ /dev/null @@ -1,120 +0,0 @@ -#ifndef _PPC64_PLPAR_WRAPPERS_H -#define _PPC64_PLPAR_WRAPPERS_H - -#include <asm/hvcall.h> - -static inline long poll_pending(void) -{ - unsigned long dummy; - return plpar_hcall(H_POLL_PENDING, 0, 0, 0, 0, - &dummy, &dummy, &dummy); -} - -static inline long prod_processor(void) -{ - plpar_hcall_norets(H_PROD); - return(0); -} - -static inline long cede_processor(void) -{ - plpar_hcall_norets(H_CEDE); - return(0); -} - -static inline long register_vpa(unsigned long flags, unsigned long proc, - unsigned long vpa) -{ - return plpar_hcall_norets(H_REGISTER_VPA, flags, proc, vpa); -} - -void vpa_init(int cpu); - -static inline long plpar_pte_remove(unsigned long flags, - unsigned long ptex, - unsigned long avpn, - unsigned long *old_pteh_ret, - unsigned long *old_ptel_ret) -{ - unsigned long dummy; - return plpar_hcall(H_REMOVE, flags, ptex, avpn, 0, - old_pteh_ret, old_ptel_ret, &dummy); -} - -static inline long plpar_pte_read(unsigned long flags, - unsigned long ptex, - unsigned long *old_pteh_ret, unsigned long *old_ptel_ret) -{ - unsigned long dummy; - return plpar_hcall(H_READ, flags, ptex, 0, 0, - old_pteh_ret, old_ptel_ret, &dummy); -} - -static inline long plpar_pte_protect(unsigned long flags, - unsigned long ptex, - unsigned long avpn) -{ - return plpar_hcall_norets(H_PROTECT, flags, ptex, avpn); -} - -static inline long plpar_tce_get(unsigned long liobn, - unsigned long ioba, - unsigned long *tce_ret) -{ - unsigned long dummy; - return plpar_hcall(H_GET_TCE, liobn, ioba, 0, 0, - tce_ret, &dummy, &dummy); -} - -static inline long plpar_tce_put(unsigned long liobn, - unsigned long ioba, - unsigned long tceval) -{ - return plpar_hcall_norets(H_PUT_TCE, liobn, ioba, tceval); -} - -static inline long plpar_tce_put_indirect(unsigned long liobn, - unsigned long ioba, - unsigned long page, - unsigned long count) -{ - return plpar_hcall_norets(H_PUT_TCE_INDIRECT, liobn, ioba, page, count); -} - -static inline long plpar_tce_stuff(unsigned long liobn, - unsigned long ioba, - unsigned long tceval, - unsigned long count) -{ - return plpar_hcall_norets(H_STUFF_TCE, liobn, ioba, tceval, count); -} - -static inline long plpar_get_term_char(unsigned long termno, - unsigned long *len_ret, - char *buf_ret) -{ - unsigned long *lbuf = (unsigned long *)buf_ret; /* ToDo: alignment? */ - return plpar_hcall(H_GET_TERM_CHAR, termno, 0, 0, 0, - len_ret, lbuf+0, lbuf+1); -} - -static inline long plpar_put_term_char(unsigned long termno, - unsigned long len, - const char *buffer) -{ - unsigned long *lbuf = (unsigned long *)buffer; /* ToDo: alignment? */ - return plpar_hcall_norets(H_PUT_TERM_CHAR, termno, len, lbuf[0], - lbuf[1]); -} - -static inline long plpar_set_xdabr(unsigned long address, unsigned long flags) -{ - return plpar_hcall_norets(H_SET_XDABR, address, flags); -} - -static inline long plpar_set_dabr(unsigned long val) -{ - return plpar_hcall_norets(H_SET_DABR, val); -} - -#endif /* _PPC64_PLPAR_WRAPPERS_H */ diff --git a/include/asm-ppc64/pmac_feature.h b/include/asm-ppc64/pmac_feature.h deleted file mode 100644 index e07e36c4cbb2..000000000000 --- a/include/asm-ppc64/pmac_feature.h +++ /dev/null @@ -1,2 +0,0 @@ -#include <asm-ppc/pmac_feature.h> - diff --git a/include/asm-ppc64/pmac_low_i2c.h b/include/asm-ppc64/pmac_low_i2c.h deleted file mode 100644 index 7bcfc72c5c8a..000000000000 --- a/include/asm-ppc64/pmac_low_i2c.h +++ /dev/null @@ -1,2 +0,0 @@ -#include <asm-ppc/pmac_low_i2c.h> - diff --git a/include/asm-ppc64/ppc32.h b/include/asm-ppc64/ppc32.h deleted file mode 100644 index 6b44a8caf395..000000000000 --- a/include/asm-ppc64/ppc32.h +++ /dev/null @@ -1,122 +0,0 @@ -#ifndef _PPC64_PPC32_H -#define _PPC64_PPC32_H - -#include <linux/compat.h> -#include <asm/siginfo.h> -#include <asm/signal.h> - -/* - * Data types and macros for providing 32b PowerPC support. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ - -/* These are here to support 32-bit syscalls on a 64-bit kernel. */ - -typedef struct compat_siginfo { - int si_signo; - int si_errno; - int si_code; - - union { - int _pad[SI_PAD_SIZE32]; - - /* kill() */ - struct { - compat_pid_t _pid; /* sender's pid */ - compat_uid_t _uid; /* sender's uid */ - } _kill; - - /* POSIX.1b timers */ - struct { - compat_timer_t _tid; /* timer id */ - int _overrun; /* overrun count */ - compat_sigval_t _sigval; /* same as below */ - int _sys_private; /* not to be passed to user */ - } _timer; - - /* POSIX.1b signals */ - struct { - compat_pid_t _pid; /* sender's pid */ - compat_uid_t _uid; /* sender's uid */ - compat_sigval_t _sigval; - } _rt; - - /* SIGCHLD */ - struct { - compat_pid_t _pid; /* which child */ - compat_uid_t _uid; /* sender's uid */ - int _status; /* exit code */ - compat_clock_t _utime; - compat_clock_t _stime; - } _sigchld; - - /* SIGILL, SIGFPE, SIGSEGV, SIGBUS, SIGEMT */ - struct { - unsigned int _addr; /* faulting insn/memory ref. */ - } _sigfault; - - /* SIGPOLL */ - struct { - int _band; /* POLL_IN, POLL_OUT, POLL_MSG */ - int _fd; - } _sigpoll; - } _sifields; -} compat_siginfo_t; - -#define __old_sigaction32 old_sigaction32 - -struct __old_sigaction32 { - unsigned sa_handler; - compat_old_sigset_t sa_mask; - unsigned int sa_flags; - unsigned sa_restorer; /* not used by Linux/SPARC yet */ -}; - - - -struct sigaction32 { - unsigned int sa_handler; /* Really a pointer, but need to deal with 32 bits */ - unsigned int sa_flags; - unsigned int sa_restorer; /* Another 32 bit pointer */ - compat_sigset_t sa_mask; /* A 32 bit mask */ -}; - -typedef struct sigaltstack_32 { - unsigned int ss_sp; - int ss_flags; - compat_size_t ss_size; -} stack_32_t; - -struct sigcontext32 { - unsigned int _unused[4]; - int signal; - unsigned int handler; - unsigned int oldmask; - u32 regs; /* 4 byte pointer to the pt_regs32 structure. */ -}; - -struct mcontext32 { - elf_gregset_t32 mc_gregs; - elf_fpregset_t mc_fregs; - unsigned int mc_pad[2]; - elf_vrregset_t32 mc_vregs __attribute__((__aligned__(16))); -}; - -struct ucontext32 { - unsigned int uc_flags; - unsigned int uc_link; - stack_32_t uc_stack; - int uc_pad[7]; - u32 uc_regs; /* points to uc_mcontext field */ - compat_sigset_t uc_sigmask; /* mask last for extensibility */ - /* glibc has 1024-bit signal masks, ours are 64-bit */ - int uc_maskext[30]; - int uc_pad2[3]; - struct mcontext32 uc_mcontext; -}; - -#endif /* _PPC64_PPC32_H */ diff --git a/include/asm-ppc64/ppc_asm.h b/include/asm-ppc64/ppc_asm.h deleted file mode 100644 index 9031d8a29aca..000000000000 --- a/include/asm-ppc64/ppc_asm.h +++ /dev/null @@ -1,242 +0,0 @@ -/* - * arch/ppc64/kernel/ppc_asm.h - * - * Definitions used by various bits of low-level assembly code on PowerPC. - * - * Copyright (C) 1995-1999 Gary Thomas, Paul Mackerras, Cort Dougan. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ - -#ifndef _PPC64_PPC_ASM_H -#define _PPC64_PPC_ASM_H -/* - * Macros for storing registers into and loading registers from - * exception frames. - */ -#define SAVE_GPR(n, base) std n,GPR0+8*(n)(base) -#define SAVE_2GPRS(n, base) SAVE_GPR(n, base); SAVE_GPR(n+1, base) -#define SAVE_4GPRS(n, base) SAVE_2GPRS(n, base); SAVE_2GPRS(n+2, base) -#define SAVE_8GPRS(n, base) SAVE_4GPRS(n, base); SAVE_4GPRS(n+4, base) -#define SAVE_10GPRS(n, base) SAVE_8GPRS(n, base); SAVE_2GPRS(n+8, base) -#define REST_GPR(n, base) ld n,GPR0+8*(n)(base) -#define REST_2GPRS(n, base) REST_GPR(n, base); REST_GPR(n+1, base) -#define REST_4GPRS(n, base) REST_2GPRS(n, base); REST_2GPRS(n+2, base) -#define REST_8GPRS(n, base) REST_4GPRS(n, base); REST_4GPRS(n+4, base) -#define REST_10GPRS(n, base) REST_8GPRS(n, base); REST_2GPRS(n+8, base) - -#define SAVE_NVGPRS(base) SAVE_8GPRS(14, base); SAVE_10GPRS(22, base) -#define REST_NVGPRS(base) REST_8GPRS(14, base); REST_10GPRS(22, base) - -#define SAVE_FPR(n, base) stfd n,THREAD_FPR0+8*(n)(base) -#define SAVE_2FPRS(n, base) SAVE_FPR(n, base); SAVE_FPR(n+1, base) -#define SAVE_4FPRS(n, base) SAVE_2FPRS(n, base); SAVE_2FPRS(n+2, base) -#define SAVE_8FPRS(n, base) SAVE_4FPRS(n, base); SAVE_4FPRS(n+4, base) -#define SAVE_16FPRS(n, base) SAVE_8FPRS(n, base); SAVE_8FPRS(n+8, base) -#define SAVE_32FPRS(n, base) SAVE_16FPRS(n, base); SAVE_16FPRS(n+16, base) -#define REST_FPR(n, base) lfd n,THREAD_FPR0+8*(n)(base) -#define REST_2FPRS(n, base) REST_FPR(n, base); REST_FPR(n+1, base) -#define REST_4FPRS(n, base) REST_2FPRS(n, base); REST_2FPRS(n+2, base) -#define REST_8FPRS(n, base) REST_4FPRS(n, base); REST_4FPRS(n+4, base) -#define REST_16FPRS(n, base) REST_8FPRS(n, base); REST_8FPRS(n+8, base) -#define REST_32FPRS(n, base) REST_16FPRS(n, base); REST_16FPRS(n+16, base) - -#define SAVE_VR(n,b,base) li b,THREAD_VR0+(16*(n)); stvx n,b,base -#define SAVE_2VRS(n,b,base) SAVE_VR(n,b,base); SAVE_VR(n+1,b,base) -#define SAVE_4VRS(n,b,base) SAVE_2VRS(n,b,base); SAVE_2VRS(n+2,b,base) -#define SAVE_8VRS(n,b,base) SAVE_4VRS(n,b,base); SAVE_4VRS(n+4,b,base) -#define SAVE_16VRS(n,b,base) SAVE_8VRS(n,b,base); SAVE_8VRS(n+8,b,base) -#define SAVE_32VRS(n,b,base) SAVE_16VRS(n,b,base); SAVE_16VRS(n+16,b,base) -#define REST_VR(n,b,base) li b,THREAD_VR0+(16*(n)); lvx n,b,base -#define REST_2VRS(n,b,base) REST_VR(n,b,base); REST_VR(n+1,b,base) -#define REST_4VRS(n,b,base) REST_2VRS(n,b,base); REST_2VRS(n+2,b,base) -#define REST_8VRS(n,b,base) REST_4VRS(n,b,base); REST_4VRS(n+4,b,base) -#define REST_16VRS(n,b,base) REST_8VRS(n,b,base); REST_8VRS(n+8,b,base) -#define REST_32VRS(n,b,base) REST_16VRS(n,b,base); REST_16VRS(n+16,b,base) - -/* Macros to adjust thread priority for Iseries hardware multithreading */ -#define HMT_LOW or 1,1,1 -#define HMT_MEDIUM or 2,2,2 -#define HMT_HIGH or 3,3,3 - -/* Insert the high 32 bits of the MSR into what will be the new - MSR (via SRR1 and rfid) This preserves the MSR.SF and MSR.ISF - bits. */ - -#define FIX_SRR1(ra, rb) \ - mr rb,ra; \ - mfmsr ra; \ - rldimi ra,rb,0,32 - -#define CLR_TOP32(r) rlwinm (r),(r),0,0,31 /* clear top 32 bits */ - -/* - * LOADADDR( rn, name ) - * loads the address of 'name' into 'rn' - * - * LOADBASE( rn, name ) - * loads the address (less the low 16 bits) of 'name' into 'rn' - * suitable for base+disp addressing - */ -#define LOADADDR(rn,name) \ - lis rn,name##@highest; \ - ori rn,rn,name##@higher; \ - rldicr rn,rn,32,31; \ - oris rn,rn,name##@h; \ - ori rn,rn,name##@l - -#define LOADBASE(rn,name) \ - lis rn,name@highest; \ - ori rn,rn,name@higher; \ - rldicr rn,rn,32,31; \ - oris rn,rn,name@ha - - -#define SET_REG_TO_CONST(reg, value) \ - lis reg,(((value)>>48)&0xFFFF); \ - ori reg,reg,(((value)>>32)&0xFFFF); \ - rldicr reg,reg,32,31; \ - oris reg,reg,(((value)>>16)&0xFFFF); \ - ori reg,reg,((value)&0xFFFF); - -#define SET_REG_TO_LABEL(reg, label) \ - lis reg,(label)@highest; \ - ori reg,reg,(label)@higher; \ - rldicr reg,reg,32,31; \ - oris reg,reg,(label)@h; \ - ori reg,reg,(label)@l; - - -/* PPPBBB - DRENG If KERNELBASE is always 0xC0..., - * Then we can easily do this with one asm insn. -Peter - */ -#define tophys(rd,rs) \ - lis rd,((KERNELBASE>>48)&0xFFFF); \ - rldicr rd,rd,32,31; \ - sub rd,rs,rd - -#define tovirt(rd,rs) \ - lis rd,((KERNELBASE>>48)&0xFFFF); \ - rldicr rd,rd,32,31; \ - add rd,rs,rd - -/* Condition Register Bit Fields */ - -#define cr0 0 -#define cr1 1 -#define cr2 2 -#define cr3 3 -#define cr4 4 -#define cr5 5 -#define cr6 6 -#define cr7 7 - - -/* General Purpose Registers (GPRs) */ - -#define r0 0 -#define r1 1 -#define r2 2 -#define r3 3 -#define r4 4 -#define r5 5 -#define r6 6 -#define r7 7 -#define r8 8 -#define r9 9 -#define r10 10 -#define r11 11 -#define r12 12 -#define r13 13 -#define r14 14 -#define r15 15 -#define r16 16 -#define r17 17 -#define r18 18 -#define r19 19 -#define r20 20 -#define r21 21 -#define r22 22 -#define r23 23 -#define r24 24 -#define r25 25 -#define r26 26 -#define r27 27 -#define r28 28 -#define r29 29 -#define r30 30 -#define r31 31 - - -/* Floating Point Registers (FPRs) */ - -#define fr0 0 -#define fr1 1 -#define fr2 2 -#define fr3 3 -#define fr4 4 -#define fr5 5 -#define fr6 6 -#define fr7 7 -#define fr8 8 -#define fr9 9 -#define fr10 10 -#define fr11 11 -#define fr12 12 -#define fr13 13 -#define fr14 14 -#define fr15 15 -#define fr16 16 -#define fr17 17 -#define fr18 18 -#define fr19 19 -#define fr20 20 -#define fr21 21 -#define fr22 22 -#define fr23 23 -#define fr24 24 -#define fr25 25 -#define fr26 26 -#define fr27 27 -#define fr28 28 -#define fr29 29 -#define fr30 30 -#define fr31 31 - -#define vr0 0 -#define vr1 1 -#define vr2 2 -#define vr3 3 -#define vr4 4 -#define vr5 5 -#define vr6 6 -#define vr7 7 -#define vr8 8 -#define vr9 9 -#define vr10 10 -#define vr11 11 -#define vr12 12 -#define vr13 13 -#define vr14 14 -#define vr15 15 -#define vr16 16 -#define vr17 17 -#define vr18 18 -#define vr19 19 -#define vr20 20 -#define vr21 21 -#define vr22 22 -#define vr23 23 -#define vr24 24 -#define vr25 25 -#define vr26 26 -#define vr27 27 -#define vr28 28 -#define vr29 29 -#define vr30 30 -#define vr31 31 - -#endif /* _PPC64_PPC_ASM_H */ diff --git a/include/asm-ppc64/ppcdebug.h b/include/asm-ppc64/ppcdebug.h deleted file mode 100644 index fd7f696065c4..000000000000 --- a/include/asm-ppc64/ppcdebug.h +++ /dev/null @@ -1,108 +0,0 @@ -#ifndef __PPCDEBUG_H -#define __PPCDEBUG_H -/******************************************************************** - * Author: Adam Litke, IBM Corp - * (c) 2001 - * - * This file contains definitions and macros for a runtime debugging - * system for ppc64 (This should also work on 32 bit with a few - * adjustments. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - * - ********************************************************************/ - -#include <linux/config.h> -#include <linux/types.h> -#include <asm/udbg.h> -#include <stdarg.h> - -#define PPCDBG_BITVAL(X) ((1UL)<<((unsigned long)(X))) - -/* Defined below are the bit positions of various debug flags in the - * ppc64_debug_switch variable. - * -- When adding new values, please enter them into trace names below -- - * - * Values 62 & 63 can be used to stress the hardware page table management - * code. They must be set statically, any attempt to change them dynamically - * would be a very bad idea. - */ -#define PPCDBG_MMINIT PPCDBG_BITVAL(0) -#define PPCDBG_MM PPCDBG_BITVAL(1) -#define PPCDBG_SYS32 PPCDBG_BITVAL(2) -#define PPCDBG_SYS32NI PPCDBG_BITVAL(3) -#define PPCDBG_SYS32X PPCDBG_BITVAL(4) -#define PPCDBG_SYS32M PPCDBG_BITVAL(5) -#define PPCDBG_SYS64 PPCDBG_BITVAL(6) -#define PPCDBG_SYS64NI PPCDBG_BITVAL(7) -#define PPCDBG_SYS64X PPCDBG_BITVAL(8) -#define PPCDBG_SIGNAL PPCDBG_BITVAL(9) -#define PPCDBG_SIGNALXMON PPCDBG_BITVAL(10) -#define PPCDBG_BINFMT32 PPCDBG_BITVAL(11) -#define PPCDBG_BINFMT64 PPCDBG_BITVAL(12) -#define PPCDBG_BINFMTXMON PPCDBG_BITVAL(13) -#define PPCDBG_BINFMT_32ADDR PPCDBG_BITVAL(14) -#define PPCDBG_ALIGNFIXUP PPCDBG_BITVAL(15) -#define PPCDBG_TCEINIT PPCDBG_BITVAL(16) -#define PPCDBG_TCE PPCDBG_BITVAL(17) -#define PPCDBG_PHBINIT PPCDBG_BITVAL(18) -#define PPCDBG_SMP PPCDBG_BITVAL(19) -#define PPCDBG_BOOT PPCDBG_BITVAL(20) -#define PPCDBG_BUSWALK PPCDBG_BITVAL(21) -#define PPCDBG_PROM PPCDBG_BITVAL(22) -#define PPCDBG_RTAS PPCDBG_BITVAL(23) -#define PPCDBG_HTABSTRESS PPCDBG_BITVAL(62) -#define PPCDBG_HTABSIZE PPCDBG_BITVAL(63) -#define PPCDBG_NONE (0UL) -#define PPCDBG_ALL (0xffffffffUL) - -/* The default initial value for the debug switch */ -#define PPC_DEBUG_DEFAULT 0 -/* #define PPC_DEBUG_DEFAULT PPCDBG_ALL */ - -#define PPCDBG_NUM_FLAGS 64 - -extern u64 ppc64_debug_switch; - -#ifdef WANT_PPCDBG_TAB -/* A table of debug switch names to allow name lookup in xmon - * (and whoever else wants it. - */ -char *trace_names[PPCDBG_NUM_FLAGS] = { - /* Known debug names */ - "mminit", "mm", - "syscall32", "syscall32_ni", "syscall32x", "syscall32m", - "syscall64", "syscall64_ni", "syscall64x", - "signal", "signal_xmon", - "binfmt32", "binfmt64", "binfmt_xmon", "binfmt_32addr", - "alignfixup", "tceinit", "tce", "phb_init", - "smp", "boot", "buswalk", "prom", - "rtas" -}; -#else -extern char *trace_names[64]; -#endif /* WANT_PPCDBG_TAB */ - -#ifdef CONFIG_PPCDBG -/* Macro to conditionally print debug based on debug_switch */ -#define PPCDBG(...) udbg_ppcdbg(__VA_ARGS__) - -/* Macro to conditionally call a debug routine based on debug_switch */ -#define PPCDBGCALL(FLAGS,FUNCTION) ifppcdebug(FLAGS) FUNCTION - -/* Macros to test for debug states */ -#define ifppcdebug(FLAGS) if (udbg_ifdebug(FLAGS)) -#define ppcdebugset(FLAGS) (udbg_ifdebug(FLAGS)) -#define PPCDBG_BINFMT (test_thread_flag(TIF_32BIT) ? PPCDBG_BINFMT32 : PPCDBG_BINFMT64) - -#else -#define PPCDBG(...) do {;} while (0) -#define PPCDBGCALL(FLAGS,FUNCTION) do {;} while (0) -#define ifppcdebug(...) if (0) -#define ppcdebugset(FLAGS) (0) -#endif /* CONFIG_PPCDBG */ - -#endif /*__PPCDEBUG_H */ diff --git a/include/asm-ppc64/processor.h b/include/asm-ppc64/processor.h deleted file mode 100644 index 4146189006e3..000000000000 --- a/include/asm-ppc64/processor.h +++ /dev/null @@ -1,558 +0,0 @@ -#ifndef __ASM_PPC64_PROCESSOR_H -#define __ASM_PPC64_PROCESSOR_H - -/* - * Copyright (C) 2001 PPC 64 Team, IBM Corp - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ - -#include <linux/stringify.h> -#ifndef __ASSEMBLY__ -#include <linux/config.h> -#include <asm/atomic.h> -#include <asm/ppcdebug.h> -#include <asm/a.out.h> -#endif -#include <asm/ptrace.h> -#include <asm/types.h> -#include <asm/systemcfg.h> -#include <asm/cputable.h> - -/* Machine State Register (MSR) Fields */ -#define MSR_SF_LG 63 /* Enable 64 bit mode */ -#define MSR_ISF_LG 61 /* Interrupt 64b mode valid on 630 */ -#define MSR_HV_LG 60 /* Hypervisor state */ -#define MSR_VEC_LG 25 /* Enable AltiVec */ -#define MSR_POW_LG 18 /* Enable Power Management */ -#define MSR_WE_LG 18 /* Wait State Enable */ -#define MSR_TGPR_LG 17 /* TLB Update registers in use */ -#define MSR_CE_LG 17 /* Critical Interrupt Enable */ -#define MSR_ILE_LG 16 /* Interrupt Little Endian */ -#define MSR_EE_LG 15 /* External Interrupt Enable */ -#define MSR_PR_LG 14 /* Problem State / Privilege Level */ -#define MSR_FP_LG 13 /* Floating Point enable */ -#define MSR_ME_LG 12 /* Machine Check Enable */ -#define MSR_FE0_LG 11 /* Floating Exception mode 0 */ -#define MSR_SE_LG 10 /* Single Step */ -#define MSR_BE_LG 9 /* Branch Trace */ -#define MSR_DE_LG 9 /* Debug Exception Enable */ -#define MSR_FE1_LG 8 /* Floating Exception mode 1 */ -#define MSR_IP_LG 6 /* Exception prefix 0x000/0xFFF */ -#define MSR_IR_LG 5 /* Instruction Relocate */ -#define MSR_DR_LG 4 /* Data Relocate */ -#define MSR_PE_LG 3 /* Protection Enable */ -#define MSR_PX_LG 2 /* Protection Exclusive Mode */ -#define MSR_PMM_LG 2 /* Performance monitor */ -#define MSR_RI_LG 1 /* Recoverable Exception */ -#define MSR_LE_LG 0 /* Little Endian */ - -#ifdef __ASSEMBLY__ -#define __MASK(X) (1<<(X)) -#else -#define __MASK(X) (1UL<<(X)) -#endif - -#define MSR_SF __MASK(MSR_SF_LG) /* Enable 64 bit mode */ -#define MSR_ISF __MASK(MSR_ISF_LG) /* Interrupt 64b mode valid on 630 */ -#define MSR_HV __MASK(MSR_HV_LG) /* Hypervisor state */ -#define MSR_VEC __MASK(MSR_VEC_LG) /* Enable AltiVec */ -#define MSR_POW __MASK(MSR_POW_LG) /* Enable Power Management */ -#define MSR_WE __MASK(MSR_WE_LG) /* Wait State Enable */ -#define MSR_TGPR __MASK(MSR_TGPR_LG) /* TLB Update registers in use */ -#define MSR_CE __MASK(MSR_CE_LG) /* Critical Interrupt Enable */ -#define MSR_ILE __MASK(MSR_ILE_LG) /* Interrupt Little Endian */ -#define MSR_EE __MASK(MSR_EE_LG) /* External Interrupt Enable */ -#define MSR_PR __MASK(MSR_PR_LG) /* Problem State / Privilege Level */ -#define MSR_FP __MASK(MSR_FP_LG) /* Floating Point enable */ -#define MSR_ME __MASK(MSR_ME_LG) /* Machine Check Enable */ -#define MSR_FE0 __MASK(MSR_FE0_LG) /* Floating Exception mode 0 */ -#define MSR_SE __MASK(MSR_SE_LG) /* Single Step */ -#define MSR_BE __MASK(MSR_BE_LG) /* Branch Trace */ -#define MSR_DE __MASK(MSR_DE_LG) /* Debug Exception Enable */ -#define MSR_FE1 __MASK(MSR_FE1_LG) /* Floating Exception mode 1 */ -#define MSR_IP __MASK(MSR_IP_LG) /* Exception prefix 0x000/0xFFF */ -#define MSR_IR __MASK(MSR_IR_LG) /* Instruction Relocate */ -#define MSR_DR __MASK(MSR_DR_LG) /* Data Relocate */ -#define MSR_PE __MASK(MSR_PE_LG) /* Protection Enable */ -#define MSR_PX __MASK(MSR_PX_LG) /* Protection Exclusive Mode */ -#define MSR_PMM __MASK(MSR_PMM_LG) /* Performance monitor */ -#define MSR_RI __MASK(MSR_RI_LG) /* Recoverable Exception */ -#define MSR_LE __MASK(MSR_LE_LG) /* Little Endian */ - -#define MSR_ MSR_ME | MSR_RI | MSR_IR | MSR_DR | MSR_ISF -#define MSR_KERNEL MSR_ | MSR_SF | MSR_HV - -#define MSR_USER32 MSR_ | MSR_PR | MSR_EE -#define MSR_USER64 MSR_USER32 | MSR_SF - -/* Floating Point Status and Control Register (FPSCR) Fields */ - -#define FPSCR_FX 0x80000000 /* FPU exception summary */ -#define FPSCR_FEX 0x40000000 /* FPU enabled exception summary */ -#define FPSCR_VX 0x20000000 /* Invalid operation summary */ -#define FPSCR_OX 0x10000000 /* Overflow exception summary */ -#define FPSCR_UX 0x08000000 /* Underflow exception summary */ -#define FPSCR_ZX 0x04000000 /* Zero-divide exception summary */ -#define FPSCR_XX 0x02000000 /* Inexact exception summary */ -#define FPSCR_VXSNAN 0x01000000 /* Invalid op for SNaN */ -#define FPSCR_VXISI 0x00800000 /* Invalid op for Inv - Inv */ -#define FPSCR_VXIDI 0x00400000 /* Invalid op for Inv / Inv */ -#define FPSCR_VXZDZ 0x00200000 /* Invalid op for Zero / Zero */ -#define FPSCR_VXIMZ 0x00100000 /* Invalid op for Inv * Zero */ -#define FPSCR_VXVC 0x00080000 /* Invalid op for Compare */ -#define FPSCR_FR 0x00040000 /* Fraction rounded */ -#define FPSCR_FI 0x00020000 /* Fraction inexact */ -#define FPSCR_FPRF 0x0001f000 /* FPU Result Flags */ -#define FPSCR_FPCC 0x0000f000 /* FPU Condition Codes */ -#define FPSCR_VXSOFT 0x00000400 /* Invalid op for software request */ -#define FPSCR_VXSQRT 0x00000200 /* Invalid op for square root */ -#define FPSCR_VXCVI 0x00000100 /* Invalid op for integer convert */ -#define FPSCR_VE 0x00000080 /* Invalid op exception enable */ -#define FPSCR_OE 0x00000040 /* IEEE overflow exception enable */ -#define FPSCR_UE 0x00000020 /* IEEE underflow exception enable */ -#define FPSCR_ZE 0x00000010 /* IEEE zero divide exception enable */ -#define FPSCR_XE 0x00000008 /* FP inexact exception enable */ -#define FPSCR_NI 0x00000004 /* FPU non IEEE-Mode */ -#define FPSCR_RN 0x00000003 /* FPU rounding control */ - -/* Special Purpose Registers (SPRNs)*/ - -#define SPRN_CTR 0x009 /* Count Register */ -#define SPRN_DABR 0x3F5 /* Data Address Breakpoint Register */ -#define DABR_TRANSLATION (1UL << 2) -#define SPRN_DAR 0x013 /* Data Address Register */ -#define SPRN_DEC 0x016 /* Decrement Register */ -#define SPRN_DSISR 0x012 /* Data Storage Interrupt Status Register */ -#define DSISR_NOHPTE 0x40000000 /* no translation found */ -#define DSISR_PROTFAULT 0x08000000 /* protection fault */ -#define DSISR_ISSTORE 0x02000000 /* access was a store */ -#define DSISR_DABRMATCH 0x00400000 /* hit data breakpoint */ -#define DSISR_NOSEGMENT 0x00200000 /* STAB/SLB miss */ -#define SPRN_HID0 0x3F0 /* Hardware Implementation Register 0 */ -#define SPRN_MSRDORM 0x3F1 /* Hardware Implementation Register 1 */ -#define SPRN_HID1 0x3F1 /* Hardware Implementation Register 1 */ -#define SPRN_IABR 0x3F2 /* Instruction Address Breakpoint Register */ -#define SPRN_NIADORM 0x3F3 /* Hardware Implementation Register 2 */ -#define SPRN_HID4 0x3F4 /* 970 HID4 */ -#define SPRN_HID5 0x3F6 /* 970 HID5 */ -#define SPRN_HID6 0x3F9 /* BE HID 6 */ -#define HID6_LB (0x0F<<12) /* Concurrent Large Page Modes */ -#define HID6_DLP (1<<20) /* Disable all large page modes (4K only) */ -#define SPRN_TSCR 0x399 /* Thread switch control on BE */ -#define SPRN_TTR 0x39A /* Thread switch timeout on BE */ -#define TSCR_DEC_ENABLE 0x200000 /* Decrementer Interrupt */ -#define TSCR_EE_ENABLE 0x100000 /* External Interrupt */ -#define TSCR_EE_BOOST 0x080000 /* External Interrupt Boost */ -#define SPRN_TSC 0x3FD /* Thread switch control on others */ -#define SPRN_TST 0x3FC /* Thread switch timeout on others */ -#define SPRN_L2CR 0x3F9 /* Level 2 Cache Control Regsiter */ -#define SPRN_LR 0x008 /* Link Register */ -#define SPRN_PIR 0x3FF /* Processor Identification Register */ -#define SPRN_PIT 0x3DB /* Programmable Interval Timer */ -#define SPRN_PURR 0x135 /* Processor Utilization of Resources Register */ -#define SPRN_PVR 0x11F /* Processor Version Register */ -#define SPRN_RPA 0x3D6 /* Required Physical Address Register */ -#define SPRN_SDA 0x3BF /* Sampled Data Address Register */ -#define SPRN_SDR1 0x019 /* MMU Hash Base Register */ -#define SPRN_SIA 0x3BB /* Sampled Instruction Address Register */ -#define SPRN_SPRG0 0x110 /* Special Purpose Register General 0 */ -#define SPRN_SPRG1 0x111 /* Special Purpose Register General 1 */ -#define SPRN_SPRG2 0x112 /* Special Purpose Register General 2 */ -#define SPRN_SPRG3 0x113 /* Special Purpose Register General 3 */ -#define SPRN_SRR0 0x01A /* Save/Restore Register 0 */ -#define SPRN_SRR1 0x01B /* Save/Restore Register 1 */ -#define SPRN_TBRL 0x10C /* Time Base Read Lower Register (user, R/O) */ -#define SPRN_TBRU 0x10D /* Time Base Read Upper Register (user, R/O) */ -#define SPRN_TBWL 0x11C /* Time Base Lower Register (super, W/O) */ -#define SPRN_TBWU 0x11D /* Time Base Write Upper Register (super, W/O) */ -#define SPRN_HIOR 0x137 /* 970 Hypervisor interrupt offset */ -#define SPRN_USIA 0x3AB /* User Sampled Instruction Address Register */ -#define SPRN_XER 0x001 /* Fixed Point Exception Register */ -#define SPRN_VRSAVE 0x100 /* Vector save */ -#define SPRN_CTRLF 0x088 -#define SPRN_CTRLT 0x098 -#define CTRL_RUNLATCH 0x1 - -/* Performance monitor SPRs */ -#define SPRN_SIAR 780 -#define SPRN_SDAR 781 -#define SPRN_MMCRA 786 -#define MMCRA_SIHV 0x10000000UL /* state of MSR HV when SIAR set */ -#define MMCRA_SIPR 0x08000000UL /* state of MSR PR when SIAR set */ -#define MMCRA_SAMPLE_ENABLE 0x00000001UL /* enable sampling */ -#define SPRN_PMC1 787 -#define SPRN_PMC2 788 -#define SPRN_PMC3 789 -#define SPRN_PMC4 790 -#define SPRN_PMC5 791 -#define SPRN_PMC6 792 -#define SPRN_PMC7 793 -#define SPRN_PMC8 794 -#define SPRN_MMCR0 795 -#define MMCR0_FC 0x80000000UL /* freeze counters. set to 1 on a perfmon exception */ -#define MMCR0_FCS 0x40000000UL /* freeze in supervisor state */ -#define MMCR0_KERNEL_DISABLE MMCR0_FCS -#define MMCR0_FCP 0x20000000UL /* freeze in problem state */ -#define MMCR0_PROBLEM_DISABLE MMCR0_FCP -#define MMCR0_FCM1 0x10000000UL /* freeze counters while MSR mark = 1 */ -#define MMCR0_FCM0 0x08000000UL /* freeze counters while MSR mark = 0 */ -#define MMCR0_PMXE 0x04000000UL /* performance monitor exception enable */ -#define MMCR0_FCECE 0x02000000UL /* freeze counters on enabled condition or event */ -/* time base exception enable */ -#define MMCR0_TBEE 0x00400000UL /* time base exception enable */ -#define MMCR0_PMC1CE 0x00008000UL /* PMC1 count enable*/ -#define MMCR0_PMCjCE 0x00004000UL /* PMCj count enable*/ -#define MMCR0_TRIGGER 0x00002000UL /* TRIGGER enable */ -#define MMCR0_PMAO 0x00000080UL /* performance monitor alert has occurred, set to 0 after handling exception */ -#define MMCR0_SHRFC 0x00000040UL /* SHRre freeze conditions between threads */ -#define MMCR0_FCTI 0x00000008UL /* freeze counters in tags inactive mode */ -#define MMCR0_FCTA 0x00000004UL /* freeze counters in tags active mode */ -#define MMCR0_FCWAIT 0x00000002UL /* freeze counter in WAIT state */ -#define MMCR0_FCHV 0x00000001UL /* freeze conditions in hypervisor mode */ -#define SPRN_MMCR1 798 - -/* Short-hand versions for a number of the above SPRNs */ - -#define CTR SPRN_CTR /* Counter Register */ -#define DAR SPRN_DAR /* Data Address Register */ -#define DABR SPRN_DABR /* Data Address Breakpoint Register */ -#define DEC SPRN_DEC /* Decrement Register */ -#define DSISR SPRN_DSISR /* Data Storage Interrupt Status Register */ -#define HID0 SPRN_HID0 /* Hardware Implementation Register 0 */ -#define MSRDORM SPRN_MSRDORM /* MSR Dormant Register */ -#define NIADORM SPRN_NIADORM /* NIA Dormant Register */ -#define TSC SPRN_TSC /* Thread switch control */ -#define TST SPRN_TST /* Thread switch timeout */ -#define IABR SPRN_IABR /* Instruction Address Breakpoint Register */ -#define L2CR SPRN_L2CR /* PPC 750 L2 control register */ -#define __LR SPRN_LR -#define PVR SPRN_PVR /* Processor Version */ -#define PIR SPRN_PIR /* Processor ID */ -#define PURR SPRN_PURR /* Processor Utilization of Resource Register */ -#define SDR1 SPRN_SDR1 /* MMU hash base register */ -#define SPR0 SPRN_SPRG0 /* Supervisor Private Registers */ -#define SPR1 SPRN_SPRG1 -#define SPR2 SPRN_SPRG2 -#define SPR3 SPRN_SPRG3 -#define SPRG0 SPRN_SPRG0 -#define SPRG1 SPRN_SPRG1 -#define SPRG2 SPRN_SPRG2 -#define SPRG3 SPRN_SPRG3 -#define SRR0 SPRN_SRR0 /* Save and Restore Register 0 */ -#define SRR1 SPRN_SRR1 /* Save and Restore Register 1 */ -#define TBRL SPRN_TBRL /* Time Base Read Lower Register */ -#define TBRU SPRN_TBRU /* Time Base Read Upper Register */ -#define TBWL SPRN_TBWL /* Time Base Write Lower Register */ -#define TBWU SPRN_TBWU /* Time Base Write Upper Register */ -#define XER SPRN_XER - -/* Processor Version Register (PVR) field extraction */ - -#define PVR_VER(pvr) (((pvr) >> 16) & 0xFFFF) /* Version field */ -#define PVR_REV(pvr) (((pvr) >> 0) & 0xFFFF) /* Revison field */ - -/* Processor Version Numbers */ -#define PV_NORTHSTAR 0x0033 -#define PV_PULSAR 0x0034 -#define PV_POWER4 0x0035 -#define PV_ICESTAR 0x0036 -#define PV_SSTAR 0x0037 -#define PV_POWER4p 0x0038 -#define PV_970 0x0039 -#define PV_POWER5 0x003A -#define PV_POWER5p 0x003B -#define PV_970FX 0x003C -#define PV_630 0x0040 -#define PV_630p 0x0041 -#define PV_970MP 0x0044 -#define PV_BE 0x0070 - -/* Platforms supported by PPC64 */ -#define PLATFORM_PSERIES 0x0100 -#define PLATFORM_PSERIES_LPAR 0x0101 -#define PLATFORM_ISERIES_LPAR 0x0201 -#define PLATFORM_LPAR 0x0001 -#define PLATFORM_POWERMAC 0x0400 -#define PLATFORM_MAPLE 0x0500 -#define PLATFORM_BPA 0x1000 - -/* Compatibility with drivers coming from PPC32 world */ -#define _machine (systemcfg->platform) -#define _MACH_Pmac PLATFORM_POWERMAC - -/* - * List of interrupt controllers. - */ -#define IC_INVALID 0 -#define IC_OPEN_PIC 1 -#define IC_PPC_XIC 2 -#define IC_BPA_IIC 3 - -#define XGLUE(a,b) a##b -#define GLUE(a,b) XGLUE(a,b) - -#ifdef __ASSEMBLY__ - -#define _GLOBAL(name) \ - .section ".text"; \ - .align 2 ; \ - .globl name; \ - .globl GLUE(.,name); \ - .section ".opd","aw"; \ -name: \ - .quad GLUE(.,name); \ - .quad .TOC.@tocbase; \ - .quad 0; \ - .previous; \ - .type GLUE(.,name),@function; \ -GLUE(.,name): - -#define _KPROBE(name) \ - .section ".kprobes.text","a"; \ - .align 2 ; \ - .globl name; \ - .globl GLUE(.,name); \ - .section ".opd","aw"; \ -name: \ - .quad GLUE(.,name); \ - .quad .TOC.@tocbase; \ - .quad 0; \ - .previous; \ - .type GLUE(.,name),@function; \ -GLUE(.,name): - -#define _STATIC(name) \ - .section ".text"; \ - .align 2 ; \ - .section ".opd","aw"; \ -name: \ - .quad GLUE(.,name); \ - .quad .TOC.@tocbase; \ - .quad 0; \ - .previous; \ - .type GLUE(.,name),@function; \ -GLUE(.,name): - -#else /* __ASSEMBLY__ */ - -/* - * Default implementation of macro that returns current - * instruction pointer ("program counter"). - */ -#define current_text_addr() ({ __label__ _l; _l: &&_l;}) - -/* Macros for setting and retrieving special purpose registers */ - -#define mfmsr() ({unsigned long rval; \ - asm volatile("mfmsr %0" : "=r" (rval)); rval;}) - -#define __mtmsrd(v, l) asm volatile("mtmsrd %0," __stringify(l) \ - : : "r" (v)) -#define mtmsrd(v) __mtmsrd((v), 0) - -#define mfspr(rn) ({unsigned long rval; \ - asm volatile("mfspr %0," __stringify(rn) \ - : "=r" (rval)); rval;}) -#define mtspr(rn, v) asm volatile("mtspr " __stringify(rn) ",%0" : : "r" (v)) - -#define mftb() ({unsigned long rval; \ - asm volatile("mftb %0" : "=r" (rval)); rval;}) - -#define mttbl(v) asm volatile("mttbl %0":: "r"(v)) -#define mttbu(v) asm volatile("mttbu %0":: "r"(v)) - -#define mfasr() ({unsigned long rval; \ - asm volatile("mfasr %0" : "=r" (rval)); rval;}) - -static inline void set_tb(unsigned int upper, unsigned int lower) -{ - mttbl(0); - mttbu(upper); - mttbl(lower); -} - -#define __get_SP() ({unsigned long sp; \ - asm volatile("mr %0,1": "=r" (sp)); sp;}) - -#ifdef __KERNEL__ - -extern int have_of; -extern u64 ppc64_interrupt_controller; - -struct task_struct; -void start_thread(struct pt_regs *regs, unsigned long fdptr, unsigned long sp); -void release_thread(struct task_struct *); - -/* Prepare to copy thread state - unlazy all lazy status */ -extern void prepare_to_copy(struct task_struct *tsk); - -/* Create a new kernel thread. */ -extern long kernel_thread(int (*fn)(void *), void *arg, unsigned long flags); - -/* Lazy FPU handling on uni-processor */ -extern struct task_struct *last_task_used_math; -extern struct task_struct *last_task_used_altivec; - -/* 64-bit user address space is 44-bits (16TB user VM) */ -#define TASK_SIZE_USER64 (0x0000100000000000UL) - -/* - * 32-bit user address space is 4GB - 1 page - * (this 1 page is needed so referencing of 0xFFFFFFFF generates EFAULT - */ -#define TASK_SIZE_USER32 (0x0000000100000000UL - (1*PAGE_SIZE)) - -#define TASK_SIZE (test_thread_flag(TIF_32BIT) ? \ - TASK_SIZE_USER32 : TASK_SIZE_USER64) - -/* This decides where the kernel will search for a free chunk of vm - * space during mmap's. - */ -#define TASK_UNMAPPED_BASE_USER32 (PAGE_ALIGN(TASK_SIZE_USER32 / 4)) -#define TASK_UNMAPPED_BASE_USER64 (PAGE_ALIGN(TASK_SIZE_USER64 / 4)) - -#define TASK_UNMAPPED_BASE ((test_thread_flag(TIF_32BIT)||(ppcdebugset(PPCDBG_BINFMT_32ADDR))) ? \ - TASK_UNMAPPED_BASE_USER32 : TASK_UNMAPPED_BASE_USER64 ) - -typedef struct { - unsigned long seg; -} mm_segment_t; - -struct thread_struct { - unsigned long ksp; /* Kernel stack pointer */ - unsigned long ksp_vsid; - struct pt_regs *regs; /* Pointer to saved register state */ - mm_segment_t fs; /* for get_fs() validation */ - double fpr[32]; /* Complete floating point set */ - unsigned long fpscr; /* Floating point status (plus pad) */ - unsigned long fpexc_mode; /* Floating-point exception mode */ - unsigned long start_tb; /* Start purr when proc switched in */ - unsigned long accum_tb; /* Total accumilated purr for process */ - unsigned long vdso_base; /* base of the vDSO library */ - unsigned long dabr; /* Data address breakpoint register */ -#ifdef CONFIG_ALTIVEC - /* Complete AltiVec register set */ - vector128 vr[32] __attribute((aligned(16))); - /* AltiVec status */ - vector128 vscr __attribute((aligned(16))); - unsigned long vrsave; - int used_vr; /* set if process has used altivec */ -#endif /* CONFIG_ALTIVEC */ -}; - -#define ARCH_MIN_TASKALIGN 16 - -#define INIT_SP (sizeof(init_stack) + (unsigned long) &init_stack) - -#define INIT_THREAD { \ - .ksp = INIT_SP, \ - .regs = (struct pt_regs *)INIT_SP - 1, \ - .fs = KERNEL_DS, \ - .fpr = {0}, \ - .fpscr = 0, \ - .fpexc_mode = MSR_FE0|MSR_FE1, \ -} - -/* - * Return saved PC of a blocked thread. For now, this is the "user" PC - */ -#define thread_saved_pc(tsk) \ - ((tsk)->thread.regs? (tsk)->thread.regs->nip: 0) - -unsigned long get_wchan(struct task_struct *p); - -#define KSTK_EIP(tsk) ((tsk)->thread.regs? (tsk)->thread.regs->nip: 0) -#define KSTK_ESP(tsk) ((tsk)->thread.regs? (tsk)->thread.regs->gpr[1]: 0) - -/* Get/set floating-point exception mode */ -#define GET_FPEXC_CTL(tsk, adr) get_fpexc_mode((tsk), (adr)) -#define SET_FPEXC_CTL(tsk, val) set_fpexc_mode((tsk), (val)) - -extern int get_fpexc_mode(struct task_struct *tsk, unsigned long adr); -extern int set_fpexc_mode(struct task_struct *tsk, unsigned int val); - -static inline unsigned int __unpack_fe01(unsigned long msr_bits) -{ - return ((msr_bits & MSR_FE0) >> 10) | ((msr_bits & MSR_FE1) >> 8); -} - -static inline unsigned long __pack_fe01(unsigned int fpmode) -{ - return ((fpmode << 10) & MSR_FE0) | ((fpmode << 8) & MSR_FE1); -} - -#define cpu_relax() do { HMT_low(); HMT_medium(); barrier(); } while (0) - -/* - * Prefetch macros. - */ -#define ARCH_HAS_PREFETCH -#define ARCH_HAS_PREFETCHW -#define ARCH_HAS_SPINLOCK_PREFETCH - -static inline void prefetch(const void *x) -{ - if (unlikely(!x)) - return; - - __asm__ __volatile__ ("dcbt 0,%0" : : "r" (x)); -} - -static inline void prefetchw(const void *x) -{ - if (unlikely(!x)) - return; - - __asm__ __volatile__ ("dcbtst 0,%0" : : "r" (x)); -} - -#define spin_lock_prefetch(x) prefetchw(x) - -#define HAVE_ARCH_PICK_MMAP_LAYOUT - -static inline void ppc64_runlatch_on(void) -{ - unsigned long ctrl; - - if (cpu_has_feature(CPU_FTR_CTRL)) { - ctrl = mfspr(SPRN_CTRLF); - ctrl |= CTRL_RUNLATCH; - mtspr(SPRN_CTRLT, ctrl); - } -} - -static inline void ppc64_runlatch_off(void) -{ - unsigned long ctrl; - - if (cpu_has_feature(CPU_FTR_CTRL)) { - ctrl = mfspr(SPRN_CTRLF); - ctrl &= ~CTRL_RUNLATCH; - mtspr(SPRN_CTRLT, ctrl); - } -} - -#endif /* __KERNEL__ */ - -#endif /* __ASSEMBLY__ */ - -#ifdef __KERNEL__ -#define RUNLATCH_ON(REG) \ -BEGIN_FTR_SECTION \ - mfspr (REG),SPRN_CTRLF; \ - ori (REG),(REG),CTRL_RUNLATCH; \ - mtspr SPRN_CTRLT,(REG); \ -END_FTR_SECTION_IFSET(CPU_FTR_CTRL) -#endif - -/* - * Number of entries in the SLB. If this ever changes we should handle - * it with a use a cpu feature fixup. - */ -#define SLB_NUM_ENTRIES 64 - -#endif /* __ASM_PPC64_PROCESSOR_H */ diff --git a/include/asm-ppc64/ptrace-common.h b/include/asm-ppc64/ptrace-common.h deleted file mode 100644 index b1babb729673..000000000000 --- a/include/asm-ppc64/ptrace-common.h +++ /dev/null @@ -1,164 +0,0 @@ -/* - * linux/arch/ppc64/kernel/ptrace-common.h - * - * Copyright (c) 2002 Stephen Rothwell, IBM Coproration - * Extracted from ptrace.c and ptrace32.c - * - * This file is subject to the terms and conditions of the GNU General - * Public License. See the file README.legal in the main directory of - * this archive for more details. - */ - -#ifndef _PPC64_PTRACE_COMMON_H -#define _PPC64_PTRACE_COMMON_H - -#include <linux/config.h> -#include <asm/system.h> - -/* - * Set of msr bits that gdb can change on behalf of a process. - */ -#define MSR_DEBUGCHANGE (MSR_FE0 | MSR_SE | MSR_BE | MSR_FE1) - -/* - * Get contents of register REGNO in task TASK. - */ -static inline unsigned long get_reg(struct task_struct *task, int regno) -{ - unsigned long tmp = 0; - - /* - * Put the correct FP bits in, they might be wrong as a result - * of our lazy FP restore. - */ - if (regno == PT_MSR) { - tmp = ((unsigned long *)task->thread.regs)[PT_MSR]; - tmp |= task->thread.fpexc_mode; - } else if (regno < (sizeof(struct pt_regs) / sizeof(unsigned long))) { - tmp = ((unsigned long *)task->thread.regs)[regno]; - } - - return tmp; -} - -/* - * Write contents of register REGNO in task TASK. - */ -static inline int put_reg(struct task_struct *task, int regno, - unsigned long data) -{ - if (regno < PT_SOFTE) { - if (regno == PT_MSR) - data = (data & MSR_DEBUGCHANGE) - | (task->thread.regs->msr & ~MSR_DEBUGCHANGE); - ((unsigned long *)task->thread.regs)[regno] = data; - return 0; - } - return -EIO; -} - -static inline void set_single_step(struct task_struct *task) -{ - struct pt_regs *regs = task->thread.regs; - if (regs != NULL) - regs->msr |= MSR_SE; - set_ti_thread_flag(task->thread_info, TIF_SINGLESTEP); -} - -static inline void clear_single_step(struct task_struct *task) -{ - struct pt_regs *regs = task->thread.regs; - if (regs != NULL) - regs->msr &= ~MSR_SE; - clear_ti_thread_flag(task->thread_info, TIF_SINGLESTEP); -} - -#ifdef CONFIG_ALTIVEC -/* - * Get/set all the altivec registers vr0..vr31, vscr, vrsave, in one go. - * The transfer totals 34 quadword. Quadwords 0-31 contain the - * corresponding vector registers. Quadword 32 contains the vscr as the - * last word (offset 12) within that quadword. Quadword 33 contains the - * vrsave as the first word (offset 0) within the quadword. - * - * This definition of the VMX state is compatible with the current PPC32 - * ptrace interface. This allows signal handling and ptrace to use the - * same structures. This also simplifies the implementation of a bi-arch - * (combined (32- and 64-bit) gdb. - */ - -/* - * Get contents of AltiVec register state in task TASK - */ -static inline int get_vrregs(unsigned long __user *data, - struct task_struct *task) -{ - unsigned long regsize; - - /* copy AltiVec registers VR[0] .. VR[31] */ - regsize = 32 * sizeof(vector128); - if (copy_to_user(data, task->thread.vr, regsize)) - return -EFAULT; - data += (regsize / sizeof(unsigned long)); - - /* copy VSCR */ - regsize = 1 * sizeof(vector128); - if (copy_to_user(data, &task->thread.vscr, regsize)) - return -EFAULT; - data += (regsize / sizeof(unsigned long)); - - /* copy VRSAVE */ - if (put_user(task->thread.vrsave, (u32 __user *)data)) - return -EFAULT; - - return 0; -} - -/* - * Write contents of AltiVec register state into task TASK. - */ -static inline int set_vrregs(struct task_struct *task, - unsigned long __user *data) -{ - unsigned long regsize; - - /* copy AltiVec registers VR[0] .. VR[31] */ - regsize = 32 * sizeof(vector128); - if (copy_from_user(task->thread.vr, data, regsize)) - return -EFAULT; - data += (regsize / sizeof(unsigned long)); - - /* copy VSCR */ - regsize = 1 * sizeof(vector128); - if (copy_from_user(&task->thread.vscr, data, regsize)) - return -EFAULT; - data += (regsize / sizeof(unsigned long)); - - /* copy VRSAVE */ - if (get_user(task->thread.vrsave, (u32 __user *)data)) - return -EFAULT; - - return 0; -} -#endif - -static inline int ptrace_set_debugreg(struct task_struct *task, - unsigned long addr, unsigned long data) -{ - /* We only support one DABR and no IABRS at the moment */ - if (addr > 0) - return -EINVAL; - - /* The bottom 3 bits are flags */ - if ((data & ~0x7UL) >= TASK_SIZE) - return -EIO; - - /* Ensure translation is on */ - if (data && !(data & DABR_TRANSLATION)) - return -EIO; - - task->thread.dabr = data; - return 0; -} - -#endif /* _PPC64_PTRACE_COMMON_H */ diff --git a/include/asm-ppc64/signal.h b/include/asm-ppc64/signal.h deleted file mode 100644 index 432df7dd355d..000000000000 --- a/include/asm-ppc64/signal.h +++ /dev/null @@ -1,132 +0,0 @@ -#ifndef _ASMPPC64_SIGNAL_H -#define _ASMPPC64_SIGNAL_H - -#include <linux/types.h> -#include <linux/compiler.h> -#include <asm/siginfo.h> - -/* Avoid too many header ordering problems. */ -struct siginfo; - -#define _NSIG 64 -#define _NSIG_BPW 64 -#define _NSIG_WORDS (_NSIG / _NSIG_BPW) - -typedef unsigned long old_sigset_t; /* at least 32 bits */ - -typedef struct { - unsigned long sig[_NSIG_WORDS]; -} sigset_t; - -#define SIGHUP 1 -#define SIGINT 2 -#define SIGQUIT 3 -#define SIGILL 4 -#define SIGTRAP 5 -#define SIGABRT 6 -#define SIGIOT 6 -#define SIGBUS 7 -#define SIGFPE 8 -#define SIGKILL 9 -#define SIGUSR1 10 -#define SIGSEGV 11 -#define SIGUSR2 12 -#define SIGPIPE 13 -#define SIGALRM 14 -#define SIGTERM 15 -#define SIGSTKFLT 16 -#define SIGCHLD 17 -#define SIGCONT 18 -#define SIGSTOP 19 -#define SIGTSTP 20 -#define SIGTTIN 21 -#define SIGTTOU 22 -#define SIGURG 23 -#define SIGXCPU 24 -#define SIGXFSZ 25 -#define SIGVTALRM 26 -#define SIGPROF 27 -#define SIGWINCH 28 -#define SIGIO 29 -#define SIGPOLL SIGIO -/* -#define SIGLOST 29 -*/ -#define SIGPWR 30 -#define SIGSYS 31 -#define SIGUNUSED 31 - -/* These should not be considered constants from userland. */ -#define SIGRTMIN 32 -#define SIGRTMAX _NSIG - -/* - * SA_FLAGS values: - * - * SA_ONSTACK is not currently supported, but will allow sigaltstack(2). - * SA_INTERRUPT is a no-op, but left due to historical reasons. Use the - * SA_RESTART flag to get restarting signals (which were the default long ago) - * SA_NOCLDSTOP flag to turn off SIGCHLD when children stop. - * SA_RESETHAND clears the handler when the signal is delivered. - * SA_NOCLDWAIT flag on SIGCHLD to inhibit zombies. - * SA_NODEFER prevents the current signal from being masked in the handler. - * - * SA_ONESHOT and SA_NOMASK are the historical Linux names for the Single - * Unix names RESETHAND and NODEFER respectively. - */ -#define SA_NOCLDSTOP 0x00000001u -#define SA_NOCLDWAIT 0x00000002u -#define SA_SIGINFO 0x00000004u -#define SA_ONSTACK 0x08000000u -#define SA_RESTART 0x10000000u -#define SA_NODEFER 0x40000000u -#define SA_RESETHAND 0x80000000u - -#define SA_NOMASK SA_NODEFER -#define SA_ONESHOT SA_RESETHAND -#define SA_INTERRUPT 0x20000000u /* dummy -- ignored */ - -#define SA_RESTORER 0x04000000u - -/* - * sigaltstack controls - */ -#define SS_ONSTACK 1 -#define SS_DISABLE 2 - -#define MINSIGSTKSZ 2048 -#define SIGSTKSZ 8192 - -#include <asm-generic/signal.h> - -struct old_sigaction { - __sighandler_t sa_handler; - old_sigset_t sa_mask; - unsigned long sa_flags; - __sigrestore_t sa_restorer; -}; - -struct sigaction { - __sighandler_t sa_handler; - unsigned long sa_flags; - __sigrestore_t sa_restorer; - sigset_t sa_mask; /* mask last for extensibility */ -}; - -struct k_sigaction { - struct sigaction sa; -}; - -typedef struct sigaltstack { - void __user *ss_sp; - int ss_flags; - size_t ss_size; -} stack_t; - -struct pt_regs; -struct timespec; -extern int do_signal(sigset_t *oldset, struct pt_regs *regs); -extern int do_signal32(sigset_t *oldset, struct pt_regs *regs); -#define ptrace_signal_deliver(regs, cookie) do { } while (0) - -#endif /* _ASMPPC64_SIGNAL_H */ diff --git a/include/asm-ppc64/smu.h b/include/asm-ppc64/smu.h deleted file mode 100644 index 10b4397af9aa..000000000000 --- a/include/asm-ppc64/smu.h +++ /dev/null @@ -1,22 +0,0 @@ -/* - * Definitions for talking to the SMU chip in newer G5 PowerMacs - */ - -#include <linux/config.h> - -/* - * Basic routines for use by architecture. To be extended as - * we understand more of the chip - */ -extern int smu_init(void); -extern int smu_present(void); -extern void smu_shutdown(void); -extern void smu_restart(void); -extern int smu_get_rtc_time(struct rtc_time *time); -extern int smu_set_rtc_time(struct rtc_time *time); - -/* - * SMU command buffer absolute address, exported by pmac_setup, - * this is allocated very early during boot. - */ -extern unsigned long smu_cmdbuf_abs; diff --git a/include/asm-ppc64/sparsemem.h b/include/asm-ppc64/sparsemem.h deleted file mode 100644 index c5bd47e57f17..000000000000 --- a/include/asm-ppc64/sparsemem.h +++ /dev/null @@ -1,16 +0,0 @@ -#ifndef _ASM_PPC64_SPARSEMEM_H -#define _ASM_PPC64_SPARSEMEM_H 1 - -#ifdef CONFIG_SPARSEMEM -/* - * SECTION_SIZE_BITS 2^N: how big each section will be - * MAX_PHYSADDR_BITS 2^N: how much physical address space we have - * MAX_PHYSMEM_BITS 2^N: how much memory we can have in that space - */ -#define SECTION_SIZE_BITS 24 -#define MAX_PHYSADDR_BITS 38 -#define MAX_PHYSMEM_BITS 36 - -#endif /* CONFIG_SPARSEMEM */ - -#endif /* _ASM_PPC64_SPARSEMEM_H */ diff --git a/include/asm-ppc64/stat.h b/include/asm-ppc64/stat.h deleted file mode 100644 index 973a5f97951d..000000000000 --- a/include/asm-ppc64/stat.h +++ /dev/null @@ -1,60 +0,0 @@ -#ifndef _PPC64_STAT_H -#define _PPC64_STAT_H - -/* - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ - -#include <linux/types.h> - -struct stat { - unsigned long st_dev; - ino_t st_ino; - nlink_t st_nlink; - mode_t st_mode; - uid_t st_uid; - gid_t st_gid; - unsigned long st_rdev; - off_t st_size; - unsigned long st_blksize; - unsigned long st_blocks; - unsigned long st_atime; - unsigned long st_atime_nsec; - unsigned long st_mtime; - unsigned long st_mtime_nsec; - unsigned long st_ctime; - unsigned long st_ctime_nsec; - unsigned long __unused4; - unsigned long __unused5; - unsigned long __unused6; -}; - -#define STAT_HAVE_NSEC 1 - -/* This matches struct stat64 in glibc2.1. Only used for 32 bit. */ -struct stat64 { - unsigned long st_dev; /* Device. */ - unsigned long st_ino; /* File serial number. */ - unsigned int st_mode; /* File mode. */ - unsigned int st_nlink; /* Link count. */ - unsigned int st_uid; /* User ID of the file's owner. */ - unsigned int st_gid; /* Group ID of the file's group. */ - unsigned long st_rdev; /* Device number, if device. */ - unsigned short __pad2; - long st_size; /* Size of file, in bytes. */ - int st_blksize; /* Optimal block size for I/O. */ - - long st_blocks; /* Number 512-byte blocks allocated. */ - int st_atime; /* Time of last access. */ - int st_atime_nsec; - int st_mtime; /* Time of last modification. */ - int st_mtime_nsec; - int st_ctime; /* Time of last status change. */ - int st_ctime_nsec; - unsigned int __unused4; - unsigned int __unused5; -}; -#endif diff --git a/include/asm-ppc64/systemcfg.h b/include/asm-ppc64/systemcfg.h deleted file mode 100644 index 9b86b53129aa..000000000000 --- a/include/asm-ppc64/systemcfg.h +++ /dev/null @@ -1,64 +0,0 @@ -#ifndef _SYSTEMCFG_H -#define _SYSTEMCFG_H - -/* - * Copyright (C) 2002 Peter Bergner <bergner@vnet.ibm.com>, IBM - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ - -/* Change Activity: - * 2002/09/30 : bergner : Created - * End Change Activity - */ - -/* - * If the major version changes we are incompatible. - * Minor version changes are a hint. - */ -#define SYSTEMCFG_MAJOR 1 -#define SYSTEMCFG_MINOR 1 - -#ifndef __ASSEMBLY__ - -#include <linux/unistd.h> - -#define SYSCALL_MAP_SIZE ((__NR_syscalls + 31) / 32) - -struct systemcfg { - __u8 eye_catcher[16]; /* Eyecatcher: SYSTEMCFG:PPC64 0x00 */ - struct { /* Systemcfg version numbers */ - __u32 major; /* Major number 0x10 */ - __u32 minor; /* Minor number 0x14 */ - } version; - - __u32 platform; /* Platform flags 0x18 */ - __u32 processor; /* Processor type 0x1C */ - __u64 processorCount; /* # of physical processors 0x20 */ - __u64 physicalMemorySize; /* Size of real memory(B) 0x28 */ - __u64 tb_orig_stamp; /* Timebase at boot 0x30 */ - __u64 tb_ticks_per_sec; /* Timebase tics / sec 0x38 */ - __u64 tb_to_xs; /* Inverse of TB to 2^20 0x40 */ - __u64 stamp_xsec; /* 0x48 */ - __u64 tb_update_count; /* Timebase atomicity ctr 0x50 */ - __u32 tz_minuteswest; /* Minutes west of Greenwich 0x58 */ - __u32 tz_dsttime; /* Type of dst correction 0x5C */ - /* next four are no longer used except to be exported to /proc */ - __u32 dcache_size; /* L1 d-cache size 0x60 */ - __u32 dcache_line_size; /* L1 d-cache line size 0x64 */ - __u32 icache_size; /* L1 i-cache size 0x68 */ - __u32 icache_line_size; /* L1 i-cache line size 0x6C */ - __u32 syscall_map_64[SYSCALL_MAP_SIZE]; /* map of available syscalls 0x70 */ - __u32 syscall_map_32[SYSCALL_MAP_SIZE]; /* map of available syscalls */ -}; - -#ifdef __KERNEL__ -extern struct systemcfg *systemcfg; -#endif - -#endif /* __ASSEMBLY__ */ - -#endif /* _SYSTEMCFG_H */ diff --git a/include/asm-ppc64/time.h b/include/asm-ppc64/time.h deleted file mode 100644 index c6c762cad8b0..000000000000 --- a/include/asm-ppc64/time.h +++ /dev/null @@ -1,124 +0,0 @@ -/* - * Common time prototypes and such for all ppc machines. - * - * Written by Cort Dougan (cort@cs.nmt.edu) to merge - * Paul Mackerras' version and mine for PReP and Pmac. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ - -#ifndef __PPC64_TIME_H -#define __PPC64_TIME_H - -#ifdef __KERNEL__ -#include <linux/config.h> -#include <linux/types.h> -#include <linux/mc146818rtc.h> - -#include <asm/processor.h> -#include <asm/paca.h> -#include <asm/iSeries/HvCall.h> - -/* time.c */ -extern unsigned long tb_ticks_per_jiffy; -extern unsigned long tb_ticks_per_usec; -extern unsigned long tb_ticks_per_sec; -extern unsigned long tb_to_xs; -extern unsigned tb_to_us; -extern unsigned long tb_last_stamp; - -struct rtc_time; -extern void to_tm(int tim, struct rtc_time * tm); -extern time_t last_rtc_update; - -void generic_calibrate_decr(void); -void setup_default_decr(void); - -/* Some sane defaults: 125 MHz timebase, 1GHz processor */ -extern unsigned long ppc_proc_freq; -#define DEFAULT_PROC_FREQ (DEFAULT_TB_FREQ * 8) -extern unsigned long ppc_tb_freq; -#define DEFAULT_TB_FREQ 125000000UL - -/* - * By putting all of this stuff into a single struct we - * reduce the number of cache lines touched by do_gettimeofday. - * Both by collecting all of the data in one cache line and - * by touching only one TOC entry - */ -struct gettimeofday_vars { - unsigned long tb_to_xs; - unsigned long stamp_xsec; - unsigned long tb_orig_stamp; -}; - -struct gettimeofday_struct { - unsigned long tb_ticks_per_sec; - struct gettimeofday_vars vars[2]; - struct gettimeofday_vars * volatile varp; - unsigned var_idx; - unsigned tb_to_us; -}; - -struct div_result { - unsigned long result_high; - unsigned long result_low; -}; - -int via_calibrate_decr(void); - -static __inline__ unsigned long get_tb(void) -{ - return mftb(); -} - -/* Accessor functions for the decrementer register. */ -static __inline__ unsigned int get_dec(void) -{ - return (mfspr(SPRN_DEC)); -} - -static __inline__ void set_dec(int val) -{ -#ifdef CONFIG_PPC_ISERIES - struct paca_struct *lpaca = get_paca(); - int cur_dec; - - if (lpaca->lppaca.shared_proc) { - lpaca->lppaca.virtual_decr = val; - cur_dec = get_dec(); - if (cur_dec > val) - HvCall_setVirtualDecr(); - } else -#endif - mtspr(SPRN_DEC, val); -} - -static inline unsigned long tb_ticks_since(unsigned long tstamp) -{ - return get_tb() - tstamp; -} - -#define mulhwu(x,y) \ -({unsigned z; asm ("mulhwu %0,%1,%2" : "=r" (z) : "r" (x), "r" (y)); z;}) -#define mulhdu(x,y) \ -({unsigned long z; asm ("mulhdu %0,%1,%2" : "=r" (z) : "r" (x), "r" (y)); z;}) - - -unsigned mulhwu_scale_factor(unsigned, unsigned); -void div128_by_32( unsigned long dividend_high, unsigned long dividend_low, - unsigned divisor, struct div_result *dr ); - -/* Used to store Processor Utilization register (purr) values */ - -struct cpu_usage { - u64 current_tb; /* Holds the current purr register values */ -}; - -DECLARE_PER_CPU(struct cpu_usage, cpu_usage_array); - -#endif /* __KERNEL__ */ -#endif /* __PPC64_TIME_H */ diff --git a/include/asm-ppc64/tlb.h b/include/asm-ppc64/tlb.h deleted file mode 100644 index 97cb696ce68d..000000000000 --- a/include/asm-ppc64/tlb.h +++ /dev/null @@ -1,39 +0,0 @@ -/* - * TLB shootdown specifics for PPC64 - * - * Copyright (C) 2002 Anton Blanchard, IBM Corp. - * Copyright (C) 2002 Paul Mackerras, IBM Corp. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ -#ifndef _PPC64_TLB_H -#define _PPC64_TLB_H - -#include <asm/tlbflush.h> - -struct mmu_gather; - -extern void pte_free_finish(void); - -static inline void tlb_flush(struct mmu_gather *tlb) -{ - flush_tlb_pending(); - pte_free_finish(); -} - -/* Avoid pulling in another include just for this */ -#define check_pgt_cache() do { } while (0) - -/* Get the generic bits... */ -#include <asm-generic/tlb.h> - -/* Nothing needed here in fact... */ -#define tlb_start_vma(tlb, vma) do { } while (0) -#define tlb_end_vma(tlb, vma) do { } while (0) - -#define __tlb_remove_tlb_entry(tlb, pte, address) do { } while (0) - -#endif /* _PPC64_TLB_H */ diff --git a/include/asm-ppc64/tlbflush.h b/include/asm-ppc64/tlbflush.h deleted file mode 100644 index 45411a67e082..000000000000 --- a/include/asm-ppc64/tlbflush.h +++ /dev/null @@ -1,54 +0,0 @@ -#ifndef _PPC64_TLBFLUSH_H -#define _PPC64_TLBFLUSH_H - -/* - * TLB flushing: - * - * - flush_tlb_mm(mm) flushes the specified mm context TLB's - * - flush_tlb_page(vma, vmaddr) flushes one page - * - flush_tlb_page_nohash(vma, vmaddr) flushes one page if SW loaded TLB - * - flush_tlb_range(vma, start, end) flushes a range of pages - * - flush_tlb_kernel_range(start, end) flushes a range of kernel pages - * - flush_tlb_pgtables(mm, start, end) flushes a range of page tables - */ - -#include <linux/percpu.h> -#include <asm/page.h> - -#define PPC64_TLB_BATCH_NR 192 - -struct mm_struct; -struct ppc64_tlb_batch { - unsigned long index; - unsigned long context; - struct mm_struct *mm; - pte_t pte[PPC64_TLB_BATCH_NR]; - unsigned long addr[PPC64_TLB_BATCH_NR]; - unsigned long vaddr[PPC64_TLB_BATCH_NR]; -}; -DECLARE_PER_CPU(struct ppc64_tlb_batch, ppc64_tlb_batch); - -extern void __flush_tlb_pending(struct ppc64_tlb_batch *batch); - -static inline void flush_tlb_pending(void) -{ - struct ppc64_tlb_batch *batch = &get_cpu_var(ppc64_tlb_batch); - - if (batch->index) - __flush_tlb_pending(batch); - put_cpu_var(ppc64_tlb_batch); -} - -#define flush_tlb_mm(mm) flush_tlb_pending() -#define flush_tlb_page(vma, addr) flush_tlb_pending() -#define flush_tlb_page_nohash(vma, addr) do { } while (0) -#define flush_tlb_range(vma, start, end) \ - do { (void)(start); flush_tlb_pending(); } while (0) -#define flush_tlb_kernel_range(start, end) flush_tlb_pending() -#define flush_tlb_pgtables(mm, start, end) do { } while (0) - -extern void flush_hash_page(unsigned long context, unsigned long ea, pte_t pte, - int local); -void flush_hash_range(unsigned long context, unsigned long number, int local); - -#endif /* _PPC64_TLBFLUSH_H */ diff --git a/include/asm-ppc64/uaccess.h b/include/asm-ppc64/uaccess.h deleted file mode 100644 index c181a60d868c..000000000000 --- a/include/asm-ppc64/uaccess.h +++ /dev/null @@ -1,339 +0,0 @@ -#ifndef _PPC64_UACCESS_H -#define _PPC64_UACCESS_H - -/* - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ - -#ifndef __ASSEMBLY__ -#include <linux/sched.h> -#include <linux/errno.h> -#include <asm/processor.h> - -#define VERIFY_READ 0 -#define VERIFY_WRITE 1 - -/* - * The fs value determines whether argument validity checking should be - * performed or not. If get_fs() == USER_DS, checking is performed, with - * get_fs() == KERNEL_DS, checking is bypassed. - * - * For historical reasons, these macros are grossly misnamed. - */ - -#define MAKE_MM_SEG(s) ((mm_segment_t) { (s) }) - -#define KERNEL_DS MAKE_MM_SEG(0UL) -#define USER_DS MAKE_MM_SEG(0xf000000000000000UL) - -#define get_ds() (KERNEL_DS) -#define get_fs() (current->thread.fs) -#define set_fs(val) (current->thread.fs = (val)) - -#define segment_eq(a,b) ((a).seg == (b).seg) - -/* - * Use the alpha trick for checking ranges: - * - * Is a address valid? This does a straightforward calculation rather - * than tests. - * - * Address valid if: - * - "addr" doesn't have any high-bits set - * - AND "size" doesn't have any high-bits set - * - OR we are in kernel mode. - * - * We dont have to check for high bits in (addr+size) because the first - * two checks force the maximum result to be below the start of the - * kernel region. - */ -#define __access_ok(addr,size,segment) \ - (((segment).seg & (addr | size )) == 0) - -#define access_ok(type,addr,size) \ - __access_ok(((__force unsigned long)(addr)),(size),get_fs()) - -/* - * The exception table consists of pairs of addresses: the first is the - * address of an instruction that is allowed to fault, and the second is - * the address at which the program should continue. No registers are - * modified, so it is entirely up to the continuation code to figure out - * what to do. - * - * All the routines below use bits of fixup code that are out of line - * with the main instruction path. This means when everything is well, - * we don't even have to jump over them. Further, they do not intrude - * on our cache or tlb entries. - */ - -struct exception_table_entry -{ - unsigned long insn, fixup; -}; - -/* Returns 0 if exception not found and fixup otherwise. */ -extern unsigned long search_exception_table(unsigned long); - -/* - * These are the main single-value transfer routines. They automatically - * use the right size if we just have the right pointer type. - * - * This gets kind of ugly. We want to return _two_ values in "get_user()" - * and yet we don't want to do any pointers, because that is too much - * of a performance impact. Thus we have a few rather ugly macros here, - * and hide all the ugliness from the user. - * - * The "__xxx" versions of the user access functions are versions that - * do not verify the address space, that must have been done previously - * with a separate "access_ok()" call (this is used when we do multiple - * accesses to the same area of user memory). - * - * As we use the same address space for kernel and user data on the - * PowerPC, we can just do these as direct assignments. (Of course, the - * exception handling means that it's no longer "just"...) - */ -#define get_user(x,ptr) \ - __get_user_check((x),(ptr),sizeof(*(ptr))) -#define put_user(x,ptr) \ - __put_user_check((__typeof__(*(ptr)))(x),(ptr),sizeof(*(ptr))) - -#define __get_user(x,ptr) \ - __get_user_nocheck((x),(ptr),sizeof(*(ptr))) -#define __put_user(x,ptr) \ - __put_user_nocheck((__typeof__(*(ptr)))(x),(ptr),sizeof(*(ptr))) - -#define __get_user_unaligned __get_user -#define __put_user_unaligned __put_user - -extern long __put_user_bad(void); - -#define __put_user_nocheck(x,ptr,size) \ -({ \ - long __pu_err; \ - might_sleep(); \ - __chk_user_ptr(ptr); \ - __put_user_size((x),(ptr),(size),__pu_err,-EFAULT); \ - __pu_err; \ -}) - -#define __put_user_check(x,ptr,size) \ -({ \ - long __pu_err = -EFAULT; \ - void __user *__pu_addr = (ptr); \ - might_sleep(); \ - if (access_ok(VERIFY_WRITE,__pu_addr,size)) \ - __put_user_size((x),__pu_addr,(size),__pu_err,-EFAULT); \ - __pu_err; \ -}) - -#define __put_user_size(x,ptr,size,retval,errret) \ -do { \ - retval = 0; \ - switch (size) { \ - case 1: __put_user_asm(x,ptr,retval,"stb",errret); break; \ - case 2: __put_user_asm(x,ptr,retval,"sth",errret); break; \ - case 4: __put_user_asm(x,ptr,retval,"stw",errret); break; \ - case 8: __put_user_asm(x,ptr,retval,"std",errret); break; \ - default: __put_user_bad(); \ - } \ -} while (0) - -/* - * We don't tell gcc that we are accessing memory, but this is OK - * because we do not write to any memory gcc knows about, so there - * are no aliasing issues. - */ -#define __put_user_asm(x, addr, err, op, errret) \ - __asm__ __volatile__( \ - "1: "op" %1,0(%2) # put_user\n" \ - "2:\n" \ - ".section .fixup,\"ax\"\n" \ - "3: li %0,%3\n" \ - " b 2b\n" \ - ".previous\n" \ - ".section __ex_table,\"a\"\n" \ - " .align 3\n" \ - " .llong 1b,3b\n" \ - ".previous" \ - : "=r"(err) \ - : "r"(x), "b"(addr), "i"(errret), "0"(err)) - - -#define __get_user_nocheck(x,ptr,size) \ -({ \ - long __gu_err, __gu_val; \ - might_sleep(); \ - __get_user_size(__gu_val,(ptr),(size),__gu_err,-EFAULT);\ - (x) = (__typeof__(*(ptr)))__gu_val; \ - __gu_err; \ -}) - -#define __get_user_check(x,ptr,size) \ -({ \ - long __gu_err = -EFAULT, __gu_val = 0; \ - const __typeof__(*(ptr)) __user *__gu_addr = (ptr); \ - might_sleep(); \ - if (access_ok(VERIFY_READ,__gu_addr,size)) \ - __get_user_size(__gu_val,__gu_addr,(size),__gu_err,-EFAULT);\ - (x) = (__typeof__(*(ptr)))__gu_val; \ - __gu_err; \ -}) - -extern long __get_user_bad(void); - -#define __get_user_size(x,ptr,size,retval,errret) \ -do { \ - retval = 0; \ - __chk_user_ptr(ptr); \ - switch (size) { \ - case 1: __get_user_asm(x,ptr,retval,"lbz",errret); break; \ - case 2: __get_user_asm(x,ptr,retval,"lhz",errret); break; \ - case 4: __get_user_asm(x,ptr,retval,"lwz",errret); break; \ - case 8: __get_user_asm(x,ptr,retval,"ld",errret); break; \ - default: (x) = __get_user_bad(); \ - } \ -} while (0) - -#define __get_user_asm(x, addr, err, op, errret) \ - __asm__ __volatile__( \ - "1: "op" %1,0(%2) # get_user\n" \ - "2:\n" \ - ".section .fixup,\"ax\"\n" \ - "3: li %0,%3\n" \ - " li %1,0\n" \ - " b 2b\n" \ - ".previous\n" \ - ".section __ex_table,\"a\"\n" \ - " .align 3\n" \ - " .llong 1b,3b\n" \ - ".previous" \ - : "=r"(err), "=r"(x) \ - : "b"(addr), "i"(errret), "0"(err)) - -/* more complex routines */ - -extern unsigned long __copy_tofrom_user(void __user *to, const void __user *from, - unsigned long size); - -static inline unsigned long -__copy_from_user_inatomic(void *to, const void __user *from, unsigned long n) -{ - if (__builtin_constant_p(n)) { - unsigned long ret; - - switch (n) { - case 1: - __get_user_size(*(u8 *)to, from, 1, ret, 1); - return ret; - case 2: - __get_user_size(*(u16 *)to, from, 2, ret, 2); - return ret; - case 4: - __get_user_size(*(u32 *)to, from, 4, ret, 4); - return ret; - case 8: - __get_user_size(*(u64 *)to, from, 8, ret, 8); - return ret; - } - } - return __copy_tofrom_user((__force void __user *) to, from, n); -} - -static inline unsigned long -__copy_from_user(void *to, const void __user *from, unsigned long n) -{ - might_sleep(); - return __copy_from_user_inatomic(to, from, n); -} - -static inline unsigned long -__copy_to_user_inatomic(void __user *to, const void *from, unsigned long n) -{ - if (__builtin_constant_p(n)) { - unsigned long ret; - - switch (n) { - case 1: - __put_user_size(*(u8 *)from, (u8 __user *)to, 1, ret, 1); - return ret; - case 2: - __put_user_size(*(u16 *)from, (u16 __user *)to, 2, ret, 2); - return ret; - case 4: - __put_user_size(*(u32 *)from, (u32 __user *)to, 4, ret, 4); - return ret; - case 8: - __put_user_size(*(u64 *)from, (u64 __user *)to, 8, ret, 8); - return ret; - } - } - return __copy_tofrom_user(to, (__force const void __user *) from, n); -} - -static inline unsigned long -__copy_to_user(void __user *to, const void *from, unsigned long n) -{ - might_sleep(); - return __copy_to_user_inatomic(to, from, n); -} - -#define __copy_in_user(to, from, size) \ - __copy_tofrom_user((to), (from), (size)) - -extern unsigned long copy_from_user(void *to, const void __user *from, - unsigned long n); -extern unsigned long copy_to_user(void __user *to, const void *from, - unsigned long n); -extern unsigned long copy_in_user(void __user *to, const void __user *from, - unsigned long n); - -extern unsigned long __clear_user(void __user *addr, unsigned long size); - -static inline unsigned long -clear_user(void __user *addr, unsigned long size) -{ - might_sleep(); - if (likely(access_ok(VERIFY_WRITE, addr, size))) - size = __clear_user(addr, size); - return size; -} - -extern int __strncpy_from_user(char *dst, const char __user *src, long count); - -static inline long -strncpy_from_user(char *dst, const char __user *src, long count) -{ - might_sleep(); - if (likely(access_ok(VERIFY_READ, src, 1))) - return __strncpy_from_user(dst, src, count); - return -EFAULT; -} - -/* - * Return the size of a string (including the ending 0) - * - * Return 0 for error - */ -extern int __strnlen_user(const char __user *str, long len); - -/* - * Returns the length of the string at str (including the null byte), - * or 0 if we hit a page we can't access, - * or something > len if we didn't find a null byte. - */ -static inline int strnlen_user(const char __user *str, long len) -{ - might_sleep(); - if (likely(access_ok(VERIFY_READ, str, 1))) - return __strnlen_user(str, len); - return 0; -} - -#define strlen_user(str) strnlen_user((str), 0x7ffffffe) - -#endif /* __ASSEMBLY__ */ - -#endif /* _PPC64_UACCESS_H */ diff --git a/include/asm-ppc64/ucontext.h b/include/asm-ppc64/ucontext.h deleted file mode 100644 index ef8cc5b37542..000000000000 --- a/include/asm-ppc64/ucontext.h +++ /dev/null @@ -1,22 +0,0 @@ -#ifndef _ASMPPC64_UCONTEXT_H -#define _ASMPPC64_UCONTEXT_H - -#include <asm/sigcontext.h> - -/* - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ - -struct ucontext { - unsigned long uc_flags; - struct ucontext *uc_link; - stack_t uc_stack; - sigset_t uc_sigmask; - sigset_t __unsued[15]; /* Allow for uc_sigmask growth */ - struct sigcontext uc_mcontext; /* last for extensibility */ -}; - -#endif /* _ASMPPC64_UCONTEXT_H */ diff --git a/include/asm-ppc64/uninorth.h b/include/asm-ppc64/uninorth.h deleted file mode 100644 index 7ad7059f2c80..000000000000 --- a/include/asm-ppc64/uninorth.h +++ /dev/null @@ -1,2 +0,0 @@ -#include <asm-ppc/uninorth.h> - diff --git a/include/asm-ppc64/unistd.h b/include/asm-ppc64/unistd.h deleted file mode 100644 index 977bc980c1af..000000000000 --- a/include/asm-ppc64/unistd.h +++ /dev/null @@ -1,487 +0,0 @@ -#ifndef _ASM_PPC_UNISTD_H_ -#define _ASM_PPC_UNISTD_H_ - -/* - * This file contains the system call numbers. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ - -#define __NR_restart_syscall 0 -#define __NR_exit 1 -#define __NR_fork 2 -#define __NR_read 3 -#define __NR_write 4 -#define __NR_open 5 -#define __NR_close 6 -#define __NR_waitpid 7 -#define __NR_creat 8 -#define __NR_link 9 -#define __NR_unlink 10 -#define __NR_execve 11 -#define __NR_chdir 12 -#define __NR_time 13 -#define __NR_mknod 14 -#define __NR_chmod 15 -#define __NR_lchown 16 -#define __NR_break 17 -#define __NR_oldstat 18 -#define __NR_lseek 19 -#define __NR_getpid 20 -#define __NR_mount 21 -#define __NR_umount 22 -#define __NR_setuid 23 -#define __NR_getuid 24 -#define __NR_stime 25 -#define __NR_ptrace 26 -#define __NR_alarm 27 -#define __NR_oldfstat 28 -#define __NR_pause 29 -#define __NR_utime 30 -#define __NR_stty 31 -#define __NR_gtty 32 -#define __NR_access 33 -#define __NR_nice 34 -#define __NR_ftime 35 -#define __NR_sync 36 -#define __NR_kill 37 -#define __NR_rename 38 -#define __NR_mkdir 39 -#define __NR_rmdir 40 -#define __NR_dup 41 -#define __NR_pipe 42 -#define __NR_times 43 -#define __NR_prof 44 -#define __NR_brk 45 -#define __NR_setgid 46 -#define __NR_getgid 47 -#define __NR_signal 48 -#define __NR_geteuid 49 -#define __NR_getegid 50 -#define __NR_acct 51 -#define __NR_umount2 52 -#define __NR_lock 53 -#define __NR_ioctl 54 -#define __NR_fcntl 55 -#define __NR_mpx 56 -#define __NR_setpgid 57 -#define __NR_ulimit 58 -#define __NR_oldolduname 59 -#define __NR_umask 60 -#define __NR_chroot 61 -#define __NR_ustat 62 -#define __NR_dup2 63 -#define __NR_getppid 64 -#define __NR_getpgrp 65 -#define __NR_setsid 66 -#define __NR_sigaction 67 -#define __NR_sgetmask 68 -#define __NR_ssetmask 69 -#define __NR_setreuid 70 -#define __NR_setregid 71 -#define __NR_sigsuspend 72 -#define __NR_sigpending 73 -#define __NR_sethostname 74 -#define __NR_setrlimit 75 -#define __NR_getrlimit 76 -#define __NR_getrusage 77 -#define __NR_gettimeofday 78 -#define __NR_settimeofday 79 -#define __NR_getgroups 80 -#define __NR_setgroups 81 -#define __NR_select 82 -#define __NR_symlink 83 -#define __NR_oldlstat 84 -#define __NR_readlink 85 -#define __NR_uselib 86 -#define __NR_swapon 87 -#define __NR_reboot 88 -#define __NR_readdir 89 -#define __NR_mmap 90 -#define __NR_munmap 91 -#define __NR_truncate 92 -#define __NR_ftruncate 93 -#define __NR_fchmod 94 -#define __NR_fchown 95 -#define __NR_getpriority 96 -#define __NR_setpriority 97 -#define __NR_profil 98 -#define __NR_statfs 99 -#define __NR_fstatfs 100 -#define __NR_ioperm 101 -#define __NR_socketcall 102 -#define __NR_syslog 103 -#define __NR_setitimer 104 -#define __NR_getitimer 105 -#define __NR_stat 106 -#define __NR_lstat 107 -#define __NR_fstat 108 -#define __NR_olduname 109 -#define __NR_iopl 110 -#define __NR_vhangup 111 -#define __NR_idle 112 -#define __NR_vm86 113 -#define __NR_wait4 114 -#define __NR_swapoff 115 -#define __NR_sysinfo 116 -#define __NR_ipc 117 -#define __NR_fsync 118 -#define __NR_sigreturn 119 -#define __NR_clone 120 -#define __NR_setdomainname 121 -#define __NR_uname 122 -#define __NR_modify_ldt 123 -#define __NR_adjtimex 124 -#define __NR_mprotect 125 -#define __NR_sigprocmask 126 -#define __NR_create_module 127 -#define __NR_init_module 128 -#define __NR_delete_module 129 -#define __NR_get_kernel_syms 130 -#define __NR_quotactl 131 -#define __NR_getpgid 132 -#define __NR_fchdir 133 -#define __NR_bdflush 134 -#define __NR_sysfs 135 -#define __NR_personality 136 -#define __NR_afs_syscall 137 /* Syscall for Andrew File System */ -#define __NR_setfsuid 138 -#define __NR_setfsgid 139 -#define __NR__llseek 140 -#define __NR_getdents 141 -#define __NR__newselect 142 -#define __NR_flock 143 -#define __NR_msync 144 -#define __NR_readv 145 -#define __NR_writev 146 -#define __NR_getsid 147 -#define __NR_fdatasync 148 -#define __NR__sysctl 149 -#define __NR_mlock 150 -#define __NR_munlock 151 -#define __NR_mlockall 152 -#define __NR_munlockall 153 -#define __NR_sched_setparam 154 -#define __NR_sched_getparam 155 -#define __NR_sched_setscheduler 156 -#define __NR_sched_getscheduler 157 -#define __NR_sched_yield 158 -#define __NR_sched_get_priority_max 159 -#define __NR_sched_get_priority_min 160 -#define __NR_sched_rr_get_interval 161 -#define __NR_nanosleep 162 -#define __NR_mremap 163 -#define __NR_setresuid 164 -#define __NR_getresuid 165 -#define __NR_query_module 166 -#define __NR_poll 167 -#define __NR_nfsservctl 168 -#define __NR_setresgid 169 -#define __NR_getresgid 170 -#define __NR_prctl 171 -#define __NR_rt_sigreturn 172 -#define __NR_rt_sigaction 173 -#define __NR_rt_sigprocmask 174 -#define __NR_rt_sigpending 175 -#define __NR_rt_sigtimedwait 176 -#define __NR_rt_sigqueueinfo 177 -#define __NR_rt_sigsuspend 178 -#define __NR_pread64 179 -#define __NR_pwrite64 180 -#define __NR_chown 181 -#define __NR_getcwd 182 -#define __NR_capget 183 -#define __NR_capset 184 -#define __NR_sigaltstack 185 -#define __NR_sendfile 186 -#define __NR_getpmsg 187 /* some people actually want streams */ -#define __NR_putpmsg 188 /* some people actually want streams */ -#define __NR_vfork 189 -#define __NR_ugetrlimit 190 /* SuS compliant getrlimit */ -#define __NR_readahead 191 -/* #define __NR_mmap2 192 32bit only */ -/* #define __NR_truncate64 193 32bit only */ -/* #define __NR_ftruncate64 194 32bit only */ -/* #define __NR_stat64 195 32bit only */ -/* #define __NR_lstat64 196 32bit only */ -/* #define __NR_fstat64 197 32bit only */ -#define __NR_pciconfig_read 198 -#define __NR_pciconfig_write 199 -#define __NR_pciconfig_iobase 200 -#define __NR_multiplexer 201 -#define __NR_getdents64 202 -#define __NR_pivot_root 203 -/* #define __NR_fcntl64 204 32bit only */ -#define __NR_madvise 205 -#define __NR_mincore 206 -#define __NR_gettid 207 -#define __NR_tkill 208 -#define __NR_setxattr 209 -#define __NR_lsetxattr 210 -#define __NR_fsetxattr 211 -#define __NR_getxattr 212 -#define __NR_lgetxattr 213 -#define __NR_fgetxattr 214 -#define __NR_listxattr 215 -#define __NR_llistxattr 216 -#define __NR_flistxattr 217 -#define __NR_removexattr 218 -#define __NR_lremovexattr 219 -#define __NR_fremovexattr 220 -#define __NR_futex 221 -#define __NR_sched_setaffinity 222 -#define __NR_sched_getaffinity 223 -/* 224 currently unused */ -#define __NR_tuxcall 225 -/* #define __NR_sendfile64 226 32bit only */ -#define __NR_io_setup 227 -#define __NR_io_destroy 228 -#define __NR_io_getevents 229 -#define __NR_io_submit 230 -#define __NR_io_cancel 231 -#define __NR_set_tid_address 232 -#define __NR_fadvise64 233 -#define __NR_exit_group 234 -#define __NR_lookup_dcookie 235 -#define __NR_epoll_create 236 -#define __NR_epoll_ctl 237 -#define __NR_epoll_wait 238 -#define __NR_remap_file_pages 239 -#define __NR_timer_create 240 -#define __NR_timer_settime 241 -#define __NR_timer_gettime 242 -#define __NR_timer_getoverrun 243 -#define __NR_timer_delete 244 -#define __NR_clock_settime 245 -#define __NR_clock_gettime 246 -#define __NR_clock_getres 247 -#define __NR_clock_nanosleep 248 -#define __NR_swapcontext 249 -#define __NR_tgkill 250 -#define __NR_utimes 251 -#define __NR_statfs64 252 -#define __NR_fstatfs64 253 -/* #define __NR_fadvise64_64 254 32bit only */ -#define __NR_rtas 255 -/* Number 256 is reserved for sys_debug_setcontext */ -/* Number 257 is reserved for vserver */ -/* 258 currently unused */ -#define __NR_mbind 259 -#define __NR_get_mempolicy 260 -#define __NR_set_mempolicy 261 -#define __NR_mq_open 262 -#define __NR_mq_unlink 263 -#define __NR_mq_timedsend 264 -#define __NR_mq_timedreceive 265 -#define __NR_mq_notify 266 -#define __NR_mq_getsetattr 267 -#define __NR_kexec_load 268 -#define __NR_add_key 269 -#define __NR_request_key 270 -#define __NR_keyctl 271 -#define __NR_waitid 272 -#define __NR_ioprio_set 273 -#define __NR_ioprio_get 274 -#define __NR_inotify_init 275 -#define __NR_inotify_add_watch 276 -#define __NR_inotify_rm_watch 277 - -#define __NR_syscalls 278 -#ifdef __KERNEL__ -#define NR_syscalls __NR_syscalls -#endif - -#ifndef __ASSEMBLY__ - -/* On powerpc a system call basically clobbers the same registers like a - * function call, with the exception of LR (which is needed for the - * "sc; bnslr" sequence) and CR (where only CR0.SO is clobbered to signal - * an error return status). - */ - -#define __syscall_nr(nr, type, name, args...) \ - unsigned long __sc_ret, __sc_err; \ - { \ - register unsigned long __sc_0 __asm__ ("r0"); \ - register unsigned long __sc_3 __asm__ ("r3"); \ - register unsigned long __sc_4 __asm__ ("r4"); \ - register unsigned long __sc_5 __asm__ ("r5"); \ - register unsigned long __sc_6 __asm__ ("r6"); \ - register unsigned long __sc_7 __asm__ ("r7"); \ - register unsigned long __sc_8 __asm__ ("r8"); \ - \ - __sc_loadargs_##nr(name, args); \ - __asm__ __volatile__ \ - ("sc \n\t" \ - "mfcr %0 " \ - : "=&r" (__sc_0), \ - "=&r" (__sc_3), "=&r" (__sc_4), \ - "=&r" (__sc_5), "=&r" (__sc_6), \ - "=&r" (__sc_7), "=&r" (__sc_8) \ - : __sc_asm_input_##nr \ - : "cr0", "ctr", "memory", \ - "r9", "r10","r11", "r12"); \ - __sc_ret = __sc_3; \ - __sc_err = __sc_0; \ - } \ - if (__sc_err & 0x10000000) \ - { \ - errno = __sc_ret; \ - __sc_ret = -1; \ - } \ - return (type) __sc_ret - -#define __sc_loadargs_0(name, dummy...) \ - __sc_0 = __NR_##name -#define __sc_loadargs_1(name, arg1) \ - __sc_loadargs_0(name); \ - __sc_3 = (unsigned long) (arg1) -#define __sc_loadargs_2(name, arg1, arg2) \ - __sc_loadargs_1(name, arg1); \ - __sc_4 = (unsigned long) (arg2) -#define __sc_loadargs_3(name, arg1, arg2, arg3) \ - __sc_loadargs_2(name, arg1, arg2); \ - __sc_5 = (unsigned long) (arg3) -#define __sc_loadargs_4(name, arg1, arg2, arg3, arg4) \ - __sc_loadargs_3(name, arg1, arg2, arg3); \ - __sc_6 = (unsigned long) (arg4) -#define __sc_loadargs_5(name, arg1, arg2, arg3, arg4, arg5) \ - __sc_loadargs_4(name, arg1, arg2, arg3, arg4); \ - __sc_7 = (unsigned long) (arg5) -#define __sc_loadargs_6(name, arg1, arg2, arg3, arg4, arg5, arg6) \ - __sc_loadargs_5(name, arg1, arg2, arg3, arg4, arg5); \ - __sc_8 = (unsigned long) (arg6) - -#define __sc_asm_input_0 "0" (__sc_0) -#define __sc_asm_input_1 __sc_asm_input_0, "1" (__sc_3) -#define __sc_asm_input_2 __sc_asm_input_1, "2" (__sc_4) -#define __sc_asm_input_3 __sc_asm_input_2, "3" (__sc_5) -#define __sc_asm_input_4 __sc_asm_input_3, "4" (__sc_6) -#define __sc_asm_input_5 __sc_asm_input_4, "5" (__sc_7) -#define __sc_asm_input_6 __sc_asm_input_5, "6" (__sc_8) - -#define _syscall0(type,name) \ -type name(void) \ -{ \ - __syscall_nr(0, type, name); \ -} - -#define _syscall1(type,name,type1,arg1) \ -type name(type1 arg1) \ -{ \ - __syscall_nr(1, type, name, arg1); \ -} - -#define _syscall2(type,name,type1,arg1,type2,arg2) \ -type name(type1 arg1, type2 arg2) \ -{ \ - __syscall_nr(2, type, name, arg1, arg2); \ -} - -#define _syscall3(type,name,type1,arg1,type2,arg2,type3,arg3) \ -type name(type1 arg1, type2 arg2, type3 arg3) \ -{ \ - __syscall_nr(3, type, name, arg1, arg2, arg3); \ -} - -#define _syscall4(type,name,type1,arg1,type2,arg2,type3,arg3,type4,arg4) \ -type name(type1 arg1, type2 arg2, type3 arg3, type4 arg4) \ -{ \ - __syscall_nr(4, type, name, arg1, arg2, arg3, arg4); \ -} - -#define _syscall5(type,name,type1,arg1,type2,arg2,type3,arg3,type4,arg4,type5,arg5) \ -type name(type1 arg1, type2 arg2, type3 arg3, type4 arg4, type5 arg5) \ -{ \ - __syscall_nr(5, type, name, arg1, arg2, arg3, arg4, arg5); \ -} -#define _syscall6(type,name,type1,arg1,type2,arg2,type3,arg3,type4,arg4,type5,arg5,type6,arg6) \ -type name(type1 arg1, type2 arg2, type3 arg3, type4 arg4, type5 arg5, type6 arg6) \ -{ \ - __syscall_nr(6, type, name, arg1, arg2, arg3, arg4, arg5, arg6); \ -} - -#ifdef __KERNEL_SYSCALLS__ - -/* - * Forking from kernel space will result in the child getting a new, - * empty kernel stack area. Thus the child cannot access automatic - * variables set in the parent unless they are in registers, and the - * procedure where the fork was done cannot return to its caller in - * the child. - */ - -/* - * System call prototypes. - */ -static inline _syscall3(int, execve, __const__ char *, file, char **, argv, - char **,envp) - -#endif /* __KERNEL_SYSCALLS__ */ - -#ifdef __KERNEL__ - -#include <linux/types.h> -#include <linux/compiler.h> -#include <linux/linkage.h> - -#define __ARCH_WANT_IPC_PARSE_VERSION -#define __ARCH_WANT_OLD_READDIR -#define __ARCH_WANT_STAT64 -#define __ARCH_WANT_SYS_ALARM -#define __ARCH_WANT_SYS_GETHOSTNAME -#define __ARCH_WANT_SYS_PAUSE -#define __ARCH_WANT_SYS_SGETMASK -#define __ARCH_WANT_SYS_SIGNAL -#define __ARCH_WANT_SYS_TIME -#define __ARCH_WANT_COMPAT_SYS_TIME -#define __ARCH_WANT_SYS_UTIME -#define __ARCH_WANT_SYS_WAITPID -#define __ARCH_WANT_SYS_SOCKETCALL -#define __ARCH_WANT_SYS_FADVISE64 -#define __ARCH_WANT_SYS_GETPGRP -#define __ARCH_WANT_SYS_LLSEEK -#define __ARCH_WANT_SYS_NICE -#define __ARCH_WANT_SYS_OLD_GETRLIMIT -#define __ARCH_WANT_SYS_OLDUMOUNT -#define __ARCH_WANT_SYS_SIGPENDING -#define __ARCH_WANT_SYS_SIGPROCMASK -#define __ARCH_WANT_SYS_RT_SIGACTION - -unsigned long sys_mmap(unsigned long addr, size_t len, unsigned long prot, - unsigned long flags, unsigned long fd, off_t offset); -struct pt_regs; -int sys_execve(unsigned long a0, unsigned long a1, unsigned long a2, - unsigned long a3, unsigned long a4, unsigned long a5, - struct pt_regs *regs); -int sys_clone(unsigned long clone_flags, unsigned long p2, unsigned long p3, - unsigned long p4, unsigned long p5, unsigned long p6, - struct pt_regs *regs); -int sys_fork(unsigned long p1, unsigned long p2, unsigned long p3, - unsigned long p4, unsigned long p5, unsigned long p6, - struct pt_regs *regs); -int sys_vfork(unsigned long p1, unsigned long p2, unsigned long p3, - unsigned long p4, unsigned long p5, unsigned long p6, - struct pt_regs *regs); -int sys_pipe(int __user *fildes); -int sys_ptrace(long request, long pid, long addr, long data); -struct sigaction; -long sys_rt_sigaction(int sig, const struct sigaction __user *act, - struct sigaction __user *oact, size_t sigsetsize); - -/* - * "Conditional" syscalls - * - * What we want is __attribute__((weak,alias("sys_ni_syscall"))), - * but it doesn't work on all toolchains, so we just do it by hand - */ -#define cond_syscall(x) asm(".weak\t." #x "\n\t.set\t." #x ",.sys_ni_syscall") - -#endif /* __KERNEL__ */ - -#endif /* __ASSEMBLY__ */ - -#endif /* _ASM_PPC_UNISTD_H_ */ diff --git a/include/asm-ppc64/xics.h b/include/asm-ppc64/xics.h deleted file mode 100644 index 1092af55d707..000000000000 --- a/include/asm-ppc64/xics.h +++ /dev/null @@ -1,34 +0,0 @@ -/* - * arch/ppc64/kernel/xics.h - * - * Copyright 2000 IBM Corporation. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ - -#ifndef _PPC64_KERNEL_XICS_H -#define _PPC64_KERNEL_XICS_H - -#include <linux/cache.h> - -void xics_init_IRQ(void); -int xics_get_irq(struct pt_regs *); -void xics_setup_cpu(void); -void xics_teardown_cpu(int secondary); -void xics_cause_IPI(int cpu); -void xics_request_IPIs(void); -void xics_migrate_irqs_away(void); - -/* first argument is ignored for now*/ -void pSeriesLP_cppr_info(int n_cpu, u8 value); - -struct xics_ipi_struct { - volatile unsigned long value; -} ____cacheline_aligned; - -extern struct xics_ipi_struct xics_ipi_message[NR_CPUS] __cacheline_aligned; - -#endif /* _PPC64_KERNEL_XICS_H */ diff --git a/include/asm-s390/atomic.h b/include/asm-s390/atomic.h index 9d86ba6f12d0..b3bd4f679f72 100644 --- a/include/asm-s390/atomic.h +++ b/include/asm-s390/atomic.h @@ -198,6 +198,18 @@ atomic_compare_and_swap(int expected_oldval,int new_val,atomic_t *v) return retval; } +#define atomic_cmpxchg(v, o, n) (atomic_compare_and_swap((o), (n), &((v)->counter))) + +#define atomic_add_unless(v, a, u) \ +({ \ + int c, old; \ + c = atomic_read(v); \ + while (c != (u) && (old = atomic_cmpxchg((v), c, c + (a))) != c) \ + c = old; \ + c != (u); \ +}) +#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0) + #define smp_mb__before_atomic_dec() smp_mb() #define smp_mb__after_atomic_dec() smp_mb() #define smp_mb__before_atomic_inc() smp_mb() diff --git a/include/asm-s390/bitops.h b/include/asm-s390/bitops.h index 8651524217fd..b07c578b22ea 100644 --- a/include/asm-s390/bitops.h +++ b/include/asm-s390/bitops.h @@ -518,8 +518,8 @@ static inline int __test_bit(unsigned long nr, const volatile unsigned long *ptr static inline int __constant_test_bit(unsigned long nr, const volatile unsigned long *addr) { - return (((volatile char *) addr) - [(nr^(__BITOPS_WORDSIZE-8))>>3] & (1<<(nr&7))); + return ((((volatile char *) addr) + [(nr^(__BITOPS_WORDSIZE-8))>>3] & (1<<(nr&7)))) != 0; } #define test_bit(nr,addr) \ diff --git a/include/asm-s390/debug.h b/include/asm-s390/debug.h index 7127030ae162..23450ed4b571 100644 --- a/include/asm-s390/debug.h +++ b/include/asm-s390/debug.h @@ -129,7 +129,7 @@ void debug_set_level(debug_info_t* id, int new_level); void debug_stop_all(void); -extern inline debug_entry_t* +static inline debug_entry_t* debug_event(debug_info_t* id, int level, void* data, int length) { if ((!id) || (level > id->level) || (id->pages_per_area == 0)) @@ -137,7 +137,7 @@ debug_event(debug_info_t* id, int level, void* data, int length) return debug_event_common(id,level,data,length); } -extern inline debug_entry_t* +static inline debug_entry_t* debug_int_event(debug_info_t* id, int level, unsigned int tag) { unsigned int t=tag; @@ -146,7 +146,7 @@ debug_int_event(debug_info_t* id, int level, unsigned int tag) return debug_event_common(id,level,&t,sizeof(unsigned int)); } -extern inline debug_entry_t * +static inline debug_entry_t * debug_long_event (debug_info_t* id, int level, unsigned long tag) { unsigned long t=tag; @@ -155,7 +155,7 @@ debug_long_event (debug_info_t* id, int level, unsigned long tag) return debug_event_common(id,level,&t,sizeof(unsigned long)); } -extern inline debug_entry_t* +static inline debug_entry_t* debug_text_event(debug_info_t* id, int level, const char* txt) { if ((!id) || (level > id->level) || (id->pages_per_area == 0)) @@ -168,7 +168,7 @@ debug_sprintf_event(debug_info_t* id,int level,char *string,...) __attribute__ ((format(printf, 3, 4))); -extern inline debug_entry_t* +static inline debug_entry_t* debug_exception(debug_info_t* id, int level, void* data, int length) { if ((!id) || (level > id->level) || (id->pages_per_area == 0)) @@ -176,7 +176,7 @@ debug_exception(debug_info_t* id, int level, void* data, int length) return debug_exception_common(id,level,data,length); } -extern inline debug_entry_t* +static inline debug_entry_t* debug_int_exception(debug_info_t* id, int level, unsigned int tag) { unsigned int t=tag; @@ -185,7 +185,7 @@ debug_int_exception(debug_info_t* id, int level, unsigned int tag) return debug_exception_common(id,level,&t,sizeof(unsigned int)); } -extern inline debug_entry_t * +static inline debug_entry_t * debug_long_exception (debug_info_t* id, int level, unsigned long tag) { unsigned long t=tag; @@ -194,7 +194,7 @@ debug_long_exception (debug_info_t* id, int level, unsigned long tag) return debug_exception_common(id,level,&t,sizeof(unsigned long)); } -extern inline debug_entry_t* +static inline debug_entry_t* debug_text_exception(debug_info_t* id, int level, const char* txt) { if ((!id) || (level > id->level) || (id->pages_per_area == 0)) diff --git a/include/asm-s390/ebcdic.h b/include/asm-s390/ebcdic.h index 20e81e885821..4cbc336e4d60 100644 --- a/include/asm-s390/ebcdic.h +++ b/include/asm-s390/ebcdic.h @@ -21,7 +21,7 @@ extern __u8 _ebcasc[]; /* EBCDIC -> ASCII conversion table */ extern __u8 _ebc_tolower[]; /* EBCDIC -> lowercase */ extern __u8 _ebc_toupper[]; /* EBCDIC -> uppercase */ -extern __inline__ void +static inline void codepage_convert(const __u8 *codepage, volatile __u8 * addr, unsigned long nr) { if (nr-- <= 0) diff --git a/include/asm-s390/elf.h b/include/asm-s390/elf.h index 3b8bd46832a1..372d51cccd53 100644 --- a/include/asm-s390/elf.h +++ b/include/asm-s390/elf.h @@ -96,6 +96,7 @@ * ELF register definitions.. */ +#include <linux/sched.h> /* for task_struct */ #include <asm/ptrace.h> #include <asm/user.h> #include <asm/system.h> /* for save_access_regs */ diff --git a/include/asm-s390/io.h b/include/asm-s390/io.h index 8188fdc9884f..71f55eb2350a 100644 --- a/include/asm-s390/io.h +++ b/include/asm-s390/io.h @@ -24,7 +24,7 @@ * Change virtual addresses to physical addresses and vv. * These are pretty trivial */ -extern inline unsigned long virt_to_phys(volatile void * address) +static inline unsigned long virt_to_phys(volatile void * address) { unsigned long real_address; __asm__ ( @@ -42,7 +42,7 @@ extern inline unsigned long virt_to_phys(volatile void * address) return real_address; } -extern inline void * phys_to_virt(unsigned long address) +static inline void * phys_to_virt(unsigned long address) { return __io_virt(address); } @@ -54,7 +54,7 @@ extern inline void * phys_to_virt(unsigned long address) extern void * __ioremap(unsigned long offset, unsigned long size, unsigned long flags); -extern inline void * ioremap (unsigned long offset, unsigned long size) +static inline void * ioremap (unsigned long offset, unsigned long size) { return __ioremap(offset, size, 0); } @@ -64,7 +64,7 @@ extern inline void * ioremap (unsigned long offset, unsigned long size) * it's useful if some control registers are in such an area and write combining * or read caching is not desirable: */ -extern inline void * ioremap_nocache (unsigned long offset, unsigned long size) +static inline void * ioremap_nocache (unsigned long offset, unsigned long size) { return __ioremap(offset, size, 0); } diff --git a/include/asm-s390/lowcore.h b/include/asm-s390/lowcore.h index c6f51c9ce3ff..db0606c1abd4 100644 --- a/include/asm-s390/lowcore.h +++ b/include/asm-s390/lowcore.h @@ -346,7 +346,7 @@ struct _lowcore #define S390_lowcore (*((struct _lowcore *) 0)) extern struct _lowcore *lowcore_ptr[]; -extern __inline__ void set_prefix(__u32 address) +static inline void set_prefix(__u32 address) { __asm__ __volatile__ ("spx %0" : : "m" (address) : "memory" ); } diff --git a/include/asm-s390/mmu_context.h b/include/asm-s390/mmu_context.h index 3a3bb3f2dad5..bcf24a873874 100644 --- a/include/asm-s390/mmu_context.h +++ b/include/asm-s390/mmu_context.h @@ -44,7 +44,7 @@ static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next, #define deactivate_mm(tsk,mm) do { } while (0) -extern inline void activate_mm(struct mm_struct *prev, +static inline void activate_mm(struct mm_struct *prev, struct mm_struct *next) { switch_mm(prev, next, current); diff --git a/include/asm-s390/pgtable.h b/include/asm-s390/pgtable.h index df94f89038cc..859b5e969826 100644 --- a/include/asm-s390/pgtable.h +++ b/include/asm-s390/pgtable.h @@ -36,6 +36,7 @@ #include <linux/threads.h> struct vm_area_struct; /* forward declaration (include/linux/mm.h) */ +struct mm_struct; extern pgd_t swapper_pg_dir[] __attribute__ ((aligned (4096))); extern void paging_init(void); @@ -318,7 +319,7 @@ extern char empty_zero_page[PAGE_SIZE]; * within a page table are directly modified. Thus, the following * hook is made available. */ -extern inline void set_pte(pte_t *pteptr, pte_t pteval) +static inline void set_pte(pte_t *pteptr, pte_t pteval) { *pteptr = pteval; } @@ -329,63 +330,63 @@ extern inline void set_pte(pte_t *pteptr, pte_t pteval) */ #ifndef __s390x__ -extern inline int pgd_present(pgd_t pgd) { return 1; } -extern inline int pgd_none(pgd_t pgd) { return 0; } -extern inline int pgd_bad(pgd_t pgd) { return 0; } +static inline int pgd_present(pgd_t pgd) { return 1; } +static inline int pgd_none(pgd_t pgd) { return 0; } +static inline int pgd_bad(pgd_t pgd) { return 0; } -extern inline int pmd_present(pmd_t pmd) { return pmd_val(pmd) & _SEG_PRESENT; } -extern inline int pmd_none(pmd_t pmd) { return pmd_val(pmd) & _PAGE_TABLE_INV; } -extern inline int pmd_bad(pmd_t pmd) +static inline int pmd_present(pmd_t pmd) { return pmd_val(pmd) & _SEG_PRESENT; } +static inline int pmd_none(pmd_t pmd) { return pmd_val(pmd) & _PAGE_TABLE_INV; } +static inline int pmd_bad(pmd_t pmd) { return (pmd_val(pmd) & (~PAGE_MASK & ~_PAGE_TABLE_INV)) != _PAGE_TABLE; } #else /* __s390x__ */ -extern inline int pgd_present(pgd_t pgd) +static inline int pgd_present(pgd_t pgd) { return (pgd_val(pgd) & ~PAGE_MASK) == _PGD_ENTRY; } -extern inline int pgd_none(pgd_t pgd) +static inline int pgd_none(pgd_t pgd) { return pgd_val(pgd) & _PGD_ENTRY_INV; } -extern inline int pgd_bad(pgd_t pgd) +static inline int pgd_bad(pgd_t pgd) { return (pgd_val(pgd) & (~PAGE_MASK & ~_PGD_ENTRY_INV)) != _PGD_ENTRY; } -extern inline int pmd_present(pmd_t pmd) +static inline int pmd_present(pmd_t pmd) { return (pmd_val(pmd) & ~PAGE_MASK) == _PMD_ENTRY; } -extern inline int pmd_none(pmd_t pmd) +static inline int pmd_none(pmd_t pmd) { return pmd_val(pmd) & _PMD_ENTRY_INV; } -extern inline int pmd_bad(pmd_t pmd) +static inline int pmd_bad(pmd_t pmd) { return (pmd_val(pmd) & (~PAGE_MASK & ~_PMD_ENTRY_INV)) != _PMD_ENTRY; } #endif /* __s390x__ */ -extern inline int pte_none(pte_t pte) +static inline int pte_none(pte_t pte) { return (pte_val(pte) & _PAGE_INVALID_MASK) == _PAGE_INVALID_EMPTY; } -extern inline int pte_present(pte_t pte) +static inline int pte_present(pte_t pte) { return !(pte_val(pte) & _PAGE_INVALID) || (pte_val(pte) & _PAGE_INVALID_MASK) == _PAGE_INVALID_NONE; } -extern inline int pte_file(pte_t pte) +static inline int pte_file(pte_t pte) { return (pte_val(pte) & _PAGE_INVALID_MASK) == _PAGE_INVALID_FILE; } @@ -396,12 +397,12 @@ extern inline int pte_file(pte_t pte) * query functions pte_write/pte_dirty/pte_young only work if * pte_present() is true. Undefined behaviour if not.. */ -extern inline int pte_write(pte_t pte) +static inline int pte_write(pte_t pte) { return (pte_val(pte) & _PAGE_RO) == 0; } -extern inline int pte_dirty(pte_t pte) +static inline int pte_dirty(pte_t pte) { /* A pte is neither clean nor dirty on s/390. The dirty bit * is in the storage key. See page_test_and_clear_dirty for @@ -410,7 +411,7 @@ extern inline int pte_dirty(pte_t pte) return 0; } -extern inline int pte_young(pte_t pte) +static inline int pte_young(pte_t pte) { /* A pte is neither young nor old on s/390. The young bit * is in the storage key. See page_test_and_clear_young for @@ -419,7 +420,7 @@ extern inline int pte_young(pte_t pte) return 0; } -extern inline int pte_read(pte_t pte) +static inline int pte_read(pte_t pte) { /* All pages are readable since we don't use the fetch * protection bit in the storage key. @@ -433,9 +434,9 @@ extern inline int pte_read(pte_t pte) #ifndef __s390x__ -extern inline void pgd_clear(pgd_t * pgdp) { } +static inline void pgd_clear(pgd_t * pgdp) { } -extern inline void pmd_clear(pmd_t * pmdp) +static inline void pmd_clear(pmd_t * pmdp) { pmd_val(pmdp[0]) = _PAGE_TABLE_INV; pmd_val(pmdp[1]) = _PAGE_TABLE_INV; @@ -445,12 +446,12 @@ extern inline void pmd_clear(pmd_t * pmdp) #else /* __s390x__ */ -extern inline void pgd_clear(pgd_t * pgdp) +static inline void pgd_clear(pgd_t * pgdp) { pgd_val(*pgdp) = _PGD_ENTRY_INV | _PGD_ENTRY; } -extern inline void pmd_clear(pmd_t * pmdp) +static inline void pmd_clear(pmd_t * pmdp) { pmd_val(*pmdp) = _PMD_ENTRY_INV | _PMD_ENTRY; pmd_val1(*pmdp) = _PMD_ENTRY_INV | _PMD_ENTRY; @@ -458,7 +459,7 @@ extern inline void pmd_clear(pmd_t * pmdp) #endif /* __s390x__ */ -extern inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep) +static inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep) { pte_val(*ptep) = _PAGE_INVALID_EMPTY; } @@ -467,14 +468,14 @@ extern inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *pt * The following pte modification functions only work if * pte_present() is true. Undefined behaviour if not.. */ -extern inline pte_t pte_modify(pte_t pte, pgprot_t newprot) +static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) { pte_val(pte) &= PAGE_MASK; pte_val(pte) |= pgprot_val(newprot); return pte; } -extern inline pte_t pte_wrprotect(pte_t pte) +static inline pte_t pte_wrprotect(pte_t pte) { /* Do not clobber _PAGE_INVALID_NONE pages! */ if (!(pte_val(pte) & _PAGE_INVALID)) @@ -482,13 +483,13 @@ extern inline pte_t pte_wrprotect(pte_t pte) return pte; } -extern inline pte_t pte_mkwrite(pte_t pte) +static inline pte_t pte_mkwrite(pte_t pte) { pte_val(pte) &= ~_PAGE_RO; return pte; } -extern inline pte_t pte_mkclean(pte_t pte) +static inline pte_t pte_mkclean(pte_t pte) { /* The only user of pte_mkclean is the fork() code. We must *not* clear the *physical* page dirty bit @@ -497,7 +498,7 @@ extern inline pte_t pte_mkclean(pte_t pte) return pte; } -extern inline pte_t pte_mkdirty(pte_t pte) +static inline pte_t pte_mkdirty(pte_t pte) { /* We do not explicitly set the dirty bit because the * sske instruction is slow. It is faster to let the @@ -506,7 +507,7 @@ extern inline pte_t pte_mkdirty(pte_t pte) return pte; } -extern inline pte_t pte_mkold(pte_t pte) +static inline pte_t pte_mkold(pte_t pte) { /* S/390 doesn't keep its dirty/referenced bit in the pte. * There is no point in clearing the real referenced bit. @@ -514,7 +515,7 @@ extern inline pte_t pte_mkold(pte_t pte) return pte; } -extern inline pte_t pte_mkyoung(pte_t pte) +static inline pte_t pte_mkyoung(pte_t pte) { /* S/390 doesn't keep its dirty/referenced bit in the pte. * There is no point in setting the real referenced bit. @@ -694,7 +695,7 @@ static inline pte_t mk_pte_phys(unsigned long physpage, pgprot_t pgprot) #ifndef __s390x__ /* Find an entry in the second-level page table.. */ -extern inline pmd_t * pmd_offset(pgd_t * dir, unsigned long address) +static inline pmd_t * pmd_offset(pgd_t * dir, unsigned long address) { return (pmd_t *) dir; } @@ -757,7 +758,7 @@ extern inline pmd_t * pmd_offset(pgd_t * dir, unsigned long address) #else #define __SWP_OFFSET_MASK (~0UL >> 11) #endif -extern inline pte_t mk_swap_pte(unsigned long type, unsigned long offset) +static inline pte_t mk_swap_pte(unsigned long type, unsigned long offset) { pte_t pte; offset &= __SWP_OFFSET_MASK; diff --git a/include/asm-s390/ptrace.h b/include/asm-s390/ptrace.h index fc7c96edc697..a949cc077cc7 100644 --- a/include/asm-s390/ptrace.h +++ b/include/asm-s390/ptrace.h @@ -468,6 +468,8 @@ struct user_regs_struct }; #ifdef __KERNEL__ +#define __ARCH_SYS_PTRACE 1 + #define user_mode(regs) (((regs)->psw.mask & PSW_MASK_PSTATE) != 0) #define instruction_pointer(regs) ((regs)->psw.addr & PSW_ADDR_INSN) #define profile_pc(regs) instruction_pointer(regs) diff --git a/include/asm-s390/rwsem.h b/include/asm-s390/rwsem.h index 8c0cebbfc034..0422a085dd56 100644 --- a/include/asm-s390/rwsem.h +++ b/include/asm-s390/rwsem.h @@ -351,5 +351,10 @@ static inline long rwsem_atomic_update(long delta, struct rw_semaphore *sem) return new; } +static inline int rwsem_is_locked(struct rw_semaphore *sem) +{ + return (sem->count != 0); +} + #endif /* __KERNEL__ */ #endif /* _S390_RWSEM_H */ diff --git a/include/asm-s390/semaphore.h b/include/asm-s390/semaphore.h index 873def6f363a..702cf436698c 100644 --- a/include/asm-s390/semaphore.h +++ b/include/asm-s390/semaphore.h @@ -29,9 +29,6 @@ struct semaphore { #define __SEMAPHORE_INITIALIZER(name,count) \ { ATOMIC_INIT(count), __WAIT_QUEUE_HEAD_INITIALIZER((name).wait) } -#define __MUTEX_INITIALIZER(name) \ - __SEMAPHORE_INITIALIZER(name,1) - #define __DECLARE_SEMAPHORE_GENERIC(name,count) \ struct semaphore name = __SEMAPHORE_INITIALIZER(name,count) diff --git a/include/asm-s390/setup.h b/include/asm-s390/setup.h index 0d51c484c2ea..348a88137445 100644 --- a/include/asm-s390/setup.h +++ b/include/asm-s390/setup.h @@ -8,11 +8,14 @@ #ifndef _ASM_S390_SETUP_H #define _ASM_S390_SETUP_H +#include <asm/types.h> + #define PARMAREA 0x10400 #define COMMAND_LINE_SIZE 896 #define RAMDISK_ORIGIN 0x800000 #define RAMDISK_SIZE 0x800000 #define MEMORY_CHUNKS 16 /* max 0x7fff */ +#define IPL_PARMBLOCK_ORIGIN 0x2000 #ifndef __ASSEMBLY__ @@ -64,6 +67,53 @@ extern unsigned int console_irq; #define SET_CONSOLE_3215 do { console_mode = 2; } while (0) #define SET_CONSOLE_3270 do { console_mode = 3; } while (0) +struct ipl_list_header { + u32 length; + u8 reserved[3]; + u8 version; +} __attribute__((packed)); + +struct ipl_block_fcp { + u32 length; + u8 pbt; + u8 reserved1[322-1]; + u16 devno; + u8 reserved2[4]; + u64 wwpn; + u64 lun; + u32 bootprog; + u8 reserved3[12]; + u64 br_lba; + u32 scp_data_len; + u8 reserved4[260]; + u8 scp_data[]; +} __attribute__((packed)); + +struct ipl_parameter_block { + union { + u32 length; + struct ipl_list_header header; + } hdr; + struct ipl_block_fcp fcp; +} __attribute__((packed)); + +#define IPL_MAX_SUPPORTED_VERSION (0) + +#define IPL_TYPE_FCP (0) + +/* + * IPL validity flags and parameters as detected in head.S + */ +extern u32 ipl_parameter_flags; +extern u16 ipl_devno; + +#define IPL_DEVNO_VALID (ipl_parameter_flags & 1) +#define IPL_PARMBLOCK_VALID (ipl_parameter_flags & 2) + +#define IPL_PARMBLOCK_START ((struct ipl_parameter_block *) \ + IPL_PARMBLOCK_ORIGIN) +#define IPL_PARMBLOCK_SIZE (IPL_PARMBLOCK_START->hdr.length) + #else #ifndef __s390x__ diff --git a/include/asm-s390/sigcontext.h b/include/asm-s390/sigcontext.h index d57bc0cebdce..803545351dd8 100644 --- a/include/asm-s390/sigcontext.h +++ b/include/asm-s390/sigcontext.h @@ -61,7 +61,7 @@ typedef struct struct sigcontext { unsigned long oldmask[_SIGCONTEXT_NSIG_WORDS]; - _sigregs *sregs; + _sigregs __user *sregs; }; diff --git a/include/asm-s390/signal.h b/include/asm-s390/signal.h index 3d6e11c6c1fd..7084626de215 100644 --- a/include/asm-s390/signal.h +++ b/include/asm-s390/signal.h @@ -165,7 +165,7 @@ struct sigaction { #endif /* __KERNEL__ */ typedef struct sigaltstack { - void *ss_sp; + void __user *ss_sp; int ss_flags; size_t ss_size; } stack_t; diff --git a/include/asm-s390/sigp.h b/include/asm-s390/sigp.h index 3979bc3858e2..fc56458aff66 100644 --- a/include/asm-s390/sigp.h +++ b/include/asm-s390/sigp.h @@ -67,7 +67,7 @@ typedef enum /* * Signal processor */ -extern __inline__ sigp_ccode +static inline sigp_ccode signal_processor(__u16 cpu_addr, sigp_order_code order_code) { sigp_ccode ccode; @@ -86,7 +86,7 @@ signal_processor(__u16 cpu_addr, sigp_order_code order_code) /* * Signal processor with parameter */ -extern __inline__ sigp_ccode +static inline sigp_ccode signal_processor_p(__u32 parameter, __u16 cpu_addr, sigp_order_code order_code) { @@ -107,7 +107,7 @@ signal_processor_p(__u32 parameter, __u16 cpu_addr, /* * Signal processor with parameter and return status */ -extern __inline__ sigp_ccode +static inline sigp_ccode signal_processor_ps(__u32 *statusptr, __u32 parameter, __u16 cpu_addr, sigp_order_code order_code) { diff --git a/include/asm-s390/smp.h b/include/asm-s390/smp.h index dd50e57a928f..a2ae7628bbaa 100644 --- a/include/asm-s390/smp.h +++ b/include/asm-s390/smp.h @@ -52,7 +52,7 @@ extern int smp_call_function_on(void (*func) (void *info), void *info, extern int smp_get_cpu(cpumask_t cpu_map); extern void smp_put_cpu(int cpu); -extern __inline__ __u16 hard_smp_processor_id(void) +static inline __u16 hard_smp_processor_id(void) { __u16 cpu_address; diff --git a/include/asm-s390/uaccess.h b/include/asm-s390/uaccess.h index 38a5cf8ab9e3..10a619da4761 100644 --- a/include/asm-s390/uaccess.h +++ b/include/asm-s390/uaccess.h @@ -200,21 +200,37 @@ extern int __put_user_bad(void) __attribute__((noreturn)); #define __get_user(x, ptr) \ ({ \ - __typeof__(*(ptr)) __x; \ int __gu_err; \ __chk_user_ptr(ptr); \ switch (sizeof(*(ptr))) { \ - case 1: \ - case 2: \ - case 4: \ - case 8: \ + case 1: { \ + unsigned char __x; \ + __get_user_asm(__x, ptr, __gu_err); \ + (x) = (__typeof__(*(ptr))) __x; \ + break; \ + }; \ + case 2: { \ + unsigned short __x; \ + __get_user_asm(__x, ptr, __gu_err); \ + (x) = (__typeof__(*(ptr))) __x; \ + break; \ + }; \ + case 4: { \ + unsigned int __x; \ + __get_user_asm(__x, ptr, __gu_err); \ + (x) = (__typeof__(*(ptr))) __x; \ + break; \ + }; \ + case 8: { \ + unsigned long long __x; \ __get_user_asm(__x, ptr, __gu_err); \ + (x) = (__typeof__(*(ptr))) __x; \ break; \ + }; \ default: \ __get_user_bad(); \ break; \ } \ - (x) = __x; \ __gu_err; \ }) diff --git a/include/asm-s390/unistd.h b/include/asm-s390/unistd.h index 221e965da924..f97d92691f17 100644 --- a/include/asm-s390/unistd.h +++ b/include/asm-s390/unistd.h @@ -590,7 +590,6 @@ asmlinkage long sys_clone(struct pt_regs regs); asmlinkage long sys_fork(struct pt_regs regs); asmlinkage long sys_vfork(struct pt_regs regs); asmlinkage long sys_pipe(unsigned long __user *fildes); -asmlinkage long sys_ptrace(long request, long pid, long addr, long data); struct sigaction; asmlinkage long sys_rt_sigaction(int sig, const struct sigaction __user *act, diff --git a/include/asm-s390/vtoc.h b/include/asm-s390/vtoc.h index a14e34e80b88..41d369f38b0e 100644 --- a/include/asm-s390/vtoc.h +++ b/include/asm-s390/vtoc.h @@ -1,372 +1,179 @@ -#ifndef __KERNEL__ -#include <string.h> -#include <stdlib.h> -#include <stdio.h> -#include <errno.h> -#include <ctype.h> -#include <time.h> -#include <fcntl.h> -#include <unistd.h> +/* + * include/asm-s390/vtoc.h + * + * This file contains volume label definitions for DASD devices. + * + * (C) Copyright IBM Corp. 2005 + * + * Author(s): Volker Sameske <sameske@de.ibm.com> + * + */ + +#ifndef _ASM_S390_VTOC_H +#define _ASM_S390_VTOC_H -#include <sys/stat.h> -#include <sys/ioctl.h> - -#include <linux/fs.h> #include <linux/types.h> -#include <linux/hdreg.h> -#include <asm/dasd.h> -#endif - - -#define LINE_LENGTH 80 -#define VTOC_START_CC 0x0 -#define VTOC_START_HH 0x1 -#define FIRST_USABLE_CYL 1 -#define FIRST_USABLE_TRK 2 - -#define DASD_3380_TYPE 13148 -#define DASD_3390_TYPE 13200 -#define DASD_9345_TYPE 37701 - -#define DASD_3380_VALUE 0xbb60 -#define DASD_3390_VALUE 0xe5a2 -#define DASD_9345_VALUE 0xbc98 - -#define VOLSER_LENGTH 6 -#define BIG_DISK_SIZE 0x10000 - -#define VTOC_ERROR "VTOC error:" - -typedef struct ttr +struct vtoc_ttr { - __u16 tt; - __u8 r; -} __attribute__ ((packed)) ttr_t; + __u16 tt; + __u8 r; +} __attribute__ ((packed)); -typedef struct cchhb +struct vtoc_cchhb { - __u16 cc; - __u16 hh; - __u8 b; -} __attribute__ ((packed)) cchhb_t; + __u16 cc; + __u16 hh; + __u8 b; +} __attribute__ ((packed)); -typedef struct cchh +struct vtoc_cchh { - __u16 cc; - __u16 hh; -} __attribute__ ((packed)) cchh_t; + __u16 cc; + __u16 hh; +} __attribute__ ((packed)); -typedef struct labeldate +struct vtoc_labeldate { - __u8 year; - __u16 day; -} __attribute__ ((packed)) labeldate_t; + __u8 year; + __u16 day; +} __attribute__ ((packed)); - -typedef struct volume_label +struct vtoc_volume_label { - char volkey[4]; /* volume key = volume label */ - char vollbl[4]; /* volume label */ - char volid[6]; /* volume identifier */ - __u8 security; /* security byte */ - cchhb_t vtoc; /* VTOC address */ - char res1[5]; /* reserved */ - char cisize[4]; /* CI-size for FBA,... */ - /* ...blanks for CKD */ - char blkperci[4]; /* no of blocks per CI (FBA), blanks for CKD */ - char labperci[4]; /* no of labels per CI (FBA), blanks for CKD */ - char res2[4]; /* reserved */ - char lvtoc[14]; /* owner code for LVTOC */ - char res3[29]; /* reserved */ -} __attribute__ ((packed)) volume_label_t; - - -typedef struct extent + char volkey[4]; /* volume key = volume label */ + char vollbl[4]; /* volume label */ + char volid[6]; /* volume identifier */ + __u8 security; /* security byte */ + struct vtoc_cchhb vtoc; /* VTOC address */ + char res1[5]; /* reserved */ + char cisize[4]; /* CI-size for FBA,... */ + /* ...blanks for CKD */ + char blkperci[4]; /* no of blocks per CI (FBA), blanks for CKD */ + char labperci[4]; /* no of labels per CI (FBA), blanks for CKD */ + char res2[4]; /* reserved */ + char lvtoc[14]; /* owner code for LVTOC */ + char res3[29]; /* reserved */ +} __attribute__ ((packed)); + +struct vtoc_extent { - __u8 typeind; /* extent type indicator */ - __u8 seqno; /* extent sequence number */ - cchh_t llimit; /* starting point of this extent */ - cchh_t ulimit; /* ending point of this extent */ -} __attribute__ ((packed)) extent_t; - + __u8 typeind; /* extent type indicator */ + __u8 seqno; /* extent sequence number */ + struct vtoc_cchh llimit; /* starting point of this extent */ + struct vtoc_cchh ulimit; /* ending point of this extent */ +} __attribute__ ((packed)); -typedef struct dev_const +struct vtoc_dev_const { - __u16 DS4DSCYL; /* number of logical cyls */ - __u16 DS4DSTRK; /* number of tracks in a logical cylinder */ - __u16 DS4DEVTK; /* device track length */ - __u8 DS4DEVI; /* non-last keyed record overhead */ - __u8 DS4DEVL; /* last keyed record overhead */ - __u8 DS4DEVK; /* non-keyed record overhead differential */ - __u8 DS4DEVFG; /* flag byte */ - __u16 DS4DEVTL; /* device tolerance */ - __u8 DS4DEVDT; /* number of DSCB's per track */ - __u8 DS4DEVDB; /* number of directory blocks per track */ -} __attribute__ ((packed)) dev_const_t; - - -typedef struct format1_label + __u16 DS4DSCYL; /* number of logical cyls */ + __u16 DS4DSTRK; /* number of tracks in a logical cylinder */ + __u16 DS4DEVTK; /* device track length */ + __u8 DS4DEVI; /* non-last keyed record overhead */ + __u8 DS4DEVL; /* last keyed record overhead */ + __u8 DS4DEVK; /* non-keyed record overhead differential */ + __u8 DS4DEVFG; /* flag byte */ + __u16 DS4DEVTL; /* device tolerance */ + __u8 DS4DEVDT; /* number of DSCB's per track */ + __u8 DS4DEVDB; /* number of directory blocks per track */ +} __attribute__ ((packed)); + +struct vtoc_format1_label { - char DS1DSNAM[44]; /* data set name */ - __u8 DS1FMTID; /* format identifier */ - char DS1DSSN[6]; /* data set serial number */ - __u16 DS1VOLSQ; /* volume sequence number */ - labeldate_t DS1CREDT; /* creation date: ydd */ - labeldate_t DS1EXPDT; /* expiration date */ - __u8 DS1NOEPV; /* number of extents on volume */ - __u8 DS1NOBDB; /* no. of bytes used in last direction blk */ - __u8 DS1FLAG1; /* flag 1 */ - char DS1SYSCD[13]; /* system code */ - labeldate_t DS1REFD; /* date last referenced */ - __u8 DS1SMSFG; /* system managed storage indicators */ - __u8 DS1SCXTF; /* sec. space extension flag byte */ - __u16 DS1SCXTV; /* secondary space extension value */ - __u8 DS1DSRG1; /* data set organisation byte 1 */ - __u8 DS1DSRG2; /* data set organisation byte 2 */ - __u8 DS1RECFM; /* record format */ - __u8 DS1OPTCD; /* option code */ - __u16 DS1BLKL; /* block length */ - __u16 DS1LRECL; /* record length */ - __u8 DS1KEYL; /* key length */ - __u16 DS1RKP; /* relative key position */ - __u8 DS1DSIND; /* data set indicators */ - __u8 DS1SCAL1; /* secondary allocation flag byte */ - char DS1SCAL3[3]; /* secondary allocation quantity */ - ttr_t DS1LSTAR; /* last used track and block on track */ - __u16 DS1TRBAL; /* space remaining on last used track */ - __u16 res1; /* reserved */ - extent_t DS1EXT1; /* first extent description */ - extent_t DS1EXT2; /* second extent description */ - extent_t DS1EXT3; /* third extent description */ - cchhb_t DS1PTRDS; /* possible pointer to f2 or f3 DSCB */ -} __attribute__ ((packed)) format1_label_t; - - -typedef struct format4_label + char DS1DSNAM[44]; /* data set name */ + __u8 DS1FMTID; /* format identifier */ + char DS1DSSN[6]; /* data set serial number */ + __u16 DS1VOLSQ; /* volume sequence number */ + struct vtoc_labeldate DS1CREDT; /* creation date: ydd */ + struct vtoc_labeldate DS1EXPDT; /* expiration date */ + __u8 DS1NOEPV; /* number of extents on volume */ + __u8 DS1NOBDB; /* no. of bytes used in last direction blk */ + __u8 DS1FLAG1; /* flag 1 */ + char DS1SYSCD[13]; /* system code */ + struct vtoc_labeldate DS1REFD; /* date last referenced */ + __u8 DS1SMSFG; /* system managed storage indicators */ + __u8 DS1SCXTF; /* sec. space extension flag byte */ + __u16 DS1SCXTV; /* secondary space extension value */ + __u8 DS1DSRG1; /* data set organisation byte 1 */ + __u8 DS1DSRG2; /* data set organisation byte 2 */ + __u8 DS1RECFM; /* record format */ + __u8 DS1OPTCD; /* option code */ + __u16 DS1BLKL; /* block length */ + __u16 DS1LRECL; /* record length */ + __u8 DS1KEYL; /* key length */ + __u16 DS1RKP; /* relative key position */ + __u8 DS1DSIND; /* data set indicators */ + __u8 DS1SCAL1; /* secondary allocation flag byte */ + char DS1SCAL3[3]; /* secondary allocation quantity */ + struct vtoc_ttr DS1LSTAR; /* last used track and block on track */ + __u16 DS1TRBAL; /* space remaining on last used track */ + __u16 res1; /* reserved */ + struct vtoc_extent DS1EXT1; /* first extent description */ + struct vtoc_extent DS1EXT2; /* second extent description */ + struct vtoc_extent DS1EXT3; /* third extent description */ + struct vtoc_cchhb DS1PTRDS; /* possible pointer to f2 or f3 DSCB */ +} __attribute__ ((packed)); + +struct vtoc_format4_label { - char DS4KEYCD[44]; /* key code for VTOC labels: 44 times 0x04 */ - __u8 DS4IDFMT; /* format identifier */ - cchhb_t DS4HPCHR; /* highest address of a format 1 DSCB */ - __u16 DS4DSREC; /* number of available DSCB's */ - cchh_t DS4HCCHH; /* CCHH of next available alternate track */ - __u16 DS4NOATK; /* number of remaining alternate tracks */ - __u8 DS4VTOCI; /* VTOC indicators */ - __u8 DS4NOEXT; /* number of extents in VTOC */ - __u8 DS4SMSFG; /* system managed storage indicators */ - __u8 DS4DEVAC; /* number of alternate cylinders. - Subtract from first two bytes of - DS4DEVSZ to get number of usable - cylinders. can be zero. valid - only if DS4DEVAV on. */ - dev_const_t DS4DEVCT; /* device constants */ - char DS4AMTIM[8]; /* VSAM time stamp */ - char DS4AMCAT[3]; /* VSAM catalog indicator */ - char DS4R2TIM[8]; /* VSAM volume/catalog match time stamp */ - char res1[5]; /* reserved */ - char DS4F6PTR[5]; /* pointer to first format 6 DSCB */ - extent_t DS4VTOCE; /* VTOC extent description */ - char res2[10]; /* reserved */ - __u8 DS4EFLVL; /* extended free-space management level */ - cchhb_t DS4EFPTR; /* pointer to extended free-space info */ - char res3[9]; /* reserved */ -} __attribute__ ((packed)) format4_label_t; - - -typedef struct ds5ext + char DS4KEYCD[44]; /* key code for VTOC labels: 44 times 0x04 */ + __u8 DS4IDFMT; /* format identifier */ + struct vtoc_cchhb DS4HPCHR; /* highest address of a format 1 DSCB */ + __u16 DS4DSREC; /* number of available DSCB's */ + struct vtoc_cchh DS4HCCHH; /* CCHH of next available alternate track */ + __u16 DS4NOATK; /* number of remaining alternate tracks */ + __u8 DS4VTOCI; /* VTOC indicators */ + __u8 DS4NOEXT; /* number of extents in VTOC */ + __u8 DS4SMSFG; /* system managed storage indicators */ + __u8 DS4DEVAC; /* number of alternate cylinders. + * Subtract from first two bytes of + * DS4DEVSZ to get number of usable + * cylinders. can be zero. valid + * only if DS4DEVAV on. */ + struct vtoc_dev_const DS4DEVCT; /* device constants */ + char DS4AMTIM[8]; /* VSAM time stamp */ + char DS4AMCAT[3]; /* VSAM catalog indicator */ + char DS4R2TIM[8]; /* VSAM volume/catalog match time stamp */ + char res1[5]; /* reserved */ + char DS4F6PTR[5]; /* pointer to first format 6 DSCB */ + struct vtoc_extent DS4VTOCE; /* VTOC extent description */ + char res2[10]; /* reserved */ + __u8 DS4EFLVL; /* extended free-space management level */ + struct vtoc_cchhb DS4EFPTR; /* pointer to extended free-space info */ + char res3[9]; /* reserved */ +} __attribute__ ((packed)); + +struct vtoc_ds5ext { - __u16 t; /* RTA of the first track of free extent */ - __u16 fc; /* number of whole cylinders in free ext. */ - __u8 ft; /* number of remaining free tracks */ -} __attribute__ ((packed)) ds5ext_t; - + __u16 t; /* RTA of the first track of free extent */ + __u16 fc; /* number of whole cylinders in free ext. */ + __u8 ft; /* number of remaining free tracks */ +} __attribute__ ((packed)); -typedef struct format5_label +struct vtoc_format5_label { - char DS5KEYID[4]; /* key identifier */ - ds5ext_t DS5AVEXT; /* first available (free-space) extent. */ - ds5ext_t DS5EXTAV[7]; /* seven available extents */ - __u8 DS5FMTID; /* format identifier */ - ds5ext_t DS5MAVET[18]; /* eighteen available extents */ - cchhb_t DS5PTRDS; /* pointer to next format5 DSCB */ -} __attribute__ ((packed)) format5_label_t; - - -typedef struct ds7ext + char DS5KEYID[4]; /* key identifier */ + struct vtoc_ds5ext DS5AVEXT; /* first available (free-space) extent. */ + struct vtoc_ds5ext DS5EXTAV[7]; /* seven available extents */ + __u8 DS5FMTID; /* format identifier */ + struct vtoc_ds5ext DS5MAVET[18]; /* eighteen available extents */ + struct vtoc_cchhb DS5PTRDS; /* pointer to next format5 DSCB */ +} __attribute__ ((packed)); + +struct vtoc_ds7ext { - __u32 a; /* starting RTA value */ - __u32 b; /* ending RTA value + 1 */ -} __attribute__ ((packed)) ds7ext_t; + __u32 a; /* starting RTA value */ + __u32 b; /* ending RTA value + 1 */ +} __attribute__ ((packed)); - -typedef struct format7_label +struct vtoc_format7_label { - char DS7KEYID[4]; /* key identifier */ - ds7ext_t DS7EXTNT[5]; /* space for 5 extent descriptions */ - __u8 DS7FMTID; /* format identifier */ - ds7ext_t DS7ADEXT[11]; /* space for 11 extent descriptions */ - char res1[2]; /* reserved */ - cchhb_t DS7PTRDS; /* pointer to next FMT7 DSCB */ -} __attribute__ ((packed)) format7_label_t; - - -char * vtoc_ebcdic_enc ( - unsigned char source[LINE_LENGTH], - unsigned char target[LINE_LENGTH], - int l); -char * vtoc_ebcdic_dec ( - unsigned char source[LINE_LENGTH], - unsigned char target[LINE_LENGTH], - int l); -void vtoc_set_extent ( - extent_t * ext, - __u8 typeind, - __u8 seqno, - cchh_t * lower, - cchh_t * upper); -void vtoc_set_cchh ( - cchh_t * addr, - __u16 cc, - __u16 hh); -void vtoc_set_cchhb ( - cchhb_t * addr, - __u16 cc, - __u16 hh, - __u8 b); -void vtoc_set_date ( - labeldate_t * d, - __u8 year, - __u16 day); - -void vtoc_volume_label_init ( - volume_label_t *vlabel); - -int vtoc_read_volume_label ( - char * device, - unsigned long vlabel_start, - volume_label_t * vlabel); - -int vtoc_write_volume_label ( - char *device, - unsigned long vlabel_start, - volume_label_t *vlabel); - -void vtoc_volume_label_set_volser ( - volume_label_t *vlabel, - char *volser); - -char *vtoc_volume_label_get_volser ( - volume_label_t *vlabel, - char *volser); - -void vtoc_volume_label_set_key ( - volume_label_t *vlabel, - char *key); - -void vtoc_volume_label_set_label ( - volume_label_t *vlabel, - char *lbl); - -char *vtoc_volume_label_get_label ( - volume_label_t *vlabel, - char *lbl); - -void vtoc_read_label ( - char *device, - unsigned long position, - format1_label_t *f1, - format4_label_t *f4, - format5_label_t *f5, - format7_label_t *f7); - -void vtoc_write_label ( - char *device, - unsigned long position, - format1_label_t *f1, - format4_label_t *f4, - format5_label_t *f5, - format7_label_t *f7); - - -void vtoc_init_format1_label ( - char *volid, - unsigned int blksize, - extent_t *part_extent, - format1_label_t *f1); - - -void vtoc_init_format4_label ( - format4_label_t *f4lbl, - unsigned int usable_partitions, - unsigned int cylinders, - unsigned int tracks, - unsigned int blocks, - unsigned int blksize, - __u16 dev_type); - -void vtoc_update_format4_label ( - format4_label_t *f4, - cchhb_t *highest_f1, - __u16 unused_update); - - -void vtoc_init_format5_label ( - format5_label_t *f5); - -void vtoc_update_format5_label_add ( - format5_label_t *f5, - int verbose, - int cyl, - int trk, - __u16 a, - __u16 b, - __u8 c); - -void vtoc_update_format5_label_del ( - format5_label_t *f5, - int verbose, - int cyl, - int trk, - __u16 a, - __u16 b, - __u8 c); - - -void vtoc_init_format7_label ( - format7_label_t *f7); - -void vtoc_update_format7_label_add ( - format7_label_t *f7, - int verbose, - __u32 a, - __u32 b); - -void vtoc_update_format7_label_del ( - format7_label_t *f7, - int verbose, - __u32 a, - __u32 b); - - -void vtoc_set_freespace( - format4_label_t *f4, - format5_label_t *f5, - format7_label_t *f7, - char ch, - int verbose, - __u32 start, - __u32 stop, - int cyl, - int trk); - - - - - - - - - - - - + char DS7KEYID[4]; /* key identifier */ + struct vtoc_ds7ext DS7EXTNT[5]; /* space for 5 extent descriptions */ + __u8 DS7FMTID; /* format identifier */ + struct vtoc_ds7ext DS7ADEXT[11]; /* space for 11 extent descriptions */ + char res1[2]; /* reserved */ + struct vtoc_cchhb DS7PTRDS; /* pointer to next FMT7 DSCB */ +} __attribute__ ((packed)); + +#endif /* _ASM_S390_VTOC_H */ diff --git a/include/asm-sh/atomic.h b/include/asm-sh/atomic.h index 3c4f805da1ac..aabfd334462c 100644 --- a/include/asm-sh/atomic.h +++ b/include/asm-sh/atomic.h @@ -87,6 +87,35 @@ static __inline__ int atomic_sub_return(int i, atomic_t * v) #define atomic_inc(v) atomic_add(1,(v)) #define atomic_dec(v) atomic_sub(1,(v)) +static inline int atomic_cmpxchg(atomic_t *v, int old, int new) +{ + int ret; + unsigned long flags; + + local_irq_save(flags); + ret = v->counter; + if (likely(ret == old)) + v->counter = new; + local_irq_restore(flags); + + return ret; +} + +static inline int atomic_add_unless(atomic_t *v, int a, int u) +{ + int ret; + unsigned long flags; + + local_irq_save(flags); + ret = v->counter; + if (ret != u) + v->counter += a; + local_irq_restore(flags); + + return ret != u; +} +#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0) + static __inline__ void atomic_clear_mask(unsigned int mask, atomic_t *v) { unsigned long flags; diff --git a/include/asm-sh/dma-mapping.h b/include/asm-sh/dma-mapping.h index 80d164c1529e..d3fa5c2b889d 100644 --- a/include/asm-sh/dma-mapping.h +++ b/include/asm-sh/dma-mapping.h @@ -9,7 +9,7 @@ extern struct bus_type pci_bus_type; /* arch/sh/mm/consistent.c */ -extern void *consistent_alloc(int gfp, size_t size, dma_addr_t *handle); +extern void *consistent_alloc(gfp_t gfp, size_t size, dma_addr_t *handle); extern void consistent_free(void *vaddr, size_t size); extern void consistent_sync(void *vaddr, size_t size, int direction); @@ -26,7 +26,7 @@ static inline int dma_set_mask(struct device *dev, u64 mask) } static inline void *dma_alloc_coherent(struct device *dev, size_t size, - dma_addr_t *dma_handle, int flag) + dma_addr_t *dma_handle, gfp_t flag) { if (sh_mv.mv_consistent_alloc) { void *ret; diff --git a/include/asm-sh/elf.h b/include/asm-sh/elf.h index 8fe00a1981ce..1b63dfeea4f2 100644 --- a/include/asm-sh/elf.h +++ b/include/asm-sh/elf.h @@ -111,6 +111,7 @@ typedef struct user_fpu_struct elf_fpregset_t; #ifdef __KERNEL__ #define SET_PERSONALITY(ex, ibcs2) set_personality(PER_LINUX_32BIT) +struct task_struct; extern int dump_task_regs (struct task_struct *, elf_gregset_t *); extern int dump_task_fpu (struct task_struct *, elf_fpregset_t *); diff --git a/include/asm-sh/ide.h b/include/asm-sh/ide.h index f42cf3977a57..711dad4cb48b 100644 --- a/include/asm-sh/ide.h +++ b/include/asm-sh/ide.h @@ -16,10 +16,6 @@ #include <linux/config.h> -#ifndef MAX_HWIFS -#define MAX_HWIFS CONFIG_IDE_MAX_HWIFS -#endif - #define ide_default_io_ctl(base) (0) #include <asm-generic/ide_iops.h> diff --git a/include/asm-sh/machvec.h b/include/asm-sh/machvec.h index 5771f4baa478..3f18aa180516 100644 --- a/include/asm-sh/machvec.h +++ b/include/asm-sh/machvec.h @@ -64,7 +64,7 @@ struct sh_machine_vector void (*mv_heartbeat)(void); - void *(*mv_consistent_alloc)(struct device *, size_t, dma_addr_t *, int); + void *(*mv_consistent_alloc)(struct device *, size_t, dma_addr_t *, gfp_t); int (*mv_consistent_free)(struct device *, size_t, void *, dma_addr_t); }; diff --git a/include/asm-sh/mmzone.h b/include/asm-sh/mmzone.h deleted file mode 100644 index 0e7406601fdf..000000000000 --- a/include/asm-sh/mmzone.h +++ /dev/null @@ -1,61 +0,0 @@ -/* - * linux/include/asm-sh/mmzone.h - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#ifndef __ASM_SH_MMZONE_H -#define __ASM_SH_MMZONE_H - -#include <linux/config.h> - -#ifdef CONFIG_DISCONTIGMEM - -/* Currently, just for HP690 */ -#define PHYSADDR_TO_NID(phys) ((((phys) - __MEMORY_START) >= 0x01000000)?1:0) - -extern pg_data_t discontig_page_data[MAX_NUMNODES]; -extern bootmem_data_t discontig_node_bdata[MAX_NUMNODES]; - -/* - * Following are macros that each numa implmentation must define. - */ - -/* - * Given a kernel address, find the home node of the underlying memory. - */ -#define KVADDR_TO_NID(kaddr) PHYSADDR_TO_NID(__pa(kaddr)) - -/* - * Return a pointer to the node data for node n. - */ -#define NODE_DATA(nid) (&discontig_page_data[nid]) - -/* - * NODE_MEM_MAP gives the kaddr for the mem_map of the node. - */ -#define NODE_MEM_MAP(nid) (NODE_DATA(nid)->node_mem_map) - -#define phys_to_page(phys) \ -({ unsigned int node = PHYSADDR_TO_NID(phys); \ - NODE_MEM_MAP(node) \ - + (((phys) - NODE_DATA(node)->node_start_paddr) >> PAGE_SHIFT); }) - -static inline int is_valid_page(struct page *page) -{ - unsigned int i; - - for (i = 0; i < MAX_NUMNODES; i++) { - if (page >= NODE_MEM_MAP(i) && - page < NODE_MEM_MAP(i) + NODE_DATA(i)->node_size) - return 1; - } - return 0; -} - -#define VALID_PAGE(page) is_valid_page(page) -#define page_to_phys(page) PHYSADDR(page_address(page)) - -#endif /* CONFIG_DISCONTIGMEM */ -#endif diff --git a/include/asm-sh/page.h b/include/asm-sh/page.h index 324e6cc5ecf7..972c3f655b2a 100644 --- a/include/asm-sh/page.h +++ b/include/asm-sh/page.h @@ -93,11 +93,6 @@ typedef struct { unsigned long pgprot; } pgprot_t; #define __MEMORY_START CONFIG_MEMORY_START #define __MEMORY_SIZE CONFIG_MEMORY_SIZE -#ifdef CONFIG_DISCONTIGMEM -/* Just for HP690, for now.. */ -#define __MEMORY_START_2ND (__MEMORY_START+0x02000000) -#define __MEMORY_SIZE_2ND 0x001000000 /* 16MB */ -#endif #define PAGE_OFFSET (0x80000000UL) #define __pa(x) ((unsigned long)(x)-PAGE_OFFSET) @@ -105,10 +100,8 @@ typedef struct { unsigned long pgprot; } pgprot_t; #define MAP_NR(addr) (((unsigned long)(addr)-PAGE_OFFSET) >> PAGE_SHIFT) -#ifndef CONFIG_DISCONTIGMEM #define phys_to_page(phys) (mem_map + (((phys)-__MEMORY_START) >> PAGE_SHIFT)) #define page_to_phys(page) (((page - mem_map) << PAGE_SHIFT) + __MEMORY_START) -#endif /* PFN start number, because of __MEMORY_START */ #define PFN_START (__MEMORY_START >> PAGE_SHIFT) diff --git a/include/asm-sh/pgtable.h b/include/asm-sh/pgtable.h index 0f4bcaae61bd..bb0efb31a8cb 100644 --- a/include/asm-sh/pgtable.h +++ b/include/asm-sh/pgtable.h @@ -196,7 +196,9 @@ static inline pte_t pte_mkexec(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) | _ static inline pte_t pte_mkdirty(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) | _PAGE_DIRTY)); return pte; } static inline pte_t pte_mkyoung(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) | _PAGE_ACCESSED)); return pte; } static inline pte_t pte_mkwrite(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) | _PAGE_RW)); return pte; } +#ifdef CONFIG_HUGETLB_PAGE static inline pte_t pte_mkhuge(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) | _PAGE_SZHUGE)); return pte; } +#endif /* * Macro and implementation to make a page protection as uncachable. @@ -224,8 +226,6 @@ static inline pgprot_t pgprot_noncached(pgprot_t _prot) static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) { set_pte(&pte, __pte((pte_val(pte) & _PAGE_CHG_MASK) | pgprot_val(newprot))); return pte; } -#define page_pte(page) page_pte_prot(page, __pgprot(0)) - #define pmd_page_kernel(pmd) \ ((unsigned long) __va(pmd_val(pmd) & PAGE_MASK)) @@ -284,6 +284,8 @@ typedef pte_t *pte_addr_t; #define GET_IOSPACE(pfn) 0 #define GET_PFN(pfn) (pfn) +struct mm_struct; + /* * No page table caches to initialise */ diff --git a/include/asm-sh/rwsem.h b/include/asm-sh/rwsem.h index 1be4337f5259..0262d3d1e5e0 100644 --- a/include/asm-sh/rwsem.h +++ b/include/asm-sh/rwsem.h @@ -166,5 +166,10 @@ static inline int rwsem_atomic_update(int delta, struct rw_semaphore *sem) return atomic_add_return(delta, (atomic_t *)(&sem->count)); } +static inline int rwsem_is_locked(struct rw_semaphore *sem) +{ + return (sem->count != 0); +} + #endif /* __KERNEL__ */ #endif /* _ASM_SH_RWSEM_H */ diff --git a/include/asm-sh/semaphore.h b/include/asm-sh/semaphore.h index b923a77a8a7e..489f7847c5d9 100644 --- a/include/asm-sh/semaphore.h +++ b/include/asm-sh/semaphore.h @@ -33,9 +33,6 @@ struct semaphore { .wait = __WAIT_QUEUE_HEAD_INITIALIZER((name).wait) \ } -#define __MUTEX_INITIALIZER(name) \ - __SEMAPHORE_INITIALIZER(name,1) - #define __DECLARE_SEMAPHORE_GENERIC(name,count) \ struct semaphore name = __SEMAPHORE_INITIALIZER(name,count) diff --git a/include/asm-sh/unistd.h b/include/asm-sh/unistd.h index ea89e8f223ea..f2c8e14d1fd9 100644 --- a/include/asm-sh/unistd.h +++ b/include/asm-sh/unistd.h @@ -503,7 +503,6 @@ asmlinkage int sys_vfork(unsigned long r4, unsigned long r5, asmlinkage int sys_pipe(unsigned long r4, unsigned long r5, unsigned long r6, unsigned long r7, struct pt_regs regs); -asmlinkage int sys_ptrace(long request, long pid, long addr, long data); asmlinkage ssize_t sys_pread_wrapper(unsigned int fd, char *buf, size_t count, long dummy, loff_t pos); asmlinkage ssize_t sys_pwrite_wrapper(unsigned int fd, const char *buf, diff --git a/include/asm-sh64/atomic.h b/include/asm-sh64/atomic.h index 8c3872d3e65f..927a2bc27b30 100644 --- a/include/asm-sh64/atomic.h +++ b/include/asm-sh64/atomic.h @@ -99,6 +99,35 @@ static __inline__ int atomic_sub_return(int i, atomic_t * v) #define atomic_inc(v) atomic_add(1,(v)) #define atomic_dec(v) atomic_sub(1,(v)) +static inline int atomic_cmpxchg(atomic_t *v, int old, int new) +{ + int ret; + unsigned long flags; + + local_irq_save(flags); + ret = v->counter; + if (likely(ret == old)) + v->counter = new; + local_irq_restore(flags); + + return ret; +} + +static inline int atomic_add_unless(atomic_t *v, int a, int u) +{ + int ret; + unsigned long flags; + + local_irq_save(flags); + ret = v->counter; + if (ret != u) + v->counter += a; + local_irq_restore(flags); + + return ret != u; +} +#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0) + static __inline__ void atomic_clear_mask(unsigned int mask, atomic_t *v) { unsigned long flags; diff --git a/include/asm-sh64/dma-mapping.h b/include/asm-sh64/dma-mapping.h index b8d26fe677f4..cc9a2e86f5b4 100644 --- a/include/asm-sh64/dma-mapping.h +++ b/include/asm-sh64/dma-mapping.h @@ -25,7 +25,7 @@ static inline int dma_set_mask(struct device *dev, u64 mask) } static inline void *dma_alloc_coherent(struct device *dev, size_t size, - dma_addr_t *dma_handle, int flag) + dma_addr_t *dma_handle, gfp_t flag) { return consistent_alloc(NULL, size, dma_handle); } diff --git a/include/asm-sh64/ide.h b/include/asm-sh64/ide.h index 6fd514daa1ba..852f50afe39c 100644 --- a/include/asm-sh64/ide.h +++ b/include/asm-sh64/ide.h @@ -17,10 +17,6 @@ #include <linux/config.h> -#ifndef MAX_HWIFS -#define MAX_HWIFS CONFIG_IDE_MAX_HWIFS -#endif - /* Without this, the initialisation of PCI IDE cards end up calling * ide_init_hwif_ports, which won't work. */ #ifdef CONFIG_BLK_DEV_IDEPCI diff --git a/include/asm-sh64/pgtable.h b/include/asm-sh64/pgtable.h index 51db4307bfaf..a1906a772df9 100644 --- a/include/asm-sh64/pgtable.h +++ b/include/asm-sh64/pgtable.h @@ -24,6 +24,8 @@ #include <linux/threads.h> #include <linux/config.h> +struct vm_area_struct; + extern void paging_init(void); /* We provide our own get_unmapped_area to avoid cache synonym issue */ @@ -457,9 +459,6 @@ extern inline pte_t pte_mkhuge(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) | _ extern inline pte_t pte_modify(pte_t pte, pgprot_t newprot) { set_pte(&pte, __pte((pte_val(pte) & _PAGE_CHG_MASK) | pgprot_val(newprot))); return pte; } -#define page_pte_prot(page, prot) mk_pte(page, prot) -#define page_pte(page) page_pte_prot(page, __pgprot(0)) - typedef pte_t *pte_addr_t; #define pgtable_cache_init() do { } while (0) diff --git a/include/asm-sh64/semaphore.h b/include/asm-sh64/semaphore.h index fce22bb9a546..469526459149 100644 --- a/include/asm-sh64/semaphore.h +++ b/include/asm-sh64/semaphore.h @@ -40,9 +40,6 @@ struct semaphore { .wait = __WAIT_QUEUE_HEAD_INITIALIZER((name).wait) \ } -#define __MUTEX_INITIALIZER(name) \ - __SEMAPHORE_INITIALIZER(name,1) - #define __DECLARE_SEMAPHORE_GENERIC(name,count) \ struct semaphore name = __SEMAPHORE_INITIALIZER(name,count) diff --git a/include/asm-sparc/atomic.h b/include/asm-sparc/atomic.h index 37f6ab601c3d..62bec7ad271c 100644 --- a/include/asm-sparc/atomic.h +++ b/include/asm-sparc/atomic.h @@ -19,6 +19,8 @@ typedef struct { volatile int counter; } atomic_t; #define ATOMIC_INIT(i) { (i) } extern int __atomic_add_return(int, atomic_t *); +extern int atomic_cmpxchg(atomic_t *, int, int); +extern int atomic_add_unless(atomic_t *, int, int); extern void atomic_set(atomic_t *, int); #define atomic_read(v) ((v)->counter) @@ -48,6 +50,8 @@ extern void atomic_set(atomic_t *, int); #define atomic_dec_and_test(v) (atomic_dec_return(v) == 0) #define atomic_sub_and_test(i, v) (atomic_sub_return(i, v) == 0) +#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0) + /* This is the old 24-bit implementation. It's still used internally * by some sparc-specific code, notably the semaphore implementation. */ diff --git a/include/asm-sparc/audioio.h b/include/asm-sparc/audioio.h deleted file mode 100644 index cf16173f521b..000000000000 --- a/include/asm-sparc/audioio.h +++ /dev/null @@ -1,234 +0,0 @@ -/* - * include/asm-sparc/audioio.h - * - * Sparc Audio Midlayer - * Copyright (C) 1996 Thomas K. Dyas (tdyas@noc.rutgers.edu) - */ - -#ifndef _AUDIOIO_H_ -#define _AUDIOIO_H_ - -/* - * SunOS/Solaris /dev/audio interface - */ - -#if defined(__KERNEL__) || !defined(__GLIBC__) || (__GLIBC__ < 2) -#include <linux/types.h> -#include <linux/time.h> -#include <linux/ioctl.h> -#endif - -/* - * This structure contains state information for audio device IO streams. - */ -typedef struct audio_prinfo { - /* - * The following values describe the audio data encoding. - */ - unsigned int sample_rate; /* samples per second */ - unsigned int channels; /* number of interleaved channels */ - unsigned int precision; /* bit-width of each sample */ - unsigned int encoding; /* data encoding method */ - - /* - * The following values control audio device configuration - */ - unsigned int gain; /* gain level: 0 - 255 */ - unsigned int port; /* selected I/O port (see below) */ - unsigned int avail_ports; /* available I/O ports (see below) */ - unsigned int _xxx[2]; /* Reserved for future use */ - - unsigned int buffer_size; /* I/O buffer size */ - - /* - * The following values describe driver state - */ - unsigned int samples; /* number of samples converted */ - unsigned int eof; /* End Of File counter (play only) */ - - unsigned char pause; /* non-zero for pause, zero to resume */ - unsigned char error; /* non-zero if overflow/underflow */ - unsigned char waiting; /* non-zero if a process wants access */ - unsigned char balance; /* stereo channel balance */ - - unsigned short minordev; - - /* - * The following values are read-only state flags - */ - unsigned char open; /* non-zero if open access permitted */ - unsigned char active; /* non-zero if I/O is active */ -} audio_prinfo_t; - - -/* - * This structure describes the current state of the audio device. - */ -typedef struct audio_info { - /* - * Per-stream information - */ - audio_prinfo_t play; /* output status information */ - audio_prinfo_t record; /* input status information */ - - /* - * Per-unit/channel information - */ - unsigned int monitor_gain; /* input to output mix: 0 - 255 */ - unsigned char output_muted; /* non-zero if output is muted */ - unsigned char _xxx[3]; /* Reserved for future use */ - unsigned int _yyy[3]; /* Reserved for future use */ -} audio_info_t; - - -/* - * Audio encoding types - */ -#define AUDIO_ENCODING_NONE (0) /* no encoding assigned */ -#define AUDIO_ENCODING_ULAW (1) /* u-law encoding */ -#define AUDIO_ENCODING_ALAW (2) /* A-law encoding */ -#define AUDIO_ENCODING_LINEAR (3) /* Linear PCM encoding */ -#define AUDIO_ENCODING_FLOAT (4) /* IEEE float (-1. <-> +1.) */ -#define AUDIO_ENCODING_DVI (104) /* DVI ADPCM */ -#define AUDIO_ENCODING_LINEAR8 (105) /* 8 bit UNSIGNED */ -#define AUDIO_ENCODING_LINEARLE (106) /* Linear PCM LE encoding */ - -/* - * These ranges apply to record, play, and monitor gain values - */ -#define AUDIO_MIN_GAIN (0) /* minimum gain value */ -#define AUDIO_MAX_GAIN (255) /* maximum gain value */ - -/* - * These values apply to the balance field to adjust channel gain values - */ -#define AUDIO_LEFT_BALANCE (0) /* left channel only */ -#define AUDIO_MID_BALANCE (32) /* equal left/right channel */ -#define AUDIO_RIGHT_BALANCE (64) /* right channel only */ -#define AUDIO_BALANCE_SHIFT (3) - -/* - * Generic minimum/maximum limits for number of channels, both modes - */ -#define AUDIO_MIN_PLAY_CHANNELS (1) -#define AUDIO_MAX_PLAY_CHANNELS (4) -#define AUDIO_MIN_REC_CHANNELS (1) -#define AUDIO_MAX_REC_CHANNELS (4) - -/* - * Generic minimum/maximum limits for sample precision - */ -#define AUDIO_MIN_PLAY_PRECISION (8) -#define AUDIO_MAX_PLAY_PRECISION (32) -#define AUDIO_MIN_REC_PRECISION (8) -#define AUDIO_MAX_REC_PRECISION (32) - -/* - * Define some convenient names for typical audio ports - */ -/* - * output ports (several may be enabled simultaneously) - */ -#define AUDIO_SPEAKER 0x01 /* output to built-in speaker */ -#define AUDIO_HEADPHONE 0x02 /* output to headphone jack */ -#define AUDIO_LINE_OUT 0x04 /* output to line out */ - -/* - * input ports (usually only one at a time) - */ -#define AUDIO_MICROPHONE 0x01 /* input from microphone */ -#define AUDIO_LINE_IN 0x02 /* input from line in */ -#define AUDIO_CD 0x04 /* input from on-board CD inputs */ -#define AUDIO_INTERNAL_CD_IN AUDIO_CD /* input from internal CDROM */ -#define AUDIO_ANALOG_LOOPBACK 0x40 /* input from output */ - - -/* - * This macro initializes an audio_info structure to 'harmless' values. - * Note that (~0) might not be a harmless value for a flag that was - * a signed int. - */ -#define AUDIO_INITINFO(i) { \ - unsigned int *__x__; \ - for (__x__ = (unsigned int *)(i); \ - (char *) __x__ < (((char *)(i)) + sizeof (audio_info_t)); \ - *__x__++ = ~0); \ -} - -/* - * These allow testing for what the user wants to set - */ -#define AUD_INITVALUE (~0) -#define Modify(X) ((unsigned int)(X) != AUD_INITVALUE) -#define Modifys(X) ((X) != (unsigned short)AUD_INITVALUE) -#define Modifyc(X) ((X) != (unsigned char)AUD_INITVALUE) - -/* - * Parameter for the AUDIO_GETDEV ioctl to determine current - * audio devices. - */ -#define MAX_AUDIO_DEV_LEN (16) -typedef struct audio_device { - char name[MAX_AUDIO_DEV_LEN]; - char version[MAX_AUDIO_DEV_LEN]; - char config[MAX_AUDIO_DEV_LEN]; -} audio_device_t; - - -/* - * Ioctl calls for the audio device. - */ - -/* - * AUDIO_GETINFO retrieves the current state of the audio device. - * - * AUDIO_SETINFO copies all fields of the audio_info structure whose - * values are not set to the initialized value (-1) to the device state. - * It performs an implicit AUDIO_GETINFO to return the new state of the - * device. Note that the record.samples and play.samples fields are set - * to the last value before the AUDIO_SETINFO took effect. This allows - * an application to reset the counters while atomically retrieving the - * last value. - * - * AUDIO_DRAIN suspends the calling process until the write buffers are - * empty. - * - * AUDIO_GETDEV returns a structure of type audio_device_t which contains - * three strings. The string "name" is a short identifying string (for - * example, the SBus Fcode name string), the string "version" identifies - * the current version of the device, and the "config" string identifies - * the specific configuration of the audio stream. All fields are - * device-dependent -- see the device specific manual pages for details. - * - * AUDIO_GETDEV_SUNOS returns a number which is an audio device defined - * herein (making it not too portable) - * - * AUDIO_FLUSH stops all playback and recording, clears all queued buffers, - * resets error counters, and restarts recording and playback as appropriate - * for the current sampling mode. - */ -#define AUDIO_GETINFO _IOR('A', 1, audio_info_t) -#define AUDIO_SETINFO _IOWR('A', 2, audio_info_t) -#define AUDIO_DRAIN _IO('A', 3) -#define AUDIO_GETDEV _IOR('A', 4, audio_device_t) -#define AUDIO_GETDEV_SUNOS _IOR('A', 4, int) -#define AUDIO_FLUSH _IO('A', 5) - -/* Define possible audio hardware configurations for - * old SunOS-style AUDIO_GETDEV ioctl */ -#define AUDIO_DEV_UNKNOWN (0) /* not defined */ -#define AUDIO_DEV_AMD (1) /* audioamd device */ -#define AUDIO_DEV_SPEAKERBOX (2) /* dbri device with speakerbox */ -#define AUDIO_DEV_CODEC (3) /* dbri device (internal speaker) */ -#define AUDIO_DEV_CS4231 (5) /* cs4231 device */ - -/* - * The following ioctl sets the audio device into an internal loopback mode, - * if the hardware supports this. The argument is TRUE to set loopback, - * FALSE to reset to normal operation. If the hardware does not support - * internal loopback, the ioctl should fail with EINVAL. - * Causes ADC data to be digitally mixed in and sent to the DAC. - */ -#define AUDIO_DIAG_LOOPBACK _IOW('A', 101, int) - -#endif /* _AUDIOIO_H_ */ diff --git a/include/asm-sparc/btfixup.h b/include/asm-sparc/btfixup.h index b84c96c89581..c2868d0f60b6 100644 --- a/include/asm-sparc/btfixup.h +++ b/include/asm-sparc/btfixup.h @@ -49,17 +49,17 @@ extern unsigned int ___illegal_use_of_BTFIXUP_INT_in_module(void); /* Put bottom 13bits into some register variable */ #define BTFIXUPDEF_SIMM13(__name) \ - extern unsigned int ___sf_##__name(void) __attribute_const__; \ + static inline unsigned int ___sf_##__name(void) __attribute_const__; \ extern unsigned ___ss_##__name[2]; \ - extern __inline__ unsigned int ___sf_##__name(void) { \ + static inline unsigned int ___sf_##__name(void) { \ unsigned int ret; \ __asm__ ("or %%g0, ___s_" #__name ", %0" : "=r"(ret)); \ return ret; \ } #define BTFIXUPDEF_SIMM13_INIT(__name,__val) \ - extern unsigned int ___sf_##__name(void) __attribute_const__; \ + static inline unsigned int ___sf_##__name(void) __attribute_const__; \ extern unsigned ___ss_##__name[2]; \ - extern __inline__ unsigned int ___sf_##__name(void) { \ + static inline unsigned int ___sf_##__name(void) { \ unsigned int ret; \ __asm__ ("or %%g0, ___s_" #__name "__btset_" #__val ", %0" : "=r"(ret));\ return ret; \ @@ -71,17 +71,17 @@ extern unsigned int ___illegal_use_of_BTFIXUP_INT_in_module(void); */ #define BTFIXUPDEF_HALF(__name) \ - extern unsigned int ___af_##__name(void) __attribute_const__; \ + static inline unsigned int ___af_##__name(void) __attribute_const__; \ extern unsigned ___as_##__name[2]; \ - extern __inline__ unsigned int ___af_##__name(void) { \ + static inline unsigned int ___af_##__name(void) { \ unsigned int ret; \ __asm__ ("or %%g0, ___a_" #__name ", %0" : "=r"(ret)); \ return ret; \ } #define BTFIXUPDEF_HALF_INIT(__name,__val) \ - extern unsigned int ___af_##__name(void) __attribute_const__; \ + static inline unsigned int ___af_##__name(void) __attribute_const__; \ extern unsigned ___as_##__name[2]; \ - extern __inline__ unsigned int ___af_##__name(void) { \ + static inline unsigned int ___af_##__name(void) { \ unsigned int ret; \ __asm__ ("or %%g0, ___a_" #__name "__btset_" #__val ", %0" : "=r"(ret));\ return ret; \ @@ -90,17 +90,17 @@ extern unsigned int ___illegal_use_of_BTFIXUP_INT_in_module(void); /* Put upper 22 bits into some register variable */ #define BTFIXUPDEF_SETHI(__name) \ - extern unsigned int ___hf_##__name(void) __attribute_const__; \ + static inline unsigned int ___hf_##__name(void) __attribute_const__; \ extern unsigned ___hs_##__name[2]; \ - extern __inline__ unsigned int ___hf_##__name(void) { \ + static inline unsigned int ___hf_##__name(void) { \ unsigned int ret; \ __asm__ ("sethi %%hi(___h_" #__name "), %0" : "=r"(ret)); \ return ret; \ } #define BTFIXUPDEF_SETHI_INIT(__name,__val) \ - extern unsigned int ___hf_##__name(void) __attribute_const__; \ + static inline unsigned int ___hf_##__name(void) __attribute_const__; \ extern unsigned ___hs_##__name[2]; \ - extern __inline__ unsigned int ___hf_##__name(void) { \ + static inline unsigned int ___hf_##__name(void) { \ unsigned int ret; \ __asm__ ("sethi %%hi(___h_" #__name "__btset_" #__val "), %0" : \ "=r"(ret)); \ diff --git a/include/asm-sparc/cache.h b/include/asm-sparc/cache.h index e6316fd7e1a4..a10522cb21b7 100644 --- a/include/asm-sparc/cache.h +++ b/include/asm-sparc/cache.h @@ -27,7 +27,7 @@ */ /* First, cache-tag access. */ -extern __inline__ unsigned int get_icache_tag(int setnum, int tagnum) +static inline unsigned int get_icache_tag(int setnum, int tagnum) { unsigned int vaddr, retval; @@ -38,7 +38,7 @@ extern __inline__ unsigned int get_icache_tag(int setnum, int tagnum) return retval; } -extern __inline__ void put_icache_tag(int setnum, int tagnum, unsigned int entry) +static inline void put_icache_tag(int setnum, int tagnum, unsigned int entry) { unsigned int vaddr; @@ -51,7 +51,7 @@ extern __inline__ void put_icache_tag(int setnum, int tagnum, unsigned int entry /* Second cache-data access. The data is returned two-32bit quantities * at a time. */ -extern __inline__ void get_icache_data(int setnum, int tagnum, int subblock, +static inline void get_icache_data(int setnum, int tagnum, int subblock, unsigned int *data) { unsigned int value1, value2, vaddr; @@ -67,7 +67,7 @@ extern __inline__ void get_icache_data(int setnum, int tagnum, int subblock, data[0] = value1; data[1] = value2; } -extern __inline__ void put_icache_data(int setnum, int tagnum, int subblock, +static inline void put_icache_data(int setnum, int tagnum, int subblock, unsigned int *data) { unsigned int value1, value2, vaddr; @@ -92,35 +92,35 @@ extern __inline__ void put_icache_data(int setnum, int tagnum, int subblock, */ /* Flushes which clear out both the on-chip and external caches */ -extern __inline__ void flush_ei_page(unsigned int addr) +static inline void flush_ei_page(unsigned int addr) { __asm__ __volatile__("sta %%g0, [%0] %1\n\t" : : "r" (addr), "i" (ASI_M_FLUSH_PAGE) : "memory"); } -extern __inline__ void flush_ei_seg(unsigned int addr) +static inline void flush_ei_seg(unsigned int addr) { __asm__ __volatile__("sta %%g0, [%0] %1\n\t" : : "r" (addr), "i" (ASI_M_FLUSH_SEG) : "memory"); } -extern __inline__ void flush_ei_region(unsigned int addr) +static inline void flush_ei_region(unsigned int addr) { __asm__ __volatile__("sta %%g0, [%0] %1\n\t" : : "r" (addr), "i" (ASI_M_FLUSH_REGION) : "memory"); } -extern __inline__ void flush_ei_ctx(unsigned int addr) +static inline void flush_ei_ctx(unsigned int addr) { __asm__ __volatile__("sta %%g0, [%0] %1\n\t" : : "r" (addr), "i" (ASI_M_FLUSH_CTX) : "memory"); } -extern __inline__ void flush_ei_user(unsigned int addr) +static inline void flush_ei_user(unsigned int addr) { __asm__ __volatile__("sta %%g0, [%0] %1\n\t" : : "r" (addr), "i" (ASI_M_FLUSH_USER) : diff --git a/include/asm-sparc/cypress.h b/include/asm-sparc/cypress.h index fc92fc839c3f..99599533efbc 100644 --- a/include/asm-sparc/cypress.h +++ b/include/asm-sparc/cypress.h @@ -48,25 +48,25 @@ #define CYPRESS_NFAULT 0x00000002 #define CYPRESS_MENABLE 0x00000001 -extern __inline__ void cypress_flush_page(unsigned long page) +static inline void cypress_flush_page(unsigned long page) { __asm__ __volatile__("sta %%g0, [%0] %1\n\t" : : "r" (page), "i" (ASI_M_FLUSH_PAGE)); } -extern __inline__ void cypress_flush_segment(unsigned long addr) +static inline void cypress_flush_segment(unsigned long addr) { __asm__ __volatile__("sta %%g0, [%0] %1\n\t" : : "r" (addr), "i" (ASI_M_FLUSH_SEG)); } -extern __inline__ void cypress_flush_region(unsigned long addr) +static inline void cypress_flush_region(unsigned long addr) { __asm__ __volatile__("sta %%g0, [%0] %1\n\t" : : "r" (addr), "i" (ASI_M_FLUSH_REGION)); } -extern __inline__ void cypress_flush_context(void) +static inline void cypress_flush_context(void) { __asm__ __volatile__("sta %%g0, [%%g0] %0\n\t" : : "i" (ASI_M_FLUSH_CTX)); diff --git a/include/asm-sparc/delay.h b/include/asm-sparc/delay.h index 6edf2cbb246b..7ec8e9f7ad4f 100644 --- a/include/asm-sparc/delay.h +++ b/include/asm-sparc/delay.h @@ -10,7 +10,7 @@ #include <linux/config.h> #include <asm/cpudata.h> -extern __inline__ void __delay(unsigned long loops) +static inline void __delay(unsigned long loops) { __asm__ __volatile__("cmp %0, 0\n\t" "1: bne 1b\n\t" diff --git a/include/asm-sparc/dma-mapping.h b/include/asm-sparc/dma-mapping.h index 2dc5bb8effa6..d7c3b0f0a901 100644 --- a/include/asm-sparc/dma-mapping.h +++ b/include/asm-sparc/dma-mapping.h @@ -8,7 +8,7 @@ #else static inline void *dma_alloc_coherent(struct device *dev, size_t size, - dma_addr_t *dma_handle, int flag) + dma_addr_t *dma_handle, gfp_t flag) { BUG(); return NULL; diff --git a/include/asm-sparc/dma.h b/include/asm-sparc/dma.h index 07e6368a2521..8ec206aa5f2e 100644 --- a/include/asm-sparc/dma.h +++ b/include/asm-sparc/dma.h @@ -198,7 +198,7 @@ extern void dvma_init(struct sbus_bus *); /* Pause until counter runs out or BIT isn't set in the DMA condition * register. */ -extern __inline__ void sparc_dma_pause(struct sparc_dma_registers *regs, +static inline void sparc_dma_pause(struct sparc_dma_registers *regs, unsigned long bit) { int ctr = 50000; /* Let's find some bugs ;) */ diff --git a/include/asm-sparc/floppy.h b/include/asm-sparc/floppy.h index caf926116506..7a941b800b6b 100644 --- a/include/asm-sparc/floppy.h +++ b/include/asm-sparc/floppy.h @@ -17,10 +17,8 @@ /* We don't need no stinkin' I/O port allocation crap. */ #undef release_region -#undef check_region #undef request_region #define release_region(X, Y) do { } while(0) -#define check_region(X, Y) (0) #define request_region(X, Y, Z) (1) /* References: diff --git a/include/asm-sparc/iommu.h b/include/asm-sparc/iommu.h index 8171362d56b9..70c589c05a10 100644 --- a/include/asm-sparc/iommu.h +++ b/include/asm-sparc/iommu.h @@ -108,12 +108,12 @@ struct iommu_struct { struct bit_map usemap; }; -extern __inline__ void iommu_invalidate(struct iommu_regs *regs) +static inline void iommu_invalidate(struct iommu_regs *regs) { regs->tlbflush = 0; } -extern __inline__ void iommu_invalidate_page(struct iommu_regs *regs, unsigned long ba) +static inline void iommu_invalidate_page(struct iommu_regs *regs, unsigned long ba) { regs->pageflush = (ba & PAGE_MASK); } diff --git a/include/asm-sparc/kbio.h b/include/asm-sparc/kbio.h deleted file mode 100644 index 3cf496bdf399..000000000000 --- a/include/asm-sparc/kbio.h +++ /dev/null @@ -1,56 +0,0 @@ -#ifndef __LINUX_KBIO_H -#define __LINUX_KBIO_H - -/* Return keyboard type */ -#define KIOCTYPE _IOR('k', 9, int) -/* Return Keyboard layout */ -#define KIOCLAYOUT _IOR('k', 20, int) - -enum { - TR_NONE, - TR_ASCII, /* keyboard is in regular state */ - TR_EVENT, /* keystrokes sent as firm events */ - TR_UNTRANS_EVENT /* EVENT+up and down+no translation */ -}; - -/* Return the current keyboard translation */ -#define KIOCGTRANS _IOR('k', 5, int) -/* Set the keyboard translation */ -#define KIOCTRANS _IOW('k', 0, int) - -/* Send a keyboard command */ -#define KIOCCMD _IOW('k', 8, int) - -/* Return if keystrokes are being sent to /dev/kbd */ - -/* Set routing of keystrokes to /dev/kbd */ -#define KIOCSDIRECT _IOW('k', 10, int) - -/* Set keyboard leds */ -#define KIOCSLED _IOW('k', 14, unsigned char) - -/* Get keyboard leds */ -#define KIOCGLED _IOR('k', 15, unsigned char) - -/* Used by KIOC[GS]RATE */ -struct kbd_rate { - unsigned char delay; /* Delay in Hz before first repeat. */ - unsigned char rate; /* In characters per second (0..50). */ -}; - -/* Set keyboard rate */ -#define KIOCSRATE _IOW('k', 40, struct kbd_rate) - -/* Get keyboard rate */ -#define KIOCGRATE _IOW('k', 41, struct kbd_rate) - -/* Top bit records if the key is up or down */ -#define KBD_UP 0x80 - -/* Usable information */ -#define KBD_KEYMASK 0x7f - -/* All keys up */ -#define KBD_IDLE 0x75 - -#endif /* __LINUX_KBIO_H */ diff --git a/include/asm-sparc/kdebug.h b/include/asm-sparc/kdebug.h index 3ea4916635ee..fba92485fdba 100644 --- a/include/asm-sparc/kdebug.h +++ b/include/asm-sparc/kdebug.h @@ -46,7 +46,7 @@ struct kernel_debug { extern struct kernel_debug *linux_dbvec; /* Use this macro in C-code to enter the debugger. */ -extern __inline__ void sp_enter_debugger(void) +static inline void sp_enter_debugger(void) { __asm__ __volatile__("jmpl %0, %%o7\n\t" "nop\n\t" : : diff --git a/include/asm-sparc/mbus.h b/include/asm-sparc/mbus.h index 5f2749015342..ecacdf4075d7 100644 --- a/include/asm-sparc/mbus.h +++ b/include/asm-sparc/mbus.h @@ -83,7 +83,7 @@ extern unsigned int hwbug_bitmask; */ #define TBR_ID_SHIFT 20 -extern __inline__ int get_cpuid(void) +static inline int get_cpuid(void) { register int retval; __asm__ __volatile__("rd %%tbr, %0\n\t" @@ -93,7 +93,7 @@ extern __inline__ int get_cpuid(void) return (retval & 3); } -extern __inline__ int get_modid(void) +static inline int get_modid(void) { return (get_cpuid() | 0x8); } diff --git a/include/asm-sparc/msi.h b/include/asm-sparc/msi.h index b69543dd3b46..ff72cbd946a4 100644 --- a/include/asm-sparc/msi.h +++ b/include/asm-sparc/msi.h @@ -19,7 +19,7 @@ #define MSI_ASYNC_MODE 0x80000000 /* Operate the MSI asynchronously */ -extern __inline__ void msi_set_sync(void) +static inline void msi_set_sync(void) { __asm__ __volatile__ ("lda [%0] %1, %%g3\n\t" "andn %%g3, %2, %%g3\n\t" diff --git a/include/asm-sparc/mxcc.h b/include/asm-sparc/mxcc.h index 60ef9d6fe7bc..128fe9708135 100644 --- a/include/asm-sparc/mxcc.h +++ b/include/asm-sparc/mxcc.h @@ -85,7 +85,7 @@ #ifndef __ASSEMBLY__ -extern __inline__ void mxcc_set_stream_src(unsigned long *paddr) +static inline void mxcc_set_stream_src(unsigned long *paddr) { unsigned long data0 = paddr[0]; unsigned long data1 = paddr[1]; @@ -98,7 +98,7 @@ extern __inline__ void mxcc_set_stream_src(unsigned long *paddr) "i" (ASI_M_MXCC) : "g2", "g3"); } -extern __inline__ void mxcc_set_stream_dst(unsigned long *paddr) +static inline void mxcc_set_stream_dst(unsigned long *paddr) { unsigned long data0 = paddr[0]; unsigned long data1 = paddr[1]; @@ -111,7 +111,7 @@ extern __inline__ void mxcc_set_stream_dst(unsigned long *paddr) "i" (ASI_M_MXCC) : "g2", "g3"); } -extern __inline__ unsigned long mxcc_get_creg(void) +static inline unsigned long mxcc_get_creg(void) { unsigned long mxcc_control; @@ -125,7 +125,7 @@ extern __inline__ unsigned long mxcc_get_creg(void) return mxcc_control; } -extern __inline__ void mxcc_set_creg(unsigned long mxcc_control) +static inline void mxcc_set_creg(unsigned long mxcc_control) { __asm__ __volatile__("sta %0, [%1] %2\n\t" : : "r" (mxcc_control), "r" (MXCC_CREG), diff --git a/include/asm-sparc/obio.h b/include/asm-sparc/obio.h index 62e1d77965f3..47854a2a12cf 100644 --- a/include/asm-sparc/obio.h +++ b/include/asm-sparc/obio.h @@ -98,7 +98,7 @@ #ifndef __ASSEMBLY__ -extern __inline__ int bw_get_intr_mask(int sbus_level) +static inline int bw_get_intr_mask(int sbus_level) { int mask; @@ -109,7 +109,7 @@ extern __inline__ int bw_get_intr_mask(int sbus_level) return mask; } -extern __inline__ void bw_clear_intr_mask(int sbus_level, int mask) +static inline void bw_clear_intr_mask(int sbus_level, int mask) { __asm__ __volatile__ ("stha %0, [%1] %2" : : "r" (mask), @@ -117,7 +117,7 @@ extern __inline__ void bw_clear_intr_mask(int sbus_level, int mask) "i" (ASI_M_CTL)); } -extern __inline__ unsigned bw_get_prof_limit(int cpu) +static inline unsigned bw_get_prof_limit(int cpu) { unsigned limit; @@ -128,7 +128,7 @@ extern __inline__ unsigned bw_get_prof_limit(int cpu) return limit; } -extern __inline__ void bw_set_prof_limit(int cpu, unsigned limit) +static inline void bw_set_prof_limit(int cpu, unsigned limit) { __asm__ __volatile__ ("sta %0, [%1] %2" : : "r" (limit), @@ -136,7 +136,7 @@ extern __inline__ void bw_set_prof_limit(int cpu, unsigned limit) "i" (ASI_M_CTL)); } -extern __inline__ unsigned bw_get_ctrl(int cpu) +static inline unsigned bw_get_ctrl(int cpu) { unsigned ctrl; @@ -147,7 +147,7 @@ extern __inline__ unsigned bw_get_ctrl(int cpu) return ctrl; } -extern __inline__ void bw_set_ctrl(int cpu, unsigned ctrl) +static inline void bw_set_ctrl(int cpu, unsigned ctrl) { __asm__ __volatile__ ("sta %0, [%1] %2" : : "r" (ctrl), @@ -157,7 +157,7 @@ extern __inline__ void bw_set_ctrl(int cpu, unsigned ctrl) extern unsigned char cpu_leds[32]; -extern __inline__ void show_leds(int cpuid) +static inline void show_leds(int cpuid) { cpuid &= 0x1e; __asm__ __volatile__ ("stba %0, [%1] %2" : : @@ -166,7 +166,7 @@ extern __inline__ void show_leds(int cpuid) "i" (ASI_M_CTL)); } -extern __inline__ unsigned cc_get_ipen(void) +static inline unsigned cc_get_ipen(void) { unsigned pending; @@ -177,7 +177,7 @@ extern __inline__ unsigned cc_get_ipen(void) return pending; } -extern __inline__ void cc_set_iclr(unsigned clear) +static inline void cc_set_iclr(unsigned clear) { __asm__ __volatile__ ("stha %0, [%1] %2" : : "r" (clear), @@ -185,7 +185,7 @@ extern __inline__ void cc_set_iclr(unsigned clear) "i" (ASI_M_MXCC)); } -extern __inline__ unsigned cc_get_imsk(void) +static inline unsigned cc_get_imsk(void) { unsigned mask; @@ -196,7 +196,7 @@ extern __inline__ unsigned cc_get_imsk(void) return mask; } -extern __inline__ void cc_set_imsk(unsigned mask) +static inline void cc_set_imsk(unsigned mask) { __asm__ __volatile__ ("stha %0, [%1] %2" : : "r" (mask), @@ -204,7 +204,7 @@ extern __inline__ void cc_set_imsk(unsigned mask) "i" (ASI_M_MXCC)); } -extern __inline__ unsigned cc_get_imsk_other(int cpuid) +static inline unsigned cc_get_imsk_other(int cpuid) { unsigned mask; @@ -215,7 +215,7 @@ extern __inline__ unsigned cc_get_imsk_other(int cpuid) return mask; } -extern __inline__ void cc_set_imsk_other(int cpuid, unsigned mask) +static inline void cc_set_imsk_other(int cpuid, unsigned mask) { __asm__ __volatile__ ("stha %0, [%1] %2" : : "r" (mask), @@ -223,7 +223,7 @@ extern __inline__ void cc_set_imsk_other(int cpuid, unsigned mask) "i" (ASI_M_CTL)); } -extern __inline__ void cc_set_igen(unsigned gen) +static inline void cc_set_igen(unsigned gen) { __asm__ __volatile__ ("sta %0, [%1] %2" : : "r" (gen), @@ -239,7 +239,7 @@ extern __inline__ void cc_set_igen(unsigned gen) #define IGEN_MESSAGE(bcast, devid, sid, levels) \ (((bcast) << 31) | ((devid) << 23) | ((sid) << 15) | (levels)) -extern __inline__ void sun4d_send_ipi(int cpu, int level) +static inline void sun4d_send_ipi(int cpu, int level) { cc_set_igen(IGEN_MESSAGE(0, cpu << 3, 6 + ((level >> 1) & 7), 1 << (level - 1))); } diff --git a/include/asm-sparc/pci.h b/include/asm-sparc/pci.h index 97052baf90c1..38644742f011 100644 --- a/include/asm-sparc/pci.h +++ b/include/asm-sparc/pci.h @@ -15,12 +15,12 @@ #define PCI_IRQ_NONE 0xffffffff -extern inline void pcibios_set_master(struct pci_dev *dev) +static inline void pcibios_set_master(struct pci_dev *dev) { /* No special bus mastering setup handling */ } -extern inline void pcibios_penalize_isa_irq(int irq, int active) +static inline void pcibios_penalize_isa_irq(int irq, int active) { /* We don't do dynamic PCI IRQ allocation */ } @@ -137,7 +137,7 @@ extern void pci_dma_sync_sg_for_device(struct pci_dev *hwdev, struct scatterlist * only drive the low 24-bits during PCI bus mastering, then * you would pass 0x00ffffff as the mask to this function. */ -extern inline int pci_dma_supported(struct pci_dev *hwdev, u64 mask) +static inline int pci_dma_supported(struct pci_dev *hwdev, u64 mask) { return 1; } diff --git a/include/asm-sparc/pgtable.h b/include/asm-sparc/pgtable.h index 8f4f6a959651..b33c35411e82 100644 --- a/include/asm-sparc/pgtable.h +++ b/include/asm-sparc/pgtable.h @@ -82,6 +82,8 @@ extern unsigned long page_kernel; /* Top-level page directory */ extern pgd_t swapper_pg_dir[1024]; +extern void paging_init(void); + /* Page table for 0-4MB for everybody, on the Sparc this * holds the same as on the i386. */ @@ -152,7 +154,7 @@ BTFIXUPDEF_CALL_CONST(int, pte_present, pte_t) BTFIXUPDEF_CALL(void, pte_clear, pte_t *) BTFIXUPDEF_CALL(int, pte_read, pte_t) -extern __inline__ int pte_none(pte_t pte) +static inline int pte_none(pte_t pte) { return !(pte_val(pte) & ~BTFIXUP_SETHI(none_mask)); } @@ -165,7 +167,7 @@ BTFIXUPDEF_CALL_CONST(int, pmd_bad, pmd_t) BTFIXUPDEF_CALL_CONST(int, pmd_present, pmd_t) BTFIXUPDEF_CALL(void, pmd_clear, pmd_t *) -extern __inline__ int pmd_none(pmd_t pmd) +static inline int pmd_none(pmd_t pmd) { return !(pmd_val(pmd) & ~BTFIXUP_SETHI(none_mask)); } @@ -192,20 +194,20 @@ BTFIXUPDEF_HALF(pte_writei) BTFIXUPDEF_HALF(pte_dirtyi) BTFIXUPDEF_HALF(pte_youngi) -extern int pte_write(pte_t pte) __attribute_const__; -extern __inline__ int pte_write(pte_t pte) +static int pte_write(pte_t pte) __attribute_const__; +static inline int pte_write(pte_t pte) { return pte_val(pte) & BTFIXUP_HALF(pte_writei); } -extern int pte_dirty(pte_t pte) __attribute_const__; -extern __inline__ int pte_dirty(pte_t pte) +static int pte_dirty(pte_t pte) __attribute_const__; +static inline int pte_dirty(pte_t pte) { return pte_val(pte) & BTFIXUP_HALF(pte_dirtyi); } -extern int pte_young(pte_t pte) __attribute_const__; -extern __inline__ int pte_young(pte_t pte) +static int pte_young(pte_t pte) __attribute_const__; +static inline int pte_young(pte_t pte) { return pte_val(pte) & BTFIXUP_HALF(pte_youngi); } @@ -215,8 +217,8 @@ extern __inline__ int pte_young(pte_t pte) */ BTFIXUPDEF_HALF(pte_filei) -extern int pte_file(pte_t pte) __attribute_const__; -extern __inline__ int pte_file(pte_t pte) +static int pte_file(pte_t pte) __attribute_const__; +static inline int pte_file(pte_t pte) { return pte_val(pte) & BTFIXUP_HALF(pte_filei); } @@ -227,20 +229,20 @@ BTFIXUPDEF_HALF(pte_wrprotecti) BTFIXUPDEF_HALF(pte_mkcleani) BTFIXUPDEF_HALF(pte_mkoldi) -extern pte_t pte_wrprotect(pte_t pte) __attribute_const__; -extern __inline__ pte_t pte_wrprotect(pte_t pte) +static pte_t pte_wrprotect(pte_t pte) __attribute_const__; +static inline pte_t pte_wrprotect(pte_t pte) { return __pte(pte_val(pte) & ~BTFIXUP_HALF(pte_wrprotecti)); } -extern pte_t pte_mkclean(pte_t pte) __attribute_const__; -extern __inline__ pte_t pte_mkclean(pte_t pte) +static pte_t pte_mkclean(pte_t pte) __attribute_const__; +static inline pte_t pte_mkclean(pte_t pte) { return __pte(pte_val(pte) & ~BTFIXUP_HALF(pte_mkcleani)); } -extern pte_t pte_mkold(pte_t pte) __attribute_const__; -extern __inline__ pte_t pte_mkold(pte_t pte) +static pte_t pte_mkold(pte_t pte) __attribute_const__; +static inline pte_t pte_mkold(pte_t pte) { return __pte(pte_val(pte) & ~BTFIXUP_HALF(pte_mkoldi)); } @@ -253,8 +255,6 @@ BTFIXUPDEF_CALL_CONST(pte_t, pte_mkyoung, pte_t) #define pte_mkdirty(pte) BTFIXUP_CALL(pte_mkdirty)(pte) #define pte_mkyoung(pte) BTFIXUP_CALL(pte_mkyoung)(pte) -#define page_pte_prot(page, prot) mk_pte(page, prot) -#define page_pte(page) mk_pte(page, __pgprot(0)) #define pfn_pte(pfn, prot) mk_pte(pfn_to_page(pfn), prot) BTFIXUPDEF_CALL(unsigned long, pte_pfn, pte_t) @@ -276,8 +276,8 @@ BTFIXUPDEF_CALL_CONST(pte_t, mk_pte_io, unsigned long, pgprot_t, int) BTFIXUPDEF_INT(pte_modify_mask) -extern pte_t pte_modify(pte_t pte, pgprot_t newprot) __attribute_const__; -extern __inline__ pte_t pte_modify(pte_t pte, pgprot_t newprot) +static pte_t pte_modify(pte_t pte, pgprot_t newprot) __attribute_const__; +static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) { return __pte((pte_val(pte) & BTFIXUP_INT(pte_modify_mask)) | pgprot_val(newprot)); @@ -384,13 +384,13 @@ extern struct ctx_list ctx_used; /* Head of used contexts list */ #define NO_CONTEXT -1 -extern __inline__ void remove_from_ctx_list(struct ctx_list *entry) +static inline void remove_from_ctx_list(struct ctx_list *entry) { entry->next->prev = entry->prev; entry->prev->next = entry->next; } -extern __inline__ void add_to_ctx_list(struct ctx_list *head, struct ctx_list *entry) +static inline void add_to_ctx_list(struct ctx_list *head, struct ctx_list *entry) { entry->next = head; (entry->prev = head->prev)->next = entry; @@ -399,7 +399,7 @@ extern __inline__ void add_to_ctx_list(struct ctx_list *head, struct ctx_list *e #define add_to_free_ctxlist(entry) add_to_ctx_list(&ctx_free, entry) #define add_to_used_ctxlist(entry) add_to_ctx_list(&ctx_used, entry) -extern __inline__ unsigned long +static inline unsigned long __get_phys (unsigned long addr) { switch (sparc_cpu_model){ @@ -414,7 +414,7 @@ __get_phys (unsigned long addr) } } -extern __inline__ int +static inline int __get_iospace (unsigned long addr) { switch (sparc_cpu_model){ diff --git a/include/asm-sparc/pgtsrmmu.h b/include/asm-sparc/pgtsrmmu.h index ee3b9d93187c..edeb9811e728 100644 --- a/include/asm-sparc/pgtsrmmu.h +++ b/include/asm-sparc/pgtsrmmu.h @@ -148,7 +148,7 @@ extern void *srmmu_nocache_pool; #define __nocache_fix(VADDR) __va(__nocache_pa(VADDR)) /* Accessing the MMU control register. */ -extern __inline__ unsigned int srmmu_get_mmureg(void) +static inline unsigned int srmmu_get_mmureg(void) { unsigned int retval; __asm__ __volatile__("lda [%%g0] %1, %0\n\t" : @@ -157,14 +157,14 @@ extern __inline__ unsigned int srmmu_get_mmureg(void) return retval; } -extern __inline__ void srmmu_set_mmureg(unsigned long regval) +static inline void srmmu_set_mmureg(unsigned long regval) { __asm__ __volatile__("sta %0, [%%g0] %1\n\t" : : "r" (regval), "i" (ASI_M_MMUREGS) : "memory"); } -extern __inline__ void srmmu_set_ctable_ptr(unsigned long paddr) +static inline void srmmu_set_ctable_ptr(unsigned long paddr) { paddr = ((paddr >> 4) & SRMMU_CTX_PMASK); __asm__ __volatile__("sta %0, [%1] %2\n\t" : : @@ -173,7 +173,7 @@ extern __inline__ void srmmu_set_ctable_ptr(unsigned long paddr) "memory"); } -extern __inline__ unsigned long srmmu_get_ctable_ptr(void) +static inline unsigned long srmmu_get_ctable_ptr(void) { unsigned int retval; @@ -184,14 +184,14 @@ extern __inline__ unsigned long srmmu_get_ctable_ptr(void) return (retval & SRMMU_CTX_PMASK) << 4; } -extern __inline__ void srmmu_set_context(int context) +static inline void srmmu_set_context(int context) { __asm__ __volatile__("sta %0, [%1] %2\n\t" : : "r" (context), "r" (SRMMU_CTX_REG), "i" (ASI_M_MMUREGS) : "memory"); } -extern __inline__ int srmmu_get_context(void) +static inline int srmmu_get_context(void) { register int retval; __asm__ __volatile__("lda [%1] %2, %0\n\t" : @@ -201,7 +201,7 @@ extern __inline__ int srmmu_get_context(void) return retval; } -extern __inline__ unsigned int srmmu_get_fstatus(void) +static inline unsigned int srmmu_get_fstatus(void) { unsigned int retval; @@ -211,7 +211,7 @@ extern __inline__ unsigned int srmmu_get_fstatus(void) return retval; } -extern __inline__ unsigned int srmmu_get_faddr(void) +static inline unsigned int srmmu_get_faddr(void) { unsigned int retval; @@ -222,7 +222,7 @@ extern __inline__ unsigned int srmmu_get_faddr(void) } /* This is guaranteed on all SRMMU's. */ -extern __inline__ void srmmu_flush_whole_tlb(void) +static inline void srmmu_flush_whole_tlb(void) { __asm__ __volatile__("sta %%g0, [%0] %1\n\t": : "r" (0x400), /* Flush entire TLB!! */ @@ -231,7 +231,7 @@ extern __inline__ void srmmu_flush_whole_tlb(void) } /* These flush types are not available on all chips... */ -extern __inline__ void srmmu_flush_tlb_ctx(void) +static inline void srmmu_flush_tlb_ctx(void) { __asm__ __volatile__("sta %%g0, [%0] %1\n\t": : "r" (0x300), /* Flush TLB ctx.. */ @@ -239,7 +239,7 @@ extern __inline__ void srmmu_flush_tlb_ctx(void) } -extern __inline__ void srmmu_flush_tlb_region(unsigned long addr) +static inline void srmmu_flush_tlb_region(unsigned long addr) { addr &= SRMMU_PGDIR_MASK; __asm__ __volatile__("sta %%g0, [%0] %1\n\t": : @@ -249,7 +249,7 @@ extern __inline__ void srmmu_flush_tlb_region(unsigned long addr) } -extern __inline__ void srmmu_flush_tlb_segment(unsigned long addr) +static inline void srmmu_flush_tlb_segment(unsigned long addr) { addr &= SRMMU_REAL_PMD_MASK; __asm__ __volatile__("sta %%g0, [%0] %1\n\t": : @@ -258,7 +258,7 @@ extern __inline__ void srmmu_flush_tlb_segment(unsigned long addr) } -extern __inline__ void srmmu_flush_tlb_page(unsigned long page) +static inline void srmmu_flush_tlb_page(unsigned long page) { page &= PAGE_MASK; __asm__ __volatile__("sta %%g0, [%0] %1\n\t": : @@ -267,7 +267,7 @@ extern __inline__ void srmmu_flush_tlb_page(unsigned long page) } -extern __inline__ unsigned long srmmu_hwprobe(unsigned long vaddr) +static inline unsigned long srmmu_hwprobe(unsigned long vaddr) { unsigned long retval; @@ -279,7 +279,7 @@ extern __inline__ unsigned long srmmu_hwprobe(unsigned long vaddr) return retval; } -extern __inline__ int +static inline int srmmu_get_pte (unsigned long addr) { register unsigned long entry; diff --git a/include/asm-sparc/processor.h b/include/asm-sparc/processor.h index 5a7a1a8d29ac..6fbb3f0af8d8 100644 --- a/include/asm-sparc/processor.h +++ b/include/asm-sparc/processor.h @@ -79,7 +79,7 @@ struct thread_struct { extern unsigned long thread_saved_pc(struct task_struct *t); /* Do necessary setup to start up a newly executed thread. */ -extern __inline__ void start_thread(struct pt_regs * regs, unsigned long pc, +static inline void start_thread(struct pt_regs * regs, unsigned long pc, unsigned long sp) { register unsigned long zero asm("g1"); diff --git a/include/asm-sparc/psr.h b/include/asm-sparc/psr.h index 9778b8c8b15b..19c978051118 100644 --- a/include/asm-sparc/psr.h +++ b/include/asm-sparc/psr.h @@ -38,7 +38,7 @@ #ifndef __ASSEMBLY__ /* Get the %psr register. */ -extern __inline__ unsigned int get_psr(void) +static inline unsigned int get_psr(void) { unsigned int psr; __asm__ __volatile__( @@ -53,7 +53,7 @@ extern __inline__ unsigned int get_psr(void) return psr; } -extern __inline__ void put_psr(unsigned int new_psr) +static inline void put_psr(unsigned int new_psr) { __asm__ __volatile__( "wr %0, 0x0, %%psr\n\t" @@ -72,7 +72,7 @@ extern __inline__ void put_psr(unsigned int new_psr) extern unsigned int fsr_storage; -extern __inline__ unsigned int get_fsr(void) +static inline unsigned int get_fsr(void) { unsigned int fsr = 0; diff --git a/include/asm-sparc/ptrace.h b/include/asm-sparc/ptrace.h index a8ecb2d6977a..714497099a42 100644 --- a/include/asm-sparc/ptrace.h +++ b/include/asm-sparc/ptrace.h @@ -60,6 +60,9 @@ struct sparc_stackf { #define STACKFRAME_SZ sizeof(struct sparc_stackf) #ifdef __KERNEL__ + +#define __ARCH_SYS_PTRACE 1 + #define user_mode(regs) (!((regs)->psr & PSR_PS)) #define instruction_pointer(regs) ((regs)->pc) unsigned long profile_pc(struct pt_regs *); diff --git a/include/asm-sparc/sbi.h b/include/asm-sparc/sbi.h index 739ccac5dcf2..86a603ac7b20 100644 --- a/include/asm-sparc/sbi.h +++ b/include/asm-sparc/sbi.h @@ -65,7 +65,7 @@ struct sbi_regs { #ifndef __ASSEMBLY__ -extern __inline__ int acquire_sbi(int devid, int mask) +static inline int acquire_sbi(int devid, int mask) { __asm__ __volatile__ ("swapa [%2] %3, %0" : "=r" (mask) : @@ -75,7 +75,7 @@ extern __inline__ int acquire_sbi(int devid, int mask) return mask; } -extern __inline__ void release_sbi(int devid, int mask) +static inline void release_sbi(int devid, int mask) { __asm__ __volatile__ ("sta %0, [%1] %2" : : "r" (mask), @@ -83,7 +83,7 @@ extern __inline__ void release_sbi(int devid, int mask) "i" (ASI_M_CTL)); } -extern __inline__ void set_sbi_tid(int devid, int targetid) +static inline void set_sbi_tid(int devid, int targetid) { __asm__ __volatile__ ("sta %0, [%1] %2" : : "r" (targetid), @@ -91,7 +91,7 @@ extern __inline__ void set_sbi_tid(int devid, int targetid) "i" (ASI_M_CTL)); } -extern __inline__ int get_sbi_ctl(int devid, int cfgno) +static inline int get_sbi_ctl(int devid, int cfgno) { int cfg; @@ -102,7 +102,7 @@ extern __inline__ int get_sbi_ctl(int devid, int cfgno) return cfg; } -extern __inline__ void set_sbi_ctl(int devid, int cfgno, int cfg) +static inline void set_sbi_ctl(int devid, int cfgno, int cfg) { __asm__ __volatile__ ("sta %0, [%1] %2" : : "r" (cfg), diff --git a/include/asm-sparc/sbus.h b/include/asm-sparc/sbus.h index 3a8b3908728a..a13cddcecec5 100644 --- a/include/asm-sparc/sbus.h +++ b/include/asm-sparc/sbus.h @@ -28,12 +28,12 @@ * numbers + offsets, and vice versa. */ -extern __inline__ unsigned long sbus_devaddr(int slotnum, unsigned long offset) +static inline unsigned long sbus_devaddr(int slotnum, unsigned long offset) { return (unsigned long) (SUN_SBUS_BVADDR+((slotnum)<<25)+(offset)); } -extern __inline__ int sbus_dev_slot(unsigned long dev_addr) +static inline int sbus_dev_slot(unsigned long dev_addr) { return (int) (((dev_addr)-SUN_SBUS_BVADDR)>>25); } @@ -80,7 +80,7 @@ struct sbus_bus { extern struct sbus_bus *sbus_root; -extern __inline__ int +static inline int sbus_is_slave(struct sbus_dev *dev) { /* XXX Have to write this for sun4c's */ diff --git a/include/asm-sparc/semaphore.h b/include/asm-sparc/semaphore.h index 60ac5fd9eb48..f74ba31e265b 100644 --- a/include/asm-sparc/semaphore.h +++ b/include/asm-sparc/semaphore.h @@ -22,9 +22,6 @@ struct semaphore { .wait = __WAIT_QUEUE_HEAD_INITIALIZER((name).wait) \ } -#define __MUTEX_INITIALIZER(name) \ - __SEMAPHORE_INITIALIZER(name,1) - #define __DECLARE_SEMAPHORE_GENERIC(name,count) \ struct semaphore name = __SEMAPHORE_INITIALIZER(name,count) diff --git a/include/asm-sparc/smp.h b/include/asm-sparc/smp.h index 4f96d8333a12..580c51d011df 100644 --- a/include/asm-sparc/smp.h +++ b/include/asm-sparc/smp.h @@ -60,22 +60,22 @@ BTFIXUPDEF_BLACKBOX(load_current) #define smp_cross_call(func,arg1,arg2,arg3,arg4,arg5) BTFIXUP_CALL(smp_cross_call)(func,arg1,arg2,arg3,arg4,arg5) #define smp_message_pass(target,msg,data,wait) BTFIXUP_CALL(smp_message_pass)(target,msg,data,wait) -extern __inline__ void xc0(smpfunc_t func) { smp_cross_call(func, 0, 0, 0, 0, 0); } -extern __inline__ void xc1(smpfunc_t func, unsigned long arg1) +static inline void xc0(smpfunc_t func) { smp_cross_call(func, 0, 0, 0, 0, 0); } +static inline void xc1(smpfunc_t func, unsigned long arg1) { smp_cross_call(func, arg1, 0, 0, 0, 0); } -extern __inline__ void xc2(smpfunc_t func, unsigned long arg1, unsigned long arg2) +static inline void xc2(smpfunc_t func, unsigned long arg1, unsigned long arg2) { smp_cross_call(func, arg1, arg2, 0, 0, 0); } -extern __inline__ void xc3(smpfunc_t func, unsigned long arg1, unsigned long arg2, +static inline void xc3(smpfunc_t func, unsigned long arg1, unsigned long arg2, unsigned long arg3) { smp_cross_call(func, arg1, arg2, arg3, 0, 0); } -extern __inline__ void xc4(smpfunc_t func, unsigned long arg1, unsigned long arg2, +static inline void xc4(smpfunc_t func, unsigned long arg1, unsigned long arg2, unsigned long arg3, unsigned long arg4) { smp_cross_call(func, arg1, arg2, arg3, arg4, 0); } -extern __inline__ void xc5(smpfunc_t func, unsigned long arg1, unsigned long arg2, +static inline void xc5(smpfunc_t func, unsigned long arg1, unsigned long arg2, unsigned long arg3, unsigned long arg4, unsigned long arg5) { smp_cross_call(func, arg1, arg2, arg3, arg4, arg5); } -extern __inline__ int smp_call_function(void (*func)(void *info), void *info, int nonatomic, int wait) +static inline int smp_call_function(void (*func)(void *info), void *info, int nonatomic, int wait) { xc1((smpfunc_t)func, (unsigned long)info); return 0; @@ -84,16 +84,16 @@ extern __inline__ int smp_call_function(void (*func)(void *info), void *info, in extern __volatile__ int __cpu_number_map[NR_CPUS]; extern __volatile__ int __cpu_logical_map[NR_CPUS]; -extern __inline__ int cpu_logical_map(int cpu) +static inline int cpu_logical_map(int cpu) { return __cpu_logical_map[cpu]; } -extern __inline__ int cpu_number_map(int cpu) +static inline int cpu_number_map(int cpu) { return __cpu_number_map[cpu]; } -extern __inline__ int hard_smp4m_processor_id(void) +static inline int hard_smp4m_processor_id(void) { int cpuid; @@ -104,7 +104,7 @@ extern __inline__ int hard_smp4m_processor_id(void) return cpuid; } -extern __inline__ int hard_smp4d_processor_id(void) +static inline int hard_smp4d_processor_id(void) { int cpuid; @@ -114,7 +114,7 @@ extern __inline__ int hard_smp4d_processor_id(void) } #ifndef MODULE -extern __inline__ int hard_smp_processor_id(void) +static inline int hard_smp_processor_id(void) { int cpuid; @@ -136,7 +136,7 @@ extern __inline__ int hard_smp_processor_id(void) return cpuid; } #else -extern __inline__ int hard_smp_processor_id(void) +static inline int hard_smp_processor_id(void) { int cpuid; diff --git a/include/asm-sparc/smpprim.h b/include/asm-sparc/smpprim.h index 9b9c28ed748e..e7b6d346ae10 100644 --- a/include/asm-sparc/smpprim.h +++ b/include/asm-sparc/smpprim.h @@ -15,7 +15,7 @@ * atomic. */ -extern __inline__ __volatile__ char test_and_set(void *addr) +static inline __volatile__ char test_and_set(void *addr) { char state = 0; @@ -27,7 +27,7 @@ extern __inline__ __volatile__ char test_and_set(void *addr) } /* Initialize a spin-lock. */ -extern __inline__ __volatile__ smp_initlock(void *spinlock) +static inline __volatile__ smp_initlock(void *spinlock) { /* Unset the lock. */ *((unsigned char *) spinlock) = 0; @@ -36,7 +36,7 @@ extern __inline__ __volatile__ smp_initlock(void *spinlock) } /* This routine spins until it acquires the lock at ADDR. */ -extern __inline__ __volatile__ smp_lock(void *addr) +static inline __volatile__ smp_lock(void *addr) { while(test_and_set(addr) == 0xff) ; @@ -46,7 +46,7 @@ extern __inline__ __volatile__ smp_lock(void *addr) } /* This routine releases the lock at ADDR. */ -extern __inline__ __volatile__ smp_unlock(void *addr) +static inline __volatile__ smp_unlock(void *addr) { *((unsigned char *) addr) = 0; } diff --git a/include/asm-sparc/spinlock.h b/include/asm-sparc/spinlock.h index 111727a2bb4e..e344c98a6f5f 100644 --- a/include/asm-sparc/spinlock.h +++ b/include/asm-sparc/spinlock.h @@ -17,7 +17,7 @@ #define __raw_spin_unlock_wait(lock) \ do { while (__raw_spin_is_locked(lock)) cpu_relax(); } while (0) -extern __inline__ void __raw_spin_lock(raw_spinlock_t *lock) +static inline void __raw_spin_lock(raw_spinlock_t *lock) { __asm__ __volatile__( "\n1:\n\t" @@ -37,7 +37,7 @@ extern __inline__ void __raw_spin_lock(raw_spinlock_t *lock) : "g2", "memory", "cc"); } -extern __inline__ int __raw_spin_trylock(raw_spinlock_t *lock) +static inline int __raw_spin_trylock(raw_spinlock_t *lock) { unsigned int result; __asm__ __volatile__("ldstub [%1], %0" @@ -47,7 +47,7 @@ extern __inline__ int __raw_spin_trylock(raw_spinlock_t *lock) return (result == 0); } -extern __inline__ void __raw_spin_unlock(raw_spinlock_t *lock) +static inline void __raw_spin_unlock(raw_spinlock_t *lock) { __asm__ __volatile__("stb %%g0, [%0]" : : "r" (lock) : "memory"); } @@ -78,7 +78,7 @@ extern __inline__ void __raw_spin_unlock(raw_spinlock_t *lock) * * Unfortunately this scheme limits us to ~16,000,000 cpus. */ -extern __inline__ void __read_lock(raw_rwlock_t *rw) +static inline void __read_lock(raw_rwlock_t *rw) { register raw_rwlock_t *lp asm("g1"); lp = rw; @@ -98,7 +98,7 @@ do { unsigned long flags; \ local_irq_restore(flags); \ } while(0) -extern __inline__ void __read_unlock(raw_rwlock_t *rw) +static inline void __read_unlock(raw_rwlock_t *rw) { register raw_rwlock_t *lp asm("g1"); lp = rw; diff --git a/include/asm-sparc/system.h b/include/asm-sparc/system.h index 3557781a4bfd..1f6b71f9e1b6 100644 --- a/include/asm-sparc/system.h +++ b/include/asm-sparc/system.h @@ -204,7 +204,7 @@ static inline unsigned long getipl(void) BTFIXUPDEF_CALL(void, ___xchg32, void) #endif -extern __inline__ unsigned long xchg_u32(__volatile__ unsigned long *m, unsigned long val) +static inline unsigned long xchg_u32(__volatile__ unsigned long *m, unsigned long val) { #ifdef CONFIG_SMP __asm__ __volatile__("swap [%2], %0" diff --git a/include/asm-sparc/termios.h b/include/asm-sparc/termios.h index 0a8ad4cac125..d05f83c80989 100644 --- a/include/asm-sparc/termios.h +++ b/include/asm-sparc/termios.h @@ -38,15 +38,6 @@ struct sunos_ttysize { int st_columns; /* Columns on the terminal */ }; -/* Used for packet mode */ -#define TIOCPKT_DATA 0 -#define TIOCPKT_FLUSHREAD 1 -#define TIOCPKT_FLUSHWRITE 2 -#define TIOCPKT_STOP 4 -#define TIOCPKT_START 8 -#define TIOCPKT_NOSTOP 16 -#define TIOCPKT_DOSTOP 32 - struct winsize { unsigned short ws_row; unsigned short ws_col; diff --git a/include/asm-sparc/traps.h b/include/asm-sparc/traps.h index 6690ab956ea6..f62c7f878ee1 100644 --- a/include/asm-sparc/traps.h +++ b/include/asm-sparc/traps.h @@ -22,7 +22,7 @@ struct tt_entry { /* We set this to _start in system setup. */ extern struct tt_entry *sparc_ttable; -extern __inline__ unsigned long get_tbr(void) +static inline unsigned long get_tbr(void) { unsigned long tbr; diff --git a/include/asm-sparc/vuid_event.h b/include/asm-sparc/vuid_event.h deleted file mode 100644 index 7781e9f2fdd3..000000000000 --- a/include/asm-sparc/vuid_event.h +++ /dev/null @@ -1,41 +0,0 @@ -/* SunOS Virtual User Input Device (VUID) compatibility */ - - -typedef struct firm_event { - unsigned short id; /* tag for this event */ - unsigned char pair_type; /* unused by X11 */ - unsigned char pair; /* unused by X11 */ - int value; /* VKEY_UP, VKEY_DOWN or delta */ - struct timeval time; -} Firm_event; - -enum { - FE_PAIR_NONE, - FE_PAIR_SET, - FE_PAIR_DELTA, - FE_PAIR_ABSOLUTE -}; - -/* VUID stream formats */ -#define VUID_NATIVE 0 /* Native byte stream format */ -#define VUID_FIRM_EVENT 1 /* send firm_event structures */ - -/* ioctls */ - /* Set input device byte stream format (any of VUID_{NATIVE,FIRM_EVENT}) */ -#define VUIDSFORMAT _IOW('v', 1, int) - /* Retrieve input device byte stream format */ -#define VUIDGFORMAT _IOR('v', 2, int) - -/* Possible tag values */ -/* mouse buttons: */ -#define MS_LEFT 0x7f20 -#define MS_MIDDLE 0x7f21 -#define MS_RIGHT 0x7f22 -/* motion: */ -#define LOC_X_DELTA 0x7f80 -#define LOC_Y_DELTA 0x7f81 -#define LOC_X_ABSOLUTE 0x7f82 /* X compat, unsupported */ -#define LOC_Y_ABSOLUTE 0x7f83 /* X compat, unsupported */ - -#define VKEY_UP 0 -#define VKEY_DOWN 1 diff --git a/include/asm-sparc64/atomic.h b/include/asm-sparc64/atomic.h index e175afcf2cde..3789fe315992 100644 --- a/include/asm-sparc64/atomic.h +++ b/include/asm-sparc64/atomic.h @@ -54,6 +54,7 @@ extern int atomic64_sub_ret(int, atomic64_t *); * other cases. */ #define atomic_inc_and_test(v) (atomic_inc_return(v) == 0) +#define atomic64_inc_and_test(v) (atomic64_inc_return(v) == 0) #define atomic_sub_and_test(i, v) (atomic_sub_ret(i, v) == 0) #define atomic64_sub_and_test(i, v) (atomic64_sub_ret(i, v) == 0) @@ -70,6 +71,18 @@ extern int atomic64_sub_ret(int, atomic64_t *); #define atomic_add_negative(i, v) (atomic_add_ret(i, v) < 0) #define atomic64_add_negative(i, v) (atomic64_add_ret(i, v) < 0) +#define atomic_cmpxchg(v, o, n) ((int)cmpxchg(&((v)->counter), (o), (n))) + +#define atomic_add_unless(v, a, u) \ +({ \ + int c, old; \ + c = atomic_read(v); \ + while (c != (u) && (old = atomic_cmpxchg((v), c, c + (a))) != c) \ + c = old; \ + c != (u); \ +}) +#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0) + /* Atomic operations are already serializing */ #ifdef CONFIG_SMP #define smp_mb__before_atomic_dec() membar_storeload_loadload(); diff --git a/include/asm-sparc64/audioio.h b/include/asm-sparc64/audioio.h deleted file mode 100644 index cf16173f521b..000000000000 --- a/include/asm-sparc64/audioio.h +++ /dev/null @@ -1,234 +0,0 @@ -/* - * include/asm-sparc/audioio.h - * - * Sparc Audio Midlayer - * Copyright (C) 1996 Thomas K. Dyas (tdyas@noc.rutgers.edu) - */ - -#ifndef _AUDIOIO_H_ -#define _AUDIOIO_H_ - -/* - * SunOS/Solaris /dev/audio interface - */ - -#if defined(__KERNEL__) || !defined(__GLIBC__) || (__GLIBC__ < 2) -#include <linux/types.h> -#include <linux/time.h> -#include <linux/ioctl.h> -#endif - -/* - * This structure contains state information for audio device IO streams. - */ -typedef struct audio_prinfo { - /* - * The following values describe the audio data encoding. - */ - unsigned int sample_rate; /* samples per second */ - unsigned int channels; /* number of interleaved channels */ - unsigned int precision; /* bit-width of each sample */ - unsigned int encoding; /* data encoding method */ - - /* - * The following values control audio device configuration - */ - unsigned int gain; /* gain level: 0 - 255 */ - unsigned int port; /* selected I/O port (see below) */ - unsigned int avail_ports; /* available I/O ports (see below) */ - unsigned int _xxx[2]; /* Reserved for future use */ - - unsigned int buffer_size; /* I/O buffer size */ - - /* - * The following values describe driver state - */ - unsigned int samples; /* number of samples converted */ - unsigned int eof; /* End Of File counter (play only) */ - - unsigned char pause; /* non-zero for pause, zero to resume */ - unsigned char error; /* non-zero if overflow/underflow */ - unsigned char waiting; /* non-zero if a process wants access */ - unsigned char balance; /* stereo channel balance */ - - unsigned short minordev; - - /* - * The following values are read-only state flags - */ - unsigned char open; /* non-zero if open access permitted */ - unsigned char active; /* non-zero if I/O is active */ -} audio_prinfo_t; - - -/* - * This structure describes the current state of the audio device. - */ -typedef struct audio_info { - /* - * Per-stream information - */ - audio_prinfo_t play; /* output status information */ - audio_prinfo_t record; /* input status information */ - - /* - * Per-unit/channel information - */ - unsigned int monitor_gain; /* input to output mix: 0 - 255 */ - unsigned char output_muted; /* non-zero if output is muted */ - unsigned char _xxx[3]; /* Reserved for future use */ - unsigned int _yyy[3]; /* Reserved for future use */ -} audio_info_t; - - -/* - * Audio encoding types - */ -#define AUDIO_ENCODING_NONE (0) /* no encoding assigned */ -#define AUDIO_ENCODING_ULAW (1) /* u-law encoding */ -#define AUDIO_ENCODING_ALAW (2) /* A-law encoding */ -#define AUDIO_ENCODING_LINEAR (3) /* Linear PCM encoding */ -#define AUDIO_ENCODING_FLOAT (4) /* IEEE float (-1. <-> +1.) */ -#define AUDIO_ENCODING_DVI (104) /* DVI ADPCM */ -#define AUDIO_ENCODING_LINEAR8 (105) /* 8 bit UNSIGNED */ -#define AUDIO_ENCODING_LINEARLE (106) /* Linear PCM LE encoding */ - -/* - * These ranges apply to record, play, and monitor gain values - */ -#define AUDIO_MIN_GAIN (0) /* minimum gain value */ -#define AUDIO_MAX_GAIN (255) /* maximum gain value */ - -/* - * These values apply to the balance field to adjust channel gain values - */ -#define AUDIO_LEFT_BALANCE (0) /* left channel only */ -#define AUDIO_MID_BALANCE (32) /* equal left/right channel */ -#define AUDIO_RIGHT_BALANCE (64) /* right channel only */ -#define AUDIO_BALANCE_SHIFT (3) - -/* - * Generic minimum/maximum limits for number of channels, both modes - */ -#define AUDIO_MIN_PLAY_CHANNELS (1) -#define AUDIO_MAX_PLAY_CHANNELS (4) -#define AUDIO_MIN_REC_CHANNELS (1) -#define AUDIO_MAX_REC_CHANNELS (4) - -/* - * Generic minimum/maximum limits for sample precision - */ -#define AUDIO_MIN_PLAY_PRECISION (8) -#define AUDIO_MAX_PLAY_PRECISION (32) -#define AUDIO_MIN_REC_PRECISION (8) -#define AUDIO_MAX_REC_PRECISION (32) - -/* - * Define some convenient names for typical audio ports - */ -/* - * output ports (several may be enabled simultaneously) - */ -#define AUDIO_SPEAKER 0x01 /* output to built-in speaker */ -#define AUDIO_HEADPHONE 0x02 /* output to headphone jack */ -#define AUDIO_LINE_OUT 0x04 /* output to line out */ - -/* - * input ports (usually only one at a time) - */ -#define AUDIO_MICROPHONE 0x01 /* input from microphone */ -#define AUDIO_LINE_IN 0x02 /* input from line in */ -#define AUDIO_CD 0x04 /* input from on-board CD inputs */ -#define AUDIO_INTERNAL_CD_IN AUDIO_CD /* input from internal CDROM */ -#define AUDIO_ANALOG_LOOPBACK 0x40 /* input from output */ - - -/* - * This macro initializes an audio_info structure to 'harmless' values. - * Note that (~0) might not be a harmless value for a flag that was - * a signed int. - */ -#define AUDIO_INITINFO(i) { \ - unsigned int *__x__; \ - for (__x__ = (unsigned int *)(i); \ - (char *) __x__ < (((char *)(i)) + sizeof (audio_info_t)); \ - *__x__++ = ~0); \ -} - -/* - * These allow testing for what the user wants to set - */ -#define AUD_INITVALUE (~0) -#define Modify(X) ((unsigned int)(X) != AUD_INITVALUE) -#define Modifys(X) ((X) != (unsigned short)AUD_INITVALUE) -#define Modifyc(X) ((X) != (unsigned char)AUD_INITVALUE) - -/* - * Parameter for the AUDIO_GETDEV ioctl to determine current - * audio devices. - */ -#define MAX_AUDIO_DEV_LEN (16) -typedef struct audio_device { - char name[MAX_AUDIO_DEV_LEN]; - char version[MAX_AUDIO_DEV_LEN]; - char config[MAX_AUDIO_DEV_LEN]; -} audio_device_t; - - -/* - * Ioctl calls for the audio device. - */ - -/* - * AUDIO_GETINFO retrieves the current state of the audio device. - * - * AUDIO_SETINFO copies all fields of the audio_info structure whose - * values are not set to the initialized value (-1) to the device state. - * It performs an implicit AUDIO_GETINFO to return the new state of the - * device. Note that the record.samples and play.samples fields are set - * to the last value before the AUDIO_SETINFO took effect. This allows - * an application to reset the counters while atomically retrieving the - * last value. - * - * AUDIO_DRAIN suspends the calling process until the write buffers are - * empty. - * - * AUDIO_GETDEV returns a structure of type audio_device_t which contains - * three strings. The string "name" is a short identifying string (for - * example, the SBus Fcode name string), the string "version" identifies - * the current version of the device, and the "config" string identifies - * the specific configuration of the audio stream. All fields are - * device-dependent -- see the device specific manual pages for details. - * - * AUDIO_GETDEV_SUNOS returns a number which is an audio device defined - * herein (making it not too portable) - * - * AUDIO_FLUSH stops all playback and recording, clears all queued buffers, - * resets error counters, and restarts recording and playback as appropriate - * for the current sampling mode. - */ -#define AUDIO_GETINFO _IOR('A', 1, audio_info_t) -#define AUDIO_SETINFO _IOWR('A', 2, audio_info_t) -#define AUDIO_DRAIN _IO('A', 3) -#define AUDIO_GETDEV _IOR('A', 4, audio_device_t) -#define AUDIO_GETDEV_SUNOS _IOR('A', 4, int) -#define AUDIO_FLUSH _IO('A', 5) - -/* Define possible audio hardware configurations for - * old SunOS-style AUDIO_GETDEV ioctl */ -#define AUDIO_DEV_UNKNOWN (0) /* not defined */ -#define AUDIO_DEV_AMD (1) /* audioamd device */ -#define AUDIO_DEV_SPEAKERBOX (2) /* dbri device with speakerbox */ -#define AUDIO_DEV_CODEC (3) /* dbri device (internal speaker) */ -#define AUDIO_DEV_CS4231 (5) /* cs4231 device */ - -/* - * The following ioctl sets the audio device into an internal loopback mode, - * if the hardware supports this. The argument is TRUE to set loopback, - * FALSE to reset to normal operation. If the hardware does not support - * internal loopback, the ioctl should fail with EINVAL. - * Causes ADC data to be digitally mixed in and sent to the DAC. - */ -#define AUDIO_DIAG_LOOPBACK _IOW('A', 101, int) - -#endif /* _AUDIOIO_H_ */ diff --git a/include/asm-sparc64/cacheflush.h b/include/asm-sparc64/cacheflush.h index ededd2659eab..b3f61659ba81 100644 --- a/include/asm-sparc64/cacheflush.h +++ b/include/asm-sparc64/cacheflush.h @@ -66,6 +66,11 @@ extern void flush_ptrace_access(struct vm_area_struct *, struct page *, #define flush_cache_vmap(start, end) do { } while (0) #define flush_cache_vunmap(start, end) do { } while (0) +#ifdef CONFIG_DEBUG_PAGEALLOC +/* internal debugging function */ +void kernel_map_pages(struct page *page, int numpages, int enable); +#endif + #endif /* !__ASSEMBLY__ */ #endif /* _SPARC64_CACHEFLUSH_H */ diff --git a/include/asm-sparc64/cpudata.h b/include/asm-sparc64/cpudata.h index 9a3a81f1cc58..74de79dca915 100644 --- a/include/asm-sparc64/cpudata.h +++ b/include/asm-sparc64/cpudata.h @@ -22,6 +22,16 @@ typedef struct { unsigned int __pad1; unsigned long *pte_cache[2]; unsigned long *pgd_cache; + + /* Dcache line 3, rarely used */ + unsigned int dcache_size; + unsigned int dcache_line_size; + unsigned int icache_size; + unsigned int icache_line_size; + unsigned int ecache_size; + unsigned int ecache_line_size; + unsigned int __pad2; + unsigned int __pad3; } cpuinfo_sparc; DECLARE_PER_CPU(cpuinfo_sparc, __cpu_data); diff --git a/include/asm-sparc64/dma-mapping.h b/include/asm-sparc64/dma-mapping.h index 1c5da41653a4..c7d5804ba76d 100644 --- a/include/asm-sparc64/dma-mapping.h +++ b/include/asm-sparc64/dma-mapping.h @@ -10,7 +10,7 @@ struct device; static inline void *dma_alloc_coherent(struct device *dev, size_t size, - dma_addr_t *dma_handle, int flag) + dma_addr_t *dma_handle, gfp_t flag) { BUG(); return NULL; diff --git a/include/asm-sparc64/ebus.h b/include/asm-sparc64/ebus.h index 543e4e500a72..7a408a030f52 100644 --- a/include/asm-sparc64/ebus.h +++ b/include/asm-sparc64/ebus.h @@ -79,6 +79,7 @@ extern int ebus_dma_request(struct ebus_dma_info *p, dma_addr_t bus_addr, size_t len); extern void ebus_dma_prepare(struct ebus_dma_info *p, int write); extern unsigned int ebus_dma_residue(struct ebus_dma_info *p); +extern unsigned int ebus_dma_addr(struct ebus_dma_info *p); extern void ebus_dma_enable(struct ebus_dma_info *p, int on); extern struct linux_ebus *ebus_chain; diff --git a/include/asm-sparc64/head.h b/include/asm-sparc64/head.h index b63a33cf4971..0abd3a674e8f 100644 --- a/include/asm-sparc64/head.h +++ b/include/asm-sparc64/head.h @@ -12,9 +12,12 @@ #define __JALAPENO_ID 0x003e0016 #define CHEETAH_MANUF 0x003e -#define CHEETAH_IMPL 0x0014 -#define CHEETAH_PLUS_IMPL 0x0015 -#define JALAPENO_IMPL 0x0016 +#define CHEETAH_IMPL 0x0014 /* Ultra-III */ +#define CHEETAH_PLUS_IMPL 0x0015 /* Ultra-III+ */ +#define JALAPENO_IMPL 0x0016 /* Ultra-IIIi */ +#define JAGUAR_IMPL 0x0018 /* Ultra-IV */ +#define PANTHER_IMPL 0x0019 /* Ultra-IV+ */ +#define SERRANO_IMPL 0x0022 /* Ultra-IIIi+ */ #define BRANCH_IF_CHEETAH_BASE(tmp1,tmp2,label) \ rdpr %ver, %tmp1; \ diff --git a/include/asm-sparc64/kbio.h b/include/asm-sparc64/kbio.h deleted file mode 100644 index 3cf496bdf399..000000000000 --- a/include/asm-sparc64/kbio.h +++ /dev/null @@ -1,56 +0,0 @@ -#ifndef __LINUX_KBIO_H -#define __LINUX_KBIO_H - -/* Return keyboard type */ -#define KIOCTYPE _IOR('k', 9, int) -/* Return Keyboard layout */ -#define KIOCLAYOUT _IOR('k', 20, int) - -enum { - TR_NONE, - TR_ASCII, /* keyboard is in regular state */ - TR_EVENT, /* keystrokes sent as firm events */ - TR_UNTRANS_EVENT /* EVENT+up and down+no translation */ -}; - -/* Return the current keyboard translation */ -#define KIOCGTRANS _IOR('k', 5, int) -/* Set the keyboard translation */ -#define KIOCTRANS _IOW('k', 0, int) - -/* Send a keyboard command */ -#define KIOCCMD _IOW('k', 8, int) - -/* Return if keystrokes are being sent to /dev/kbd */ - -/* Set routing of keystrokes to /dev/kbd */ -#define KIOCSDIRECT _IOW('k', 10, int) - -/* Set keyboard leds */ -#define KIOCSLED _IOW('k', 14, unsigned char) - -/* Get keyboard leds */ -#define KIOCGLED _IOR('k', 15, unsigned char) - -/* Used by KIOC[GS]RATE */ -struct kbd_rate { - unsigned char delay; /* Delay in Hz before first repeat. */ - unsigned char rate; /* In characters per second (0..50). */ -}; - -/* Set keyboard rate */ -#define KIOCSRATE _IOW('k', 40, struct kbd_rate) - -/* Get keyboard rate */ -#define KIOCGRATE _IOW('k', 41, struct kbd_rate) - -/* Top bit records if the key is up or down */ -#define KBD_UP 0x80 - -/* Usable information */ -#define KBD_KEYMASK 0x7f - -/* All keys up */ -#define KBD_IDLE 0x75 - -#endif /* __LINUX_KBIO_H */ diff --git a/include/asm-sparc64/kprobes.h b/include/asm-sparc64/kprobes.h index a8d326a598f0..7ba845320f5c 100644 --- a/include/asm-sparc64/kprobes.h +++ b/include/asm-sparc64/kprobes.h @@ -3,6 +3,7 @@ #include <linux/config.h> #include <linux/types.h> +#include <linux/percpu.h> typedef u32 kprobe_opcode_t; @@ -18,6 +19,25 @@ struct arch_specific_insn { kprobe_opcode_t insn[MAX_INSN_SIZE]; }; +struct prev_kprobe { + struct kprobe *kp; + unsigned int status; + unsigned long orig_tnpc; + unsigned long orig_tstate_pil; +}; + +/* per-cpu kprobe control block */ +struct kprobe_ctlblk { + unsigned long kprobe_status; + unsigned long kprobe_orig_tnpc; + unsigned long kprobe_orig_tstate_pil; + long *jprobe_saved_esp; + struct pt_regs jprobe_saved_regs; + struct pt_regs *jprobe_saved_regs_location; + struct sparc_stackf jprobe_saved_stack; + struct prev_kprobe prev_kprobe; +}; + #ifdef CONFIG_KPROBES extern int kprobe_exceptions_notify(struct notifier_block *self, unsigned long val, void *data); diff --git a/include/asm-sparc64/mmu_context.h b/include/asm-sparc64/mmu_context.h index 87c43c67866e..08ba72d7722c 100644 --- a/include/asm-sparc64/mmu_context.h +++ b/include/asm-sparc64/mmu_context.h @@ -87,37 +87,35 @@ extern void __flush_tlb_mm(unsigned long, unsigned long); static inline void switch_mm(struct mm_struct *old_mm, struct mm_struct *mm, struct task_struct *tsk) { unsigned long ctx_valid; + int cpu; + /* Note: page_table_lock is used here to serialize switch_mm + * and activate_mm, and their calls to get_new_mmu_context. + * This use of page_table_lock is unrelated to its other uses. + */ spin_lock(&mm->page_table_lock); - if (CTX_VALID(mm->context)) - ctx_valid = 1; - else - ctx_valid = 0; + ctx_valid = CTX_VALID(mm->context); + if (!ctx_valid) + get_new_mmu_context(mm); + spin_unlock(&mm->page_table_lock); if (!ctx_valid || (old_mm != mm)) { - if (!ctx_valid) - get_new_mmu_context(mm); - load_secondary_context(mm); reload_tlbmiss_state(tsk, mm); } - { - int cpu = smp_processor_id(); - - /* Even if (mm == old_mm) we _must_ check - * the cpu_vm_mask. If we do not we could - * corrupt the TLB state because of how - * smp_flush_tlb_{page,range,mm} on sparc64 - * and lazy tlb switches work. -DaveM - */ - if (!ctx_valid || !cpu_isset(cpu, mm->cpu_vm_mask)) { - cpu_set(cpu, mm->cpu_vm_mask); - __flush_tlb_mm(CTX_HWBITS(mm->context), - SECONDARY_CONTEXT); - } + /* Even if (mm == old_mm) we _must_ check + * the cpu_vm_mask. If we do not we could + * corrupt the TLB state because of how + * smp_flush_tlb_{page,range,mm} on sparc64 + * and lazy tlb switches work. -DaveM + */ + cpu = smp_processor_id(); + if (!ctx_valid || !cpu_isset(cpu, mm->cpu_vm_mask)) { + cpu_set(cpu, mm->cpu_vm_mask); + __flush_tlb_mm(CTX_HWBITS(mm->context), + SECONDARY_CONTEXT); } - spin_unlock(&mm->page_table_lock); } #define deactivate_mm(tsk,mm) do { } while (0) @@ -127,6 +125,10 @@ static inline void activate_mm(struct mm_struct *active_mm, struct mm_struct *mm { int cpu; + /* Note: page_table_lock is used here to serialize switch_mm + * and activate_mm, and their calls to get_new_mmu_context. + * This use of page_table_lock is unrelated to its other uses. + */ spin_lock(&mm->page_table_lock); if (!CTX_VALID(mm->context)) get_new_mmu_context(mm); diff --git a/include/asm-sparc64/openprom.h b/include/asm-sparc64/openprom.h index 0a336901d585..b4959d2b0d99 100644 --- a/include/asm-sparc64/openprom.h +++ b/include/asm-sparc64/openprom.h @@ -186,8 +186,8 @@ struct linux_prom_registers { }; struct linux_prom64_registers { - long phys_addr; - long reg_size; + unsigned long phys_addr; + unsigned long reg_size; }; struct linux_prom_irqs { diff --git a/include/asm-sparc64/oplib.h b/include/asm-sparc64/oplib.h index a432d9e7daaa..d02f1e8ae1a6 100644 --- a/include/asm-sparc64/oplib.h +++ b/include/asm-sparc64/oplib.h @@ -38,6 +38,20 @@ extern int prom_stdin, prom_stdout; */ extern int prom_chosen_node; +/* Helper values and strings in arch/sparc64/kernel/head.S */ +extern const char prom_finddev_name[]; +extern const char prom_chosen_path[]; +extern const char prom_getprop_name[]; +extern const char prom_mmu_name[]; +extern const char prom_callmethod_name[]; +extern const char prom_translate_name[]; +extern const char prom_map_name[]; +extern const char prom_unmap_name[]; +extern int prom_mmu_ihandle_cache; +extern unsigned int prom_boot_mapped_pc; +extern unsigned int prom_boot_mapping_mode; +extern unsigned long prom_boot_mapping_phys_high, prom_boot_mapping_phys_low; + struct linux_mlist_p1275 { struct linux_mlist_p1275 *theres_more; unsigned long start_adr; @@ -68,7 +82,7 @@ extern char *prom_getbootargs(void); * of the string is different on V0 vs. V2->higher proms. The caller must * know what he/she is doing! Returns the device descriptor, an int. */ -extern int prom_devopen(char *device_string); +extern int prom_devopen(const char *device_string); /* Close a previously opened device described by the passed integer * descriptor. @@ -81,27 +95,13 @@ extern int prom_devclose(int device_handle); extern void prom_seek(int device_handle, unsigned int seek_hival, unsigned int seek_lowval); -/* Machine memory configuration routine. */ - -/* This function returns a V0 format memory descriptor table, it has three - * entries. One for the total amount of physical ram on the machine, one - * for the amount of physical ram available, and one describing the virtual - * areas which are allocated by the prom. So, in a sense the physical - * available is a calculation of the total physical minus the physical mapped - * by the prom with virtual mappings. - * - * These lists are returned pre-sorted, this should make your life easier - * since the prom itself is way too lazy to do such nice things. - */ -extern struct linux_mem_p1275 *prom_meminfo(void); - /* Miscellaneous routines, don't really fit in any category per se. */ /* Reboot the machine with the command line passed. */ -extern void prom_reboot(char *boot_command); +extern void prom_reboot(const char *boot_command); /* Evaluate the forth string passed. */ -extern void prom_feval(char *forth_string); +extern void prom_feval(const char *forth_string); /* Enter the prom, with possibility of continuation with the 'go' * command in newer proms. @@ -154,7 +154,7 @@ extern char prom_getchar(void); extern void prom_putchar(char character); /* Prom's internal routines, don't use in kernel/boot code. */ -extern void prom_printf(char *fmt, ...); +extern void prom_printf(const char *fmt, ...); extern void prom_write(const char *buf, unsigned int len); /* Query for input device type */ @@ -215,7 +215,7 @@ extern int prom_getunumber(int syndrome_code, char *buf, int buflen); /* Retain physical memory to the caller across soft resets. */ -extern unsigned long prom_retain(char *name, +extern unsigned long prom_retain(const char *name, unsigned long pa_low, unsigned long pa_high, long size, long align); @@ -269,28 +269,28 @@ extern int prom_getsibling(int node); /* Get the length, at the passed node, of the given property type. * Returns -1 on error (ie. no such property at this node). */ -extern int prom_getproplen(int thisnode, char *property); +extern int prom_getproplen(int thisnode, const char *property); /* Fetch the requested property using the given buffer. Returns * the number of bytes the prom put into your buffer or -1 on error. */ -extern int prom_getproperty(int thisnode, char *property, +extern int prom_getproperty(int thisnode, const char *property, char *prop_buffer, int propbuf_size); /* Acquire an integer property. */ -extern int prom_getint(int node, char *property); +extern int prom_getint(int node, const char *property); /* Acquire an integer property, with a default value. */ -extern int prom_getintdefault(int node, char *property, int defval); +extern int prom_getintdefault(int node, const char *property, int defval); /* Acquire a boolean property, 0=FALSE 1=TRUE. */ -extern int prom_getbool(int node, char *prop); +extern int prom_getbool(int node, const char *prop); /* Acquire a string property, null string on error. */ -extern void prom_getstring(int node, char *prop, char *buf, int bufsize); +extern void prom_getstring(int node, const char *prop, char *buf, int bufsize); /* Does the passed node have the given "name"? YES=1 NO=0 */ -extern int prom_nodematch(int thisnode, char *name); +extern int prom_nodematch(int thisnode, const char *name); /* Puts in buffer a prom name in the form name@x,y or name (x for which_io * and y for first regs phys address @@ -300,7 +300,7 @@ extern int prom_getname(int node, char *buf, int buflen); /* Search all siblings starting at the passed node for "name" matching * the given string. Returns the node on success, zero on failure. */ -extern int prom_searchsiblings(int node_start, char *name); +extern int prom_searchsiblings(int node_start, const char *name); /* Return the first property type, as a string, for the given node. * Returns a null string on error. Buffer should be at least 32B long. @@ -310,21 +310,21 @@ extern char *prom_firstprop(int node, char *buffer); /* Returns the next property after the passed property for the given * node. Returns null string on failure. Buffer should be at least 32B long. */ -extern char *prom_nextprop(int node, char *prev_property, char *buffer); +extern char *prom_nextprop(int node, const char *prev_property, char *buffer); /* Returns 1 if the specified node has given property. */ -extern int prom_node_has_property(int node, char *property); +extern int prom_node_has_property(int node, const char *property); /* Returns phandle of the path specified */ -extern int prom_finddevice(char *name); +extern int prom_finddevice(const char *name); /* Set the indicated property at the given node with the passed value. * Returns the number of bytes of your value that the prom took. */ -extern int prom_setprop(int node, char *prop_name, char *prop_value, +extern int prom_setprop(int node, const char *prop_name, char *prop_value, int value_size); -extern int prom_pathtoinode(char *path); +extern int prom_pathtoinode(const char *path); extern int prom_inst2pkg(int); /* CPU probing helpers. */ @@ -334,7 +334,7 @@ int cpu_find_by_mid(int mid, int *prom_node); /* Client interface level routines. */ extern void prom_set_trap_table(unsigned long tba); -extern long p1275_cmd (char *, long, ...); +extern long p1275_cmd(const char *, long, ...); #if 0 diff --git a/include/asm-sparc64/page.h b/include/asm-sparc64/page.h index 7f8d764abc47..5426bb28a993 100644 --- a/include/asm-sparc64/page.h +++ b/include/asm-sparc64/page.h @@ -140,23 +140,6 @@ extern unsigned long page_to_pfn(struct page *); #define virt_to_phys __pa #define phys_to_virt __va -/* The following structure is used to hold the physical - * memory configuration of the machine. This is filled in - * probe_memory() and is later used by mem_init() to set up - * mem_map[]. We statically allocate SPARC_PHYS_BANKS of - * these structs, this is arbitrary. The entry after the - * last valid one has num_bytes==0. - */ - -struct sparc_phys_banks { - unsigned long base_addr; - unsigned long num_bytes; -}; - -#define SPARC_PHYS_BANKS 32 - -extern struct sparc_phys_banks sp_banks[SPARC_PHYS_BANKS]; - #endif /* !(__ASSEMBLY__) */ #define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | VM_EXEC | \ diff --git a/include/asm-sparc64/pbm.h b/include/asm-sparc64/pbm.h index 38bbbccb4068..dd35a2c7798a 100644 --- a/include/asm-sparc64/pbm.h +++ b/include/asm-sparc64/pbm.h @@ -27,23 +27,27 @@ * PCI bus. */ -#define PBM_LOGCLUSTERS 3 -#define PBM_NCLUSTERS (1 << PBM_LOGCLUSTERS) - struct pci_controller_info; /* This contains the software state necessary to drive a PCI * controller's IOMMU. */ +struct pci_iommu_arena { + unsigned long *map; + unsigned int hint; + unsigned int limit; +}; + struct pci_iommu { /* This protects the controller's IOMMU and all * streaming buffers underneath. */ spinlock_t lock; + struct pci_iommu_arena arena; + /* IOMMU page table, a linear array of ioptes. */ iopte_t *page_table; /* The page table itself. */ - int page_table_sz_bits; /* log2 of ow many pages does it map? */ /* Base PCI memory space address where IOMMU mappings * begin. @@ -62,12 +66,6 @@ struct pci_iommu { */ unsigned long write_complete_reg; - /* The lowest used consistent mapping entry. Since - * we allocate consistent maps out of cluster 0 this - * is relative to the beginning of closter 0. - */ - u32 lowest_consistent_map; - /* In order to deal with some buggy third-party PCI bridges that * do wrong prefetching, we never mark valid mappings as invalid. * Instead we point them at this dummy page. @@ -75,16 +73,6 @@ struct pci_iommu { unsigned long dummy_page; unsigned long dummy_page_pa; - /* If PBM_NCLUSTERS is ever decreased to 4 or lower, - * or if largest supported page_table_sz * 8K goes above - * 2GB, you must increase the size of the type of - * these counters. You have been duly warned. -DaveM - */ - struct { - u16 next; - u16 flush; - } alloc_info[PBM_NCLUSTERS]; - /* CTX allocation. */ unsigned long ctx_lowest_free; unsigned long ctx_bitmap[IOMMU_NUM_CTXS / (sizeof(unsigned long) * 8)]; @@ -102,7 +90,7 @@ struct pci_iommu { u32 dma_addr_mask; }; -extern void pci_iommu_table_init(struct pci_iommu *, int); +extern void pci_iommu_table_init(struct pci_iommu *iommu, int tsbsize, u32 dma_offset, u32 dma_addr_mask); /* This describes a PCI bus module's streaming buffer. */ struct pci_strbuf { diff --git a/include/asm-sparc64/pgtable.h b/include/asm-sparc64/pgtable.h index a297f6144f0f..f0a9b44d3eb5 100644 --- a/include/asm-sparc64/pgtable.h +++ b/include/asm-sparc64/pgtable.h @@ -60,13 +60,13 @@ * table can map */ #define PMD_SHIFT (PAGE_SHIFT + (PAGE_SHIFT-3)) -#define PMD_SIZE (1UL << PMD_SHIFT) +#define PMD_SIZE (_AC(1,UL) << PMD_SHIFT) #define PMD_MASK (~(PMD_SIZE-1)) #define PMD_BITS (PAGE_SHIFT - 2) /* PGDIR_SHIFT determines what a third-level page table entry can map */ #define PGDIR_SHIFT (PAGE_SHIFT + (PAGE_SHIFT-3) + PMD_BITS) -#define PGDIR_SIZE (1UL << PGDIR_SHIFT) +#define PGDIR_SIZE (_AC(1,UL) << PGDIR_SHIFT) #define PGDIR_MASK (~(PGDIR_SIZE-1)) #define PGDIR_BITS (PAGE_SHIFT - 2) @@ -98,7 +98,9 @@ #define _PAGE_NFO _AC(0x1000000000000000,UL) /* No Fault Only */ #define _PAGE_IE _AC(0x0800000000000000,UL) /* Invert Endianness */ #define _PAGE_SOFT2 _AC(0x07FC000000000000,UL) /* Software bits, set 2 */ -#define _PAGE_RES1 _AC(0x0003000000000000,UL) /* Reserved */ +#define _PAGE_RES1 _AC(0x0002000000000000,UL) /* Reserved */ +#define _PAGE_SZ32MB _AC(0x0001000000000000,UL) /* (Panther) 32MB page */ +#define _PAGE_SZ256MB _AC(0x2001000000000000,UL) /* (Panther) 256MB page */ #define _PAGE_SN _AC(0x0000800000000000,UL) /* (Cheetah) Snoop */ #define _PAGE_RES2 _AC(0x0000780000000000,UL) /* Reserved */ #define _PAGE_PADDR_SF _AC(0x000001FFFFFFE000,UL) /* (Spitfire) paddr[40:13]*/ @@ -229,9 +231,6 @@ extern struct page *mem_map_zero; #define pte_pfn(x) ((pte_val(x) & _PAGE_PADDR)>>PAGE_SHIFT) #define pte_page(x) pfn_to_page(pte_pfn(x)) -#define page_pte_prot(page, prot) mk_pte(page, prot) -#define page_pte(page) page_pte_prot(page, __pgprot(0)) - static inline pte_t pte_modify(pte_t orig_pte, pgprot_t new_prot) { pte_t __pte; @@ -336,7 +335,11 @@ static inline void set_pte_at(struct mm_struct *mm, unsigned long addr, pte_t *p #define pte_clear(mm,addr,ptep) \ set_pte_at((mm), (addr), (ptep), __pte(0UL)) -extern pgd_t swapper_pg_dir[1]; +extern pgd_t swapper_pg_dir[2048]; +extern pmd_t swapper_low_pmd_dir[2048]; + +extern void paging_init(void); +extern unsigned long find_ecache_flush_span(unsigned long size); /* These do nothing with the way I have things setup. */ #define mmu_lockarea(vaddr, len) (vaddr) @@ -345,16 +348,6 @@ extern pgd_t swapper_pg_dir[1]; struct vm_area_struct; extern void update_mmu_cache(struct vm_area_struct *, unsigned long, pte_t); -/* Make a non-present pseudo-TTE. */ -static inline pte_t mk_pte_io(unsigned long page, pgprot_t prot, int space) -{ - pte_t pte; - pte_val(pte) = (((page) | pgprot_val(prot) | _PAGE_E) & - ~(unsigned long)_PAGE_CACHE); - pte_val(pte) |= (((unsigned long)space) << 32); - return pte; -} - /* Encode and de-code a swap entry */ #define __swp_type(entry) (((entry).val >> PAGE_SHIFT) & 0xffUL) #define __swp_offset(entry) ((entry).val >> (PAGE_SHIFT + 8UL)) diff --git a/include/asm-sparc64/ptrace.h b/include/asm-sparc64/ptrace.h index 6194f771e9fc..7eba90c6c753 100644 --- a/include/asm-sparc64/ptrace.h +++ b/include/asm-sparc64/ptrace.h @@ -94,6 +94,9 @@ struct sparc_trapf { #define STACKFRAME32_SZ sizeof(struct sparc_stackf32) #ifdef __KERNEL__ + +#define __ARCH_SYS_PTRACE 1 + #define force_successful_syscall_return() \ do { current_thread_info()->syscall_noerror = 1; \ } while (0) diff --git a/include/asm-sparc64/rwsem.h b/include/asm-sparc64/rwsem.h index 4568ee4022df..cef5e8270421 100644 --- a/include/asm-sparc64/rwsem.h +++ b/include/asm-sparc64/rwsem.h @@ -56,6 +56,11 @@ static inline void rwsem_atomic_add(int delta, struct rw_semaphore *sem) atomic_add(delta, (atomic_t *)(&sem->count)); } +static inline int rwsem_is_locked(struct rw_semaphore *sem) +{ + return (sem->count != 0); +} + #endif /* __KERNEL__ */ #endif /* _SPARC64_RWSEM_H */ diff --git a/include/asm-sparc64/semaphore.h b/include/asm-sparc64/semaphore.h index 7419dd88b49e..093dcc6788db 100644 --- a/include/asm-sparc64/semaphore.h +++ b/include/asm-sparc64/semaphore.h @@ -22,9 +22,6 @@ struct semaphore { { ATOMIC_INIT(count), \ __WAIT_QUEUE_HEAD_INITIALIZER((name).wait) } -#define __MUTEX_INITIALIZER(name) \ - __SEMAPHORE_INITIALIZER(name, 1) - #define __DECLARE_SEMAPHORE_GENERIC(name, count) \ struct semaphore name = __SEMAPHORE_INITIALIZER(name,count) diff --git a/include/asm-sparc64/termios.h b/include/asm-sparc64/termios.h index 9777a9cca88a..ee26a071c677 100644 --- a/include/asm-sparc64/termios.h +++ b/include/asm-sparc64/termios.h @@ -38,15 +38,6 @@ struct sunos_ttysize { int st_columns; /* Columns on the terminal */ }; -/* Used for packet mode */ -#define TIOCPKT_DATA 0 -#define TIOCPKT_FLUSHREAD 1 -#define TIOCPKT_FLUSHWRITE 2 -#define TIOCPKT_STOP 4 -#define TIOCPKT_START 8 -#define TIOCPKT_NOSTOP 16 -#define TIOCPKT_DOSTOP 32 - struct winsize { unsigned short ws_row; unsigned short ws_col; diff --git a/include/asm-sparc64/tlb.h b/include/asm-sparc64/tlb.h index 9baf57db01d2..61c01882b562 100644 --- a/include/asm-sparc64/tlb.h +++ b/include/asm-sparc64/tlb.h @@ -25,9 +25,8 @@ struct mmu_gather { struct mm_struct *mm; unsigned int pages_nr; unsigned int need_flush; - unsigned int tlb_frozen; + unsigned int fullmm; unsigned int tlb_nr; - unsigned long freed; unsigned long vaddrs[TLB_BATCH_NR]; struct page *pages[FREE_PTE_NR]; }; @@ -44,14 +43,13 @@ extern void flush_tlb_pending(void); static inline struct mmu_gather *tlb_gather_mmu(struct mm_struct *mm, unsigned int full_mm_flush) { - struct mmu_gather *mp = &__get_cpu_var(mmu_gathers); + struct mmu_gather *mp = &get_cpu_var(mmu_gathers); BUG_ON(mp->tlb_nr); mp->mm = mm; mp->pages_nr = num_online_cpus() > 1 ? 0U : ~0U; - mp->tlb_frozen = full_mm_flush; - mp->freed = 0; + mp->fullmm = full_mm_flush; return mp; } @@ -60,11 +58,9 @@ static inline struct mmu_gather *tlb_gather_mmu(struct mm_struct *mm, unsigned i static inline void tlb_flush_mmu(struct mmu_gather *mp) { if (mp->need_flush) { + free_pages_and_swap_cache(mp->pages, mp->pages_nr); + mp->pages_nr = 0; mp->need_flush = 0; - if (!tlb_fast_mode(mp)) { - free_pages_and_swap_cache(mp->pages, mp->pages_nr); - mp->pages_nr = 0; - } } } @@ -78,39 +74,26 @@ extern void smp_flush_tlb_mm(struct mm_struct *mm); static inline void tlb_finish_mmu(struct mmu_gather *mp, unsigned long start, unsigned long end) { - unsigned long freed = mp->freed; - struct mm_struct *mm = mp->mm; - unsigned long rss = get_mm_counter(mm, rss); - - if (rss < freed) - freed = rss; - add_mm_counter(mm, rss, -freed); - tlb_flush_mmu(mp); - if (mp->tlb_frozen) { - if (CTX_VALID(mm->context)) - do_flush_tlb_mm(mm); - mp->tlb_frozen = 0; - } else + if (mp->fullmm) + mp->fullmm = 0; + else flush_tlb_pending(); /* keep the page table cache within bounds */ check_pgt_cache(); -} -static inline unsigned int tlb_is_full_mm(struct mmu_gather *mp) -{ - return mp->tlb_frozen; + put_cpu_var(mmu_gathers); } static inline void tlb_remove_page(struct mmu_gather *mp, struct page *page) { - mp->need_flush = 1; if (tlb_fast_mode(mp)) { free_page_and_swap_cache(page); return; } + mp->need_flush = 1; mp->pages[mp->pages_nr++] = page; if (mp->pages_nr >= FREE_PTE_NR) tlb_flush_mmu(mp); diff --git a/include/asm-sparc64/uaccess.h b/include/asm-sparc64/uaccess.h index 80a65d7e3dbf..203e8eee6351 100644 --- a/include/asm-sparc64/uaccess.h +++ b/include/asm-sparc64/uaccess.h @@ -70,26 +70,14 @@ static inline int access_ok(int type, const void __user * addr, unsigned long si * with the main instruction path. This means when everything is well, * we don't even have to jump over them. Further, they do not intrude * on our cache or tlb entries. - * - * There is a special way how to put a range of potentially faulting - * insns (like twenty ldd/std's with now intervening other instructions) - * You specify address of first in insn and 0 in fixup and in the next - * exception_table_entry you specify last potentially faulting insn + 1 - * and in fixup the routine which should handle the fault. - * That fixup code will get - * (faulting_insn_address - first_insn_in_the_range_address)/4 - * in %g2 (ie. index of the faulting instruction in the range). */ -struct exception_table_entry -{ - unsigned insn, fixup; +struct exception_table_entry { + unsigned int insn, fixup; }; -/* Special exable search, which handles ranges. Returns fixup */ -unsigned long search_extables_range(unsigned long addr, unsigned long *g2); - extern void __ret_efault(void); +extern void __retl_efault(void); /* Uh, these should become the main single-value transfer routines.. * They automatically use the right size if we just have the right @@ -263,7 +251,7 @@ copy_from_user(void *to, const void __user *from, unsigned long size) { unsigned long ret = ___copy_from_user(to, from, size); - if (ret) + if (unlikely(ret)) ret = copy_from_user_fixup(to, from, size); return ret; } @@ -279,7 +267,7 @@ copy_to_user(void __user *to, const void *from, unsigned long size) { unsigned long ret = ___copy_to_user(to, from, size); - if (ret) + if (unlikely(ret)) ret = copy_to_user_fixup(to, from, size); return ret; } @@ -295,7 +283,7 @@ copy_in_user(void __user *to, void __user *from, unsigned long size) { unsigned long ret = ___copy_in_user(to, from, size); - if (ret) + if (unlikely(ret)) ret = copy_in_user_fixup(to, from, size); return ret; } diff --git a/include/asm-sparc64/vuid_event.h b/include/asm-sparc64/vuid_event.h deleted file mode 100644 index 9ef4d17ad08f..000000000000 --- a/include/asm-sparc64/vuid_event.h +++ /dev/null @@ -1,40 +0,0 @@ -/* SunOS Virtual User Input Device (VUID) compatibility */ - -typedef struct firm_event { - unsigned short id; /* tag for this event */ - unsigned char pair_type; /* unused by X11 */ - unsigned char pair; /* unused by X11 */ - int value; /* VKEY_UP, VKEY_DOWN or delta */ - struct timeval time; -} Firm_event; - -enum { - FE_PAIR_NONE, - FE_PAIR_SET, - FE_PAIR_DELTA, - FE_PAIR_ABSOLUTE -}; - -/* VUID stream formats */ -#define VUID_NATIVE 0 /* Native byte stream format */ -#define VUID_FIRM_EVENT 1 /* send firm_event structures */ - -/* ioctls */ - /* Set input device byte stream format (any of VUID_{NATIVE,FIRM_EVENT}) */ -#define VUIDSFORMAT _IOW('v', 1, int) - /* Retrieve input device byte stream format */ -#define VUIDGFORMAT _IOR('v', 2, int) - -/* Possible tag values */ -/* mouse buttons: */ -#define MS_LEFT 0x7f20 -#define MS_MIDDLE 0x7f21 -#define MS_RIGHT 0x7f22 -/* motion: */ -#define LOC_X_DELTA 0x7f80 -#define LOC_Y_DELTA 0x7f81 -#define LOC_X_ABSOLUTE 0x7f82 /* X compat, unsupported */ -#define LOC_Y_ABSOLUTE 0x7f83 /* X compat, unsupported */ - -#define VKEY_UP 0 -#define VKEY_DOWN 1 diff --git a/include/asm-um/cache.h b/include/asm-um/cache.h index 4b134fe8504e..a10602a5b2d6 100644 --- a/include/asm-um/cache.h +++ b/include/asm-um/cache.h @@ -1,10 +1,21 @@ #ifndef __UM_CACHE_H #define __UM_CACHE_H -/* These are x86 numbers */ -#define L1_CACHE_SHIFT 5 -#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT) +#include <linux/config.h> -#define L1_CACHE_SHIFT_MAX 7 /* largest L1 which this arch supports */ +#if defined(CONFIG_UML_X86) && !defined(CONFIG_64BIT) +# define L1_CACHE_SHIFT (CONFIG_X86_L1_CACHE_SHIFT) +#elif defined(CONFIG_UML_X86) /* 64-bit */ +# define L1_CACHE_SHIFT 6 /* Should be 7 on Intel */ +#else +/* XXX: this was taken from x86, now it's completely random. Luckily only + * affects SMP padding. */ +# define L1_CACHE_SHIFT 5 +#endif + +/* XXX: this is valid for x86 and x86_64. */ +#define L1_CACHE_SHIFT_MAX 7 /* largest L1 which this arch supports */ + +#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT) #endif diff --git a/include/asm-um/dma-mapping.h b/include/asm-um/dma-mapping.h index 13e6291f7151..babd29895114 100644 --- a/include/asm-um/dma-mapping.h +++ b/include/asm-um/dma-mapping.h @@ -19,7 +19,7 @@ dma_set_mask(struct device *dev, u64 dma_mask) static inline void * dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *dma_handle, - int flag) + gfp_t flag) { BUG(); return((void *) 0); diff --git a/include/asm-um/ldt-i386.h b/include/asm-um/ldt-i386.h new file mode 100644 index 000000000000..175722a91164 --- /dev/null +++ b/include/asm-um/ldt-i386.h @@ -0,0 +1,69 @@ +/* + * Copyright (C) 2004 Fujitsu Siemens Computers GmbH + * Licensed under the GPL + * + * Author: Bodo Stroesser <bstroesser@fujitsu-siemens.com> + */ + +#ifndef __ASM_LDT_I386_H +#define __ASM_LDT_I386_H + +#include "asm/semaphore.h" +#include "asm/arch/ldt.h" + +struct mmu_context_skas; +extern void ldt_host_info(void); +extern long init_new_ldt(struct mmu_context_skas * to_mm, + struct mmu_context_skas * from_mm); +extern void free_ldt(struct mmu_context_skas * mm); + +#define LDT_PAGES_MAX \ + ((LDT_ENTRIES * LDT_ENTRY_SIZE)/PAGE_SIZE) +#define LDT_ENTRIES_PER_PAGE \ + (PAGE_SIZE/LDT_ENTRY_SIZE) +#define LDT_DIRECT_ENTRIES \ + ((LDT_PAGES_MAX*sizeof(void *))/LDT_ENTRY_SIZE) + +struct ldt_entry { + __u32 a; + __u32 b; +}; + +typedef struct uml_ldt { + int entry_count; + struct semaphore semaphore; + union { + struct ldt_entry * pages[LDT_PAGES_MAX]; + struct ldt_entry entries[LDT_DIRECT_ENTRIES]; + } u; +} uml_ldt_t; + +/* + * macros stolen from include/asm-i386/desc.h + */ +#define LDT_entry_a(info) \ + ((((info)->base_addr & 0x0000ffff) << 16) | ((info)->limit & 0x0ffff)) + +#define LDT_entry_b(info) \ + (((info)->base_addr & 0xff000000) | \ + (((info)->base_addr & 0x00ff0000) >> 16) | \ + ((info)->limit & 0xf0000) | \ + (((info)->read_exec_only ^ 1) << 9) | \ + ((info)->contents << 10) | \ + (((info)->seg_not_present ^ 1) << 15) | \ + ((info)->seg_32bit << 22) | \ + ((info)->limit_in_pages << 23) | \ + ((info)->useable << 20) | \ + 0x7000) + +#define LDT_empty(info) (\ + (info)->base_addr == 0 && \ + (info)->limit == 0 && \ + (info)->contents == 0 && \ + (info)->read_exec_only == 1 && \ + (info)->seg_32bit == 0 && \ + (info)->limit_in_pages == 0 && \ + (info)->seg_not_present == 1 && \ + (info)->useable == 0 ) + +#endif diff --git a/include/asm-um/ldt-x86_64.h b/include/asm-um/ldt-x86_64.h new file mode 100644 index 000000000000..175722a91164 --- /dev/null +++ b/include/asm-um/ldt-x86_64.h @@ -0,0 +1,69 @@ +/* + * Copyright (C) 2004 Fujitsu Siemens Computers GmbH + * Licensed under the GPL + * + * Author: Bodo Stroesser <bstroesser@fujitsu-siemens.com> + */ + +#ifndef __ASM_LDT_I386_H +#define __ASM_LDT_I386_H + +#include "asm/semaphore.h" +#include "asm/arch/ldt.h" + +struct mmu_context_skas; +extern void ldt_host_info(void); +extern long init_new_ldt(struct mmu_context_skas * to_mm, + struct mmu_context_skas * from_mm); +extern void free_ldt(struct mmu_context_skas * mm); + +#define LDT_PAGES_MAX \ + ((LDT_ENTRIES * LDT_ENTRY_SIZE)/PAGE_SIZE) +#define LDT_ENTRIES_PER_PAGE \ + (PAGE_SIZE/LDT_ENTRY_SIZE) +#define LDT_DIRECT_ENTRIES \ + ((LDT_PAGES_MAX*sizeof(void *))/LDT_ENTRY_SIZE) + +struct ldt_entry { + __u32 a; + __u32 b; +}; + +typedef struct uml_ldt { + int entry_count; + struct semaphore semaphore; + union { + struct ldt_entry * pages[LDT_PAGES_MAX]; + struct ldt_entry entries[LDT_DIRECT_ENTRIES]; + } u; +} uml_ldt_t; + +/* + * macros stolen from include/asm-i386/desc.h + */ +#define LDT_entry_a(info) \ + ((((info)->base_addr & 0x0000ffff) << 16) | ((info)->limit & 0x0ffff)) + +#define LDT_entry_b(info) \ + (((info)->base_addr & 0xff000000) | \ + (((info)->base_addr & 0x00ff0000) >> 16) | \ + ((info)->limit & 0xf0000) | \ + (((info)->read_exec_only ^ 1) << 9) | \ + ((info)->contents << 10) | \ + (((info)->seg_not_present ^ 1) << 15) | \ + ((info)->seg_32bit << 22) | \ + ((info)->limit_in_pages << 23) | \ + ((info)->useable << 20) | \ + 0x7000) + +#define LDT_empty(info) (\ + (info)->base_addr == 0 && \ + (info)->limit == 0 && \ + (info)->contents == 0 && \ + (info)->read_exec_only == 1 && \ + (info)->seg_32bit == 0 && \ + (info)->limit_in_pages == 0 && \ + (info)->seg_not_present == 1 && \ + (info)->useable == 0 ) + +#endif diff --git a/include/asm-um/ldt.h b/include/asm-um/ldt.h deleted file mode 100644 index e908439d338a..000000000000 --- a/include/asm-um/ldt.h +++ /dev/null @@ -1,5 +0,0 @@ -#ifndef __UM_LDT_H -#define __UM_LDT_H - -#include "asm/arch/ldt.h" -#endif diff --git a/include/asm-um/linkage.h b/include/asm-um/linkage.h index 7dfce37adc8b..e3d62dcbd356 100644 --- a/include/asm-um/linkage.h +++ b/include/asm-um/linkage.h @@ -3,4 +3,12 @@ #include "asm/arch/linkage.h" +#include <linux/config.h> + +/* <linux/linkage.h> will pick sane defaults */ +#ifdef CONFIG_GPROF +#undef FASTCALL +#undef fastcall +#endif + #endif diff --git a/include/asm-um/mmu_context.h b/include/asm-um/mmu_context.h index 2edb4f1f789c..9a0e48eb542e 100644 --- a/include/asm-um/mmu_context.h +++ b/include/asm-um/mmu_context.h @@ -29,7 +29,8 @@ static inline void activate_mm(struct mm_struct *old, struct mm_struct *new) * possible. */ if (old != new && (current->flags & PF_BORROWED_MM)) - force_flush_all(); + CHOOSE_MODE(force_flush_all(), + switch_mm_skas(&new->context.skas.id)); } static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next, diff --git a/include/asm-um/page.h b/include/asm-um/page.h index 2c192abe9aeb..0229814af31e 100644 --- a/include/asm-um/page.h +++ b/include/asm-um/page.h @@ -115,7 +115,7 @@ extern unsigned long uml_physmem; #define pfn_valid(pfn) ((pfn) < max_mapnr) #define virt_addr_valid(v) pfn_valid(phys_to_pfn(__pa(v))) -extern struct page *arch_validate(struct page *page, int mask, int order); +extern struct page *arch_validate(struct page *page, gfp_t mask, int order); #define HAVE_ARCH_VALIDATE extern void arch_free_page(struct page *page, int order); diff --git a/include/asm-um/pgtable.h b/include/asm-um/pgtable.h index ed06170e0edd..ac64eb955868 100644 --- a/include/asm-um/pgtable.h +++ b/include/asm-um/pgtable.h @@ -138,7 +138,7 @@ extern unsigned long pg0[1024]; #define pte_clear(mm,addr,xp) pte_set_val(*(xp), (phys_t) 0, __pgprot(_PAGE_NEWPAGE)) -#define pmd_none(x) (!(pmd_val(x) & ~_PAGE_NEWPAGE)) +#define pmd_none(x) (!((unsigned long)pmd_val(x) & ~_PAGE_NEWPAGE)) #define pmd_bad(x) ((pmd_val(x) & (~PAGE_MASK & ~_PAGE_USER)) != _KERNPG_TABLE) #define pmd_present(x) (pmd_val(x) & _PAGE_PRESENT) #define pmd_clear(xp) do { pmd_val(*(xp)) = _PAGE_NEWPAGE; } while (0) @@ -346,7 +346,6 @@ static inline void set_pte(pte_t *pteptr, pte_t pteval) static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) { pte_set_val(pte, (pte_val(pte) & _PAGE_CHG_MASK), newprot); - if(pte_present(pte)) pte = pte_mknewpage(pte_mknewprot(pte)); return pte; } diff --git a/include/asm-um/processor-generic.h b/include/asm-um/processor-generic.h index 2d242360c3d6..075771c371f6 100644 --- a/include/asm-um/processor-generic.h +++ b/include/asm-um/processor-generic.h @@ -13,6 +13,7 @@ struct task_struct; #include "linux/config.h" #include "asm/ptrace.h" #include "choose-mode.h" +#include "registers.h" struct mm_struct; @@ -136,19 +137,15 @@ extern struct cpuinfo_um cpu_data[]; #define current_cpu_data boot_cpu_data #endif -#define KSTK_EIP(tsk) (PT_REGS_IP(&tsk->thread.regs)) -#define KSTK_ESP(tsk) (PT_REGS_SP(&tsk->thread.regs)) -#define get_wchan(p) (0) +#ifdef CONFIG_MODE_SKAS +#define KSTK_REG(tsk, reg) \ + ({ union uml_pt_regs regs; \ + get_thread_regs(®s, tsk->thread.mode.skas.switch_buf); \ + UPT_REG(®s, reg); }) +#else +#define KSTK_REG(tsk, reg) (0xbadbabe) #endif +#define get_wchan(p) (0) -/* - * Overrides for Emacs so that we follow Linus's tabbing style. - * Emacs will notice this stuff at the end of the file and automatically - * adjust the settings for this buffer only. This must remain at the end - * of the file. - * --------------------------------------------------------------------------- - * Local variables: - * c-file-style: "linux" - * End: - */ +#endif diff --git a/include/asm-um/processor-i386.h b/include/asm-um/processor-i386.h index 431bad3ae9d7..4108a579eb92 100644 --- a/include/asm-um/processor-i386.h +++ b/include/asm-um/processor-i386.h @@ -43,17 +43,10 @@ static inline void rep_nop(void) #define ARCH_IS_STACKGROW(address) \ (address + 32 >= UPT_SP(¤t->thread.regs.regs)) +#define KSTK_EIP(tsk) KSTK_REG(tsk, EIP) +#define KSTK_ESP(tsk) KSTK_REG(tsk, UESP) +#define KSTK_EBP(tsk) KSTK_REG(tsk, EBP) + #include "asm/processor-generic.h" #endif - -/* - * Overrides for Emacs so that we follow Linus's tabbing style. - * Emacs will notice this stuff at the end of the file and automatically - * adjust the settings for this buffer only. This must remain at the end - * of the file. - * --------------------------------------------------------------------------- - * Local variables: - * c-file-style: "linux" - * End: - */ diff --git a/include/asm-um/processor-x86_64.h b/include/asm-um/processor-x86_64.h index 0beb9a42ae05..e1e1255a1d36 100644 --- a/include/asm-um/processor-x86_64.h +++ b/include/asm-um/processor-x86_64.h @@ -36,17 +36,9 @@ extern inline void rep_nop(void) #define ARCH_IS_STACKGROW(address) \ (address + 128 >= UPT_SP(¤t->thread.regs.regs)) +#define KSTK_EIP(tsk) KSTK_REG(tsk, RIP) +#define KSTK_ESP(tsk) KSTK_REG(tsk, RSP) + #include "asm/processor-generic.h" #endif - -/* - * Overrides for Emacs so that we follow Linus's tabbing style. - * Emacs will notice this stuff at the end of the file and automatically - * adjust the settings for this buffer only. This must remain at the end - * of the file. - * --------------------------------------------------------------------------- - * Local variables: - * c-file-style: "linux" - * End: - */ diff --git a/include/asm-um/uaccess.h b/include/asm-um/uaccess.h index 801710d00a40..2ee028b8de9d 100644 --- a/include/asm-um/uaccess.h +++ b/include/asm-um/uaccess.h @@ -44,7 +44,7 @@ const __typeof__(ptr) __private_ptr = ptr; \ __typeof__(*(__private_ptr)) __private_val; \ int __private_ret = -EFAULT; \ - (x) = 0; \ + (x) = (__typeof__(*(__private_ptr)))0; \ if (__copy_from_user(&__private_val, (__private_ptr), \ sizeof(*(__private_ptr))) == 0) {\ (x) = (__typeof__(*(__private_ptr))) __private_val; \ diff --git a/include/asm-v850/atomic.h b/include/asm-v850/atomic.h index 8284aa7363f2..bede3172ce7f 100644 --- a/include/asm-v850/atomic.h +++ b/include/asm-v850/atomic.h @@ -31,7 +31,7 @@ typedef struct { int counter; } atomic_t; #define atomic_read(v) ((v)->counter) #define atomic_set(v,i) (((v)->counter) = (i)) -extern __inline__ int atomic_add_return (int i, volatile atomic_t *v) +static inline int atomic_add_return (int i, volatile atomic_t *v) { unsigned long flags; int res; @@ -90,6 +90,36 @@ static __inline__ void atomic_clear_mask (unsigned long mask, unsigned long *add #define atomic_dec_and_test(v) (atomic_sub_return (1, (v)) == 0) #define atomic_add_negative(i,v) (atomic_add_return ((i), (v)) < 0) +static inline int atomic_cmpxchg(atomic_t *v, int old, int new) +{ + int ret; + unsigned long flags; + + local_irq_save(flags); + ret = v->counter; + if (likely(ret == old)) + v->counter = new; + local_irq_restore(flags); + + return ret; +} + +static inline int atomic_add_unless(atomic_t *v, int a, int u) +{ + int ret; + unsigned long flags; + + local_irq_save(flags); + ret = v->counter; + if (ret != u) + v->counter += a; + local_irq_restore(flags); + + return ret != u; +} + +#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0) + /* Atomic operations are already serializing on ARM */ #define smp_mb__before_atomic_dec() barrier() #define smp_mb__after_atomic_dec() barrier() diff --git a/include/asm-v850/bitops.h b/include/asm-v850/bitops.h index 0e5c2f210872..b91e799763fd 100644 --- a/include/asm-v850/bitops.h +++ b/include/asm-v850/bitops.h @@ -30,7 +30,7 @@ * ffz = Find First Zero in word. Undefined if no zero exists, * so code should check against ~0UL first.. */ -extern __inline__ unsigned long ffz (unsigned long word) +static inline unsigned long ffz (unsigned long word) { unsigned long result = 0; @@ -135,7 +135,7 @@ extern __inline__ unsigned long ffz (unsigned long word) "m" (*((const char *)(addr) + ((nr) >> 3)))); \ __test_bit_res; \ }) -extern __inline__ int __test_bit (int nr, const void *addr) +static inline int __test_bit (int nr, const void *addr) { int res; __asm__ __volatile__ ("tst1 %1, [%2]; setf nz, %0" @@ -157,7 +157,7 @@ extern __inline__ int __test_bit (int nr, const void *addr) #define find_first_zero_bit(addr, size) \ find_next_zero_bit ((addr), (size), 0) -extern __inline__ int find_next_zero_bit(const void *addr, int size, int offset) +static inline int find_next_zero_bit(const void *addr, int size, int offset) { unsigned long *p = ((unsigned long *) addr) + (offset >> 5); unsigned long result = offset & ~31UL; diff --git a/include/asm-v850/delay.h b/include/asm-v850/delay.h index 1ce65d48a7c5..6d028e6b2354 100644 --- a/include/asm-v850/delay.h +++ b/include/asm-v850/delay.h @@ -16,7 +16,7 @@ #include <asm/param.h> -extern __inline__ void __delay(unsigned long loops) +static inline void __delay(unsigned long loops) { if (loops) __asm__ __volatile__ ("1: add -1, %0; bnz 1b" @@ -33,7 +33,7 @@ extern __inline__ void __delay(unsigned long loops) extern unsigned long loops_per_jiffy; -extern __inline__ void udelay(unsigned long usecs) +static inline void udelay(unsigned long usecs) { register unsigned long full_loops, part_loops; diff --git a/include/asm-v850/hardirq.h b/include/asm-v850/hardirq.h index 5dfca8047cbe..d98488cd5af1 100644 --- a/include/asm-v850/hardirq.h +++ b/include/asm-v850/hardirq.h @@ -5,6 +5,8 @@ #include <linux/threads.h> #include <linux/cache.h> +#include <asm/irq.h> + typedef struct { unsigned int __softirq_pending; } ____cacheline_aligned irq_cpustat_t; @@ -22,4 +24,6 @@ typedef struct { # error HARDIRQ_BITS is too low! #endif +void ack_bad_irq(unsigned int irq); + #endif /* __V850_HARDIRQ_H__ */ diff --git a/include/asm-v850/hw_irq.h b/include/asm-v850/hw_irq.h index 4bdc98edb9f8..a8aab4342712 100644 --- a/include/asm-v850/hw_irq.h +++ b/include/asm-v850/hw_irq.h @@ -1,7 +1,7 @@ #ifndef __V850_HW_IRQ_H__ #define __V850_HW_IRQ_H__ -extern inline void hw_resend_irq (struct hw_interrupt_type *h, unsigned int i) +static inline void hw_resend_irq (struct hw_interrupt_type *h, unsigned int i) { } diff --git a/include/asm-v850/processor.h b/include/asm-v850/processor.h index d41f925f5182..98f929427d3d 100644 --- a/include/asm-v850/processor.h +++ b/include/asm-v850/processor.h @@ -59,7 +59,7 @@ struct thread_struct { /* Do necessary setup to start up a newly executed thread. */ -extern inline void start_thread (struct pt_regs *regs, +static inline void start_thread (struct pt_regs *regs, unsigned long pc, unsigned long usp) { regs->pc = pc; @@ -68,7 +68,7 @@ extern inline void start_thread (struct pt_regs *regs, } /* Free all resources held by a thread. */ -extern inline void release_thread (struct task_struct *dead_task) +static inline void release_thread (struct task_struct *dead_task) { } diff --git a/include/asm-v850/semaphore.h b/include/asm-v850/semaphore.h index c514062bb69e..735baaf3a16e 100644 --- a/include/asm-v850/semaphore.h +++ b/include/asm-v850/semaphore.h @@ -18,16 +18,13 @@ struct semaphore { { ATOMIC_INIT (count), 0, \ __WAIT_QUEUE_HEAD_INITIALIZER ((name).wait) } -#define __MUTEX_INITIALIZER(name) \ - __SEMAPHORE_INITIALIZER (name,1) - #define __DECLARE_SEMAPHORE_GENERIC(name,count) \ struct semaphore name = __SEMAPHORE_INITIALIZER (name,count) #define DECLARE_MUTEX(name) __DECLARE_SEMAPHORE_GENERIC (name,1) #define DECLARE_MUTEX_LOCKED(name) __DECLARE_SEMAPHORE_GENERIC (name,0) -extern inline void sema_init (struct semaphore *sem, int val) +static inline void sema_init (struct semaphore *sem, int val) { *sem = (struct semaphore)__SEMAPHORE_INITIALIZER((*sem),val); } @@ -55,14 +52,14 @@ extern int __down_interruptible (struct semaphore * sem); extern int __down_trylock (struct semaphore * sem); extern void __up (struct semaphore * sem); -extern inline void down (struct semaphore * sem) +static inline void down (struct semaphore * sem) { might_sleep(); if (atomic_dec_return (&sem->count) < 0) __down (sem); } -extern inline int down_interruptible (struct semaphore * sem) +static inline int down_interruptible (struct semaphore * sem) { int ret = 0; might_sleep(); @@ -71,7 +68,7 @@ extern inline int down_interruptible (struct semaphore * sem) return ret; } -extern inline int down_trylock (struct semaphore *sem) +static inline int down_trylock (struct semaphore *sem) { int ret = 0; if (atomic_dec_return (&sem->count) < 0) @@ -79,7 +76,7 @@ extern inline int down_trylock (struct semaphore *sem) return ret; } -extern inline void up (struct semaphore * sem) +static inline void up (struct semaphore * sem) { if (atomic_inc_return (&sem->count) <= 0) __up (sem); diff --git a/include/asm-v850/system.h b/include/asm-v850/system.h index 20f4c738c04e..107decbd6e6c 100644 --- a/include/asm-v850/system.h +++ b/include/asm-v850/system.h @@ -81,7 +81,7 @@ static inline int irqs_disabled (void) ((__typeof__ (*(ptr)))__xchg ((unsigned long)(with), (ptr), sizeof (*(ptr)))) #define tas(ptr) (xchg ((ptr), 1)) -extern inline unsigned long __xchg (unsigned long with, +static inline unsigned long __xchg (unsigned long with, __volatile__ void *ptr, int size) { unsigned long tmp, flags; diff --git a/include/asm-v850/tlbflush.h b/include/asm-v850/tlbflush.h index 501e4498172c..5f2f85f636ea 100644 --- a/include/asm-v850/tlbflush.h +++ b/include/asm-v850/tlbflush.h @@ -56,12 +56,12 @@ static inline void flush_tlb_range(struct vm_area_struct *vma, BUG (); } -extern inline void flush_tlb_kernel_page(unsigned long addr) +static inline void flush_tlb_kernel_page(unsigned long addr) { BUG (); } -extern inline void flush_tlb_pgtables(struct mm_struct *mm, +static inline void flush_tlb_pgtables(struct mm_struct *mm, unsigned long start, unsigned long end) { BUG (); diff --git a/include/asm-v850/uaccess.h b/include/asm-v850/uaccess.h index 188b28597cf1..64563c409bb2 100644 --- a/include/asm-v850/uaccess.h +++ b/include/asm-v850/uaccess.h @@ -14,7 +14,7 @@ #define VERIFY_READ 0 #define VERIFY_WRITE 1 -extern inline int access_ok (int type, const void *addr, unsigned long size) +static inline int access_ok (int type, const void *addr, unsigned long size) { /* XXX I guess we should check against real ram bounds at least, and possibly make sure ADDR is not within the kernel. diff --git a/include/asm-v850/unaligned.h b/include/asm-v850/unaligned.h index 65e38362142b..e30b18653a94 100644 --- a/include/asm-v850/unaligned.h +++ b/include/asm-v850/unaligned.h @@ -82,19 +82,19 @@ extern int __bug_unaligned_x(void *ptr); }) -extern inline void __put_unaligned_2(__u32 __v, register __u8 *__p) +static inline void __put_unaligned_2(__u32 __v, register __u8 *__p) { *__p++ = __v; *__p++ = __v >> 8; } -extern inline void __put_unaligned_4(__u32 __v, register __u8 *__p) +static inline void __put_unaligned_4(__u32 __v, register __u8 *__p) { __put_unaligned_2(__v >> 16, __p + 2); __put_unaligned_2(__v, __p); } -extern inline void __put_unaligned_8(const unsigned long long __v, register __u8 *__p) +static inline void __put_unaligned_8(const unsigned long long __v, register __u8 *__p) { /* * tradeoff: 8 bytes of stack for all unaligned puts (2 diff --git a/include/asm-v850/unistd.h b/include/asm-v850/unistd.h index 3b552096c0e8..5a86f8e976ec 100644 --- a/include/asm-v850/unistd.h +++ b/include/asm-v850/unistd.h @@ -452,7 +452,6 @@ unsigned long sys_mmap2(unsigned long addr, size_t len, struct pt_regs; int sys_execve (char *name, char **argv, char **envp, struct pt_regs *regs); int sys_pipe (int *fildes); -int sys_ptrace(long request, long pid, long addr, long data); struct sigaction; asmlinkage long sys_rt_sigaction(int sig, const struct sigaction __user *act, diff --git a/include/asm-x86_64/apic.h b/include/asm-x86_64/apic.h index 6c5d5ca8383a..5647b7de1749 100644 --- a/include/asm-x86_64/apic.h +++ b/include/asm-x86_64/apic.h @@ -111,6 +111,8 @@ extern unsigned int nmi_watchdog; extern int disable_timer_pin_1; +extern void setup_threshold_lvt(unsigned long lvt_off); + #endif /* CONFIG_X86_LOCAL_APIC */ extern unsigned boot_cpu_id; diff --git a/include/asm-x86_64/atomic.h b/include/asm-x86_64/atomic.h index fc4c5956e1ea..50db9f39274f 100644 --- a/include/asm-x86_64/atomic.h +++ b/include/asm-x86_64/atomic.h @@ -160,8 +160,8 @@ static __inline__ int atomic_inc_and_test(atomic_t *v) /** * atomic_add_negative - add and test if negative - * @v: pointer of type atomic_t * @i: integer value to add + * @v: pointer of type atomic_t * * Atomically adds @i to @v and returns true * if the result is negative, or false when @@ -178,6 +178,31 @@ static __inline__ int atomic_add_negative(int i, atomic_t *v) return c; } +/** + * atomic_add_return - add and return + * @i: integer value to add + * @v: pointer of type atomic_t + * + * Atomically adds @i to @v and returns @i + @v + */ +static __inline__ int atomic_add_return(int i, atomic_t *v) +{ + int __i = i; + __asm__ __volatile__( + LOCK "xaddl %0, %1;" + :"=r"(i) + :"m"(v->counter), "0"(i)); + return i + __i; +} + +static __inline__ int atomic_sub_return(int i, atomic_t *v) +{ + return atomic_add_return(-i,v); +} + +#define atomic_inc_return(v) (atomic_add_return(1,v)) +#define atomic_dec_return(v) (atomic_sub_return(1,v)) + /* An 64bit atomic type */ typedef struct { volatile long counter; } atomic64_t; @@ -320,14 +345,14 @@ static __inline__ int atomic64_inc_and_test(atomic64_t *v) /** * atomic64_add_negative - add and test if negative - * @v: pointer to atomic64_t * @i: integer value to add + * @v: pointer to type atomic64_t * * Atomically adds @i to @v and returns true * if the result is negative, or false when * result is greater than or equal to zero. */ -static __inline__ long atomic64_add_negative(long i, atomic64_t *v) +static __inline__ int atomic64_add_negative(long i, atomic64_t *v) { unsigned char c; @@ -339,29 +364,50 @@ static __inline__ long atomic64_add_negative(long i, atomic64_t *v) } /** - * atomic_add_return - add and return - * @v: pointer of type atomic_t + * atomic64_add_return - add and return * @i: integer value to add + * @v: pointer to type atomic64_t * * Atomically adds @i to @v and returns @i + @v */ -static __inline__ int atomic_add_return(int i, atomic_t *v) +static __inline__ long atomic64_add_return(long i, atomic64_t *v) { - int __i = i; + long __i = i; __asm__ __volatile__( - LOCK "xaddl %0, %1;" + LOCK "xaddq %0, %1;" :"=r"(i) :"m"(v->counter), "0"(i)); return i + __i; } -static __inline__ int atomic_sub_return(int i, atomic_t *v) +static __inline__ long atomic64_sub_return(long i, atomic64_t *v) { - return atomic_add_return(-i,v); + return atomic64_add_return(-i,v); } -#define atomic_inc_return(v) (atomic_add_return(1,v)) -#define atomic_dec_return(v) (atomic_sub_return(1,v)) +#define atomic64_inc_return(v) (atomic64_add_return(1,v)) +#define atomic64_dec_return(v) (atomic64_sub_return(1,v)) + +#define atomic_cmpxchg(v, old, new) ((int)cmpxchg(&((v)->counter), old, new)) + +/** + * atomic_add_unless - add unless the number is a given value + * @v: pointer of type atomic_t + * @a: the amount to add to v... + * @u: ...unless v is equal to u. + * + * Atomically adds @a to @v, so long as it was not @u. + * Returns non-zero if @v was not @u, and zero otherwise. + */ +#define atomic_add_unless(v, a, u) \ +({ \ + int c, old; \ + c = atomic_read(v); \ + while (c != (u) && (old = atomic_cmpxchg((v), c, c + (a))) != c) \ + c = old; \ + c != (u); \ +}) +#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0) /* These are x86-specific, used by some header files */ #define atomic_clear_mask(mask, addr) \ diff --git a/include/asm-x86_64/cache.h b/include/asm-x86_64/cache.h index eda62bae1240..33e53424128b 100644 --- a/include/asm-x86_64/cache.h +++ b/include/asm-x86_64/cache.h @@ -9,6 +9,6 @@ /* L1 cache line size */ #define L1_CACHE_SHIFT (CONFIG_X86_L1_CACHE_SHIFT) #define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT) -#define L1_CACHE_SHIFT_MAX 6 /* largest L1 which this arch supports */ +#define L1_CACHE_SHIFT_MAX 7 /* largest L1 which this arch supports */ #endif diff --git a/include/asm-x86_64/desc.h b/include/asm-x86_64/desc.h index 68ac3c62fe3d..33764869387b 100644 --- a/include/asm-x86_64/desc.h +++ b/include/asm-x86_64/desc.h @@ -98,16 +98,19 @@ static inline void _set_gate(void *adr, unsigned type, unsigned long func, unsig static inline void set_intr_gate(int nr, void *func) { + BUG_ON((unsigned)nr > 0xFF); _set_gate(&idt_table[nr], GATE_INTERRUPT, (unsigned long) func, 0, 0); } static inline void set_intr_gate_ist(int nr, void *func, unsigned ist) { + BUG_ON((unsigned)nr > 0xFF); _set_gate(&idt_table[nr], GATE_INTERRUPT, (unsigned long) func, 0, ist); } static inline void set_system_gate(int nr, void *func) { + BUG_ON((unsigned)nr > 0xFF); _set_gate(&idt_table[nr], GATE_INTERRUPT, (unsigned long) func, 3, 0); } @@ -129,9 +132,16 @@ static inline void set_tssldt_descriptor(void *ptr, unsigned long tss, unsigned static inline void set_tss_desc(unsigned cpu, void *addr) { - set_tssldt_descriptor(&cpu_gdt_table[cpu][GDT_ENTRY_TSS], (unsigned long)addr, - DESC_TSS, - sizeof(struct tss_struct) - 1); + /* + * sizeof(unsigned long) coming from an extra "long" at the end + * of the iobitmap. See tss_struct definition in processor.h + * + * -1? seg base+limit should be pointing to the address of the + * last valid byte + */ + set_tssldt_descriptor(&cpu_gdt_table[cpu][GDT_ENTRY_TSS], + (unsigned long)addr, DESC_TSS, + IO_BITMAP_OFFSET + IO_BITMAP_BYTES + sizeof(unsigned long) - 1); } static inline void set_ldt_desc(unsigned cpu, void *addr, int size) diff --git a/include/asm-x86_64/dma-mapping.h b/include/asm-x86_64/dma-mapping.h index e784fdc524f1..36d16dfbac88 100644 --- a/include/asm-x86_64/dma-mapping.h +++ b/include/asm-x86_64/dma-mapping.h @@ -17,7 +17,7 @@ extern dma_addr_t bad_dma_address; (swiotlb ? swiotlb_dma_mapping_error(x) : ((x) == bad_dma_address)) void *dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *dma_handle, - unsigned gfp); + gfp_t gfp); void dma_free_coherent(struct device *dev, size_t size, void *vaddr, dma_addr_t dma_handle); @@ -85,10 +85,33 @@ static inline void dma_sync_single_for_device(struct device *hwdev, flush_write_buffers(); } -#define dma_sync_single_range_for_cpu(dev, dma_handle, offset, size, dir) \ - dma_sync_single_for_cpu(dev, dma_handle, size, dir) -#define dma_sync_single_range_for_device(dev, dma_handle, offset, size, dir) \ - dma_sync_single_for_device(dev, dma_handle, size, dir) +static inline void dma_sync_single_range_for_cpu(struct device *hwdev, + dma_addr_t dma_handle, + unsigned long offset, + size_t size, int direction) +{ + if (direction == DMA_NONE) + out_of_line_bug(); + + if (swiotlb) + return swiotlb_sync_single_range_for_cpu(hwdev,dma_handle,offset,size,direction); + + flush_write_buffers(); +} + +static inline void dma_sync_single_range_for_device(struct device *hwdev, + dma_addr_t dma_handle, + unsigned long offset, + size_t size, int direction) +{ + if (direction == DMA_NONE) + out_of_line_bug(); + + if (swiotlb) + return swiotlb_sync_single_range_for_device(hwdev,dma_handle,offset,size,direction); + + flush_write_buffers(); +} static inline void dma_sync_sg_for_cpu(struct device *hwdev, struct scatterlist *sg, diff --git a/include/asm-x86_64/dma.h b/include/asm-x86_64/dma.h index 16fa3a064d0c..6f2a817b6a7c 100644 --- a/include/asm-x86_64/dma.h +++ b/include/asm-x86_64/dma.h @@ -72,8 +72,15 @@ #define MAX_DMA_CHANNELS 8 -/* The maximum address that we can perform a DMA transfer to on this platform */ -#define MAX_DMA_ADDRESS (PAGE_OFFSET+0x1000000) + +/* 16MB ISA DMA zone */ +#define MAX_DMA_PFN ((16*1024*1024) >> PAGE_SHIFT) + +/* 4GB broken PCI/AGP hardware bus master zone */ +#define MAX_DMA32_PFN ((4UL*1024*1024*1024) >> PAGE_SHIFT) + +/* Compat define for old dma zone */ +#define MAX_DMA_ADDRESS ((unsigned long)__va(MAX_DMA_PFN << PAGE_SHIFT)) /* 8237 DMA controllers */ #define IO_DMA1_BASE 0x00 /* 8 bit slave DMA, channels 0..3 */ diff --git a/include/asm-x86_64/elf.h b/include/asm-x86_64/elf.h index a60a35e79222..43862cd6a569 100644 --- a/include/asm-x86_64/elf.h +++ b/include/asm-x86_64/elf.h @@ -149,6 +149,8 @@ extern void set_personality_64bit(void); */ #define elf_read_implies_exec(ex, executable_stack) (executable_stack != EXSTACK_DISABLE_X) +struct task_struct; + extern int dump_task_regs (struct task_struct *, elf_gregset_t *); extern int dump_task_fpu (struct task_struct *, elf_fpregset_t *); diff --git a/include/asm-x86_64/hpet.h b/include/asm-x86_64/hpet.h index a3877f570998..c20c28f5c7a0 100644 --- a/include/asm-x86_64/hpet.h +++ b/include/asm-x86_64/hpet.h @@ -14,18 +14,18 @@ #define HPET_CFG 0x010 #define HPET_STATUS 0x020 #define HPET_COUNTER 0x0f0 -#define HPET_T0_CFG 0x100 -#define HPET_T0_CMP 0x108 -#define HPET_T0_ROUTE 0x110 -#define HPET_T1_CFG 0x120 -#define HPET_T1_CMP 0x128 -#define HPET_T1_ROUTE 0x130 -#define HPET_T2_CFG 0x140 -#define HPET_T2_CMP 0x148 -#define HPET_T2_ROUTE 0x150 +#define HPET_Tn_OFFSET 0x20 +#define HPET_Tn_CFG(n) (0x100 + (n) * HPET_Tn_OFFSET) +#define HPET_Tn_ROUTE(n) (0x104 + (n) * HPET_Tn_OFFSET) +#define HPET_Tn_CMP(n) (0x108 + (n) * HPET_Tn_OFFSET) +#define HPET_T0_CFG HPET_Tn_CFG(0) +#define HPET_T0_CMP HPET_Tn_CMP(0) +#define HPET_T1_CFG HPET_Tn_CFG(1) +#define HPET_T1_CMP HPET_Tn_CMP(1) #define HPET_ID_VENDOR 0xffff0000 #define HPET_ID_LEGSUP 0x00008000 +#define HPET_ID_64BIT 0x00002000 #define HPET_ID_NUMBER 0x00001f00 #define HPET_ID_REV 0x000000ff #define HPET_ID_NUMBER_SHIFT 8 @@ -38,11 +38,18 @@ #define HPET_LEGACY_8254 2 #define HPET_LEGACY_RTC 8 -#define HPET_TN_ENABLE 0x004 -#define HPET_TN_PERIODIC 0x008 -#define HPET_TN_PERIODIC_CAP 0x010 -#define HPET_TN_SETVAL 0x040 -#define HPET_TN_32BIT 0x100 +#define HPET_TN_LEVEL 0x0002 +#define HPET_TN_ENABLE 0x0004 +#define HPET_TN_PERIODIC 0x0008 +#define HPET_TN_PERIODIC_CAP 0x0010 +#define HPET_TN_64BIT_CAP 0x0020 +#define HPET_TN_SETVAL 0x0040 +#define HPET_TN_32BIT 0x0100 +#define HPET_TN_ROUTE 0x3e00 +#define HPET_TN_FSB 0x4000 +#define HPET_TN_FSB_CAP 0x8000 + +#define HPET_TN_ROUTE_SHIFT 9 extern int is_hpet_enabled(void); extern int hpet_rtc_timer_init(void); diff --git a/include/asm-x86_64/hw_irq.h b/include/asm-x86_64/hw_irq.h index dc97668ea0f9..c14a8c7267a6 100644 --- a/include/asm-x86_64/hw_irq.h +++ b/include/asm-x86_64/hw_irq.h @@ -55,7 +55,7 @@ struct hw_interrupt_type; #define CALL_FUNCTION_VECTOR 0xfc #define KDB_VECTOR 0xfb /* reserved for KDB */ #define THERMAL_APIC_VECTOR 0xfa -/* 0xf9 free */ +#define THRESHOLD_APIC_VECTOR 0xf9 #define INVALIDATE_TLB_VECTOR_END 0xf8 #define INVALIDATE_TLB_VECTOR_START 0xf0 /* f0-f8 used for TLB flush */ diff --git a/include/asm-x86_64/ia32.h b/include/asm-x86_64/ia32.h index 6efa00fe4e7b..c7bc9c0525ba 100644 --- a/include/asm-x86_64/ia32.h +++ b/include/asm-x86_64/ia32.h @@ -165,6 +165,11 @@ struct siginfo_t; int do_get_thread_area(struct thread_struct *t, struct user_desc __user *info); int do_set_thread_area(struct thread_struct *t, struct user_desc __user *info); int ia32_child_tls(struct task_struct *p, struct pt_regs *childregs); + +struct linux_binprm; +extern int ia32_setup_arg_pages(struct linux_binprm *bprm, + unsigned long stack_top, int exec_stack); + #endif #endif /* !CONFIG_IA32_SUPPORT */ diff --git a/include/asm-x86_64/kprobes.h b/include/asm-x86_64/kprobes.h index 6d6d883fdf6d..4dd7a7e148d4 100644 --- a/include/asm-x86_64/kprobes.h +++ b/include/asm-x86_64/kprobes.h @@ -25,6 +25,7 @@ */ #include <linux/types.h> #include <linux/ptrace.h> +#include <linux/percpu.h> struct pt_regs; @@ -48,6 +49,24 @@ struct arch_specific_insn { kprobe_opcode_t *insn; }; +struct prev_kprobe { + struct kprobe *kp; + unsigned long status; + unsigned long old_rflags; + unsigned long saved_rflags; +}; + +/* per-cpu kprobe control block */ +struct kprobe_ctlblk { + unsigned long kprobe_status; + unsigned long kprobe_old_rflags; + unsigned long kprobe_saved_rflags; + long *jprobe_saved_rsp; + struct pt_regs jprobe_saved_regs; + kprobe_opcode_t jprobes_stack[MAX_STACK_SIZE]; + struct prev_kprobe prev_kprobe; +}; + /* trap3/1 are intr gates for kprobes. So, restore the status of IF, * if necessary, before executing the original int3/1 (trap) handler. */ diff --git a/include/asm-x86_64/mce.h b/include/asm-x86_64/mce.h index 869249db6795..5d298b799a9f 100644 --- a/include/asm-x86_64/mce.h +++ b/include/asm-x86_64/mce.h @@ -67,6 +67,8 @@ struct mce_log { /* Software defined banks */ #define MCE_EXTENDED_BANK 128 #define MCE_THERMAL_BANK MCE_EXTENDED_BANK + 0 +#define MCE_THRESHOLD_BASE MCE_EXTENDED_BANK + 1 /* MCE_AMD */ +#define MCE_THRESHOLD_DRAM_ECC MCE_THRESHOLD_BASE + 4 void mce_log(struct mce *m); #ifdef CONFIG_X86_MCE_INTEL @@ -77,4 +79,12 @@ static inline void mce_intel_feature_init(struct cpuinfo_x86 *c) } #endif +#ifdef CONFIG_X86_MCE_AMD +void mce_amd_feature_init(struct cpuinfo_x86 *c); +#else +static inline void mce_amd_feature_init(struct cpuinfo_x86 *c) +{ +} +#endif + #endif diff --git a/include/asm-x86_64/mmzone.h b/include/asm-x86_64/mmzone.h index b40c661f111e..69baaa8a3ce0 100644 --- a/include/asm-x86_64/mmzone.h +++ b/include/asm-x86_64/mmzone.h @@ -17,16 +17,15 @@ /* Simple perfect hash to map physical addresses to node numbers */ extern int memnode_shift; extern u8 memnodemap[NODEMAPSIZE]; -extern int maxnode; extern struct pglist_data *node_data[]; static inline __attribute__((pure)) int phys_to_nid(unsigned long addr) { - int nid; + unsigned nid; VIRTUAL_BUG_ON((addr >> memnode_shift) >= NODEMAPSIZE); nid = memnodemap[addr >> memnode_shift]; - VIRTUAL_BUG_ON(nid > maxnode); + VIRTUAL_BUG_ON(nid >= MAX_NUMNODES || !node_data[nid]); return nid; } @@ -41,9 +40,7 @@ static inline __attribute__((pure)) int phys_to_nid(unsigned long addr) #define pfn_to_nid(pfn) phys_to_nid((unsigned long)(pfn) << PAGE_SHIFT) #define kvaddr_to_nid(kaddr) phys_to_nid(__pa(kaddr)) -/* AK: this currently doesn't deal with invalid addresses. We'll see - if the 2.5 kernel doesn't pass them - (2.4 used to). */ +/* Requires pfn_valid(pfn) to be true */ #define pfn_to_page(pfn) ({ \ int nid = phys_to_nid(((unsigned long)(pfn)) << PAGE_SHIFT); \ ((pfn) - node_start_pfn(nid)) + NODE_DATA(nid)->node_mem_map; \ diff --git a/include/asm-x86_64/mpspec.h b/include/asm-x86_64/mpspec.h index f267e10c023d..6f8a17d105ab 100644 --- a/include/asm-x86_64/mpspec.h +++ b/include/asm-x86_64/mpspec.h @@ -16,7 +16,7 @@ /* * A maximum of 255 APICs with the current APIC ID architecture. */ -#define MAX_APICS 128 +#define MAX_APICS 255 struct intel_mp_floating { @@ -157,7 +157,8 @@ struct mpc_config_lintsrc */ #define MAX_MP_BUSSES 256 -#define MAX_IRQ_SOURCES 256 +/* Each PCI slot may be a combo card with its own bus. 4 IRQ pins per slot. */ +#define MAX_IRQ_SOURCES (MAX_MP_BUSSES * 4) enum mp_bustype { MP_BUS_ISA = 1, MP_BUS_EISA, @@ -172,7 +173,7 @@ extern int smp_found_config; extern void find_smp_config (void); extern void get_smp_config (void); extern int nr_ioapics; -extern int apic_version [MAX_APICS]; +extern unsigned char apic_version [MAX_APICS]; extern int mp_irq_entries; extern struct mpc_config_intsrc mp_irqs [MAX_IRQ_SOURCES]; extern int mpc_default_type; diff --git a/include/asm-x86_64/msi.h b/include/asm-x86_64/msi.h index 85c427e472bf..356e0e82f50b 100644 --- a/include/asm-x86_64/msi.h +++ b/include/asm-x86_64/msi.h @@ -11,8 +11,6 @@ #include <asm/smp.h> #define LAST_DEVICE_VECTOR 232 -#define MSI_DEST_MODE MSI_LOGICAL_MODE -#define MSI_TARGET_CPU_SHIFT 12 -#define MSI_TARGET_CPU logical_smp_processor_id() +#define MSI_TARGET_CPU_SHIFT 12 #endif /* ASM_MSI_H */ diff --git a/include/asm-x86_64/msr.h b/include/asm-x86_64/msr.h index 4d727f3f5550..10f8b51cec8b 100644 --- a/include/asm-x86_64/msr.h +++ b/include/asm-x86_64/msr.h @@ -19,7 +19,7 @@ : "=a" (a__), "=d" (b__) \ : "c" (msr)); \ val = a__ | (b__<<32); \ -} while(0); +} while(0) #define wrmsr(msr,val1,val2) \ __asm__ __volatile__("wrmsr" \ @@ -56,7 +56,7 @@ ".section __ex_table,\"a\"\n" \ " .align 8\n" \ " .quad 1b,3b\n" \ - ".previous":"=&bDS" (ret__), "=a"(a), "=d"(b)\ + ".previous":"=&bDS" (ret__), "=a"(*(a)), "=d"(*(b))\ :"c"(msr), "i"(-EIO), "0"(0)); \ ret__; }) @@ -234,6 +234,7 @@ static inline unsigned int cpuid_edx(unsigned int op) #define MSR_K8_TOP_MEM1 0xC001001A #define MSR_K8_TOP_MEM2 0xC001001D #define MSR_K8_SYSCFG 0xC0010010 +#define MSR_K8_HWCR 0xC0010015 /* K6 MSRs */ #define MSR_K6_EFER 0xC0000080 diff --git a/include/asm-x86_64/mtrr.h b/include/asm-x86_64/mtrr.h index c5959d6418bb..66ac1c0f27e1 100644 --- a/include/asm-x86_64/mtrr.h +++ b/include/asm-x86_64/mtrr.h @@ -25,6 +25,7 @@ #include <linux/config.h> #include <linux/ioctl.h> +#include <linux/compat.h> #define MTRR_IOCTL_BASE 'M' @@ -105,4 +106,36 @@ static __inline__ int mtrr_del_page (int reg, unsigned long base, #endif +#ifdef CONFIG_COMPAT + +struct mtrr_sentry32 +{ + compat_ulong_t base; /* Base address */ + compat_uint_t size; /* Size of region */ + compat_uint_t type; /* Type of region */ +}; + +struct mtrr_gentry32 +{ + compat_ulong_t regnum; /* Register number */ + compat_uint_t base; /* Base address */ + compat_uint_t size; /* Size of region */ + compat_uint_t type; /* Type of region */ +}; + +#define MTRR_IOCTL_BASE 'M' + +#define MTRRIOC32_ADD_ENTRY _IOW(MTRR_IOCTL_BASE, 0, struct mtrr_sentry32) +#define MTRRIOC32_SET_ENTRY _IOW(MTRR_IOCTL_BASE, 1, struct mtrr_sentry32) +#define MTRRIOC32_DEL_ENTRY _IOW(MTRR_IOCTL_BASE, 2, struct mtrr_sentry32) +#define MTRRIOC32_GET_ENTRY _IOWR(MTRR_IOCTL_BASE, 3, struct mtrr_gentry32) +#define MTRRIOC32_KILL_ENTRY _IOW(MTRR_IOCTL_BASE, 4, struct mtrr_sentry32) +#define MTRRIOC32_ADD_PAGE_ENTRY _IOW(MTRR_IOCTL_BASE, 5, struct mtrr_sentry32) +#define MTRRIOC32_SET_PAGE_ENTRY _IOW(MTRR_IOCTL_BASE, 6, struct mtrr_sentry32) +#define MTRRIOC32_DEL_PAGE_ENTRY _IOW(MTRR_IOCTL_BASE, 7, struct mtrr_sentry32) +#define MTRRIOC32_GET_PAGE_ENTRY _IOWR(MTRR_IOCTL_BASE, 8, struct mtrr_gentry32) +#define MTRRIOC32_KILL_PAGE_ENTRY _IOW(MTRR_IOCTL_BASE, 9, struct mtrr_sentry32) + +#endif /* CONFIG_COMPAT */ + #endif /* _LINUX_MTRR_H */ diff --git a/include/asm-x86_64/numa.h b/include/asm-x86_64/numa.h index bcf55c3f7f7f..d51e56fdc3da 100644 --- a/include/asm-x86_64/numa.h +++ b/include/asm-x86_64/numa.h @@ -17,6 +17,8 @@ extern void numa_add_cpu(int cpu); extern void numa_init_array(void); extern int numa_off; +extern void numa_set_node(int cpu, int node); + extern unsigned char apicid_to_node[256]; #define NUMA_NO_NODE 0xff diff --git a/include/asm-x86_64/page.h b/include/asm-x86_64/page.h index e5ab4d231f2c..06e489f32472 100644 --- a/include/asm-x86_64/page.h +++ b/include/asm-x86_64/page.h @@ -11,7 +11,7 @@ #define PAGE_SIZE (1UL << PAGE_SHIFT) #endif #define PAGE_MASK (~(PAGE_SIZE-1)) -#define PHYSICAL_PAGE_MASK (~(PAGE_SIZE-1) & (__PHYSICAL_MASK << PAGE_SHIFT)) +#define PHYSICAL_PAGE_MASK (~(PAGE_SIZE-1) & __PHYSICAL_MASK) #define THREAD_ORDER 1 #ifdef __ASSEMBLY__ diff --git a/include/asm-x86_64/pci.h b/include/asm-x86_64/pci.h index 5a82a6762c21..eeb3088a1c9e 100644 --- a/include/asm-x86_64/pci.h +++ b/include/asm-x86_64/pci.h @@ -50,10 +50,10 @@ extern int iommu_setup(char *opt); * address space. The networking and block device layers use * this boolean for bounce buffer decisions * - * On x86-64 it mostly equals, but we set it to zero to tell some subsystems - * that an hard or soft IOMMU is available. + * On AMD64 it mostly equals, but we set it to zero to tell some subsystems + * that an IOMMU is available. */ -#define PCI_DMA_BUS_IS_PHYS 0 +#define PCI_DMA_BUS_IS_PHYS (no_iommu ? 1 : 0) /* * x86-64 always supports DAC, but sometimes it is useful to force diff --git a/include/asm-x86_64/pda.h b/include/asm-x86_64/pda.h index bbf89aa8a1af..8733ccfa442e 100644 --- a/include/asm-x86_64/pda.h +++ b/include/asm-x86_64/pda.h @@ -15,6 +15,7 @@ struct x8664_pda { int irqcount; /* Irq nesting counter. Starts with -1 */ int cpunumber; /* Logical CPU number */ char *irqstackptr; /* top of irqstack */ + int nodenumber; /* number of current node */ unsigned int __softirq_pending; unsigned int __nmi_count; /* number of NMI on this CPUs */ struct mm_struct *active_mm; diff --git a/include/asm-x86_64/pgtable.h b/include/asm-x86_64/pgtable.h index 2cb483516459..ecf58c7c1650 100644 --- a/include/asm-x86_64/pgtable.h +++ b/include/asm-x86_64/pgtable.h @@ -16,6 +16,7 @@ extern pud_t level3_physmem_pgt[512]; extern pud_t level3_ident_pgt[512]; extern pmd_t level2_kernel_pgt[512]; extern pgd_t init_level4_pgt[]; +extern pgd_t boot_level4_pgt[]; extern unsigned long __supported_pte_mask; #define swapper_pg_dir init_level4_pgt @@ -105,6 +106,8 @@ static inline void pgd_clear (pgd_t * pgd) #define ptep_get_and_clear(mm,addr,xp) __pte(xchg(&(xp)->pte, 0)) +struct mm_struct; + static inline pte_t ptep_get_and_clear_full(struct mm_struct *mm, unsigned long addr, pte_t *ptep, int full) { pte_t pte; @@ -245,7 +248,7 @@ static inline unsigned long pud_bad(pud_t pud) #define pages_to_mb(x) ((x) >> (20-PAGE_SHIFT)) /* FIXME: is this right? */ #define pte_page(x) pfn_to_page(pte_pfn(x)) -#define pte_pfn(x) ((pte_val(x) >> PAGE_SHIFT) & __PHYSICAL_MASK) +#define pte_pfn(x) ((pte_val(x) & __PHYSICAL_MASK) >> PAGE_SHIFT) static inline pte_t pfn_pte(unsigned long page_nr, pgprot_t pgprot) { @@ -318,8 +321,6 @@ static inline int pmd_large(pmd_t pte) { * and a page entry and page directory to the page they refer to. */ -#define page_pte(page) page_pte_prot(page, __pgprot(0)) - /* * Level 4 access. */ @@ -354,7 +355,7 @@ static inline pud_t *__pud_offset_k(pud_t *pud, unsigned long address) #define pmd_clear(xp) do { set_pmd(xp, __pmd(0)); } while (0) #define pmd_bad(x) ((pmd_val(x) & (~PTE_MASK & ~_PAGE_USER)) != _KERNPG_TABLE ) #define pfn_pmd(nr,prot) (__pmd(((nr) << PAGE_SHIFT) | pgprot_val(prot))) -#define pmd_pfn(x) ((pmd_val(x) >> PAGE_SHIFT) & __PHYSICAL_MASK) +#define pmd_pfn(x) ((pmd_val(x) & __PHYSICAL_MASK) >> PAGE_SHIFT) #define pte_to_pgoff(pte) ((pte_val(pte) & PHYSICAL_PAGE_MASK) >> PAGE_SHIFT) #define pgoff_to_pte(off) ((pte_t) { ((off) << PAGE_SHIFT) | _PAGE_FILE }) @@ -384,7 +385,7 @@ static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) } #define pte_index(address) \ - ((address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1)) + (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1)) #define pte_offset_kernel(dir, address) ((pte_t *) pmd_page_kernel(*(dir)) + \ pte_index(address)) diff --git a/include/asm-x86_64/processor.h b/include/asm-x86_64/processor.h index 03837d34fba0..4861246548f7 100644 --- a/include/asm-x86_64/processor.h +++ b/include/asm-x86_64/processor.h @@ -61,10 +61,12 @@ struct cpuinfo_x86 { int x86_cache_alignment; int x86_tlbsize; /* number of 4K pages in DTLB/ITLB combined(in pages)*/ __u8 x86_virt_bits, x86_phys_bits; - __u8 x86_num_cores; + __u8 x86_max_cores; /* cpuid returned max cores value */ __u32 x86_power; __u32 extended_cpuid_level; /* Max extended CPUID function supported */ unsigned long loops_per_jiffy; + __u8 apicid; + __u8 booted_cores; /* number of cores as seen by OS */ } ____cacheline_aligned; #define X86_VENDOR_INTEL 0 diff --git a/include/asm-x86_64/proto.h b/include/asm-x86_64/proto.h index dbb37b0adb43..34501086afef 100644 --- a/include/asm-x86_64/proto.h +++ b/include/asm-x86_64/proto.h @@ -11,6 +11,8 @@ struct pt_regs; extern void start_kernel(void); extern void pda_init(int); +extern void zap_low_mappings(int cpu); + extern void early_idt_handler(void); extern void mcheck_init(struct cpuinfo_x86 *c); @@ -22,6 +24,8 @@ extern void mtrr_bp_init(void); #define mtrr_bp_init() do {} while (0) #endif extern void init_memory_mapping(unsigned long start, unsigned long end); +extern void size_zones(unsigned long *z, unsigned long *h, + unsigned long start_pfn, unsigned long end_pfn); extern void system_call(void); extern int kernel_syscall(void); diff --git a/include/asm-x86_64/rwsem.h b/include/asm-x86_64/rwsem.h deleted file mode 100644 index c002175b6e82..000000000000 --- a/include/asm-x86_64/rwsem.h +++ /dev/null @@ -1,278 +0,0 @@ -/* rwsem.h: R/W semaphores implemented using XADD/CMPXCHG for x86_64+ - * - * Written by David Howells (dhowells@redhat.com). - * Ported by Andi Kleen <ak@suse.de> to x86-64. - * - * Derived from asm-i386/semaphore.h and asm-i386/rwsem.h - * - * - * The MSW of the count is the negated number of active writers and waiting - * lockers, and the LSW is the total number of active locks - * - * The lock count is initialized to 0 (no active and no waiting lockers). - * - * When a writer subtracts WRITE_BIAS, it'll get 0xffff0001 for the case of an - * uncontended lock. This can be determined because XADD returns the old value. - * Readers increment by 1 and see a positive value when uncontended, negative - * if there are writers (and maybe) readers waiting (in which case it goes to - * sleep). - * - * The value of WAITING_BIAS supports up to 32766 waiting processes. This can - * be extended to 65534 by manually checking the whole MSW rather than relying - * on the S flag. - * - * The value of ACTIVE_BIAS supports up to 65535 active processes. - * - * This should be totally fair - if anything is waiting, a process that wants a - * lock will go to the back of the queue. When the currently active lock is - * released, if there's a writer at the front of the queue, then that and only - * that will be woken up; if there's a bunch of consecutive readers at the - * front, then they'll all be woken up, but no other readers will be. - */ - -#ifndef _X8664_RWSEM_H -#define _X8664_RWSEM_H - -#ifndef _LINUX_RWSEM_H -#error "please don't include asm/rwsem.h directly, use linux/rwsem.h instead" -#endif - -#ifdef __KERNEL__ - -#include <linux/list.h> -#include <linux/spinlock.h> - -struct rwsem_waiter; - -extern struct rw_semaphore *rwsem_down_read_failed(struct rw_semaphore *sem); -extern struct rw_semaphore *rwsem_down_write_failed(struct rw_semaphore *sem); -extern struct rw_semaphore *rwsem_wake(struct rw_semaphore *); -extern struct rw_semaphore *rwsem_downgrade_wake(struct rw_semaphore *sem); - -/* - * the semaphore definition - */ -struct rw_semaphore { - signed int count; -#define RWSEM_UNLOCKED_VALUE 0x00000000 -#define RWSEM_ACTIVE_BIAS 0x00000001 -#define RWSEM_ACTIVE_MASK 0x0000ffff -#define RWSEM_WAITING_BIAS (-0x00010000) -#define RWSEM_ACTIVE_READ_BIAS RWSEM_ACTIVE_BIAS -#define RWSEM_ACTIVE_WRITE_BIAS (RWSEM_WAITING_BIAS + RWSEM_ACTIVE_BIAS) - spinlock_t wait_lock; - struct list_head wait_list; -#if RWSEM_DEBUG - int debug; -#endif -}; - -/* - * initialisation - */ -#if RWSEM_DEBUG -#define __RWSEM_DEBUG_INIT , 0 -#else -#define __RWSEM_DEBUG_INIT /* */ -#endif - -#define __RWSEM_INITIALIZER(name) \ -{ RWSEM_UNLOCKED_VALUE, SPIN_LOCK_UNLOCKED, LIST_HEAD_INIT((name).wait_list) \ - __RWSEM_DEBUG_INIT } - -#define DECLARE_RWSEM(name) \ - struct rw_semaphore name = __RWSEM_INITIALIZER(name) - -static inline void init_rwsem(struct rw_semaphore *sem) -{ - sem->count = RWSEM_UNLOCKED_VALUE; - spin_lock_init(&sem->wait_lock); - INIT_LIST_HEAD(&sem->wait_list); -#if RWSEM_DEBUG - sem->debug = 0; -#endif -} - -/* - * lock for reading - */ -static inline void __down_read(struct rw_semaphore *sem) -{ - __asm__ __volatile__( - "# beginning down_read\n\t" -LOCK_PREFIX " incl (%%rdi)\n\t" /* adds 0x00000001, returns the old value */ - " js 2f\n\t" /* jump if we weren't granted the lock */ - "1:\n\t" - LOCK_SECTION_START("") \ - "2:\n\t" - " call rwsem_down_read_failed_thunk\n\t" - " jmp 1b\n" - LOCK_SECTION_END \ - "# ending down_read\n\t" - : "+m"(sem->count) - : "D"(sem) - : "memory", "cc"); -} - - -/* - * trylock for reading -- returns 1 if successful, 0 if contention - */ -static inline int __down_read_trylock(struct rw_semaphore *sem) -{ - __s32 result, tmp; - __asm__ __volatile__( - "# beginning __down_read_trylock\n\t" - " movl %0,%1\n\t" - "1:\n\t" - " movl %1,%2\n\t" - " addl %3,%2\n\t" - " jle 2f\n\t" -LOCK_PREFIX " cmpxchgl %2,%0\n\t" - " jnz 1b\n\t" - "2:\n\t" - "# ending __down_read_trylock\n\t" - : "+m"(sem->count), "=&a"(result), "=&r"(tmp) - : "i"(RWSEM_ACTIVE_READ_BIAS) - : "memory", "cc"); - return result>=0 ? 1 : 0; -} - - -/* - * lock for writing - */ -static inline void __down_write(struct rw_semaphore *sem) -{ - int tmp; - - tmp = RWSEM_ACTIVE_WRITE_BIAS; - __asm__ __volatile__( - "# beginning down_write\n\t" -LOCK_PREFIX " xaddl %0,(%%rdi)\n\t" /* subtract 0x0000ffff, returns the old value */ - " testl %0,%0\n\t" /* was the count 0 before? */ - " jnz 2f\n\t" /* jump if we weren't granted the lock */ - "1:\n\t" - LOCK_SECTION_START("") - "2:\n\t" - " call rwsem_down_write_failed_thunk\n\t" - " jmp 1b\n" - LOCK_SECTION_END - "# ending down_write" - : "=&r" (tmp) - : "0"(tmp), "D"(sem) - : "memory", "cc"); -} - -/* - * trylock for writing -- returns 1 if successful, 0 if contention - */ -static inline int __down_write_trylock(struct rw_semaphore *sem) -{ - signed long ret = cmpxchg(&sem->count, - RWSEM_UNLOCKED_VALUE, - RWSEM_ACTIVE_WRITE_BIAS); - if (ret == RWSEM_UNLOCKED_VALUE) - return 1; - return 0; -} - -/* - * unlock after reading - */ -static inline void __up_read(struct rw_semaphore *sem) -{ - __s32 tmp = -RWSEM_ACTIVE_READ_BIAS; - __asm__ __volatile__( - "# beginning __up_read\n\t" -LOCK_PREFIX " xaddl %[tmp],(%%rdi)\n\t" /* subtracts 1, returns the old value */ - " js 2f\n\t" /* jump if the lock is being waited upon */ - "1:\n\t" - LOCK_SECTION_START("") - "2:\n\t" - " decw %w[tmp]\n\t" /* do nothing if still outstanding active readers */ - " jnz 1b\n\t" - " call rwsem_wake_thunk\n\t" - " jmp 1b\n" - LOCK_SECTION_END - "# ending __up_read\n" - : "+m"(sem->count), [tmp] "+r" (tmp) - : "D"(sem) - : "memory", "cc"); -} - -/* - * unlock after writing - */ -static inline void __up_write(struct rw_semaphore *sem) -{ - unsigned tmp; - __asm__ __volatile__( - "# beginning __up_write\n\t" - " movl %[bias],%[tmp]\n\t" -LOCK_PREFIX " xaddl %[tmp],(%%rdi)\n\t" /* tries to transition 0xffff0001 -> 0x00000000 */ - " jnz 2f\n\t" /* jump if the lock is being waited upon */ - "1:\n\t" - LOCK_SECTION_START("") - "2:\n\t" - " decw %w[tmp]\n\t" /* did the active count reduce to 0? */ - " jnz 1b\n\t" /* jump back if not */ - " call rwsem_wake_thunk\n\t" - " jmp 1b\n" - LOCK_SECTION_END - "# ending __up_write\n" - : "+m"(sem->count), [tmp] "=r" (tmp) - : "D"(sem), [bias] "i"(-RWSEM_ACTIVE_WRITE_BIAS) - : "memory", "cc"); -} - -/* - * downgrade write lock to read lock - */ -static inline void __downgrade_write(struct rw_semaphore *sem) -{ - __asm__ __volatile__( - "# beginning __downgrade_write\n\t" -LOCK_PREFIX " addl %[bias],(%%rdi)\n\t" /* transitions 0xZZZZ0001 -> 0xYYYY0001 */ - " js 2f\n\t" /* jump if the lock is being waited upon */ - "1:\n\t" - LOCK_SECTION_START("") - "2:\n\t" - " call rwsem_downgrade_thunk\n" - " jmp 1b\n" - LOCK_SECTION_END - "# ending __downgrade_write\n" - : "=m"(sem->count) - : "D"(sem), [bias] "i"(-RWSEM_WAITING_BIAS), "m"(sem->count) - : "memory", "cc"); -} - -/* - * implement atomic add functionality - */ -static inline void rwsem_atomic_add(int delta, struct rw_semaphore *sem) -{ - __asm__ __volatile__( -LOCK_PREFIX "addl %1,%0" - :"=m"(sem->count) - :"ir"(delta), "m"(sem->count)); -} - -/* - * implement exchange and add functionality - */ -static inline int rwsem_atomic_update(int delta, struct rw_semaphore *sem) -{ - int tmp = delta; - - __asm__ __volatile__( -LOCK_PREFIX "xaddl %0,(%2)" - : "=r"(tmp), "=m"(sem->count) - : "r"(sem), "m"(sem->count), "0" (tmp) - : "memory"); - - return tmp+delta; -} - -#endif /* __KERNEL__ */ -#endif /* _X8664_RWSEM_H */ diff --git a/include/asm-x86_64/semaphore.h b/include/asm-x86_64/semaphore.h index f325e39bf3b9..a389aa6fe80f 100644 --- a/include/asm-x86_64/semaphore.h +++ b/include/asm-x86_64/semaphore.h @@ -56,9 +56,6 @@ struct semaphore { .wait = __WAIT_QUEUE_HEAD_INITIALIZER((name).wait) \ } -#define __MUTEX_INITIALIZER(name) \ - __SEMAPHORE_INITIALIZER(name,1) - #define __DECLARE_SEMAPHORE_GENERIC(name,count) \ struct semaphore name = __SEMAPHORE_INITIALIZER(name,count) diff --git a/include/asm-x86_64/smp.h b/include/asm-x86_64/smp.h index 24e32611f0bf..d030409a8fb5 100644 --- a/include/asm-x86_64/smp.h +++ b/include/asm-x86_64/smp.h @@ -47,7 +47,6 @@ extern void lock_ipi_call_lock(void); extern void unlock_ipi_call_lock(void); extern int smp_num_siblings; extern void smp_send_reschedule(int cpu); -extern void zap_low_mappings(void); void smp_stop_cpu(void); extern int smp_call_function_single(int cpuid, void (*func) (void *info), void *info, int retry, int wait); @@ -81,6 +80,9 @@ static inline int hard_smp_processor_id(void) extern int safe_smp_processor_id(void); extern int __cpu_disable(void); extern void __cpu_die(unsigned int cpu); +extern void prefill_possible_map(void); +extern unsigned num_processors; +extern unsigned disabled_cpus; #endif /* !ASSEMBLY */ @@ -134,5 +136,11 @@ static __inline int logical_smp_processor_id(void) } #endif +#ifdef CONFIG_SMP +#define cpu_physical_id(cpu) x86_cpu_to_apicid[cpu] +#else +#define cpu_physical_id(cpu) boot_cpu_id +#endif + #endif diff --git a/include/asm-x86_64/spinlock.h b/include/asm-x86_64/spinlock.h index 69636831ad2f..fe484a699cc3 100644 --- a/include/asm-x86_64/spinlock.h +++ b/include/asm-x86_64/spinlock.h @@ -18,22 +18,22 @@ */ #define __raw_spin_is_locked(x) \ - (*(volatile signed char *)(&(x)->slock) <= 0) + (*(volatile signed int *)(&(x)->slock) <= 0) #define __raw_spin_lock_string \ "\n1:\t" \ - "lock ; decb %0\n\t" \ + "lock ; decl %0\n\t" \ "js 2f\n" \ LOCK_SECTION_START("") \ "2:\t" \ "rep;nop\n\t" \ - "cmpb $0,%0\n\t" \ + "cmpl $0,%0\n\t" \ "jle 2b\n\t" \ "jmp 1b\n" \ LOCK_SECTION_END #define __raw_spin_unlock_string \ - "movb $1,%0" \ + "movl $1,%0" \ :"=m" (lock->slock) : : "memory" static inline void __raw_spin_lock(raw_spinlock_t *lock) @@ -47,10 +47,10 @@ static inline void __raw_spin_lock(raw_spinlock_t *lock) static inline int __raw_spin_trylock(raw_spinlock_t *lock) { - char oldval; + int oldval; __asm__ __volatile__( - "xchgb %b0,%1" + "xchgl %0,%1" :"=q" (oldval), "=m" (lock->slock) :"0" (0) : "memory"); diff --git a/include/asm-x86_64/swiotlb.h b/include/asm-x86_64/swiotlb.h index 36293061f4ed..dddf1b218681 100644 --- a/include/asm-x86_64/swiotlb.h +++ b/include/asm-x86_64/swiotlb.h @@ -15,6 +15,14 @@ extern void swiotlb_sync_single_for_cpu(struct device *hwdev, extern void swiotlb_sync_single_for_device(struct device *hwdev, dma_addr_t dev_addr, size_t size, int dir); +extern void swiotlb_sync_single_range_for_cpu(struct device *hwdev, + dma_addr_t dev_addr, + unsigned long offset, + size_t size, int dir); +extern void swiotlb_sync_single_range_for_device(struct device *hwdev, + dma_addr_t dev_addr, + unsigned long offset, + size_t size, int dir); extern void swiotlb_sync_sg_for_cpu(struct device *hwdev, struct scatterlist *sg, int nelems, int dir); @@ -27,7 +35,7 @@ extern void swiotlb_unmap_sg(struct device *hwdev, struct scatterlist *sg, int nents, int direction); extern int swiotlb_dma_mapping_error(dma_addr_t dma_addr); extern void *swiotlb_alloc_coherent (struct device *hwdev, size_t size, - dma_addr_t *dma_handle, int flags); + dma_addr_t *dma_handle, gfp_t flags); extern void swiotlb_free_coherent (struct device *hwdev, size_t size, void *vaddr, dma_addr_t dma_handle); diff --git a/include/asm-x86_64/topology.h b/include/asm-x86_64/topology.h index 1c603cd7e4d0..d39ebd5263ed 100644 --- a/include/asm-x86_64/topology.h +++ b/include/asm-x86_64/topology.h @@ -28,6 +28,8 @@ extern int __node_distance(int, int); #define pcibus_to_node(bus) ((long)(bus->sysdata)) #define pcibus_to_cpumask(bus) node_to_cpumask(pcibus_to_node(bus)); +#define numa_node_id() read_pda(nodenumber) + /* sched_domains SD_NODE_INIT for x86_64 machines */ #define SD_NODE_INIT (struct sched_domain) { \ .span = CPU_MASK_NONE, \ diff --git a/include/asm-x86_64/unistd.h b/include/asm-x86_64/unistd.h index 11ba931cf82f..2c42150bce0c 100644 --- a/include/asm-x86_64/unistd.h +++ b/include/asm-x86_64/unistd.h @@ -462,7 +462,7 @@ __SYSCALL(__NR_fremovexattr, sys_fremovexattr) #define __NR_tkill 200 __SYSCALL(__NR_tkill, sys_tkill) #define __NR_time 201 -__SYSCALL(__NR_time, sys_time64) +__SYSCALL(__NR_time, sys_time) #define __NR_futex 202 __SYSCALL(__NR_futex, sys_futex) #define __NR_sched_setaffinity 203 @@ -608,6 +608,7 @@ do { \ #define __ARCH_WANT_SYS_SIGPENDING #define __ARCH_WANT_SYS_SIGPROCMASK #define __ARCH_WANT_SYS_RT_SIGACTION +#define __ARCH_WANT_SYS_TIME #define __ARCH_WANT_COMPAT_SYS_TIME #endif @@ -780,8 +781,6 @@ asmlinkage long sys_pipe(int *fildes); #include <linux/types.h> #include <asm/ptrace.h> -asmlinkage long sys_ptrace(long request, long pid, - unsigned long addr, long data); asmlinkage long sys_iopl(unsigned int level, struct pt_regs *regs); asmlinkage long sys_ioperm(unsigned long from, unsigned long num, int turn_on); struct sigaction; diff --git a/include/asm-xtensa/atomic.h b/include/asm-xtensa/atomic.h index 24f86f0e43cf..3670cc7695da 100644 --- a/include/asm-xtensa/atomic.h +++ b/include/asm-xtensa/atomic.h @@ -22,7 +22,7 @@ typedef struct { volatile int counter; } atomic_t; #include <asm/processor.h> #include <asm/system.h> -#define ATOMIC_INIT(i) ( (atomic_t) { (i) } ) +#define ATOMIC_INIT(i) { (i) } /* * This Xtensa implementation assumes that the right mechanism @@ -223,6 +223,26 @@ static inline int atomic_sub_return(int i, atomic_t * v) */ #define atomic_add_negative(i,v) (atomic_add_return((i),(v)) < 0) +#define atomic_cmpxchg(v, o, n) ((int)cmpxchg(&((v)->counter), (o), (n))) + +/** + * atomic_add_unless - add unless the number is a given value + * @v: pointer of type atomic_t + * @a: the amount to add to v... + * @u: ...unless v is equal to u. + * + * Atomically adds @a to @v, so long as it was not @u. + * Returns non-zero if @v was not @u, and zero otherwise. + */ +#define atomic_add_unless(v, a, u) \ +({ \ + int c, old; \ + c = atomic_read(v); \ + while (c != (u) && (old = atomic_cmpxchg((v), c, c + (a))) != c) \ + c = old; \ + c != (u); \ +}) +#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0) static inline void atomic_clear_mask(unsigned int mask, atomic_t *v) { diff --git a/include/asm-xtensa/bitops.h b/include/asm-xtensa/bitops.h index d395ef226c32..e76ee889e21d 100644 --- a/include/asm-xtensa/bitops.h +++ b/include/asm-xtensa/bitops.h @@ -174,7 +174,7 @@ static __inline__ int test_bit(int nr, const volatile void *addr) return 1UL & (((const volatile unsigned int *)addr)[nr>>5] >> (nr&31)); } -#if XCHAL_HAVE_NSAU +#if XCHAL_HAVE_NSA static __inline__ int __cntlz (unsigned long x) { diff --git a/include/asm-xtensa/dma-mapping.h b/include/asm-xtensa/dma-mapping.h index e86a206f1209..c425f10d086a 100644 --- a/include/asm-xtensa/dma-mapping.h +++ b/include/asm-xtensa/dma-mapping.h @@ -28,7 +28,7 @@ extern void consistent_sync(void*, size_t, int); #define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h) void *dma_alloc_coherent(struct device *dev, size_t size, - dma_addr_t *dma_handle, int flag); + dma_addr_t *dma_handle, gfp_t flag); void dma_free_coherent(struct device *dev, size_t size, void *vaddr, dma_addr_t dma_handle); diff --git a/include/asm-xtensa/elf.h b/include/asm-xtensa/elf.h index 64f1f53874fe..de0667453b2e 100644 --- a/include/asm-xtensa/elf.h +++ b/include/asm-xtensa/elf.h @@ -209,6 +209,8 @@ extern void xtensa_elf_core_copy_regs (xtensa_gregset_t *, struct pt_regs *); #define SET_PERSONALITY(ex, ibcs2) set_personality(PER_LINUX_32BIT) +struct task_struct; + extern void do_copy_regs (xtensa_gregset_t*, struct pt_regs*, struct task_struct*); extern void do_restore_regs (xtensa_gregset_t*, struct pt_regs*, diff --git a/include/asm-xtensa/hardirq.h b/include/asm-xtensa/hardirq.h index e07c76c36b95..aa9c1adf68d7 100644 --- a/include/asm-xtensa/hardirq.h +++ b/include/asm-xtensa/hardirq.h @@ -23,6 +23,7 @@ typedef struct { unsigned int __nmi_count; /* arch dependent */ } ____cacheline_aligned irq_cpustat_t; +void ack_bad_irq(unsigned int irq); #include <linux/irq_cpustat.h> /* Standard mappings for irq_cpustat_t above */ #endif /* _XTENSA_HARDIRQ_H */ diff --git a/include/asm-xtensa/pgtable.h b/include/asm-xtensa/pgtable.h index 987e3b802313..7b15afb70c56 100644 --- a/include/asm-xtensa/pgtable.h +++ b/include/asm-xtensa/pgtable.h @@ -278,6 +278,8 @@ static inline void update_pte(pte_t *ptep, pte_t pteval) #endif } +struct mm_struct; + static inline void set_pte_at(struct mm_struct *mm, unsigned long addr, pte_t *ptep, pte_t pteval) { @@ -294,6 +296,7 @@ set_pmd(pmd_t *pmdp, pmd_t pmdval) #endif } +struct vm_area_struct; static inline int ptep_test_and_clear_young(struct vm_area_struct *vma, unsigned long addr, diff --git a/include/asm-xtensa/semaphore.h b/include/asm-xtensa/semaphore.h index db740b8bc6f0..f10c3487cd4c 100644 --- a/include/asm-xtensa/semaphore.h +++ b/include/asm-xtensa/semaphore.h @@ -20,28 +20,16 @@ struct semaphore { atomic_t count; int sleepers; wait_queue_head_t wait; -#if WAITQUEUE_DEBUG - long __magic; -#endif }; -#if WAITQUEUE_DEBUG -# define __SEM_DEBUG_INIT(name) \ - , (int)&(name).__magic -#else -# define __SEM_DEBUG_INIT(name) -#endif - -#define __SEMAPHORE_INITIALIZER(name,count) \ - { ATOMIC_INIT(count), \ - 0, \ - __WAIT_QUEUE_HEAD_INITIALIZER((name).wait) \ - __SEM_DEBUG_INIT(name) } - -#define __MUTEX_INITIALIZER(name) \ - __SEMAPHORE_INITIALIZER(name, 1) +#define __SEMAPHORE_INITIALIZER(name,n) \ +{ \ + .count = ATOMIC_INIT(n), \ + .sleepers = 0, \ + .wait = __WAIT_QUEUE_HEAD_INITIALIZER((name).wait) \ +} -#define __DECLARE_SEMAPHORE_GENERIC(name,count) \ +#define __DECLARE_SEMAPHORE_GENERIC(name,count) \ struct semaphore name = __SEMAPHORE_INITIALIZER(name,count) #define DECLARE_MUTEX(name) __DECLARE_SEMAPHORE_GENERIC(name,1) @@ -49,17 +37,9 @@ struct semaphore { static inline void sema_init (struct semaphore *sem, int val) { -/* - * *sem = (struct semaphore)__SEMAPHORE_INITIALIZER((*sem),val); - * - * i'd rather use the more flexible initialization above, but sadly - * GCC 2.7.2.3 emits a bogus warning. EGCS doesnt. Oh well. - */ atomic_set(&sem->count, val); + sem->sleepers = 0; init_waitqueue_head(&sem->wait); -#if WAITQUEUE_DEBUG - sem->__magic = (int)&sem->__magic; -#endif } static inline void init_MUTEX (struct semaphore *sem) @@ -81,9 +61,7 @@ extern spinlock_t semaphore_wake_lock; static inline void down(struct semaphore * sem) { -#if WAITQUEUE_DEBUG - CHECK_MAGIC(sem->__magic); -#endif + might_sleep(); if (atomic_sub_return(1, &sem->count) < 0) __down(sem); @@ -92,9 +70,8 @@ static inline void down(struct semaphore * sem) static inline int down_interruptible(struct semaphore * sem) { int ret = 0; -#if WAITQUEUE_DEBUG - CHECK_MAGIC(sem->__magic); -#endif + + might_sleep(); if (atomic_sub_return(1, &sem->count) < 0) ret = __down_interruptible(sem); @@ -104,9 +81,6 @@ static inline int down_interruptible(struct semaphore * sem) static inline int down_trylock(struct semaphore * sem) { int ret = 0; -#if WAITQUEUE_DEBUG - CHECK_MAGIC(sem->__magic); -#endif if (atomic_sub_return(1, &sem->count) < 0) ret = __down_trylock(sem); @@ -119,9 +93,6 @@ static inline int down_trylock(struct semaphore * sem) */ static inline void up(struct semaphore * sem) { -#if WAITQUEUE_DEBUG - CHECK_MAGIC(sem->__magic); -#endif if (atomic_add_return(1, &sem->count) <= 0) __up(sem); } diff --git a/include/asm-xtensa/system.h b/include/asm-xtensa/system.h index f09393232e5e..9284867f1cb9 100644 --- a/include/asm-xtensa/system.h +++ b/include/asm-xtensa/system.h @@ -189,20 +189,6 @@ static inline unsigned long xchg_u32(volatile int * m, unsigned long val) #define tas(ptr) (xchg((ptr),1)) -#if ( __XCC__ == 1 ) - -/* xt-xcc processes __inline__ differently than xt-gcc and decides to - * insert an out-of-line copy of function __xchg. This presents the - * unresolved symbol at link time of __xchg_called_with_bad_pointer, - * even though such a function would never be called at run-time. - * xt-gcc always inlines __xchg, and optimizes away the undefined - * bad_pointer function. - */ - -#define xchg(ptr,x) xchg_u32(ptr,x) - -#else /* assume xt-gcc */ - #define xchg(ptr,x) ((__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr)))) /* @@ -224,8 +210,6 @@ __xchg(unsigned long x, volatile void * ptr, int size) return x; } -#endif - extern void set_except_vector(int n, void *addr); static inline void spill_registers(void) diff --git a/include/keys/user-type.h b/include/keys/user-type.h new file mode 100644 index 000000000000..26f6ec38577a --- /dev/null +++ b/include/keys/user-type.h @@ -0,0 +1,47 @@ +/* user-type.h: User-defined key type + * + * Copyright (C) 2005 Red Hat, Inc. All Rights Reserved. + * Written by David Howells (dhowells@redhat.com) + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version + * 2 of the License, or (at your option) any later version. + */ + +#ifndef _KEYS_USER_TYPE_H +#define _KEYS_USER_TYPE_H + +#include <linux/key.h> +#include <linux/rcupdate.h> + +/*****************************************************************************/ +/* + * the payload for a key of type "user" + * - once filled in and attached to a key: + * - the payload struct is invariant may not be changed, only replaced + * - the payload must be read with RCU procedures or with the key semaphore + * held + * - the payload may only be replaced with the key semaphore write-locked + * - the key's data length is the size of the actual data, not including the + * payload wrapper + */ +struct user_key_payload { + struct rcu_head rcu; /* RCU destructor */ + unsigned short datalen; /* length of this data */ + char data[0]; /* actual data */ +}; + +extern struct key_type key_type_user; + +extern int user_instantiate(struct key *key, const void *data, size_t datalen); +extern int user_duplicate(struct key *key, const struct key *source); +extern int user_update(struct key *key, const void *data, size_t datalen); +extern int user_match(const struct key *key, const void *criterion); +extern void user_destroy(struct key *key); +extern void user_describe(const struct key *user, struct seq_file *m); +extern long user_read(const struct key *key, + char __user *buffer, size_t buflen); + + +#endif /* _KEYS_USER_TYPE_H */ diff --git a/include/linux/acct.h b/include/linux/acct.h index 1993a3691768..9a66401073fc 100644 --- a/include/linux/acct.h +++ b/include/linux/acct.h @@ -16,6 +16,8 @@ #define _LINUX_ACCT_H #include <linux/types.h> +#include <linux/jiffies.h> + #include <asm/param.h> #include <asm/byteorder.h> @@ -117,12 +119,15 @@ struct acct_v3 #include <linux/config.h> #ifdef CONFIG_BSD_PROCESS_ACCT +struct vfsmount; struct super_block; +extern void acct_auto_close_mnt(struct vfsmount *m); extern void acct_auto_close(struct super_block *sb); extern void acct_process(long exitcode); extern void acct_update_integrals(struct task_struct *tsk); extern void acct_clear_integrals(struct task_struct *tsk); #else +#define acct_auto_close_mnt(x) do { } while (0) #define acct_auto_close(x) do { } while (0) #define acct_process(x) do { } while (0) #define acct_update_integrals(x) do { } while (0) @@ -162,13 +167,13 @@ typedef struct acct acct_t; #ifdef __KERNEL__ /* * Yet another set of HZ to *HZ helper functions. - * See <linux/times.h> for the original. + * See <linux/jiffies.h> for the original. */ static inline u32 jiffies_to_AHZ(unsigned long x) { #if (TICK_NSEC % (NSEC_PER_SEC / AHZ)) == 0 - return x / (HZ / USER_HZ); + return x / (HZ / AHZ); #else u64 tmp = (u64)x * TICK_NSEC; do_div(tmp, (NSEC_PER_SEC / AHZ)); diff --git a/include/linux/aio.h b/include/linux/aio.h index a4d5af907f90..49fd37629ee4 100644 --- a/include/linux/aio.h +++ b/include/linux/aio.h @@ -24,7 +24,12 @@ struct kioctx; #define KIOCB_SYNC_KEY (~0U) /* ki_flags bits */ -#define KIF_LOCKED 0 +/* + * This may be used for cancel/retry serialization in the future, but + * for now it's unused and we probably don't want modules to even + * think they can use it. + */ +/* #define KIF_LOCKED 0 */ #define KIF_KICKED 1 #define KIF_CANCELLED 2 @@ -43,6 +48,40 @@ struct kioctx; #define kiocbIsKicked(iocb) test_bit(KIF_KICKED, &(iocb)->ki_flags) #define kiocbIsCancelled(iocb) test_bit(KIF_CANCELLED, &(iocb)->ki_flags) +/* is there a better place to document function pointer methods? */ +/** + * ki_retry - iocb forward progress callback + * @kiocb: The kiocb struct to advance by performing an operation. + * + * This callback is called when the AIO core wants a given AIO operation + * to make forward progress. The kiocb argument describes the operation + * that is to be performed. As the operation proceeds, perhaps partially, + * ki_retry is expected to update the kiocb with progress made. Typically + * ki_retry is set in the AIO core and it itself calls file_operations + * helpers. + * + * ki_retry's return value determines when the AIO operation is completed + * and an event is generated in the AIO event ring. Except the special + * return values described below, the value that is returned from ki_retry + * is transferred directly into the completion ring as the operation's + * resulting status. Once this has happened ki_retry *MUST NOT* reference + * the kiocb pointer again. + * + * If ki_retry returns -EIOCBQUEUED it has made a promise that aio_complete() + * will be called on the kiocb pointer in the future. The AIO core will + * not ask the method again -- ki_retry must ensure forward progress. + * aio_complete() must be called once and only once in the future, multiple + * calls may result in undefined behaviour. + * + * If ki_retry returns -EIOCBRETRY it has made a promise that kick_iocb() + * will be called on the kiocb pointer in the future. This may happen + * through generic helpers that associate kiocb->ki_wait with a wait + * queue head that ki_retry uses via current->io_wait. It can also happen + * with custom tracking and manual calls to kick_iocb(), though that is + * discouraged. In either case, kick_iocb() must be called once and only + * once. ki_retry must ensure forward progress, the AIO core will wait + * indefinitely for kick_iocb() to be called. + */ struct kiocb { struct list_head ki_run_list; long ki_flags; @@ -85,7 +124,7 @@ struct kiocb { (x)->ki_users = 1; \ (x)->ki_key = KIOCB_SYNC_KEY; \ (x)->ki_filp = (filp); \ - (x)->ki_ctx = &tsk->active_mm->default_kioctx; \ + (x)->ki_ctx = NULL; \ (x)->ki_cancel = NULL; \ (x)->ki_dtor = NULL; \ (x)->ki_obj.tsk = tsk; \ @@ -144,6 +183,7 @@ struct kioctx { struct list_head active_reqs; /* used for cancellation */ struct list_head run_list; /* used for kicked reqs */ + /* sys_io_setup currently limits this to an unsigned int */ unsigned max_reqs; struct aio_ring_info ring_info; @@ -170,8 +210,15 @@ struct kioctx *lookup_ioctx(unsigned long ctx_id); int FASTCALL(io_submit_one(struct kioctx *ctx, struct iocb __user *user_iocb, struct iocb *iocb)); -#define get_ioctx(kioctx) do { if (unlikely(atomic_read(&(kioctx)->users) <= 0)) BUG(); atomic_inc(&(kioctx)->users); } while (0) -#define put_ioctx(kioctx) do { if (unlikely(atomic_dec_and_test(&(kioctx)->users))) __put_ioctx(kioctx); else if (unlikely(atomic_read(&(kioctx)->users) < 0)) BUG(); } while (0) +#define get_ioctx(kioctx) do { \ + BUG_ON(unlikely(atomic_read(&(kioctx)->users) <= 0)); \ + atomic_inc(&(kioctx)->users); \ +} while (0) +#define put_ioctx(kioctx) do { \ + BUG_ON(unlikely(atomic_read(&(kioctx)->users) <= 0)); \ + if (unlikely(atomic_dec_and_test(&(kioctx)->users))) \ + __put_ioctx(kioctx); \ +} while (0) #define in_aio() !is_sync_wait(current->io_wait) /* may be used for debugging */ @@ -195,7 +242,7 @@ static inline struct kiocb *list_kiocb(struct list_head *h) } /* for sysctl: */ -extern atomic_t aio_nr; -extern unsigned aio_max_nr; +extern unsigned long aio_nr; +extern unsigned long aio_max_nr; #endif /* __LINUX__AIO_H */ diff --git a/include/linux/ata.h b/include/linux/ata.h index a5b74efab067..d2873b732bb1 100644 --- a/include/linux/ata.h +++ b/include/linux/ata.h @@ -42,13 +42,18 @@ enum { ATA_SECT_SIZE = 512, ATA_ID_WORDS = 256, - ATA_ID_PROD_OFS = 27, - ATA_ID_FW_REV_OFS = 23, ATA_ID_SERNO_OFS = 10, - ATA_ID_MAJOR_VER = 80, - ATA_ID_PIO_MODES = 64, + ATA_ID_FW_REV_OFS = 23, + ATA_ID_PROD_OFS = 27, + ATA_ID_OLD_PIO_MODES = 51, + ATA_ID_FIELD_VALID = 53, ATA_ID_MWDMA_MODES = 63, + ATA_ID_PIO_MODES = 64, + ATA_ID_EIDE_DMA_MIN = 65, + ATA_ID_EIDE_PIO = 67, + ATA_ID_EIDE_PIO_IORDY = 68, ATA_ID_UDMA_MODES = 88, + ATA_ID_MAJOR_VER = 80, ATA_ID_PIO4 = (1 << 1), ATA_PCI_CTL_OFS = 2, @@ -128,10 +133,15 @@ enum { ATA_CMD_PIO_READ_EXT = 0x24, ATA_CMD_PIO_WRITE = 0x30, ATA_CMD_PIO_WRITE_EXT = 0x34, + ATA_CMD_READ_MULTI = 0xC4, + ATA_CMD_READ_MULTI_EXT = 0x29, + ATA_CMD_WRITE_MULTI = 0xC5, + ATA_CMD_WRITE_MULTI_EXT = 0x39, ATA_CMD_SET_FEATURES = 0xEF, ATA_CMD_PACKET = 0xA0, ATA_CMD_VERIFY = 0x40, ATA_CMD_VERIFY_EXT = 0x42, + ATA_CMD_INIT_DEV_PARAMS = 0x91, /* SETFEATURES stuff */ SETFEATURES_XFER = 0x03, @@ -146,14 +156,14 @@ enum { XFER_MW_DMA_2 = 0x22, XFER_MW_DMA_1 = 0x21, XFER_MW_DMA_0 = 0x20, + XFER_SW_DMA_2 = 0x12, + XFER_SW_DMA_1 = 0x11, + XFER_SW_DMA_0 = 0x10, XFER_PIO_4 = 0x0C, XFER_PIO_3 = 0x0B, XFER_PIO_2 = 0x0A, XFER_PIO_1 = 0x09, XFER_PIO_0 = 0x08, - XFER_SW_DMA_2 = 0x12, - XFER_SW_DMA_1 = 0x11, - XFER_SW_DMA_0 = 0x10, XFER_PIO_SLOW = 0x00, /* ATAPI stuff */ @@ -181,6 +191,7 @@ enum { ATA_TFLAG_ISADDR = (1 << 1), /* enable r/w to nsect/lba regs */ ATA_TFLAG_DEVICE = (1 << 2), /* enable r/w to device reg */ ATA_TFLAG_WRITE = (1 << 3), /* data dir: host->dev==1 (write) */ + ATA_TFLAG_LBA = (1 << 4), /* enable LBA */ }; enum ata_tf_protocols { @@ -250,7 +261,19 @@ struct ata_taskfile { ((u64) (id)[(n) + 1] << 16) | \ ((u64) (id)[(n) + 0]) ) -static inline int atapi_cdb_len(u16 *dev_id) +static inline int ata_id_current_chs_valid(const u16 *id) +{ + /* For ATA-1 devices, if the INITIALIZE DEVICE PARAMETERS command + has not been issued to the device then the values of + id[54] to id[56] are vendor specific. */ + return (id[53] & 0x01) && /* Current translation valid */ + id[54] && /* cylinders in current translation */ + id[55] && /* heads in current translation */ + id[55] <= 16 && + id[56]; /* sectors in current translation */ +} + +static inline int atapi_cdb_len(const u16 *dev_id) { u16 tmp = dev_id[0] & 0x3; switch (tmp) { @@ -260,7 +283,7 @@ static inline int atapi_cdb_len(u16 *dev_id) } } -static inline int is_atapi_taskfile(struct ata_taskfile *tf) +static inline int is_atapi_taskfile(const struct ata_taskfile *tf) { return (tf->protocol == ATA_PROT_ATAPI) || (tf->protocol == ATA_PROT_ATAPI_NODATA) || diff --git a/include/linux/atmdev.h b/include/linux/atmdev.h index 9f374cfa1b05..b203ea82a0a8 100644 --- a/include/linux/atmdev.h +++ b/include/linux/atmdev.h @@ -7,7 +7,6 @@ #define LINUX_ATMDEV_H -#include <linux/config.h> #include <linux/atmapi.h> #include <linux/atm.h> #include <linux/atmioc.h> @@ -76,6 +75,13 @@ struct atm_dev_stats { /* set interface ESI */ #define ATM_SETESIF _IOW('a',ATMIOC_ITF+13,struct atmif_sioc) /* force interface ESI */ +#define ATM_ADDLECSADDR _IOW('a', ATMIOC_ITF+14, struct atmif_sioc) + /* register a LECS address */ +#define ATM_DELLECSADDR _IOW('a', ATMIOC_ITF+15, struct atmif_sioc) + /* unregister a LECS address */ +#define ATM_GETLECSADDR _IOW('a', ATMIOC_ITF+16, struct atmif_sioc) + /* retrieve LECS address(es) */ + #define ATM_GETSTAT _IOW('a',ATMIOC_SARCOM+0,struct atmif_sioc) /* get AAL layer statistics */ #define ATM_GETSTATZ _IOW('a',ATMIOC_SARCOM+1,struct atmif_sioc) @@ -203,6 +209,7 @@ struct atm_cirange { #ifdef __KERNEL__ +#include <linux/config.h> #include <linux/wait.h> /* wait_queue_head_t */ #include <linux/time.h> /* struct timeval */ #include <linux/net.h> @@ -267,7 +274,7 @@ enum { enum { - ATM_DF_CLOSE, /* close device when last VCC is closed */ + ATM_DF_REMOVED, /* device was removed from atm_devs list */ }; @@ -328,6 +335,8 @@ struct atm_dev_addr { struct list_head entry; /* next address */ }; +enum atm_addr_type_t { ATM_ADDR_LOCAL, ATM_ADDR_LECS }; + struct atm_dev { const struct atmdev_ops *ops; /* device operations; NULL if unused */ const struct atmphy_ops *phy; /* PHY operations, may be undefined */ @@ -338,6 +347,7 @@ struct atm_dev { void *phy_data; /* private PHY date */ unsigned long flags; /* device flags (ATM_DF_*) */ struct list_head local; /* local ATM addresses */ + struct list_head lecs; /* LECS ATM addresses learned via ILMI */ unsigned char esi[ESI_LEN]; /* ESI ("MAC" addr) */ struct atm_cirange ci_range; /* VPI/VCI range */ struct k_atm_dev_stats stats; /* statistics */ @@ -405,7 +415,6 @@ struct atm_dev *atm_dev_register(const char *type,const struct atmdev_ops *ops, int number,unsigned long *flags); /* number == -1: pick first available */ struct atm_dev *atm_dev_lookup(int number); void atm_dev_deregister(struct atm_dev *dev); -void shutdown_atm_dev(struct atm_dev *dev); void vcc_insert_socket(struct sock *sk); @@ -447,18 +456,19 @@ static inline void atm_dev_hold(struct atm_dev *dev) static inline void atm_dev_put(struct atm_dev *dev) { - atomic_dec(&dev->refcnt); - - if ((atomic_read(&dev->refcnt) == 1) && - test_bit(ATM_DF_CLOSE,&dev->flags)) - shutdown_atm_dev(dev); + if (atomic_dec_and_test(&dev->refcnt)) { + BUG_ON(!test_bit(ATM_DF_REMOVED, &dev->flags)); + if (dev->ops->dev_close) + dev->ops->dev_close(dev); + kfree(dev); + } } int atm_charge(struct atm_vcc *vcc,int truesize); struct sk_buff *atm_alloc_charge(struct atm_vcc *vcc,int pdu_size, - int gfp_flags); -int atm_pcr_goal(struct atm_trafprm *tp); + gfp_t gfp_flags); +int atm_pcr_goal(const struct atm_trafprm *tp); void vcc_release_async(struct atm_vcc *vcc, int reply); diff --git a/include/linux/audit.h b/include/linux/audit.h index b2a2509bd7ea..da3c01955f3d 100644 --- a/include/linux/audit.h +++ b/include/linux/audit.h @@ -260,11 +260,11 @@ extern int audit_filter_user(struct netlink_skb_parms *cb, int type); #ifdef CONFIG_AUDIT /* These are defined in audit.c */ /* Public API */ -extern void audit_log(struct audit_context *ctx, int gfp_mask, +extern void audit_log(struct audit_context *ctx, gfp_t gfp_mask, int type, const char *fmt, ...) __attribute__((format(printf,4,5))); -extern struct audit_buffer *audit_log_start(struct audit_context *ctx, int gfp_mask, int type); +extern struct audit_buffer *audit_log_start(struct audit_context *ctx, gfp_t gfp_mask, int type); extern void audit_log_format(struct audit_buffer *ab, const char *fmt, ...) __attribute__((format(printf,2,3))); diff --git a/include/linux/bfs_fs.h b/include/linux/bfs_fs.h index c1237aa92e38..8ed6dfdcd783 100644 --- a/include/linux/bfs_fs.h +++ b/include/linux/bfs_fs.h @@ -20,19 +20,19 @@ /* BFS inode layout on disk */ struct bfs_inode { - __u16 i_ino; + __le16 i_ino; __u16 i_unused; - __u32 i_sblock; - __u32 i_eblock; - __u32 i_eoffset; - __u32 i_vtype; - __u32 i_mode; - __s32 i_uid; - __s32 i_gid; - __u32 i_nlink; - __u32 i_atime; - __u32 i_mtime; - __u32 i_ctime; + __le32 i_sblock; + __le32 i_eblock; + __le32 i_eoffset; + __le32 i_vtype; + __le32 i_mode; + __le32 i_uid; + __le32 i_gid; + __le32 i_nlink; + __le32 i_atime; + __le32 i_mtime; + __le32 i_ctime; __u32 i_padding[4]; }; @@ -41,17 +41,17 @@ struct bfs_inode { #define BFS_DIRS_PER_BLOCK 32 struct bfs_dirent { - __u16 ino; + __le16 ino; char name[BFS_NAMELEN]; }; /* BFS superblock layout on disk */ struct bfs_super_block { - __u32 s_magic; - __u32 s_start; - __u32 s_end; - __s32 s_from; - __s32 s_to; + __le32 s_magic; + __le32 s_start; + __le32 s_end; + __le32 s_from; + __le32 s_to; __s32 s_bfrom; __s32 s_bto; char s_fsname[6]; @@ -66,15 +66,15 @@ struct bfs_super_block { #define BFS_INO2OFF(ino) \ ((__u32)(((ino) - BFS_ROOT_INO) * sizeof(struct bfs_inode)) + BFS_BSIZE) #define BFS_NZFILESIZE(ip) \ - ((cpu_to_le32((ip)->i_eoffset) + 1) - cpu_to_le32((ip)->i_sblock) * BFS_BSIZE) + ((le32_to_cpu((ip)->i_eoffset) + 1) - le32_to_cpu((ip)->i_sblock) * BFS_BSIZE) #define BFS_FILESIZE(ip) \ ((ip)->i_sblock == 0 ? 0 : BFS_NZFILESIZE(ip)) #define BFS_FILEBLOCKS(ip) \ - ((ip)->i_sblock == 0 ? 0 : (cpu_to_le32((ip)->i_eblock) + 1) - cpu_to_le32((ip)->i_sblock)) + ((ip)->i_sblock == 0 ? 0 : (le32_to_cpu((ip)->i_eblock) + 1) - le32_to_cpu((ip)->i_sblock)) #define BFS_UNCLEAN(bfs_sb, sb) \ - ((cpu_to_le32(bfs_sb->s_from) != -1) && (cpu_to_le32(bfs_sb->s_to) != -1) && !(sb->s_flags & MS_RDONLY)) + ((le32_to_cpu(bfs_sb->s_from) != -1) && (le32_to_cpu(bfs_sb->s_to) != -1) && !(sb->s_flags & MS_RDONLY)) #endif /* _LINUX_BFS_FS_H */ diff --git a/include/linux/bio.h b/include/linux/bio.h index 6e1c79c8b6bf..685fd3720df5 100644 --- a/include/linux/bio.h +++ b/include/linux/bio.h @@ -276,8 +276,8 @@ extern void bio_pair_release(struct bio_pair *dbio); extern struct bio_set *bioset_create(int, int, int); extern void bioset_free(struct bio_set *); -extern struct bio *bio_alloc(unsigned int __nocast, int); -extern struct bio *bio_alloc_bioset(unsigned int __nocast, int, struct bio_set *); +extern struct bio *bio_alloc(gfp_t, int); +extern struct bio *bio_alloc_bioset(gfp_t, int, struct bio_set *); extern void bio_put(struct bio *); extern void bio_free(struct bio *, struct bio_set *); @@ -287,7 +287,7 @@ extern int bio_phys_segments(struct request_queue *, struct bio *); extern int bio_hw_segments(struct request_queue *, struct bio *); extern void __bio_clone(struct bio *, struct bio *); -extern struct bio *bio_clone(struct bio *, unsigned int __nocast); +extern struct bio *bio_clone(struct bio *, gfp_t); extern void bio_init(struct bio *); @@ -301,7 +301,7 @@ extern struct bio *bio_map_user_iov(struct request_queue *, struct sg_iovec *, int, int); extern void bio_unmap_user(struct bio *); extern struct bio *bio_map_kern(struct request_queue *, void *, unsigned int, - unsigned int); + gfp_t); extern void bio_set_pages_dirty(struct bio *bio); extern void bio_check_pages_dirty(struct bio *bio); extern struct bio *bio_copy_user(struct request_queue *, unsigned long, unsigned int, int); diff --git a/include/linux/bitmap.h b/include/linux/bitmap.h index 86dd5502b05c..7d8ff97b3e92 100644 --- a/include/linux/bitmap.h +++ b/include/linux/bitmap.h @@ -40,6 +40,8 @@ * bitmap_weight(src, nbits) Hamming Weight: number set bits * bitmap_shift_right(dst, src, n, nbits) *dst = *src >> n * bitmap_shift_left(dst, src, n, nbits) *dst = *src << n + * bitmap_remap(dst, src, old, new, nbits) *dst = map(old, new)(src) + * bitmap_bitremap(oldbit, old, new, nbits) newbit = map(old, new)(oldbit) * bitmap_scnprintf(buf, len, src, nbits) Print bitmap src to buf * bitmap_parse(ubuf, ulen, dst, nbits) Parse bitmap dst from user buf * bitmap_scnlistprintf(buf, len, src, nbits) Print bitmap src as list to buf @@ -104,6 +106,10 @@ extern int bitmap_scnlistprintf(char *buf, unsigned int len, const unsigned long *src, int nbits); extern int bitmap_parselist(const char *buf, unsigned long *maskp, int nmaskbits); +extern void bitmap_remap(unsigned long *dst, const unsigned long *src, + const unsigned long *old, const unsigned long *new, int bits); +extern int bitmap_bitremap(int oldbit, + const unsigned long *old, const unsigned long *new, int bits); extern int bitmap_find_free_region(unsigned long *bitmap, int bits, int order); extern void bitmap_release_region(unsigned long *bitmap, int pos, int order); extern int bitmap_allocate_region(unsigned long *bitmap, int pos, int order); diff --git a/include/linux/bitops.h b/include/linux/bitops.h index cb3c3ef50f50..38c2fb7ebe09 100644 --- a/include/linux/bitops.h +++ b/include/linux/bitops.h @@ -84,6 +84,16 @@ static __inline__ int get_bitmask_order(unsigned int count) return order; /* We could be slightly more clever with -1 here... */ } +static __inline__ int get_count_order(unsigned int count) +{ + int order; + + order = fls(count) - 1; + if (count & (count - 1)) + order++; + return order; +} + /* * hweightN: returns the hamming weight (i.e. the number * of bits set) of a N-bit word diff --git a/include/linux/blkdev.h b/include/linux/blkdev.h index efdc9b5bc05c..a33a31e71bbc 100644 --- a/include/linux/blkdev.h +++ b/include/linux/blkdev.h @@ -96,8 +96,8 @@ struct io_context { void put_io_context(struct io_context *ioc); void exit_io_context(void); -struct io_context *current_io_context(int gfp_flags); -struct io_context *get_io_context(int gfp_flags); +struct io_context *current_io_context(gfp_t gfp_flags); +struct io_context *get_io_context(gfp_t gfp_flags); void copy_io_context(struct io_context **pdst, struct io_context **psrc); void swap_io_context(struct io_context **ioc1, struct io_context **ioc2); @@ -107,9 +107,9 @@ typedef void (rq_end_io_fn)(struct request *); struct request_list { int count[2]; int starved[2]; + int elvpriv; mempool_t *rq_pool; wait_queue_head_t wait[2]; - wait_queue_head_t drain; }; #define BLK_MAX_CDB 16 @@ -203,6 +203,7 @@ struct request { enum rq_flag_bits { __REQ_RW, /* not set, read. set, write */ __REQ_FAILFAST, /* no low level driver retries */ + __REQ_SORTED, /* elevator knows about this request */ __REQ_SOFTBARRIER, /* may not be passed by ioscheduler */ __REQ_HARDBARRIER, /* may not be passed by drive either */ __REQ_CMD, /* is a regular fs rw request */ @@ -210,6 +211,7 @@ enum rq_flag_bits { __REQ_STARTED, /* drive already may have started this one */ __REQ_DONTPREP, /* don't call prep for this one */ __REQ_QUEUED, /* uses queueing */ + __REQ_ELVPRIV, /* elevator private data attached */ /* * for ATA/ATAPI devices */ @@ -235,6 +237,7 @@ enum rq_flag_bits { #define REQ_RW (1 << __REQ_RW) #define REQ_FAILFAST (1 << __REQ_FAILFAST) +#define REQ_SORTED (1 << __REQ_SORTED) #define REQ_SOFTBARRIER (1 << __REQ_SOFTBARRIER) #define REQ_HARDBARRIER (1 << __REQ_HARDBARRIER) #define REQ_CMD (1 << __REQ_CMD) @@ -242,6 +245,7 @@ enum rq_flag_bits { #define REQ_STARTED (1 << __REQ_STARTED) #define REQ_DONTPREP (1 << __REQ_DONTPREP) #define REQ_QUEUED (1 << __REQ_QUEUED) +#define REQ_ELVPRIV (1 << __REQ_ELVPRIV) #define REQ_PC (1 << __REQ_PC) #define REQ_BLOCK_PC (1 << __REQ_BLOCK_PC) #define REQ_SENSE (1 << __REQ_SENSE) @@ -333,6 +337,12 @@ struct request_queue end_flush_fn *end_flush_fn; /* + * Dispatch queue sorting + */ + sector_t end_sector; + struct request *boundary_rq; + + /* * Auto-unplugging state */ struct timer_list unplug_timer; @@ -354,7 +364,7 @@ struct request_queue * queue needs bounce pages for pages above this limit */ unsigned long bounce_pfn; - unsigned int bounce_gfp; + gfp_t bounce_gfp; /* * various queue flags, see QUEUE_* below @@ -396,6 +406,7 @@ struct request_queue atomic_t refcnt; + unsigned int nr_sorted; unsigned int in_flight; /* @@ -405,8 +416,6 @@ struct request_queue unsigned int sg_reserved_size; int node; - struct list_head drain_list; - /* * reserved for flush operations */ @@ -434,7 +443,7 @@ enum { #define QUEUE_FLAG_DEAD 5 /* queue being torn down */ #define QUEUE_FLAG_REENTER 6 /* Re-entrancy avoidance */ #define QUEUE_FLAG_PLUGGED 7 /* queue is plugged */ -#define QUEUE_FLAG_DRAIN 8 /* draining queue for sched switch */ +#define QUEUE_FLAG_ELVSWITCH 8 /* don't use elevator, just do FIFO */ #define QUEUE_FLAG_FLUSH 9 /* doing barrier flush sequence */ #define blk_queue_plugged(q) test_bit(QUEUE_FLAG_PLUGGED, &(q)->queue_flags) @@ -454,6 +463,7 @@ enum { #define blk_pm_request(rq) \ ((rq)->flags & (REQ_PM_SUSPEND | REQ_PM_RESUME)) +#define blk_sorted_rq(rq) ((rq)->flags & REQ_SORTED) #define blk_barrier_rq(rq) ((rq)->flags & REQ_HARDBARRIER) #define blk_barrier_preflush(rq) ((rq)->flags & REQ_BAR_PREFLUSH) #define blk_barrier_postflush(rq) ((rq)->flags & REQ_BAR_POSTFLUSH) @@ -550,7 +560,7 @@ extern void generic_make_request(struct bio *bio); extern void blk_put_request(struct request *); extern void blk_end_sync_rq(struct request *rq); extern void blk_attempt_remerge(request_queue_t *, struct request *); -extern struct request *blk_get_request(request_queue_t *, int, int); +extern struct request *blk_get_request(request_queue_t *, int, gfp_t); extern void blk_insert_request(request_queue_t *, struct request *, int, void *); extern void blk_requeue_request(request_queue_t *, struct request *); extern void blk_plug_device(request_queue_t *); @@ -565,7 +575,7 @@ extern void blk_run_queue(request_queue_t *); extern void blk_queue_activity_fn(request_queue_t *, activity_fn *, void *); extern int blk_rq_map_user(request_queue_t *, struct request *, void __user *, unsigned int); extern int blk_rq_unmap_user(struct bio *, unsigned int); -extern int blk_rq_map_kern(request_queue_t *, struct request *, void *, unsigned int, unsigned int); +extern int blk_rq_map_kern(request_queue_t *, struct request *, void *, unsigned int, gfp_t); extern int blk_rq_map_user_iov(request_queue_t *, struct request *, struct sg_iovec *, int); extern int blk_execute_rq(request_queue_t *, struct gendisk *, struct request *, int); @@ -611,12 +621,22 @@ extern void end_request(struct request *req, int uptodate); static inline void blkdev_dequeue_request(struct request *req) { - BUG_ON(list_empty(&req->queuelist)); + elv_dequeue_request(req->q, req); +} - list_del_init(&req->queuelist); +/* + * This should be in elevator.h, but that requires pulling in rq and q + */ +static inline void elv_dispatch_add_tail(struct request_queue *q, + struct request *rq) +{ + if (q->last_merge == rq) + q->last_merge = NULL; + q->nr_sorted--; - if (req->rl) - elv_remove_request(req->q, req); + q->end_sector = rq_end_sector(rq); + q->boundary_rq = rq; + list_add_tail(&rq->queuelist, &q->queue_head); } /* @@ -650,12 +670,10 @@ extern void blk_dump_rq_flags(struct request *, char *); extern void generic_unplug_device(request_queue_t *); extern void __generic_unplug_device(request_queue_t *); extern long nr_blockdev_pages(void); -extern void blk_wait_queue_drained(request_queue_t *, int); -extern void blk_finish_queue_drain(request_queue_t *); int blk_get_queue(request_queue_t *); -request_queue_t *blk_alloc_queue(int gfp_mask); -request_queue_t *blk_alloc_queue_node(int,int); +request_queue_t *blk_alloc_queue(gfp_t); +request_queue_t *blk_alloc_queue_node(gfp_t, int); #define blk_put_queue(q) blk_cleanup_queue((q)) /* diff --git a/include/linux/bootmem.h b/include/linux/bootmem.h index 82bd8842d11c..3b03b0b868dd 100644 --- a/include/linux/bootmem.h +++ b/include/linux/bootmem.h @@ -43,7 +43,7 @@ typedef struct bootmem_data { extern unsigned long __init bootmem_bootmap_pages (unsigned long); extern unsigned long __init init_bootmem (unsigned long addr, unsigned long memend); extern void __init free_bootmem (unsigned long addr, unsigned long size); -extern void * __init __alloc_bootmem (unsigned long size, unsigned long align, unsigned long goal); +extern void * __init __alloc_bootmem_limit (unsigned long size, unsigned long align, unsigned long goal, unsigned long limit); #ifndef CONFIG_HAVE_ARCH_BOOTMEM_NODE extern void __init reserve_bootmem (unsigned long addr, unsigned long size); #define alloc_bootmem(x) \ @@ -54,6 +54,16 @@ extern void __init reserve_bootmem (unsigned long addr, unsigned long size); __alloc_bootmem((x), PAGE_SIZE, __pa(MAX_DMA_ADDRESS)) #define alloc_bootmem_low_pages(x) \ __alloc_bootmem((x), PAGE_SIZE, 0) + +#define alloc_bootmem_limit(x, limit) \ + __alloc_bootmem_limit((x), SMP_CACHE_BYTES, __pa(MAX_DMA_ADDRESS), (limit)) +#define alloc_bootmem_low_limit(x, limit) \ + __alloc_bootmem_limit((x), SMP_CACHE_BYTES, 0, (limit)) +#define alloc_bootmem_pages_limit(x, limit) \ + __alloc_bootmem_limit((x), PAGE_SIZE, __pa(MAX_DMA_ADDRESS), (limit)) +#define alloc_bootmem_low_pages_limit(x, limit) \ + __alloc_bootmem_limit((x), PAGE_SIZE, 0, (limit)) + #endif /* !CONFIG_HAVE_ARCH_BOOTMEM_NODE */ extern unsigned long __init free_all_bootmem (void); @@ -61,7 +71,7 @@ extern unsigned long __init init_bootmem_node (pg_data_t *pgdat, unsigned long f extern void __init reserve_bootmem_node (pg_data_t *pgdat, unsigned long physaddr, unsigned long size); extern void __init free_bootmem_node (pg_data_t *pgdat, unsigned long addr, unsigned long size); extern unsigned long __init free_all_bootmem_node (pg_data_t *pgdat); -extern void * __init __alloc_bootmem_node (pg_data_t *pgdat, unsigned long size, unsigned long align, unsigned long goal); +extern void * __init __alloc_bootmem_node_limit (pg_data_t *pgdat, unsigned long size, unsigned long align, unsigned long goal, unsigned long limit); #ifndef CONFIG_HAVE_ARCH_BOOTMEM_NODE #define alloc_bootmem_node(pgdat, x) \ __alloc_bootmem_node((pgdat), (x), SMP_CACHE_BYTES, __pa(MAX_DMA_ADDRESS)) @@ -69,6 +79,14 @@ extern void * __init __alloc_bootmem_node (pg_data_t *pgdat, unsigned long size, __alloc_bootmem_node((pgdat), (x), PAGE_SIZE, __pa(MAX_DMA_ADDRESS)) #define alloc_bootmem_low_pages_node(pgdat, x) \ __alloc_bootmem_node((pgdat), (x), PAGE_SIZE, 0) + +#define alloc_bootmem_node_limit(pgdat, x, limit) \ + __alloc_bootmem_node_limit((pgdat), (x), SMP_CACHE_BYTES, __pa(MAX_DMA_ADDRESS), (limit)) +#define alloc_bootmem_pages_node_limit(pgdat, x, limit) \ + __alloc_bootmem_node_limit((pgdat), (x), PAGE_SIZE, __pa(MAX_DMA_ADDRESS), (limit)) +#define alloc_bootmem_low_pages_node_limit(pgdat, x, limit) \ + __alloc_bootmem_node_limit((pgdat), (x), PAGE_SIZE, 0, (limit)) + #endif /* !CONFIG_HAVE_ARCH_BOOTMEM_NODE */ #ifdef CONFIG_HAVE_ARCH_ALLOC_REMAP @@ -105,5 +123,15 @@ extern void *__init alloc_large_system_hash(const char *tablename, #endif extern int __initdata hashdist; /* Distribute hashes across NUMA nodes? */ +static inline void *__alloc_bootmem (unsigned long size, unsigned long align, unsigned long goal) +{ + return __alloc_bootmem_limit(size, align, goal, 0); +} + +static inline void *__alloc_bootmem_node (pg_data_t *pgdat, unsigned long size, unsigned long align, + unsigned long goal) +{ + return __alloc_bootmem_node_limit(pgdat, size, align, goal, 0); +} #endif /* _LINUX_BOOTMEM_H */ diff --git a/include/linux/buffer_head.h b/include/linux/buffer_head.h index 90828493791f..1db061bb6b08 100644 --- a/include/linux/buffer_head.h +++ b/include/linux/buffer_head.h @@ -126,8 +126,8 @@ BUFFER_FNS(Eopnotsupp, eopnotsupp) /* If we *know* page->private refers to buffer_heads */ #define page_buffers(page) \ ({ \ - BUG_ON(!PagePrivate(page)); \ - ((struct buffer_head *)(page)->private); \ + BUG_ON(!PagePrivate(page)); \ + ((struct buffer_head *)page_private(page)); \ }) #define page_has_buffers(page) PagePrivate(page) @@ -172,7 +172,7 @@ void __brelse(struct buffer_head *); void __bforget(struct buffer_head *); void __breadahead(struct block_device *, sector_t block, int size); struct buffer_head *__bread(struct block_device *, sector_t block, int size); -struct buffer_head *alloc_buffer_head(unsigned int __nocast gfp_flags); +struct buffer_head *alloc_buffer_head(gfp_t gfp_flags); void free_buffer_head(struct buffer_head * bh); void FASTCALL(unlock_buffer(struct buffer_head *bh)); void FASTCALL(__lock_buffer(struct buffer_head *bh)); @@ -188,8 +188,9 @@ extern int buffer_heads_over_limit; * Generic address_space_operations implementations for buffer_head-backed * address_spaces. */ -int try_to_release_page(struct page * page, int gfp_mask); +int try_to_release_page(struct page * page, gfp_t gfp_mask); int block_invalidatepage(struct page *page, unsigned long offset); +int do_invalidatepage(struct page *page, unsigned long offset); int block_write_full_page(struct page *page, get_block_t *get_block, struct writeback_control *wbc); int block_read_full_page(struct page*, get_block_t*); @@ -219,7 +220,7 @@ static inline void attach_page_buffers(struct page *page, { page_cache_get(page); SetPagePrivate(page); - page->private = (unsigned long)head; + set_page_private(page, (unsigned long)head); } static inline void get_bh(struct buffer_head *bh) diff --git a/include/linux/cciss_ioctl.h b/include/linux/cciss_ioctl.h index 424d5e622b43..6e27f42e3a57 100644 --- a/include/linux/cciss_ioctl.h +++ b/include/linux/cciss_ioctl.h @@ -10,8 +10,8 @@ typedef struct _cciss_pci_info_struct { unsigned char bus; - unsigned short domain; unsigned char dev_fn; + unsigned short domain; __u32 board_id; } cciss_pci_info_struct; diff --git a/include/linux/cm4000_cs.h b/include/linux/cm4000_cs.h new file mode 100644 index 000000000000..605ebe24bb2e --- /dev/null +++ b/include/linux/cm4000_cs.h @@ -0,0 +1,66 @@ +#ifndef _CM4000_H_ +#define _CM4000_H_ + +#define MAX_ATR 33 + +#define CM4000_MAX_DEV 4 + +/* those two structures are passed via ioctl() from/to userspace. They are + * used by existing userspace programs, so I kepth the awkward "bIFSD" naming + * not to break compilation of userspace apps. -HW */ + +typedef struct atreq { + int32_t atr_len; + unsigned char atr[64]; + int32_t power_act; + unsigned char bIFSD; + unsigned char bIFSC; +} atreq_t; + + +/* what is particularly stupid in the original driver is the arch-dependant + * member sizes. This leads to CONFIG_COMPAT breakage, since 32bit userspace + * will lay out the structure members differently than the 64bit kernel. + * + * I've changed "ptsreq.protocol" from "unsigned long" to "u_int32_t". + * On 32bit this will make no difference. With 64bit kernels, it will make + * 32bit apps work, too. + */ + +typedef struct ptsreq { + u_int32_t protocol; /*T=0: 2^0, T=1: 2^1*/ + unsigned char flags; + unsigned char pts1; + unsigned char pts2; + unsigned char pts3; +} ptsreq_t; + +#define CM_IOC_MAGIC 'c' +#define CM_IOC_MAXNR 255 + +#define CM_IOCGSTATUS _IOR (CM_IOC_MAGIC, 0, unsigned char *) +#define CM_IOCGATR _IOWR(CM_IOC_MAGIC, 1, atreq_t *) +#define CM_IOCSPTS _IOW (CM_IOC_MAGIC, 2, ptsreq_t *) +#define CM_IOCSRDR _IO (CM_IOC_MAGIC, 3) +#define CM_IOCARDOFF _IO (CM_IOC_MAGIC, 4) + +#define CM_IOSDBGLVL _IOW(CM_IOC_MAGIC, 250, int*) + +/* card and device states */ +#define CM_CARD_INSERTED 0x01 +#define CM_CARD_POWERED 0x02 +#define CM_ATR_PRESENT 0x04 +#define CM_ATR_VALID 0x08 +#define CM_STATE_VALID 0x0f +/* extra info only from CM4000 */ +#define CM_NO_READER 0x10 +#define CM_BAD_CARD 0x20 + + +#ifdef __KERNEL__ + +#define DEVICE_NAME "cmm" +#define MODULE_NAME "cm4000_cs" + +#endif /* __KERNEL__ */ +#endif /* _CM4000_H_ */ diff --git a/include/linux/cn_proc.h b/include/linux/cn_proc.h new file mode 100644 index 000000000000..c948f678e04e --- /dev/null +++ b/include/linux/cn_proc.h @@ -0,0 +1,127 @@ +/* + * cn_proc.h - process events connector + * + * Copyright (C) Matt Helsley, IBM Corp. 2005 + * Based on cn_fork.h by Nguyen Anh Quynh and Guillaume Thouvenin + * Original copyright notice follows: + * Copyright (C) 2005 Nguyen Anh Quynh <aquynh@gmail.com> + * Copyright (C) 2005 Guillaume Thouvenin <guillaume.thouvenin@bull.net> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#ifndef CN_PROC_H +#define CN_PROC_H + +#include <linux/types.h> +#include <linux/connector.h> + +/* + * Userspace sends this enum to register with the kernel that it is listening + * for events on the connector. + */ +enum proc_cn_mcast_op { + PROC_CN_MCAST_LISTEN = 1, + PROC_CN_MCAST_IGNORE = 2 +}; + +/* + * From the user's point of view, the process + * ID is the thread group ID and thread ID is the internal + * kernel "pid". So, fields are assigned as follow: + * + * In user space - In kernel space + * + * parent process ID = parent->tgid + * parent thread ID = parent->pid + * child process ID = child->tgid + * child thread ID = child->pid + */ + +struct proc_event { + enum what { + /* Use successive bits so the enums can be used to record + * sets of events as well + */ + PROC_EVENT_NONE = 0x00000000, + PROC_EVENT_FORK = 0x00000001, + PROC_EVENT_EXEC = 0x00000002, + PROC_EVENT_UID = 0x00000004, + PROC_EVENT_GID = 0x00000040, + /* "next" should be 0x00000400 */ + /* "last" is the last process event: exit */ + PROC_EVENT_EXIT = 0x80000000 + } what; + __u32 cpu; + union { /* must be last field of proc_event struct */ + struct { + __u32 err; + } ack; + + struct fork_proc_event { + pid_t parent_pid; + pid_t parent_tgid; + pid_t child_pid; + pid_t child_tgid; + } fork; + + struct exec_proc_event { + pid_t process_pid; + pid_t process_tgid; + } exec; + + struct id_proc_event { + pid_t process_pid; + pid_t process_tgid; + union { + __u32 ruid; /* task uid */ + __u32 rgid; /* task gid */ + } r; + union { + __u32 euid; + __u32 egid; + } e; + } id; + + struct exit_proc_event { + pid_t process_pid; + pid_t process_tgid; + __u32 exit_code, exit_signal; + } exit; + } event_data; +}; + +#ifdef __KERNEL__ +#ifdef CONFIG_PROC_EVENTS +void proc_fork_connector(struct task_struct *task); +void proc_exec_connector(struct task_struct *task); +void proc_id_connector(struct task_struct *task, int which_id); +void proc_exit_connector(struct task_struct *task); +#else +static inline void proc_fork_connector(struct task_struct *task) +{} + +static inline void proc_exec_connector(struct task_struct *task) +{} + +static inline void proc_id_connector(struct task_struct *task, + int which_id) +{} + +static inline void proc_exit_connector(struct task_struct *task) +{} +#endif /* CONFIG_PROC_EVENTS */ +#endif /* __KERNEL__ */ +#endif /* CN_PROC_H */ diff --git a/include/linux/compat_ioctl.h b/include/linux/compat_ioctl.h index ecb0d39c0798..119f9d064cc6 100644 --- a/include/linux/compat_ioctl.h +++ b/include/linux/compat_ioctl.h @@ -10,6 +10,10 @@ #define ULONG_IOCTL(cmd) HANDLE_IOCTL((cmd),(ioctl_trans_handler_t)sys_ioctl) #endif + +COMPATIBLE_IOCTL(0x4B50) /* KDGHWCLK - not in the kernel, but don't complain */ +COMPATIBLE_IOCTL(0x4B51) /* KDSHWCLK - not in the kernel, but don't complain */ + /* Big T */ COMPATIBLE_IOCTL(TCGETA) COMPATIBLE_IOCTL(TCSETA) @@ -52,13 +56,6 @@ ULONG_IOCTL(TIOCSCTTY) COMPATIBLE_IOCTL(TIOCGPTN) COMPATIBLE_IOCTL(TIOCSPTLCK) COMPATIBLE_IOCTL(TIOCSERGETLSR) -/* Big F */ -COMPATIBLE_IOCTL(FBIOBLANK) -COMPATIBLE_IOCTL(FBIOGET_VSCREENINFO) -COMPATIBLE_IOCTL(FBIOPUT_VSCREENINFO) -COMPATIBLE_IOCTL(FBIOPAN_DISPLAY) -COMPATIBLE_IOCTL(FBIOGET_CON2FBMAP) -COMPATIBLE_IOCTL(FBIOPUT_CON2FBMAP) /* Little f */ COMPATIBLE_IOCTL(FIOCLEX) COMPATIBLE_IOCTL(FIONCLEX) @@ -81,6 +78,8 @@ COMPATIBLE_IOCTL(HDIO_DRIVE_CMD) COMPATIBLE_IOCTL(HDIO_DRIVE_TASK) COMPATIBLE_IOCTL(HDIO_SET_PIO_MODE) COMPATIBLE_IOCTL(HDIO_SET_NICE) +COMPATIBLE_IOCTL(HDIO_SET_KEEPSETTINGS) +COMPATIBLE_IOCTL(HDIO_SCAN_HWIF) /* 0x02 -- Floppy ioctls */ COMPATIBLE_IOCTL(FDMSGON) COMPATIBLE_IOCTL(FDMSGOFF) @@ -99,6 +98,7 @@ COMPATIBLE_IOCTL(FDTWADDLE) COMPATIBLE_IOCTL(FDFMTTRK) COMPATIBLE_IOCTL(FDRAWCMD) /* 0x12 */ +COMPATIBLE_IOCTL(BLKRASET) COMPATIBLE_IOCTL(BLKROSET) COMPATIBLE_IOCTL(BLKROGET) COMPATIBLE_IOCTL(BLKRRPART) @@ -259,9 +259,18 @@ COMPATIBLE_IOCTL(RTC_RD_TIME) COMPATIBLE_IOCTL(RTC_SET_TIME) COMPATIBLE_IOCTL(RTC_WKALM_SET) COMPATIBLE_IOCTL(RTC_WKALM_RD) +/* + * These two are only for the sbus rtc driver, but + * hwclock tries them on every rtc device first when + * running on sparc. On other architectures the entries + * are useless but harmless. + */ +COMPATIBLE_IOCTL(_IOR('p', 20, int[7])) /* RTCGET */ +COMPATIBLE_IOCTL(_IOW('p', 21, int[7])) /* RTCSET */ /* Little m */ COMPATIBLE_IOCTL(MTIOCTOP) /* Socket level stuff */ +COMPATIBLE_IOCTL(FIOQSIZE) COMPATIBLE_IOCTL(FIOSETOWN) COMPATIBLE_IOCTL(SIOCSPGRP) COMPATIBLE_IOCTL(FIOGETOWN) @@ -786,3 +795,70 @@ COMPATIBLE_IOCTL(HIDIOCGFLAG) COMPATIBLE_IOCTL(HIDIOCSFLAG) COMPATIBLE_IOCTL(HIDIOCGCOLLECTIONINDEX) COMPATIBLE_IOCTL(HIDIOCGCOLLECTIONINFO) +/* dvb */ +COMPATIBLE_IOCTL(AUDIO_STOP) +COMPATIBLE_IOCTL(AUDIO_PLAY) +COMPATIBLE_IOCTL(AUDIO_PAUSE) +COMPATIBLE_IOCTL(AUDIO_CONTINUE) +COMPATIBLE_IOCTL(AUDIO_SELECT_SOURCE) +COMPATIBLE_IOCTL(AUDIO_SET_MUTE) +COMPATIBLE_IOCTL(AUDIO_SET_AV_SYNC) +COMPATIBLE_IOCTL(AUDIO_SET_BYPASS_MODE) +COMPATIBLE_IOCTL(AUDIO_CHANNEL_SELECT) +COMPATIBLE_IOCTL(AUDIO_GET_STATUS) +COMPATIBLE_IOCTL(AUDIO_GET_CAPABILITIES) +COMPATIBLE_IOCTL(AUDIO_CLEAR_BUFFER) +COMPATIBLE_IOCTL(AUDIO_SET_ID) +COMPATIBLE_IOCTL(AUDIO_SET_MIXER) +COMPATIBLE_IOCTL(AUDIO_SET_STREAMTYPE) +COMPATIBLE_IOCTL(AUDIO_SET_EXT_ID) +COMPATIBLE_IOCTL(AUDIO_SET_ATTRIBUTES) +COMPATIBLE_IOCTL(AUDIO_SET_KARAOKE) +COMPATIBLE_IOCTL(DMX_START) +COMPATIBLE_IOCTL(DMX_STOP) +COMPATIBLE_IOCTL(DMX_SET_FILTER) +COMPATIBLE_IOCTL(DMX_SET_PES_FILTER) +COMPATIBLE_IOCTL(DMX_SET_BUFFER_SIZE) +COMPATIBLE_IOCTL(DMX_GET_PES_PIDS) +COMPATIBLE_IOCTL(DMX_GET_CAPS) +COMPATIBLE_IOCTL(DMX_SET_SOURCE) +COMPATIBLE_IOCTL(DMX_GET_STC) +COMPATIBLE_IOCTL(FE_GET_INFO) +COMPATIBLE_IOCTL(FE_DISEQC_RESET_OVERLOAD) +COMPATIBLE_IOCTL(FE_DISEQC_SEND_MASTER_CMD) +COMPATIBLE_IOCTL(FE_DISEQC_RECV_SLAVE_REPLY) +COMPATIBLE_IOCTL(FE_DISEQC_SEND_BURST) +COMPATIBLE_IOCTL(FE_SET_TONE) +COMPATIBLE_IOCTL(FE_SET_VOLTAGE) +COMPATIBLE_IOCTL(FE_ENABLE_HIGH_LNB_VOLTAGE) +COMPATIBLE_IOCTL(FE_READ_STATUS) +COMPATIBLE_IOCTL(FE_READ_BER) +COMPATIBLE_IOCTL(FE_READ_SIGNAL_STRENGTH) +COMPATIBLE_IOCTL(FE_READ_SNR) +COMPATIBLE_IOCTL(FE_READ_UNCORRECTED_BLOCKS) +COMPATIBLE_IOCTL(FE_SET_FRONTEND) +COMPATIBLE_IOCTL(FE_GET_FRONTEND) +COMPATIBLE_IOCTL(FE_GET_EVENT) +COMPATIBLE_IOCTL(FE_DISHNETWORK_SEND_LEGACY_CMD) +COMPATIBLE_IOCTL(VIDEO_STOP) +COMPATIBLE_IOCTL(VIDEO_PLAY) +COMPATIBLE_IOCTL(VIDEO_FREEZE) +COMPATIBLE_IOCTL(VIDEO_CONTINUE) +COMPATIBLE_IOCTL(VIDEO_SELECT_SOURCE) +COMPATIBLE_IOCTL(VIDEO_SET_BLANK) +COMPATIBLE_IOCTL(VIDEO_GET_STATUS) +COMPATIBLE_IOCTL(VIDEO_SET_DISPLAY_FORMAT) +COMPATIBLE_IOCTL(VIDEO_FAST_FORWARD) +COMPATIBLE_IOCTL(VIDEO_SLOWMOTION) +COMPATIBLE_IOCTL(VIDEO_GET_CAPABILITIES) +COMPATIBLE_IOCTL(VIDEO_CLEAR_BUFFER) +COMPATIBLE_IOCTL(VIDEO_SET_ID) +COMPATIBLE_IOCTL(VIDEO_SET_STREAMTYPE) +COMPATIBLE_IOCTL(VIDEO_SET_FORMAT) +COMPATIBLE_IOCTL(VIDEO_SET_SYSTEM) +COMPATIBLE_IOCTL(VIDEO_SET_HIGHLIGHT) +COMPATIBLE_IOCTL(VIDEO_SET_SPU) +COMPATIBLE_IOCTL(VIDEO_GET_NAVI) +COMPATIBLE_IOCTL(VIDEO_SET_ATTRIBUTES) +COMPATIBLE_IOCTL(VIDEO_GET_SIZE) +COMPATIBLE_IOCTL(VIDEO_GET_FRAME_RATE) diff --git a/include/linux/config.h b/include/linux/config.h index 9d1c14f7ad6d..a91f5e55b525 100644 --- a/include/linux/config.h +++ b/include/linux/config.h @@ -1,6 +1,8 @@ #ifndef _LINUX_CONFIG_H #define _LINUX_CONFIG_H - +/* This file is no longer in use and kept only for backward compatibility. + * autoconf.h is now included via -imacros on the commandline + */ #include <linux/autoconf.h> #endif diff --git a/include/linux/connector.h b/include/linux/connector.h index 96de26301f84..ad1a22c1c42e 100644 --- a/include/linux/connector.h +++ b/include/linux/connector.h @@ -27,6 +27,14 @@ #define CN_IDX_CONNECTOR 0xffffffff #define CN_VAL_CONNECTOR 0xffffffff +/* + * Process Events connector unique ids -- used for message routing + */ +#define CN_IDX_PROC 0x1 +#define CN_VAL_PROC 0x1 +#define CN_IDX_CIFS 0x2 +#define CN_VAL_CIFS 0x1 + #define CN_NETLINK_USERS 1 /* @@ -104,12 +112,19 @@ struct cn_queue_dev { struct sock *nls; }; -struct cn_callback { +struct cn_callback_id { unsigned char name[CN_CBQ_NAMELEN]; - struct cb_id id; +}; + +struct cn_callback_data { + void (*destruct_data) (void *); + void *ddata; + + void *callback_priv; void (*callback) (void *); - void *priv; + + void *free; }; struct cn_callback_entry { @@ -118,8 +133,8 @@ struct cn_callback_entry { struct work_struct work; struct cn_queue_dev *pdev; - void (*destruct_data) (void *); - void *ddata; + struct cn_callback_id id; + struct cn_callback_data data; int seq, group; struct sock *nls; @@ -142,9 +157,9 @@ struct cn_dev { int cn_add_callback(struct cb_id *, char *, void (*callback) (void *)); void cn_del_callback(struct cb_id *); -int cn_netlink_send(struct cn_msg *, u32, int); +int cn_netlink_send(struct cn_msg *, u32, gfp_t); -int cn_queue_add_callback(struct cn_queue_dev *dev, struct cn_callback *cb); +int cn_queue_add_callback(struct cn_queue_dev *dev, char *name, struct cb_id *id, void (*callback)(void *)); void cn_queue_del_callback(struct cn_queue_dev *dev, struct cb_id *id); struct cn_queue_dev *cn_queue_alloc_dev(char *name, struct sock *); @@ -152,6 +167,8 @@ void cn_queue_free_dev(struct cn_queue_dev *dev); int cn_cb_equal(struct cb_id *, struct cb_id *); +void cn_queue_wrapper(void *data); + extern int cn_already_initialized; #endif /* __KERNEL__ */ diff --git a/include/linux/console_struct.h b/include/linux/console_struct.h index 725be90ef55e..f8e5587a0f92 100644 --- a/include/linux/console_struct.h +++ b/include/linux/console_struct.h @@ -9,6 +9,8 @@ * to achieve effects such as fast scrolling by changing the origin. */ +#include <linux/vt.h> + struct vt_struct; #define NPAR 16 diff --git a/include/linux/cpu.h b/include/linux/cpu.h index 86980c68234a..0ed1d4853c69 100644 --- a/include/linux/cpu.h +++ b/include/linux/cpu.h @@ -32,6 +32,7 @@ struct cpu { }; extern int register_cpu(struct cpu *, int, struct node *); +extern struct sys_device *get_cpu_sysdev(int cpu); #ifdef CONFIG_HOTPLUG_CPU extern void unregister_cpu(struct cpu *, struct node *); #endif @@ -41,6 +42,7 @@ struct notifier_block; /* Need to know about CPUs going up/down? */ extern int register_cpu_notifier(struct notifier_block *nb); extern void unregister_cpu_notifier(struct notifier_block *nb); +extern int current_in_cpu_hotplug(void); int cpu_up(unsigned int cpu); @@ -53,16 +55,19 @@ static inline int register_cpu_notifier(struct notifier_block *nb) static inline void unregister_cpu_notifier(struct notifier_block *nb) { } +static inline int current_in_cpu_hotplug(void) +{ + return 0; +} #endif /* CONFIG_SMP */ extern struct sysdev_class cpu_sysdev_class; #ifdef CONFIG_HOTPLUG_CPU /* Stop CPUs going up and down. */ -extern struct semaphore cpucontrol; -#define lock_cpu_hotplug() down(&cpucontrol) -#define unlock_cpu_hotplug() up(&cpucontrol) -#define lock_cpu_hotplug_interruptible() down_interruptible(&cpucontrol) +extern void lock_cpu_hotplug(void); +extern void unlock_cpu_hotplug(void); +extern int lock_cpu_hotplug_interruptible(void); #define hotcpu_notifier(fn, pri) { \ static struct notifier_block fn##_nb = \ { .notifier_call = fn, .priority = pri }; \ diff --git a/include/linux/cpufreq.h b/include/linux/cpufreq.h index ff7f80f48df1..d068176b7ad7 100644 --- a/include/linux/cpufreq.h +++ b/include/linux/cpufreq.h @@ -23,6 +23,7 @@ #include <linux/completion.h> #include <linux/workqueue.h> #include <linux/cpumask.h> +#include <asm/div64.h> #define CPUFREQ_NAME_LEN 16 diff --git a/include/linux/cpumask.h b/include/linux/cpumask.h index b15826f6e3a2..13e9f4a3ab26 100644 --- a/include/linux/cpumask.h +++ b/include/linux/cpumask.h @@ -12,6 +12,8 @@ * see bitmap_scnprintf() and bitmap_parse() in lib/bitmap.c. * For details of cpulist_scnprintf() and cpulist_parse(), see * bitmap_scnlistprintf() and bitmap_parselist(), also in bitmap.c. + * For details of cpu_remap(), see bitmap_bitremap in lib/bitmap.c + * For details of cpus_remap(), see bitmap_remap in lib/bitmap.c. * * The available cpumask operations are: * @@ -50,6 +52,8 @@ * int cpumask_parse(ubuf, ulen, mask) Parse ascii string as cpumask * int cpulist_scnprintf(buf, len, mask) Format cpumask as list for printing * int cpulist_parse(buf, map) Parse ascii string as cpulist + * int cpu_remap(oldbit, old, new) newbit = map(old, new)(oldbit) + * int cpus_remap(dst, src, old, new) *dst = map(old, new)(src) * * for_each_cpu_mask(cpu, mask) for-loop cpu over mask * @@ -294,6 +298,22 @@ static inline int __cpulist_parse(const char *buf, cpumask_t *dstp, int nbits) return bitmap_parselist(buf, dstp->bits, nbits); } +#define cpu_remap(oldbit, old, new) \ + __cpu_remap((oldbit), &(old), &(new), NR_CPUS) +static inline int __cpu_remap(int oldbit, + const cpumask_t *oldp, const cpumask_t *newp, int nbits) +{ + return bitmap_bitremap(oldbit, oldp->bits, newp->bits, nbits); +} + +#define cpus_remap(dst, src, old, new) \ + __cpus_remap(&(dst), &(src), &(old), &(new), NR_CPUS) +static inline void __cpus_remap(cpumask_t *dstp, const cpumask_t *srcp, + const cpumask_t *oldp, const cpumask_t *newp, int nbits) +{ + bitmap_remap(dstp->bits, srcp->bits, oldp->bits, newp->bits, nbits); +} + #if NR_CPUS > 1 #define for_each_cpu_mask(cpu, mask) \ for ((cpu) = first_cpu(mask); \ @@ -392,4 +412,14 @@ extern cpumask_t cpu_present_map; #define for_each_online_cpu(cpu) for_each_cpu_mask((cpu), cpu_online_map) #define for_each_present_cpu(cpu) for_each_cpu_mask((cpu), cpu_present_map) +/* Find the highest possible smp_processor_id() */ +#define highest_possible_processor_id() \ +({ \ + unsigned int cpu, highest = 0; \ + for_each_cpu_mask(cpu, cpu_possible_map) \ + highest = cpu; \ + highest; \ +}) + + #endif /* __LINUX_CPUMASK_H */ diff --git a/include/linux/cpuset.h b/include/linux/cpuset.h index 24062a1dbf61..6e2deef96b34 100644 --- a/include/linux/cpuset.h +++ b/include/linux/cpuset.h @@ -23,7 +23,7 @@ void cpuset_init_current_mems_allowed(void); void cpuset_update_current_mems_allowed(void); void cpuset_restrict_to_mems_allowed(unsigned long *nodes); int cpuset_zonelist_valid_mems_allowed(struct zonelist *zl); -extern int cpuset_zone_allowed(struct zone *z, unsigned int __nocast gfp_mask); +extern int cpuset_zone_allowed(struct zone *z, gfp_t gfp_mask); extern int cpuset_excl_nodes_overlap(const struct task_struct *p); extern struct file_operations proc_cpuset_operations; extern char *cpuset_task_status_allowed(struct task_struct *task, char *buffer); @@ -49,8 +49,7 @@ static inline int cpuset_zonelist_valid_mems_allowed(struct zonelist *zl) return 1; } -static inline int cpuset_zone_allowed(struct zone *z, - unsigned int __nocast gfp_mask) +static inline int cpuset_zone_allowed(struct zone *z, gfp_t gfp_mask) { return 1; } diff --git a/include/linux/cyclomx.h b/include/linux/cyclomx.h index 04fa7dff079c..300d704bdb9a 100644 --- a/include/linux/cyclomx.h +++ b/include/linux/cyclomx.h @@ -37,8 +37,6 @@ #include <linux/cycx_x25.h> #endif -#define is_digit(ch) (((ch)>=(unsigned)'0'&&(ch)<=(unsigned)'9')?1:0) - /* Adapter Data Space. * This structure is needed because we handle multiple cards, otherwise * static data would do it. diff --git a/include/linux/cycx_drv.h b/include/linux/cycx_drv.h index 6621df86a748..12fe6b0bfcff 100644 --- a/include/linux/cycx_drv.h +++ b/include/linux/cycx_drv.h @@ -60,6 +60,5 @@ extern int cycx_peek(struct cycx_hw *hw, u32 addr, void *buf, u32 len); extern int cycx_poke(struct cycx_hw *hw, u32 addr, void *buf, u32 len); extern int cycx_exec(void __iomem *addr); -extern void cycx_inten(struct cycx_hw *hw); extern void cycx_intr(struct cycx_hw *hw); #endif /* _CYCX_DRV_H */ diff --git a/include/linux/dcache.h b/include/linux/dcache.h index ab04b4f9b0db..46a2ba617595 100644 --- a/include/linux/dcache.h +++ b/include/linux/dcache.h @@ -329,6 +329,7 @@ static inline int d_mountpoint(struct dentry *dentry) } extern struct vfsmount *lookup_mnt(struct vfsmount *, struct dentry *); +extern struct vfsmount *__lookup_mnt(struct vfsmount *, struct dentry *, int); extern struct dentry *lookup_create(struct nameidata *nd, int is_dir); extern int sysctl_vfs_cache_pressure; diff --git a/include/linux/device.h b/include/linux/device.h index 06e5d42f2c7b..17cbc6db67b4 100644 --- a/include/linux/device.h +++ b/include/linux/device.h @@ -28,19 +28,6 @@ #define BUS_ID_SIZE KOBJ_NAME_LEN -enum { - SUSPEND_NOTIFY, - SUSPEND_SAVE_STATE, - SUSPEND_DISABLE, - SUSPEND_POWER_DOWN, -}; - -enum { - RESUME_POWER_ON, - RESUME_RESTORE_STATE, - RESUME_ENABLE, -}; - struct device; struct device_driver; struct class; @@ -115,8 +102,8 @@ struct device_driver { int (*probe) (struct device * dev); int (*remove) (struct device * dev); void (*shutdown) (struct device * dev); - int (*suspend) (struct device * dev, pm_message_t state, u32 level); - int (*resume) (struct device * dev, u32 level); + int (*suspend) (struct device * dev, pm_message_t state); + int (*resume) (struct device * dev); }; @@ -190,7 +177,43 @@ struct class_attribute class_attr_##_name = __ATTR(_name,_mode,_show,_store) extern int class_create_file(struct class *, const struct class_attribute *); extern void class_remove_file(struct class *, const struct class_attribute *); +struct class_device_attribute { + struct attribute attr; + ssize_t (*show)(struct class_device *, char * buf); + ssize_t (*store)(struct class_device *, const char * buf, size_t count); +}; + +#define CLASS_DEVICE_ATTR(_name,_mode,_show,_store) \ +struct class_device_attribute class_device_attr_##_name = \ + __ATTR(_name,_mode,_show,_store) +extern int class_device_create_file(struct class_device *, + const struct class_device_attribute *); + +/** + * struct class_device - class devices + * @class: pointer to the parent class for this class device. This is required. + * @devt: for internal use by the driver core only. + * @node: for internal use by the driver core only. + * @kobj: for internal use by the driver core only. + * @devt_attr: for internal use by the driver core only. + * @dev: if set, a symlink to the struct device is created in the sysfs + * directory for this struct class device. + * @class_data: pointer to whatever you want to store here for this struct + * class_device. Use class_get_devdata() and class_set_devdata() to get and + * set this pointer. + * @parent: pointer to a struct class_device that is the parent of this struct + * class_device. If NULL, this class_device will show up at the root of the + * struct class in sysfs (which is probably what you want to have happen.) + * @release: pointer to a release function for this struct class_device. If + * set, this will be called instead of the class specific release function. + * Only use this if you want to override the default release function, like + * when you are nesting class_device structures. + * @hotplug: pointer to a hotplug function for this struct class_device. If + * set, this will be called instead of the class specific hotplug function. + * Only use this if you want to override the default hotplug function, like + * when you are nesting class_device structures. + */ struct class_device { struct list_head node; @@ -198,9 +221,14 @@ struct class_device { struct class * class; /* required */ dev_t devt; /* dev_t, creates the sysfs "dev" */ struct class_device_attribute *devt_attr; + struct class_device_attribute uevent_attr; struct device * dev; /* not necessary, but nice to have */ void * class_data; /* class-specific data */ + struct class_device *parent; /* parent of this child device, if there is one */ + void (*release)(struct class_device *dev); + int (*hotplug)(struct class_device *dev, char **envp, + int num_envp, char *buffer, int buffer_size); char class_id[BUS_ID_SIZE]; /* unique to this class */ }; @@ -228,18 +256,6 @@ extern int class_device_rename(struct class_device *, char *); extern struct class_device * class_device_get(struct class_device *); extern void class_device_put(struct class_device *); -struct class_device_attribute { - struct attribute attr; - ssize_t (*show)(struct class_device *, char * buf); - ssize_t (*store)(struct class_device *, const char * buf, size_t count); -}; - -#define CLASS_DEVICE_ATTR(_name,_mode,_show,_store) \ -struct class_device_attribute class_device_attr_##_name = \ - __ATTR(_name,_mode,_show,_store) - -extern int class_device_create_file(struct class_device *, - const struct class_device_attribute *); extern void class_device_remove_file(struct class_device *, const struct class_device_attribute *); extern int class_device_create_bin_file(struct class_device *, @@ -251,8 +267,8 @@ struct class_interface { struct list_head node; struct class *class; - int (*add) (struct class_device *); - void (*remove) (struct class_device *); + int (*add) (struct class_device *, struct class_interface *); + void (*remove) (struct class_device *, struct class_interface *); }; extern int class_interface_register(struct class_interface *); @@ -260,12 +276,29 @@ extern void class_interface_unregister(struct class_interface *); extern struct class *class_create(struct module *owner, char *name); extern void class_destroy(struct class *cls); -extern struct class_device *class_device_create(struct class *cls, dev_t devt, - struct device *device, char *fmt, ...) - __attribute__((format(printf,4,5))); +extern struct class_device *class_device_create(struct class *cls, + struct class_device *parent, + dev_t devt, + struct device *device, + char *fmt, ...) + __attribute__((format(printf,5,6))); extern void class_device_destroy(struct class *cls, dev_t devt); +/* interface for exporting device attributes */ +struct device_attribute { + struct attribute attr; + ssize_t (*show)(struct device *dev, struct device_attribute *attr, + char *buf); + ssize_t (*store)(struct device *dev, struct device_attribute *attr, + const char *buf, size_t count); +}; + +#define DEVICE_ATTR(_name,_mode,_show,_store) \ +struct device_attribute dev_attr_##_name = __ATTR(_name,_mode,_show,_store) + +extern int device_create_file(struct device *device, struct device_attribute * entry); +extern void device_remove_file(struct device * dev, struct device_attribute * attr); struct device { struct klist klist_children; struct klist_node knode_parent; /* node in sibling list */ @@ -275,6 +308,7 @@ struct device { struct kobject kobj; char bus_id[BUS_ID_SIZE]; /* position on parent bus */ + struct device_attribute uevent_attr; struct semaphore sem; /* semaphore to synchronize calls to * its driver. @@ -317,6 +351,11 @@ dev_set_drvdata (struct device *dev, void *data) dev->driver_data = data; } +static inline int device_is_registered(struct device *dev) +{ + return klist_node_attached(&dev->knode_bus); +} + /* * High level routines for use by the bus drivers */ @@ -338,23 +377,6 @@ extern int device_attach(struct device * dev); extern void driver_attach(struct device_driver * drv); -/* driverfs interface for exporting device attributes */ - -struct device_attribute { - struct attribute attr; - ssize_t (*show)(struct device *dev, struct device_attribute *attr, - char *buf); - ssize_t (*store)(struct device *dev, struct device_attribute *attr, - const char *buf, size_t count); -}; - -#define DEVICE_ATTR(_name,_mode,_show,_store) \ -struct device_attribute dev_attr_##_name = __ATTR(_name,_mode,_show,_store) - - -extern int device_create_file(struct device *device, struct device_attribute * entry); -extern void device_remove_file(struct device * dev, struct device_attribute * attr); - /* * Platform "fixup" functions - allow the platform to have their say * about devices and actions that the general device layer doesn't @@ -374,32 +396,6 @@ extern struct device * get_device(struct device * dev); extern void put_device(struct device * dev); -/* drivers/base/platform.c */ - -struct platform_device { - const char * name; - u32 id; - struct device dev; - u32 num_resources; - struct resource * resource; -}; - -#define to_platform_device(x) container_of((x), struct platform_device, dev) - -extern int platform_device_register(struct platform_device *); -extern void platform_device_unregister(struct platform_device *); - -extern struct bus_type platform_bus_type; -extern struct device platform_bus; - -extern struct resource *platform_get_resource(struct platform_device *, unsigned int, unsigned int); -extern int platform_get_irq(struct platform_device *, unsigned int); -extern struct resource *platform_get_resource_byname(struct platform_device *, unsigned int, char *); -extern int platform_get_irq_byname(struct platform_device *, char *); -extern int platform_add_devices(struct platform_device **, int); - -extern struct platform_device *platform_device_register_simple(char *, unsigned int, struct resource *, unsigned int); - /* drivers/base/power.c */ extern void device_shutdown(void); diff --git a/include/linux/dmapool.h b/include/linux/dmapool.h index 4932ee5c77f0..76f12f46db7f 100644 --- a/include/linux/dmapool.h +++ b/include/linux/dmapool.h @@ -19,7 +19,7 @@ struct dma_pool *dma_pool_create(const char *name, struct device *dev, void dma_pool_destroy(struct dma_pool *pool); -void *dma_pool_alloc(struct dma_pool *pool, unsigned int __nocast mem_flags, +void *dma_pool_alloc(struct dma_pool *pool, gfp_t mem_flags, dma_addr_t *handle); void dma_pool_free(struct dma_pool *pool, void *vaddr, dma_addr_t addr); diff --git a/include/linux/dmi.h b/include/linux/dmi.h index a415f1d93e9a..05f4132622fc 100644 --- a/include/linux/dmi.h +++ b/include/linux/dmi.h @@ -60,7 +60,7 @@ struct dmi_device { void *device_data; /* Type specific data */ }; -#if defined(CONFIG_X86) && !defined(CONFIG_X86_64) +#if defined(CONFIG_X86_32) extern int dmi_check_system(struct dmi_system_id *list); extern char * dmi_get_system_info(int field); diff --git a/include/linux/dqblk_xfs.h b/include/linux/dqblk_xfs.h index cb31719ee192..2fda1b2aabd9 100644 --- a/include/linux/dqblk_xfs.h +++ b/include/linux/dqblk_xfs.h @@ -1,22 +1,18 @@ /* * Copyright (c) 1995-2001,2004 Silicon Graphics, Inc. All Rights Reserved. * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2.1 of the GNU Lesser General Public License + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU Lesser General Public License * as published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. + * GNU Lesser General Public License for more details. * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 - * USA - * - * Contact information: Silicon Graphics, Inc., 1500 Crittenden Lane, - * Mountain View, CA 94043, USA, or: http://www.sgi.com + * You should have received a copy of the GNU Lesset General Public License + * along with this program; if not, write to the Free Software Foundation, + * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ #ifndef _LINUX_DQBLK_XFS_H #define _LINUX_DQBLK_XFS_H @@ -32,7 +28,8 @@ #define XQM_USRQUOTA 0 /* system call user quota type */ #define XQM_GRPQUOTA 1 /* system call group quota type */ -#define XQM_MAXQUOTAS 2 +#define XQM_PRJQUOTA 2 /* system call project quota type */ +#define XQM_MAXQUOTAS 3 #define Q_XQUOTAON XQM_CMD(1) /* enable accounting/enforcement */ #define Q_XQUOTAOFF XQM_CMD(2) /* disable accounting/enforcement */ @@ -40,6 +37,7 @@ #define Q_XSETQLIM XQM_CMD(4) /* set disk limits */ #define Q_XGETQSTAT XQM_CMD(5) /* get quota subsystem status */ #define Q_XQUOTARM XQM_CMD(6) /* free disk space used by dquots */ +#define Q_XQUOTASYNC XQM_CMD(7) /* delalloc flush, updates dquots */ /* * fs_disk_quota structure: diff --git a/include/linux/ds17287rtc.h b/include/linux/ds17287rtc.h new file mode 100644 index 000000000000..c281ba42e28f --- /dev/null +++ b/include/linux/ds17287rtc.h @@ -0,0 +1,67 @@ +/* + * ds17287rtc.h - register definitions for the ds1728[57] RTC / CMOS RAM + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * + * (C) 2003 Guido Guenther <agx@sigxcpu.org> + */ +#ifndef __LINUX_DS17287RTC_H +#define __LINUX_DS17287RTC_H + +#include <linux/rtc.h> /* get the user-level API */ +#include <linux/spinlock.h> /* spinlock_t */ +#include <linux/mc146818rtc.h> + +/* Register A */ +#define DS_REGA_DV2 0x40 /* countdown chain */ +#define DS_REGA_DV1 0x20 /* oscillator enable */ +#define DS_REGA_DV0 0x10 /* bank select */ + +/* bank 1 registers */ +#define DS_B1_MODEL 0x40 /* model number byte */ +#define DS_B1_SN1 0x41 /* serial number byte 1 */ +#define DS_B1_SN2 0x42 /* serial number byte 2 */ +#define DS_B1_SN3 0x43 /* serial number byte 3 */ +#define DS_B1_SN4 0x44 /* serial number byte 4 */ +#define DS_B1_SN5 0x45 /* serial number byte 5 */ +#define DS_B1_SN6 0x46 /* serial number byte 6 */ +#define DS_B1_CRC 0x47 /* CRC byte */ +#define DS_B1_CENTURY 0x48 /* Century byte */ +#define DS_B1_DALARM 0x49 /* date alarm */ +#define DS_B1_XCTRL4A 0x4a /* extendec control register 4a */ +#define DS_B1_XCTRL4B 0x4b /* extendec control register 4b */ +#define DS_B1_RTCADDR2 0x4e /* rtc address 2 */ +#define DS_B1_RTCADDR3 0x4f /* rtc address 3 */ +#define DS_B1_RAMLSB 0x50 /* extended ram LSB */ +#define DS_B1_RAMMSB 0x51 /* extended ram MSB */ +#define DS_B1_RAMDPORT 0x53 /* extended ram data port */ + +/* register details */ +/* extended control register 4a */ +#define DS_XCTRL4A_VRT2 0x80 /* valid ram and time */ +#define DS_XCTRL4A_INCR 0x40 /* increment progress status */ +#define DS_XCTRL4A_BME 0x20 /* burst mode enable */ +#define DS_XCTRL4A_PAB 0x08 /* power active bar ctrl */ +#define DS_XCTRL4A_RF 0x04 /* ram clear flag */ +#define DS_XCTRL4A_WF 0x02 /* wake up alarm flag */ +#define DS_XCTRL4A_KF 0x01 /* kickstart flag */ + +/* interrupt causes */ +#define DS_XCTRL4A_IFS (DS_XCTRL4A_RF|DS_XCTRL4A_WF|DS_XCTRL4A_KF) + +/* extended control register 4b */ +#define DS_XCTRL4B_ABE 0x80 /* auxiliary battery enable */ +#define DS_XCTRL4B_E32K 0x40 /* enable 32.768 kHz Output */ +#define DS_XCTRL4B_CS 0x20 /* crystal select */ +#define DS_XCTRL4B_RCE 0x10 /* ram clear enable */ +#define DS_XCTRL4B_PRS 0x08 /* PAB resec select */ +#define DS_XCTRL4B_RIE 0x04 /* ram clear interrupt enable */ +#define DS_XCTRL4B_WFE 0x02 /* wake up alarm interrupt enable */ +#define DS_XCTRL4B_KFE 0x01 /* kickstart interrupt enable */ + +/* interrupt enable bits */ +#define DS_XCTRL4B_IFES (DS_XCTRL4B_RIE|DS_XCTRL4B_WFE|DS_XCTRL4B_KFE) + +#endif /* __LINUX_DS17287RTC_H */ diff --git a/include/linux/ds1742rtc.h b/include/linux/ds1742rtc.h new file mode 100644 index 000000000000..a83cdd1cafc9 --- /dev/null +++ b/include/linux/ds1742rtc.h @@ -0,0 +1,53 @@ +/* + * ds1742rtc.h - register definitions for the Real-Time-Clock / CMOS RAM + * + * Copyright (C) 1999-2001 Toshiba Corporation + * Copyright (C) 2003 Ralf Baechle (ralf@linux-mips.org) + * + * Permission is hereby granted to copy, modify and redistribute this code + * in terms of the GNU Library General Public License, Version 2 or later, + * at your option. + */ +#ifndef __LINUX_DS1742RTC_H +#define __LINUX_DS1742RTC_H + +#include <asm/ds1742.h> + +#define RTC_BRAM_SIZE 0x800 +#define RTC_OFFSET 0x7f8 + +/* + * Register summary + */ +#define RTC_CONTROL (RTC_OFFSET + 0) +#define RTC_CENTURY (RTC_OFFSET + 0) +#define RTC_SECONDS (RTC_OFFSET + 1) +#define RTC_MINUTES (RTC_OFFSET + 2) +#define RTC_HOURS (RTC_OFFSET + 3) +#define RTC_DAY (RTC_OFFSET + 4) +#define RTC_DATE (RTC_OFFSET + 5) +#define RTC_MONTH (RTC_OFFSET + 6) +#define RTC_YEAR (RTC_OFFSET + 7) + +#define RTC_CENTURY_MASK 0x3f +#define RTC_SECONDS_MASK 0x7f +#define RTC_DAY_MASK 0x07 + +/* + * Bits in the Control/Century register + */ +#define RTC_WRITE 0x80 +#define RTC_READ 0x40 + +/* + * Bits in the Seconds register + */ +#define RTC_STOP 0x80 + +/* + * Bits in the Day register + */ +#define RTC_BATT_FLAG 0x80 +#define RTC_FREQ_TEST 0x40 + +#endif /* __LINUX_DS1742RTC_H */ diff --git a/include/linux/eeprom.h b/include/linux/eeprom.h deleted file mode 100644 index 38afd9da1dfe..000000000000 --- a/include/linux/eeprom.h +++ /dev/null @@ -1,136 +0,0 @@ -/* credit winbond-840.c - */ -#include <asm/io.h> -struct eeprom_ops { - void (*set_cs)(void *ee); - void (*clear_cs)(void *ee); -}; - -#define EEPOL_EEDI 0x01 -#define EEPOL_EEDO 0x02 -#define EEPOL_EECLK 0x04 -#define EEPOL_EESEL 0x08 - -struct eeprom { - void *dev; - struct eeprom_ops *ops; - - void __iomem * addr; - - unsigned ee_addr_bits; - - unsigned eesel; - unsigned eeclk; - unsigned eedo; - unsigned eedi; - unsigned polarity; - unsigned ee_state; - - spinlock_t *lock; - u32 *cache; -}; - - -u8 eeprom_readb(struct eeprom *ee, unsigned address); -void eeprom_read(struct eeprom *ee, unsigned address, u8 *bytes, - unsigned count); -void eeprom_writeb(struct eeprom *ee, unsigned address, u8 data); -void eeprom_write(struct eeprom *ee, unsigned address, u8 *bytes, - unsigned count); - -/* The EEPROM commands include the alway-set leading bit. */ -enum EEPROM_Cmds { - EE_WriteCmd=(5 << 6), EE_ReadCmd=(6 << 6), EE_EraseCmd=(7 << 6), -}; - -void setup_ee_mem_bitbanger(struct eeprom *ee, void __iomem *memaddr, int eesel_bit, int eeclk_bit, int eedo_bit, int eedi_bit, unsigned polarity) -{ - ee->addr = memaddr; - ee->eesel = 1 << eesel_bit; - ee->eeclk = 1 << eeclk_bit; - ee->eedo = 1 << eedo_bit; - ee->eedi = 1 << eedi_bit; - - ee->polarity = polarity; - - *ee->cache = readl(ee->addr); -} - -/* foo. put this in a .c file */ -static inline void eeprom_update(struct eeprom *ee, u32 mask, int pol) -{ - unsigned long flags; - u32 data; - - spin_lock_irqsave(ee->lock, flags); - data = *ee->cache; - - data &= ~mask; - if (pol) - data |= mask; - - *ee->cache = data; -//printk("update: %08x\n", data); - writel(data, ee->addr); - spin_unlock_irqrestore(ee->lock, flags); -} - -void eeprom_clk_lo(struct eeprom *ee) -{ - int pol = !!(ee->polarity & EEPOL_EECLK); - - eeprom_update(ee, ee->eeclk, pol); - udelay(2); -} - -void eeprom_clk_hi(struct eeprom *ee) -{ - int pol = !!(ee->polarity & EEPOL_EECLK); - - eeprom_update(ee, ee->eeclk, !pol); - udelay(2); -} - -void eeprom_send_addr(struct eeprom *ee, unsigned address) -{ - int pol = !!(ee->polarity & EEPOL_EEDI); - unsigned i; - address |= 6 << 6; - - /* Shift the read command bits out. */ - for (i=0; i<11; i++) { - eeprom_update(ee, ee->eedi, ((address >> 10) & 1) ^ pol); - address <<= 1; - eeprom_clk_hi(ee); - eeprom_clk_lo(ee); - } - eeprom_update(ee, ee->eedi, pol); -} - -u16 eeprom_readw(struct eeprom *ee, unsigned address) -{ - unsigned i; - u16 res = 0; - - eeprom_clk_lo(ee); - eeprom_update(ee, ee->eesel, 1 ^ !!(ee->polarity & EEPOL_EESEL)); - eeprom_send_addr(ee, address); - - for (i=0; i<16; i++) { - u32 data; - eeprom_clk_hi(ee); - res <<= 1; - data = readl(ee->addr); -//printk("eeprom_readw: %08x\n", data); - res |= !!(data & ee->eedo) ^ !!(ee->polarity & EEPOL_EEDO); - eeprom_clk_lo(ee); - } - eeprom_update(ee, ee->eesel, 0 ^ !!(ee->polarity & EEPOL_EESEL)); - - return res; -} - - -void eeprom_writeb(struct eeprom *ee, unsigned address, u8 data) -{ -} diff --git a/include/linux/elevator.h b/include/linux/elevator.h index ea6bbc2d7407..a74c27e460ba 100644 --- a/include/linux/elevator.h +++ b/include/linux/elevator.h @@ -8,18 +8,17 @@ typedef void (elevator_merge_req_fn) (request_queue_t *, struct request *, struc typedef void (elevator_merged_fn) (request_queue_t *, struct request *); -typedef struct request *(elevator_next_req_fn) (request_queue_t *); +typedef int (elevator_dispatch_fn) (request_queue_t *, int); -typedef void (elevator_add_req_fn) (request_queue_t *, struct request *, int); +typedef void (elevator_add_req_fn) (request_queue_t *, struct request *); typedef int (elevator_queue_empty_fn) (request_queue_t *); -typedef void (elevator_remove_req_fn) (request_queue_t *, struct request *); -typedef void (elevator_requeue_req_fn) (request_queue_t *, struct request *); typedef struct request *(elevator_request_list_fn) (request_queue_t *, struct request *); typedef void (elevator_completed_req_fn) (request_queue_t *, struct request *); typedef int (elevator_may_queue_fn) (request_queue_t *, int, struct bio *); -typedef int (elevator_set_req_fn) (request_queue_t *, struct request *, struct bio *, int); +typedef int (elevator_set_req_fn) (request_queue_t *, struct request *, struct bio *, gfp_t); typedef void (elevator_put_req_fn) (request_queue_t *, struct request *); +typedef void (elevator_activate_req_fn) (request_queue_t *, struct request *); typedef void (elevator_deactivate_req_fn) (request_queue_t *, struct request *); typedef int (elevator_init_fn) (request_queue_t *, elevator_t *); @@ -31,10 +30,9 @@ struct elevator_ops elevator_merged_fn *elevator_merged_fn; elevator_merge_req_fn *elevator_merge_req_fn; - elevator_next_req_fn *elevator_next_req_fn; + elevator_dispatch_fn *elevator_dispatch_fn; elevator_add_req_fn *elevator_add_req_fn; - elevator_remove_req_fn *elevator_remove_req_fn; - elevator_requeue_req_fn *elevator_requeue_req_fn; + elevator_activate_req_fn *elevator_activate_req_fn; elevator_deactivate_req_fn *elevator_deactivate_req_fn; elevator_queue_empty_fn *elevator_queue_empty_fn; @@ -81,15 +79,15 @@ struct elevator_queue /* * block elevator interface */ +extern void elv_dispatch_sort(request_queue_t *, struct request *); extern void elv_add_request(request_queue_t *, struct request *, int, int); extern void __elv_add_request(request_queue_t *, struct request *, int, int); extern int elv_merge(request_queue_t *, struct request **, struct bio *); extern void elv_merge_requests(request_queue_t *, struct request *, struct request *); extern void elv_merged_request(request_queue_t *, struct request *); -extern void elv_remove_request(request_queue_t *, struct request *); +extern void elv_dequeue_request(request_queue_t *, struct request *); extern void elv_requeue_request(request_queue_t *, struct request *); -extern void elv_deactivate_request(request_queue_t *, struct request *); extern int elv_queue_empty(request_queue_t *); extern struct request *elv_next_request(struct request_queue *q); extern struct request *elv_former_request(request_queue_t *, struct request *); @@ -98,7 +96,7 @@ extern int elv_register_queue(request_queue_t *q); extern void elv_unregister_queue(request_queue_t *q); extern int elv_may_queue(request_queue_t *, int, struct bio *); extern void elv_completed_request(request_queue_t *, struct request *); -extern int elv_set_request(request_queue_t *, struct request *, struct bio *, int); +extern int elv_set_request(request_queue_t *, struct request *, struct bio *, gfp_t); extern void elv_put_request(request_queue_t *, struct request *); /* @@ -142,4 +140,6 @@ enum { ELV_MQUEUE_MUST, }; +#define rq_end_sector(rq) ((rq)->sector + (rq)->nr_sectors) + #endif diff --git a/include/linux/etherdevice.h b/include/linux/etherdevice.h index 4522c7186bf3..5f49a30eb6f2 100644 --- a/include/linux/etherdevice.h +++ b/include/linux/etherdevice.h @@ -48,8 +48,10 @@ static inline void eth_copy_and_sum (struct sk_buff *dest, } /** - * is_zero_ether_addr - Determine if give Ethernet address is all - * zeros. + * is_zero_ether_addr - Determine if give Ethernet address is all zeros. + * @addr: Pointer to a six-byte array containing the Ethernet address + * + * Return true if the address is all zeroes. */ static inline int is_zero_ether_addr(const u8 *addr) { @@ -57,9 +59,7 @@ static inline int is_zero_ether_addr(const u8 *addr) } /** - * is_multicast_ether_addr - Determine if the given Ethernet address is a - * multicast address. - * + * is_multicast_ether_addr - Determine if the Ethernet address is a multicast. * @addr: Pointer to a six-byte array containing the Ethernet address * * Return true if the address is a multicast address. @@ -69,10 +69,15 @@ static inline int is_multicast_ether_addr(const u8 *addr) return ((addr[0] != 0xff) && (0x01 & addr[0])); } +/** + * is_broadcast_ether_addr - Determine if the Ethernet address is broadcast + * @addr: Pointer to a six-byte array containing the Ethernet address + * + * Return true if the address is the broadcast address. + */ static inline int is_broadcast_ether_addr(const u8 *addr) { - return ((addr[0] == 0xff) && (addr[1] == 0xff) && (addr[2] == 0xff) && - (addr[3] == 0xff) && (addr[4] == 0xff) && (addr[5] == 0xff)); + return (addr[0] & addr[1] & addr[2] & addr[3] & addr[4] & addr[5]) == 0xff; } /** @@ -104,6 +109,22 @@ static inline void random_ether_addr(u8 *addr) addr [0] &= 0xfe; /* clear multicast bit */ addr [0] |= 0x02; /* set local assignment bit (IEEE802) */ } + +/** + * compare_ether_addr - Compare two Ethernet addresses + * @addr1: Pointer to a six-byte array containing the Ethernet address + * @addr2: Pointer other six-byte array containing the Ethernet address + * + * Compare two ethernet addresses, returns 0 if equal + */ +static inline unsigned compare_ether_addr(const u8 *addr1, const u8 *addr2) +{ + const u16 *a = (const u16 *) addr1; + const u16 *b = (const u16 *) addr2; + + BUILD_BUG_ON(ETH_ALEN != 6); + return ((a[0] ^ b[0]) | (a[1] ^ b[1]) | (a[2] ^ b[2])) != 0; +} #endif /* __KERNEL__ */ #endif /* _LINUX_ETHERDEVICE_H */ diff --git a/include/linux/ethtool.h b/include/linux/ethtool.h index ed1440ea4c91..93535f093216 100644 --- a/include/linux/ethtool.h +++ b/include/linux/ethtool.h @@ -269,6 +269,8 @@ u32 ethtool_op_get_tso(struct net_device *dev); int ethtool_op_set_tso(struct net_device *dev, u32 data); int ethtool_op_get_perm_addr(struct net_device *dev, struct ethtool_perm_addr *addr, u8 *data); +u32 ethtool_op_get_ufo(struct net_device *dev); +int ethtool_op_set_ufo(struct net_device *dev, u32 data); /** * ðtool_ops - Alter and report network device settings @@ -298,6 +300,8 @@ int ethtool_op_get_perm_addr(struct net_device *dev, * set_sg: Turn scatter-gather on or off * get_tso: Report whether TCP segmentation offload is enabled * set_tso: Turn TCP segmentation offload on or off + * get_ufo: Report whether UDP fragmentation offload is enabled + * set_ufo: Turn UDP fragmentation offload on or off * self_test: Run specified self-tests * get_strings: Return a set of strings that describe the requested objects * phys_id: Identify the device @@ -364,6 +368,8 @@ struct ethtool_ops { int (*get_perm_addr)(struct net_device *, struct ethtool_perm_addr *, u8 *); int (*begin)(struct net_device *); void (*complete)(struct net_device *); + u32 (*get_ufo)(struct net_device *); + int (*set_ufo)(struct net_device *, u32); }; /* CMDs currently supported */ @@ -400,6 +406,8 @@ struct ethtool_ops { #define ETHTOOL_GTSO 0x0000001e /* Get TSO enable (ethtool_value) */ #define ETHTOOL_STSO 0x0000001f /* Set TSO enable (ethtool_value) */ #define ETHTOOL_GPERMADDR 0x00000020 /* Get permanent hardware address */ +#define ETHTOOL_GUFO 0x00000021 /* Get UFO enable (ethtool_value) */ +#define ETHTOOL_SUFO 0x00000022 /* Set UFO enable (ethtool_value) */ /* compatibility with older code */ #define SPARC_ETH_GSET ETHTOOL_GSET @@ -445,10 +453,11 @@ struct ethtool_ops { * it was foced up into this mode or autonegotiated. */ -/* The forced speed, 10Mb, 100Mb, gigabit, 10GbE. */ +/* The forced speed, 10Mb, 100Mb, gigabit, 2.5Gb, 10GbE. */ #define SPEED_10 10 #define SPEED_100 100 #define SPEED_1000 1000 +#define SPEED_2500 2500 #define SPEED_10000 10000 /* Duplex, half or full. */ diff --git a/include/linux/fb.h b/include/linux/fb.h index c698055266d0..04a58f33ec53 100644 --- a/include/linux/fb.h +++ b/include/linux/fb.h @@ -201,6 +201,14 @@ struct fb_bitfield { #define FB_VMODE_SMOOTH_XPAN 512 /* smooth xpan possible (internally used) */ #define FB_VMODE_CONUPDATE 512 /* don't update x/yoffset */ +/* + * Display rotation support + */ +#define FB_ROTATE_UR 0 +#define FB_ROTATE_CW 1 +#define FB_ROTATE_UD 2 +#define FB_ROTATE_CCW 3 + #define PICOS2KHZ(a) (1000000000UL/(a)) #define KHZ2PICOS(a) (1000000000UL/(a)) @@ -489,9 +497,9 @@ struct fb_cursor_user { #define FB_EVENT_MODE_DELETE 0x04 /* A driver registered itself */ #define FB_EVENT_FB_REGISTERED 0x05 -/* get console to framebuffer mapping */ +/* CONSOLE-SPECIFIC: get console to framebuffer mapping */ #define FB_EVENT_GET_CONSOLE_MAP 0x06 -/* set console to framebuffer mapping */ +/* CONSOLE-SPECIFIC: set console to framebuffer mapping */ #define FB_EVENT_SET_CONSOLE_MAP 0x07 /* A display blank is requested */ #define FB_EVENT_BLANK 0x08 @@ -500,6 +508,12 @@ struct fb_cursor_user { /* The resolution of the passed in fb_info about to change and all vc's should be changed */ #define FB_EVENT_MODE_CHANGE_ALL 0x0A +/* CONSOLE-SPECIFIC: set console rotation */ +#define FB_EVENT_SET_CON_ROTATE 0x0B +/* CONSOLE-SPECIFIC: get console rotation */ +#define FB_EVENT_GET_CON_ROTATE 0x0C +/* CONSOLE-SPECIFIC: rotate all consoles */ +#define FB_EVENT_SET_CON_ROTATE_ALL 0x0D struct fb_event { struct fb_info *info; @@ -810,7 +824,6 @@ struct fb_info { extern int fb_set_var(struct fb_info *info, struct fb_var_screeninfo *var); extern int fb_pan_display(struct fb_info *info, struct fb_var_screeninfo *var); extern int fb_blank(struct fb_info *info, int blank); -extern int soft_cursor(struct fb_info *info, struct fb_cursor *cursor); extern void cfb_fillrect(struct fb_info *info, const struct fb_fillrect *rect); extern void cfb_copyarea(struct fb_info *info, const struct fb_copyarea *area); extern void cfb_imageblit(struct fb_info *info, const struct fb_image *image); @@ -818,8 +831,8 @@ extern void cfb_imageblit(struct fb_info *info, const struct fb_image *image); /* drivers/video/fbmem.c */ extern int register_framebuffer(struct fb_info *fb_info); extern int unregister_framebuffer(struct fb_info *fb_info); -extern int fb_prepare_logo(struct fb_info *fb_info); -extern int fb_show_logo(struct fb_info *fb_info); +extern int fb_prepare_logo(struct fb_info *fb_info, int rotate); +extern int fb_show_logo(struct fb_info *fb_info, int rotate); extern char* fb_get_buffer_offset(struct fb_info *info, struct fb_pixmap *buf, u32 size); extern void fb_pad_unaligned_buffer(u8 *dst, u32 d_pitch, u8 *src, u32 idx, u32 height, u32 shift_high, u32 shift_low, u32 mod); @@ -829,6 +842,7 @@ extern int fb_get_color_depth(struct fb_var_screeninfo *var, struct fb_fix_screeninfo *fix); extern int fb_get_options(char *name, char **option); extern int fb_new_modelist(struct fb_info *info); +extern int fb_con_duit(struct fb_info *info, int event, void *data); extern struct fb_info *registered_fb[FB_MAX]; extern int num_registered_fb; @@ -898,11 +912,13 @@ extern struct fb_videomode *fb_match_mode(struct fb_var_screeninfo *var, struct list_head *head); extern struct fb_videomode *fb_find_best_mode(struct fb_var_screeninfo *var, struct list_head *head); -extern struct fb_videomode *fb_find_nearest_mode(struct fb_var_screeninfo *var, +extern struct fb_videomode *fb_find_nearest_mode(struct fb_videomode *mode, struct list_head *head); extern void fb_destroy_modelist(struct list_head *head); extern void fb_videomode_to_modelist(struct fb_videomode *modedb, int num, struct list_head *head); +extern struct fb_videomode *fb_find_best_display(struct fb_monspecs *specs, + struct list_head *head); /* drivers/video/fbcmap.c */ extern int fb_alloc_cmap(struct fb_cmap *cmap, int len, int transp); diff --git a/include/linux/file.h b/include/linux/file.h index f5bbd4c508b3..418b6101b59a 100644 --- a/include/linux/file.h +++ b/include/linux/file.h @@ -33,13 +33,13 @@ struct fdtable { * Open file table structure */ struct files_struct { - atomic_t count; - spinlock_t file_lock; /* Protects all the below members. Nests inside tsk->alloc_lock */ + atomic_t count; struct fdtable *fdt; struct fdtable fdtab; - fd_set close_on_exec_init; - fd_set open_fds_init; - struct file * fd_array[NR_OPEN_DEFAULT]; + fd_set close_on_exec_init; + fd_set open_fds_init; + struct file * fd_array[NR_OPEN_DEFAULT]; + spinlock_t file_lock; /* Protects concurrent writers. Nests inside tsk->alloc_lock */ }; #define files_fdtable(files) (rcu_dereference((files)->fdt)) @@ -59,9 +59,9 @@ extern void FASTCALL(set_close_on_exec(unsigned int fd, int flag)); extern void put_filp(struct file *); extern int get_unused_fd(void); extern void FASTCALL(put_unused_fd(unsigned int fd)); -struct kmem_cache_s; -extern void filp_ctor(void * objp, struct kmem_cache_s *cachep, unsigned long cflags); -extern void filp_dtor(void * objp, struct kmem_cache_s *cachep, unsigned long dflags); +struct kmem_cache; +extern void filp_ctor(void * objp, struct kmem_cache *cachep, unsigned long cflags); +extern void filp_dtor(void * objp, struct kmem_cache *cachep, unsigned long dflags); extern struct file ** alloc_fd_array(int); extern void free_fd_array(struct file **, int); diff --git a/include/linux/fs.h b/include/linux/fs.h index e0b77c5af9a0..cc35b6ac778d 100644 --- a/include/linux/fs.h +++ b/include/linux/fs.h @@ -104,6 +104,10 @@ extern int dir_notify_enable; #define MS_MOVE 8192 #define MS_REC 16384 #define MS_VERBOSE 32768 +#define MS_UNBINDABLE (1<<17) /* change to unbindable */ +#define MS_PRIVATE (1<<18) /* change to private */ +#define MS_SLAVE (1<<19) /* change to slave */ +#define MS_SHARED (1<<20) /* change to shared */ #define MS_POSIXACL (1<<16) /* VFS does not apply the umask */ #define MS_ACTIVE (1<<30) #define MS_NOUSER (1<<31) @@ -264,6 +268,7 @@ typedef void (dio_iodone_t)(struct kiocb *iocb, loff_t offset, #define ATTR_ATTR_FLAG 1024 #define ATTR_KILL_SUID 2048 #define ATTR_KILL_SGID 4096 +#define ATTR_FILE 8192 /* * This is the Inode Attributes structure, used for notify_change(). It @@ -283,6 +288,13 @@ struct iattr { struct timespec ia_atime; struct timespec ia_mtime; struct timespec ia_ctime; + + /* + * Not an attribute, but an auxilary info for filesystems wanting to + * implement an ftruncate() like method. NOTE: filesystem should + * check for (ia_valid & ATTR_FILE), and not for (ia_file != NULL). + */ + struct file *ia_file; }; /* @@ -320,7 +332,7 @@ struct address_space_operations { /* Unfortunately this kludge is needed for FIBMAP. Don't use it */ sector_t (*bmap)(struct address_space *, sector_t); int (*invalidatepage) (struct page *, unsigned long); - int (*releasepage) (struct page *, int); + int (*releasepage) (struct page *, gfp_t); ssize_t (*direct_IO)(int, struct kiocb *, const struct iovec *iov, loff_t offset, unsigned long nr_segs); struct page* (*get_xip_page)(struct address_space *, sector_t, @@ -574,7 +586,14 @@ struct file_ra_state { #define RA_FLAG_INCACHE 0x02 /* file is already in cache */ struct file { - struct list_head f_list; + /* + * fu_list becomes invalid after file_free is called and queued via + * fu_rcuhead for RCU freeing + */ + union { + struct list_head fu_list; + struct rcu_head fu_rcuhead; + } f_u; struct dentry *f_dentry; struct vfsmount *f_vfsmnt; struct file_operations *f_op; @@ -598,7 +617,6 @@ struct file { spinlock_t f_ep_lock; #endif /* #ifdef CONFIG_EPOLL */ struct address_space *f_mapping; - struct rcu_head f_rcuhead; }; extern spinlock_t files_lock; #define file_list_lock() spin_lock(&files_lock); @@ -856,6 +874,7 @@ static inline void unlock_super(struct super_block * sb) /* * VFS helper functions.. */ +extern int vfs_permission(struct nameidata *, int); extern int vfs_create(struct inode *, struct dentry *, int, struct nameidata *); extern int vfs_mkdir(struct inode *, struct dentry *, int); extern int vfs_mknod(struct inode *, struct dentry *, int, dev_t); @@ -871,6 +890,11 @@ extern int vfs_rename(struct inode *, struct dentry *, struct inode *, struct de extern void dentry_unhash(struct dentry *dentry); /* + * VFS file helper functions. + */ +extern int file_permission(struct file *, int); + +/* * File types * * NOTE! These match bits 12..15 of stat.st_mode @@ -1082,6 +1106,8 @@ int sync_inode(struct inode *inode, struct writeback_control *wbc); * @get_name: find the name for a given inode in a given directory * @get_parent: find the parent of a given directory * @get_dentry: find a dentry for the inode given a file handle sub-fragment + * @find_exported_dentry: + * set by the exporting module to a standard helper function. * * Description: * The export_operations structure provides a means for nfsd to communicate @@ -1233,7 +1259,12 @@ extern int unregister_filesystem(struct file_system_type *); extern struct vfsmount *kern_mount(struct file_system_type *); extern int may_umount_tree(struct vfsmount *); extern int may_umount(struct vfsmount *); +extern void umount_tree(struct vfsmount *, int, struct list_head *); +extern void release_mounts(struct list_head *); extern long do_mount(char *, char *, char *, unsigned long, void *); +extern struct vfsmount *copy_tree(struct vfsmount *, struct dentry *, int); +extern void mnt_set_mountpoint(struct vfsmount *, struct dentry *, + struct vfsmount *); extern int vfs_statfs(struct super_block *, struct kstatfs *); @@ -1282,7 +1313,7 @@ static inline int break_lease(struct inode *inode, unsigned int mode) /* fs/open.c */ -extern int do_truncate(struct dentry *, loff_t start); +extern int do_truncate(struct dentry *, loff_t start, struct file *filp); extern long do_sys_open(const char __user *filename, int flags, int mode); extern struct file *filp_open(const char *, int, int); extern struct file * dentry_open(struct dentry *, struct vfsmount *, int); diff --git a/include/linux/fs_enet_pd.h b/include/linux/fs_enet_pd.h new file mode 100644 index 000000000000..783c476b8674 --- /dev/null +++ b/include/linux/fs_enet_pd.h @@ -0,0 +1,135 @@ +/* + * Platform information definitions for the + * universal Freescale Ethernet driver. + * + * Copyright (c) 2003 Intracom S.A. + * by Pantelis Antoniou <panto@intracom.gr> + * + * 2005 (c) MontaVista Software, Inc. + * Vitaly Bordug <vbordug@ru.mvista.com> + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ + +#ifndef FS_ENET_PD_H +#define FS_ENET_PD_H + +#include <asm/types.h> + +#define FS_ENET_NAME "fs_enet" + +enum fs_id { + fsid_fec1, + fsid_fec2, + fsid_fcc1, + fsid_fcc2, + fsid_fcc3, + fsid_scc1, + fsid_scc2, + fsid_scc3, + fsid_scc4, +}; + +#define FS_MAX_INDEX 9 + +static inline int fs_get_fec_index(enum fs_id id) +{ + if (id >= fsid_fec1 && id <= fsid_fec2) + return id - fsid_fec1; + return -1; +} + +static inline int fs_get_fcc_index(enum fs_id id) +{ + if (id >= fsid_fcc1 && id <= fsid_fcc3) + return id - fsid_fcc1; + return -1; +} + +static inline int fs_get_scc_index(enum fs_id id) +{ + if (id >= fsid_scc1 && id <= fsid_scc4) + return id - fsid_scc1; + return -1; +} + +enum fs_mii_method { + fsmii_fixed, + fsmii_fec, + fsmii_bitbang, +}; + +enum fs_ioport { + fsiop_porta, + fsiop_portb, + fsiop_portc, + fsiop_portd, + fsiop_porte, +}; + +struct fs_mii_bus_info { + int method; /* mii method */ + int id; /* the id of the mii_bus */ + int disable_aneg; /* if the controller needs to negothiate speed & duplex */ + int lpa; /* the default board-specific vallues will be applied otherwise */ + + union { + struct { + int duplex; + int speed; + } fixed; + + struct { + /* nothing */ + } fec; + + struct { + /* nothing */ + } scc; + + struct { + int mdio_port; /* port & bit for MDIO */ + int mdio_bit; + int mdc_port; /* port & bit for MDC */ + int mdc_bit; + int delay; /* delay in us */ + } bitbang; + } i; +}; + +struct fs_platform_info { + + void(*init_ioports)(void); + /* device specific information */ + int fs_no; /* controller index */ + + u32 cp_page; /* CPM page */ + u32 cp_block; /* CPM sblock */ + + u32 clk_trx; /* some stuff for pins & mux configuration*/ + u32 clk_route; + u32 clk_mask; + + u32 mem_offset; + u32 dpram_offset; + u32 fcc_regs_c; + + u32 device_flags; + + int phy_addr; /* the phy address (-1 no phy) */ + int phy_irq; /* the phy irq (if it exists) */ + + const struct fs_mii_bus_info *bus_info; + + int rx_ring, tx_ring; /* number of buffers on rx */ + __u8 macaddr[6]; /* mac address */ + int rx_copybreak; /* limit we copy small frames */ + int use_napi; /* use NAPI */ + int napi_weight; /* NAPI weight */ + + int use_rmii; /* use RMII mode */ +}; + +#endif diff --git a/include/linux/fsl_devices.h b/include/linux/fsl_devices.h index 70f54af87b9f..934aa9bda481 100644 --- a/include/linux/fsl_devices.h +++ b/include/linux/fsl_devices.h @@ -4,7 +4,7 @@ * Definitions for any platform device related flags or structures for * Freescale processor devices * - * Maintainer: Kumar Gala (kumar.gala@freescale.com) + * Maintainer: Kumar Gala <galak@kernel.crashing.org> * * Copyright 2004 Freescale Semiconductor, Inc * @@ -47,16 +47,21 @@ struct gianfar_platform_data { /* device specific information */ u32 device_flags; - u32 phy_reg_addr; /* board specific information */ u32 board_flags; - u32 phy_flags; - u32 phyid; - u32 interruptPHY; + const char *bus_id; u8 mac_addr[6]; }; +struct gianfar_mdio_data { + /* device specific information */ + u32 paddr; + + /* board specific information */ + int irq[32]; +}; + /* Flags related to gianfar device features */ #define FSL_GIANFAR_DEV_HAS_GIGABIT 0x00000001 #define FSL_GIANFAR_DEV_HAS_COALESCE 0x00000002 diff --git a/include/linux/fuse.h b/include/linux/fuse.h index acbeb96a3353..b76b558b03d4 100644 --- a/include/linux/fuse.h +++ b/include/linux/fuse.h @@ -14,7 +14,7 @@ #define FUSE_KERNEL_VERSION 7 /** Minor version number of this interface */ -#define FUSE_KERNEL_MINOR_VERSION 2 +#define FUSE_KERNEL_MINOR_VERSION 3 /** The node ID of the root inode */ #define FUSE_ROOT_ID 1 @@ -61,7 +61,7 @@ struct fuse_kstatfs { #define FATTR_SIZE (1 << 3) #define FATTR_ATIME (1 << 4) #define FATTR_MTIME (1 << 5) -#define FATTR_CTIME (1 << 6) +#define FATTR_FH (1 << 6) /** * Flags returned by the OPEN request @@ -100,7 +100,9 @@ enum fuse_opcode { FUSE_OPENDIR = 27, FUSE_READDIR = 28, FUSE_RELEASEDIR = 29, - FUSE_FSYNCDIR = 30 + FUSE_FSYNCDIR = 30, + FUSE_ACCESS = 34, + FUSE_CREATE = 35 }; /* Conservative buffer size for the client */ @@ -153,12 +155,25 @@ struct fuse_link_in { struct fuse_setattr_in { __u32 valid; __u32 padding; - struct fuse_attr attr; + __u64 fh; + __u64 size; + __u64 unused1; + __u64 atime; + __u64 mtime; + __u64 unused2; + __u32 atimensec; + __u32 mtimensec; + __u32 unused3; + __u32 mode; + __u32 unused4; + __u32 uid; + __u32 gid; + __u32 unused5; }; struct fuse_open_in { __u32 flags; - __u32 padding; + __u32 mode; }; struct fuse_open_out { @@ -223,6 +238,11 @@ struct fuse_getxattr_out { __u32 padding; }; +struct fuse_access_in { + __u32 mask; + __u32 padding; +}; + struct fuse_init_in_out { __u32 major; __u32 minor; diff --git a/include/linux/gameport.h b/include/linux/gameport.h index cd623eccdbea..2401dea2b867 100644 --- a/include/linux/gameport.h +++ b/include/linux/gameport.h @@ -12,6 +12,7 @@ #include <asm/io.h> #include <linux/list.h> #include <linux/device.h> +#include <linux/timer.h> struct gameport { diff --git a/include/linux/genetlink.h b/include/linux/genetlink.h new file mode 100644 index 000000000000..84f12a41dc01 --- /dev/null +++ b/include/linux/genetlink.h @@ -0,0 +1,51 @@ +#ifndef __LINUX_GENERIC_NETLINK_H +#define __LINUX_GENERIC_NETLINK_H + +#include <linux/netlink.h> + +#define GENL_NAMSIZ 16 /* length of family name */ + +#define GENL_MIN_ID NLMSG_MIN_TYPE +#define GENL_MAX_ID 1023 + +struct genlmsghdr { + __u8 cmd; + __u8 version; + __u16 reserved; +}; + +#define GENL_HDRLEN NLMSG_ALIGN(sizeof(struct genlmsghdr)) + +/* + * List of reserved static generic netlink identifiers: + */ +#define GENL_ID_GENERATE 0 +#define GENL_ID_CTRL NLMSG_MIN_TYPE + +/************************************************************************** + * Controller + **************************************************************************/ + +enum { + CTRL_CMD_UNSPEC, + CTRL_CMD_NEWFAMILY, + CTRL_CMD_DELFAMILY, + CTRL_CMD_GETFAMILY, + CTRL_CMD_NEWOPS, + CTRL_CMD_DELOPS, + CTRL_CMD_GETOPS, + __CTRL_CMD_MAX, +}; + +#define CTRL_CMD_MAX (__CTRL_CMD_MAX - 1) + +enum { + CTRL_ATTR_UNSPEC, + CTRL_ATTR_FAMILY_ID, + CTRL_ATTR_FAMILY_NAME, + __CTRL_ATTR_MAX, +}; + +#define CTRL_ATTR_MAX (__CTRL_ATTR_MAX - 1) + +#endif /* __LINUX_GENERIC_NETLINK_H */ diff --git a/include/linux/genhd.h b/include/linux/genhd.h index 01796c41c951..eef5ccdcd731 100644 --- a/include/linux/genhd.h +++ b/include/linux/genhd.h @@ -78,7 +78,7 @@ struct hd_struct { sector_t start_sect; sector_t nr_sects; struct kobject kobj; - unsigned reads, read_sectors, writes, write_sectors; + unsigned ios[2], sectors[2]; /* READs and WRITEs */ int policy, partno; }; @@ -89,10 +89,10 @@ struct hd_struct { #define GENHD_FL_SUPPRESS_PARTITION_INFO 32 struct disk_stats { - unsigned read_sectors, write_sectors; - unsigned reads, writes; - unsigned read_merges, write_merges; - unsigned read_ticks, write_ticks; + unsigned sectors[2]; /* READs and WRITEs */ + unsigned ios[2]; + unsigned merges[2]; + unsigned ticks[2]; unsigned io_ticks; unsigned time_in_queue; }; @@ -119,7 +119,7 @@ struct gendisk { int policy; atomic_t sync_io; /* RAID */ - unsigned long stamp, stamp_idle; + unsigned long stamp; int in_flight; #ifdef CONFIG_SMP struct disk_stats *dkstats; @@ -132,6 +132,7 @@ struct gendisk { struct disk_attribute { struct attribute attr; ssize_t (*show)(struct gendisk *, char *); + ssize_t (*store)(struct gendisk *, const char *, size_t); }; /* diff --git a/include/linux/gfp.h b/include/linux/gfp.h index 4dc990f3b5cc..8b2eab90abb6 100644 --- a/include/linux/gfp.h +++ b/include/linux/gfp.h @@ -11,9 +11,16 @@ struct vm_area_struct; /* * GFP bitmasks.. */ -/* Zone modifiers in GFP_ZONEMASK (see linux/mmzone.h - low two bits) */ -#define __GFP_DMA 0x01u -#define __GFP_HIGHMEM 0x02u +/* Zone modifiers in GFP_ZONEMASK (see linux/mmzone.h - low three bits) */ +#define __GFP_DMA ((__force gfp_t)0x01u) +#define __GFP_HIGHMEM ((__force gfp_t)0x02u) +#ifdef CONFIG_DMA_IS_DMA32 +#define __GFP_DMA32 ((__force gfp_t)0x01) /* ZONE_DMA is ZONE_DMA32 */ +#elif BITS_PER_LONG < 64 +#define __GFP_DMA32 ((__force gfp_t)0x00) /* ZONE_NORMAL is ZONE_DMA32 */ +#else +#define __GFP_DMA32 ((__force gfp_t)0x04) /* Has own ZONE_DMA32 */ +#endif /* * Action modifiers - doesn't change the zoning @@ -26,30 +33,29 @@ struct vm_area_struct; * * __GFP_NORETRY: The VM implementation must not retry indefinitely. */ -#define __GFP_WAIT 0x10u /* Can wait and reschedule? */ -#define __GFP_HIGH 0x20u /* Should access emergency pools? */ -#define __GFP_IO 0x40u /* Can start physical IO? */ -#define __GFP_FS 0x80u /* Can call down to low-level FS? */ -#define __GFP_COLD 0x100u /* Cache-cold page required */ -#define __GFP_NOWARN 0x200u /* Suppress page allocation failure warning */ -#define __GFP_REPEAT 0x400u /* Retry the allocation. Might fail */ -#define __GFP_NOFAIL 0x800u /* Retry for ever. Cannot fail */ -#define __GFP_NORETRY 0x1000u /* Do not retry. Might fail */ -#define __GFP_NO_GROW 0x2000u /* Slab internal usage */ -#define __GFP_COMP 0x4000u /* Add compound page metadata */ -#define __GFP_ZERO 0x8000u /* Return zeroed page on success */ -#define __GFP_NOMEMALLOC 0x10000u /* Don't use emergency reserves */ -#define __GFP_NORECLAIM 0x20000u /* No realy zone reclaim during allocation */ -#define __GFP_HARDWALL 0x40000u /* Enforce hardwall cpuset memory allocs */ +#define __GFP_WAIT ((__force gfp_t)0x10u) /* Can wait and reschedule? */ +#define __GFP_HIGH ((__force gfp_t)0x20u) /* Should access emergency pools? */ +#define __GFP_IO ((__force gfp_t)0x40u) /* Can start physical IO? */ +#define __GFP_FS ((__force gfp_t)0x80u) /* Can call down to low-level FS? */ +#define __GFP_COLD ((__force gfp_t)0x100u) /* Cache-cold page required */ +#define __GFP_NOWARN ((__force gfp_t)0x200u) /* Suppress page allocation failure warning */ +#define __GFP_REPEAT ((__force gfp_t)0x400u) /* Retry the allocation. Might fail */ +#define __GFP_NOFAIL ((__force gfp_t)0x800u) /* Retry for ever. Cannot fail */ +#define __GFP_NORETRY ((__force gfp_t)0x1000u)/* Do not retry. Might fail */ +#define __GFP_NO_GROW ((__force gfp_t)0x2000u)/* Slab internal usage */ +#define __GFP_COMP ((__force gfp_t)0x4000u)/* Add compound page metadata */ +#define __GFP_ZERO ((__force gfp_t)0x8000u)/* Return zeroed page on success */ +#define __GFP_NOMEMALLOC ((__force gfp_t)0x10000u) /* Don't use emergency reserves */ +#define __GFP_HARDWALL ((__force gfp_t)0x20000u) /* Enforce hardwall cpuset memory allocs */ #define __GFP_BITS_SHIFT 20 /* Room for 20 __GFP_FOO bits */ -#define __GFP_BITS_MASK ((1 << __GFP_BITS_SHIFT) - 1) +#define __GFP_BITS_MASK ((__force gfp_t)((1 << __GFP_BITS_SHIFT) - 1)) /* if you forget to add the bitmask here kernel will crash, period */ #define GFP_LEVEL_MASK (__GFP_WAIT|__GFP_HIGH|__GFP_IO|__GFP_FS| \ __GFP_COLD|__GFP_NOWARN|__GFP_REPEAT| \ __GFP_NOFAIL|__GFP_NORETRY|__GFP_NO_GROW|__GFP_COMP| \ - __GFP_NOMEMALLOC|__GFP_NORECLAIM|__GFP_HARDWALL) + __GFP_NOMEMALLOC|__GFP_HARDWALL) #define GFP_ATOMIC (__GFP_HIGH) #define GFP_NOIO (__GFP_WAIT) @@ -64,6 +70,16 @@ struct vm_area_struct; #define GFP_DMA __GFP_DMA +/* 4GB DMA on some platforms */ +#define GFP_DMA32 __GFP_DMA32 + + +static inline int gfp_zone(gfp_t gfp) +{ + int zone = GFP_ZONEMASK & (__force int) gfp; + BUG_ON(zone >= GFP_ZONETYPES); + return zone; +} /* * There is only one page-allocator function, and two main namespaces to @@ -85,30 +101,30 @@ static inline void arch_free_page(struct page *page, int order) { } #endif extern struct page * -FASTCALL(__alloc_pages(unsigned int, unsigned int, struct zonelist *)); +FASTCALL(__alloc_pages(gfp_t, unsigned int, struct zonelist *)); -static inline struct page *alloc_pages_node(int nid, unsigned int __nocast gfp_mask, +static inline struct page *alloc_pages_node(int nid, gfp_t gfp_mask, unsigned int order) { if (unlikely(order >= MAX_ORDER)) return NULL; return __alloc_pages(gfp_mask, order, - NODE_DATA(nid)->node_zonelists + (gfp_mask & GFP_ZONEMASK)); + NODE_DATA(nid)->node_zonelists + gfp_zone(gfp_mask)); } #ifdef CONFIG_NUMA -extern struct page *alloc_pages_current(unsigned int __nocast gfp_mask, unsigned order); +extern struct page *alloc_pages_current(gfp_t gfp_mask, unsigned order); static inline struct page * -alloc_pages(unsigned int __nocast gfp_mask, unsigned int order) +alloc_pages(gfp_t gfp_mask, unsigned int order) { if (unlikely(order >= MAX_ORDER)) return NULL; return alloc_pages_current(gfp_mask, order); } -extern struct page *alloc_page_vma(unsigned __nocast gfp_mask, +extern struct page *alloc_page_vma(gfp_t gfp_mask, struct vm_area_struct *vma, unsigned long addr); #else #define alloc_pages(gfp_mask, order) \ @@ -117,8 +133,8 @@ extern struct page *alloc_page_vma(unsigned __nocast gfp_mask, #endif #define alloc_page(gfp_mask) alloc_pages(gfp_mask, 0) -extern unsigned long FASTCALL(__get_free_pages(unsigned int __nocast gfp_mask, unsigned int order)); -extern unsigned long FASTCALL(get_zeroed_page(unsigned int __nocast gfp_mask)); +extern unsigned long FASTCALL(__get_free_pages(gfp_t gfp_mask, unsigned int order)); +extern unsigned long FASTCALL(get_zeroed_page(gfp_t gfp_mask)); #define __get_free_page(gfp_mask) \ __get_free_pages((gfp_mask),0) diff --git a/include/linux/hardirq.h b/include/linux/hardirq.h index 5912874ca83c..71d2b8a723b9 100644 --- a/include/linux/hardirq.h +++ b/include/linux/hardirq.h @@ -90,6 +90,8 @@ extern void synchronize_irq(unsigned int irq); #define nmi_enter() irq_enter() #define nmi_exit() sub_preempt_count(HARDIRQ_OFFSET) +struct task_struct; + #ifndef CONFIG_VIRT_CPU_ACCOUNTING static inline void account_user_vtime(struct task_struct *tsk) { diff --git a/include/linux/hdreg.h b/include/linux/hdreg.h index b5d660089de4..2b54eac738ea 100644 --- a/include/linux/hdreg.h +++ b/include/linux/hdreg.h @@ -80,10 +80,12 @@ /* * Define standard taskfile in/out register */ -#define IDE_TASKFILE_STD_OUT_FLAGS 0xFE #define IDE_TASKFILE_STD_IN_FLAGS 0xFE -#define IDE_HOB_STD_OUT_FLAGS 0x3C #define IDE_HOB_STD_IN_FLAGS 0x3C +#ifndef __KERNEL__ +#define IDE_TASKFILE_STD_OUT_FLAGS 0xFE +#define IDE_HOB_STD_OUT_FLAGS 0x3C +#endif typedef unsigned char task_ioreg_t; typedef unsigned long sata_ioreg_t; diff --git a/include/linux/hil.h b/include/linux/hil.h new file mode 100644 index 000000000000..13352d7d0caf --- /dev/null +++ b/include/linux/hil.h @@ -0,0 +1,483 @@ +#ifndef _HIL_H_ +#define _HIL_H_ + +/* + * Hewlett Packard Human Interface Loop (HP-HIL) Protocol -- header. + * + * Copyright (c) 2001 Brian S. Julin + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions, and the following disclaimer, + * without modification. + * 2. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * Alternatively, this software may be distributed under the terms of the + * GNU General Public License ("GPL"). + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * + * References: + * HP-HIL Technical Reference Manual. Hewlett Packard Product No. 45918A + * + * A note of thanks to HP for providing and shipping reference materials + * free of charge to help in the development of HIL support for Linux. + * + */ + +#include <asm/types.h> + +/* Physical constants relevant to raw loop/device timing. + */ + +#define HIL_CLOCK 8MHZ +#define HIL_EK1_CLOCK 30HZ +#define HIL_EK2_CLOCK 60HZ + +#define HIL_TIMEOUT_DEV 5 /* ms */ +#define HIL_TIMEOUT_DEVS 10 /* ms */ +#define HIL_TIMEOUT_NORESP 10 /* ms */ +#define HIL_TIMEOUT_DEVS_DATA 16 /* ms */ +#define HIL_TIMEOUT_SELFTEST 200 /* ms */ + + +/* Actual wire line coding. These will only be useful if someone is + * implementing a software MLC to run HIL devices on a non-parisc machine. + */ + +#define HIL_WIRE_PACKET_LEN 15 +enum hil_wire_bitpos { + HIL_WIRE_START = 0, + HIL_WIRE_ADDR2, + HIL_WIRE_ADDR1, + HIL_WIRE_ADDR0, + HIL_WIRE_COMMAND, + HIL_WIRE_DATA7, + HIL_WIRE_DATA6, + HIL_WIRE_DATA5, + HIL_WIRE_DATA4, + HIL_WIRE_DATA3, + HIL_WIRE_DATA2, + HIL_WIRE_DATA1, + HIL_WIRE_DATA0, + HIL_WIRE_PARITY, + HIL_WIRE_STOP +}; + +/* HP documentation uses these bit positions to refer to commands; + * we will call these "packets". + */ +enum hil_pkt_bitpos { + HIL_PKT_CMD = 0x00000800, + HIL_PKT_ADDR2 = 0x00000400, + HIL_PKT_ADDR1 = 0x00000200, + HIL_PKT_ADDR0 = 0x00000100, + HIL_PKT_ADDR_MASK = 0x00000700, + HIL_PKT_ADDR_SHIFT = 8, + HIL_PKT_DATA7 = 0x00000080, + HIL_PKT_DATA6 = 0x00000040, + HIL_PKT_DATA5 = 0x00000020, + HIL_PKT_DATA4 = 0x00000010, + HIL_PKT_DATA3 = 0x00000008, + HIL_PKT_DATA2 = 0x00000004, + HIL_PKT_DATA1 = 0x00000002, + HIL_PKT_DATA0 = 0x00000001, + HIL_PKT_DATA_MASK = 0x000000FF, + HIL_PKT_DATA_SHIFT = 0 +}; + +/* The HIL MLC also has several error/status/control bits. We extend the + * "packet" to include these when direct access to the MLC is available, + * or emulate them in cases where they are not available. + * + * This way the device driver knows that the underlying MLC driver + * has had to deal with loop errors. + */ +enum hil_error_bitpos { + HIL_ERR_OB = 0x00000800, /* MLC is busy sending an auto-poll, + or we have filled up the output + buffer and must wait. */ + HIL_ERR_INT = 0x00010000, /* A normal interrupt has occurred. */ + HIL_ERR_NMI = 0x00020000, /* An NMI has occurred. */ + HIL_ERR_LERR = 0x00040000, /* A poll didn't come back. */ + HIL_ERR_PERR = 0x01000000, /* There was a Parity Error. */ + HIL_ERR_FERR = 0x02000000, /* There was a Framing Error. */ + HIL_ERR_FOF = 0x04000000 /* Input FIFO Overflowed. */ +}; + +enum hil_control_bitpos { + HIL_CTRL_TEST = 0x00010000, + HIL_CTRL_IPF = 0x00040000, + HIL_CTRL_APE = 0x02000000 +}; + +/* Bits 30,31 are unused, we use them to control write behavior. */ +#define HIL_DO_ALTER_CTRL 0x40000000 /* Write MSW of packet to control + before writing LSW to loop */ +#define HIL_CTRL_ONLY 0xc0000000 /* *Only* alter the control registers */ + +/* This gives us a 32-bit "packet" + */ +typedef u32 hil_packet; + + +/* HIL Loop commands + */ +enum hil_command { + HIL_CMD_IFC = 0x00, /* Interface Clear */ + HIL_CMD_EPT = 0x01, /* Enter Pass-Thru Mode */ + HIL_CMD_ELB = 0x02, /* Enter Loop-Back Mode */ + HIL_CMD_IDD = 0x03, /* Identify and Describe */ + HIL_CMD_DSR = 0x04, /* Device Soft Reset */ + HIL_CMD_PST = 0x05, /* Perform Self Test */ + HIL_CMD_RRG = 0x06, /* Read Register */ + HIL_CMD_WRG = 0x07, /* Write Register */ + HIL_CMD_ACF = 0x08, /* Auto Configure */ + HIL_CMDID_ACF = 0x07, /* Auto Configure bits with incremented ID */ + HIL_CMD_POL = 0x10, /* Poll */ + HIL_CMDCT_POL = 0x0f, /* Poll command bits with item count */ + HIL_CMD_RPL = 0x20, /* RePoll */ + HIL_CMDCT_RPL = 0x0f, /* RePoll command bits with item count */ + HIL_CMD_RNM = 0x30, /* Report Name */ + HIL_CMD_RST = 0x31, /* Report Status */ + HIL_CMD_EXD = 0x32, /* Extended Describe */ + HIL_CMD_RSC = 0x33, /* Report Security Code */ + + /* 0x34 to 0x3c reserved for future use */ + + HIL_CMD_DKA = 0x3d, /* Disable Keyswitch Autorepeat */ + HIL_CMD_EK1 = 0x3e, /* Enable Keyswitch Autorepeat 1 */ + HIL_CMD_EK2 = 0x3f, /* Enable Keyswitch Autorepeat 2 */ + HIL_CMD_PR1 = 0x40, /* Prompt1 */ + HIL_CMD_PR2 = 0x41, /* Prompt2 */ + HIL_CMD_PR3 = 0x42, /* Prompt3 */ + HIL_CMD_PR4 = 0x43, /* Prompt4 */ + HIL_CMD_PR5 = 0x44, /* Prompt5 */ + HIL_CMD_PR6 = 0x45, /* Prompt6 */ + HIL_CMD_PR7 = 0x46, /* Prompt7 */ + HIL_CMD_PRM = 0x47, /* Prompt (General Purpose) */ + HIL_CMD_AK1 = 0x48, /* Acknowlege1 */ + HIL_CMD_AK2 = 0x49, /* Acknowlege2 */ + HIL_CMD_AK3 = 0x4a, /* Acknowlege3 */ + HIL_CMD_AK4 = 0x4b, /* Acknowlege4 */ + HIL_CMD_AK5 = 0x4c, /* Acknowlege5 */ + HIL_CMD_AK6 = 0x4d, /* Acknowlege6 */ + HIL_CMD_AK7 = 0x4e, /* Acknowlege7 */ + HIL_CMD_ACK = 0x4f, /* Acknowlege (General Purpose) */ + + /* 0x50 to 0x78 reserved for future use */ + /* 0x80 to 0xEF device-specific commands */ + /* 0xf0 to 0xf9 reserved for future use */ + + HIL_CMD_RIO = 0xfa, /* Register I/O Error */ + HIL_CMD_SHR = 0xfb, /* System Hard Reset */ + HIL_CMD_TER = 0xfc, /* Transmission Error */ + HIL_CMD_CAE = 0xfd, /* Configuration Address Error */ + HIL_CMD_DHR = 0xfe, /* Device Hard Reset */ + + /* 0xff is prohibited from use. */ +}; + + +/* + * Response "records" to HIL commands + */ + +/* Device ID byte + */ +#define HIL_IDD_DID_TYPE_MASK 0xe0 /* Primary type bits */ +#define HIL_IDD_DID_TYPE_KB_INTEGRAL 0xa0 /* Integral keyboard */ +#define HIL_IDD_DID_TYPE_KB_ITF 0xc0 /* ITD keyboard */ +#define HIL_IDD_DID_TYPE_KB_RSVD 0xe0 /* Reserved keyboard type */ +#define HIL_IDD_DID_TYPE_KB_LANG_MASK 0x1f /* Keyboard locale bits */ +#define HIL_IDD_DID_KBLANG_USE_ESD 0x00 /* Use ESD Locale instead */ +#define HIL_IDD_DID_TYPE_ABS 0x80 /* Absolute Positioners */ +#define HIL_IDD_DID_ABS_RSVD1_MASK 0xf8 /* Reserved */ +#define HIL_IDD_DID_ABS_RSVD1 0x98 +#define HIL_IDD_DID_ABS_TABLET_MASK 0xf8 /* Tablets and digitizers */ +#define HIL_IDD_DID_ABS_TABLET 0x90 +#define HIL_IDD_DID_ABS_TSCREEN_MASK 0xfc /* Touch screens */ +#define HIL_IDD_DID_ABS_TSCREEN 0x8c +#define HIL_IDD_DID_ABS_RSVD2_MASK 0xfc /* Reserved */ +#define HIL_IDD_DID_ABS_RSVD2 0x88 +#define HIL_IDD_DID_ABS_RSVD3_MASK 0xfc /* Reserved */ +#define HIL_IDD_DID_ABS_RSVD3 0x80 +#define HIL_IDD_DID_TYPE_REL 0x60 /* Relative Positioners */ +#define HIL_IDD_DID_REL_RSVD1_MASK 0xf0 /* Reserved */ +#define HIL_IDD_DID_REL_RSVD1 0x70 +#define HIL_IDD_DID_REL_RSVD2_MASK 0xfc /* Reserved */ +#define HIL_IDD_DID_REL_RSVD2 0x6c +#define HIL_IDD_DID_REL_MOUSE_MASK 0xfc /* Mouse */ +#define HIL_IDD_DID_REL_MOUSE 0x68 +#define HIL_IDD_DID_REL_QUAD_MASK 0xf8 /* Other Quadrature Devices */ +#define HIL_IDD_DID_REL_QUAD 0x60 +#define HIL_IDD_DID_TYPE_CHAR 0x40 /* Character Entry */ +#define HIL_IDD_DID_CHAR_BARCODE_MASK 0xfc /* Barcode Reader */ +#define HIL_IDD_DID_CHAR_BARCODE 0x5c +#define HIL_IDD_DID_CHAR_RSVD1_MASK 0xfc /* Reserved */ +#define HIL_IDD_DID_CHAR_RSVD1 0x58 +#define HIL_IDD_DID_CHAR_RSVD2_MASK 0xf8 /* Reserved */ +#define HIL_IDD_DID_CHAR_RSVD2 0x50 +#define HIL_IDD_DID_CHAR_RSVD3_MASK 0xf0 /* Reserved */ +#define HIL_IDD_DID_CHAR_RSVD3 0x40 +#define HIL_IDD_DID_TYPE_OTHER 0x20 /* Miscellaneous */ +#define HIL_IDD_DID_OTHER_RSVD1_MASK 0xf0 /* Reserved */ +#define HIL_IDD_DID_OTHER_RSVD1 0x30 +#define HIL_IDD_DID_OTHER_BARCODE_MASK 0xfc /* Tone Generator */ +#define HIL_IDD_DID_OTHER_BARCODE 0x2c +#define HIL_IDD_DID_OTHER_RSVD2_MASK 0xfc /* Reserved */ +#define HIL_IDD_DID_OTHER_RSVD2 0x28 +#define HIL_IDD_DID_OTHER_RSVD3_MASK 0xf8 /* Reserved */ +#define HIL_IDD_DID_OTHER_RSVD3 0x20 +#define HIL_IDD_DID_TYPE_KEYPAD 0x00 /* Vectra Keyboard */ + +/* IDD record header + */ +#define HIL_IDD_HEADER_AXSET_MASK 0x03 /* Number of axis in a set */ +#define HIL_IDD_HEADER_RSC 0x04 /* Supports RSC command */ +#define HIL_IDD_HEADER_EXD 0x08 /* Supports EXD command */ +#define HIL_IDD_HEADER_IOD 0x10 /* IOD byte to follow */ +#define HIL_IDD_HEADER_16BIT 0x20 /* 16 (vs. 8) bit resolution */ +#define HIL_IDD_HEADER_ABS 0x40 /* Reports Absolute Position */ +#define HIL_IDD_HEADER_2X_AXIS 0x80 /* Two sets of 1-3 axis */ + +/* I/O Descriptor + */ +#define HIL_IDD_IOD_NBUTTON_MASK 0x07 /* Number of buttons */ +#define HIL_IDD_IOD_PROXIMITY 0x08 /* Proximity in/out events */ +#define HIL_IDD_IOD_PROMPT_MASK 0x70 /* Number of prompts/acks */ +#define HIL_IDD_IOD_PROMPT_SHIFT 4 +#define HIL_IDD_IOD_PROMPT 0x80 /* Generic prompt/ack */ + +#define HIL_IDD_NUM_AXES_PER_SET(header_packet) \ +((header_packet) & HIL_IDD_HEADER_AXSET_MASK) + +#define HIL_IDD_NUM_AXSETS(header_packet) \ +(2 - !((header_packet) & HIL_IDD_HEADER_2X_AXIS)) + +#define HIL_IDD_LEN(header_packet) \ +((4 - !(header_packet & HIL_IDD_HEADER_IOD) - \ + 2 * !(HIL_IDD_NUM_AXES_PER_SET(header_packet))) + \ + 2 * HIL_IDD_NUM_AXES_PER_SET(header_packet) * \ + !!((header_packet) & HIL_IDD_HEADER_ABS)) + +/* The following HIL_IDD_* macros assume you have an array of + * packets and/or unpacked 8-bit data in the order that they + * were received. + */ + +#define HIL_IDD_AXIS_COUNTS_PER_M(header_ptr) \ +(!(HIL_IDD_NUM_AXSETS(*(header_ptr))) ? -1 : \ +(((*(header_ptr + 1) & HIL_PKT_DATA_MASK) + \ + ((*(header_ptr + 2) & HIL_PKT_DATA_MASK)) << 8) \ +* ((*(header_ptr) & HIL_IDD_HEADER_16BIT) ? 100 : 1))) + +#define HIL_IDD_AXIS_MAX(header_ptr, __axnum) \ +((!(*(header_ptr) & HIL_IDD_HEADER_ABS) || \ + (HIL_IDD_NUM_AXES_PER_SET(*(header_ptr)) <= __axnum)) ? 0 : \ + ((HIL_PKT_DATA_MASK & *((header_ptr) + 3 + 2 * __axnum)) + \ + ((HIL_PKT_DATA_MASK & *((header_ptr) + 4 + 2 * __axnum)) << 8))) + +#define HIL_IDD_IOD(header_ptr) \ +(*(header_ptr + HIL_IDD_LEN((*header_ptr)) - 1)) + +#define HIL_IDD_HAS_GEN_PROMPT(header_ptr) \ +((*header_ptr & HIL_IDD_HEADER_IOD) && \ + (HIL_IDD_IOD(header_ptr) & HIL_IDD_IOD_PROMPT)) + +#define HIL_IDD_HAS_GEN_PROXIMITY(header_ptr) \ +((*header_ptr & HIL_IDD_HEADER_IOD) && \ + (HIL_IDD_IOD(header_ptr) & HIL_IDD_IOD_PROXIMITY)) + +#define HIL_IDD_NUM_BUTTONS(header_ptr) \ +((*header_ptr & HIL_IDD_HEADER_IOD) ? \ + (HIL_IDD_IOD(header_ptr) & HIL_IDD_IOD_NBUTTON_MASK) : 0) + +#define HIL_IDD_NUM_PROMPTS(header_ptr) \ +((*header_ptr & HIL_IDD_HEADER_IOD) ? \ + ((HIL_IDD_IOD(header_ptr) & HIL_IDD_IOD_NPROMPT_MASK) \ + >> HIL_IDD_IOD_PROMPT_SHIFT) : 0) + +/* The response to HIL EXD commands -- the "extended describe record" */ +#define HIL_EXD_HEADER_WRG 0x03 /* Supports type2 WRG */ +#define HIL_EXD_HEADER_WRG_TYPE1 0x01 /* Supports type1 WRG */ +#define HIL_EXD_HEADER_WRG_TYPE2 0x02 /* Supports type2 WRG */ +#define HIL_EXD_HEADER_RRG 0x04 /* Supports RRG command */ +#define HIL_EXD_HEADER_RNM 0x10 /* Supports RNM command */ +#define HIL_EXD_HEADER_RST 0x20 /* Supports RST command */ +#define HIL_EXD_HEADER_LOCALE 0x40 /* Contains locale code */ + +#define HIL_EXD_NUM_RRG(header_ptr) \ +((*header_ptr & HIL_EXD_HEADER_RRG) ? \ + (*(header_ptr + 1) & HIL_PKT_DATA_MASK) : 0) + +#define HIL_EXD_NUM_WWG(header_ptr) \ +((*header_ptr & HIL_EXD_HEADER_WRG) ? \ + (*(header_ptr + 2 - !(*header_ptr & HIL_EXD_HEADER_RRG)) & \ + HIL_PKT_DATA_MASK) : 0) + +#define HIL_EXD_LEN(header_ptr) \ +(!!(*header_ptr & HIL_EXD_HEADER_RRG) + \ + !!(*header_ptr & HIL_EXD_HEADER_WRG) + \ + !!(*header_ptr & HIL_EXD_HEADER_LOCALE) + \ + 2 * !!(*header_ptr & HIL_EXD_HEADER_WRG_TYPE2) + 1) + +#define HIL_EXD_LOCALE(header_ptr) \ +(!(*header_ptr & HIL_EXD_HEADER_LOCALE) ? -1 : \ + (*(header_ptr + HIL_EXD_LEN(header_ptr) - 1) & HIL_PKT_DATA_MASK)) + +#define HIL_EXD_WRG_TYPE2_LEN(header_ptr) \ +(!(*header_ptr & HIL_EXD_HEADER_WRG_TYPE2) ? -1 : \ + (*(header_ptr + HIL_EXD_LEN(header_ptr) - 2 - \ + !!(*header_ptr & HIL_EXD_HEADER_LOCALE)) & HIL_PKT_DATA_MASK) + \ + ((*(header_ptr + HIL_EXD_LEN(header_ptr) - 1 - \ + !!(*header_ptr & HIL_EXD_HEADER_LOCALE)) & HIL_PKT_DATA_MASK) << 8)) + +/* Device locale codes. */ + +/* Last defined locale code. Everything above this is "Reserved", + and note that this same table applies to the Device ID Byte where + keyboards may have a nationality code which is only 5 bits. */ +#define HIL_LOCALE_MAX 0x1f + +/* Map to hopefully useful strings. I was trying to make these look + like locale.aliases strings do; maybe that isn't the right table to + emulate. In either case, I didn't have much to work on. */ +#define HIL_LOCALE_MAP \ +"", /* 0x00 Reserved */ \ +"", /* 0x01 Reserved */ \ +"", /* 0x02 Reserved */ \ +"swiss.french", /* 0x03 Swiss/French */ \ +"portuguese", /* 0x04 Portuguese */ \ +"arabic", /* 0x05 Arabic */ \ +"hebrew", /* 0x06 Hebrew */ \ +"english.canadian", /* 0x07 Canadian English */ \ +"turkish", /* 0x08 Turkish */ \ +"greek", /* 0x09 Greek */ \ +"thai", /* 0x0a Thai (Thailand) */ \ +"italian", /* 0x0b Italian */ \ +"korean", /* 0x0c Hangul (Korea) */ \ +"dutch", /* 0x0d Dutch */ \ +"swedish", /* 0x0e Swedish */ \ +"german", /* 0x0f German */ \ +"chinese", /* 0x10 Chinese-PRC */ \ +"chinese", /* 0x11 Chinese-ROC */ \ +"swiss.french", /* 0x12 Swiss/French II */ \ +"spanish", /* 0x13 Spanish */ \ +"swiss.german", /* 0x14 Swiss/German II */ \ +"flemish", /* 0x15 Belgian (Flemish) */ \ +"finnish", /* 0x16 Finnish */ \ +"english.uk", /* 0x17 United Kingdom */ \ +"french.canadian", /* 0x18 French/Canadian */ \ +"swiss.german", /* 0x19 Swiss/German */ \ +"norwegian", /* 0x1a Norwegian */ \ +"french", /* 0x1b French */ \ +"danish", /* 0x1c Danish */ \ +"japanese", /* 0x1d Katakana */ \ +"spanish", /* 0x1e Latin American/Spanish*/\ +"english.us" /* 0x1f United States */ \ + + +/* HIL keycodes */ +#define HIL_KEYCODES_SET1_TBLSIZE 128 +#define HIL_KEYCODES_SET1 \ + KEY_5, KEY_RESERVED, KEY_RIGHTALT, KEY_LEFTALT, \ + KEY_RIGHTSHIFT, KEY_LEFTSHIFT, KEY_LEFTCTRL, KEY_SYSRQ, \ + KEY_KP4, KEY_KP8, KEY_KP5, KEY_KP9, \ + KEY_KP6, KEY_KP7, KEY_KPCOMMA, KEY_KPENTER, \ + KEY_KP1, KEY_KPSLASH, KEY_KP2, KEY_KPPLUS, \ + KEY_KP3, KEY_KPASTERISK, KEY_KP0, KEY_KPMINUS, \ + KEY_B, KEY_V, KEY_C, KEY_X, \ + KEY_Z, KEY_RESERVED, KEY_RESERVED, KEY_ESC, \ + KEY_6, KEY_F10, KEY_3, KEY_F11, \ + KEY_KPDOT, KEY_F9, KEY_TAB /*KP*/, KEY_F12, \ + KEY_H, KEY_G, KEY_F, KEY_D, \ + KEY_S, KEY_A, KEY_RESERVED, KEY_CAPSLOCK, \ + KEY_U, KEY_Y, KEY_T, KEY_R, \ + KEY_E, KEY_W, KEY_Q, KEY_TAB, \ + KEY_7, KEY_6, KEY_5, KEY_4, \ + KEY_3, KEY_2, KEY_1, KEY_GRAVE, \ + KEY_F13, KEY_F14, KEY_F15, KEY_F16, \ + KEY_F17, KEY_F18, KEY_F19, KEY_F20, \ + KEY_MENU, KEY_F4, KEY_F3, KEY_F2, \ + KEY_F1, KEY_VOLUMEUP, KEY_STOP, KEY_SENDFILE, \ + KEY_SYSRQ, KEY_F5, KEY_F6, KEY_F7, \ + KEY_F8, KEY_VOLUMEDOWN, KEY_DEL_EOL, KEY_DEL_EOS, \ + KEY_8, KEY_9, KEY_0, KEY_MINUS, \ + KEY_EQUAL, KEY_BACKSPACE, KEY_INS_LINE, KEY_DEL_LINE, \ + KEY_I, KEY_O, KEY_P, KEY_LEFTBRACE, \ + KEY_RIGHTBRACE, KEY_BACKSLASH, KEY_INSERT, KEY_DELETE, \ + KEY_J, KEY_K, KEY_L, KEY_SEMICOLON, \ + KEY_APOSTROPHE, KEY_ENTER, KEY_HOME, KEY_PAGEUP, \ + KEY_M, KEY_COMMA, KEY_DOT, KEY_SLASH, \ + KEY_BACKSLASH, KEY_SELECT, KEY_102ND, KEY_PAGEDOWN, \ + KEY_N, KEY_SPACE, KEY_NEXT, KEY_RESERVED, \ + KEY_LEFT, KEY_DOWN, KEY_UP, KEY_RIGHT + + +#define HIL_KEYCODES_SET3_TBLSIZE 128 +#define HIL_KEYCODES_SET3 \ + KEY_RESERVED, KEY_ESC, KEY_1, KEY_2, \ + KEY_3, KEY_4, KEY_5, KEY_6, \ + KEY_7, KEY_8, KEY_9, KEY_0, \ + KEY_MINUS, KEY_EQUAL, KEY_BACKSPACE, KEY_TAB, \ + KEY_Q, KEY_W, KEY_E, KEY_R, \ + KEY_T, KEY_Y, KEY_U, KEY_I, \ + KEY_O, KEY_P, KEY_LEFTBRACE, KEY_RIGHTBRACE, \ + KEY_ENTER, KEY_LEFTCTRL, KEY_A, KEY_S, \ + KEY_D, KEY_F, KEY_G, KEY_H, \ + KEY_J, KEY_K, KEY_L, KEY_SEMICOLON, \ + KEY_APOSTROPHE,KEY_GRAVE, KEY_LEFTSHIFT, KEY_BACKSLASH, \ + KEY_Z, KEY_X, KEY_C, KEY_V, \ + KEY_B, KEY_N, KEY_M, KEY_COMMA, \ + KEY_DOT, KEY_SLASH, KEY_RIGHTSHIFT, KEY_KPASTERISK, \ + KEY_LEFTALT, KEY_SPACE, KEY_CAPSLOCK, KEY_F1, \ + KEY_F2, KEY_F3, KEY_F4, KEY_F5, \ + KEY_F6, KEY_F7, KEY_F8, KEY_F9, \ + KEY_F10, KEY_NUMLOCK, KEY_SCROLLLOCK, KEY_KP7, \ + KEY_KP8, KEY_KP9, KEY_KPMINUS, KEY_KP4, \ + KEY_KP5, KEY_KP6, KEY_KPPLUS, KEY_KP1, \ + KEY_KP2, KEY_KP3, KEY_KP0, KEY_KPDOT, \ + KEY_SYSRQ, KEY_RESERVED, KEY_RESERVED, KEY_RESERVED, \ + KEY_RESERVED, KEY_RESERVED, KEY_RESERVED, KEY_RESERVED, \ + KEY_RESERVED, KEY_RESERVED, KEY_RESERVED, KEY_RESERVED, \ + KEY_UP, KEY_LEFT, KEY_DOWN, KEY_RIGHT, \ + KEY_HOME, KEY_PAGEUP, KEY_END, KEY_PAGEDOWN, \ + KEY_INSERT, KEY_DELETE, KEY_102ND, KEY_RESERVED, \ + KEY_RESERVED, KEY_RESERVED, KEY_RESERVED, KEY_RESERVED, \ + KEY_F1, KEY_F2, KEY_F3, KEY_F4, \ + KEY_F5, KEY_F6, KEY_F7, KEY_F8, \ + KEY_RESERVED, KEY_RESERVED, KEY_RESERVED, KEY_RESERVED, \ + KEY_RESERVED, KEY_RESERVED, KEY_RESERVED, KEY_RESERVED + + +/* Response to POL command, the "poll record header" */ + +#define HIL_POL_NUM_AXES_MASK 0x03 /* Number of axis reported */ +#define HIL_POL_CTS 0x04 /* Device ready to receive data */ +#define HIL_POL_STATUS_PENDING 0x08 /* Device has status to report */ +#define HIL_POL_CHARTYPE_MASK 0x70 /* Type of character data to follow */ +#define HIL_POL_CHARTYPE_NONE 0x00 /* No character data to follow */ +#define HIL_POL_CHARTYPE_RSVD1 0x10 /* Reserved Set 1 */ +#define HIL_POL_CHARTYPE_ASCII 0x20 /* U.S. ASCII */ +#define HIL_POL_CHARTYPE_BINARY 0x30 /* Binary data */ +#define HIL_POL_CHARTYPE_SET1 0x40 /* Keycode Set 1 */ +#define HIL_POL_CHARTYPE_RSVD2 0x50 /* Reserved Set 2 */ +#define HIL_POL_CHARTYPE_SET2 0x60 /* Keycode Set 2 */ +#define HIL_POL_CHARTYPE_SET3 0x70 /* Keycode Set 3 */ +#define HIL_POL_AXIS_ALT 0x80 /* Data is from axis set 2 */ + + +#endif /* _HIL_H_ */ diff --git a/include/linux/hil_mlc.h b/include/linux/hil_mlc.h new file mode 100644 index 000000000000..8df29ca48a13 --- /dev/null +++ b/include/linux/hil_mlc.h @@ -0,0 +1,168 @@ +/* + * HP Human Interface Loop Master Link Controller driver. + * + * Copyright (c) 2001 Brian S. Julin + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions, and the following disclaimer, + * without modification. + * 2. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * Alternatively, this software may be distributed under the terms of the + * GNU General Public License ("GPL"). + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * + * References: + * HP-HIL Technical Reference Manual. Hewlett Packard Product No. 45918A + * + */ + +#include <linux/hil.h> +#include <linux/time.h> +#include <linux/interrupt.h> +#include <asm/semaphore.h> +#include <linux/serio.h> +#include <linux/list.h> + +typedef struct hil_mlc hil_mlc; + +/* The HIL has a complicated state engine. + * We define the structure of nodes in the state engine here. + */ +enum hilse_act { + /* HILSE_OUT prepares to receive input if the next node + * is an IN or EXPECT, and then sends the given packet. + */ + HILSE_OUT = 0, + + /* HILSE_CTS checks if the loop is busy. */ + HILSE_CTS, + + /* HILSE_OUT_LAST sends the given command packet to + * the last configured/running device on the loop. + */ + HILSE_OUT_LAST, + + /* HILSE_OUT_DISC sends the given command packet to + * the next device past the last configured/running one. + */ + HILSE_OUT_DISC, + + /* HILSE_FUNC runs a callback function with given arguments. + * a positive return value causes the "ugly" branch to be taken. + */ + HILSE_FUNC, + + /* HILSE_IN simply expects any non-errored packet to arrive + * within arg usecs. + */ + HILSE_IN = 0x100, + + /* HILSE_EXPECT expects a particular packet to arrive + * within arg usecs, any other packet is considered an error. + */ + HILSE_EXPECT, + + /* HILSE_EXPECT_LAST as above but dev field should be last + * discovered/operational device. + */ + HILSE_EXPECT_LAST, + + /* HILSE_EXPECT_LAST as above but dev field should be first + * undiscovered/inoperational device. + */ + HILSE_EXPECT_DISC +}; + +typedef int (hilse_func) (hil_mlc *mlc, int arg); +struct hilse_node { + enum hilse_act act; /* How to process this node */ + union { + hilse_func *func; /* Function to call if HILSE_FUNC */ + hil_packet packet; /* Packet to send or to compare */ + } object; + int arg; /* Timeout in usec or parm for func */ + int good; /* Node to jump to on success */ + int bad; /* Node to jump to on error */ + int ugly; /* Node to jump to on timeout */ +}; + +/* Methods for back-end drivers, e.g. hp_sdc_mlc */ +typedef int (hil_mlc_cts) (hil_mlc *mlc); +typedef void (hil_mlc_out) (hil_mlc *mlc); +typedef int (hil_mlc_in) (hil_mlc *mlc, suseconds_t timeout); + +struct hil_mlc_devinfo { + uint8_t idd[16]; /* Device ID Byte and Describe Record */ + uint8_t rsc[16]; /* Security Code Header and Record */ + uint8_t exd[16]; /* Extended Describe Record */ + uint8_t rnm[16]; /* Device name as returned by RNM command */ +}; + +struct hil_mlc_serio_map { + hil_mlc *mlc; + int di_revmap; + int didx; +}; + +/* How many (possibly old/detached) devices the we try to keep track of */ +#define HIL_MLC_DEVMEM 16 + +struct hil_mlc { + struct list_head list; /* hil_mlc is organized as linked list */ + + rwlock_t lock; + + void *priv; /* Data specific to a particular type of MLC */ + + int seidx; /* Current node in state engine */ + int istarted, ostarted; + + hil_mlc_cts *cts; + struct semaphore csem; /* Raised when loop idle */ + + hil_mlc_out *out; + struct semaphore osem; /* Raised when outpacket dispatched */ + hil_packet opacket; + + hil_mlc_in *in; + struct semaphore isem; /* Raised when a packet arrives */ + hil_packet ipacket[16]; + hil_packet imatch; + int icount; + struct timeval instart; + suseconds_t intimeout; + + int ddi; /* Last operational device id */ + int lcv; /* LCV to throttle loops */ + struct timeval lcv_tv; /* Time loop was started */ + + int di_map[7]; /* Maps below items to live devs */ + struct hil_mlc_devinfo di[HIL_MLC_DEVMEM]; + struct serio *serio[HIL_MLC_DEVMEM]; + struct hil_mlc_serio_map serio_map[HIL_MLC_DEVMEM]; + hil_packet serio_opacket[HIL_MLC_DEVMEM]; + int serio_oidx[HIL_MLC_DEVMEM]; + struct hil_mlc_devinfo di_scratch; /* Temporary area */ + + int opercnt; + + struct tasklet_struct *tasklet; +}; + +int hil_mlc_register(hil_mlc *mlc); +int hil_mlc_unregister(hil_mlc *mlc); diff --git a/include/linux/hp_sdc.h b/include/linux/hp_sdc.h new file mode 100644 index 000000000000..debd71515312 --- /dev/null +++ b/include/linux/hp_sdc.h @@ -0,0 +1,300 @@ +/* + * HP i8042 System Device Controller -- header + * + * Copyright (c) 2001 Brian S. Julin + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions, and the following disclaimer, + * without modification. + * 2. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * Alternatively, this software may be distributed under the terms of the + * GNU General Public License ("GPL"). + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * + * References: + * + * HP-HIL Technical Reference Manual. Hewlett Packard Product No. 45918A + * + * System Device Controller Microprocessor Firmware Theory of Operation + * for Part Number 1820-4784 Revision B. Dwg No. A-1820-4784-2 + * + */ + +#ifndef _LINUX_HP_SDC_H +#define _LINUX_HP_SDC_H + +#include <linux/interrupt.h> +#include <linux/types.h> +#include <linux/time.h> +#include <linux/timer.h> +#if defined(__hppa__) +#include <asm/hardware.h> +#endif + + +/* No 4X status reads take longer than this (in usec). + */ +#define HP_SDC_MAX_REG_DELAY 20000 + +typedef void (hp_sdc_irqhook) (int irq, void *dev_id, + uint8_t status, uint8_t data); + +int hp_sdc_request_timer_irq(hp_sdc_irqhook *callback); +int hp_sdc_request_hil_irq(hp_sdc_irqhook *callback); +int hp_sdc_request_cooked_irq(hp_sdc_irqhook *callback); +int hp_sdc_release_timer_irq(hp_sdc_irqhook *callback); +int hp_sdc_release_hil_irq(hp_sdc_irqhook *callback); +int hp_sdc_release_cooked_irq(hp_sdc_irqhook *callback); + +typedef struct { + int actidx; /* Start of act. Acts are atomic WRT I/O to SDC */ + int idx; /* Index within the act */ + int endidx; /* transaction is over and done if idx == endidx */ + uint8_t *seq; /* commands/data for the transaction */ + union { + hp_sdc_irqhook *irqhook; /* Callback, isr or tasklet context */ + struct semaphore *semaphore; /* Semaphore to sleep on. */ + } act; +} hp_sdc_transaction; +int hp_sdc_enqueue_transaction(hp_sdc_transaction *this); +int hp_sdc_dequeue_transaction(hp_sdc_transaction *this); + +/* The HP_SDC_ACT* values are peculiar to this driver. + * Nuance: never HP_SDC_ACT_DATAIN | HP_SDC_ACT_DEALLOC, use another + * act to perform the dealloc. + */ +#define HP_SDC_ACT_PRECMD 0x01 /* Send a command first */ +#define HP_SDC_ACT_DATAREG 0x02 /* Set data registers */ +#define HP_SDC_ACT_DATAOUT 0x04 /* Send data bytes */ +#define HP_SDC_ACT_POSTCMD 0x08 /* Send command after */ +#define HP_SDC_ACT_DATAIN 0x10 /* Collect data after */ +#define HP_SDC_ACT_DURING 0x1f +#define HP_SDC_ACT_SEMAPHORE 0x20 /* Raise semaphore after */ +#define HP_SDC_ACT_CALLBACK 0x40 /* Pass data to IRQ handler */ +#define HP_SDC_ACT_DEALLOC 0x80 /* Destroy transaction after */ +#define HP_SDC_ACT_AFTER 0xe0 +#define HP_SDC_ACT_DEAD 0x60 /* Act timed out. */ + +/* Rest of the flags are straightforward representation of the SDC interface */ +#define HP_SDC_STATUS_IBF 0x02 /* Input buffer full */ + +#define HP_SDC_STATUS_IRQMASK 0xf0 /* Bits containing "level 1" irq */ +#define HP_SDC_STATUS_PERIODIC 0x10 /* Periodic 10ms timer */ +#define HP_SDC_STATUS_USERTIMER 0x20 /* "Special purpose" timer */ +#define HP_SDC_STATUS_TIMER 0x30 /* Both PERIODIC and USERTIMER */ +#define HP_SDC_STATUS_REG 0x40 /* Data from an i8042 register */ +#define HP_SDC_STATUS_HILCMD 0x50 /* Command from HIL MLC */ +#define HP_SDC_STATUS_HILDATA 0x60 /* Data from HIL MLC */ +#define HP_SDC_STATUS_PUP 0x70 /* Sucessful power-up self test */ +#define HP_SDC_STATUS_KCOOKED 0x80 /* Key from cooked kbd */ +#define HP_SDC_STATUS_KRPG 0xc0 /* Key from Repeat Gen */ +#define HP_SDC_STATUS_KMOD_SUP 0x10 /* Shift key is up */ +#define HP_SDC_STATUS_KMOD_CUP 0x20 /* Control key is up */ + +#define HP_SDC_NMISTATUS_FHS 0x40 /* NMI is a fast handshake irq */ + +/* Internal i8042 registers (there are more, but they are not too useful). */ + +#define HP_SDC_USE 0x02 /* Resource usage (including OB bit) */ +#define HP_SDC_IM 0x04 /* Interrupt mask */ +#define HP_SDC_CFG 0x11 /* Configuration register */ +#define HP_SDC_KBLANGUAGE 0x12 /* Keyboard language */ + +#define HP_SDC_D0 0x70 /* General purpose data buffer 0 */ +#define HP_SDC_D1 0x71 /* General purpose data buffer 1 */ +#define HP_SDC_D2 0x72 /* General purpose data buffer 2 */ +#define HP_SDC_D3 0x73 /* General purpose data buffer 3 */ +#define HP_SDC_VT1 0x74 /* Timer for voice 1 */ +#define HP_SDC_VT2 0x75 /* Timer for voice 2 */ +#define HP_SDC_VT3 0x76 /* Timer for voice 3 */ +#define HP_SDC_VT4 0x77 /* Timer for voice 4 */ +#define HP_SDC_KBN 0x78 /* Which HIL devs are Nimitz */ +#define HP_SDC_KBC 0x79 /* Which HIL devs are cooked kbds */ +#define HP_SDC_LPS 0x7a /* i8042's view of HIL status */ +#define HP_SDC_LPC 0x7b /* i8042's view of HIL "control" */ +#define HP_SDC_RSV 0x7c /* Reserved "for testing" */ +#define HP_SDC_LPR 0x7d /* i8042 count of HIL reconfigs */ +#define HP_SDC_XTD 0x7e /* "Extended Configuration" register */ +#define HP_SDC_STR 0x7f /* i8042 self-test result */ + +/* Bitfields for above registers */ +#define HP_SDC_USE_LOOP 0x04 /* Command is currently on the loop. */ + +#define HP_SDC_IM_MASK 0x1f /* these bits not part of cmd/status */ +#define HP_SDC_IM_FH 0x10 /* Mask the fast handshake irq */ +#define HP_SDC_IM_PT 0x08 /* Mask the periodic timer irq */ +#define HP_SDC_IM_TIMERS 0x04 /* Mask the MT/DT/CT irq */ +#define HP_SDC_IM_RESET 0x02 /* Mask the reset key irq */ +#define HP_SDC_IM_HIL 0x01 /* Mask the HIL MLC irq */ + +#define HP_SDC_CFG_ROLLOVER 0x08 /* WTF is "N-key rollover"? */ +#define HP_SDC_CFG_KBD 0x10 /* There is a keyboard */ +#define HP_SDC_CFG_NEW 0x20 /* Supports/uses HIL MLC */ +#define HP_SDC_CFG_KBD_OLD 0x03 /* keyboard code for non-HIL */ +#define HP_SDC_CFG_KBD_NEW 0x07 /* keyboard code from HIL autoconfig */ +#define HP_SDC_CFG_REV 0x40 /* Code revision bit */ +#define HP_SDC_CFG_IDPROM 0x80 /* IDPROM present in kbd (not HIL) */ + +#define HP_SDC_LPS_NDEV 0x07 /* # devices autoconfigured on HIL */ +#define HP_SDC_LPS_ACSUCC 0x08 /* loop autoconfigured successfully */ +#define HP_SDC_LPS_ACFAIL 0x80 /* last loop autoconfigure failed */ + +#define HP_SDC_LPC_APE_IPF 0x01 /* HIL MLC APE/IPF (autopoll) set */ +#define HP_SDC_LPC_ARCONERR 0x02 /* i8042 autoreconfigs loop on err */ +#define HP_SDC_LPC_ARCQUIET 0x03 /* i8042 doesn't report autoreconfigs*/ +#define HP_SDC_LPC_COOK 0x10 /* i8042 cooks devices in _KBN */ +#define HP_SDC_LPC_RC 0x80 /* causes autoreconfig */ + +#define HP_SDC_XTD_REV 0x07 /* contains revision code */ +#define HP_SDC_XTD_REV_STRINGS(val, str) \ +switch (val) { \ + case 0x1: str = "1820-3712"; break; \ + case 0x2: str = "1820-4379"; break; \ + case 0x3: str = "1820-4784"; break; \ + default: str = "unknown"; \ +}; +#define HP_SDC_XTD_BEEPER 0x08 /* TI SN76494 beeper available */ +#define HP_SDC_XTD_BBRTC 0x20 /* OKI MSM-58321 BBRTC present */ + +#define HP_SDC_CMD_LOAD_RT 0x31 /* Load real time (from 8042) */ +#define HP_SDC_CMD_LOAD_FHS 0x36 /* Load the fast handshake timer */ +#define HP_SDC_CMD_LOAD_MT 0x38 /* Load the match timer */ +#define HP_SDC_CMD_LOAD_DT 0x3B /* Load the delay timer */ +#define HP_SDC_CMD_LOAD_CT 0x3E /* Load the cycle timer */ + +#define HP_SDC_CMD_SET_IM 0x40 /* 010xxxxx == set irq mask */ + +/* The documents provided do not explicitly state that all registers betweem + * 0x01 and 0x1f inclusive can be read by sending their register index as a + * command, but this is implied and appears to be the case. + */ +#define HP_SDC_CMD_READ_RAM 0x00 /* Load from i8042 RAM (autoinc) */ +#define HP_SDC_CMD_READ_USE 0x02 /* Undocumented! Load from usage reg */ +#define HP_SDC_CMD_READ_IM 0x04 /* Load current interrupt mask */ +#define HP_SDC_CMD_READ_KCC 0x11 /* Load primary kbd config code */ +#define HP_SDC_CMD_READ_KLC 0x12 /* Load primary kbd language code */ +#define HP_SDC_CMD_READ_T1 0x13 /* Load timer output buffer byte 1 */ +#define HP_SDC_CMD_READ_T2 0x14 /* Load timer output buffer byte 1 */ +#define HP_SDC_CMD_READ_T3 0x15 /* Load timer output buffer byte 1 */ +#define HP_SDC_CMD_READ_T4 0x16 /* Load timer output buffer byte 1 */ +#define HP_SDC_CMD_READ_T5 0x17 /* Load timer output buffer byte 1 */ +#define HP_SDC_CMD_READ_D0 0xf0 /* Load from i8042 RAM location 0x70 */ +#define HP_SDC_CMD_READ_D1 0xf1 /* Load from i8042 RAM location 0x71 */ +#define HP_SDC_CMD_READ_D2 0xf2 /* Load from i8042 RAM location 0x72 */ +#define HP_SDC_CMD_READ_D3 0xf3 /* Load from i8042 RAM location 0x73 */ +#define HP_SDC_CMD_READ_VT1 0xf4 /* Load from i8042 RAM location 0x74 */ +#define HP_SDC_CMD_READ_VT2 0xf5 /* Load from i8042 RAM location 0x75 */ +#define HP_SDC_CMD_READ_VT3 0xf6 /* Load from i8042 RAM location 0x76 */ +#define HP_SDC_CMD_READ_VT4 0xf7 /* Load from i8042 RAM location 0x77 */ +#define HP_SDC_CMD_READ_KBN 0xf8 /* Load from i8042 RAM location 0x78 */ +#define HP_SDC_CMD_READ_KBC 0xf9 /* Load from i8042 RAM location 0x79 */ +#define HP_SDC_CMD_READ_LPS 0xfa /* Load from i8042 RAM location 0x7a */ +#define HP_SDC_CMD_READ_LPC 0xfb /* Load from i8042 RAM location 0x7b */ +#define HP_SDC_CMD_READ_RSV 0xfc /* Load from i8042 RAM location 0x7c */ +#define HP_SDC_CMD_READ_LPR 0xfd /* Load from i8042 RAM location 0x7d */ +#define HP_SDC_CMD_READ_XTD 0xfe /* Load from i8042 RAM location 0x7e */ +#define HP_SDC_CMD_READ_STR 0xff /* Load from i8042 RAM location 0x7f */ + +#define HP_SDC_CMD_SET_ARD 0xA0 /* Set emulated autorepeat delay */ +#define HP_SDC_CMD_SET_ARR 0xA2 /* Set emulated autorepeat rate */ +#define HP_SDC_CMD_SET_BELL 0xA3 /* Set voice 3 params for "beep" cmd */ +#define HP_SDC_CMD_SET_RPGR 0xA6 /* Set "RPG" irq rate (doesn't work) */ +#define HP_SDC_CMD_SET_RTMS 0xAD /* Set the RTC time (milliseconds) */ +#define HP_SDC_CMD_SET_RTD 0xAF /* Set the RTC time (days) */ +#define HP_SDC_CMD_SET_FHS 0xB2 /* Set fast handshake timer */ +#define HP_SDC_CMD_SET_MT 0xB4 /* Set match timer */ +#define HP_SDC_CMD_SET_DT 0xB7 /* Set delay timer */ +#define HP_SDC_CMD_SET_CT 0xBA /* Set cycle timer */ +#define HP_SDC_CMD_SET_RAMP 0xC1 /* Reset READ_RAM autoinc counter */ +#define HP_SDC_CMD_SET_D0 0xe0 /* Load to i8042 RAM location 0x70 */ +#define HP_SDC_CMD_SET_D1 0xe1 /* Load to i8042 RAM location 0x71 */ +#define HP_SDC_CMD_SET_D2 0xe2 /* Load to i8042 RAM location 0x72 */ +#define HP_SDC_CMD_SET_D3 0xe3 /* Load to i8042 RAM location 0x73 */ +#define HP_SDC_CMD_SET_VT1 0xe4 /* Load to i8042 RAM location 0x74 */ +#define HP_SDC_CMD_SET_VT2 0xe5 /* Load to i8042 RAM location 0x75 */ +#define HP_SDC_CMD_SET_VT3 0xe6 /* Load to i8042 RAM location 0x76 */ +#define HP_SDC_CMD_SET_VT4 0xe7 /* Load to i8042 RAM location 0x77 */ +#define HP_SDC_CMD_SET_KBN 0xe8 /* Load to i8042 RAM location 0x78 */ +#define HP_SDC_CMD_SET_KBC 0xe9 /* Load to i8042 RAM location 0x79 */ +#define HP_SDC_CMD_SET_LPS 0xea /* Load to i8042 RAM location 0x7a */ +#define HP_SDC_CMD_SET_LPC 0xeb /* Load to i8042 RAM location 0x7b */ +#define HP_SDC_CMD_SET_RSV 0xec /* Load to i8042 RAM location 0x7c */ +#define HP_SDC_CMD_SET_LPR 0xed /* Load to i8042 RAM location 0x7d */ +#define HP_SDC_CMD_SET_XTD 0xee /* Load to i8042 RAM location 0x7e */ +#define HP_SDC_CMD_SET_STR 0xef /* Load to i8042 RAM location 0x7f */ + +#define HP_SDC_CMD_DO_RTCW 0xc2 /* i8042 RAM 0x70 --> RTC */ +#define HP_SDC_CMD_DO_RTCR 0xc3 /* RTC[0x70 0:3] --> irq/status/data */ +#define HP_SDC_CMD_DO_BEEP 0xc4 /* i8042 RAM 0x70-74 --> beeper,VT3 */ +#define HP_SDC_CMD_DO_HIL 0xc5 /* i8042 RAM 0x70-73 --> + HIL MLC R0,R1 i8042 HIL watchdog */ + +/* Values used to (de)mangle input/output to/from the HIL MLC */ +#define HP_SDC_DATA 0x40 /* Data from an 8042 register */ +#define HP_SDC_HIL_CMD 0x50 /* Data from HIL MLC R1/8042 */ +#define HP_SDC_HIL_R1MASK 0x0f /* Contents of HIL MLC R1 0:3 */ +#define HP_SDC_HIL_AUTO 0x10 /* Set if POL results from i8042 */ +#define HP_SDC_HIL_ISERR 0x80 /* Has meaning as in next 4 values */ +#define HP_SDC_HIL_RC_DONE 0x80 /* i8042 auto-configured loop */ +#define HP_SDC_HIL_ERR 0x81 /* HIL MLC R2 had a bit set */ +#define HP_SDC_HIL_TO 0x82 /* i8042 HIL watchdog expired */ +#define HP_SDC_HIL_RC 0x84 /* i8042 is auto-configuring loop */ +#define HP_SDC_HIL_DAT 0x60 /* Data from HIL MLC R0 */ + + +typedef struct { + rwlock_t ibf_lock; + rwlock_t lock; /* user/tasklet lock */ + rwlock_t rtq_lock; /* isr/tasklet lock */ + rwlock_t hook_lock; /* isr/user lock for handler add/del */ + + unsigned int irq, nmi; /* Our IRQ lines */ + unsigned long base_io, status_io, data_io; /* Our IO ports */ + + uint8_t im; /* Interrupt mask */ + int set_im; /* Interrupt mask needs to be set. */ + + int ibf; /* Last known status of IBF flag */ + uint8_t wi; /* current i8042 write index */ + uint8_t r7[4]; /* current i8042[0x70 - 0x74] values */ + uint8_t r11, r7e; /* Values from version/revision regs */ + + hp_sdc_irqhook *timer, *reg, *hil, *pup, *cooked; + +#define HP_SDC_QUEUE_LEN 16 + hp_sdc_transaction *tq[HP_SDC_QUEUE_LEN]; /* All pending read/writes */ + + int rcurr, rqty; /* Current read transact in process */ + struct timeval rtv; /* Time when current read started */ + int wcurr; /* Current write transact in process */ + + int dev_err; /* carries status from registration */ +#if defined(__hppa__) + struct parisc_device *dev; +#elif defined(__mc68000__) + void *dev; +#else +#error No support for device registration on this arch yet. +#endif + + struct timer_list kicker; /* Keeps below task alive */ + struct tasklet_struct task; + +} hp_i8042_sdc; + +#endif /* _LINUX_HP_SDC_H */ diff --git a/include/linux/hugetlb.h b/include/linux/hugetlb.h index e670b0d13fe0..1056717ee501 100644 --- a/include/linux/hugetlb.h +++ b/include/linux/hugetlb.h @@ -16,7 +16,6 @@ static inline int is_vm_hugetlb_page(struct vm_area_struct *vma) int hugetlb_sysctl_handler(struct ctl_table *, int, struct file *, void __user *, size_t *, loff_t *); int copy_hugetlb_page_range(struct mm_struct *, struct mm_struct *, struct vm_area_struct *); int follow_hugetlb_page(struct mm_struct *, struct vm_area_struct *, struct page **, struct vm_area_struct **, unsigned long *, int *, int); -void zap_hugepage_range(struct vm_area_struct *, unsigned long, unsigned long); void unmap_hugepage_range(struct vm_area_struct *, unsigned long, unsigned long); int hugetlb_prefault(struct address_space *, struct vm_area_struct *); int hugetlb_report_meminfo(char *); @@ -25,6 +24,8 @@ int is_hugepage_mem_enough(size_t); unsigned long hugetlb_total_pages(void); struct page *alloc_huge_page(void); void free_huge_page(struct page *); +int hugetlb_fault(struct mm_struct *mm, struct vm_area_struct *vma, + unsigned long address, int write_access); extern unsigned long max_huge_pages; extern const unsigned long hugetlb_zero, hugetlb_infinity; @@ -85,7 +86,6 @@ static inline unsigned long hugetlb_total_pages(void) #define follow_huge_addr(mm, addr, write) ERR_PTR(-EINVAL) #define copy_hugetlb_page_range(src, dst, vma) ({ BUG(); 0; }) #define hugetlb_prefault(mapping, vma) ({ BUG(); 0; }) -#define zap_hugepage_range(vma, start, len) BUG() #define unmap_hugepage_range(vma, start, end) BUG() #define is_hugepage_mem_enough(size) 0 #define hugetlb_report_meminfo(buf) 0 @@ -99,10 +99,11 @@ static inline unsigned long hugetlb_total_pages(void) do { } while (0) #define alloc_huge_page() ({ NULL; }) #define free_huge_page(p) ({ (void)(p); BUG(); }) +#define hugetlb_fault(mm, vma, addr, write) ({ BUG(); 0; }) #ifndef HPAGE_MASK -#define HPAGE_MASK 0 /* Keep the compiler happy */ -#define HPAGE_SIZE 0 +#define HPAGE_MASK PAGE_MASK /* Keep the compiler happy */ +#define HPAGE_SIZE PAGE_SIZE #endif #endif /* !CONFIG_HUGETLB_PAGE */ diff --git a/include/linux/i2c-algo-bit.h b/include/linux/i2c-algo-bit.h index 110904481238..c0e7fab28ce3 100644 --- a/include/linux/i2c-algo-bit.h +++ b/include/linux/i2c-algo-bit.h @@ -21,8 +21,6 @@ /* With some changes from Kyösti Mälkki <kmalkki@cc.hut.fi> and even Frodo Looijaard <frodol@dds.nl> */ -/* $Id: i2c-algo-bit.h,v 1.10 2003/01/21 08:08:16 kmalkki Exp $ */ - #ifndef _LINUX_I2C_ALGO_BIT_H #define _LINUX_I2C_ALGO_BIT_H @@ -46,8 +44,6 @@ struct i2c_algo_bit_data { int timeout; /* in jiffies */ }; -#define I2C_BIT_ADAP_MAX 16 - int i2c_bit_add_bus(struct i2c_adapter *); int i2c_bit_del_bus(struct i2c_adapter *); diff --git a/include/linux/i2c-algo-pca.h b/include/linux/i2c-algo-pca.h index 941b786c5732..226693e0d88b 100644 --- a/include/linux/i2c-algo-pca.h +++ b/include/linux/i2c-algo-pca.h @@ -9,8 +9,6 @@ struct i2c_algo_pca_data { int (*wait_for_interrupt) (struct i2c_algo_pca_data *adap); }; -#define I2C_PCA_ADAP_MAX 16 - int i2c_pca_add_bus(struct i2c_adapter *); int i2c_pca_del_bus(struct i2c_adapter *); diff --git a/include/linux/i2c-algo-pcf.h b/include/linux/i2c-algo-pcf.h index 2a508562255f..18b0adf57a3d 100644 --- a/include/linux/i2c-algo-pcf.h +++ b/include/linux/i2c-algo-pcf.h @@ -22,8 +22,6 @@ /* With some changes from Kyösti Mälkki <kmalkki@cc.hut.fi> and even Frodo Looijaard <frodol@dds.nl> */ -/* $Id: i2c-algo-pcf.h,v 1.8 2003/01/21 08:08:16 kmalkki Exp $ */ - #ifndef _LINUX_I2C_ALGO_PCF_H #define _LINUX_I2C_ALGO_PCF_H @@ -41,8 +39,6 @@ struct i2c_algo_pcf_data { int timeout; }; -#define I2C_PCF_ADAP_MAX 16 - int i2c_pcf_add_bus(struct i2c_adapter *); int i2c_pcf_del_bus(struct i2c_adapter *); diff --git a/include/linux/i2c-dev.h b/include/linux/i2c-dev.h index 541695679762..81c229a0fbca 100644 --- a/include/linux/i2c-dev.h +++ b/include/linux/i2c-dev.h @@ -19,8 +19,6 @@ Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */ -/* $Id: i2c-dev.h,v 1.13 2003/01/21 08:08:16 kmalkki Exp $ */ - #ifndef _LINUX_I2C_DEV_H #define _LINUX_I2C_DEV_H diff --git a/include/linux/i2c-id.h b/include/linux/i2c-id.h index 44f30876a1c9..ef3b5632e63a 100644 --- a/include/linux/i2c-id.h +++ b/include/linux/i2c-id.h @@ -27,10 +27,10 @@ * ---- Driver types ----------------------------------------------------- * device id name + number function description, i2c address(es) * - * Range 1000-1999 range is defined in sensors/sensors.h - * Range 0x100 - 0x1ff is for V4L2 Common Components + * Range 1000-1999 range is defined in sensors/sensors.h + * Range 0x100 - 0x1ff is for V4L2 Common Components * Range 0xf000 - 0xffff is reserved for local experimentation, and should - * never be used in official drivers + * never be used in official drivers */ #define I2C_DRIVERID_MSP3400 1 @@ -99,7 +99,16 @@ #define I2C_DRIVERID_MAX6900 63 /* MAX6900 real-time clock */ #define I2C_DRIVERID_SAA7114H 64 /* video decoder */ #define I2C_DRIVERID_DS1374 65 /* DS1374 real time clock */ - +#define I2C_DRIVERID_TDA9874 66 /* TV sound decoder */ +#define I2C_DRIVERID_SAA6752HS 67 /* MPEG2 encoder */ +#define I2C_DRIVERID_TVEEPROM 68 /* TV EEPROM */ +#define I2C_DRIVERID_WM8775 69 /* wm8775 audio processor */ +#define I2C_DRIVERID_CS53L32A 70 /* cs53l32a audio processor */ +#define I2C_DRIVERID_CX25840 71 /* cx2584x video encoder */ +#define I2C_DRIVERID_SAA7127 72 /* saa7124 video encoder */ +#define I2C_DRIVERID_SAA711X 73 /* saa711x video encoders */ +#define I2C_DRIVERID_AKITAIOEXP 74 /* IO Expander on Sharp SL-C1000 */ +#define I2C_DRIVERID_I2C_IR 75 /* I2C InfraRed on Video boards */ #define I2C_DRIVERID_EXP0 0xF0 /* experimental use id's */ #define I2C_DRIVERID_EXP1 0xF1 @@ -111,7 +120,7 @@ #define I2C_DRIVERID_ARP 902 /* SMBus ARP Client */ #define I2C_DRIVERID_ALERT 903 /* SMBus Alert Responder Client */ -/* IDs -- Use DRIVERIDs 1000-1999 for sensors. +/* IDs -- Use DRIVERIDs 1000-1999 for sensors. These were originally in sensors.h in the lm_sensors package */ #define I2C_DRIVERID_LM78 1002 #define I2C_DRIVERID_LM75 1003 @@ -164,10 +173,7 @@ /* --- Bit algorithm adapters */ #define I2C_HW_B_LP 0x010000 /* Parallel port Philips style */ -#define I2C_HW_B_LPC 0x010001 /* Parallel port control reg. */ #define I2C_HW_B_SER 0x010002 /* Serial line interface */ -#define I2C_HW_B_ELV 0x010003 /* ELV Card */ -#define I2C_HW_B_VELLE 0x010004 /* Vellemann K8000 */ #define I2C_HW_B_BT848 0x010005 /* BT848 video boards */ #define I2C_HW_B_WNV 0x010006 /* Winnov Videums */ #define I2C_HW_B_VIA 0x010007 /* Via vt82c586b */ @@ -193,6 +199,7 @@ #define I2C_HW_B_NVIDIA 0x01001c /* nvidia framebuffer driver */ #define I2C_HW_B_SAVAGE 0x01001d /* savage framebuffer driver */ #define I2C_HW_B_RADEON 0x01001e /* radeon framebuffer driver */ +#define I2C_HW_B_EM28XX 0x01001f /* em28xx video capture cards */ /* --- PCF 8584 based algorithms */ #define I2C_HW_P_LP 0x020000 /* Parallel port interface */ diff --git a/include/linux/i2c.h b/include/linux/i2c.h index 3d49a305bf88..5e19a7ba69b2 100644 --- a/include/linux/i2c.h +++ b/include/linux/i2c.h @@ -23,15 +23,15 @@ /* With some changes from Kyösti Mälkki <kmalkki@cc.hut.fi> and Frodo Looijaard <frodol@dds.nl> */ -/* $Id: i2c.h,v 1.68 2003/01/21 08:08:16 kmalkki Exp $ */ - #ifndef _LINUX_I2C_H #define _LINUX_I2C_H #include <linux/module.h> #include <linux/types.h> #include <linux/i2c-id.h> +#include <linux/mod_devicetable.h> #include <linux/device.h> /* for struct device */ +#include <linux/sched.h> /* for completion */ #include <asm/semaphore.h> /* --- For i2c-isa ---------------------------------------------------- */ @@ -94,10 +94,10 @@ extern s32 i2c_smbus_write_byte_data(struct i2c_client * client, extern s32 i2c_smbus_read_word_data(struct i2c_client * client, u8 command); extern s32 i2c_smbus_write_word_data(struct i2c_client * client, u8 command, u16 value); -/* Returns the number of bytes transferred */ extern s32 i2c_smbus_write_block_data(struct i2c_client * client, u8 command, u8 length, u8 *values); +/* Returns the number of read bytes */ extern s32 i2c_smbus_read_i2c_block_data(struct i2c_client * client, u8 command, u8 *values); @@ -391,10 +391,6 @@ struct i2c_msg { #define I2C_FUNC_10BIT_ADDR 0x00000002 #define I2C_FUNC_PROTOCOL_MANGLING 0x00000004 /* I2C_M_{REV_DIR_ADDR,NOSTART,..} */ #define I2C_FUNC_SMBUS_HWPEC_CALC 0x00000008 /* SMBus 2.0 */ -#define I2C_FUNC_SMBUS_READ_WORD_DATA_PEC 0x00000800 /* SMBus 2.0 */ -#define I2C_FUNC_SMBUS_WRITE_WORD_DATA_PEC 0x00001000 /* SMBus 2.0 */ -#define I2C_FUNC_SMBUS_PROC_CALL_PEC 0x00002000 /* SMBus 2.0 */ -#define I2C_FUNC_SMBUS_BLOCK_PROC_CALL_PEC 0x00004000 /* SMBus 2.0 */ #define I2C_FUNC_SMBUS_BLOCK_PROC_CALL 0x00008000 /* SMBus 2.0 */ #define I2C_FUNC_SMBUS_QUICK 0x00010000 #define I2C_FUNC_SMBUS_READ_BYTE 0x00020000 @@ -410,8 +406,6 @@ struct i2c_msg { #define I2C_FUNC_SMBUS_WRITE_I2C_BLOCK 0x08000000 /* w/ 1-byte reg. addr. */ #define I2C_FUNC_SMBUS_READ_I2C_BLOCK_2 0x10000000 /* I2C-like block xfer */ #define I2C_FUNC_SMBUS_WRITE_I2C_BLOCK_2 0x20000000 /* w/ 2-byte reg. addr. */ -#define I2C_FUNC_SMBUS_READ_BLOCK_DATA_PEC 0x40000000 /* SMBus 2.0 */ -#define I2C_FUNC_SMBUS_WRITE_BLOCK_DATA_PEC 0x80000000 /* SMBus 2.0 */ #define I2C_FUNC_SMBUS_BYTE (I2C_FUNC_SMBUS_READ_BYTE | \ I2C_FUNC_SMBUS_WRITE_BYTE) @@ -425,17 +419,6 @@ struct i2c_msg { I2C_FUNC_SMBUS_WRITE_I2C_BLOCK) #define I2C_FUNC_SMBUS_I2C_BLOCK_2 (I2C_FUNC_SMBUS_READ_I2C_BLOCK_2 | \ I2C_FUNC_SMBUS_WRITE_I2C_BLOCK_2) -#define I2C_FUNC_SMBUS_BLOCK_DATA_PEC (I2C_FUNC_SMBUS_READ_BLOCK_DATA_PEC | \ - I2C_FUNC_SMBUS_WRITE_BLOCK_DATA_PEC) -#define I2C_FUNC_SMBUS_WORD_DATA_PEC (I2C_FUNC_SMBUS_READ_WORD_DATA_PEC | \ - I2C_FUNC_SMBUS_WRITE_WORD_DATA_PEC) - -#define I2C_FUNC_SMBUS_READ_BYTE_PEC I2C_FUNC_SMBUS_READ_BYTE_DATA -#define I2C_FUNC_SMBUS_WRITE_BYTE_PEC I2C_FUNC_SMBUS_WRITE_BYTE_DATA -#define I2C_FUNC_SMBUS_READ_BYTE_DATA_PEC I2C_FUNC_SMBUS_READ_WORD_DATA -#define I2C_FUNC_SMBUS_WRITE_BYTE_DATA_PEC I2C_FUNC_SMBUS_WRITE_WORD_DATA -#define I2C_FUNC_SMBUS_BYTE_PEC I2C_FUNC_SMBUS_BYTE_DATA -#define I2C_FUNC_SMBUS_BYTE_DATA_PEC I2C_FUNC_SMBUS_WORD_DATA #define I2C_FUNC_SMBUS_EMUL (I2C_FUNC_SMBUS_QUICK | \ I2C_FUNC_SMBUS_BYTE | \ @@ -443,20 +426,17 @@ struct i2c_msg { I2C_FUNC_SMBUS_WORD_DATA | \ I2C_FUNC_SMBUS_PROC_CALL | \ I2C_FUNC_SMBUS_WRITE_BLOCK_DATA | \ - I2C_FUNC_SMBUS_WRITE_BLOCK_DATA_PEC | \ I2C_FUNC_SMBUS_I2C_BLOCK) /* * Data for SMBus Messages */ #define I2C_SMBUS_BLOCK_MAX 32 /* As specified in SMBus standard */ -#define I2C_SMBUS_I2C_BLOCK_MAX 32 /* Not specified but we use same structure */ union i2c_smbus_data { __u8 byte; __u16 word; - __u8 block[I2C_SMBUS_BLOCK_MAX + 3]; /* block[0] is used for length */ - /* one more for read length in block process call */ - /* and one more for PEC */ + __u8 block[I2C_SMBUS_BLOCK_MAX + 2]; /* block[0] is used for length */ + /* and one more for user-space compatibility */ }; /* smbus_access read or write markers */ @@ -473,10 +453,6 @@ union i2c_smbus_data { #define I2C_SMBUS_BLOCK_DATA 5 #define I2C_SMBUS_I2C_BLOCK_DATA 6 #define I2C_SMBUS_BLOCK_PROC_CALL 7 /* SMBus 2.0 */ -#define I2C_SMBUS_BLOCK_DATA_PEC 8 /* SMBus 2.0 */ -#define I2C_SMBUS_PROC_CALL_PEC 9 /* SMBus 2.0 */ -#define I2C_SMBUS_BLOCK_PROC_CALL_PEC 10 /* SMBus 2.0 */ -#define I2C_SMBUS_WORD_DATA_PEC 11 /* SMBus 2.0 */ /* ----- commands for the ioctl like i2c_command call: @@ -506,11 +482,6 @@ union i2c_smbus_data { #define I2C_SMBUS 0x0720 /* SMBus-level access */ -/* ... algo-bit.c recognizes */ -#define I2C_UDELAY 0x0705 /* set delay in microsecs between each */ - /* written byte (except address) */ -#define I2C_MDELAY 0x0706 /* millisec delay between written bytes */ - /* ----- I2C-DEV: char device interface stuff ------------------------- */ #define I2C_MAJOR 89 /* Device major number */ diff --git a/include/linux/i2o.h b/include/linux/i2o.h index bdc286ec947c..d79c8a4bc4f8 100644 --- a/include/linux/i2o.h +++ b/include/linux/i2o.h @@ -25,10 +25,14 @@ /* How many different OSM's are we allowing */ #define I2O_MAX_DRIVERS 8 -#include <asm/io.h> -#include <asm/semaphore.h> /* Needed for MUTEX init macros */ #include <linux/pci.h> #include <linux/dma-mapping.h> +#include <linux/string.h> +#include <linux/slab.h> +#include <linux/workqueue.h> /* work_struct */ + +#include <asm/io.h> +#include <asm/semaphore.h> /* Needed for MUTEX init macros */ /* message queue empty */ #define I2O_QUEUE_EMPTY 0xffffffff @@ -66,8 +70,6 @@ struct i2o_device { struct device device; struct semaphore lock; /* device lock */ - - struct class_device classdev; /* i2o device class */ }; /* @@ -194,7 +196,7 @@ struct i2o_controller { struct resource mem_resource; /* Mem resource allocated to the IOP */ struct device device; - struct class_device classdev; /* I2O controller class */ + struct class_device *classdev; /* I2O controller class device */ struct i2o_device *exec; /* Executive */ #if BITS_PER_LONG == 64 spinlock_t context_list_lock; /* lock for context_list */ @@ -492,7 +494,7 @@ static inline int i2o_dma_map_sg(struct i2o_controller *c, * Returns 0 on success or -ENOMEM on failure. */ static inline int i2o_dma_alloc(struct device *dev, struct i2o_dma *addr, - size_t len, unsigned int gfp_mask) + size_t len, gfp_t gfp_mask) { struct pci_dev *pdev = to_pci_dev(dev); int dma_64 = 0; @@ -551,7 +553,7 @@ static inline void i2o_dma_free(struct device *dev, struct i2o_dma *addr) * Returns the 0 on success or negative error code on failure. */ static inline int i2o_dma_realloc(struct device *dev, struct i2o_dma *addr, - size_t len, unsigned int gfp_mask) + size_t len, gfp_t gfp_mask) { i2o_dma_free(dev, addr); diff --git a/include/linux/ibmtr.h b/include/linux/ibmtr.h index 2ef0b21517fb..1c7a0dd5536a 100644 --- a/include/linux/ibmtr.h +++ b/include/linux/ibmtr.h @@ -7,8 +7,8 @@ /* ported to the Alpha architecture 02/20/96 (just used the HZ macro) */ #define TR_RETRY_INTERVAL (30*HZ) /* 500 on PC = 5 s */ -#define TR_RST_TIME (HZ/20) /* 5 on PC = 50 ms */ -#define TR_BUSY_INTERVAL (HZ/5) /* 5 on PC = 200 ms */ +#define TR_RST_TIME (msecs_to_jiffies(50)) /* 5 on PC = 50 ms */ +#define TR_BUSY_INTERVAL (msecs_to_jiffies(200)) /* 5 on PC = 200 ms */ #define TR_SPIN_INTERVAL (3*HZ) /* 3 seconds before init timeout */ #define TR_ISA 1 diff --git a/include/linux/ide.h b/include/linux/ide.h index a6dbb51ecd7b..a39c3c59789d 100644 --- a/include/linux/ide.h +++ b/include/linux/ide.h @@ -218,7 +218,7 @@ typedef enum { ide_unknown, ide_generic, ide_pci, ide_rz1000, ide_trm290, ide_cmd646, ide_cy82c693, ide_4drives, ide_pmac, ide_etrax100, ide_acorn, - ide_forced + ide_au1xxx, ide_forced } hwif_chipset_t; /* @@ -230,6 +230,7 @@ typedef struct hw_regs_s { int dma; /* our dma entry */ ide_ack_intr_t *ack_intr; /* acknowledge interrupt */ hwif_chipset_t chipset; + struct device *dev; } hw_regs_t; /* @@ -266,6 +267,10 @@ static inline void ide_std_init_ports(hw_regs_t *hw, #include <asm/ide.h> +#ifndef MAX_HWIFS +#define MAX_HWIFS CONFIG_IDE_MAX_HWIFS +#endif + /* needed on alpha, x86/x86_64, ia64, mips, ppc32 and sh */ #ifndef IDE_ARCH_OBSOLETE_DEFAULTS # define ide_default_io_base(index) (0) @@ -1084,9 +1089,11 @@ enum { /* * Subdrivers support. + * + * The gendriver.owner field should be set to the module owner of this driver. + * The gendriver.name field should be set to the name of this driver */ typedef struct ide_driver_s { - struct module *owner; const char *version; u8 media; unsigned supports_dsc_overlap : 1; @@ -1194,37 +1201,11 @@ extern u64 ide_get_error_location(ide_drive_t *, char *); */ typedef enum { ide_wait, /* insert rq at end of list, and wait for it */ - ide_next, /* insert rq immediately after current request */ ide_preempt, /* insert rq in front of current request */ ide_head_wait, /* insert rq in front of current request and wait for it */ ide_end /* insert rq at end of list, but don't wait for it */ } ide_action_t; -/* - * This function issues a special IDE device request - * onto the request queue. - * - * If action is ide_wait, then the rq is queued at the end of the - * request queue, and the function sleeps until it has been processed. - * This is for use when invoked from an ioctl handler. - * - * If action is ide_preempt, then the rq is queued at the head of - * the request queue, displacing the currently-being-processed - * request and this function returns immediately without waiting - * for the new rq to be completed. This is VERY DANGEROUS, and is - * intended for careful use by the ATAPI tape/cdrom driver code. - * - * If action is ide_next, then the rq is queued immediately after - * the currently-being-processed-request (if any), and the function - * returns without waiting for the new rq to be completed. As above, - * This is VERY DANGEROUS, and is intended for careful use by the - * ATAPI tape/cdrom driver code. - * - * If action is ide_end, then the rq is queued at the end of the - * request queue, and the function returns immediately without waiting - * for the new rq to be completed. This is again intended for careful - * use by the ATAPI tape/cdrom driver code. - */ extern int ide_do_drive_cmd(ide_drive_t *, struct request *, ide_action_t); /* @@ -1324,7 +1305,8 @@ void ide_init_disk(struct gendisk *, ide_drive_t *); extern int ideprobe_init(void); extern void ide_scan_pcibus(int scan_direction) __init; -extern int ide_pci_register_driver(struct pci_driver *driver); +extern int __ide_pci_register_driver(struct pci_driver *driver, struct module *owner); +#define ide_pci_register_driver(d) __ide_pci_register_driver(d, THIS_MODULE) extern void ide_pci_unregister_driver(struct pci_driver *driver); void ide_pci_setup_ports(struct pci_dev *, struct ide_pci_device_s *, int, ata_index_t *); extern void ide_setup_pci_noise (struct pci_dev *dev, struct ide_pci_device_s *d); diff --git a/include/linux/idr.h b/include/linux/idr.h index ca3b7e462576..d37c8d808b0f 100644 --- a/include/linux/idr.h +++ b/include/linux/idr.h @@ -8,6 +8,10 @@ * Small id to pointer translation service avoiding fixed sized * tables. */ + +#ifndef __IDR_H__ +#define __IDR_H__ + #include <linux/types.h> #include <linux/bitops.h> @@ -71,8 +75,11 @@ struct idr { */ void *idr_find(struct idr *idp, int id); -int idr_pre_get(struct idr *idp, unsigned gfp_mask); +int idr_pre_get(struct idr *idp, gfp_t gfp_mask); int idr_get_new(struct idr *idp, void *ptr, int *id); int idr_get_new_above(struct idr *idp, void *ptr, int starting_id, int *id); void idr_remove(struct idr *idp, int id); +void idr_destroy(struct idr *idp); void idr_init(struct idr *idp); + +#endif /* __IDR_H__ */ diff --git a/include/linux/if_arp.h b/include/linux/if_arp.h index 0856548a2a08..a8b1a2071838 100644 --- a/include/linux/if_arp.h +++ b/include/linux/if_arp.h @@ -84,6 +84,7 @@ #define ARPHRD_IEEE802_TR 800 /* Magic type ident for TR */ #define ARPHRD_IEEE80211 801 /* IEEE 802.11 */ #define ARPHRD_IEEE80211_PRISM 802 /* IEEE 802.11 + Prism2 header */ +#define ARPHRD_IEEE80211_RADIOTAP 803 /* IEEE 802.11 + radiotap header */ #define ARPHRD_VOID 0xFFFF /* Void type, nothing is known */ #define ARPHRD_NONE 0xFFFE /* zero header length */ diff --git a/include/linux/if_ether.h b/include/linux/if_ether.h index fc2d4c8225aa..fe26d431de87 100644 --- a/include/linux/if_ether.h +++ b/include/linux/if_ether.h @@ -21,6 +21,8 @@ #ifndef _LINUX_IF_ETHER_H #define _LINUX_IF_ETHER_H +#include <linux/types.h> + /* * IEEE 802.3 Ethernet magic constants. The frame sizes omit the preamble * and FCS/CRC (frame check sequence). @@ -100,7 +102,7 @@ struct ethhdr { unsigned char h_dest[ETH_ALEN]; /* destination eth addr */ unsigned char h_source[ETH_ALEN]; /* source ether addr */ - unsigned short h_proto; /* packet type ID field */ + __be16 h_proto; /* packet type ID field */ } __attribute__((packed)); #ifdef __KERNEL__ @@ -111,7 +113,9 @@ static inline struct ethhdr *eth_hdr(const struct sk_buff *skb) return (struct ethhdr *)skb->mac.raw; } +#ifdef CONFIG_SYSCTL extern struct ctl_table ether_table[]; #endif +#endif #endif /* _LINUX_IF_ETHER_H */ diff --git a/include/linux/if_ppp.h b/include/linux/if_ppp.h index 572aff7daa21..768372f07caa 100644 --- a/include/linux/if_ppp.h +++ b/include/linux/if_ppp.h @@ -21,7 +21,7 @@ */ /* - * ==FILEVERSION 20000724== + * ==FILEVERSION 20050812== * * NOTE TO MAINTAINERS: * If you modify this file at all, please set the above date. @@ -35,6 +35,8 @@ #ifndef _IF_PPP_H_ #define _IF_PPP_H_ +#include <linux/compiler.h> + /* * Packet sizes */ @@ -70,7 +72,8 @@ #define SC_LOG_RAWIN 0x00080000 /* log all chars received */ #define SC_LOG_FLUSH 0x00100000 /* log all chars flushed */ #define SC_SYNC 0x00200000 /* synchronous serial mode */ -#define SC_MASK 0x0f200fff /* bits that user can change */ +#define SC_MUST_COMP 0x00400000 /* no uncompressed packets may be sent or received */ +#define SC_MASK 0x0f600fff /* bits that user can change */ /* state bits */ #define SC_XMIT_BUSY 0x10000000 /* (used by isdn_ppp?) */ diff --git a/include/linux/if_wanpipe_common.h b/include/linux/if_wanpipe_common.h index f25fec8ee2ca..6e5461d69fdd 100644 --- a/include/linux/if_wanpipe_common.h +++ b/include/linux/if_wanpipe_common.h @@ -17,8 +17,6 @@ #ifndef _WANPIPE_SOCK_DRIVER_COMMON_H #define _WANPIPE_SOCK_DRIVER_COMMON_H -#include <linux/version.h> - typedef struct { struct net_device *slave; atomic_t packet_sent; diff --git a/include/linux/inetdevice.h b/include/linux/inetdevice.h index 7e1e15f934f3..fd7af86151b1 100644 --- a/include/linux/inetdevice.h +++ b/include/linux/inetdevice.h @@ -142,13 +142,21 @@ static __inline__ int bad_mask(u32 mask, u32 addr) #define endfor_ifa(in_dev) } +static inline struct in_device *__in_dev_get_rcu(const struct net_device *dev) +{ + struct in_device *in_dev = dev->ip_ptr; + if (in_dev) + in_dev = rcu_dereference(in_dev); + return in_dev; +} + static __inline__ struct in_device * in_dev_get(const struct net_device *dev) { struct in_device *in_dev; rcu_read_lock(); - in_dev = dev->ip_ptr; + in_dev = __in_dev_get_rcu(dev); if (in_dev) atomic_inc(&in_dev->refcnt); rcu_read_unlock(); @@ -156,7 +164,7 @@ in_dev_get(const struct net_device *dev) } static __inline__ struct in_device * -__in_dev_get(const struct net_device *dev) +__in_dev_get_rtnl(const struct net_device *dev) { return (struct in_device*)dev->ip_ptr; } diff --git a/include/linux/init_task.h b/include/linux/init_task.h index 68ab5f2ab9cd..dcfd2ecccb5d 100644 --- a/include/linux/init_task.h +++ b/include/linux/init_task.h @@ -51,7 +51,6 @@ .page_table_lock = SPIN_LOCK_UNLOCKED, \ .mmlist = LIST_HEAD_INIT(name.mmlist), \ .cpu_vm_mask = CPU_MASK_ALL, \ - .default_kioctx = INIT_KIOCTX(name.default_kioctx, name), \ } #define INIT_SIGNALS(sig) { \ diff --git a/include/linux/input.h b/include/linux/input.h index e8c296ff6257..3c5823368ddb 100644 --- a/include/linux/input.h +++ b/include/linux/input.h @@ -12,6 +12,7 @@ #ifdef __KERNEL__ #include <linux/time.h> #include <linux/list.h> +#include <linux/device.h> #else #include <sys/time.h> #include <sys/ioctl.h> @@ -644,6 +645,7 @@ struct input_absinfo { #define BUS_ADB 0x17 #define BUS_I2C 0x18 #define BUS_HOST 0x19 +#define BUS_GSC 0x1A /* * Values describing the status of an effect @@ -889,11 +891,15 @@ struct input_dev { struct semaphore sem; /* serializes open and close operations */ unsigned int users; - struct device *dev; + struct class_device cdev; + struct device *dev; /* will be removed soon */ + + int dynalloc; /* temporarily */ struct list_head h_list; struct list_head node; }; +#define to_input_dev(d) container_of(d, struct input_dev, cdev) /* * Structure for hotplug & device<->driver matching. @@ -984,7 +990,24 @@ static inline void init_input_dev(struct input_dev *dev) INIT_LIST_HEAD(&dev->node); } -void input_register_device(struct input_dev *); +struct input_dev *input_allocate_device(void); + +static inline void input_free_device(struct input_dev *dev) +{ + kfree(dev); +} + +static inline struct input_dev *input_get_device(struct input_dev *dev) +{ + return to_input_dev(class_device_get(&dev->cdev)); +} + +static inline void input_put_device(struct input_dev *dev) +{ + class_device_put(&dev->cdev); +} + +int input_register_device(struct input_dev *); void input_unregister_device(struct input_dev *); void input_register_handler(struct input_handler *); @@ -1052,7 +1075,7 @@ static inline void input_set_abs_params(struct input_dev *dev, int axis, int min dev->absbit[LONG(axis)] |= BIT(axis); } -extern struct class *input_class; +extern struct class input_class; #endif #endif diff --git a/include/linux/interrupt.h b/include/linux/interrupt.h index 0a90205184b0..41f150a3d2dd 100644 --- a/include/linux/interrupt.h +++ b/include/linux/interrupt.h @@ -9,6 +9,7 @@ #include <linux/preempt.h> #include <linux/cpumask.h> #include <linux/hardirq.h> +#include <linux/sched.h> #include <asm/atomic.h> #include <asm/ptrace.h> #include <asm/system.h> diff --git a/include/linux/ioport.h b/include/linux/ioport.h index 18d010bee635..cd6bd001ba4e 100644 --- a/include/linux/ioport.h +++ b/include/linux/ioport.h @@ -94,7 +94,7 @@ extern struct resource iomem_resource; extern int request_resource(struct resource *root, struct resource *new); extern struct resource * ____request_resource(struct resource *root, struct resource *new); extern int release_resource(struct resource *new); -extern int insert_resource(struct resource *parent, struct resource *new); +extern __deprecated_for_modules int insert_resource(struct resource *parent, struct resource *new); extern int allocate_resource(struct resource *root, struct resource *new, unsigned long size, unsigned long min, unsigned long max, diff --git a/include/linux/ipmi.h b/include/linux/ipmi.h index 938d55b813a5..d6276e60b3bf 100644 --- a/include/linux/ipmi.h +++ b/include/linux/ipmi.h @@ -256,10 +256,7 @@ struct ipmi_recv_msg }; /* Allocate and free the receive message. */ -static inline void ipmi_free_recv_msg(struct ipmi_recv_msg *msg) -{ - msg->done(msg); -} +void ipmi_free_recv_msg(struct ipmi_recv_msg *msg); struct ipmi_user_hndl { diff --git a/include/linux/ipv6.h b/include/linux/ipv6.h index bb6f88e14061..e0b922785d98 100644 --- a/include/linux/ipv6.h +++ b/include/linux/ipv6.h @@ -372,8 +372,9 @@ static inline struct raw6_sock *raw6_sk(const struct sock *sk) #define inet_v6_ipv6only(__sk) 0 #endif /* defined(CONFIG_IPV6) || defined(CONFIG_IPV6_MODULE) */ -#define INET6_MATCH(__sk, __saddr, __daddr, __ports, __dif) \ - (((*((__u32 *)&(inet_sk(__sk)->dport))) == (__ports)) && \ +#define INET6_MATCH(__sk, __hash, __saddr, __daddr, __ports, __dif)\ + (((__sk)->sk_hash == (__hash)) && \ + ((*((__u32 *)&(inet_sk(__sk)->dport))) == (__ports)) && \ ((__sk)->sk_family == AF_INET6) && \ ipv6_addr_equal(&inet6_sk(__sk)->daddr, (__saddr)) && \ ipv6_addr_equal(&inet6_sk(__sk)->rcv_saddr, (__daddr)) && \ diff --git a/include/linux/irq.h b/include/linux/irq.h index 69681c3b1f05..c516382fbec2 100644 --- a/include/linux/irq.h +++ b/include/linux/irq.h @@ -10,6 +10,7 @@ */ #include <linux/config.h> +#include <asm/smp.h> /* cpu_online_map */ #if !defined(CONFIG_ARCH_S390) diff --git a/include/linux/istallion.h b/include/linux/istallion.h index 5f4ee646c119..1f996621bc9c 100644 --- a/include/linux/istallion.h +++ b/include/linux/istallion.h @@ -21,8 +21,6 @@ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */ -#include <linux/version.h> - /*****************************************************************************/ #ifndef _ISTALLION_H #define _ISTALLION_H diff --git a/include/linux/jbd.h b/include/linux/jbd.h index de097269bd7f..dcde7adfdce5 100644 --- a/include/linux/jbd.h +++ b/include/linux/jbd.h @@ -16,8 +16,6 @@ #ifndef _LINUX_JBD_H #define _LINUX_JBD_H -#if defined(CONFIG_JBD) || defined(CONFIG_JBD_MODULE) || !defined(__KERNEL__) - /* Allow this file to be included directly into e2fsprogs */ #ifndef __KERNEL__ #include "jfs_compat.h" @@ -69,7 +67,7 @@ extern int journal_enable_debug; #define jbd_debug(f, a...) /**/ #endif -extern void * __jbd_kmalloc (const char *where, size_t size, int flags, int retry); +extern void * __jbd_kmalloc (const char *where, size_t size, gfp_t flags, int retry); #define jbd_kmalloc(size, flags) \ __jbd_kmalloc(__FUNCTION__, (size), (flags), journal_oom_retry) #define jbd_rep_kmalloc(size, flags) \ @@ -611,6 +609,9 @@ struct transaction_s * @j_revoke: The revoke table - maintains the list of revoked blocks in the * current transaction. * @j_revoke_table: alternate revoke tables for j_revoke + * @j_wbuf: array of buffer_heads for journal_commit_transaction + * @j_wbufsize: maximum number of buffer_heads allowed in j_wbuf, the + * number that will fit in j_blocksize * @j_private: An opaque pointer to fs-private information. */ @@ -890,7 +891,7 @@ extern int journal_forget (handle_t *, struct buffer_head *); extern void journal_sync_buffer (struct buffer_head *); extern int journal_invalidatepage(journal_t *, struct page *, unsigned long); -extern int journal_try_to_free_buffers(journal_t *, struct page *, int); +extern int journal_try_to_free_buffers(journal_t *, struct page *, gfp_t); extern int journal_stop(handle_t *); extern int journal_flush (journal_t *); extern void journal_lock_updates (journal_t *); @@ -935,7 +936,7 @@ void journal_put_journal_head(struct journal_head *jh); */ extern kmem_cache_t *jbd_handle_cache; -static inline handle_t *jbd_alloc_handle(unsigned int __nocast gfp_flags) +static inline handle_t *jbd_alloc_handle(gfp_t gfp_flags) { return kmem_cache_alloc(jbd_handle_cache, gfp_flags); } @@ -1080,19 +1081,4 @@ extern int jbd_blocks_per_page(struct inode *inode); #endif /* __KERNEL__ */ -#endif /* CONFIG_JBD || CONFIG_JBD_MODULE || !__KERNEL__ */ - -/* - * Compatibility no-ops which allow the kernel to compile without CONFIG_JBD - * go here. - */ - -#if defined(__KERNEL__) && !(defined(CONFIG_JBD) || defined(CONFIG_JBD_MODULE)) - -#define J_ASSERT(expr) do {} while (0) -#define J_ASSERT_BH(bh, expr) do {} while (0) -#define buffer_jbd(bh) 0 -#define journal_buffer_journal_lru(bh) 0 - -#endif /* defined(__KERNEL__) && !defined(CONFIG_JBD) */ #endif /* _LINUX_JBD_H */ diff --git a/include/linux/jffs2.h b/include/linux/jffs2.h index 419fc953ac16..cf792bb3c726 100644 --- a/include/linux/jffs2.h +++ b/include/linux/jffs2.h @@ -5,10 +5,10 @@ * * Created by David Woodhouse <dwmw2@infradead.org> * - * For licensing information, see the file 'LICENCE' in the + * For licensing information, see the file 'LICENCE' in the * jffs2 directory. * - * $Id: jffs2.h,v 1.34 2004/11/16 20:36:14 dwmw2 Exp $ + * $Id: jffs2.h,v 1.38 2005/09/26 11:37:23 havasi Exp $ * */ @@ -28,6 +28,9 @@ #define JFFS2_EMPTY_BITMASK 0xffff #define JFFS2_DIRTY_BITMASK 0x0000 +/* Summary node MAGIC marker */ +#define JFFS2_SUM_MAGIC 0x02851885 + /* We only allow a single char for length, and 0xFF is empty flash so we don't want it confused with a real length. Hence max 254. */ @@ -43,8 +46,6 @@ #define JFFS2_COMPR_COPY 0x04 #define JFFS2_COMPR_DYNRUBIN 0x05 #define JFFS2_COMPR_ZLIB 0x06 -#define JFFS2_COMPR_LZO 0x07 -#define JFFS2_COMPR_LZARI 0x08 /* Compatibility flags. */ #define JFFS2_COMPAT_MASK 0xc000 /* What do to if an unknown nodetype is found */ #define JFFS2_NODE_ACCURATE 0x2000 @@ -62,15 +63,17 @@ #define JFFS2_NODETYPE_CLEANMARKER (JFFS2_FEATURE_RWCOMPAT_DELETE | JFFS2_NODE_ACCURATE | 3) #define JFFS2_NODETYPE_PADDING (JFFS2_FEATURE_RWCOMPAT_DELETE | JFFS2_NODE_ACCURATE | 4) +#define JFFS2_NODETYPE_SUMMARY (JFFS2_FEATURE_RWCOMPAT_DELETE | JFFS2_NODE_ACCURATE | 6) + // Maybe later... //#define JFFS2_NODETYPE_CHECKPOINT (JFFS2_FEATURE_RWCOMPAT_DELETE | JFFS2_NODE_ACCURATE | 3) //#define JFFS2_NODETYPE_OPTIONS (JFFS2_FEATURE_RWCOMPAT_COPY | JFFS2_NODE_ACCURATE | 4) -#define JFFS2_INO_FLAG_PREREAD 1 /* Do read_inode() for this one at - mount time, don't wait for it to +#define JFFS2_INO_FLAG_PREREAD 1 /* Do read_inode() for this one at + mount time, don't wait for it to happen later */ -#define JFFS2_INO_FLAG_USERCOMPR 2 /* User has requested a specific +#define JFFS2_INO_FLAG_USERCOMPR 2 /* User has requested a specific compression type */ @@ -101,7 +104,7 @@ struct jffs2_unknown_node struct jffs2_raw_dirent { jint16_t magic; - jint16_t nodetype; /* == JFFS_NODETYPE_DIRENT */ + jint16_t nodetype; /* == JFFS2_NODETYPE_DIRENT */ jint32_t totlen; jint32_t hdr_crc; jint32_t pino; @@ -117,7 +120,7 @@ struct jffs2_raw_dirent } __attribute__((packed)); /* The JFFS2 raw inode structure: Used for storage on physical media. */ -/* The uid, gid, atime, mtime and ctime members could be longer, but +/* The uid, gid, atime, mtime and ctime members could be longer, but are left like this for space efficiency. If and when people decide they really need them extended, it's simple enough to add support for a new type of raw node. @@ -125,7 +128,7 @@ struct jffs2_raw_dirent struct jffs2_raw_inode { jint16_t magic; /* A constant magic number. */ - jint16_t nodetype; /* == JFFS_NODETYPE_INODE */ + jint16_t nodetype; /* == JFFS2_NODETYPE_INODE */ jint32_t totlen; /* Total length of this node (inc data, etc.) */ jint32_t hdr_crc; jint32_t ino; /* Inode number. */ @@ -148,9 +151,25 @@ struct jffs2_raw_inode uint8_t data[0]; } __attribute__((packed)); -union jffs2_node_union { +struct jffs2_raw_summary +{ + jint16_t magic; + jint16_t nodetype; /* = JFFS2_NODETYPE_SUMMARY */ + jint32_t totlen; + jint32_t hdr_crc; + jint32_t sum_num; /* number of sum entries*/ + jint32_t cln_mkr; /* clean marker size, 0 = no cleanmarker */ + jint32_t padded; /* sum of the size of padding nodes */ + jint32_t sum_crc; /* summary information crc */ + jint32_t node_crc; /* node crc */ + jint32_t sum[0]; /* inode summary info */ +} __attribute__((packed)); + +union jffs2_node_union +{ struct jffs2_raw_inode i; struct jffs2_raw_dirent d; + struct jffs2_raw_summary s; struct jffs2_unknown_node u; }; diff --git a/include/linux/jffs2_fs_i.h b/include/linux/jffs2_fs_i.h index 6dbb1cce6646..ef85ab56302b 100644 --- a/include/linux/jffs2_fs_i.h +++ b/include/linux/jffs2_fs_i.h @@ -1,4 +1,4 @@ -/* $Id: jffs2_fs_i.h,v 1.17 2004/11/11 23:51:27 dwmw2 Exp $ */ +/* $Id: jffs2_fs_i.h,v 1.19 2005/11/07 11:14:52 gleixner Exp $ */ #ifndef _JFFS2_FS_I #define _JFFS2_FS_I @@ -25,13 +25,16 @@ struct jffs2_inode_info { /* There may be one datanode which isn't referenced by any of the above fragments, if it contains a metadata update but no actual data - or if this is a directory inode */ - /* This also holds the _only_ dnode for symlinks/device nodes, + /* This also holds the _only_ dnode for symlinks/device nodes, etc. */ struct jffs2_full_dnode *metadata; /* Directory entries */ struct jffs2_full_dirent *dents; + /* The target path if this is the inode of a symlink */ + unsigned char *target; + /* Some stuff we just have to keep in-core at all times, for each inode. */ struct jffs2_inode_cache *inocache; diff --git a/include/linux/jffs2_fs_sb.h b/include/linux/jffs2_fs_sb.h index 1e21546622de..4bcfb5570221 100644 --- a/include/linux/jffs2_fs_sb.h +++ b/include/linux/jffs2_fs_sb.h @@ -1,4 +1,4 @@ -/* $Id: jffs2_fs_sb.h,v 1.52 2005/05/19 16:12:17 gleixner Exp $ */ +/* $Id: jffs2_fs_sb.h,v 1.54 2005/09/21 13:37:34 dedekind Exp $ */ #ifndef _JFFS2_FS_SB #define _JFFS2_FS_SB @@ -20,7 +20,7 @@ struct jffs2_inodirty; /* A struct for the overall file system control. Pointers to - jffs2_sb_info structs are named `c' in the source code. + jffs2_sb_info structs are named `c' in the source code. Nee jffs_control */ struct jffs2_sb_info { @@ -35,7 +35,7 @@ struct jffs2_sb_info { struct completion gc_thread_start; /* GC thread start completion */ struct completion gc_thread_exit; /* GC thread exit completion port */ - struct semaphore alloc_sem; /* Used to protect all the following + struct semaphore alloc_sem; /* Used to protect all the following fields, and also to protect against out-of-order writing of nodes. And GC. */ uint32_t cleanmarker_size; /* Size of an _inline_ CLEANMARKER @@ -64,7 +64,7 @@ struct jffs2_sb_info { uint32_t nospc_dirty_size; uint32_t nr_blocks; - struct jffs2_eraseblock *blocks; /* The whole array of blocks. Used for getting blocks + struct jffs2_eraseblock *blocks; /* The whole array of blocks. Used for getting blocks * from the offset (blocks[ofs / sector_size]) */ struct jffs2_eraseblock *nextblock; /* The block we're currently filling */ @@ -82,25 +82,26 @@ struct jffs2_sb_info { struct list_head bad_list; /* Bad blocks. */ struct list_head bad_used_list; /* Bad blocks with valid data in. */ - spinlock_t erase_completion_lock; /* Protect free_list and erasing_list + spinlock_t erase_completion_lock; /* Protect free_list and erasing_list against erase completion handler */ wait_queue_head_t erase_wait; /* For waiting for erases to complete */ wait_queue_head_t inocache_wq; struct jffs2_inode_cache **inocache_list; spinlock_t inocache_lock; - + /* Sem to allow jffs2_garbage_collect_deletion_dirent to - drop the erase_completion_lock while it's holding a pointer + drop the erase_completion_lock while it's holding a pointer to an obsoleted node. I don't like this. Alternatives welcomed. */ struct semaphore erase_free_sem; + uint32_t wbuf_pagesize; /* 0 for NOR and other flashes with no wbuf */ + #ifdef CONFIG_JFFS2_FS_WRITEBUFFER /* Write-behind buffer for NAND flash */ unsigned char *wbuf; uint32_t wbuf_ofs; uint32_t wbuf_len; - uint32_t wbuf_pagesize; struct jffs2_inodirty *wbuf_inodes; struct rw_semaphore wbuf_sem; /* Protects the write buffer */ @@ -112,6 +113,8 @@ struct jffs2_sb_info { uint32_t fsdata_len; #endif + struct jffs2_summary *summary; /* Summary information */ + /* OS-private pointer for getting back to master superblock info */ void *os_priv; }; diff --git a/include/linux/kernel.h b/include/linux/kernel.h index 4367ce4db52a..b1e407a4fbda 100644 --- a/include/linux/kernel.h +++ b/include/linux/kernel.h @@ -168,7 +168,7 @@ static inline void console_verbose(void) extern void bust_spinlocks(int yes); extern int oops_in_progress; /* If set, an oops, panic(), BUG() or die() is in progress */ -extern int panic_timeout; +extern __deprecated_for_modules int panic_timeout; extern int panic_on_oops; extern int tainted; extern const char *print_tainted(void); @@ -266,7 +266,6 @@ extern void dump_stack(void); /** * container_of - cast a member of a structure out to the containing structure - * * @ptr: the pointer to the member. * @type: the type of the container struct this is embedded in. * @member: the name of the member within the struct. @@ -307,7 +306,7 @@ struct sysinfo { char _f[20-2*sizeof(long)-sizeof(int)]; /* Padding: libc5 uses this.. */ }; -/* Force a compilation error if condition is false */ +/* Force a compilation error if condition is true */ #define BUILD_BUG_ON(condition) ((void)sizeof(char[1 - 2*!!(condition)])) #ifdef CONFIG_SYSCTL diff --git a/include/linux/kernel_stat.h b/include/linux/kernel_stat.h index dba27749b428..a484572c302e 100644 --- a/include/linux/kernel_stat.h +++ b/include/linux/kernel_stat.h @@ -6,6 +6,7 @@ #include <linux/smp.h> #include <linux/threads.h> #include <linux/percpu.h> +#include <linux/cpumask.h> #include <asm/cputime.h> /* @@ -43,11 +44,10 @@ extern unsigned long long nr_context_switches(void); */ static inline int kstat_irqs(int irq) { - int i, sum=0; + int cpu, sum = 0; - for (i = 0; i < NR_CPUS; i++) - if (cpu_possible(i)) - sum += kstat_cpu(i).irqs[irq]; + for_each_cpu(cpu) + sum += kstat_cpu(cpu).irqs[irq]; return sum; } diff --git a/include/linux/key-ui.h b/include/linux/key-ui.h index cc326174a808..e8b8a7a5c496 100644 --- a/include/linux/key-ui.h +++ b/include/linux/key-ui.h @@ -24,7 +24,8 @@ extern spinlock_t key_serial_lock; #define KEY_WRITE 0x04 /* require permission to update / modify */ #define KEY_SEARCH 0x08 /* require permission to search (keyring) or find (key) */ #define KEY_LINK 0x10 /* require permission to link */ -#define KEY_ALL 0x1f /* all the above permissions */ +#define KEY_SETATTR 0x20 /* require permission to change attributes */ +#define KEY_ALL 0x3f /* all the above permissions */ /* * the keyring payload contains a list of the keys to which the keyring is @@ -38,92 +39,21 @@ struct keyring_list { struct key *keys[0]; }; - /* * check to see whether permission is granted to use a key in the desired way */ -static inline int key_permission(const struct key *key, key_perm_t perm) -{ - key_perm_t kperm; - - if (key->uid == current->fsuid) - kperm = key->perm >> 16; - else if (key->gid != -1 && - key->perm & KEY_GRP_ALL && - in_group_p(key->gid) - ) - kperm = key->perm >> 8; - else - kperm = key->perm; - - kperm = kperm & perm & KEY_ALL; - - return kperm == perm; -} - -/* - * check to see whether permission is granted to use a key in at least one of - * the desired ways - */ -static inline int key_any_permission(const struct key *key, key_perm_t perm) -{ - key_perm_t kperm; - - if (key->uid == current->fsuid) - kperm = key->perm >> 16; - else if (key->gid != -1 && - key->perm & KEY_GRP_ALL && - in_group_p(key->gid) - ) - kperm = key->perm >> 8; - else - kperm = key->perm; +extern int key_task_permission(const key_ref_t key_ref, + struct task_struct *context, + key_perm_t perm); - kperm = kperm & perm & KEY_ALL; - - return kperm != 0; -} - -static inline int key_task_groups_search(struct task_struct *tsk, gid_t gid) +static inline int key_permission(const key_ref_t key_ref, key_perm_t perm) { - int ret; - - task_lock(tsk); - ret = groups_search(tsk->group_info, gid); - task_unlock(tsk); - return ret; -} - -static inline int key_task_permission(const struct key *key, - struct task_struct *context, - key_perm_t perm) -{ - key_perm_t kperm; - - if (key->uid == context->fsuid) { - kperm = key->perm >> 16; - } - else if (key->gid != -1 && - key->perm & KEY_GRP_ALL && ( - key->gid == context->fsgid || - key_task_groups_search(context, key->gid) - ) - ) { - kperm = key->perm >> 8; - } - else { - kperm = key->perm; - } - - kperm = kperm & perm & KEY_ALL; - - return kperm == perm; - + return key_task_permission(key_ref, current, perm); } -extern struct key *lookup_user_key(struct task_struct *context, - key_serial_t id, int create, int partial, - key_perm_t perm); +extern key_ref_t lookup_user_key(struct task_struct *context, + key_serial_t id, int create, int partial, + key_perm_t perm); extern long join_session_keyring(const char *name); diff --git a/include/linux/key.h b/include/linux/key.h index 970bbd916cf4..53513a3be53b 100644 --- a/include/linux/key.h +++ b/include/linux/key.h @@ -35,26 +35,37 @@ struct key; #undef KEY_DEBUGGING -#define KEY_USR_VIEW 0x00010000 /* user can view a key's attributes */ -#define KEY_USR_READ 0x00020000 /* user can read key payload / view keyring */ -#define KEY_USR_WRITE 0x00040000 /* user can update key payload / add link to keyring */ -#define KEY_USR_SEARCH 0x00080000 /* user can find a key in search / search a keyring */ -#define KEY_USR_LINK 0x00100000 /* user can create a link to a key/keyring */ -#define KEY_USR_ALL 0x001f0000 +#define KEY_POS_VIEW 0x01000000 /* possessor can view a key's attributes */ +#define KEY_POS_READ 0x02000000 /* possessor can read key payload / view keyring */ +#define KEY_POS_WRITE 0x04000000 /* possessor can update key payload / add link to keyring */ +#define KEY_POS_SEARCH 0x08000000 /* possessor can find a key in search / search a keyring */ +#define KEY_POS_LINK 0x10000000 /* possessor can create a link to a key/keyring */ +#define KEY_POS_SETATTR 0x20000000 /* possessor can set key attributes */ +#define KEY_POS_ALL 0x3f000000 + +#define KEY_USR_VIEW 0x00010000 /* user permissions... */ +#define KEY_USR_READ 0x00020000 +#define KEY_USR_WRITE 0x00040000 +#define KEY_USR_SEARCH 0x00080000 +#define KEY_USR_LINK 0x00100000 +#define KEY_USR_SETATTR 0x00200000 +#define KEY_USR_ALL 0x003f0000 #define KEY_GRP_VIEW 0x00000100 /* group permissions... */ #define KEY_GRP_READ 0x00000200 #define KEY_GRP_WRITE 0x00000400 #define KEY_GRP_SEARCH 0x00000800 #define KEY_GRP_LINK 0x00001000 -#define KEY_GRP_ALL 0x00001f00 +#define KEY_GRP_SETATTR 0x00002000 +#define KEY_GRP_ALL 0x00003f00 #define KEY_OTH_VIEW 0x00000001 /* third party permissions... */ #define KEY_OTH_READ 0x00000002 #define KEY_OTH_WRITE 0x00000004 #define KEY_OTH_SEARCH 0x00000008 #define KEY_OTH_LINK 0x00000010 -#define KEY_OTH_ALL 0x0000001f +#define KEY_OTH_SETATTR 0x00000020 +#define KEY_OTH_ALL 0x0000003f struct seq_file; struct user_struct; @@ -67,6 +78,38 @@ struct keyring_name; /*****************************************************************************/ /* + * key reference with possession attribute handling + * + * NOTE! key_ref_t is a typedef'd pointer to a type that is not actually + * defined. This is because we abuse the bottom bit of the reference to carry a + * flag to indicate whether the calling process possesses that key in one of + * its keyrings. + * + * the key_ref_t has been made a separate type so that the compiler can reject + * attempts to dereference it without proper conversion. + * + * the three functions are used to assemble and disassemble references + */ +typedef struct __key_reference_with_attributes *key_ref_t; + +static inline key_ref_t make_key_ref(const struct key *key, + unsigned long possession) +{ + return (key_ref_t) ((unsigned long) key | possession); +} + +static inline struct key *key_ref_to_ptr(const key_ref_t key_ref) +{ + return (struct key *) ((unsigned long) key_ref & ~1UL); +} + +static inline unsigned long is_key_possessed(const key_ref_t key_ref) +{ + return (unsigned long) key_ref & 1UL; +} + +/*****************************************************************************/ +/* * authentication token / access credential / keyring * - types of key include: * - keyrings @@ -80,6 +123,7 @@ struct key { struct key_type *type; /* type of key */ struct rw_semaphore sem; /* change vs change sem */ struct key_user *user; /* owner of this key */ + void *security; /* security data for this key */ time_t expiry; /* time at which key expires (or 0) */ uid_t uid; gid_t gid; @@ -215,20 +259,25 @@ static inline struct key *key_get(struct key *key) return key; } +static inline void key_ref_put(key_ref_t key_ref) +{ + key_put(key_ref_to_ptr(key_ref)); +} + extern struct key *request_key(struct key_type *type, const char *description, const char *callout_info); extern int key_validate(struct key *key); -extern struct key *key_create_or_update(struct key *keyring, - const char *type, - const char *description, - const void *payload, - size_t plen, - int not_in_quota); +extern key_ref_t key_create_or_update(key_ref_t keyring, + const char *type, + const char *description, + const void *payload, + size_t plen, + int not_in_quota); -extern int key_update(struct key *key, +extern int key_update(key_ref_t key, const void *payload, size_t plen); @@ -243,9 +292,9 @@ extern struct key *keyring_alloc(const char *description, uid_t uid, gid_t gid, extern int keyring_clear(struct key *keyring); -extern struct key *keyring_search(struct key *keyring, - struct key_type *type, - const char *description); +extern key_ref_t keyring_search(key_ref_t keyring, + struct key_type *type, + const char *description); extern int keyring_add_key(struct key *keyring, struct key *key); @@ -285,6 +334,10 @@ extern void key_init(void); #define key_serial(k) 0 #define key_get(k) ({ NULL; }) #define key_put(k) do { } while(0) +#define key_ref_put(k) do { } while(0) +#define make_key_ref(k) ({ NULL; }) +#define key_ref_to_ptr(k) ({ NULL; }) +#define is_key_possessed(k) 0 #define alloc_uid_keyring(u) 0 #define switch_uid_keyring(u) do { } while(0) #define __install_session_keyring(t, k) ({ NULL; }) diff --git a/include/linux/kfifo.h b/include/linux/kfifo.h index c27cd428d269..48eccd865bd8 100644 --- a/include/linux/kfifo.h +++ b/include/linux/kfifo.h @@ -35,8 +35,8 @@ struct kfifo { }; extern struct kfifo *kfifo_init(unsigned char *buffer, unsigned int size, - unsigned int __nocast gfp_mask, spinlock_t *lock); -extern struct kfifo *kfifo_alloc(unsigned int size, unsigned int __nocast gfp_mask, + gfp_t gfp_mask, spinlock_t *lock); +extern struct kfifo *kfifo_alloc(unsigned int size, gfp_t gfp_mask, spinlock_t *lock); extern void kfifo_free(struct kfifo *fifo); extern unsigned int __kfifo_put(struct kfifo *fifo, diff --git a/include/linux/kobj_map.h b/include/linux/kobj_map.h index b6cc10bf8dfc..cbe7d8008042 100644 --- a/include/linux/kobj_map.h +++ b/include/linux/kobj_map.h @@ -1,5 +1,7 @@ #ifdef __KERNEL__ +#include <asm/semaphore.h> + typedef struct kobject *kobj_probe_t(dev_t, int *, void *); struct kobj_map; diff --git a/include/linux/kobject.h b/include/linux/kobject.h index 3b22304f12fd..7f7403aa4a41 100644 --- a/include/linux/kobject.h +++ b/include/linux/kobject.h @@ -65,7 +65,7 @@ extern void kobject_unregister(struct kobject *); extern struct kobject * kobject_get(struct kobject *); extern void kobject_put(struct kobject *); -extern char * kobject_get_path(struct kobject *, int); +extern char * kobject_get_path(struct kobject *, gfp_t); struct kobj_type { void (*release)(struct kobject *); diff --git a/include/linux/kprobes.h b/include/linux/kprobes.h index e30afdca7917..e373c4a9de53 100644 --- a/include/linux/kprobes.h +++ b/include/linux/kprobes.h @@ -33,6 +33,9 @@ #include <linux/list.h> #include <linux/notifier.h> #include <linux/smp.h> +#include <linux/percpu.h> +#include <linux/spinlock.h> +#include <linux/rcupdate.h> #include <asm/kprobes.h> @@ -106,6 +109,9 @@ struct jprobe { kprobe_opcode_t *entry; /* probe handling code to jump to */ }; +DECLARE_PER_CPU(struct kprobe *, current_kprobe); +DECLARE_PER_CPU(struct kprobe_ctlblk, kprobe_ctlblk); + #ifdef ARCH_SUPPORTS_KRETPROBES extern void arch_prepare_kretprobe(struct kretprobe *rp, struct pt_regs *regs); #else /* ARCH_SUPPORTS_KRETPROBES */ @@ -142,17 +148,7 @@ struct kretprobe_instance { }; #ifdef CONFIG_KPROBES -/* Locks kprobe: irq must be disabled */ -void lock_kprobes(void); -void unlock_kprobes(void); - -/* kprobe running now on this CPU? */ -static inline int kprobe_running(void) -{ - extern unsigned int kprobe_cpu; - return kprobe_cpu == smp_processor_id(); -} - +extern spinlock_t kretprobe_lock; extern int arch_prepare_kprobe(struct kprobe *p); extern void arch_copy_kprobe(struct kprobe *p); extern void arch_arm_kprobe(struct kprobe *p); @@ -163,10 +159,26 @@ extern void show_registers(struct pt_regs *regs); extern kprobe_opcode_t *get_insn_slot(void); extern void free_insn_slot(kprobe_opcode_t *slot); -/* Get the kprobe at this addr (if any). Must have called lock_kprobes */ +/* Get the kprobe at this addr (if any) - called with preemption disabled */ struct kprobe *get_kprobe(void *addr); struct hlist_head * kretprobe_inst_table_head(struct task_struct *tsk); +/* kprobe_running() will just return the current_kprobe on this CPU */ +static inline struct kprobe *kprobe_running(void) +{ + return (__get_cpu_var(current_kprobe)); +} + +static inline void reset_current_kprobe(void) +{ + __get_cpu_var(current_kprobe) = NULL; +} + +static inline struct kprobe_ctlblk *get_kprobe_ctlblk(void) +{ + return (&__get_cpu_var(kprobe_ctlblk)); +} + int register_kprobe(struct kprobe *p); void unregister_kprobe(struct kprobe *p); int setjmp_pre_handler(struct kprobe *, struct pt_regs *); @@ -183,9 +195,9 @@ void add_rp_inst(struct kretprobe_instance *ri); void kprobe_flush_task(struct task_struct *tk); void recycle_rp_inst(struct kretprobe_instance *ri); #else /* CONFIG_KPROBES */ -static inline int kprobe_running(void) +static inline struct kprobe *kprobe_running(void) { - return 0; + return NULL; } static inline int register_kprobe(struct kprobe *p) { diff --git a/include/linux/kthread.h b/include/linux/kthread.h index 3fa786448db3..ebdd41fd1082 100644 --- a/include/linux/kthread.h +++ b/include/linux/kthread.h @@ -70,6 +70,18 @@ void kthread_bind(struct task_struct *k, unsigned int cpu); int kthread_stop(struct task_struct *k); /** + * kthread_stop_sem: stop a thread created by kthread_create(). + * @k: thread created by kthread_create(). + * @s: semaphore that @k waits on while idle. + * + * Does essentially the same thing as kthread_stop() above, but wakes + * @k by calling up(@s). + * + * Returns the result of threadfn(), or -EINTR if wake_up_process() + * was never called. */ +int kthread_stop_sem(struct task_struct *k, struct semaphore *s); + +/** * kthread_should_stop: should this kthread return now? * * When someone calls kthread_stop on your kthread, it will be woken diff --git a/include/linux/libata.h b/include/linux/libata.h index 022105c745fc..f2dbb684ce9e 100644 --- a/include/linux/libata.h +++ b/include/linux/libata.h @@ -29,6 +29,7 @@ #include <linux/delay.h> #include <linux/interrupt.h> #include <linux/pci.h> +#include <linux/dma-mapping.h> #include <asm/io.h> #include <linux/ata.h> #include <linux/workqueue.h> @@ -58,6 +59,8 @@ #define VPRINTK(fmt, args...) #endif /* ATA_DEBUG */ +#define BPRINTK(fmt, args...) if (ap->flags & ATA_FLAG_DEBUGMSG) printk(KERN_ERR "%s: " fmt, __FUNCTION__, ## args) + #ifdef ATA_NDEBUG #define assert(expr) #else @@ -91,12 +94,13 @@ enum { ATA_SHT_EMULATED = 1, ATA_SHT_CMD_PER_LUN = 1, ATA_SHT_THIS_ID = -1, - ATA_SHT_USE_CLUSTERING = 0, + ATA_SHT_USE_CLUSTERING = 1, /* struct ata_device stuff */ ATA_DFLAG_LBA48 = (1 << 0), /* device supports LBA48 */ ATA_DFLAG_PIO = (1 << 1), /* device currently in PIO mode */ ATA_DFLAG_LOCK_SECTORS = (1 << 2), /* don't adjust max_sectors */ + ATA_DFLAG_LBA = (1 << 3), /* device supports LBA */ ATA_DEV_UNKNOWN = 0, /* unknown device */ ATA_DEV_ATA = 1, /* ATA device */ @@ -117,6 +121,7 @@ enum { ATA_FLAG_PIO_DMA = (1 << 8), /* PIO cmds via DMA */ ATA_FLAG_NOINTR = (1 << 9), /* FIXME: Remove this once * proper HSM is in place. */ + ATA_FLAG_DEBUGMSG = (1 << 10), ATA_QCFLAG_ACTIVE = (1 << 1), /* cmd not yet ack'd to scsi lyer */ ATA_QCFLAG_SG = (1 << 3), /* have s/g table? */ @@ -154,17 +159,32 @@ enum { ATA_SHIFT_UDMA = 0, ATA_SHIFT_MWDMA = 8, ATA_SHIFT_PIO = 11, + + /* size of buffer to pad xfers ending on unaligned boundaries */ + ATA_DMA_PAD_SZ = 4, + ATA_DMA_PAD_BUF_SZ = ATA_DMA_PAD_SZ * ATA_MAX_QUEUE, + + /* Masks for port functions */ + ATA_PORT_PRIMARY = (1 << 0), + ATA_PORT_SECONDARY = (1 << 1), }; -enum pio_task_states { - PIO_ST_UNKNOWN, - PIO_ST_IDLE, - PIO_ST_POLL, - PIO_ST_TMOUT, - PIO_ST, - PIO_ST_LAST, - PIO_ST_LAST_POLL, - PIO_ST_ERR, +enum hsm_task_states { + HSM_ST_UNKNOWN, + HSM_ST_IDLE, + HSM_ST_POLL, + HSM_ST_TMOUT, + HSM_ST, + HSM_ST_LAST, + HSM_ST_LAST_POLL, + HSM_ST_ERR, +}; + +enum ata_completion_errors { + AC_ERR_OTHER = (1 << 0), + AC_ERR_DEV = (1 << 1), + AC_ERR_ATA_BUS = (1 << 2), + AC_ERR_HOST_BUS = (1 << 3), }; /* forward declarations */ @@ -174,7 +194,7 @@ struct ata_port; struct ata_queued_cmd; /* typedefs */ -typedef int (*ata_qc_cb_t) (struct ata_queued_cmd *qc, u8 drv_stat); +typedef int (*ata_qc_cb_t) (struct ata_queued_cmd *qc, unsigned int err_mask); struct ata_ioports { unsigned long cmd_addr; @@ -197,8 +217,8 @@ struct ata_ioports { struct ata_probe_ent { struct list_head node; struct device *dev; - struct ata_port_operations *port_ops; - Scsi_Host_Template *sht; + const struct ata_port_operations *port_ops; + struct scsi_host_template *sht; struct ata_ioports port[ATA_MAX_PORTS]; unsigned int n_ports; unsigned int hard_port_no; @@ -220,7 +240,7 @@ struct ata_host_set { void __iomem *mmio_base; unsigned int n_ports; void *private_data; - struct ata_port_operations *ops; + const struct ata_port_operations *ops; struct ata_port * ports[0]; }; @@ -237,9 +257,12 @@ struct ata_queued_cmd { unsigned long flags; /* ATA_QCFLAG_xxx */ unsigned int tag; unsigned int n_elem; + unsigned int orig_n_elem; int dma_dir; + unsigned int pad_len; + unsigned int nsect; unsigned int cursect; @@ -250,9 +273,11 @@ struct ata_queued_cmd { unsigned int cursg_ofs; struct scatterlist sgent; + struct scatterlist pad_sgent; void *buf_virt; - struct scatterlist *sg; + /* DO NOT iterate over __sg manually, use ata_for_each_sg() */ + struct scatterlist *__sg; ata_qc_cb_t complete_fn; @@ -278,15 +303,18 @@ struct ata_device { u8 xfer_mode; unsigned int xfer_shift; /* ATA_SHIFT_xxx */ - /* cache info about current transfer mode */ - u8 xfer_protocol; /* taskfile xfer protocol */ - u8 read_cmd; /* opcode to use on read */ - u8 write_cmd; /* opcode to use on write */ + unsigned int multi_count; /* sectors count for + READ/WRITE MULTIPLE */ + + /* for CHS addressing */ + u16 cylinders; /* Number of cylinders */ + u16 heads; /* Number of heads */ + u16 sectors; /* Number of sectors per track */ }; struct ata_port { struct Scsi_Host *host; /* our co-allocated scsi host */ - struct ata_port_operations *ops; + const struct ata_port_operations *ops; unsigned long flags; /* ATA_FLAG_xxx */ unsigned int id; /* unique id req'd by scsi midlyr */ unsigned int port_no; /* unique port #; from zero */ @@ -295,6 +323,9 @@ struct ata_port { struct ata_prd *prd; /* our SG list */ dma_addr_t prd_dma; /* and its DMA mapping */ + void *pad; /* array of DMA pad buffers */ + dma_addr_t pad_dma; + struct ata_ioports ioaddr; /* ATA cmd/ctl/dma register blocks */ u8 ctl; /* cache of ATA control register */ @@ -319,7 +350,7 @@ struct ata_port { struct work_struct packet_task; struct work_struct pio_task; - unsigned int pio_task_state; + unsigned int hsm_task_state; unsigned long pio_task_timeout; void *private_data; @@ -333,13 +364,12 @@ struct ata_port_operations { void (*set_piomode) (struct ata_port *, struct ata_device *); void (*set_dmamode) (struct ata_port *, struct ata_device *); - void (*tf_load) (struct ata_port *ap, struct ata_taskfile *tf); + void (*tf_load) (struct ata_port *ap, const struct ata_taskfile *tf); void (*tf_read) (struct ata_port *ap, struct ata_taskfile *tf); - void (*exec_command)(struct ata_port *ap, struct ata_taskfile *tf); + void (*exec_command)(struct ata_port *ap, const struct ata_taskfile *tf); u8 (*check_status)(struct ata_port *ap); u8 (*check_altstatus)(struct ata_port *ap); - u8 (*check_err)(struct ata_port *ap); void (*dev_select)(struct ata_port *ap, unsigned int device); void (*phy_reset) (struct ata_port *ap); @@ -372,14 +402,28 @@ struct ata_port_operations { }; struct ata_port_info { - Scsi_Host_Template *sht; + struct scsi_host_template *sht; unsigned long host_flags; unsigned long pio_mask; unsigned long mwdma_mask; unsigned long udma_mask; - struct ata_port_operations *port_ops; + const struct ata_port_operations *port_ops; + void *private_data; }; +struct ata_timing { + unsigned short mode; /* ATA mode */ + unsigned short setup; /* t1 */ + unsigned short act8b; /* t2 for 8-bit I/O */ + unsigned short rec8b; /* t2i for 8-bit I/O */ + unsigned short cyc8b; /* t0 for 8-bit I/O */ + unsigned short active; /* t2 or tD */ + unsigned short recover; /* t2i or tK */ + unsigned short cycle; /* t0 */ + unsigned short udma; /* t2CYCTYP/2 */ +}; + +#define FIT(v,vmin,vmax) max_t(short,min_t(short,v,vmax),vmin) extern void ata_port_probe(struct ata_port *); extern void __sata_phy_reset(struct ata_port *ap); @@ -392,26 +436,28 @@ extern int ata_pci_init_one (struct pci_dev *pdev, struct ata_port_info **port_i unsigned int n_ports); extern void ata_pci_remove_one (struct pci_dev *pdev); #endif /* CONFIG_PCI */ -extern int ata_device_add(struct ata_probe_ent *ent); -extern int ata_scsi_detect(Scsi_Host_Template *sht); +extern int ata_device_add(const struct ata_probe_ent *ent); +extern void ata_host_set_remove(struct ata_host_set *host_set); +extern int ata_scsi_detect(struct scsi_host_template *sht); extern int ata_scsi_ioctl(struct scsi_device *dev, int cmd, void __user *arg); extern int ata_scsi_queuecmd(struct scsi_cmnd *cmd, void (*done)(struct scsi_cmnd *)); extern int ata_scsi_error(struct Scsi_Host *host); extern int ata_scsi_release(struct Scsi_Host *host); extern unsigned int ata_host_intr(struct ata_port *ap, struct ata_queued_cmd *qc); +extern int ata_ratelimit(void); + /* * Default driver ops implementations */ -extern void ata_tf_load(struct ata_port *ap, struct ata_taskfile *tf); +extern void ata_tf_load(struct ata_port *ap, const struct ata_taskfile *tf); extern void ata_tf_read(struct ata_port *ap, struct ata_taskfile *tf); -extern void ata_tf_to_fis(struct ata_taskfile *tf, u8 *fis, u8 pmp); -extern void ata_tf_from_fis(u8 *fis, struct ata_taskfile *tf); +extern void ata_tf_to_fis(const struct ata_taskfile *tf, u8 *fis, u8 pmp); +extern void ata_tf_from_fis(const u8 *fis, struct ata_taskfile *tf); extern void ata_noop_dev_select (struct ata_port *ap, unsigned int device); extern void ata_std_dev_select (struct ata_port *ap, unsigned int device); extern u8 ata_check_status(struct ata_port *ap); extern u8 ata_altstatus(struct ata_port *ap); -extern u8 ata_chk_err(struct ata_port *ap); -extern void ata_exec_command(struct ata_port *ap, struct ata_taskfile *tf); +extern void ata_exec_command(struct ata_port *ap, const struct ata_taskfile *tf); extern int ata_port_start (struct ata_port *ap); extern void ata_port_stop (struct ata_port *ap); extern void ata_host_stop (struct ata_host_set *host_set); @@ -422,8 +468,8 @@ extern void ata_sg_init_one(struct ata_queued_cmd *qc, void *buf, unsigned int buflen); extern void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg, unsigned int n_elem); -extern unsigned int ata_dev_classify(struct ata_taskfile *tf); -extern void ata_dev_id_string(u16 *id, unsigned char *s, +extern unsigned int ata_dev_classify(const struct ata_taskfile *tf); +extern void ata_dev_id_string(const u16 *id, unsigned char *s, unsigned int ofs, unsigned int len); extern void ata_dev_config(struct ata_port *ap, unsigned int i); extern void ata_bmdma_setup (struct ata_queued_cmd *qc); @@ -431,7 +477,7 @@ extern void ata_bmdma_start (struct ata_queued_cmd *qc); extern void ata_bmdma_stop(struct ata_queued_cmd *qc); extern u8 ata_bmdma_status(struct ata_port *ap); extern void ata_bmdma_irq_clear(struct ata_port *ap); -extern void ata_qc_complete(struct ata_queued_cmd *qc, u8 drv_stat); +extern void ata_qc_complete(struct ata_queued_cmd *qc, unsigned int err_mask); extern void ata_eng_timeout(struct ata_port *ap); extern void ata_scsi_simulate(u16 *id, struct scsi_cmnd *cmd, void (*done)(struct scsi_cmnd *)); @@ -440,6 +486,32 @@ extern int ata_std_bios_param(struct scsi_device *sdev, sector_t capacity, int geom[]); extern int ata_scsi_slave_config(struct scsi_device *sdev); +/* + * Timing helpers + */ +extern int ata_timing_compute(struct ata_device *, unsigned short, + struct ata_timing *, int, int); +extern void ata_timing_merge(const struct ata_timing *, + const struct ata_timing *, struct ata_timing *, + unsigned int); + +enum { + ATA_TIMING_SETUP = (1 << 0), + ATA_TIMING_ACT8B = (1 << 1), + ATA_TIMING_REC8B = (1 << 2), + ATA_TIMING_CYC8B = (1 << 3), + ATA_TIMING_8BIT = ATA_TIMING_ACT8B | ATA_TIMING_REC8B | + ATA_TIMING_CYC8B, + ATA_TIMING_ACTIVE = (1 << 4), + ATA_TIMING_RECOVER = (1 << 5), + ATA_TIMING_CYCLE = (1 << 6), + ATA_TIMING_UDMA = (1 << 7), + ATA_TIMING_ALL = ATA_TIMING_SETUP | ATA_TIMING_ACT8B | + ATA_TIMING_REC8B | ATA_TIMING_CYC8B | + ATA_TIMING_ACTIVE | ATA_TIMING_RECOVER | + ATA_TIMING_CYCLE | ATA_TIMING_UDMA, +}; + #ifdef CONFIG_PCI struct pci_bits { @@ -451,18 +523,43 @@ struct pci_bits { extern void ata_pci_host_stop (struct ata_host_set *host_set); extern struct ata_probe_ent * -ata_pci_init_native_mode(struct pci_dev *pdev, struct ata_port_info **port); -extern int pci_test_config_bits(struct pci_dev *pdev, struct pci_bits *bits); +ata_pci_init_native_mode(struct pci_dev *pdev, struct ata_port_info **port, int portmask); +extern int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bits); #endif /* CONFIG_PCI */ +static inline int +ata_sg_is_last(struct scatterlist *sg, struct ata_queued_cmd *qc) +{ + if (sg == &qc->pad_sgent) + return 1; + if (qc->pad_len) + return 0; + if (((sg - qc->__sg) + 1) == qc->n_elem) + return 1; + return 0; +} + +static inline struct scatterlist * +ata_qc_next_sg(struct scatterlist *sg, struct ata_queued_cmd *qc) +{ + if (sg == &qc->pad_sgent) + return NULL; + if (++sg - qc->__sg < qc->n_elem) + return sg; + return qc->pad_len ? &qc->pad_sgent : NULL; +} + +#define ata_for_each_sg(sg, qc) \ + for (sg = qc->__sg; sg; sg = ata_qc_next_sg(sg, qc)) + static inline unsigned int ata_tag_valid(unsigned int tag) { return (tag < ATA_MAX_QUEUE) ? 1 : 0; } -static inline unsigned int ata_dev_present(struct ata_device *dev) +static inline unsigned int ata_dev_present(const struct ata_device *dev) { return ((dev->class == ATA_DEV_ATA) || (dev->class == ATA_DEV_ATAPI)); @@ -565,6 +662,17 @@ static inline void ata_tf_init(struct ata_port *ap, struct ata_taskfile *tf, uns tf->device = ATA_DEVICE_OBS | ATA_DEV1; } +static inline void ata_qc_reinit(struct ata_queued_cmd *qc) +{ + qc->__sg = NULL; + qc->flags = 0; + qc->cursect = qc->cursg = qc->cursg_ofs = 0; + qc->nsect = 0; + qc->nbytes = qc->curbytes = 0; + + ata_tf_init(qc->ap, &qc->tf, qc->dev->devno); +} + /** * ata_irq_on - Enable interrupts on a port. @@ -661,11 +769,41 @@ static inline unsigned int sata_dev_present(struct ata_port *ap) return ((scr_read(ap, SCR_STATUS) & 0xf) == 0x3) ? 1 : 0; } -static inline int ata_try_flush_cache(struct ata_device *dev) +static inline int ata_try_flush_cache(const struct ata_device *dev) { return ata_id_wcache_enabled(dev->id) || ata_id_has_flush(dev->id) || ata_id_has_flush_ext(dev->id); } +static inline unsigned int ac_err_mask(u8 status) +{ + if (status & ATA_BUSY) + return AC_ERR_ATA_BUS; + if (status & (ATA_ERR | ATA_DF)) + return AC_ERR_DEV; + return 0; +} + +static inline unsigned int __ac_err_mask(u8 status) +{ + unsigned int mask = ac_err_mask(status); + if (mask == 0) + return AC_ERR_OTHER; + return mask; +} + +static inline int ata_pad_alloc(struct ata_port *ap, struct device *dev) +{ + ap->pad_dma = 0; + ap->pad = dma_alloc_coherent(dev, ATA_DMA_PAD_BUF_SZ, + &ap->pad_dma, GFP_KERNEL); + return (ap->pad == NULL) ? -ENOMEM : 0; +} + +static inline void ata_pad_free(struct ata_port *ap, struct device *dev) +{ + dma_free_coherent(dev, ATA_DMA_PAD_BUF_SZ, ap->pad, ap->pad_dma); +} + #endif /* __LINUX_LIBATA_H__ */ diff --git a/include/linux/list.h b/include/linux/list.h index e6ec59682274..fbfca73355a3 100644 --- a/include/linux/list.h +++ b/include/linux/list.h @@ -442,12 +442,14 @@ static inline void list_splice_init(struct list_head *list, * as long as the traversal is guarded by rcu_read_lock(). */ #define list_for_each_rcu(pos, head) \ - for (pos = (head)->next; prefetch(pos->next), pos != (head); \ - pos = rcu_dereference(pos->next)) + for (pos = (head)->next; \ + prefetch(rcu_dereference(pos)->next), pos != (head); \ + pos = pos->next) #define __list_for_each_rcu(pos, head) \ - for (pos = (head)->next; pos != (head); \ - pos = rcu_dereference(pos->next)) + for (pos = (head)->next; \ + rcu_dereference(pos) != (head); \ + pos = pos->next) /** * list_for_each_safe_rcu - iterate over an rcu-protected list safe @@ -461,8 +463,9 @@ static inline void list_splice_init(struct list_head *list, * as long as the traversal is guarded by rcu_read_lock(). */ #define list_for_each_safe_rcu(pos, n, head) \ - for (pos = (head)->next, n = pos->next; pos != (head); \ - pos = rcu_dereference(n), n = pos->next) + for (pos = (head)->next; \ + n = rcu_dereference(pos)->next, pos != (head); \ + pos = n) /** * list_for_each_entry_rcu - iterate over rcu list of given type @@ -474,11 +477,11 @@ static inline void list_splice_init(struct list_head *list, * the _rcu list-mutation primitives such as list_add_rcu() * as long as the traversal is guarded by rcu_read_lock(). */ -#define list_for_each_entry_rcu(pos, head, member) \ - for (pos = list_entry((head)->next, typeof(*pos), member); \ - prefetch(pos->member.next), &pos->member != (head); \ - pos = rcu_dereference(list_entry(pos->member.next, \ - typeof(*pos), member))) +#define list_for_each_entry_rcu(pos, head, member) \ + for (pos = list_entry((head)->next, typeof(*pos), member); \ + prefetch(rcu_dereference(pos)->member.next), \ + &pos->member != (head); \ + pos = list_entry(pos->member.next, typeof(*pos), member)) /** @@ -492,8 +495,9 @@ static inline void list_splice_init(struct list_head *list, * as long as the traversal is guarded by rcu_read_lock(). */ #define list_for_each_continue_rcu(pos, head) \ - for ((pos) = (pos)->next; prefetch((pos)->next), (pos) != (head); \ - (pos) = rcu_dereference((pos)->next)) + for ((pos) = (pos)->next; \ + prefetch(rcu_dereference((pos))->next), (pos) != (head); \ + (pos) = (pos)->next) /* * Double linked lists with a single pointer list head. @@ -597,7 +601,7 @@ static inline void hlist_add_head(struct hlist_node *n, struct hlist_head *h) * or hlist_del_rcu(), running on this same list. * However, it is perfectly legal to run concurrently with * the _rcu list-traversal primitives, such as - * hlist_for_each_rcu(), used to prevent memory-consistency + * hlist_for_each_entry_rcu(), used to prevent memory-consistency * problems on Alpha CPUs. Regardless of the type of CPU, the * list-traversal primitive must be guarded by rcu_read_lock(). */ @@ -646,7 +650,7 @@ static inline void hlist_add_after(struct hlist_node *n, * or hlist_del_rcu(), running on this same list. * However, it is perfectly legal to run concurrently with * the _rcu list-traversal primitives, such as - * hlist_for_each_rcu(), used to prevent memory-consistency + * hlist_for_each_entry_rcu(), used to prevent memory-consistency * problems on Alpha CPUs. */ static inline void hlist_add_before_rcu(struct hlist_node *n, @@ -671,7 +675,7 @@ static inline void hlist_add_before_rcu(struct hlist_node *n, * or hlist_del_rcu(), running on this same list. * However, it is perfectly legal to run concurrently with * the _rcu list-traversal primitives, such as - * hlist_for_each_rcu(), used to prevent memory-consistency + * hlist_for_each_entry_rcu(), used to prevent memory-consistency * problems on Alpha CPUs. */ static inline void hlist_add_after_rcu(struct hlist_node *prev, @@ -695,10 +699,6 @@ static inline void hlist_add_after_rcu(struct hlist_node *prev, for (pos = (head)->first; pos && ({ n = pos->next; 1; }); \ pos = n) -#define hlist_for_each_rcu(pos, head) \ - for ((pos) = (head)->first; pos && ({ prefetch((pos)->next); 1; }); \ - (pos) = rcu_dereference((pos)->next)) - /** * hlist_for_each_entry - iterate over list of given type * @tpos: the type * to use as a loop counter. @@ -751,7 +751,7 @@ static inline void hlist_add_after_rcu(struct hlist_node *prev, /** * hlist_for_each_entry_rcu - iterate over rcu list of given type - * @pos: the type * to use as a loop counter. + * @tpos: the type * to use as a loop counter. * @pos: the &struct hlist_node to use as a loop counter. * @head: the head for your list. * @member: the name of the hlist_node within the struct. @@ -762,9 +762,9 @@ static inline void hlist_add_after_rcu(struct hlist_node *prev, */ #define hlist_for_each_entry_rcu(tpos, pos, head, member) \ for (pos = (head)->first; \ - pos && ({ prefetch(pos->next); 1;}) && \ + rcu_dereference(pos) && ({ prefetch(pos->next); 1;}) && \ ({ tpos = hlist_entry(pos, typeof(*tpos), member); 1;}); \ - pos = rcu_dereference(pos->next)) + pos = pos->next) #else #warning "don't include kernel headers in userspace" diff --git a/include/linux/loop.h b/include/linux/loop.h index 53fa51595443..40f63c9879d2 100644 --- a/include/linux/loop.h +++ b/include/linux/loop.h @@ -52,7 +52,7 @@ struct loop_device { unsigned lo_blocksize; void *key_data; - int old_gfp_mask; + gfp_t old_gfp_mask; spinlock_t lo_lock; struct bio *lo_bio; diff --git a/include/linux/mbcache.h b/include/linux/mbcache.h index 9263d2db2d67..99e044b4efc6 100644 --- a/include/linux/mbcache.h +++ b/include/linux/mbcache.h @@ -22,7 +22,7 @@ struct mb_cache_entry { }; struct mb_cache_op { - int (*free)(struct mb_cache_entry *, int); + int (*free)(struct mb_cache_entry *, gfp_t); }; /* Functions on caches */ diff --git a/include/linux/memory.h b/include/linux/memory.h new file mode 100644 index 000000000000..dc4081b6f161 --- /dev/null +++ b/include/linux/memory.h @@ -0,0 +1,96 @@ +/* + * include/linux/memory.h - generic memory definition + * + * This is mainly for topological representation. We define the + * basic "struct memory_block" here, which can be embedded in per-arch + * definitions or NUMA information. + * + * Basic handling of the devices is done in drivers/base/memory.c + * and system devices are handled in drivers/base/sys.c. + * + * Memory block are exported via sysfs in the class/memory/devices/ + * directory. + * + */ +#ifndef _LINUX_MEMORY_H_ +#define _LINUX_MEMORY_H_ + +#include <linux/sysdev.h> +#include <linux/node.h> +#include <linux/compiler.h> + +#include <asm/semaphore.h> + +struct memory_block { + unsigned long phys_index; + unsigned long state; + /* + * This serializes all state change requests. It isn't + * held during creation because the control files are + * created long after the critical areas during + * initialization. + */ + struct semaphore state_sem; + int phys_device; /* to which fru does this belong? */ + void *hw; /* optional pointer to fw/hw data */ + int (*phys_callback)(struct memory_block *); + struct sys_device sysdev; +}; + +/* These states are exposed to userspace as text strings in sysfs */ +#define MEM_ONLINE (1<<0) /* exposed to userspace */ +#define MEM_GOING_OFFLINE (1<<1) /* exposed to userspace */ +#define MEM_OFFLINE (1<<2) /* exposed to userspace */ + +/* + * All of these states are currently kernel-internal for notifying + * kernel components and architectures. + * + * For MEM_MAPPING_INVALID, all notifier chains with priority >0 + * are called before pfn_to_page() becomes invalid. The priority=0 + * entry is reserved for the function that actually makes + * pfn_to_page() stop working. Any notifiers that want to be called + * after that should have priority <0. + */ +#define MEM_MAPPING_INVALID (1<<3) + +struct notifier_block; +struct mem_section; + +#ifndef CONFIG_MEMORY_HOTPLUG +static inline int memory_dev_init(void) +{ + return 0; +} +static inline int register_memory_notifier(struct notifier_block *nb) +{ + return 0; +} +static inline void unregister_memory_notifier(struct notifier_block *nb) +{ +} +#else +extern int register_memory(struct memory_block *, struct mem_section *section, struct node *); +extern int register_new_memory(struct mem_section *); +extern int unregister_memory_section(struct mem_section *); +extern int memory_dev_init(void); +extern int register_memory_notifier(struct notifier_block *nb); +extern void unregister_memory_notifier(struct notifier_block *nb); + +#define CONFIG_MEM_BLOCK_SIZE (PAGES_PER_SECTION<<PAGE_SHIFT) + +extern int invalidate_phys_mapping(unsigned long, unsigned long); +struct notifier_block; + +extern int register_memory_notifier(struct notifier_block *nb); +extern void unregister_memory_notifier(struct notifier_block *nb); + +#endif /* CONFIG_MEMORY_HOTPLUG */ + +#define hotplug_memory_notifier(fn, pri) { \ + static struct notifier_block fn##_mem_nb = \ + { .notifier_call = fn, .priority = pri }; \ + register_memory_notifier(&fn##_mem_nb); \ +} + +#endif /* _LINUX_MEMORY_H_ */ diff --git a/include/linux/memory_hotplug.h b/include/linux/memory_hotplug.h new file mode 100644 index 000000000000..01f03bc06eff --- /dev/null +++ b/include/linux/memory_hotplug.h @@ -0,0 +1,104 @@ +#ifndef __LINUX_MEMORY_HOTPLUG_H +#define __LINUX_MEMORY_HOTPLUG_H + +#include <linux/mmzone.h> +#include <linux/spinlock.h> +#include <linux/mmzone.h> +#include <linux/notifier.h> + +#ifdef CONFIG_MEMORY_HOTPLUG +/* + * pgdat resizing functions + */ +static inline +void pgdat_resize_lock(struct pglist_data *pgdat, unsigned long *flags) +{ + spin_lock_irqsave(&pgdat->node_size_lock, *flags); +} +static inline +void pgdat_resize_unlock(struct pglist_data *pgdat, unsigned long *flags) +{ + spin_unlock_irqrestore(&pgdat->node_size_lock, *flags); +} +static inline +void pgdat_resize_init(struct pglist_data *pgdat) +{ + spin_lock_init(&pgdat->node_size_lock); +} +/* + * Zone resizing functions + */ +static inline unsigned zone_span_seqbegin(struct zone *zone) +{ + return read_seqbegin(&zone->span_seqlock); +} +static inline int zone_span_seqretry(struct zone *zone, unsigned iv) +{ + return read_seqretry(&zone->span_seqlock, iv); +} +static inline void zone_span_writelock(struct zone *zone) +{ + write_seqlock(&zone->span_seqlock); +} +static inline void zone_span_writeunlock(struct zone *zone) +{ + write_sequnlock(&zone->span_seqlock); +} +static inline void zone_seqlock_init(struct zone *zone) +{ + seqlock_init(&zone->span_seqlock); +} +extern int zone_grow_free_lists(struct zone *zone, unsigned long new_nr_pages); +extern int zone_grow_waitqueues(struct zone *zone, unsigned long nr_pages); +extern int add_one_highpage(struct page *page, int pfn, int bad_ppro); +/* need some defines for these for archs that don't support it */ +extern void online_page(struct page *page); +/* VM interface that may be used by firmware interface */ +extern int add_memory(u64 start, u64 size); +extern int remove_memory(u64 start, u64 size); +extern int online_pages(unsigned long, unsigned long); + +/* reasonably generic interface to expand the physical pages in a zone */ +extern int __add_pages(struct zone *zone, unsigned long start_pfn, + unsigned long nr_pages); +#else /* ! CONFIG_MEMORY_HOTPLUG */ +/* + * Stub functions for when hotplug is off + */ +static inline void pgdat_resize_lock(struct pglist_data *p, unsigned long *f) {} +static inline void pgdat_resize_unlock(struct pglist_data *p, unsigned long *f) {} +static inline void pgdat_resize_init(struct pglist_data *pgdat) {} + +static inline unsigned zone_span_seqbegin(struct zone *zone) +{ + return 0; +} +static inline int zone_span_seqretry(struct zone *zone, unsigned iv) +{ + return 0; +} +static inline void zone_span_writelock(struct zone *zone) {} +static inline void zone_span_writeunlock(struct zone *zone) {} +static inline void zone_seqlock_init(struct zone *zone) {} + +static inline int mhp_notimplemented(const char *func) +{ + printk(KERN_WARNING "%s() called, with CONFIG_MEMORY_HOTPLUG disabled\n", func); + dump_stack(); + return -ENOSYS; +} + +static inline int __add_pages(struct zone *zone, unsigned long start_pfn, + unsigned long nr_pages) +{ + return mhp_notimplemented(__FUNCTION__); +} +#endif /* ! CONFIG_MEMORY_HOTPLUG */ +static inline int __remove_pages(struct zone *zone, unsigned long start_pfn, + unsigned long nr_pages) +{ + printk(KERN_WARNING "%s() called, not yet supported\n", __FUNCTION__); + dump_stack(); + return -ENOSYS; +} +#endif /* __LINUX_MEMORY_HOTPLUG_H */ diff --git a/include/linux/mempolicy.h b/include/linux/mempolicy.h index 58385ee1c0ac..8b67cf837ca9 100644 --- a/include/linux/mempolicy.h +++ b/include/linux/mempolicy.h @@ -27,10 +27,10 @@ #include <linux/config.h> #include <linux/mmzone.h> -#include <linux/bitmap.h> #include <linux/slab.h> #include <linux/rbtree.h> #include <linux/spinlock.h> +#include <linux/nodemask.h> struct vm_area_struct; @@ -47,8 +47,7 @@ struct vm_area_struct; * Locking policy for interlave: * In process context there is no locking because only the process accesses * its own state. All vma manipulation is somewhat protected by a down_read on - * mmap_sem. For allocating in the interleave policy the page_table_lock - * must be also aquired to protect il_next. + * mmap_sem. * * Freeing policy: * When policy is MPOL_BIND v.zonelist is kmalloc'ed and must be kfree'd. @@ -63,7 +62,7 @@ struct mempolicy { union { struct zonelist *zonelist; /* bind */ short preferred_node; /* preferred */ - DECLARE_BITMAP(nodes, MAX_NUMNODES); /* interleave */ + nodemask_t nodes; /* interleave */ /* undefined for default */ } v; }; @@ -155,6 +154,7 @@ struct mempolicy *get_vma_policy(struct task_struct *task, extern void numa_default_policy(void); extern void numa_policy_init(void); +extern void numa_policy_rebind(const nodemask_t *old, const nodemask_t *new); extern struct mempolicy default_policy; #else @@ -227,6 +227,11 @@ static inline void numa_default_policy(void) { } +static inline void numa_policy_rebind(const nodemask_t *old, + const nodemask_t *new) +{ +} + #endif /* CONFIG_NUMA */ #endif /* __KERNEL__ */ diff --git a/include/linux/mempool.h b/include/linux/mempool.h index 796220ce47cc..f2427d7394b0 100644 --- a/include/linux/mempool.h +++ b/include/linux/mempool.h @@ -6,7 +6,7 @@ #include <linux/wait.h> -typedef void * (mempool_alloc_t)(unsigned int __nocast gfp_mask, void *pool_data); +typedef void * (mempool_alloc_t)(gfp_t gfp_mask, void *pool_data); typedef void (mempool_free_t)(void *element, void *pool_data); typedef struct mempool_s { @@ -26,17 +26,16 @@ extern mempool_t *mempool_create(int min_nr, mempool_alloc_t *alloc_fn, extern mempool_t *mempool_create_node(int min_nr, mempool_alloc_t *alloc_fn, mempool_free_t *free_fn, void *pool_data, int nid); -extern int mempool_resize(mempool_t *pool, int new_min_nr, - unsigned int __nocast gfp_mask); +extern int mempool_resize(mempool_t *pool, int new_min_nr, gfp_t gfp_mask); extern void mempool_destroy(mempool_t *pool); -extern void * mempool_alloc(mempool_t *pool, unsigned int __nocast gfp_mask); +extern void * mempool_alloc(mempool_t *pool, gfp_t gfp_mask); extern void mempool_free(void *element, mempool_t *pool); /* * A mempool_alloc_t and mempool_free_t that get the memory from * a slab that is passed in through pool_data. */ -void *mempool_alloc_slab(unsigned int __nocast gfp_mask, void *pool_data); +void *mempool_alloc_slab(gfp_t gfp_mask, void *pool_data); void mempool_free_slab(void *element, void *pool_data); #endif /* _LINUX_MEMPOOL_H */ diff --git a/include/linux/mii.h b/include/linux/mii.h index 9b8d0476988a..68f5a0f392dd 100644 --- a/include/linux/mii.h +++ b/include/linux/mii.h @@ -158,6 +158,7 @@ extern int mii_link_ok (struct mii_if_info *mii); extern int mii_nway_restart (struct mii_if_info *mii); extern int mii_ethtool_gset(struct mii_if_info *mii, struct ethtool_cmd *ecmd); extern int mii_ethtool_sset(struct mii_if_info *mii, struct ethtool_cmd *ecmd); +extern int mii_check_gmii_support(struct mii_if_info *mii); extern void mii_check_link (struct mii_if_info *mii); extern unsigned int mii_check_media (struct mii_if_info *mii, unsigned int ok_to_print, diff --git a/include/linux/mm.h b/include/linux/mm.h index 097b3a3c693d..29f02d8513f6 100644 --- a/include/linux/mm.h +++ b/include/linux/mm.h @@ -144,7 +144,8 @@ extern unsigned int kobjsize(const void *objp); #define VM_GROWSDOWN 0x00000100 /* general info on the segment */ #define VM_GROWSUP 0x00000200 -#define VM_SHM 0x00000400 /* shared memory area, don't swap out */ +#define VM_SHM 0x00000000 /* Means nothing: delete it later */ +#define VM_PFNMAP 0x00000400 /* Page-ranges managed without "struct page", just pure PFN */ #define VM_DENYWRITE 0x00000800 /* ETXTBSY on write attempts.. */ #define VM_EXECUTABLE 0x00001000 @@ -157,11 +158,12 @@ extern unsigned int kobjsize(const void *objp); #define VM_DONTCOPY 0x00020000 /* Do not copy this vma on fork */ #define VM_DONTEXPAND 0x00040000 /* Cannot expand with mremap() */ -#define VM_RESERVED 0x00080000 /* Don't unmap it from swap_out */ +#define VM_RESERVED 0x00080000 /* Count as reserved_vm like IO */ #define VM_ACCOUNT 0x00100000 /* Is a VM accounted object */ #define VM_HUGETLB 0x00400000 /* Huge TLB Page VM */ #define VM_NONLINEAR 0x00800000 /* Is non-linear (remap_file_pages) */ #define VM_MAPPED_COPY 0x01000000 /* T if mapped copy of data (nommu mmap) */ +#define VM_INCOMPLETE 0x02000000 /* Strange partial PFN mapping marker */ #ifndef VM_STACK_DEFAULT_FLAGS /* arch can override this */ #define VM_STACK_DEFAULT_FLAGS VM_DATA_DEFAULT_FLAGS @@ -206,12 +208,6 @@ struct vm_operations_struct { struct mmu_gather; struct inode; -#ifdef ARCH_HAS_ATOMIC_UNSIGNED -typedef unsigned page_flags_t; -#else -typedef unsigned long page_flags_t; -#endif - /* * Each physical page in the system has a struct page associated with * it to keep track of whatever it is we are using the page for at the @@ -219,20 +215,25 @@ typedef unsigned long page_flags_t; * a page. */ struct page { - page_flags_t flags; /* Atomic flags, some possibly + unsigned long flags; /* Atomic flags, some possibly * updated asynchronously */ atomic_t _count; /* Usage count, see below. */ atomic_t _mapcount; /* Count of ptes mapped in mms, * to show when page is mapped * & limit reverse map searches. */ - unsigned long private; /* Mapping-private opaque data: + union { + unsigned long private; /* Mapping-private opaque data: * usually used for buffer_heads * if PagePrivate set; used for * swp_entry_t if PageSwapCache * When page is free, this indicates * order in the buddy system. */ +#if NR_CPUS >= CONFIG_SPLIT_PTLOCK_CPUS + spinlock_t ptl; +#endif + } u; struct address_space *mapping; /* If low bit clear, points to * inode address_space, or NULL. * If page mapped as anonymous @@ -260,6 +261,9 @@ struct page { #endif /* WANT_PAGE_VIRTUAL */ }; +#define page_private(page) ((page)->u.private) +#define set_page_private(page, v) ((page)->u.private = (v)) + /* * FIXME: take this include out, include page-flags.h in * files which need it (119 of them) @@ -309,41 +313,22 @@ struct page { extern void FASTCALL(__page_cache_release(struct page *)); -#ifdef CONFIG_HUGETLB_PAGE - -static inline int page_count(struct page *p) +static inline int page_count(struct page *page) { - if (PageCompound(p)) - p = (struct page *)p->private; - return atomic_read(&(p)->_count) + 1; + if (PageCompound(page)) + page = (struct page *)page_private(page); + return atomic_read(&page->_count) + 1; } static inline void get_page(struct page *page) { if (unlikely(PageCompound(page))) - page = (struct page *)page->private; + page = (struct page *)page_private(page); atomic_inc(&page->_count); } void put_page(struct page *page); -#else /* CONFIG_HUGETLB_PAGE */ - -#define page_count(p) (atomic_read(&(p)->_count) + 1) - -static inline void get_page(struct page *page) -{ - atomic_inc(&page->_count); -} - -static inline void put_page(struct page *page) -{ - if (!PageReserved(page) && put_page_testzero(page)) - __page_cache_release(page); -} - -#endif /* CONFIG_HUGETLB_PAGE */ - /* * Multiple processes may "see" the same page. E.g. for untouched * mappings of /dev/null, all processes see the same page full of @@ -427,7 +412,7 @@ static inline void put_page(struct page *page) #endif /* Page flags: | [SECTION] | [NODE] | ZONE | ... | FLAGS | */ -#define SECTIONS_PGOFF ((sizeof(page_flags_t)*8) - SECTIONS_WIDTH) +#define SECTIONS_PGOFF ((sizeof(unsigned long)*8) - SECTIONS_WIDTH) #define NODES_PGOFF (SECTIONS_PGOFF - NODES_WIDTH) #define ZONES_PGOFF (NODES_PGOFF - ZONES_WIDTH) @@ -587,7 +572,7 @@ static inline int PageAnon(struct page *page) static inline pgoff_t page_index(struct page *page) { if (unlikely(PageSwapCache(page))) - return page->private; + return page_private(page); return page->index; } @@ -680,9 +665,10 @@ struct zap_details { unsigned long truncate_count; /* Compare vm_truncate_count */ }; +struct page *vm_normal_page(struct vm_area_struct *, unsigned long, pte_t); unsigned long zap_page_range(struct vm_area_struct *vma, unsigned long address, unsigned long size, struct zap_details *); -unsigned long unmap_vmas(struct mmu_gather **tlb, struct mm_struct *mm, +unsigned long unmap_vmas(struct mmu_gather **tlb, struct vm_area_struct *start_vma, unsigned long start_addr, unsigned long end_addr, unsigned long *nr_accounted, struct zap_details *); @@ -704,10 +690,6 @@ static inline void unmap_shared_mapping_range(struct address_space *mapping, } extern int vmtruncate(struct inode * inode, loff_t offset); -extern pud_t *FASTCALL(__pud_alloc(struct mm_struct *mm, pgd_t *pgd, unsigned long address)); -extern pmd_t *FASTCALL(__pmd_alloc(struct mm_struct *mm, pud_t *pud, unsigned long address)); -extern pte_t *FASTCALL(pte_alloc_kernel(struct mm_struct *mm, pmd_t *pmd, unsigned long address)); -extern pte_t *FASTCALL(pte_alloc_map(struct mm_struct *mm, pmd_t *pmd, unsigned long address)); extern int install_page(struct mm_struct *mm, struct vm_area_struct *vma, unsigned long addr, struct page *page, pgprot_t prot); extern int install_file_pte(struct mm_struct *mm, struct vm_area_struct *vma, unsigned long addr, unsigned long pgoff, pgprot_t prot); extern int __handle_mm_fault(struct mm_struct *mm,struct vm_area_struct *vma, unsigned long address, int write_access); @@ -723,6 +705,7 @@ void install_arg_page(struct vm_area_struct *, struct page *, unsigned long); int get_user_pages(struct task_struct *tsk, struct mm_struct *mm, unsigned long start, int len, int write, int force, struct page **pages, struct vm_area_struct **vmas); +void print_bad_pte(struct vm_area_struct *, pte_t, unsigned long); int __set_page_dirty_buffers(struct page *page); int __set_page_dirty_nobuffers(struct page *page); @@ -747,7 +730,7 @@ extern unsigned long do_mremap(unsigned long addr, * The callback will be passed nr_to_scan == 0 when the VM is querying the * cache size, so a fastpath for that case is appropriate. */ -typedef int (*shrinker_t)(int nr_to_scan, unsigned int gfp_mask); +typedef int (*shrinker_t)(int nr_to_scan, gfp_t gfp_mask); /* * Add an aging callback. The int is the number of 'seeks' it takes @@ -759,38 +742,85 @@ struct shrinker; extern struct shrinker *set_shrinker(int, shrinker_t); extern void remove_shrinker(struct shrinker *shrinker); -/* - * On a two-level or three-level page table, this ends up being trivial. Thus - * the inlining and the symmetry break with pte_alloc_map() that does all - * of this out-of-line. - */ +extern pte_t *FASTCALL(get_locked_pte(struct mm_struct *mm, unsigned long addr, spinlock_t **ptl)); + +int __pud_alloc(struct mm_struct *mm, pgd_t *pgd, unsigned long address); +int __pmd_alloc(struct mm_struct *mm, pud_t *pud, unsigned long address); +int __pte_alloc(struct mm_struct *mm, pmd_t *pmd, unsigned long address); +int __pte_alloc_kernel(pmd_t *pmd, unsigned long address); + /* * The following ifdef needed to get the 4level-fixup.h header to work. * Remove it when 4level-fixup.h has been removed. */ -#ifdef CONFIG_MMU -#ifndef __ARCH_HAS_4LEVEL_HACK +#if defined(CONFIG_MMU) && !defined(__ARCH_HAS_4LEVEL_HACK) static inline pud_t *pud_alloc(struct mm_struct *mm, pgd_t *pgd, unsigned long address) { - if (pgd_none(*pgd)) - return __pud_alloc(mm, pgd, address); - return pud_offset(pgd, address); + return (unlikely(pgd_none(*pgd)) && __pud_alloc(mm, pgd, address))? + NULL: pud_offset(pgd, address); } static inline pmd_t *pmd_alloc(struct mm_struct *mm, pud_t *pud, unsigned long address) { - if (pud_none(*pud)) - return __pmd_alloc(mm, pud, address); - return pmd_offset(pud, address); + return (unlikely(pud_none(*pud)) && __pmd_alloc(mm, pud, address))? + NULL: pmd_offset(pud, address); } -#endif -#endif /* CONFIG_MMU */ +#endif /* CONFIG_MMU && !__ARCH_HAS_4LEVEL_HACK */ + +#if NR_CPUS >= CONFIG_SPLIT_PTLOCK_CPUS +/* + * We tuck a spinlock to guard each pagetable page into its struct page, + * at page->private, with BUILD_BUG_ON to make sure that this will not + * overflow into the next struct page (as it might with DEBUG_SPINLOCK). + * When freeing, reset page->mapping so free_pages_check won't complain. + */ +#define __pte_lockptr(page) &((page)->u.ptl) +#define pte_lock_init(_page) do { \ + spin_lock_init(__pte_lockptr(_page)); \ +} while (0) +#define pte_lock_deinit(page) ((page)->mapping = NULL) +#define pte_lockptr(mm, pmd) ({(void)(mm); __pte_lockptr(pmd_page(*(pmd)));}) +#else +/* + * We use mm->page_table_lock to guard all pagetable pages of the mm. + */ +#define pte_lock_init(page) do {} while (0) +#define pte_lock_deinit(page) do {} while (0) +#define pte_lockptr(mm, pmd) ({(void)(pmd); &(mm)->page_table_lock;}) +#endif /* NR_CPUS < CONFIG_SPLIT_PTLOCK_CPUS */ + +#define pte_offset_map_lock(mm, pmd, address, ptlp) \ +({ \ + spinlock_t *__ptl = pte_lockptr(mm, pmd); \ + pte_t *__pte = pte_offset_map(pmd, address); \ + *(ptlp) = __ptl; \ + spin_lock(__ptl); \ + __pte; \ +}) + +#define pte_unmap_unlock(pte, ptl) do { \ + spin_unlock(ptl); \ + pte_unmap(pte); \ +} while (0) + +#define pte_alloc_map(mm, pmd, address) \ + ((unlikely(!pmd_present(*(pmd))) && __pte_alloc(mm, pmd, address))? \ + NULL: pte_offset_map(pmd, address)) + +#define pte_alloc_map_lock(mm, pmd, address, ptlp) \ + ((unlikely(!pmd_present(*(pmd))) && __pte_alloc(mm, pmd, address))? \ + NULL: pte_offset_map_lock(mm, pmd, address, ptlp)) + +#define pte_alloc_kernel(pmd, address) \ + ((unlikely(!pmd_present(*(pmd))) && __pte_alloc_kernel(pmd, address))? \ + NULL: pte_offset_kernel(pmd, address)) extern void free_area_init(unsigned long * zones_size); extern void free_area_init_node(int nid, pg_data_t *pgdat, unsigned long * zones_size, unsigned long zone_start_pfn, unsigned long *zholes_size); extern void memmap_init_zone(unsigned long, int, unsigned long, unsigned long); +extern void setup_per_zone_pages_min(void); extern void mem_init(void); extern void show_mem(void); extern void si_meminfo(struct sysinfo * val); @@ -834,6 +864,7 @@ extern int split_vma(struct mm_struct *, extern int insert_vm_struct(struct mm_struct *, struct vm_area_struct *); extern void __vma_link_rb(struct mm_struct *, struct vm_area_struct *, struct rb_node **, struct rb_node *); +extern void unlink_file_vma(struct vm_area_struct *); extern struct vm_area_struct *copy_vma(struct vm_area_struct **, unsigned long addr, unsigned long len, pgoff_t pgoff); extern void exit_mmap(struct mm_struct *); @@ -881,20 +912,23 @@ int write_one_page(struct page *page, int wait); * turning readahead off */ int do_page_cache_readahead(struct address_space *mapping, struct file *filp, - unsigned long offset, unsigned long nr_to_read); + pgoff_t offset, unsigned long nr_to_read); int force_page_cache_readahead(struct address_space *mapping, struct file *filp, - unsigned long offset, unsigned long nr_to_read); -unsigned long page_cache_readahead(struct address_space *mapping, + pgoff_t offset, unsigned long nr_to_read); +unsigned long page_cache_readahead(struct address_space *mapping, struct file_ra_state *ra, struct file *filp, - unsigned long offset, + pgoff_t offset, unsigned long size); void handle_ra_miss(struct address_space *mapping, struct file_ra_state *ra, pgoff_t offset); unsigned long max_sane_readahead(unsigned long nr); /* Do stack extension */ -extern int expand_stack(struct vm_area_struct * vma, unsigned long address); +extern int expand_stack(struct vm_area_struct *vma, unsigned long address); +#ifdef CONFIG_IA64 +extern int expand_upwards(struct vm_area_struct *vma, unsigned long address); +#endif /* Look up the first VMA which satisfies addr < vm_end, NULL if none. */ extern struct vm_area_struct * find_vma(struct mm_struct * mm, unsigned long addr); @@ -917,40 +951,29 @@ static inline unsigned long vma_pages(struct vm_area_struct *vma) return (vma->vm_end - vma->vm_start) >> PAGE_SHIFT; } -extern struct vm_area_struct *find_extend_vma(struct mm_struct *mm, unsigned long addr); +struct vm_area_struct *find_extend_vma(struct mm_struct *, unsigned long addr); +struct page *vmalloc_to_page(void *addr); +unsigned long vmalloc_to_pfn(void *addr); +int remap_pfn_range(struct vm_area_struct *, unsigned long addr, + unsigned long pfn, unsigned long size, pgprot_t); +int vm_insert_page(struct vm_area_struct *, unsigned long addr, struct page *); -extern struct page * vmalloc_to_page(void *addr); -extern unsigned long vmalloc_to_pfn(void *addr); -extern struct page * follow_page(struct mm_struct *mm, unsigned long address, - int write); -extern int check_user_page_readable(struct mm_struct *mm, unsigned long address); -int remap_pfn_range(struct vm_area_struct *, unsigned long, - unsigned long, unsigned long, pgprot_t); +struct page *follow_page(struct vm_area_struct *, unsigned long address, + unsigned int foll_flags); +#define FOLL_WRITE 0x01 /* check pte is writable */ +#define FOLL_TOUCH 0x02 /* mark page accessed */ +#define FOLL_GET 0x04 /* do get_page on page */ +#define FOLL_ANON 0x08 /* give ZERO_PAGE if no pgtable */ #ifdef CONFIG_PROC_FS -void __vm_stat_account(struct mm_struct *, unsigned long, struct file *, long); +void vm_stat_account(struct mm_struct *, unsigned long, struct file *, long); #else -static inline void __vm_stat_account(struct mm_struct *mm, +static inline void vm_stat_account(struct mm_struct *mm, unsigned long flags, struct file *file, long pages) { } #endif /* CONFIG_PROC_FS */ -static inline void vm_stat_account(struct vm_area_struct *vma) -{ - __vm_stat_account(vma->vm_mm, vma->vm_flags, vma->vm_file, - vma_pages(vma)); -} - -static inline void vm_stat_unaccount(struct vm_area_struct *vma) -{ - __vm_stat_account(vma->vm_mm, vma->vm_flags, vma->vm_file, - -vma_pages(vma)); -} - -/* update per process rss and vm hiwater data */ -extern void update_mem_hiwater(struct task_struct *tsk); - #ifndef CONFIG_DEBUG_PAGEALLOC static inline void kernel_map_pages(struct page *page, int numpages, int enable) diff --git a/include/linux/mmc/mmc.h b/include/linux/mmc/mmc.h index 1ab78e8d6c53..aef6042f8f0b 100644 --- a/include/linux/mmc/mmc.h +++ b/include/linux/mmc/mmc.h @@ -50,7 +50,7 @@ struct mmc_command { #define MMC_ERR_INVALID 5 struct mmc_data *data; /* data segment associated with cmd */ - struct mmc_request *mrq; /* assoicated request */ + struct mmc_request *mrq; /* associated request */ }; struct mmc_data { @@ -68,7 +68,7 @@ struct mmc_data { unsigned int bytes_xfered; struct mmc_command *stop; /* stop command */ - struct mmc_request *mrq; /* assoicated request */ + struct mmc_request *mrq; /* associated request */ unsigned int sg_len; /* size of scatter list */ struct scatterlist *sg; /* I/O scatter list */ diff --git a/include/linux/mmc/protocol.h b/include/linux/mmc/protocol.h index f819cae92266..a14dc306545b 100644 --- a/include/linux/mmc/protocol.h +++ b/include/linux/mmc/protocol.h @@ -63,7 +63,7 @@ /* class 5 */ #define MMC_ERASE_GROUP_START 35 /* ac [31:0] data addr R1 */ #define MMC_ERASE_GROUP_END 36 /* ac [31:0] data addr R1 */ -#define MMC_ERASE 37 /* ac R1b */ +#define MMC_ERASE 38 /* ac R1b */ /* class 9 */ #define MMC_FAST_IO 39 /* ac <Complex> R4 */ @@ -74,7 +74,7 @@ /* class 8 */ #define MMC_APP_CMD 55 /* ac [31:16] RCA R1 */ -#define MMC_GEN_CMD 56 /* adtc [0] RD/WR R1b */ +#define MMC_GEN_CMD 56 /* adtc [0] RD/WR R1 */ /* SD commands type argument response */ /* class 8 */ diff --git a/include/linux/mmzone.h b/include/linux/mmzone.h index 5ed471b58f4f..9f22090df7dd 100644 --- a/include/linux/mmzone.h +++ b/include/linux/mmzone.h @@ -12,6 +12,7 @@ #include <linux/threads.h> #include <linux/numa.h> #include <linux/init.h> +#include <linux/seqlock.h> #include <asm/atomic.h> /* Free memory management - zoned buddy allocator. */ @@ -70,10 +71,11 @@ struct per_cpu_pageset { #endif #define ZONE_DMA 0 -#define ZONE_NORMAL 1 -#define ZONE_HIGHMEM 2 +#define ZONE_DMA32 1 +#define ZONE_NORMAL 2 +#define ZONE_HIGHMEM 3 -#define MAX_NR_ZONES 3 /* Sync this with ZONES_SHIFT */ +#define MAX_NR_ZONES 4 /* Sync this with ZONES_SHIFT */ #define ZONES_SHIFT 2 /* ceil(log2(MAX_NR_ZONES)) */ @@ -89,27 +91,18 @@ struct per_cpu_pageset { * will be a maximum of 4 (2 ** 2) zonelists, for 3 modifiers there will * be 8 (2 ** 3) zonelists. GFP_ZONETYPES defines the number of possible * combinations of zone modifiers in "zone modifier space". + * + * NOTE! Make sure this matches the zones in <linux/gfp.h> */ -#define GFP_ZONEMASK 0x03 -/* - * As an optimisation any zone modifier bits which are only valid when - * no other zone modifier bits are set (loners) should be placed in - * the highest order bits of this field. This allows us to reduce the - * extent of the zonelists thus saving space. For example in the case - * of three zone modifier bits, we could require up to eight zonelists. - * If the left most zone modifier is a "loner" then the highest valid - * zonelist would be four allowing us to allocate only five zonelists. - * Use the first form when the left most bit is not a "loner", otherwise - * use the second. - */ -/* #define GFP_ZONETYPES (GFP_ZONEMASK + 1) */ /* Non-loner */ -#define GFP_ZONETYPES ((GFP_ZONEMASK + 1) / 2 + 1) /* Loner */ +#define GFP_ZONEMASK 0x07 +#define GFP_ZONETYPES 5 /* * On machines where it is needed (eg PCs) we divide physical memory - * into multiple physical zones. On a PC we have 3 zones: + * into multiple physical zones. On a PC we have 4 zones: * * ZONE_DMA < 16 MB ISA DMA capable memory + * ZONE_DMA32 0 MB Empty * ZONE_NORMAL 16-896 MB direct mapped by the kernel * ZONE_HIGHMEM > 896 MB only page cache and user processes */ @@ -137,6 +130,10 @@ struct zone { * free areas of different sizes */ spinlock_t lock; +#ifdef CONFIG_MEMORY_HOTPLUG + /* see spanned/present_pages for more description */ + seqlock_t span_seqlock; +#endif struct free_area free_area[MAX_ORDER]; @@ -220,6 +217,16 @@ struct zone { /* zone_start_pfn == zone_start_paddr >> PAGE_SHIFT */ unsigned long zone_start_pfn; + /* + * zone_start_pfn, spanned_pages and present_pages are all + * protected by span_seqlock. It is a seqlock because it has + * to be read outside of zone->lock, and it is done in the main + * allocator path. But, it is written quite infrequently. + * + * The lock is declared along with zone->lock because it is + * frequently read in proximity to zone->lock. It's good to + * give them a chance of being in the same cacheline. + */ unsigned long spanned_pages; /* total size, including holes */ unsigned long present_pages; /* amount of memory (excluding holes) */ @@ -273,6 +280,16 @@ typedef struct pglist_data { struct page *node_mem_map; #endif struct bootmem_data *bdata; +#ifdef CONFIG_MEMORY_HOTPLUG + /* + * Must be held any time you expect node_start_pfn, node_present_pages + * or node_spanned_pages stay constant. Holding this will also + * guarantee that any pfn_valid() stays that way. + * + * Nests above zone->lock and zone->size_seqlock. + */ + spinlock_t node_size_lock; +#endif unsigned long node_start_pfn; unsigned long node_present_pages; /* total number of physical pages */ unsigned long node_spanned_pages; /* total size of physical page @@ -293,6 +310,8 @@ typedef struct pglist_data { #endif #define nid_page_nr(nid, pagenr) pgdat_page_nr(NODE_DATA(nid),(pagenr)) +#include <linux/memory_hotplug.h> + extern struct pglist_data *pgdat_list; void __get_zone_counts(unsigned long *active, unsigned long *inactive, @@ -302,7 +321,7 @@ void get_zone_counts(unsigned long *active, unsigned long *inactive, void build_all_zonelists(void); void wakeup_kswapd(struct zone *zone, int order); int zone_watermark_ok(struct zone *z, int order, unsigned long mark, - int alloc_type, int can_try_harder, int gfp_high); + int classzone_idx, int alloc_flags); #ifdef CONFIG_HAVE_MEMORY_PRESENT void memory_present(int nid, unsigned long start, unsigned long end); @@ -406,7 +425,9 @@ int lowmem_reserve_ratio_sysctl_handler(struct ctl_table *, int, struct file *, #include <linux/topology.h> /* Returns the number of the current Node. */ +#ifndef numa_node_id #define numa_node_id() (cpu_to_node(raw_smp_processor_id())) +#endif #ifndef CONFIG_NEED_MULTIPLE_NODES @@ -426,12 +447,12 @@ extern struct pglist_data contig_page_data; #include <asm/sparsemem.h> #endif -#if BITS_PER_LONG == 32 || defined(ARCH_HAS_ATOMIC_UNSIGNED) +#if BITS_PER_LONG == 32 /* - * with 32 bit page->flags field, we reserve 8 bits for node/zone info. - * there are 3 zones (2 bits) and this leaves 8-2=6 bits for nodes. + * with 32 bit page->flags field, we reserve 9 bits for node/zone info. + * there are 4 zones (3 bits) and this leaves 9-3=6 bits for nodes. */ -#define FLAGS_RESERVED 8 +#define FLAGS_RESERVED 9 #elif BITS_PER_LONG == 64 /* @@ -509,6 +530,7 @@ static inline struct mem_section *__nr_to_section(unsigned long nr) return NULL; return &mem_section[SECTION_NR_TO_ROOT(nr)][nr & SECTION_ROOT_MASK]; } +extern int __section_nr(struct mem_section* ms); /* * We use the lower bits of the mem_map pointer to store diff --git a/include/linux/mod_devicetable.h b/include/linux/mod_devicetable.h index 47da39ba3f03..7b08c11ec4cc 100644 --- a/include/linux/mod_devicetable.h +++ b/include/linux/mod_devicetable.h @@ -183,7 +183,7 @@ struct of_device_id char name[32]; char type[32]; char compatible[128]; -#if __KERNEL__ +#ifdef __KERNEL__ void *data; #else kernel_ulong_t data; @@ -209,10 +209,11 @@ struct pcmcia_device_id { /* for real multi-function devices */ __u8 function; - /* for pseude multi-function devices */ + /* for pseudo multi-function devices */ __u8 device_no; - __u32 prod_id_hash[4]; + __u32 prod_id_hash[4] + __attribute__((aligned(sizeof(__u32)))); /* not matched against in kernelspace*/ #ifdef __KERNEL__ @@ -243,4 +244,9 @@ struct pcmcia_device_id { #define PCMCIA_DEV_ID_MATCH_FAKE_CIS 0x0200 #define PCMCIA_DEV_ID_MATCH_ANONYMOUS 0x0400 +/* I2C */ +struct i2c_device_id { + __u16 id; +}; + #endif /* LINUX_MOD_DEVICETABLE_H */ diff --git a/include/linux/module.h b/include/linux/module.h index f05372b7fe77..84d75f3a8aca 100644 --- a/include/linux/module.h +++ b/include/linux/module.h @@ -554,7 +554,9 @@ static inline void MODULE_PARM_(void) { } #ifdef MODULE /* DEPRECATED: Do not use. */ #define MODULE_PARM(var,type) \ -struct obsolete_modparm __parm_##var __attribute__((section("__obsparm"))) = \ +extern struct obsolete_modparm __parm_##var \ +__attribute__((section("__obsparm"))); \ +struct obsolete_modparm __parm_##var = \ { __stringify(var), type, &MODULE_PARM_ }; \ __MODULE_PARM_TYPE(var, type); #else diff --git a/include/linux/mount.h b/include/linux/mount.h index f8f39937e301..dd4e83eba933 100644 --- a/include/linux/mount.h +++ b/include/linux/mount.h @@ -17,12 +17,14 @@ #include <linux/spinlock.h> #include <asm/atomic.h> -#define MNT_NOSUID 1 -#define MNT_NODEV 2 -#define MNT_NOEXEC 4 +#define MNT_NOSUID 0x01 +#define MNT_NODEV 0x02 +#define MNT_NOEXEC 0x04 +#define MNT_SHARED 0x10 /* if the vfsmount is a shared mount */ +#define MNT_UNBINDABLE 0x20 /* if the vfsmount is a unbindable mount */ +#define MNT_PNODE_MASK 0x30 /* propogation flag mask */ -struct vfsmount -{ +struct vfsmount { struct list_head mnt_hash; struct vfsmount *mnt_parent; /* fs we are mounted on */ struct dentry *mnt_mountpoint; /* dentry of mountpoint */ @@ -36,7 +38,12 @@ struct vfsmount char *mnt_devname; /* Name of device e.g. /dev/dsk/hda1 */ struct list_head mnt_list; struct list_head mnt_expire; /* link in fs-specific expiry list */ + struct list_head mnt_share; /* circular list of shared mounts */ + struct list_head mnt_slave_list;/* list of slave mounts */ + struct list_head mnt_slave; /* slave list entry */ + struct vfsmount *mnt_master; /* slave is on master->mnt_slave_list */ struct namespace *mnt_namespace; /* containing namespace */ + int mnt_pinned; }; static inline struct vfsmount *mntget(struct vfsmount *mnt) @@ -46,15 +53,9 @@ static inline struct vfsmount *mntget(struct vfsmount *mnt) return mnt; } -extern void __mntput(struct vfsmount *mnt); - -static inline void mntput_no_expire(struct vfsmount *mnt) -{ - if (mnt) { - if (atomic_dec_and_test(&mnt->mnt_count)) - __mntput(mnt); - } -} +extern void mntput_no_expire(struct vfsmount *mnt); +extern void mnt_pin(struct vfsmount *mnt); +extern void mnt_unpin(struct vfsmount *mnt); static inline void mntput(struct vfsmount *mnt) { diff --git a/include/linux/msdos_fs.h b/include/linux/msdos_fs.h index 9a3d27257984..941da5c016a0 100644 --- a/include/linux/msdos_fs.h +++ b/include/linux/msdos_fs.h @@ -282,6 +282,17 @@ static inline u8 fat_attr(struct inode *inode) MSDOS_I(inode)->i_attrs; } +static inline unsigned char fat_checksum(const __u8 *name) +{ + unsigned char s = name[0]; + s = (s<<7) + (s>>1) + name[1]; s = (s<<7) + (s>>1) + name[2]; + s = (s<<7) + (s>>1) + name[3]; s = (s<<7) + (s>>1) + name[4]; + s = (s<<7) + (s>>1) + name[5]; s = (s<<7) + (s>>1) + name[6]; + s = (s<<7) + (s>>1) + name[7]; s = (s<<7) + (s>>1) + name[8]; + s = (s<<7) + (s>>1) + name[9]; s = (s<<7) + (s>>1) + name[10]; + return s; +} + static inline sector_t fat_clus_to_blknr(struct msdos_sb_info *sbi, int clus) { return ((sector_t)clus - FAT_START_ENT) * sbi->sec_per_clus diff --git a/include/linux/mtd/bbm.h b/include/linux/mtd/bbm.h new file mode 100644 index 000000000000..7a7fbe87fef0 --- /dev/null +++ b/include/linux/mtd/bbm.h @@ -0,0 +1,122 @@ +/* + * linux/include/linux/mtd/bbm.h + * + * NAND family Bad Block Management (BBM) header file + * - Bad Block Table (BBT) implementation + * + * Copyright (c) 2005 Samsung Electronics + * Kyungmin Park <kyungmin.park@samsung.com> + * + * Copyright (c) 2000-2005 + * Thomas Gleixner <tglx@linuxtronix.de> + * + */ +#ifndef __LINUX_MTD_BBM_H +#define __LINUX_MTD_BBM_H + +/* The maximum number of NAND chips in an array */ +#define NAND_MAX_CHIPS 8 + +/** + * struct nand_bbt_descr - bad block table descriptor + * @param options options for this descriptor + * @param pages the page(s) where we find the bbt, used with + * option BBT_ABSPAGE when bbt is searched, + * then we store the found bbts pages here. + * Its an array and supports up to 8 chips now + * @param offs offset of the pattern in the oob area of the page + * @param veroffs offset of the bbt version counter in the oob are of the page + * @param version version read from the bbt page during scan + * @param len length of the pattern, if 0 no pattern check is performed + * @param maxblocks maximum number of blocks to search for a bbt. This number of + * blocks is reserved at the end of the device + * where the tables are written. + * @param reserved_block_code if non-0, this pattern denotes a reserved + * (rather than bad) block in the stored bbt + * @param pattern pattern to identify bad block table or factory marked + * good / bad blocks, can be NULL, if len = 0 + * + * Descriptor for the bad block table marker and the descriptor for the + * pattern which identifies good and bad blocks. The assumption is made + * that the pattern and the version count are always located in the oob area + * of the first block. + */ +struct nand_bbt_descr { + int options; + int pages[NAND_MAX_CHIPS]; + int offs; + int veroffs; + uint8_t version[NAND_MAX_CHIPS]; + int len; + int maxblocks; + int reserved_block_code; + uint8_t *pattern; +}; + +/* Options for the bad block table descriptors */ + +/* The number of bits used per block in the bbt on the device */ +#define NAND_BBT_NRBITS_MSK 0x0000000F +#define NAND_BBT_1BIT 0x00000001 +#define NAND_BBT_2BIT 0x00000002 +#define NAND_BBT_4BIT 0x00000004 +#define NAND_BBT_8BIT 0x00000008 +/* The bad block table is in the last good block of the device */ +#define NAND_BBT_LASTBLOCK 0x00000010 +/* The bbt is at the given page, else we must scan for the bbt */ +#define NAND_BBT_ABSPAGE 0x00000020 +/* The bbt is at the given page, else we must scan for the bbt */ +#define NAND_BBT_SEARCH 0x00000040 +/* bbt is stored per chip on multichip devices */ +#define NAND_BBT_PERCHIP 0x00000080 +/* bbt has a version counter at offset veroffs */ +#define NAND_BBT_VERSION 0x00000100 +/* Create a bbt if none axists */ +#define NAND_BBT_CREATE 0x00000200 +/* Search good / bad pattern through all pages of a block */ +#define NAND_BBT_SCANALLPAGES 0x00000400 +/* Scan block empty during good / bad block scan */ +#define NAND_BBT_SCANEMPTY 0x00000800 +/* Write bbt if neccecary */ +#define NAND_BBT_WRITE 0x00001000 +/* Read and write back block contents when writing bbt */ +#define NAND_BBT_SAVECONTENT 0x00002000 +/* Search good / bad pattern on the first and the second page */ +#define NAND_BBT_SCAN2NDPAGE 0x00004000 + +/* The maximum number of blocks to scan for a bbt */ +#define NAND_BBT_SCAN_MAXBLOCKS 4 + +/* + * Constants for oob configuration + */ +#define ONENAND_BADBLOCK_POS 0 + +/** + * struct bbt_info - [GENERIC] Bad Block Table data structure + * @param bbt_erase_shift [INTERN] number of address bits in a bbt entry + * @param badblockpos [INTERN] position of the bad block marker in the oob area + * @param bbt [INTERN] bad block table pointer + * @param badblock_pattern [REPLACEABLE] bad block scan pattern used for initial bad block scan + * @param priv [OPTIONAL] pointer to private bbm date + */ +struct bbm_info { + int bbt_erase_shift; + int badblockpos; + int options; + + uint8_t *bbt; + + int (*isbad_bbt)(struct mtd_info *mtd, loff_t ofs, int allowbbt); + + /* TODO Add more NAND specific fileds */ + struct nand_bbt_descr *badblock_pattern; + + void *priv; +}; + +/* OneNAND BBT interface */ +extern int onenand_scan_bbt(struct mtd_info *mtd, struct nand_bbt_descr *bd); +extern int onenand_default_bbt(struct mtd_info *mtd); + +#endif /* __LINUX_MTD_BBM_H */ diff --git a/include/linux/mtd/blktrans.h b/include/linux/mtd/blktrans.h index 4ebc2e5a16e2..f46afec6fbf8 100644 --- a/include/linux/mtd/blktrans.h +++ b/include/linux/mtd/blktrans.h @@ -1,5 +1,5 @@ /* - * $Id: blktrans.h,v 1.5 2003/06/23 12:00:08 dwmw2 Exp $ + * $Id: blktrans.h,v 1.6 2005/11/07 11:14:54 gleixner Exp $ * * (C) 2003 David Woodhouse <dwmw2@infradead.org> * @@ -67,6 +67,6 @@ extern int register_mtd_blktrans(struct mtd_blktrans_ops *tr); extern int deregister_mtd_blktrans(struct mtd_blktrans_ops *tr); extern int add_mtd_blktrans_dev(struct mtd_blktrans_dev *dev); extern int del_mtd_blktrans_dev(struct mtd_blktrans_dev *dev); - + #endif /* __MTD_TRANS_H__ */ diff --git a/include/linux/mtd/cfi.h b/include/linux/mtd/cfi.h index e6b6a1c66bd5..23a568910341 100644 --- a/include/linux/mtd/cfi.h +++ b/include/linux/mtd/cfi.h @@ -1,14 +1,13 @@ -/* Common Flash Interface structures +/* Common Flash Interface structures * See http://support.intel.com/design/flash/technote/index.htm - * $Id: cfi.h,v 1.54 2005/06/06 23:04:36 tpoynor Exp $ + * $Id: cfi.h,v 1.57 2005/11/15 23:28:17 tpoynor Exp $ */ #ifndef __MTD_CFI_H__ #define __MTD_CFI_H__ #include <linux/config.h> -#include <linux/version.h> #include <linux/delay.h> #include <linux/types.h> #include <linux/interrupt.h> @@ -82,8 +81,8 @@ static inline int cfi_interleave_supported(int i) } -/* NB: these values must represents the number of bytes needed to meet the - * device type (x8, x16, x32). Eg. a 32 bit device is 4 x 8 bytes. +/* NB: these values must represents the number of bytes needed to meet the + * device type (x8, x16, x32). Eg. a 32 bit device is 4 x 8 bytes. * These numbers are used in calculations. */ #define CFI_DEVICETYPE_X8 (8 / 8) @@ -173,6 +172,15 @@ struct cfi_intelext_regioninfo { struct cfi_intelext_blockinfo BlockTypes[1]; } __attribute__((packed)); +struct cfi_intelext_programming_regioninfo { + uint8_t ProgRegShift; + uint8_t Reserved1; + uint8_t ControlValid; + uint8_t Reserved2; + uint8_t ControlInvalid; + uint8_t Reserved3; +} __attribute__((packed)); + /* Vendor-Specific PRI for AMD/Fujitsu Extended Command Set (0x0002) */ struct cfi_pri_amdstd { @@ -250,7 +258,7 @@ static inline uint32_t cfi_build_cmd_addr(uint32_t cmd_ofs, int interleave, int /* * Transforms the CFI command for the given geometry (bus width & interleave). * It looks too long to be inline, but in the common case it should almost all - * get optimised away. + * get optimised away. */ static inline map_word cfi_build_cmd(u_long cmd, struct map_info *map, struct cfi_private *cfi) { @@ -259,7 +267,7 @@ static inline map_word cfi_build_cmd(u_long cmd, struct map_info *map, struct cf unsigned long onecmd; int i; - /* We do it this way to give the compiler a fighting chance + /* We do it this way to give the compiler a fighting chance of optimising away all the crap for 'bankwidth' larger than an unsigned long, in the common case where that support is disabled */ @@ -270,7 +278,7 @@ static inline map_word cfi_build_cmd(u_long cmd, struct map_info *map, struct cf wordwidth = map_bankwidth(map); words_per_bus = 1; } - + chip_mode = map_bankwidth(map) / cfi_interleave(cfi); chips_per_word = wordwidth * cfi_interleave(cfi) / map_bankwidth(map); @@ -289,7 +297,7 @@ static inline map_word cfi_build_cmd(u_long cmd, struct map_info *map, struct cf break; } - /* Now replicate it across the size of an unsigned long, or + /* Now replicate it across the size of an unsigned long, or just to the bus width as appropriate */ switch (chips_per_word) { default: BUG(); @@ -305,7 +313,7 @@ static inline map_word cfi_build_cmd(u_long cmd, struct map_info *map, struct cf ; } - /* And finally, for the multi-word case, replicate it + /* And finally, for the multi-word case, replicate it in all words in the structure */ for (i=0; i < words_per_bus; i++) { val.x[i] = onecmd; @@ -316,14 +324,14 @@ static inline map_word cfi_build_cmd(u_long cmd, struct map_info *map, struct cf #define CMD(x) cfi_build_cmd((x), map, cfi) -static inline unsigned char cfi_merge_status(map_word val, struct map_info *map, +static inline unsigned long cfi_merge_status(map_word val, struct map_info *map, struct cfi_private *cfi) { int wordwidth, words_per_bus, chip_mode, chips_per_word; unsigned long onestat, res = 0; int i; - /* We do it this way to give the compiler a fighting chance + /* We do it this way to give the compiler a fighting chance of optimising away all the crap for 'bankwidth' larger than an unsigned long, in the common case where that support is disabled */ @@ -334,7 +342,7 @@ static inline unsigned char cfi_merge_status(map_word val, struct map_info *map, wordwidth = map_bankwidth(map); words_per_bus = 1; } - + chip_mode = map_bankwidth(map) / cfi_interleave(cfi); chips_per_word = wordwidth * cfi_interleave(cfi) / map_bankwidth(map); @@ -418,6 +426,22 @@ static inline uint8_t cfi_read_query(struct map_info *map, uint32_t addr) } } +static inline uint16_t cfi_read_query16(struct map_info *map, uint32_t addr) +{ + map_word val = map_read(map, addr); + + if (map_bankwidth_is_1(map)) { + return val.x[0] & 0xff; + } else if (map_bankwidth_is_2(map)) { + return cfi16_to_cpu(val.x[0]); + } else { + /* No point in a 64-bit byteswap since that would just be + swapping the responses from different chips, and we are + only interested in one chip (a representative sample) */ + return cfi32_to_cpu(val.x[0]); + } +} + static inline void cfi_udelay(int us) { if (us >= 1000) { diff --git a/include/linux/mtd/doc2000.h b/include/linux/mtd/doc2000.h index 953e64fb8ac5..386a52cf8b1b 100644 --- a/include/linux/mtd/doc2000.h +++ b/include/linux/mtd/doc2000.h @@ -1,12 +1,12 @@ -/* +/* * Linux driver for Disk-On-Chip devices * - * Copyright (C) 1999 Machine Vision Holdings, Inc. + * Copyright (C) 1999 Machine Vision Holdings, Inc. * Copyright (C) 2001-2003 David Woodhouse <dwmw2@infradead.org> * Copyright (C) 2002-2003 Greg Ungerer <gerg@snapgear.com> * Copyright (C) 2002-2003 SnapGear Inc * - * $Id: doc2000.h,v 1.24 2005/01/05 12:40:38 dwmw2 Exp $ + * $Id: doc2000.h,v 1.25 2005/11/07 11:14:54 gleixner Exp $ * * Released under GPL */ @@ -75,10 +75,10 @@ #define DoC_Mplus_CtrlConfirm 0x1076 #define DoC_Mplus_Power 0x1fff -/* How to access the device? - * On ARM, it'll be mmap'd directly with 32-bit wide accesses. +/* How to access the device? + * On ARM, it'll be mmap'd directly with 32-bit wide accesses. * On PPC, it's mmap'd and 16-bit wide. - * Others use readb/writeb + * Others use readb/writeb */ #if defined(__arm__) #define ReadDOC_(adr, reg) ((unsigned char)(*(volatile __u32 *)(((unsigned long)adr)+((reg)<<2)))) @@ -172,7 +172,7 @@ struct DiskOnChip { unsigned long totlen; unsigned char ChipID; /* Type of DiskOnChip */ int ioreg; - + unsigned long mfr; /* Flash IDs - only one type of flash per device */ unsigned long id; int chipshift; @@ -180,10 +180,10 @@ struct DiskOnChip { char pageadrlen; char interleave; /* Internal interleaving - Millennium Plus style */ unsigned long erasesize; - + int curfloor; int curchip; - + int numchips; struct Nand *chips; struct mtd_info *nextdoc; diff --git a/include/linux/mtd/flashchip.h b/include/linux/mtd/flashchip.h index 675776fa3e27..a293a3b78e05 100644 --- a/include/linux/mtd/flashchip.h +++ b/include/linux/mtd/flashchip.h @@ -1,12 +1,12 @@ -/* +/* * struct flchip definition - * - * Contains information about the location and state of a given flash device + * + * Contains information about the location and state of a given flash device * * (C) 2000 Red Hat. GPLd. * - * $Id: flashchip.h,v 1.17 2005/03/14 18:27:15 bjd Exp $ + * $Id: flashchip.h,v 1.18 2005/11/07 11:14:54 gleixner Exp $ * */ @@ -15,11 +15,11 @@ /* For spinlocks. sched.h includes spinlock.h from whichever directory it * happens to be in - so we don't have to care whether we're on 2.2, which - * has asm/spinlock.h, or 2.4, which has linux/spinlock.h + * has asm/spinlock.h, or 2.4, which has linux/spinlock.h */ #include <linux/sched.h> -typedef enum { +typedef enum { FL_READY, FL_STATUS, FL_CFI_QUERY, @@ -45,7 +45,7 @@ typedef enum { -/* NOTE: confusingly, this can be used to refer to more than one chip at a time, +/* NOTE: confusingly, this can be used to refer to more than one chip at a time, if they're interleaved. This can even refer to individual partitions on the same physical chip when present. */ diff --git a/include/linux/mtd/ftl.h b/include/linux/mtd/ftl.h index 3678459b4535..d99609113307 100644 --- a/include/linux/mtd/ftl.h +++ b/include/linux/mtd/ftl.h @@ -1,6 +1,6 @@ /* - * $Id: ftl.h,v 1.6 2003/01/24 13:20:04 dwmw2 Exp $ - * + * $Id: ftl.h,v 1.7 2005/11/07 11:14:54 gleixner Exp $ + * * Derived from (and probably identical to): * ftl.h 1.7 1999/10/25 20:23:17 * @@ -12,7 +12,7 @@ * Software distributed under the License is distributed on an "AS IS" * basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See * the License for the specific language governing rights and - * limitations under the License. + * limitations under the License. * * The initial developer of the original code is David A. Hinds * <dahinds@users.sourceforge.net>. Portions created by David A. Hinds diff --git a/include/linux/mtd/gen_probe.h b/include/linux/mtd/gen_probe.h index 3d7bdec14f97..256e7342ed1e 100644 --- a/include/linux/mtd/gen_probe.h +++ b/include/linux/mtd/gen_probe.h @@ -1,14 +1,14 @@ /* * (C) 2001, 2001 Red Hat, Inc. * GPL'd - * $Id: gen_probe.h,v 1.3 2004/10/20 22:10:33 dwmw2 Exp $ + * $Id: gen_probe.h,v 1.4 2005/11/07 11:14:54 gleixner Exp $ */ #ifndef __LINUX_MTD_GEN_PROBE_H__ #define __LINUX_MTD_GEN_PROBE_H__ #include <linux/mtd/flashchip.h> -#include <linux/mtd/map.h> +#include <linux/mtd/map.h> #include <linux/mtd/cfi.h> #include <linux/bitops.h> diff --git a/include/linux/mtd/jedec.h b/include/linux/mtd/jedec.h index 2ba0f700ddbc..9006feb218b9 100644 --- a/include/linux/mtd/jedec.h +++ b/include/linux/mtd/jedec.h @@ -1,13 +1,13 @@ /* JEDEC Flash Interface. - * This is an older type of interface for self programming flash. It is + * This is an older type of interface for self programming flash. It is * commonly use in older AMD chips and is obsolete compared with CFI. * It is called JEDEC because the JEDEC association distributes the ID codes * for the chips. * * See the AMD flash databook for information on how to operate the interface. * - * $Id: jedec.h,v 1.3 2003/05/21 11:51:01 dwmw2 Exp $ + * $Id: jedec.h,v 1.4 2005/11/07 11:14:54 gleixner Exp $ */ #ifndef __LINUX_MTD_JEDEC_H__ @@ -33,16 +33,16 @@ struct jedec_flash_chip __u16 jedec; unsigned long size; unsigned long sectorsize; - + // *(__u8*)(base + (adder << addrshift)) = data << datashift // Address size = size << addrshift unsigned long base; // Byte 0 of the flash, will be unaligned unsigned int datashift; // Useful for 32bit/16bit accesses unsigned int addrshift; unsigned long offset; // linerized start. base==offset for unbanked, uninterleaved flash - + __u32 capabilities; - + // These markers are filled in by the flash_chip_scan function unsigned long start; unsigned long length; @@ -51,16 +51,16 @@ struct jedec_flash_chip struct jedec_private { unsigned long size; // Total size of all the devices - + /* Bank handling. If sum(bank_fill) == size then this is linear flash. Otherwise the mapping has holes in it. bank_fill may be used to - find the holes, but in the common symetric case - bank_fill[0] == bank_fill[*], thus addresses may be computed + find the holes, but in the common symetric case + bank_fill[0] == bank_fill[*], thus addresses may be computed mathmatically. bank_fill must be powers of two */ unsigned is_banked; unsigned long bank_fill[MAX_JEDEC_CHIPS]; - - struct jedec_flash_chip chips[MAX_JEDEC_CHIPS]; + + struct jedec_flash_chip chips[MAX_JEDEC_CHIPS]; }; #endif diff --git a/include/linux/mtd/map.h b/include/linux/mtd/map.h index 142963f01d29..fedfbc8a287f 100644 --- a/include/linux/mtd/map.h +++ b/include/linux/mtd/map.h @@ -1,6 +1,6 @@ /* Overhauled routines for dealing with different mmap regions of flash */ -/* $Id: map.h,v 1.52 2005/05/25 10:29:41 gleixner Exp $ */ +/* $Id: map.h,v 1.54 2005/11/07 11:14:54 gleixner Exp $ */ #ifndef __LINUX_MTD_MAP_H__ #define __LINUX_MTD_MAP_H__ @@ -8,7 +8,10 @@ #include <linux/config.h> #include <linux/types.h> #include <linux/list.h> +#include <linux/string.h> + #include <linux/mtd/compatmac.h> + #include <asm/unaligned.h> #include <asm/system.h> #include <asm/io.h> @@ -167,14 +170,14 @@ typedef union { to a chip probe routine -- either JEDEC or CFI probe or both -- via do_map_probe(). If a chip is recognised, the probe code will invoke the appropriate chip driver (if present) and return a struct mtd_info. - At which point, you fill in the mtd->module with your own module + At which point, you fill in the mtd->module with your own module address, and register it with the MTD core code. Or you could partition it and register the partitions instead, or keep it for your own private use; whatever. - + The mtd->priv field will point to the struct map_info, and any further - private data required by the chip driver is linked from the - mtd->priv->fldrv_priv field. This allows the map driver to get at + private data required by the chip driver is linked from the + mtd->priv->fldrv_priv field. This allows the map driver to get at the destructor function map->fldrv_destroy() when it's tired of living. */ @@ -211,7 +214,7 @@ struct map_info { If there is no cache to care about this can be set to NULL. */ void (*inval_cache)(struct map_info *, unsigned long, ssize_t); - /* set_vpp() must handle being reentered -- enable, enable, disable + /* set_vpp() must handle being reentered -- enable, enable, disable must leave it enabled. */ void (*set_vpp)(struct map_info *, int); @@ -350,7 +353,7 @@ static inline map_word map_word_ff(struct map_info *map) { map_word r; int i; - + if (map_bankwidth(map) < MAP_FF_LIMIT) { int bw = 8 * map_bankwidth(map); r.x[0] = (1 << bw) - 1; diff --git a/include/linux/mtd/mtd.h b/include/linux/mtd/mtd.h index c50c3f3927d9..b6f2fdae65c6 100644 --- a/include/linux/mtd/mtd.h +++ b/include/linux/mtd/mtd.h @@ -1,5 +1,5 @@ -/* - * $Id: mtd.h,v 1.59 2005/04/11 10:19:02 gleixner Exp $ +/* + * $Id: mtd.h,v 1.61 2005/11/07 11:14:54 gleixner Exp $ * * Copyright (C) 1999-2003 David Woodhouse <dwmw2@infradead.org> et al. * @@ -14,7 +14,6 @@ #endif #include <linux/config.h> -#include <linux/version.h> #include <linux/types.h> #include <linux/module.h> #include <linux/uio.h> @@ -72,7 +71,17 @@ struct mtd_info { u_int32_t oobsize; // Amount of OOB data per block (e.g. 16) u_int32_t ecctype; u_int32_t eccsize; - + + /* + * Reuse some of the above unused fields in the case of NOR flash + * with configurable programming regions to avoid modifying the + * user visible structure layout/size. Only valid when the + * MTD_PROGRAM_REGIONS flag is set. + * (Maybe we should have an union for those?) + */ +#define MTD_PROGREGION_SIZE(mtd) (mtd)->oobblock +#define MTD_PROGREGION_CTRLMODE_VALID(mtd) (mtd)->oobsize +#define MTD_PROGREGION_CTRLMODE_INVALID(mtd) (mtd)->ecctype // Kernel-only stuff starts here. char *name; @@ -80,13 +89,13 @@ struct mtd_info { // oobinfo is a nand_oobinfo structure, which can be set by iotcl (MEMSETOOBINFO) struct nand_oobinfo oobinfo; - u_int32_t oobavail; // Number of bytes in OOB area available for fs + u_int32_t oobavail; // Number of bytes in OOB area available for fs /* Data for variable erase regions. If numeraseregions is zero, - * it means that the whole device has erasesize as given above. + * it means that the whole device has erasesize as given above. */ int numeraseregions; - struct mtd_erase_region_info *eraseregions; + struct mtd_erase_region_info *eraseregions; /* This really shouldn't be here. It can go away in 2.5 */ u_int32_t bank_size; @@ -109,10 +118,10 @@ struct mtd_info { int (*read_oob) (struct mtd_info *mtd, loff_t from, size_t len, size_t *retlen, u_char *buf); int (*write_oob) (struct mtd_info *mtd, loff_t to, size_t len, size_t *retlen, const u_char *buf); - /* - * Methods to access the protection register area, present in some + /* + * Methods to access the protection register area, present in some * flash devices. The user data is one time programmable but the - * factory data is read only. + * factory data is read only. */ int (*get_fact_prot_info) (struct mtd_info *mtd, struct otp_info *buf, size_t len); int (*read_fact_prot_reg) (struct mtd_info *mtd, loff_t from, size_t len, size_t *retlen, u_char *buf); @@ -123,14 +132,14 @@ struct mtd_info { /* kvec-based read/write methods. We need these especially for NAND flash, with its limited number of write cycles per erase. - NB: The 'count' parameter is the number of _vectors_, each of + NB: The 'count' parameter is the number of _vectors_, each of which contains an (ofs, len) tuple. */ int (*readv) (struct mtd_info *mtd, struct kvec *vecs, unsigned long count, loff_t from, size_t *retlen); - int (*readv_ecc) (struct mtd_info *mtd, struct kvec *vecs, unsigned long count, loff_t from, + int (*readv_ecc) (struct mtd_info *mtd, struct kvec *vecs, unsigned long count, loff_t from, size_t *retlen, u_char *eccbuf, struct nand_oobinfo *oobsel); int (*writev) (struct mtd_info *mtd, const struct kvec *vecs, unsigned long count, loff_t to, size_t *retlen); - int (*writev_ecc) (struct mtd_info *mtd, const struct kvec *vecs, unsigned long count, loff_t to, + int (*writev_ecc) (struct mtd_info *mtd, const struct kvec *vecs, unsigned long count, loff_t to, size_t *retlen, u_char *eccbuf, struct nand_oobinfo *oobsel); /* Sync */ @@ -194,7 +203,7 @@ int default_mtd_readv(struct mtd_info *mtd, struct kvec *vecs, #define MTD_WRITEECC(mtd, args...) (*(mtd->write_ecc))(mtd, args) #define MTD_READOOB(mtd, args...) (*(mtd->read_oob))(mtd, args) #define MTD_WRITEOOB(mtd, args...) (*(mtd->write_oob))(mtd, args) -#define MTD_SYNC(mtd) do { if (mtd->sync) (*(mtd->sync))(mtd); } while (0) +#define MTD_SYNC(mtd) do { if (mtd->sync) (*(mtd->sync))(mtd); } while (0) #ifdef CONFIG_MTD_PARTITIONS diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h index 9b5b76217584..da5e67b3fc70 100644 --- a/include/linux/mtd/nand.h +++ b/include/linux/mtd/nand.h @@ -5,7 +5,7 @@ * Steven J. Hill <sjhill@realitydiluted.com> * Thomas Gleixner <tglx@linutronix.de> * - * $Id: nand.h,v 1.73 2005/05/31 19:39:17 gleixner Exp $ + * $Id: nand.h,v 1.74 2005/09/15 13:58:50 vwool Exp $ * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as @@ -24,7 +24,7 @@ * bat later if I did something naughty. * 10-11-2000 SJH Added private NAND flash structure for driver * 10-24-2000 SJH Added prototype for 'nand_scan' function - * 10-29-2001 TG changed nand_chip structure to support + * 10-29-2001 TG changed nand_chip structure to support * hardwarespecific function for accessing control lines * 02-21-2002 TG added support for different read/write adress and * ready/busy line access function @@ -36,21 +36,21 @@ * CONFIG_MTD_NAND_ECC_JFFS2 is not set * 08-10-2002 TG extensions to nand_chip structure to support HW-ECC * - * 08-29-2002 tglx nand_chip structure: data_poi for selecting + * 08-29-2002 tglx nand_chip structure: data_poi for selecting * internal / fs-driver buffer * support for 6byte/512byte hardware ECC * read_ecc, write_ecc extended for different oob-layout * oob layout selections: NAND_NONE_OOB, NAND_JFFS2_OOB, * NAND_YAFFS_OOB * 11-25-2002 tglx Added Manufacturer code FUJITSU, NATIONAL - * Split manufacturer and device ID structures + * Split manufacturer and device ID structures * * 02-08-2004 tglx added option field to nand structure for chip anomalities * 05-25-2004 tglx added bad block table support, ST-MICRO manufacturer id * update of nand_chip structure description - * 01-17-2005 dmarlin added extended commands for AG-AND device and added option + * 01-17-2005 dmarlin added extended commands for AG-AND device and added option * for BBT_AUTO_REFRESH. - * 01-20-2005 dmarlin added optional pointer to hardware specific callback for + * 01-20-2005 dmarlin added optional pointer to hardware specific callback for * extra error status checks. */ #ifndef __LINUX_MTD_NAND_H @@ -120,8 +120,8 @@ extern int nand_read_raw (struct mtd_info *mtd, uint8_t *buf, loff_t from, size_ #define NAND_CMD_CACHEDPROG 0x15 /* Extended commands for AG-AND device */ -/* - * Note: the command for NAND_CMD_DEPLETE1 is really 0x00 but +/* + * Note: the command for NAND_CMD_DEPLETE1 is really 0x00 but * there is no way to distinguish that from NAND_CMD_READ0 * until the remaining sequence of commands has been completed * so add a high order bit and mask it off in the command. @@ -145,7 +145,7 @@ extern int nand_read_raw (struct mtd_info *mtd, uint8_t *buf, loff_t from, size_ #define NAND_STATUS_READY 0x40 #define NAND_STATUS_WP 0x80 -/* +/* * Constants for ECC_MODES */ @@ -191,12 +191,12 @@ extern int nand_read_raw (struct mtd_info *mtd, uint8_t *buf, loff_t from, size_ #define NAND_CACHEPRG 0x00000008 /* Chip has copy back function */ #define NAND_COPYBACK 0x00000010 -/* AND Chip which has 4 banks and a confusing page / block +/* AND Chip which has 4 banks and a confusing page / block * assignment. See Renesas datasheet for further information */ #define NAND_IS_AND 0x00000020 /* Chip has a array of 4 pages which can be read without * additional ready /busy waits */ -#define NAND_4PAGE_ARRAY 0x00000040 +#define NAND_4PAGE_ARRAY 0x00000040 /* Chip requires that BBT is periodically rewritten to prevent * bits from adjacent blocks from 'leaking' in altering data. * This happens with the Renesas AG-AND chips, possibly others. */ @@ -219,8 +219,8 @@ extern int nand_read_raw (struct mtd_info *mtd, uint8_t *buf, loff_t from, size_ /* Use a flash based bad block table. This option is passed to the * default bad block table function. */ #define NAND_USE_FLASH_BBT 0x00010000 -/* The hw ecc generator provides a syndrome instead a ecc value on read - * This can only work if we have the ecc bytes directly behind the +/* The hw ecc generator provides a syndrome instead a ecc value on read + * This can only work if we have the ecc bytes directly behind the * data bytes. Applies for DOC and AG-AND Renesas HW Reed Solomon generators */ #define NAND_HWECC_SYNDROME 0x00020000 /* This option skips the bbt scan during initialization. */ @@ -244,6 +244,7 @@ typedef enum { FL_ERASING, FL_SYNCING, FL_CACHEDPRG, + FL_PM_SUSPENDED, } nand_state_t; /* Keep gcc happy */ @@ -251,7 +252,7 @@ struct nand_chip; /** * struct nand_hw_control - Control structure for hardware controller (e.g ECC generator) shared among independend devices - * @lock: protection lock + * @lock: protection lock * @active: the mtd device which holds the controller currently * @wq: wait queue to sleep on if a NAND operation is in progress * used instead of the per chip wait queue when a hw controller is available @@ -264,8 +265,8 @@ struct nand_hw_control { /** * struct nand_chip - NAND Private Flash Chip Data - * @IO_ADDR_R: [BOARDSPECIFIC] address to read the 8 I/O lines of the flash device - * @IO_ADDR_W: [BOARDSPECIFIC] address to write the 8 I/O lines of the flash device + * @IO_ADDR_R: [BOARDSPECIFIC] address to read the 8 I/O lines of the flash device + * @IO_ADDR_W: [BOARDSPECIFIC] address to write the 8 I/O lines of the flash device * @read_byte: [REPLACEABLE] read one byte from the chip * @write_byte: [REPLACEABLE] write one byte to the chip * @read_word: [REPLACEABLE] read one word from the chip @@ -288,7 +289,7 @@ struct nand_hw_control { * be provided if a hardware ECC is available * @erase_cmd: [INTERN] erase command write function, selectable due to AND support * @scan_bbt: [REPLACEABLE] function to scan bad block table - * @eccmode: [BOARDSPECIFIC] mode of ecc, see defines + * @eccmode: [BOARDSPECIFIC] mode of ecc, see defines * @eccsize: [INTERN] databytes used per ecc-calculation * @eccbytes: [INTERN] number of ecc bytes per ecc-calculation step * @eccsteps: [INTERN] number of ecc calculation steps per page @@ -300,7 +301,7 @@ struct nand_hw_control { * @phys_erase_shift: [INTERN] number of address bits in a physical eraseblock * @bbt_erase_shift: [INTERN] number of address bits in a bbt entry * @chip_shift: [INTERN] number of address bits in one chip - * @data_buf: [INTERN] internal buffer for one page + oob + * @data_buf: [INTERN] internal buffer for one page + oob * @oob_buf: [INTERN] oob buffer for one eraseblock * @oobdirty: [INTERN] indicates that oob_buf must be reinitialized * @data_poi: [INTERN] pointer to a data buffer @@ -315,22 +316,22 @@ struct nand_hw_control { * @bbt: [INTERN] bad block table pointer * @bbt_td: [REPLACEABLE] bad block table descriptor for flash lookup * @bbt_md: [REPLACEABLE] bad block table mirror descriptor - * @badblock_pattern: [REPLACEABLE] bad block scan pattern used for initial bad block scan + * @badblock_pattern: [REPLACEABLE] bad block scan pattern used for initial bad block scan * @controller: [OPTIONAL] a pointer to a hardware controller structure which is shared among multiple independend devices * @priv: [OPTIONAL] pointer to private chip date - * @errstat: [OPTIONAL] hardware specific function to perform additional error status checks + * @errstat: [OPTIONAL] hardware specific function to perform additional error status checks * (determine if errors are correctable) */ - + struct nand_chip { void __iomem *IO_ADDR_R; void __iomem *IO_ADDR_W; - + u_char (*read_byte)(struct mtd_info *mtd); void (*write_byte)(struct mtd_info *mtd, u_char byte); u16 (*read_word)(struct mtd_info *mtd); void (*write_word)(struct mtd_info *mtd, u16 word); - + void (*write_buf)(struct mtd_info *mtd, const u_char *buf, int len); void (*read_buf)(struct mtd_info *mtd, u_char *buf, int len); int (*verify_buf)(struct mtd_info *mtd, const u_char *buf, int len); @@ -395,7 +396,7 @@ struct nand_chip { * @name: Identify the device type * @id: device ID code * @pagesize: Pagesize in bytes. Either 256 or 512 or 0 - * If the pagesize is 0, then the real pagesize + * If the pagesize is 0, then the real pagesize * and the eraseize are determined from the * extended id bytes in the chip * @erasesize: Size of an erase block in the flash device. @@ -424,7 +425,7 @@ struct nand_manufacturers { extern struct nand_flash_dev nand_flash_ids[]; extern struct nand_manufacturers nand_manuf_ids[]; -/** +/** * struct nand_bbt_descr - bad block table descriptor * @options: options for this descriptor * @pages: the page(s) where we find the bbt, used with option BBT_ABSPAGE @@ -435,14 +436,14 @@ extern struct nand_manufacturers nand_manuf_ids[]; * @version: version read from the bbt page during scan * @len: length of the pattern, if 0 no pattern check is performed * @maxblocks: maximum number of blocks to search for a bbt. This number of - * blocks is reserved at the end of the device where the tables are + * blocks is reserved at the end of the device where the tables are * written. * @reserved_block_code: if non-0, this pattern denotes a reserved (rather than * bad) block in the stored bbt - * @pattern: pattern to identify bad block table or factory marked good / + * @pattern: pattern to identify bad block table or factory marked good / * bad blocks, can be NULL, if len = 0 * - * Descriptor for the bad block table marker and the descriptor for the + * Descriptor for the bad block table marker and the descriptor for the * pattern which identifies good and bad blocks. The assumption is made * that the pattern and the version count are always located in the oob area * of the first block. diff --git a/include/linux/mtd/onenand.h b/include/linux/mtd/onenand.h new file mode 100644 index 000000000000..f1fd4215686a --- /dev/null +++ b/include/linux/mtd/onenand.h @@ -0,0 +1,155 @@ +/* + * linux/include/linux/mtd/onenand.h + * + * Copyright (C) 2005 Samsung Electronics + * Kyungmin Park <kyungmin.park@samsung.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __LINUX_MTD_ONENAND_H +#define __LINUX_MTD_ONENAND_H + +#include <linux/spinlock.h> +#include <linux/mtd/onenand_regs.h> +#include <linux/mtd/bbm.h> + +#define MAX_BUFFERRAM 2 +#define MAX_ONENAND_PAGESIZE (2048 + 64) + +/* Scan and identify a OneNAND device */ +extern int onenand_scan(struct mtd_info *mtd, int max_chips); +/* Free resources held by the OneNAND device */ +extern void onenand_release(struct mtd_info *mtd); + +/** + * onenand_state_t - chip states + * Enumeration for OneNAND flash chip state + */ +typedef enum { + FL_READY, + FL_READING, + FL_WRITING, + FL_ERASING, + FL_SYNCING, + FL_UNLOCKING, + FL_LOCKING, + FL_PM_SUSPENDED, +} onenand_state_t; + +/** + * struct onenand_bufferram - OneNAND BufferRAM Data + * @param block block address in BufferRAM + * @param page page address in BufferRAM + * @param valid valid flag + */ +struct onenand_bufferram { + int block; + int page; + int valid; +}; + +/** + * struct onenand_chip - OneNAND Private Flash Chip Data + * @param base [BOARDSPECIFIC] address to access OneNAND + * @param chipsize [INTERN] the size of one chip for multichip arrays + * @param device_id [INTERN] device ID + * @param verstion_id [INTERN] version ID + * @param options [BOARDSPECIFIC] various chip options. They can partly be set to inform onenand_scan about + * @param erase_shift [INTERN] number of address bits in a block + * @param page_shift [INTERN] number of address bits in a page + * @param ppb_shift [INTERN] number of address bits in a pages per block + * @param page_mask [INTERN] a page per block mask + * @param bufferam_index [INTERN] BufferRAM index + * @param bufferam [INTERN] BufferRAM info + * @param readw [REPLACEABLE] hardware specific function for read short + * @param writew [REPLACEABLE] hardware specific function for write short + * @param command [REPLACEABLE] hardware specific function for writing commands to the chip + * @param wait [REPLACEABLE] hardware specific function for wait on ready + * @param read_bufferram [REPLACEABLE] hardware specific function for BufferRAM Area + * @param write_bufferram [REPLACEABLE] hardware specific function for BufferRAM Area + * @param read_word [REPLACEABLE] hardware specific function for read register of OneNAND + * @param write_word [REPLACEABLE] hardware specific function for write register of OneNAND + * @param scan_bbt [REPLACEALBE] hardware specific function for scaning Bad block Table + * @param chip_lock [INTERN] spinlock used to protect access to this structure and the chip + * @param wq [INTERN] wait queue to sleep on if a OneNAND operation is in progress + * @param state [INTERN] the current state of the OneNAND device + * @param autooob [REPLACEABLE] the default (auto)placement scheme + * @param bbm [REPLACEABLE] pointer to Bad Block Management + * @param priv [OPTIONAL] pointer to private chip date + */ +struct onenand_chip { + void __iomem *base; + unsigned int chipsize; + unsigned int device_id; + unsigned int density_mask; + unsigned int options; + + unsigned int erase_shift; + unsigned int page_shift; + unsigned int ppb_shift; /* Pages per block shift */ + unsigned int page_mask; + + unsigned int bufferram_index; + struct onenand_bufferram bufferram[MAX_BUFFERRAM]; + + int (*command)(struct mtd_info *mtd, int cmd, loff_t address, size_t len); + int (*wait)(struct mtd_info *mtd, int state); + int (*read_bufferram)(struct mtd_info *mtd, int area, + unsigned char *buffer, int offset, size_t count); + int (*write_bufferram)(struct mtd_info *mtd, int area, + const unsigned char *buffer, int offset, size_t count); + unsigned short (*read_word)(void __iomem *addr); + void (*write_word)(unsigned short value, void __iomem *addr); + void (*mmcontrol)(struct mtd_info *mtd, int sync_read); + int (*block_markbad)(struct mtd_info *mtd, loff_t ofs); + int (*scan_bbt)(struct mtd_info *mtd); + + spinlock_t chip_lock; + wait_queue_head_t wq; + onenand_state_t state; + + struct nand_oobinfo *autooob; + + void *bbm; + + void *priv; +}; + +/* + * Helper macros + */ +#define ONENAND_CURRENT_BUFFERRAM(this) (this->bufferram_index) +#define ONENAND_NEXT_BUFFERRAM(this) (this->bufferram_index ^ 1) +#define ONENAND_SET_NEXT_BUFFERRAM(this) (this->bufferram_index ^= 1) + +#define ONENAND_GET_SYS_CFG1(this) \ + (this->read_word(this->base + ONENAND_REG_SYS_CFG1)) +#define ONENAND_SET_SYS_CFG1(v, this) \ + (this->write_word(v, this->base + ONENAND_REG_SYS_CFG1)) + +/* + * Options bits + */ +#define ONENAND_CONT_LOCK (0x0001) + + +/* + * OneNAND Flash Manufacturer ID Codes + */ +#define ONENAND_MFR_SAMSUNG 0xec +#define ONENAND_MFR_UNKNOWN 0x00 + +/** + * struct nand_manufacturers - NAND Flash Manufacturer ID Structure + * @param name: Manufacturer name + * @param id: manufacturer ID code of device. +*/ +struct onenand_manufacturers { + int id; + char *name; +}; + +#endif /* __LINUX_MTD_ONENAND_H */ diff --git a/include/linux/mtd/onenand_regs.h b/include/linux/mtd/onenand_regs.h new file mode 100644 index 000000000000..d7832ef8ed63 --- /dev/null +++ b/include/linux/mtd/onenand_regs.h @@ -0,0 +1,180 @@ +/* + * linux/include/linux/mtd/onenand_regs.h + * + * OneNAND Register header file + * + * Copyright (C) 2005 Samsung Electronics + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __ONENAND_REG_H +#define __ONENAND_REG_H + +/* Memory Address Map Translation (Word order) */ +#define ONENAND_MEMORY_MAP(x) ((x) << 1) + +/* + * External BufferRAM area + */ +#define ONENAND_BOOTRAM ONENAND_MEMORY_MAP(0x0000) +#define ONENAND_DATARAM ONENAND_MEMORY_MAP(0x0200) +#define ONENAND_SPARERAM ONENAND_MEMORY_MAP(0x8010) + +/* + * OneNAND Registers + */ +#define ONENAND_REG_MANUFACTURER_ID ONENAND_MEMORY_MAP(0xF000) +#define ONENAND_REG_DEVICE_ID ONENAND_MEMORY_MAP(0xF001) +#define ONENAND_REG_VERSION_ID ONENAND_MEMORY_MAP(0xF002) +#define ONENAND_REG_DATA_BUFFER_SIZE ONENAND_MEMORY_MAP(0xF003) +#define ONENAND_REG_BOOT_BUFFER_SIZE ONENAND_MEMORY_MAP(0xF004) +#define ONENAND_REG_NUM_BUFFERS ONENAND_MEMORY_MAP(0xF005) +#define ONENAND_REG_TECHNOLOGY ONENAND_MEMORY_MAP(0xF006) + +#define ONENAND_REG_START_ADDRESS1 ONENAND_MEMORY_MAP(0xF100) +#define ONENAND_REG_START_ADDRESS2 ONENAND_MEMORY_MAP(0xF101) +#define ONENAND_REG_START_ADDRESS3 ONENAND_MEMORY_MAP(0xF102) +#define ONENAND_REG_START_ADDRESS4 ONENAND_MEMORY_MAP(0xF103) +#define ONENAND_REG_START_ADDRESS5 ONENAND_MEMORY_MAP(0xF104) +#define ONENAND_REG_START_ADDRESS6 ONENAND_MEMORY_MAP(0xF105) +#define ONENAND_REG_START_ADDRESS7 ONENAND_MEMORY_MAP(0xF106) +#define ONENAND_REG_START_ADDRESS8 ONENAND_MEMORY_MAP(0xF107) + +#define ONENAND_REG_START_BUFFER ONENAND_MEMORY_MAP(0xF200) +#define ONENAND_REG_COMMAND ONENAND_MEMORY_MAP(0xF220) +#define ONENAND_REG_SYS_CFG1 ONENAND_MEMORY_MAP(0xF221) +#define ONENAND_REG_SYS_CFG2 ONENAND_MEMORY_MAP(0xF222) +#define ONENAND_REG_CTRL_STATUS ONENAND_MEMORY_MAP(0xF240) +#define ONENAND_REG_INTERRUPT ONENAND_MEMORY_MAP(0xF241) +#define ONENAND_REG_START_BLOCK_ADDRESS ONENAND_MEMORY_MAP(0xF24C) +#define ONENAND_REG_END_BLOCK_ADDRESS ONENAND_MEMORY_MAP(0xF24D) +#define ONENAND_REG_WP_STATUS ONENAND_MEMORY_MAP(0xF24E) + +#define ONENAND_REG_ECC_STATUS ONENAND_MEMORY_MAP(0xFF00) +#define ONENAND_REG_ECC_M0 ONENAND_MEMORY_MAP(0xFF01) +#define ONENAND_REG_ECC_S0 ONENAND_MEMORY_MAP(0xFF02) +#define ONENAND_REG_ECC_M1 ONENAND_MEMORY_MAP(0xFF03) +#define ONENAND_REG_ECC_S1 ONENAND_MEMORY_MAP(0xFF04) +#define ONENAND_REG_ECC_M2 ONENAND_MEMORY_MAP(0xFF05) +#define ONENAND_REG_ECC_S2 ONENAND_MEMORY_MAP(0xFF06) +#define ONENAND_REG_ECC_M3 ONENAND_MEMORY_MAP(0xFF07) +#define ONENAND_REG_ECC_S3 ONENAND_MEMORY_MAP(0xFF08) + +/* + * Device ID Register F001h (R) + */ +#define ONENAND_DEVICE_DENSITY_SHIFT (4) +#define ONENAND_DEVICE_IS_DDP (1 << 3) +#define ONENAND_DEVICE_IS_DEMUX (1 << 2) +#define ONENAND_DEVICE_VCC_MASK (0x3) + +#define ONENAND_DEVICE_DENSITY_512Mb (0x002) + +/* + * Version ID Register F002h (R) + */ +#define ONENAND_VERSION_PROCESS_SHIFT (8) + +/* + * Start Address 1 F100h (R/W) + */ +#define ONENAND_DDP_SHIFT (15) + +/* + * Start Address 8 F107h (R/W) + */ +#define ONENAND_FPA_MASK (0x3f) +#define ONENAND_FPA_SHIFT (2) +#define ONENAND_FSA_MASK (0x03) + +/* + * Start Buffer Register F200h (R/W) + */ +#define ONENAND_BSA_MASK (0x03) +#define ONENAND_BSA_SHIFT (8) +#define ONENAND_BSA_BOOTRAM (0 << 2) +#define ONENAND_BSA_DATARAM0 (2 << 2) +#define ONENAND_BSA_DATARAM1 (3 << 2) +#define ONENAND_BSC_MASK (0x03) + +/* + * Command Register F220h (R/W) + */ +#define ONENAND_CMD_READ (0x00) +#define ONENAND_CMD_READOOB (0x13) +#define ONENAND_CMD_PROG (0x80) +#define ONENAND_CMD_PROGOOB (0x1A) +#define ONENAND_CMD_UNLOCK (0x23) +#define ONENAND_CMD_LOCK (0x2A) +#define ONENAND_CMD_LOCK_TIGHT (0x2C) +#define ONENAND_CMD_ERASE (0x94) +#define ONENAND_CMD_RESET (0xF0) +#define ONENAND_CMD_READID (0x90) + +/* NOTE: Those are not *REAL* commands */ +#define ONENAND_CMD_BUFFERRAM (0x1978) + +/* + * System Configuration 1 Register F221h (R, R/W) + */ +#define ONENAND_SYS_CFG1_SYNC_READ (1 << 15) +#define ONENAND_SYS_CFG1_BRL_7 (7 << 12) +#define ONENAND_SYS_CFG1_BRL_6 (6 << 12) +#define ONENAND_SYS_CFG1_BRL_5 (5 << 12) +#define ONENAND_SYS_CFG1_BRL_4 (4 << 12) +#define ONENAND_SYS_CFG1_BRL_3 (3 << 12) +#define ONENAND_SYS_CFG1_BRL_10 (2 << 12) +#define ONENAND_SYS_CFG1_BRL_9 (1 << 12) +#define ONENAND_SYS_CFG1_BRL_8 (0 << 12) +#define ONENAND_SYS_CFG1_BRL_SHIFT (12) +#define ONENAND_SYS_CFG1_BL_32 (4 << 9) +#define ONENAND_SYS_CFG1_BL_16 (3 << 9) +#define ONENAND_SYS_CFG1_BL_8 (2 << 9) +#define ONENAND_SYS_CFG1_BL_4 (1 << 9) +#define ONENAND_SYS_CFG1_BL_CONT (0 << 9) +#define ONENAND_SYS_CFG1_BL_SHIFT (9) +#define ONENAND_SYS_CFG1_NO_ECC (1 << 8) +#define ONENAND_SYS_CFG1_RDY (1 << 7) +#define ONENAND_SYS_CFG1_INT (1 << 6) +#define ONENAND_SYS_CFG1_IOBE (1 << 5) +#define ONENAND_SYS_CFG1_RDY_CONF (1 << 4) + +/* + * Controller Status Register F240h (R) + */ +#define ONENAND_CTRL_ONGO (1 << 15) +#define ONENAND_CTRL_LOCK (1 << 14) +#define ONENAND_CTRL_LOAD (1 << 13) +#define ONENAND_CTRL_PROGRAM (1 << 12) +#define ONENAND_CTRL_ERASE (1 << 11) +#define ONENAND_CTRL_ERROR (1 << 10) +#define ONENAND_CTRL_RSTB (1 << 7) + +/* + * Interrupt Status Register F241h (R) + */ +#define ONENAND_INT_MASTER (1 << 15) +#define ONENAND_INT_READ (1 << 7) +#define ONENAND_INT_WRITE (1 << 6) +#define ONENAND_INT_ERASE (1 << 5) +#define ONENAND_INT_RESET (1 << 4) +#define ONENAND_INT_CLEAR (0 << 0) + +/* + * NAND Flash Write Protection Status Register F24Eh (R) + */ +#define ONENAND_WP_US (1 << 2) +#define ONENAND_WP_LS (1 << 1) +#define ONENAND_WP_LTS (1 << 0) + +/* + * ECC Status Reigser FF00h (R) + */ +#define ONENAND_ECC_1BIT (1 << 0) +#define ONENAND_ECC_2BIT (1 << 1) +#define ONENAND_ECC_2BIT_ALL (0xAAAA) + +#endif /* __ONENAND_REG_H */ diff --git a/include/linux/mtd/partitions.h b/include/linux/mtd/partitions.h index 50b2edfc8f11..b03f512d51b9 100644 --- a/include/linux/mtd/partitions.h +++ b/include/linux/mtd/partitions.h @@ -5,7 +5,7 @@ * * This code is GPL * - * $Id: partitions.h,v 1.16 2004/11/16 18:34:40 dwmw2 Exp $ + * $Id: partitions.h,v 1.17 2005/11/07 11:14:55 gleixner Exp $ */ #ifndef MTD_PARTITIONS_H @@ -16,25 +16,25 @@ /* * Partition definition structure: - * + * * An array of struct partition is passed along with a MTD object to * add_mtd_partitions() to create them. * * For each partition, these fields are available: * name: string that will be used to label the partition's MTD device. - * size: the partition size; if defined as MTDPART_SIZ_FULL, the partition + * size: the partition size; if defined as MTDPART_SIZ_FULL, the partition * will extend to the end of the master MTD device. - * offset: absolute starting position within the master MTD device; if - * defined as MTDPART_OFS_APPEND, the partition will start where the + * offset: absolute starting position within the master MTD device; if + * defined as MTDPART_OFS_APPEND, the partition will start where the * previous one ended; if MTDPART_OFS_NXTBLK, at the next erase block. - * mask_flags: contains flags that have to be masked (removed) from the + * mask_flags: contains flags that have to be masked (removed) from the * master MTD flag set for the corresponding MTD partition. - * For example, to force a read-only partition, simply adding + * For example, to force a read-only partition, simply adding * MTD_WRITEABLE to the mask_flags will do the trick. * - * Note: writeable partitions require their size and offset be + * Note: writeable partitions require their size and offset be * erasesize aligned (e.g. use MTDPART_OFS_NEXTBLK). - */ + */ struct mtd_partition { char *name; /* identifier string */ @@ -66,7 +66,7 @@ struct mtd_part_parser { extern int register_mtd_parser(struct mtd_part_parser *parser); extern int deregister_mtd_parser(struct mtd_part_parser *parser); -extern int parse_mtd_partitions(struct mtd_info *master, const char **types, +extern int parse_mtd_partitions(struct mtd_info *master, const char **types, struct mtd_partition **pparts, unsigned long origin); #define put_partition_parser(p) do { module_put((p)->owner); } while(0) diff --git a/include/linux/mtd/physmap.h b/include/linux/mtd/physmap.h index 05aa4970677f..c7b8bcdef013 100644 --- a/include/linux/mtd/physmap.h +++ b/include/linux/mtd/physmap.h @@ -1,8 +1,8 @@ /* - * For boards with physically mapped flash and using + * For boards with physically mapped flash and using * drivers/mtd/maps/physmap.c mapping driver. * - * $Id: physmap.h,v 1.3 2004/07/21 00:16:15 jwboyer Exp $ + * $Id: physmap.h,v 1.4 2005/11/07 11:14:55 gleixner Exp $ * * Copyright (C) 2003 MontaVista Software Inc. * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net @@ -18,7 +18,7 @@ #include <linux/config.h> -#if defined(CONFIG_MTD_PHYSMAP) +#if defined(CONFIG_MTD_PHYSMAP) #include <linux/mtd/mtd.h> #include <linux/mtd/map.h> @@ -44,12 +44,12 @@ static inline void physmap_configure(unsigned long addr, unsigned long size, int #if defined(CONFIG_MTD_PARTITIONS) /* - * Machines that wish to do flash partition may want to call this function in - * their setup routine. + * Machines that wish to do flash partition may want to call this function in + * their setup routine. * * physmap_set_partitions(mypartitions, num_parts); * - * Note that one can always override this hard-coded partition with + * Note that one can always override this hard-coded partition with * command line partition (you need to enable CONFIG_MTD_CMDLINE_PARTS). */ void physmap_set_partitions(struct mtd_partition *parts, int num_parts); diff --git a/include/linux/mtd/pmc551.h b/include/linux/mtd/pmc551.h index 113e3087f68a..a7f6d20ad407 100644 --- a/include/linux/mtd/pmc551.h +++ b/include/linux/mtd/pmc551.h @@ -1,5 +1,5 @@ /* - * $Id: pmc551.h,v 1.5 2003/01/24 16:49:53 dwmw2 Exp $ + * $Id: pmc551.h,v 1.6 2005/11/07 11:14:55 gleixner Exp $ * * PMC551 PCI Mezzanine Ram Device * @@ -7,7 +7,7 @@ * Mark Ferrell * Copyright 1999,2000 Nortel Networks * - * License: + * License: * As part of this driver was derrived from the slram.c driver it falls * under the same license, which is GNU General Public License v2 */ @@ -17,7 +17,7 @@ #include <linux/mtd/mtd.h> -#define PMC551_VERSION "$Id: pmc551.h,v 1.5 2003/01/24 16:49:53 dwmw2 Exp $\n"\ +#define PMC551_VERSION "$Id: pmc551.h,v 1.6 2005/11/07 11:14:55 gleixner Exp $\n"\ "Ramix PMC551 PCI Mezzanine Ram Driver. (C) 1999,2000 Nortel Networks.\n" /* @@ -30,7 +30,7 @@ struct mypriv { u32 curr_map0; u32 asize; struct mtd_info *nextpmc551; -}; +}; /* * Function Prototypes @@ -39,7 +39,7 @@ static int pmc551_erase(struct mtd_info *, struct erase_info *); static void pmc551_unpoint(struct mtd_info *, u_char *, loff_t, size_t); static int pmc551_point (struct mtd_info *mtd, loff_t from, size_t len, size_t *retlen, u_char **mtdbuf); static int pmc551_read(struct mtd_info *, loff_t, size_t, size_t *, u_char *); -static int pmc551_write(struct mtd_info *, loff_t, size_t, size_t *, const u_char *); +static int pmc551_write(struct mtd_info *, loff_t, size_t, size_t *, const u_char *); /* @@ -50,7 +50,7 @@ static int pmc551_write(struct mtd_info *, loff_t, size_t, size_t *, const u_cha #endif #ifndef PCI_DEVICE_ID_V3_SEMI_V370PDC -#define PCI_DEVICE_ID_V3_SEMI_V370PDC 0x0200 +#define PCI_DEVICE_ID_V3_SEMI_V370PDC 0x0200 #endif diff --git a/include/linux/mtd/xip.h b/include/linux/mtd/xip.h index 7b7deef6b180..220d50bb71cd 100644 --- a/include/linux/mtd/xip.h +++ b/include/linux/mtd/xip.h @@ -12,7 +12,7 @@ * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. * - * $Id: xip.h,v 1.2 2004/12/01 15:49:10 nico Exp $ + * $Id: xip.h,v 1.5 2005/11/07 11:14:55 gleixner Exp $ */ #ifndef __LINUX_MTD_XIP_H__ @@ -23,19 +23,19 @@ #ifdef CONFIG_MTD_XIP /* - * Function that are modifying the flash state away from array mode must - * obviously not be running from flash. The __xipram is therefore marking - * those functions so they get relocated to ram. - */ -#define __xipram __attribute__ ((__section__ (".data"))) - -/* * We really don't want gcc to guess anything. * We absolutely _need_ proper inlining. */ #include <linux/compiler.h> /* + * Function that are modifying the flash state away from array mode must + * obviously not be running from flash. The __xipram is therefore marking + * those functions so they get relocated to ram. + */ +#define __xipram noinline __attribute__ ((__section__ (".data"))) + +/* * Each architecture has to provide the following macros. They must access * the hardware directly and not rely on any other (XIP) functions since they * won't be available when used (flash not in array mode). @@ -60,9 +60,9 @@ * overflowing. * * xip_iprefetch() - * + * * Macro to fill instruction prefetch - * e.g. a series of nops: asm volatile (".rep 8; nop; .endr"); + * e.g. a series of nops: asm volatile (".rep 8; nop; .endr"); */ #include <asm/mtd-xip.h> diff --git a/include/linux/namei.h b/include/linux/namei.h index 7db67b008cac..455660eafba9 100644 --- a/include/linux/namei.h +++ b/include/linux/namei.h @@ -8,6 +8,7 @@ struct vfsmount; struct open_intent { int flags; int create_mode; + struct file *file; }; enum { MAX_NESTED_LINKS = 5 }; @@ -65,8 +66,15 @@ extern int FASTCALL(link_path_walk(const char *, struct nameidata *)); extern void path_release(struct nameidata *); extern void path_release_on_umount(struct nameidata *); +extern int __user_path_lookup_open(const char __user *, unsigned lookup_flags, struct nameidata *nd, int open_flags); +extern int path_lookup_open(const char *, unsigned lookup_flags, struct nameidata *, int open_flags); +extern struct file *lookup_instantiate_filp(struct nameidata *nd, struct dentry *dentry, + int (*open)(struct inode *, struct file *)); +extern struct file *nameidata_to_filp(struct nameidata *nd, int flags); +extern void release_open_intent(struct nameidata *); + extern struct dentry * lookup_one_len(const char *, struct dentry *, int); -extern struct dentry * lookup_hash(struct qstr *, struct dentry *); +extern struct dentry * lookup_hash(struct nameidata *); extern int follow_down(struct vfsmount **, struct dentry **); extern int follow_up(struct vfsmount **, struct dentry **); diff --git a/include/linux/namespace.h b/include/linux/namespace.h index 0e5a86f13b2f..6731977c4c13 100644 --- a/include/linux/namespace.h +++ b/include/linux/namespace.h @@ -9,7 +9,8 @@ struct namespace { atomic_t count; struct vfsmount * root; struct list_head list; - struct rw_semaphore sem; + wait_queue_head_t poll; + int event; }; extern int copy_namespace(int, struct task_struct *); diff --git a/include/linux/net.h b/include/linux/net.h index 4e981585a89a..d6a41e6577f6 100644 --- a/include/linux/net.h +++ b/include/linux/net.h @@ -71,6 +71,7 @@ typedef enum { * @SOCK_RAW: raw socket * @SOCK_RDM: reliably-delivered message * @SOCK_SEQPACKET: sequential packet socket + * @SOCK_DCCP: Datagram Congestion Control Protocol socket * @SOCK_PACKET: linux specific way of getting packets at the dev level. * For writing rarp and other similar things on the user level. * diff --git a/include/linux/netdevice.h b/include/linux/netdevice.h index 7c717907896d..936f8b76114e 100644 --- a/include/linux/netdevice.h +++ b/include/linux/netdevice.h @@ -265,6 +265,8 @@ struct net_device * the interface. */ char name[IFNAMSIZ]; + /* device name hash chain */ + struct hlist_node name_hlist; /* * I/O specific fields @@ -292,6 +294,22 @@ struct net_device /* ------- Fields preinitialized in Space.c finish here ------- */ + /* Net device features */ + unsigned long features; +#define NETIF_F_SG 1 /* Scatter/gather IO. */ +#define NETIF_F_IP_CSUM 2 /* Can checksum only TCP/UDP over IPv4. */ +#define NETIF_F_NO_CSUM 4 /* Does not require checksum. F.e. loopack. */ +#define NETIF_F_HW_CSUM 8 /* Can checksum all the packets. */ +#define NETIF_F_HIGHDMA 32 /* Can DMA to high memory. */ +#define NETIF_F_FRAGLIST 64 /* Scatter/gather IO. */ +#define NETIF_F_HW_VLAN_TX 128 /* Transmit VLAN hw acceleration */ +#define NETIF_F_HW_VLAN_RX 256 /* Receive VLAN hw acceleration */ +#define NETIF_F_HW_VLAN_FILTER 512 /* Receive filtering on VLAN */ +#define NETIF_F_VLAN_CHALLENGED 1024 /* Device cannot handle VLAN packets */ +#define NETIF_F_TSO 2048 /* Can offload TCP/IP segmentation */ +#define NETIF_F_LLTX 4096 /* LockLess TX */ +#define NETIF_F_UFO 8192 /* Can offload UDP Large Send*/ + struct net_device *next_sched; /* Interface index. Unique device identifier */ @@ -316,9 +334,6 @@ struct net_device * will (read: may be cleaned up at will). */ - /* These may be needed for future network-power-down code. */ - unsigned long trans_start; /* Time (in jiffies) of last Tx */ - unsigned long last_rx; /* Time of last Rx */ unsigned short flags; /* interface flags (a la BSD) */ unsigned short gflags; @@ -328,15 +343,12 @@ struct net_device unsigned mtu; /* interface MTU value */ unsigned short type; /* interface hardware type */ unsigned short hard_header_len; /* hardware hdr length */ - void *priv; /* pointer to private data */ struct net_device *master; /* Pointer to master device of a group, * which this device is member of. */ /* Interface address info. */ - unsigned char broadcast[MAX_ADDR_LEN]; /* hw bcast add */ - unsigned char dev_addr[MAX_ADDR_LEN]; /* hw address */ unsigned char perm_addr[MAX_ADDR_LEN]; /* permanent hw address */ unsigned char addr_len; /* hardware address length */ unsigned short dev_id; /* for shared network cards */ @@ -346,8 +358,6 @@ struct net_device int promiscuity; int allmulti; - int watchdog_timeo; - struct timer_list watchdog_timer; /* Protocol specific pointers */ @@ -358,32 +368,62 @@ struct net_device void *ec_ptr; /* Econet specific data */ void *ax25_ptr; /* AX.25 specific data */ - struct list_head poll_list; /* Link to poll list */ +/* + * Cache line mostly used on receive path (including eth_type_trans()) + */ + struct list_head poll_list ____cacheline_aligned_in_smp; + /* Link to poll list */ + + int (*poll) (struct net_device *dev, int *quota); int quota; int weight; + unsigned long last_rx; /* Time of last Rx */ + /* Interface address info used in eth_type_trans() */ + unsigned char dev_addr[MAX_ADDR_LEN]; /* hw address, (before bcast + because most packets are unicast) */ + unsigned char broadcast[MAX_ADDR_LEN]; /* hw bcast add */ + +/* + * Cache line mostly used on queue transmit path (qdisc) + */ + /* device queue lock */ + spinlock_t queue_lock ____cacheline_aligned_in_smp; struct Qdisc *qdisc; struct Qdisc *qdisc_sleeping; - struct Qdisc *qdisc_ingress; struct list_head qdisc_list; unsigned long tx_queue_len; /* Max frames per queue allowed */ /* ingress path synchronizer */ spinlock_t ingress_lock; + struct Qdisc *qdisc_ingress; + +/* + * One part is mostly used on xmit path (device) + */ /* hard_start_xmit synchronizer */ - spinlock_t xmit_lock; + spinlock_t xmit_lock ____cacheline_aligned_in_smp; /* cpu id of processor entered to hard_start_xmit or -1, if nobody entered there. */ int xmit_lock_owner; - /* device queue lock */ - spinlock_t queue_lock; + void *priv; /* pointer to private data */ + int (*hard_start_xmit) (struct sk_buff *skb, + struct net_device *dev); + /* These may be needed for future network-power-down code. */ + unsigned long trans_start; /* Time (in jiffies) of last Tx */ + + int watchdog_timeo; /* used by dev_watchdog() */ + struct timer_list watchdog_timer; + +/* + * refcnt is a very hot point, so align it on SMP + */ /* Number of references to this device */ - atomic_t refcnt; + atomic_t refcnt ____cacheline_aligned_in_smp; + /* delayed register/unregister */ struct list_head todo_list; - /* device name hash chain */ - struct hlist_node name_hlist; /* device index hash chain */ struct hlist_node index_hlist; @@ -396,21 +436,6 @@ struct net_device NETREG_RELEASED, /* called free_netdev */ } reg_state; - /* Net device features */ - unsigned long features; -#define NETIF_F_SG 1 /* Scatter/gather IO. */ -#define NETIF_F_IP_CSUM 2 /* Can checksum only TCP/UDP over IPv4. */ -#define NETIF_F_NO_CSUM 4 /* Does not require checksum. F.e. loopack. */ -#define NETIF_F_HW_CSUM 8 /* Can checksum all the packets. */ -#define NETIF_F_HIGHDMA 32 /* Can DMA to high memory. */ -#define NETIF_F_FRAGLIST 64 /* Scatter/gather IO. */ -#define NETIF_F_HW_VLAN_TX 128 /* Transmit VLAN hw acceleration */ -#define NETIF_F_HW_VLAN_RX 256 /* Receive VLAN hw acceleration */ -#define NETIF_F_HW_VLAN_FILTER 512 /* Receive filtering on VLAN */ -#define NETIF_F_VLAN_CHALLENGED 1024 /* Device cannot handle VLAN packets */ -#define NETIF_F_TSO 2048 /* Can offload TCP/IP segmentation */ -#define NETIF_F_LLTX 4096 /* LockLess TX */ - /* Called after device is detached from network. */ void (*uninit)(struct net_device *dev); /* Called after last user reference disappears. */ @@ -419,10 +444,7 @@ struct net_device /* Pointers to interface service routines. */ int (*open)(struct net_device *dev); int (*stop)(struct net_device *dev); - int (*hard_start_xmit) (struct sk_buff *skb, - struct net_device *dev); #define HAVE_NETDEV_POLL - int (*poll) (struct net_device *dev, int *quota); int (*hard_header) (struct sk_buff *skb, struct net_device *dev, unsigned short type, @@ -852,11 +874,9 @@ static inline void netif_rx_complete(struct net_device *dev) static inline void netif_poll_disable(struct net_device *dev) { - while (test_and_set_bit(__LINK_STATE_RX_SCHED, &dev->state)) { + while (test_and_set_bit(__LINK_STATE_RX_SCHED, &dev->state)) /* No hurry. */ - current->state = TASK_INTERRUPTIBLE; - schedule_timeout(1); - } + schedule_timeout_interruptible(1); } static inline void netif_poll_enable(struct net_device *dev) @@ -907,6 +927,13 @@ extern int netdev_max_backlog; extern int weight_p; extern int netdev_set_master(struct net_device *dev, struct net_device *master); extern int skb_checksum_help(struct sk_buff *skb, int inward); +#ifdef CONFIG_BUG +extern void netdev_rx_csum_fault(struct net_device *dev); +#else +static inline void netdev_rx_csum_fault(struct net_device *dev) +{ +} +#endif /* rx skb timestamps */ extern void net_enable_timestamp(void); extern void net_disable_timestamp(void); diff --git a/include/linux/netfilter/nf_conntrack_common.h b/include/linux/netfilter/nf_conntrack_common.h new file mode 100644 index 000000000000..6d39b518486b --- /dev/null +++ b/include/linux/netfilter/nf_conntrack_common.h @@ -0,0 +1,159 @@ +#ifndef _NF_CONNTRACK_COMMON_H +#define _NF_CONNTRACK_COMMON_H +/* Connection state tracking for netfilter. This is separated from, + but required by, the NAT layer; it can also be used by an iptables + extension. */ +enum ip_conntrack_info +{ + /* Part of an established connection (either direction). */ + IP_CT_ESTABLISHED, + + /* Like NEW, but related to an existing connection, or ICMP error + (in either direction). */ + IP_CT_RELATED, + + /* Started a new connection to track (only + IP_CT_DIR_ORIGINAL); may be a retransmission. */ + IP_CT_NEW, + + /* >= this indicates reply direction */ + IP_CT_IS_REPLY, + + /* Number of distinct IP_CT types (no NEW in reply dirn). */ + IP_CT_NUMBER = IP_CT_IS_REPLY * 2 - 1 +}; + +/* Bitset representing status of connection. */ +enum ip_conntrack_status { + /* It's an expected connection: bit 0 set. This bit never changed */ + IPS_EXPECTED_BIT = 0, + IPS_EXPECTED = (1 << IPS_EXPECTED_BIT), + + /* We've seen packets both ways: bit 1 set. Can be set, not unset. */ + IPS_SEEN_REPLY_BIT = 1, + IPS_SEEN_REPLY = (1 << IPS_SEEN_REPLY_BIT), + + /* Conntrack should never be early-expired. */ + IPS_ASSURED_BIT = 2, + IPS_ASSURED = (1 << IPS_ASSURED_BIT), + + /* Connection is confirmed: originating packet has left box */ + IPS_CONFIRMED_BIT = 3, + IPS_CONFIRMED = (1 << IPS_CONFIRMED_BIT), + + /* Connection needs src nat in orig dir. This bit never changed. */ + IPS_SRC_NAT_BIT = 4, + IPS_SRC_NAT = (1 << IPS_SRC_NAT_BIT), + + /* Connection needs dst nat in orig dir. This bit never changed. */ + IPS_DST_NAT_BIT = 5, + IPS_DST_NAT = (1 << IPS_DST_NAT_BIT), + + /* Both together. */ + IPS_NAT_MASK = (IPS_DST_NAT | IPS_SRC_NAT), + + /* Connection needs TCP sequence adjusted. */ + IPS_SEQ_ADJUST_BIT = 6, + IPS_SEQ_ADJUST = (1 << IPS_SEQ_ADJUST_BIT), + + /* NAT initialization bits. */ + IPS_SRC_NAT_DONE_BIT = 7, + IPS_SRC_NAT_DONE = (1 << IPS_SRC_NAT_DONE_BIT), + + IPS_DST_NAT_DONE_BIT = 8, + IPS_DST_NAT_DONE = (1 << IPS_DST_NAT_DONE_BIT), + + /* Both together */ + IPS_NAT_DONE_MASK = (IPS_DST_NAT_DONE | IPS_SRC_NAT_DONE), + + /* Connection is dying (removed from lists), can not be unset. */ + IPS_DYING_BIT = 9, + IPS_DYING = (1 << IPS_DYING_BIT), +}; + +/* Connection tracking event bits */ +enum ip_conntrack_events +{ + /* New conntrack */ + IPCT_NEW_BIT = 0, + IPCT_NEW = (1 << IPCT_NEW_BIT), + + /* Expected connection */ + IPCT_RELATED_BIT = 1, + IPCT_RELATED = (1 << IPCT_RELATED_BIT), + + /* Destroyed conntrack */ + IPCT_DESTROY_BIT = 2, + IPCT_DESTROY = (1 << IPCT_DESTROY_BIT), + + /* Timer has been refreshed */ + IPCT_REFRESH_BIT = 3, + IPCT_REFRESH = (1 << IPCT_REFRESH_BIT), + + /* Status has changed */ + IPCT_STATUS_BIT = 4, + IPCT_STATUS = (1 << IPCT_STATUS_BIT), + + /* Update of protocol info */ + IPCT_PROTOINFO_BIT = 5, + IPCT_PROTOINFO = (1 << IPCT_PROTOINFO_BIT), + + /* Volatile protocol info */ + IPCT_PROTOINFO_VOLATILE_BIT = 6, + IPCT_PROTOINFO_VOLATILE = (1 << IPCT_PROTOINFO_VOLATILE_BIT), + + /* New helper for conntrack */ + IPCT_HELPER_BIT = 7, + IPCT_HELPER = (1 << IPCT_HELPER_BIT), + + /* Update of helper info */ + IPCT_HELPINFO_BIT = 8, + IPCT_HELPINFO = (1 << IPCT_HELPINFO_BIT), + + /* Volatile helper info */ + IPCT_HELPINFO_VOLATILE_BIT = 9, + IPCT_HELPINFO_VOLATILE = (1 << IPCT_HELPINFO_VOLATILE_BIT), + + /* NAT info */ + IPCT_NATINFO_BIT = 10, + IPCT_NATINFO = (1 << IPCT_NATINFO_BIT), + + /* Counter highest bit has been set */ + IPCT_COUNTER_FILLING_BIT = 11, + IPCT_COUNTER_FILLING = (1 << IPCT_COUNTER_FILLING_BIT), +}; + +enum ip_conntrack_expect_events { + IPEXP_NEW_BIT = 0, + IPEXP_NEW = (1 << IPEXP_NEW_BIT), +}; + +#ifdef __KERNEL__ +struct ip_conntrack_counter +{ + u_int32_t packets; + u_int32_t bytes; +}; + +struct ip_conntrack_stat +{ + unsigned int searched; + unsigned int found; + unsigned int new; + unsigned int invalid; + unsigned int ignore; + unsigned int delete; + unsigned int delete_list; + unsigned int insert; + unsigned int insert_failed; + unsigned int drop; + unsigned int early_drop; + unsigned int error; + unsigned int expect_new; + unsigned int expect_create; + unsigned int expect_delete; +}; + +#endif /* __KERNEL__ */ + +#endif /* _NF_CONNTRACK_COMMON_H */ diff --git a/include/linux/netfilter/nf_conntrack_ftp.h b/include/linux/netfilter/nf_conntrack_ftp.h new file mode 100644 index 000000000000..ad4a41c9ce93 --- /dev/null +++ b/include/linux/netfilter/nf_conntrack_ftp.h @@ -0,0 +1,44 @@ +#ifndef _NF_CONNTRACK_FTP_H +#define _NF_CONNTRACK_FTP_H +/* FTP tracking. */ + +/* This enum is exposed to userspace */ +enum ip_ct_ftp_type +{ + /* PORT command from client */ + IP_CT_FTP_PORT, + /* PASV response from server */ + IP_CT_FTP_PASV, + /* EPRT command from client */ + IP_CT_FTP_EPRT, + /* EPSV response from server */ + IP_CT_FTP_EPSV, +}; + +#ifdef __KERNEL__ + +#define FTP_PORT 21 + +#define NUM_SEQ_TO_REMEMBER 2 +/* This structure exists only once per master */ +struct ip_ct_ftp_master { + /* Valid seq positions for cmd matching after newline */ + u_int32_t seq_aft_nl[IP_CT_DIR_MAX][NUM_SEQ_TO_REMEMBER]; + /* 0 means seq_match_aft_nl not set */ + int seq_aft_nl_num[IP_CT_DIR_MAX]; +}; + +struct ip_conntrack_expect; + +/* For NAT to hook in when we find a packet which describes what other + * connection we should expect. */ +extern unsigned int (*ip_nat_ftp_hook)(struct sk_buff **pskb, + enum ip_conntrack_info ctinfo, + enum ip_ct_ftp_type type, + unsigned int matchoff, + unsigned int matchlen, + struct ip_conntrack_expect *exp, + u32 *seq); +#endif /* __KERNEL__ */ + +#endif /* _NF_CONNTRACK_FTP_H */ diff --git a/include/linux/netfilter/nf_conntrack_sctp.h b/include/linux/netfilter/nf_conntrack_sctp.h new file mode 100644 index 000000000000..b8994d9fd1a9 --- /dev/null +++ b/include/linux/netfilter/nf_conntrack_sctp.h @@ -0,0 +1,27 @@ +#ifndef _NF_CONNTRACK_SCTP_H +#define _NF_CONNTRACK_SCTP_H +/* SCTP tracking. */ + +#include <linux/netfilter/nf_conntrack_tuple_common.h> + +enum sctp_conntrack { + SCTP_CONNTRACK_NONE, + SCTP_CONNTRACK_CLOSED, + SCTP_CONNTRACK_COOKIE_WAIT, + SCTP_CONNTRACK_COOKIE_ECHOED, + SCTP_CONNTRACK_ESTABLISHED, + SCTP_CONNTRACK_SHUTDOWN_SENT, + SCTP_CONNTRACK_SHUTDOWN_RECD, + SCTP_CONNTRACK_SHUTDOWN_ACK_SENT, + SCTP_CONNTRACK_MAX +}; + +struct ip_ct_sctp +{ + enum sctp_conntrack state; + + u_int32_t vtag[IP_CT_DIR_MAX]; + u_int32_t ttag[IP_CT_DIR_MAX]; +}; + +#endif /* _NF_CONNTRACK_SCTP_H */ diff --git a/include/linux/netfilter/nf_conntrack_tcp.h b/include/linux/netfilter/nf_conntrack_tcp.h new file mode 100644 index 000000000000..b2feeffde384 --- /dev/null +++ b/include/linux/netfilter/nf_conntrack_tcp.h @@ -0,0 +1,56 @@ +#ifndef _NF_CONNTRACK_TCP_H +#define _NF_CONNTRACK_TCP_H +/* TCP tracking. */ + +/* This is exposed to userspace (ctnetlink) */ +enum tcp_conntrack { + TCP_CONNTRACK_NONE, + TCP_CONNTRACK_SYN_SENT, + TCP_CONNTRACK_SYN_RECV, + TCP_CONNTRACK_ESTABLISHED, + TCP_CONNTRACK_FIN_WAIT, + TCP_CONNTRACK_CLOSE_WAIT, + TCP_CONNTRACK_LAST_ACK, + TCP_CONNTRACK_TIME_WAIT, + TCP_CONNTRACK_CLOSE, + TCP_CONNTRACK_LISTEN, + TCP_CONNTRACK_MAX, + TCP_CONNTRACK_IGNORE +}; + +/* Window scaling is advertised by the sender */ +#define IP_CT_TCP_FLAG_WINDOW_SCALE 0x01 + +/* SACK is permitted by the sender */ +#define IP_CT_TCP_FLAG_SACK_PERM 0x02 + +/* This sender sent FIN first */ +#define IP_CT_TCP_FLAG_CLOSE_INIT 0x03 + +#ifdef __KERNEL__ + +struct ip_ct_tcp_state { + u_int32_t td_end; /* max of seq + len */ + u_int32_t td_maxend; /* max of ack + max(win, 1) */ + u_int32_t td_maxwin; /* max(win) */ + u_int8_t td_scale; /* window scale factor */ + u_int8_t loose; /* used when connection picked up from the middle */ + u_int8_t flags; /* per direction options */ +}; + +struct ip_ct_tcp +{ + struct ip_ct_tcp_state seen[2]; /* connection parameters per direction */ + u_int8_t state; /* state of the connection (enum tcp_conntrack) */ + /* For detecting stale connections */ + u_int8_t last_dir; /* Direction of the last packet (enum ip_conntrack_dir) */ + u_int8_t retrans; /* Number of retransmitted packets */ + u_int8_t last_index; /* Index of the last packet */ + u_int32_t last_seq; /* Last sequence number seen in dir */ + u_int32_t last_ack; /* Last sequence number seen in opposite dir */ + u_int32_t last_end; /* Last seq + len */ +}; + +#endif /* __KERNEL__ */ + +#endif /* _NF_CONNTRACK_TCP_H */ diff --git a/include/linux/netfilter/nf_conntrack_tuple_common.h b/include/linux/netfilter/nf_conntrack_tuple_common.h new file mode 100644 index 000000000000..8e145f0d61cb --- /dev/null +++ b/include/linux/netfilter/nf_conntrack_tuple_common.h @@ -0,0 +1,13 @@ +#ifndef _NF_CONNTRACK_TUPLE_COMMON_H +#define _NF_CONNTRACK_TUPLE_COMMON_H + +enum ip_conntrack_dir +{ + IP_CT_DIR_ORIGINAL, + IP_CT_DIR_REPLY, + IP_CT_DIR_MAX +}; + +#define CTINFO2DIR(ctinfo) ((ctinfo) >= IP_CT_IS_REPLY ? IP_CT_DIR_REPLY : IP_CT_DIR_ORIGINAL) + +#endif /* _NF_CONNTRACK_TUPLE_COMMON_H */ diff --git a/include/linux/netfilter/nfnetlink.h b/include/linux/netfilter/nfnetlink.h index 1d5b10ae2399..934a2479f160 100644 --- a/include/linux/netfilter/nfnetlink.h +++ b/include/linux/netfilter/nfnetlink.h @@ -41,11 +41,15 @@ enum nfnetlink_groups { struct nfattr { u_int16_t nfa_len; - u_int16_t nfa_type; + u_int16_t nfa_type; /* we use 15 bits for the type, and the highest + * bit to indicate whether the payload is nested */ } __attribute__ ((packed)); -/* FIXME: Shamelessly copy and pasted from rtnetlink.h, it's time - * to put this in a generic file */ +/* FIXME: Apart from NFNL_NFA_NESTED shamelessly copy and pasted from + * rtnetlink.h, it's time to put this in a generic file */ + +#define NFNL_NFA_NEST 0x8000 +#define NFA_TYPE(attr) ((attr)->nfa_type & 0x7fff) #define NFA_ALIGNTO 4 #define NFA_ALIGN(len) (((len) + NFA_ALIGNTO - 1) & ~(NFA_ALIGNTO - 1)) @@ -59,7 +63,7 @@ struct nfattr #define NFA_PAYLOAD(nfa) ((int)((nfa)->nfa_len) - NFA_LENGTH(0)) #define NFA_NEST(skb, type) \ ({ struct nfattr *__start = (struct nfattr *) (skb)->tail; \ - NFA_PUT(skb, type, 0, NULL); \ + NFA_PUT(skb, (NFNL_NFA_NEST | type), 0, NULL); \ __start; }) #define NFA_NEST_END(skb, start) \ ({ (start)->nfa_len = ((skb)->tail - (unsigned char *) (start)); \ @@ -108,7 +112,6 @@ struct nfnl_callback { int (*call)(struct sock *nl, struct sk_buff *skb, struct nlmsghdr *nlh, struct nfattr *cda[], int *errp); - kernel_cap_t cap_required; /* capabilities required for this msg */ u_int16_t attr_count; /* number of nfattr's */ }; @@ -142,7 +145,7 @@ extern void nfnl_unlock(void); extern int nfnetlink_subsys_register(struct nfnetlink_subsystem *n); extern int nfnetlink_subsys_unregister(struct nfnetlink_subsystem *n); -extern int nfattr_parse(struct nfattr *tb[], int maxattr, +extern void nfattr_parse(struct nfattr *tb[], int maxattr, struct nfattr *nfa, int len); #define nfattr_parse_nested(tb, max, nfa) \ @@ -150,11 +153,14 @@ extern int nfattr_parse(struct nfattr *tb[], int maxattr, #define nfattr_bad_size(tb, max, cta_min) \ ({ int __i, __res = 0; \ - for (__i=0; __i<max; __i++) \ + for (__i=0; __i<max; __i++) { \ + if (!cta_min[__i]) \ + continue; \ if (tb[__i] && NFA_PAYLOAD(tb[__i]) < cta_min[__i]){ \ __res = 1; \ break; \ } \ + } \ __res; \ }) diff --git a/include/linux/netfilter/nfnetlink_conntrack.h b/include/linux/netfilter/nfnetlink_conntrack.h index 5c55751c78e4..116fcaced909 100644 --- a/include/linux/netfilter/nfnetlink_conntrack.h +++ b/include/linux/netfilter/nfnetlink_conntrack.h @@ -70,15 +70,24 @@ enum ctattr_l4proto { enum ctattr_protoinfo { CTA_PROTOINFO_UNSPEC, - CTA_PROTOINFO_TCP_STATE, + CTA_PROTOINFO_TCP, __CTA_PROTOINFO_MAX }; #define CTA_PROTOINFO_MAX (__CTA_PROTOINFO_MAX - 1) +enum ctattr_protoinfo_tcp { + CTA_PROTOINFO_TCP_UNSPEC, + CTA_PROTOINFO_TCP_STATE, + __CTA_PROTOINFO_TCP_MAX +}; +#define CTA_PROTOINFO_TCP_MAX (__CTA_PROTOINFO_TCP_MAX - 1) + enum ctattr_counters { CTA_COUNTERS_UNSPEC, - CTA_COUNTERS_PACKETS, - CTA_COUNTERS_BYTES, + CTA_COUNTERS_PACKETS, /* old 64bit counters */ + CTA_COUNTERS_BYTES, /* old 64bit counters */ + CTA_COUNTERS32_PACKETS, + CTA_COUNTERS32_BYTES, __CTA_COUNTERS_MAX }; #define CTA_COUNTERS_MAX (__CTA_COUNTERS_MAX - 1) diff --git a/include/linux/netfilter_arp/arp_tables.h b/include/linux/netfilter_arp/arp_tables.h index d759a637bded..e98a870a20be 100644 --- a/include/linux/netfilter_arp/arp_tables.h +++ b/include/linux/netfilter_arp/arp_tables.h @@ -68,7 +68,8 @@ struct arpt_entry_target u_int16_t target_size; /* Used by userspace */ - char name[ARPT_FUNCTION_MAXNAMELEN]; + char name[ARPT_FUNCTION_MAXNAMELEN-1]; + u_int8_t revision; } user; struct { u_int16_t target_size; @@ -148,7 +149,9 @@ struct arpt_entry #define ARPT_SO_GET_INFO (ARPT_BASE_CTL) #define ARPT_SO_GET_ENTRIES (ARPT_BASE_CTL + 1) -#define ARPT_SO_GET_MAX ARPT_SO_GET_ENTRIES +/* #define ARPT_SO_GET_REVISION_MATCH (ARPT_BASE_CTL + 2)*/ +#define ARPT_SO_GET_REVISION_TARGET (ARPT_BASE_CTL + 3) +#define ARPT_SO_GET_MAX ARPT_SO_GET_REVISION_TARGET /* CONTINUE verdict for targets */ #define ARPT_CONTINUE 0xFFFFFFFF @@ -236,6 +239,15 @@ struct arpt_get_entries struct arpt_entry entrytable[0]; }; +/* The argument to ARPT_SO_GET_REVISION_*. Returns highest revision + * kernel supports, if >= revision. */ +struct arpt_get_revision +{ + char name[ARPT_FUNCTION_MAXNAMELEN-1]; + + u_int8_t revision; +}; + /* Standard return verdict, or do jump. */ #define ARPT_STANDARD_TARGET "" /* Error verdict. */ @@ -274,7 +286,9 @@ struct arpt_target { struct list_head list; - const char name[ARPT_FUNCTION_MAXNAMELEN]; + const char name[ARPT_FUNCTION_MAXNAMELEN-1]; + + u_int8_t revision; /* Returns verdict. */ unsigned int (*target)(struct sk_buff **pskb, diff --git a/include/linux/netfilter_ipv4/ip_conntrack.h b/include/linux/netfilter_ipv4/ip_conntrack.h index bace72a76cc4..b3432ab59a17 100644 --- a/include/linux/netfilter_ipv4/ip_conntrack.h +++ b/include/linux/netfilter_ipv4/ip_conntrack.h @@ -1,128 +1,7 @@ #ifndef _IP_CONNTRACK_H #define _IP_CONNTRACK_H -/* Connection state tracking for netfilter. This is separated from, - but required by, the NAT layer; it can also be used by an iptables - extension. */ -enum ip_conntrack_info -{ - /* Part of an established connection (either direction). */ - IP_CT_ESTABLISHED, - - /* Like NEW, but related to an existing connection, or ICMP error - (in either direction). */ - IP_CT_RELATED, - - /* Started a new connection to track (only - IP_CT_DIR_ORIGINAL); may be a retransmission. */ - IP_CT_NEW, - - /* >= this indicates reply direction */ - IP_CT_IS_REPLY, - - /* Number of distinct IP_CT types (no NEW in reply dirn). */ - IP_CT_NUMBER = IP_CT_IS_REPLY * 2 - 1 -}; - -/* Bitset representing status of connection. */ -enum ip_conntrack_status { - /* It's an expected connection: bit 0 set. This bit never changed */ - IPS_EXPECTED_BIT = 0, - IPS_EXPECTED = (1 << IPS_EXPECTED_BIT), - - /* We've seen packets both ways: bit 1 set. Can be set, not unset. */ - IPS_SEEN_REPLY_BIT = 1, - IPS_SEEN_REPLY = (1 << IPS_SEEN_REPLY_BIT), - - /* Conntrack should never be early-expired. */ - IPS_ASSURED_BIT = 2, - IPS_ASSURED = (1 << IPS_ASSURED_BIT), - - /* Connection is confirmed: originating packet has left box */ - IPS_CONFIRMED_BIT = 3, - IPS_CONFIRMED = (1 << IPS_CONFIRMED_BIT), - - /* Connection needs src nat in orig dir. This bit never changed. */ - IPS_SRC_NAT_BIT = 4, - IPS_SRC_NAT = (1 << IPS_SRC_NAT_BIT), - - /* Connection needs dst nat in orig dir. This bit never changed. */ - IPS_DST_NAT_BIT = 5, - IPS_DST_NAT = (1 << IPS_DST_NAT_BIT), - - /* Both together. */ - IPS_NAT_MASK = (IPS_DST_NAT | IPS_SRC_NAT), - - /* Connection needs TCP sequence adjusted. */ - IPS_SEQ_ADJUST_BIT = 6, - IPS_SEQ_ADJUST = (1 << IPS_SEQ_ADJUST_BIT), - - /* NAT initialization bits. */ - IPS_SRC_NAT_DONE_BIT = 7, - IPS_SRC_NAT_DONE = (1 << IPS_SRC_NAT_DONE_BIT), - - IPS_DST_NAT_DONE_BIT = 8, - IPS_DST_NAT_DONE = (1 << IPS_DST_NAT_DONE_BIT), - - /* Both together */ - IPS_NAT_DONE_MASK = (IPS_DST_NAT_DONE | IPS_SRC_NAT_DONE), - - /* Connection is dying (removed from lists), can not be unset. */ - IPS_DYING_BIT = 9, - IPS_DYING = (1 << IPS_DYING_BIT), -}; - -/* Connection tracking event bits */ -enum ip_conntrack_events -{ - /* New conntrack */ - IPCT_NEW_BIT = 0, - IPCT_NEW = (1 << IPCT_NEW_BIT), - - /* Expected connection */ - IPCT_RELATED_BIT = 1, - IPCT_RELATED = (1 << IPCT_RELATED_BIT), - /* Destroyed conntrack */ - IPCT_DESTROY_BIT = 2, - IPCT_DESTROY = (1 << IPCT_DESTROY_BIT), - - /* Timer has been refreshed */ - IPCT_REFRESH_BIT = 3, - IPCT_REFRESH = (1 << IPCT_REFRESH_BIT), - - /* Status has changed */ - IPCT_STATUS_BIT = 4, - IPCT_STATUS = (1 << IPCT_STATUS_BIT), - - /* Update of protocol info */ - IPCT_PROTOINFO_BIT = 5, - IPCT_PROTOINFO = (1 << IPCT_PROTOINFO_BIT), - - /* Volatile protocol info */ - IPCT_PROTOINFO_VOLATILE_BIT = 6, - IPCT_PROTOINFO_VOLATILE = (1 << IPCT_PROTOINFO_VOLATILE_BIT), - - /* New helper for conntrack */ - IPCT_HELPER_BIT = 7, - IPCT_HELPER = (1 << IPCT_HELPER_BIT), - - /* Update of helper info */ - IPCT_HELPINFO_BIT = 8, - IPCT_HELPINFO = (1 << IPCT_HELPINFO_BIT), - - /* Volatile helper info */ - IPCT_HELPINFO_VOLATILE_BIT = 9, - IPCT_HELPINFO_VOLATILE = (1 << IPCT_HELPINFO_VOLATILE_BIT), - - /* NAT info */ - IPCT_NATINFO_BIT = 10, - IPCT_NATINFO = (1 << IPCT_NATINFO_BIT), -}; - -enum ip_conntrack_expect_events { - IPEXP_NEW_BIT = 0, - IPEXP_NEW = (1 << IPEXP_NEW_BIT), -}; +#include <linux/netfilter/nf_conntrack_common.h> #ifdef __KERNEL__ #include <linux/config.h> @@ -190,12 +69,6 @@ do { \ #define IP_NF_ASSERT(x) #endif -struct ip_conntrack_counter -{ - u_int64_t packets; - u_int64_t bytes; -}; - struct ip_conntrack_helper; struct ip_conntrack @@ -332,11 +205,28 @@ extern void need_ip_conntrack(void); extern int invert_tuplepr(struct ip_conntrack_tuple *inverse, const struct ip_conntrack_tuple *orig); +extern void __ip_ct_refresh_acct(struct ip_conntrack *ct, + enum ip_conntrack_info ctinfo, + const struct sk_buff *skb, + unsigned long extra_jiffies, + int do_acct); + +/* Refresh conntrack for this many jiffies and do accounting */ +static inline void ip_ct_refresh_acct(struct ip_conntrack *ct, + enum ip_conntrack_info ctinfo, + const struct sk_buff *skb, + unsigned long extra_jiffies) +{ + __ip_ct_refresh_acct(ct, ctinfo, skb, extra_jiffies, 1); +} + /* Refresh conntrack for this many jiffies */ -extern void ip_ct_refresh_acct(struct ip_conntrack *ct, - enum ip_conntrack_info ctinfo, - const struct sk_buff *skb, - unsigned long extra_jiffies); +static inline void ip_ct_refresh(struct ip_conntrack *ct, + const struct sk_buff *skb, + unsigned long extra_jiffies) +{ + __ip_ct_refresh_acct(ct, 0, skb, extra_jiffies, 0); +} /* These are for NAT. Icky. */ /* Update TCP window tracking data when NAT mangles the packet */ @@ -405,25 +295,6 @@ static inline int is_dying(struct ip_conntrack *ct) extern unsigned int ip_conntrack_htable_size; -struct ip_conntrack_stat -{ - unsigned int searched; - unsigned int found; - unsigned int new; - unsigned int invalid; - unsigned int ignore; - unsigned int delete; - unsigned int delete_list; - unsigned int insert; - unsigned int insert_failed; - unsigned int drop; - unsigned int early_drop; - unsigned int error; - unsigned int expect_new; - unsigned int expect_create; - unsigned int expect_delete; -}; - #define CONNTRACK_STAT_INC(count) (__get_cpu_var(ip_conntrack_stat).count++) #ifdef CONFIG_IP_NF_CONNTRACK_EVENTS diff --git a/include/linux/netfilter_ipv4/ip_conntrack_ftp.h b/include/linux/netfilter_ipv4/ip_conntrack_ftp.h index 5f06429b9047..63811934de4d 100644 --- a/include/linux/netfilter_ipv4/ip_conntrack_ftp.h +++ b/include/linux/netfilter_ipv4/ip_conntrack_ftp.h @@ -1,43 +1,6 @@ #ifndef _IP_CONNTRACK_FTP_H #define _IP_CONNTRACK_FTP_H -/* FTP tracking. */ -#ifdef __KERNEL__ +#include <linux/netfilter/nf_conntrack_ftp.h> -#define FTP_PORT 21 - -#endif /* __KERNEL__ */ - -enum ip_ct_ftp_type -{ - /* PORT command from client */ - IP_CT_FTP_PORT, - /* PASV response from server */ - IP_CT_FTP_PASV, - /* EPRT command from client */ - IP_CT_FTP_EPRT, - /* EPSV response from server */ - IP_CT_FTP_EPSV, -}; - -#define NUM_SEQ_TO_REMEMBER 2 -/* This structure exists only once per master */ -struct ip_ct_ftp_master { - /* Valid seq positions for cmd matching after newline */ - u_int32_t seq_aft_nl[IP_CT_DIR_MAX][NUM_SEQ_TO_REMEMBER]; - /* 0 means seq_match_aft_nl not set */ - int seq_aft_nl_num[IP_CT_DIR_MAX]; -}; - -struct ip_conntrack_expect; - -/* For NAT to hook in when we find a packet which describes what other - * connection we should expect. */ -extern unsigned int (*ip_nat_ftp_hook)(struct sk_buff **pskb, - enum ip_conntrack_info ctinfo, - enum ip_ct_ftp_type type, - unsigned int matchoff, - unsigned int matchlen, - struct ip_conntrack_expect *exp, - u32 *seq); #endif /* _IP_CONNTRACK_FTP_H */ diff --git a/include/linux/netfilter_ipv4/ip_conntrack_icmp.h b/include/linux/netfilter_ipv4/ip_conntrack_icmp.h index f1664abbe392..eed5ee3e4744 100644 --- a/include/linux/netfilter_ipv4/ip_conntrack_icmp.h +++ b/include/linux/netfilter_ipv4/ip_conntrack_icmp.h @@ -1,11 +1,6 @@ #ifndef _IP_CONNTRACK_ICMP_H #define _IP_CONNTRACK_ICMP_H -/* ICMP tracking. */ -#include <asm/atomic.h> -struct ip_ct_icmp -{ - /* Optimization: when number in == number out, forget immediately. */ - atomic_t count; -}; +#include <net/netfilter/ipv4/nf_conntrack_icmp.h> + #endif /* _IP_CONNTRACK_ICMP_H */ diff --git a/include/linux/netfilter_ipv4/ip_conntrack_pptp.h b/include/linux/netfilter_ipv4/ip_conntrack_pptp.h index 389e3851d52f..816144c75de0 100644 --- a/include/linux/netfilter_ipv4/ip_conntrack_pptp.h +++ b/include/linux/netfilter_ipv4/ip_conntrack_pptp.h @@ -60,8 +60,8 @@ struct ip_ct_pptp_expect { struct pptp_pkt_hdr { __u16 packetLength; - __u16 packetType; - __u32 magicCookie; + __be16 packetType; + __be32 magicCookie; }; /* PptpControlMessageType values */ @@ -93,7 +93,7 @@ struct pptp_pkt_hdr { #define PPTP_REMOVE_DEVICE_ERROR 6 struct PptpControlHeader { - __u16 messageType; + __be16 messageType; __u16 reserved; }; @@ -106,13 +106,13 @@ struct PptpControlHeader { #define PPTP_BEARER_CAP_DIGITAL 0x2 struct PptpStartSessionRequest { - __u16 protocolVersion; + __be16 protocolVersion; __u8 reserved1; __u8 reserved2; - __u32 framingCapability; - __u32 bearerCapability; - __u16 maxChannels; - __u16 firmwareRevision; + __be32 framingCapability; + __be32 bearerCapability; + __be16 maxChannels; + __be16 firmwareRevision; __u8 hostName[64]; __u8 vendorString[64]; }; @@ -125,13 +125,13 @@ struct PptpStartSessionRequest { #define PPTP_START_UNKNOWN_PROTOCOL 5 struct PptpStartSessionReply { - __u16 protocolVersion; + __be16 protocolVersion; __u8 resultCode; __u8 generalErrorCode; - __u32 framingCapability; - __u32 bearerCapability; - __u16 maxChannels; - __u16 firmwareRevision; + __be32 framingCapability; + __be32 bearerCapability; + __be16 maxChannels; + __be16 firmwareRevision; __u8 hostName[64]; __u8 vendorString[64]; }; @@ -155,7 +155,7 @@ struct PptpStopSessionReply { }; struct PptpEchoRequest { - __u32 identNumber; + __be32 identNumber; }; /* PptpEchoReplyResultCode */ @@ -163,7 +163,7 @@ struct PptpEchoRequest { #define PPTP_ECHO_GENERAL_ERROR 2 struct PptpEchoReply { - __u32 identNumber; + __be32 identNumber; __u8 resultCode; __u8 generalErrorCode; __u16 reserved; @@ -180,16 +180,16 @@ struct PptpEchoReply { #define PPTP_DONT_CARE_BEARER_TYPE 3 struct PptpOutCallRequest { - __u16 callID; - __u16 callSerialNumber; - __u32 minBPS; - __u32 maxBPS; - __u32 bearerType; - __u32 framingType; - __u16 packetWindow; - __u16 packetProcDelay; + __be16 callID; + __be16 callSerialNumber; + __be32 minBPS; + __be32 maxBPS; + __be32 bearerType; + __be32 framingType; + __be16 packetWindow; + __be16 packetProcDelay; __u16 reserved1; - __u16 phoneNumberLength; + __be16 phoneNumberLength; __u16 reserved2; __u8 phoneNumber[64]; __u8 subAddress[64]; @@ -205,24 +205,24 @@ struct PptpOutCallRequest { #define PPTP_OUTCALL_DONT_ACCEPT 7 struct PptpOutCallReply { - __u16 callID; - __u16 peersCallID; + __be16 callID; + __be16 peersCallID; __u8 resultCode; __u8 generalErrorCode; - __u16 causeCode; - __u32 connectSpeed; - __u16 packetWindow; - __u16 packetProcDelay; - __u32 physChannelID; + __be16 causeCode; + __be32 connectSpeed; + __be16 packetWindow; + __be16 packetProcDelay; + __be32 physChannelID; }; struct PptpInCallRequest { - __u16 callID; - __u16 callSerialNumber; - __u32 callBearerType; - __u32 physChannelID; - __u16 dialedNumberLength; - __u16 dialingNumberLength; + __be16 callID; + __be16 callSerialNumber; + __be32 callBearerType; + __be32 physChannelID; + __be16 dialedNumberLength; + __be16 dialingNumberLength; __u8 dialedNumber[64]; __u8 dialingNumber[64]; __u8 subAddress[64]; @@ -234,61 +234,54 @@ struct PptpInCallRequest { #define PPTP_INCALL_DONT_ACCEPT 3 struct PptpInCallReply { - __u16 callID; - __u16 peersCallID; + __be16 callID; + __be16 peersCallID; __u8 resultCode; __u8 generalErrorCode; - __u16 packetWindow; - __u16 packetProcDelay; + __be16 packetWindow; + __be16 packetProcDelay; __u16 reserved; }; struct PptpInCallConnected { - __u16 peersCallID; + __be16 peersCallID; __u16 reserved; - __u32 connectSpeed; - __u16 packetWindow; - __u16 packetProcDelay; - __u32 callFramingType; + __be32 connectSpeed; + __be16 packetWindow; + __be16 packetProcDelay; + __be32 callFramingType; }; struct PptpClearCallRequest { - __u16 callID; + __be16 callID; __u16 reserved; }; struct PptpCallDisconnectNotify { - __u16 callID; + __be16 callID; __u8 resultCode; __u8 generalErrorCode; - __u16 causeCode; + __be16 causeCode; __u16 reserved; __u8 callStatistics[128]; }; struct PptpWanErrorNotify { - __u16 peersCallID; + __be16 peersCallID; __u16 reserved; - __u32 crcErrors; - __u32 framingErrors; - __u32 hardwareOverRuns; - __u32 bufferOverRuns; - __u32 timeoutErrors; - __u32 alignmentErrors; + __be32 crcErrors; + __be32 framingErrors; + __be32 hardwareOverRuns; + __be32 bufferOverRuns; + __be32 timeoutErrors; + __be32 alignmentErrors; }; struct PptpSetLinkInfo { - __u16 peersCallID; + __be16 peersCallID; __u16 reserved; - __u32 sendAccm; - __u32 recvAccm; -}; - - -struct pptp_priv_data { - __u16 call_id; - __u16 mcall_id; - __u16 pcall_id; + __be32 sendAccm; + __be32 recvAccm; }; union pptp_ctrl_union { diff --git a/include/linux/netfilter_ipv4/ip_conntrack_protocol.h b/include/linux/netfilter_ipv4/ip_conntrack_protocol.h index b6b99be8632a..2c76b879e3dc 100644 --- a/include/linux/netfilter_ipv4/ip_conntrack_protocol.h +++ b/include/linux/netfilter_ipv4/ip_conntrack_protocol.h @@ -52,6 +52,9 @@ struct ip_conntrack_protocol int (*to_nfattr)(struct sk_buff *skb, struct nfattr *nfa, const struct ip_conntrack *ct); + /* convert nfnetlink attributes to protoinfo */ + int (*from_nfattr)(struct nfattr *tb[], struct ip_conntrack *ct); + int (*tuple_to_nfattr)(struct sk_buff *skb, const struct ip_conntrack_tuple *t); int (*nfattr_to_tuple)(struct nfattr *tb[], diff --git a/include/linux/netfilter_ipv4/ip_conntrack_sctp.h b/include/linux/netfilter_ipv4/ip_conntrack_sctp.h index 7a8d869321f7..4099a041a32a 100644 --- a/include/linux/netfilter_ipv4/ip_conntrack_sctp.h +++ b/include/linux/netfilter_ipv4/ip_conntrack_sctp.h @@ -1,25 +1,6 @@ #ifndef _IP_CONNTRACK_SCTP_H #define _IP_CONNTRACK_SCTP_H -/* SCTP tracking. */ -enum sctp_conntrack { - SCTP_CONNTRACK_NONE, - SCTP_CONNTRACK_CLOSED, - SCTP_CONNTRACK_COOKIE_WAIT, - SCTP_CONNTRACK_COOKIE_ECHOED, - SCTP_CONNTRACK_ESTABLISHED, - SCTP_CONNTRACK_SHUTDOWN_SENT, - SCTP_CONNTRACK_SHUTDOWN_RECD, - SCTP_CONNTRACK_SHUTDOWN_ACK_SENT, - SCTP_CONNTRACK_MAX -}; - -struct ip_ct_sctp -{ - enum sctp_conntrack state; - - u_int32_t vtag[IP_CT_DIR_MAX]; - u_int32_t ttag[IP_CT_DIR_MAX]; -}; +#include <linux/netfilter/nf_conntrack_sctp.h> #endif /* _IP_CONNTRACK_SCTP_H */ diff --git a/include/linux/netfilter_ipv4/ip_conntrack_tcp.h b/include/linux/netfilter_ipv4/ip_conntrack_tcp.h index 16da044d97a7..876b8fb17e68 100644 --- a/include/linux/netfilter_ipv4/ip_conntrack_tcp.h +++ b/include/linux/netfilter_ipv4/ip_conntrack_tcp.h @@ -1,51 +1,6 @@ #ifndef _IP_CONNTRACK_TCP_H #define _IP_CONNTRACK_TCP_H -/* TCP tracking. */ -enum tcp_conntrack { - TCP_CONNTRACK_NONE, - TCP_CONNTRACK_SYN_SENT, - TCP_CONNTRACK_SYN_RECV, - TCP_CONNTRACK_ESTABLISHED, - TCP_CONNTRACK_FIN_WAIT, - TCP_CONNTRACK_CLOSE_WAIT, - TCP_CONNTRACK_LAST_ACK, - TCP_CONNTRACK_TIME_WAIT, - TCP_CONNTRACK_CLOSE, - TCP_CONNTRACK_LISTEN, - TCP_CONNTRACK_MAX, - TCP_CONNTRACK_IGNORE -}; - -/* Window scaling is advertised by the sender */ -#define IP_CT_TCP_FLAG_WINDOW_SCALE 0x01 - -/* SACK is permitted by the sender */ -#define IP_CT_TCP_FLAG_SACK_PERM 0x02 - -/* This sender sent FIN first */ -#define IP_CT_TCP_FLAG_CLOSE_INIT 0x03 - -struct ip_ct_tcp_state { - u_int32_t td_end; /* max of seq + len */ - u_int32_t td_maxend; /* max of ack + max(win, 1) */ - u_int32_t td_maxwin; /* max(win) */ - u_int8_t td_scale; /* window scale factor */ - u_int8_t loose; /* used when connection picked up from the middle */ - u_int8_t flags; /* per direction options */ -}; - -struct ip_ct_tcp -{ - struct ip_ct_tcp_state seen[2]; /* connection parameters per direction */ - u_int8_t state; /* state of the connection (enum tcp_conntrack) */ - /* For detecting stale connections */ - u_int8_t last_dir; /* Direction of the last packet (enum ip_conntrack_dir) */ - u_int8_t retrans; /* Number of retransmitted packets */ - u_int8_t last_index; /* Index of the last packet */ - u_int32_t last_seq; /* Last sequence number seen in dir */ - u_int32_t last_ack; /* Last sequence number seen in opposite dir */ - u_int32_t last_end; /* Last seq + len */ -}; +#include <linux/netfilter/nf_conntrack_tcp.h> #endif /* _IP_CONNTRACK_TCP_H */ diff --git a/include/linux/netfilter_ipv4/ip_conntrack_tuple.h b/include/linux/netfilter_ipv4/ip_conntrack_tuple.h index 14dc0f7b6556..2fdabdb4c0ef 100644 --- a/include/linux/netfilter_ipv4/ip_conntrack_tuple.h +++ b/include/linux/netfilter_ipv4/ip_conntrack_tuple.h @@ -1,6 +1,9 @@ #ifndef _IP_CONNTRACK_TUPLE_H #define _IP_CONNTRACK_TUPLE_H +#include <linux/types.h> +#include <linux/netfilter/nf_conntrack_tuple_common.h> + /* A `tuple' is a structure containing the information to uniquely identify a connection. ie. if two packets have the same tuple, they are in the same connection; if not, they are not. @@ -17,7 +20,7 @@ union ip_conntrack_manip_proto u_int16_t all; struct { - u_int16_t port; + __be16 port; } tcp; struct { u_int16_t port; @@ -29,7 +32,7 @@ union ip_conntrack_manip_proto u_int16_t port; } sctp; struct { - u_int16_t key; /* key is 32bit, pptp only uses 16 */ + __be16 key; /* key is 32bit, pptp only uses 16 */ } gre; }; @@ -65,7 +68,7 @@ struct ip_conntrack_tuple u_int16_t port; } sctp; struct { - u_int16_t key; /* key is 32bit, + __be16 key; /* key is 32bit, * pptp only uses 16 */ } gre; } u; @@ -86,13 +89,6 @@ struct ip_conntrack_tuple (tuple)->dst.u.all = 0; \ } while (0) -enum ip_conntrack_dir -{ - IP_CT_DIR_ORIGINAL, - IP_CT_DIR_REPLY, - IP_CT_DIR_MAX -}; - #ifdef __KERNEL__ #define DUMP_TUPLE(tp) \ @@ -101,8 +97,6 @@ DEBUGP("tuple %p: %u %u.%u.%u.%u:%hu -> %u.%u.%u.%u:%hu\n", \ NIPQUAD((tp)->src.ip), ntohs((tp)->src.u.all), \ NIPQUAD((tp)->dst.ip), ntohs((tp)->dst.u.all)) -#define CTINFO2DIR(ctinfo) ((ctinfo) >= IP_CT_IS_REPLY ? IP_CT_DIR_REPLY : IP_CT_DIR_ORIGINAL) - /* If we're the first tuple, it's the original dir. */ #define DIRECTION(h) ((enum ip_conntrack_dir)(h)->tuple.dst.dir) diff --git a/include/linux/netfilter_ipv4/ip_nat.h b/include/linux/netfilter_ipv4/ip_nat.h index e201ec6e9905..41a107de17cf 100644 --- a/include/linux/netfilter_ipv4/ip_nat.h +++ b/include/linux/netfilter_ipv4/ip_nat.h @@ -58,10 +58,6 @@ extern rwlock_t ip_nat_lock; struct ip_nat_info { struct list_head bysource; - - /* Helper (NULL if none). */ - struct ip_nat_helper *helper; - struct ip_nat_seq seq[IP_CT_DIR_MAX]; }; diff --git a/include/linux/netfilter_ipv4/ip_nat_core.h b/include/linux/netfilter_ipv4/ip_nat_core.h index 3b50eb91f007..30db23f06b03 100644 --- a/include/linux/netfilter_ipv4/ip_nat_core.h +++ b/include/linux/netfilter_ipv4/ip_nat_core.h @@ -5,16 +5,14 @@ /* This header used to share core functionality between the standalone NAT module, and the compatibility layer's use of NAT for masquerading. */ -extern int ip_nat_init(void); -extern void ip_nat_cleanup(void); -extern unsigned int nat_packet(struct ip_conntrack *ct, +extern unsigned int ip_nat_packet(struct ip_conntrack *ct, enum ip_conntrack_info conntrackinfo, unsigned int hooknum, struct sk_buff **pskb); -extern int icmp_reply_translation(struct sk_buff **pskb, - struct ip_conntrack *ct, - enum ip_nat_manip_type manip, - enum ip_conntrack_dir dir); +extern int ip_nat_icmp_reply_translation(struct sk_buff **pskb, + struct ip_conntrack *ct, + enum ip_nat_manip_type manip, + enum ip_conntrack_dir dir); #endif /* _IP_NAT_CORE_H */ diff --git a/include/linux/netfilter_ipv4/ipt_sctp.h b/include/linux/netfilter_ipv4/ipt_sctp.h index e93a9ec99fc2..80b3dbacd193 100644 --- a/include/linux/netfilter_ipv4/ipt_sctp.h +++ b/include/linux/netfilter_ipv4/ipt_sctp.h @@ -7,8 +7,6 @@ #define IPT_SCTP_VALID_FLAGS 0x07 -#define ELEMCOUNT(x) (sizeof(x)/sizeof(x[0])) - struct ipt_sctp_flag_info { u_int8_t chunktype; @@ -59,21 +57,21 @@ struct ipt_sctp_info { #define SCTP_CHUNKMAP_RESET(chunkmap) \ do { \ int i; \ - for (i = 0; i < ELEMCOUNT(chunkmap); i++) \ + for (i = 0; i < ARRAY_SIZE(chunkmap); i++) \ chunkmap[i] = 0; \ } while (0) #define SCTP_CHUNKMAP_SET_ALL(chunkmap) \ do { \ int i; \ - for (i = 0; i < ELEMCOUNT(chunkmap); i++) \ + for (i = 0; i < ARRAY_SIZE(chunkmap); i++) \ chunkmap[i] = ~0; \ } while (0) #define SCTP_CHUNKMAP_COPY(destmap, srcmap) \ do { \ int i; \ - for (i = 0; i < ELEMCOUNT(chunkmap); i++) \ + for (i = 0; i < ARRAY_SIZE(chunkmap); i++) \ destmap[i] = srcmap[i]; \ } while (0) @@ -81,7 +79,7 @@ struct ipt_sctp_info { ({ \ int i; \ int flag = 1; \ - for (i = 0; i < ELEMCOUNT(chunkmap); i++) { \ + for (i = 0; i < ARRAY_SIZE(chunkmap); i++) { \ if (chunkmap[i]) { \ flag = 0; \ break; \ @@ -94,7 +92,7 @@ struct ipt_sctp_info { ({ \ int i; \ int flag = 1; \ - for (i = 0; i < ELEMCOUNT(chunkmap); i++) { \ + for (i = 0; i < ARRAY_SIZE(chunkmap); i++) { \ if (chunkmap[i] != ~0) { \ flag = 0; \ break; \ diff --git a/include/linux/netfilter_ipv6.h b/include/linux/netfilter_ipv6.h index edcc2c6eb5c7..53b2983f6278 100644 --- a/include/linux/netfilter_ipv6.h +++ b/include/linux/netfilter_ipv6.h @@ -59,6 +59,7 @@ enum nf_ip6_hook_priorities { NF_IP6_PRI_FIRST = INT_MIN, + NF_IP6_PRI_CONNTRACK_DEFRAG = -400, NF_IP6_PRI_SELINUX_FIRST = -225, NF_IP6_PRI_CONNTRACK = -200, NF_IP6_PRI_BRIDGE_SABOTAGE_FORWARD = -175, diff --git a/include/linux/netfilter_ipv6/ip6_tables.h b/include/linux/netfilter_ipv6/ip6_tables.h index 59f70b34e029..2efc046d9e94 100644 --- a/include/linux/netfilter_ipv6/ip6_tables.h +++ b/include/linux/netfilter_ipv6/ip6_tables.h @@ -57,7 +57,8 @@ struct ip6t_entry_match u_int16_t match_size; /* Used by userspace */ - char name[IP6T_FUNCTION_MAXNAMELEN]; + char name[IP6T_FUNCTION_MAXNAMELEN-1]; + u_int8_t revision; } user; struct { u_int16_t match_size; @@ -80,7 +81,8 @@ struct ip6t_entry_target u_int16_t target_size; /* Used by userspace */ - char name[IP6T_FUNCTION_MAXNAMELEN]; + char name[IP6T_FUNCTION_MAXNAMELEN-1]; + u_int8_t revision; } user; struct { u_int16_t target_size; @@ -161,7 +163,9 @@ struct ip6t_entry #define IP6T_SO_GET_INFO (IP6T_BASE_CTL) #define IP6T_SO_GET_ENTRIES (IP6T_BASE_CTL + 1) -#define IP6T_SO_GET_MAX IP6T_SO_GET_ENTRIES +#define IP6T_SO_GET_REVISION_MATCH (IP6T_BASE_CTL + 2) +#define IP6T_SO_GET_REVISION_TARGET (IP6T_BASE_CTL + 3) +#define IP6T_SO_GET_MAX IP6T_SO_GET_REVISION_TARGET /* CONTINUE verdict for targets */ #define IP6T_CONTINUE 0xFFFFFFFF @@ -291,6 +295,15 @@ struct ip6t_get_entries struct ip6t_entry entrytable[0]; }; +/* The argument to IP6T_SO_GET_REVISION_*. Returns highest revision + * kernel supports, if >= revision. */ +struct ip6t_get_revision +{ + char name[IP6T_FUNCTION_MAXNAMELEN-1]; + + u_int8_t revision; +}; + /* Standard return verdict, or do jump. */ #define IP6T_STANDARD_TARGET "" /* Error verdict. */ @@ -352,7 +365,9 @@ struct ip6t_match { struct list_head list; - const char name[IP6T_FUNCTION_MAXNAMELEN]; + const char name[IP6T_FUNCTION_MAXNAMELEN-1]; + + u_int8_t revision; /* Return true or false: return FALSE and set *hotdrop = 1 to force immediate packet drop. */ @@ -387,7 +402,9 @@ struct ip6t_target { struct list_head list; - const char name[IP6T_FUNCTION_MAXNAMELEN]; + const char name[IP6T_FUNCTION_MAXNAMELEN-1]; + + u_int8_t revision; /* Returns verdict. Argument order changed since 2.6.9, as this must now handle non-linear skbs, using skb_copy_bits and diff --git a/include/linux/netlink.h b/include/linux/netlink.h index bdebdc564506..6a2ccf78a356 100644 --- a/include/linux/netlink.h +++ b/include/linux/netlink.h @@ -71,7 +71,8 @@ struct nlmsghdr #define NLMSG_ALIGNTO 4 #define NLMSG_ALIGN(len) ( ((len)+NLMSG_ALIGNTO-1) & ~(NLMSG_ALIGNTO-1) ) -#define NLMSG_LENGTH(len) ((len)+NLMSG_ALIGN(sizeof(struct nlmsghdr))) +#define NLMSG_HDRLEN ((int) NLMSG_ALIGN(sizeof(struct nlmsghdr))) +#define NLMSG_LENGTH(len) ((len)+NLMSG_ALIGN(NLMSG_HDRLEN)) #define NLMSG_SPACE(len) NLMSG_ALIGN(NLMSG_LENGTH(len)) #define NLMSG_DATA(nlh) ((void*)(((char*)nlh) + NLMSG_LENGTH(0))) #define NLMSG_NEXT(nlh,len) ((len) -= NLMSG_ALIGN((nlh)->nlmsg_len), \ @@ -86,6 +87,8 @@ struct nlmsghdr #define NLMSG_DONE 0x3 /* End of a dump */ #define NLMSG_OVERRUN 0x4 /* Data lost */ +#define NLMSG_MIN_TYPE 0x10 /* < 0x10: reserved control messages */ + struct nlmsgerr { int error; @@ -108,6 +111,25 @@ enum { NETLINK_CONNECTED, }; +/* + * <------- NLA_HDRLEN ------> <-- NLA_ALIGN(payload)--> + * +---------------------+- - -+- - - - - - - - - -+- - -+ + * | Header | Pad | Payload | Pad | + * | (struct nlattr) | ing | | ing | + * +---------------------+- - -+- - - - - - - - - -+- - -+ + * <-------------- nlattr->nla_len --------------> + */ + +struct nlattr +{ + __u16 nla_len; + __u16 nla_type; +}; + +#define NLA_ALIGNTO 4 +#define NLA_ALIGN(len) (((len) + NLA_ALIGNTO - 1) & ~(NLA_ALIGNTO - 1)) +#define NLA_HDRLEN ((int) NLA_ALIGN(sizeof(struct nlattr))) + #ifdef __KERNEL__ #include <linux/capability.h> @@ -131,7 +153,7 @@ extern struct sock *netlink_kernel_create(int unit, unsigned int groups, void (* extern void netlink_ack(struct sk_buff *in_skb, struct nlmsghdr *nlh, int err); extern int netlink_unicast(struct sock *ssk, struct sk_buff *skb, __u32 pid, int nonblock); extern int netlink_broadcast(struct sock *ssk, struct sk_buff *skb, __u32 pid, - __u32 group, unsigned int __nocast allocation); + __u32 group, gfp_t allocation); extern void netlink_set_err(struct sock *ssk, __u32 pid, __u32 group, int code); extern int netlink_register_notifier(struct notifier_block *nb); extern int netlink_unregister_notifier(struct notifier_block *nb); diff --git a/include/linux/netpoll.h b/include/linux/netpoll.h index 5ade54a78dbb..ca5a8733000f 100644 --- a/include/linux/netpoll.h +++ b/include/linux/netpoll.h @@ -86,7 +86,7 @@ static inline void netpoll_poll_unlock(void *have) #else #define netpoll_rx(a) 0 -#define netpoll_poll_lock(a) 0 +#define netpoll_poll_lock(a) NULL #define netpoll_poll_unlock(a) #endif diff --git a/include/linux/nfs_fs.h b/include/linux/nfs_fs.h index 9a6047ff1b25..12787a9b0259 100644 --- a/include/linux/nfs_fs.h +++ b/include/linux/nfs_fs.h @@ -41,6 +41,10 @@ #define NFS_MAX_FILE_IO_BUFFER_SIZE 32768 #define NFS_DEF_FILE_IO_BUFFER_SIZE 4096 +/* Default timeout values */ +#define NFS_MAX_UDP_TIMEOUT (60*HZ) +#define NFS_MAX_TCP_TIMEOUT (600*HZ) + /* * superblock magic number for NFS */ @@ -137,6 +141,7 @@ struct nfs_inode { unsigned long attrtimeo_timestamp; __u64 change_attr; /* v4 only */ + unsigned long last_updated; /* "Generation counter" for the attribute cache. This is * bumped whenever we update the metadata on the * server. @@ -236,13 +241,17 @@ static inline int nfs_caches_unstable(struct inode *inode) return atomic_read(&NFS_I(inode)->data_updates) != 0; } +static inline void nfs_mark_for_revalidate(struct inode *inode) +{ + spin_lock(&inode->i_lock); + NFS_I(inode)->cache_validity |= NFS_INO_INVALID_ATTR | NFS_INO_INVALID_ACCESS; + spin_unlock(&inode->i_lock); +} + static inline void NFS_CACHEINV(struct inode *inode) { - if (!nfs_caches_unstable(inode)) { - spin_lock(&inode->i_lock); - NFS_I(inode)->cache_validity |= NFS_INO_INVALID_ATTR | NFS_INO_INVALID_ACCESS; - spin_unlock(&inode->i_lock); - } + if (!nfs_caches_unstable(inode)) + nfs_mark_for_revalidate(inode); } static inline int nfs_server_capable(struct inode *inode, int cap) @@ -276,7 +285,7 @@ static inline long nfs_save_change_attribute(struct inode *inode) static inline int nfs_verify_change_attribute(struct inode *inode, unsigned long chattr) { return !nfs_caches_unstable(inode) - && chattr == NFS_I(inode)->cache_change_attribute; + && time_after_eq(chattr, NFS_I(inode)->cache_change_attribute); } /* @@ -286,6 +295,7 @@ extern void nfs_zap_caches(struct inode *); extern struct inode *nfs_fhget(struct super_block *, struct nfs_fh *, struct nfs_fattr *); extern int nfs_refresh_inode(struct inode *, struct nfs_fattr *); +extern int nfs_post_op_update_inode(struct inode *inode, struct nfs_fattr *fattr); extern int nfs_getattr(struct vfsmount *, struct dentry *, struct kstat *); extern int nfs_permission(struct inode *, int, struct nameidata *); extern int nfs_access_get_cached(struct inode *, struct rpc_cred *, struct nfs_access_entry *); @@ -306,12 +316,18 @@ extern struct nfs_open_context *alloc_nfs_open_context(struct dentry *dentry, st extern struct nfs_open_context *get_nfs_open_context(struct nfs_open_context *ctx); extern void put_nfs_open_context(struct nfs_open_context *ctx); extern void nfs_file_set_open_context(struct file *filp, struct nfs_open_context *ctx); -extern struct nfs_open_context *nfs_find_open_context(struct inode *inode, int mode); +extern struct nfs_open_context *nfs_find_open_context(struct inode *inode, struct rpc_cred *cred, int mode); extern void nfs_file_clear_open_context(struct file *filp); /* linux/net/ipv4/ipconfig.c: trims ip addr off front of name, too. */ extern u32 root_nfs_parse_addr(char *name); /*__init*/ +static inline void nfs_fattr_init(struct nfs_fattr *fattr) +{ + fattr->valid = 0; + fattr->time_start = jiffies; +} + /* * linux/fs/nfs/file.c */ diff --git a/include/linux/nfs_xdr.h b/include/linux/nfs_xdr.h index a2bf6914ff1b..40718669b9c8 100644 --- a/include/linux/nfs_xdr.h +++ b/include/linux/nfs_xdr.h @@ -41,7 +41,7 @@ struct nfs_fattr { __u32 bitmap[2]; /* NFSv4 returned attribute bitmap */ __u64 change_attr; /* NFSv4 change attribute */ __u64 pre_change_attr;/* pre-op NFSv4 change attribute */ - unsigned long timestamp; + unsigned long time_start; }; #define NFS_ATTR_WCC 0x0001 /* pre-op WCC data */ @@ -96,12 +96,13 @@ struct nfs4_change_info { u64 after; }; +struct nfs_seqid; /* * Arguments to the open call. */ struct nfs_openargs { const struct nfs_fh * fh; - __u32 seqid; + struct nfs_seqid * seqid; int open_flags; __u64 clientid; __u32 id; @@ -123,6 +124,7 @@ struct nfs_openres { struct nfs4_change_info cinfo; __u32 rflags; struct nfs_fattr * f_attr; + struct nfs_fattr * dir_attr; const struct nfs_server *server; int delegation_type; nfs4_stateid delegation; @@ -136,7 +138,7 @@ struct nfs_openres { struct nfs_open_confirmargs { const struct nfs_fh * fh; nfs4_stateid stateid; - __u32 seqid; + struct nfs_seqid * seqid; }; struct nfs_open_confirmres { @@ -148,13 +150,16 @@ struct nfs_open_confirmres { */ struct nfs_closeargs { struct nfs_fh * fh; - nfs4_stateid stateid; - __u32 seqid; + nfs4_stateid * stateid; + struct nfs_seqid * seqid; int open_flags; + const u32 * bitmask; }; struct nfs_closeres { nfs4_stateid stateid; + struct nfs_fattr * fattr; + const struct nfs_server *server; }; /* * * Arguments to the lock,lockt, and locku call. @@ -164,30 +169,19 @@ struct nfs_lowner { u32 id; }; -struct nfs_open_to_lock { - __u32 open_seqid; - nfs4_stateid open_stateid; - __u32 lock_seqid; - struct nfs_lowner lock_owner; -}; - -struct nfs_exist_lock { - nfs4_stateid stateid; - __u32 seqid; -}; - struct nfs_lock_opargs { + struct nfs_seqid * lock_seqid; + nfs4_stateid * lock_stateid; + struct nfs_seqid * open_seqid; + nfs4_stateid * open_stateid; + struct nfs_lowner lock_owner; __u32 reclaim; __u32 new_lock_owner; - union { - struct nfs_open_to_lock *open_lock; - struct nfs_exist_lock *exist_lock; - } u; }; struct nfs_locku_opargs { - __u32 seqid; - nfs4_stateid stateid; + struct nfs_seqid * seqid; + nfs4_stateid * stateid; }; struct nfs_lockargs { @@ -262,6 +256,7 @@ struct nfs_writeargs { enum nfs3_stable_how stable; unsigned int pgbase; struct page ** pages; + const u32 * bitmask; }; struct nfs_writeverf { @@ -273,6 +268,7 @@ struct nfs_writeres { struct nfs_fattr * fattr; struct nfs_writeverf * verf; __u32 count; + const struct nfs_server *server; }; /* @@ -550,6 +546,7 @@ struct nfs4_create_res { struct nfs_fh * fh; struct nfs_fattr * fattr; struct nfs4_change_info dir_cinfo; + struct nfs_fattr * dir_fattr; }; struct nfs4_fsinfo_arg { @@ -571,8 +568,17 @@ struct nfs4_link_arg { const struct nfs_fh * fh; const struct nfs_fh * dir_fh; const struct qstr * name; + const u32 * bitmask; +}; + +struct nfs4_link_res { + const struct nfs_server * server; + struct nfs_fattr * fattr; + struct nfs4_change_info cinfo; + struct nfs_fattr * dir_attr; }; + struct nfs4_lookup_arg { const struct nfs_fh * dir_fh; const struct qstr * name; @@ -619,6 +625,13 @@ struct nfs4_readlink { struct nfs4_remove_arg { const struct nfs_fh * fh; const struct qstr * name; + const u32 * bitmask; +}; + +struct nfs4_remove_res { + const struct nfs_server * server; + struct nfs4_change_info cinfo; + struct nfs_fattr * dir_attr; }; struct nfs4_rename_arg { @@ -626,11 +639,15 @@ struct nfs4_rename_arg { const struct nfs_fh * new_dir; const struct qstr * old_name; const struct qstr * new_name; + const u32 * bitmask; }; struct nfs4_rename_res { + const struct nfs_server * server; struct nfs4_change_info old_cinfo; + struct nfs_fattr * old_fattr; struct nfs4_change_info new_cinfo; + struct nfs_fattr * new_fattr; }; struct nfs4_setclientid { @@ -722,7 +739,7 @@ struct nfs_rpc_ops { int (*write) (struct nfs_write_data *); int (*commit) (struct nfs_write_data *); int (*create) (struct inode *, struct dentry *, - struct iattr *, int); + struct iattr *, int, struct nameidata *); int (*remove) (struct inode *, struct qstr *); int (*unlink_setup) (struct rpc_message *, struct dentry *, struct qstr *); diff --git a/include/linux/nfsd/nfsd.h b/include/linux/nfsd/nfsd.h index 6d5a24f3fc6d..51c231a1e5a6 100644 --- a/include/linux/nfsd/nfsd.h +++ b/include/linux/nfsd/nfsd.h @@ -60,7 +60,7 @@ typedef int (*nfsd_dirop_t)(struct inode *, struct dentry *, int, int); extern struct svc_program nfsd_program; extern struct svc_version nfsd_version2, nfsd_version3, nfsd_version4; - +extern struct svc_serv *nfsd_serv; /* * Function prototypes. */ diff --git a/include/linux/nfsd/syscall.h b/include/linux/nfsd/syscall.h index e65c9db6d13f..781efbf94ed3 100644 --- a/include/linux/nfsd/syscall.h +++ b/include/linux/nfsd/syscall.h @@ -39,6 +39,21 @@ #define NFSCTL_GETFD 7 /* get an fh by path (used by mountd) */ #define NFSCTL_GETFS 8 /* get an fh by path with max FH len */ +/* + * Macros used to set version + */ +#define NFSCTL_VERSET(_cltbits, _v) ((_cltbits) |= (1 << (_v))) +#define NFSCTL_VERUNSET(_cltbits, _v) ((_cltbits) &= ~(1 << (_v))) +#define NFSCTL_VERISSET(_cltbits, _v) ((_cltbits) & (1 << (_v))) + +#if defined(CONFIG_NFSD_V4) +#define NFSCTL_VERALL (0x1c /* 0b011100 */) +#elif defined(CONFIG_NFSD_V3) +#define NFSCTL_VERALL (0x0c /* 0b001100 */) +#else +#define NFSCTL_VERALL (0x04 /* 0b000100 */) +#endif + /* SVC */ struct nfsctl_svc { unsigned short svc_port; @@ -120,6 +135,8 @@ extern int exp_delclient(struct nfsctl_client *ncp); extern int exp_export(struct nfsctl_export *nxp); extern int exp_unexport(struct nfsctl_export *nxp); +extern unsigned int nfsd_versbits; + #endif /* __KERNEL__ */ #endif /* NFSD_SYSCALL_H */ diff --git a/include/linux/nfsd/xdr3.h b/include/linux/nfsd/xdr3.h index 21e18ce7ca63..3c2a71b43bac 100644 --- a/include/linux/nfsd/xdr3.h +++ b/include/linux/nfsd/xdr3.h @@ -42,7 +42,7 @@ struct nfsd3_writeargs { __u64 offset; __u32 count; int stable; - int len; + __u32 len; struct kvec vec[RPCSVC_MAXPAGES]; int vlen; }; diff --git a/include/linux/nodemask.h b/include/linux/nodemask.h index e96fe9062500..4726ef7ba8e8 100644 --- a/include/linux/nodemask.h +++ b/include/linux/nodemask.h @@ -12,6 +12,8 @@ * see bitmap_scnprintf() and bitmap_parse() in lib/bitmap.c. * For details of nodelist_scnprintf() and nodelist_parse(), see * bitmap_scnlistprintf() and bitmap_parselist(), also in bitmap.c. + * For details of node_remap(), see bitmap_bitremap in lib/bitmap.c. + * For details of nodes_remap(), see bitmap_remap in lib/bitmap.c. * * The available nodemask operations are: * @@ -52,6 +54,8 @@ * int nodemask_parse(ubuf, ulen, mask) Parse ascii string as nodemask * int nodelist_scnprintf(buf, len, mask) Format nodemask as list for printing * int nodelist_parse(buf, map) Parse ascii string as nodelist + * int node_remap(oldbit, old, new) newbit = map(old, new)(oldbit) + * int nodes_remap(dst, src, old, new) *dst = map(old, new)(dst) * * for_each_node_mask(node, mask) for-loop node over mask * @@ -307,6 +311,22 @@ static inline int __nodelist_parse(const char *buf, nodemask_t *dstp, int nbits) return bitmap_parselist(buf, dstp->bits, nbits); } +#define node_remap(oldbit, old, new) \ + __node_remap((oldbit), &(old), &(new), MAX_NUMNODES) +static inline int __node_remap(int oldbit, + const nodemask_t *oldp, const nodemask_t *newp, int nbits) +{ + return bitmap_bitremap(oldbit, oldp->bits, newp->bits, nbits); +} + +#define nodes_remap(dst, src, old, new) \ + __nodes_remap(&(dst), &(src), &(old), &(new), MAX_NUMNODES) +static inline void __nodes_remap(nodemask_t *dstp, const nodemask_t *srcp, + const nodemask_t *oldp, const nodemask_t *newp, int nbits) +{ + bitmap_remap(dstp->bits, srcp->bits, oldp->bits, newp->bits, nbits); +} + #if MAX_NUMNODES > 1 #define for_each_node_mask(node, mask) \ for ((node) = first_node(mask); \ diff --git a/include/linux/page-flags.h b/include/linux/page-flags.h index f34767c5fc79..343083fec258 100644 --- a/include/linux/page-flags.h +++ b/include/linux/page-flags.h @@ -287,11 +287,7 @@ extern void __mod_page_state(unsigned long offset, unsigned long delta); #define ClearPageReclaim(page) clear_bit(PG_reclaim, &(page)->flags) #define TestClearPageReclaim(page) test_and_clear_bit(PG_reclaim, &(page)->flags) -#ifdef CONFIG_HUGETLB_PAGE #define PageCompound(page) test_bit(PG_compound, &(page)->flags) -#else -#define PageCompound(page) 0 -#endif #define SetPageCompound(page) set_bit(PG_compound, &(page)->flags) #define ClearPageCompound(page) clear_bit(PG_compound, &(page)->flags) diff --git a/include/linux/pagemap.h b/include/linux/pagemap.h index d9a25647a295..ee700c6eb442 100644 --- a/include/linux/pagemap.h +++ b/include/linux/pagemap.h @@ -19,18 +19,19 @@ #define AS_EIO (__GFP_BITS_SHIFT + 0) /* IO error on async write */ #define AS_ENOSPC (__GFP_BITS_SHIFT + 1) /* ENOSPC on async write */ -static inline unsigned int __nocast mapping_gfp_mask(struct address_space * mapping) +static inline gfp_t mapping_gfp_mask(struct address_space * mapping) { - return mapping->flags & __GFP_BITS_MASK; + return (__force gfp_t)mapping->flags & __GFP_BITS_MASK; } /* * This is non-atomic. Only to be used before the mapping is activated. * Probably needs a barrier... */ -static inline void mapping_set_gfp_mask(struct address_space *m, int mask) +static inline void mapping_set_gfp_mask(struct address_space *m, gfp_t mask) { - m->flags = (m->flags & ~__GFP_BITS_MASK) | mask; + m->flags = (m->flags & ~(__force unsigned long)__GFP_BITS_MASK) | + (__force unsigned long)mask; } /* @@ -52,12 +53,12 @@ void release_pages(struct page **pages, int nr, int cold); static inline struct page *page_cache_alloc(struct address_space *x) { - return alloc_pages(mapping_gfp_mask(x)|__GFP_NORECLAIM, 0); + return alloc_pages(mapping_gfp_mask(x), 0); } static inline struct page *page_cache_alloc_cold(struct address_space *x) { - return alloc_pages(mapping_gfp_mask(x)|__GFP_COLD|__GFP_NORECLAIM, 0); + return alloc_pages(mapping_gfp_mask(x)|__GFP_COLD, 0); } typedef int filler_t(void *, struct page *); @@ -69,7 +70,7 @@ extern struct page * find_lock_page(struct address_space *mapping, extern struct page * find_trylock_page(struct address_space *mapping, unsigned long index); extern struct page * find_or_create_page(struct address_space *mapping, - unsigned long index, unsigned int gfp_mask); + unsigned long index, gfp_t gfp_mask); unsigned find_get_pages(struct address_space *mapping, pgoff_t start, unsigned int nr_pages, struct page **pages); unsigned find_get_pages_tag(struct address_space *mapping, pgoff_t *index, @@ -92,9 +93,9 @@ extern int read_cache_pages(struct address_space *mapping, struct list_head *pages, filler_t *filler, void *data); int add_to_page_cache(struct page *page, struct address_space *mapping, - unsigned long index, int gfp_mask); + unsigned long index, gfp_t gfp_mask); int add_to_page_cache_lru(struct page *page, struct address_space *mapping, - unsigned long index, int gfp_mask); + unsigned long index, gfp_t gfp_mask); extern void remove_from_page_cache(struct page *page); extern void __remove_from_page_cache(struct page *page); diff --git a/include/linux/pci-acpi.h b/include/linux/pci-acpi.h index 857126a36ecc..4877e35ae202 100644 --- a/include/linux/pci-acpi.h +++ b/include/linux/pci-acpi.h @@ -47,14 +47,15 @@ OSC_PCI_EXPRESS_CAP_STRUCTURE_CONTROL) #ifdef CONFIG_ACPI -extern acpi_status pci_osc_control_set(u32 flags); +extern acpi_status pci_osc_control_set(acpi_handle handle, u32 flags); extern acpi_status pci_osc_support_set(u32 flags); #else #if !defined(acpi_status) typedef u32 acpi_status; #define AE_ERROR (acpi_status) (0x0001) #endif -static inline acpi_status pci_osc_control_set(u32 flags) {return AE_ERROR;} +static inline acpi_status pci_osc_control_set(acpi_handle handle, u32 flags) +{return AE_ERROR;} static inline acpi_status pci_osc_support_set(u32 flags) {return AE_ERROR;} #endif diff --git a/include/linux/pci.h b/include/linux/pci.h index 7349058ed778..de690ca73d58 100644 --- a/include/linux/pci.h +++ b/include/linux/pci.h @@ -132,6 +132,7 @@ struct pci_dev { unsigned int is_enabled:1; /* pci_enable_device has been called */ unsigned int is_busmaster:1; /* device is busmaster */ unsigned int no_msi:1; /* device may not use msi */ + unsigned int block_ucfg_access:1; /* userspace config space access is blocked */ u32 saved_config_space[16]; /* config space saved at suspend time */ struct bin_attribute *rom_attr; /* attribute descriptor for sysfs ROM entry */ @@ -235,7 +236,6 @@ struct module; struct pci_driver { struct list_head node; char *name; - struct module *owner; const struct pci_device_id *id_table; /* must be non-NULL for probe to be called */ int (*probe) (struct pci_dev *dev, const struct pci_device_id *id); /* New device inserted */ void (*remove) (struct pci_dev *dev); /* Device removed (NULL if not a hot-plug capable driver) */ @@ -337,6 +337,7 @@ struct pci_dev *pci_find_device (unsigned int vendor, unsigned int device, const struct pci_dev *pci_find_device_reverse (unsigned int vendor, unsigned int device, const struct pci_dev *from); struct pci_dev *pci_find_slot (unsigned int bus, unsigned int devfn); int pci_find_capability (struct pci_dev *dev, int cap); +int pci_find_next_capability (struct pci_dev *dev, u8 pos, int cap); int pci_find_ext_capability (struct pci_dev *dev, int cap); struct pci_bus * pci_find_next_bus(const struct pci_bus *from); @@ -431,8 +432,13 @@ int pci_bus_alloc_resource(struct pci_bus *bus, struct resource *res, void *alignf_data); void pci_enable_bridges(struct pci_bus *bus); -/* New-style probing supporting hot-pluggable devices */ -int pci_register_driver(struct pci_driver *); +/* Proper probing supporting hot-pluggable devices */ +int __pci_register_driver(struct pci_driver *, struct module *); +static inline int pci_register_driver(struct pci_driver *driver) +{ + return __pci_register_driver(driver, THIS_MODULE); +} + void pci_unregister_driver(struct pci_driver *); void pci_remove_behind_bridge(struct pci_dev *); struct pci_driver *pci_dev_driver(const struct pci_dev *); @@ -490,6 +496,9 @@ extern void pci_disable_msix(struct pci_dev *dev); extern void msi_remove_pci_irq_vectors(struct pci_dev *dev); #endif +extern void pci_block_user_cfg_access(struct pci_dev *dev); +extern void pci_unblock_user_cfg_access(struct pci_dev *dev); + /* * PCI domain support. Sometimes called PCI segment (eg by ACPI), * a PCI domain is defined to be a set of PCI busses which share @@ -543,9 +552,11 @@ static inline int pci_enable_device(struct pci_dev *dev) { return -EIO; } static inline void pci_disable_device(struct pci_dev *dev) { } static inline int pci_set_dma_mask(struct pci_dev *dev, u64 mask) { return -EIO; } static inline int pci_assign_resource(struct pci_dev *dev, int i) { return -EBUSY;} +static inline int __pci_register_driver(struct pci_driver *drv, struct module *owner) { return 0;} static inline int pci_register_driver(struct pci_driver *drv) { return 0;} static inline void pci_unregister_driver(struct pci_driver *drv) { } static inline int pci_find_capability (struct pci_dev *dev, int cap) {return 0; } +static inline int pci_find_next_capability (struct pci_dev *dev, u8 post, int cap) { return 0; } static inline int pci_find_ext_capability (struct pci_dev *dev, int cap) {return 0; } static inline const struct pci_device_id *pci_match_device(const struct pci_device_id *ids, const struct pci_dev *dev) { return NULL; } @@ -560,6 +571,9 @@ static inline int pci_enable_wake(struct pci_dev *dev, pci_power_t state, int en #define pci_dma_burst_advice(pdev, strat, strategy_parameter) do { } while (0) +static inline void pci_block_user_cfg_access(struct pci_dev *dev) { } +static inline void pci_unblock_user_cfg_access(struct pci_dev *dev) { } + #endif /* CONFIG_PCI */ /* Include architecture-dependent settings and functions */ diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h index c49d28eca561..1e737e269db9 100644 --- a/include/linux/pci_ids.h +++ b/include/linux/pci_ids.h @@ -96,6 +96,9 @@ #define PCI_CLASS_SERIAL_ACCESS 0x0c01 #define PCI_CLASS_SERIAL_SSA 0x0c02 #define PCI_CLASS_SERIAL_USB 0x0c03 +#define PCI_CLASS_SERIAL_USB_UHCI 0x0c0300 +#define PCI_CLASS_SERIAL_USB_OHCI 0x0c0310 +#define PCI_CLASS_SERIAL_USB_EHCI 0x0c0320 #define PCI_CLASS_SERIAL_FIBER 0x0c04 #define PCI_CLASS_SERIAL_SMBUS 0x0c05 @@ -132,9 +135,6 @@ #define PCI_VENDOR_ID_COMPAQ 0x0e11 #define PCI_DEVICE_ID_COMPAQ_TOKENRING 0x0508 -#define PCI_DEVICE_ID_COMPAQ_1280 0x3033 -#define PCI_DEVICE_ID_COMPAQ_TRIFLEX 0x4000 -#define PCI_DEVICE_ID_COMPAQ_6010 0x6010 #define PCI_DEVICE_ID_COMPAQ_TACHYON 0xa0fc #define PCI_DEVICE_ID_COMPAQ_SMART2P 0xae10 #define PCI_DEVICE_ID_COMPAQ_NETEL100 0xae32 @@ -185,6 +185,7 @@ #define PCI_DEVICE_ID_LSI_61C102 0x0901 #define PCI_DEVICE_ID_LSI_63C815 0x1000 #define PCI_DEVICE_ID_LSI_SAS1064 0x0050 +#define PCI_DEVICE_ID_LSI_SAS1064R 0x0411 #define PCI_DEVICE_ID_LSI_SAS1066 0x005E #define PCI_DEVICE_ID_LSI_SAS1068 0x0054 #define PCI_DEVICE_ID_LSI_SAS1064A 0x005C @@ -273,7 +274,6 @@ #define PCI_DEVICE_ID_ATI_RAGE128_PP 0x5050 #define PCI_DEVICE_ID_ATI_RAGE128_PQ 0x5051 #define PCI_DEVICE_ID_ATI_RAGE128_PR 0x5052 -#define PCI_DEVICE_ID_ATI_RAGE128_TR 0x5452 #define PCI_DEVICE_ID_ATI_RAGE128_PS 0x5053 #define PCI_DEVICE_ID_ATI_RAGE128_PT 0x5054 #define PCI_DEVICE_ID_ATI_RAGE128_PU 0x5055 @@ -281,8 +281,6 @@ #define PCI_DEVICE_ID_ATI_RAGE128_PW 0x5057 #define PCI_DEVICE_ID_ATI_RAGE128_PX 0x5058 /* Rage128 M4 */ -#define PCI_DEVICE_ID_ATI_RADEON_LE 0x4d45 -#define PCI_DEVICE_ID_ATI_RADEON_LF 0x4d46 /* Radeon R100 */ #define PCI_DEVICE_ID_ATI_RADEON_QD 0x5144 #define PCI_DEVICE_ID_ATI_RADEON_QE 0x5145 @@ -303,32 +301,22 @@ #define PCI_DEVICE_ID_ATI_RADEON_QW 0x5157 #define PCI_DEVICE_ID_ATI_RADEON_QX 0x5158 /* Radeon NV-100 */ -#define PCI_DEVICE_ID_ATI_RADEON_N1 0x5159 -#define PCI_DEVICE_ID_ATI_RADEON_N2 0x515a /* Radeon RV250 (9000) */ #define PCI_DEVICE_ID_ATI_RADEON_Id 0x4964 #define PCI_DEVICE_ID_ATI_RADEON_Ie 0x4965 #define PCI_DEVICE_ID_ATI_RADEON_If 0x4966 #define PCI_DEVICE_ID_ATI_RADEON_Ig 0x4967 /* Radeon RV280 (9200) */ -#define PCI_DEVICE_ID_ATI_RADEON_Y_ 0x5960 #define PCI_DEVICE_ID_ATI_RADEON_Ya 0x5961 #define PCI_DEVICE_ID_ATI_RADEON_Yd 0x5964 /* Radeon R300 (9500) */ -#define PCI_DEVICE_ID_ATI_RADEON_AD 0x4144 /* Radeon R300 (9700) */ #define PCI_DEVICE_ID_ATI_RADEON_ND 0x4e44 #define PCI_DEVICE_ID_ATI_RADEON_NE 0x4e45 #define PCI_DEVICE_ID_ATI_RADEON_NF 0x4e46 #define PCI_DEVICE_ID_ATI_RADEON_NG 0x4e47 -#define PCI_DEVICE_ID_ATI_RADEON_AE 0x4145 -#define PCI_DEVICE_ID_ATI_RADEON_AF 0x4146 /* Radeon R350 (9800) */ -#define PCI_DEVICE_ID_ATI_RADEON_NH 0x4e48 -#define PCI_DEVICE_ID_ATI_RADEON_NI 0x4e49 /* Radeon RV350 (9600) */ -#define PCI_DEVICE_ID_ATI_RADEON_AP 0x4150 -#define PCI_DEVICE_ID_ATI_RADEON_AR 0x4152 /* Radeon M6 */ #define PCI_DEVICE_ID_ATI_RADEON_LY 0x4c59 #define PCI_DEVICE_ID_ATI_RADEON_LZ 0x4c5a @@ -341,10 +329,6 @@ #define PCI_DEVICE_ID_ATI_RADEON_Lf 0x4c66 #define PCI_DEVICE_ID_ATI_RADEON_Lg 0x4c67 /* Radeon */ -#define PCI_DEVICE_ID_ATI_RADEON_RA 0x5144 -#define PCI_DEVICE_ID_ATI_RADEON_RB 0x5145 -#define PCI_DEVICE_ID_ATI_RADEON_RC 0x5146 -#define PCI_DEVICE_ID_ATI_RADEON_RD 0x5147 /* RadeonIGP */ #define PCI_DEVICE_ID_ATI_RS100 0xcab0 #define PCI_DEVICE_ID_ATI_RS200 0xcab2 @@ -392,6 +376,7 @@ #define PCI_DEVICE_ID_NS_87560_USB 0x0012 #define PCI_DEVICE_ID_NS_83815 0x0020 #define PCI_DEVICE_ID_NS_83820 0x0022 +#define PCI_DEVICE_ID_NS_SATURN 0x0035 #define PCI_DEVICE_ID_NS_SCx200_BRIDGE 0x0500 #define PCI_DEVICE_ID_NS_SCx200_SMI 0x0501 #define PCI_DEVICE_ID_NS_SCx200_IDE 0x0502 @@ -402,6 +387,7 @@ #define PCI_DEVICE_ID_NS_SC1100_SMI 0x0511 #define PCI_DEVICE_ID_NS_SC1100_XBUS 0x0515 #define PCI_DEVICE_ID_NS_87410 0xd001 +#define PCI_DEVICE_ID_NS_CS5535_IDE 0x002d #define PCI_VENDOR_ID_TSENG 0x100c #define PCI_DEVICE_ID_TSENG_W32P_2 0x3202 @@ -444,45 +430,29 @@ #define PCI_DEVICE_ID_CIRRUS_5465 0x00d6 #define PCI_DEVICE_ID_CIRRUS_6729 0x1100 #define PCI_DEVICE_ID_CIRRUS_6832 0x1110 -#define PCI_DEVICE_ID_CIRRUS_7542 0x1200 #define PCI_DEVICE_ID_CIRRUS_7543 0x1202 -#define PCI_DEVICE_ID_CIRRUS_7541 0x1204 #define PCI_DEVICE_ID_CIRRUS_4610 0x6001 #define PCI_DEVICE_ID_CIRRUS_4612 0x6003 #define PCI_DEVICE_ID_CIRRUS_4615 0x6004 -#define PCI_DEVICE_ID_CIRRUS_4281 0x6005 #define PCI_VENDOR_ID_IBM 0x1014 -#define PCI_DEVICE_ID_IBM_FIRE_CORAL 0x000a #define PCI_DEVICE_ID_IBM_TR 0x0018 -#define PCI_DEVICE_ID_IBM_82G2675 0x001d -#define PCI_DEVICE_ID_IBM_MCA 0x0020 -#define PCI_DEVICE_ID_IBM_82351 0x0022 -#define PCI_DEVICE_ID_IBM_PYTHON 0x002d -#define PCI_DEVICE_ID_IBM_SERVERAID 0x002e #define PCI_DEVICE_ID_IBM_TR_WAKE 0x003e -#define PCI_DEVICE_ID_IBM_MPIC 0x0046 -#define PCI_DEVICE_ID_IBM_3780IDSP 0x007d -#define PCI_DEVICE_ID_IBM_CHUKAR 0x0096 #define PCI_DEVICE_ID_IBM_CPC710_PCI64 0x00fc -#define PCI_DEVICE_ID_IBM_CPC710_PCI32 0x0105 -#define PCI_DEVICE_ID_IBM_405GP 0x0156 #define PCI_DEVICE_ID_IBM_SNIPE 0x0180 -#define PCI_DEVICE_ID_IBM_SERVERAIDI960 0x01bd #define PCI_DEVICE_ID_IBM_CITRINE 0x028C #define PCI_DEVICE_ID_IBM_GEMSTONE 0xB166 -#define PCI_DEVICE_ID_IBM_MPIC_2 0xffff +#define PCI_DEVICE_ID_IBM_OBSIDIAN 0x02BD #define PCI_DEVICE_ID_IBM_ICOM_DEV_ID_1 0x0031 #define PCI_DEVICE_ID_IBM_ICOM_DEV_ID_2 0x0219 #define PCI_DEVICE_ID_IBM_ICOM_V2_TWO_PORTS_RVX 0x021A #define PCI_DEVICE_ID_IBM_ICOM_V2_ONE_PORT_RVX_ONE_PORT_MDM 0x0251 #define PCI_DEVICE_ID_IBM_ICOM_FOUR_PORT_MODEL 0x252 -#define PCI_VENDOR_ID_COMPEX2 0x101a // pci.ids says "AT&T GIS (NCR)" +#define PCI_VENDOR_ID_COMPEX2 0x101a /* pci.ids says "AT&T GIS (NCR)" */ #define PCI_DEVICE_ID_COMPEX2_100VG 0x0005 #define PCI_VENDOR_ID_WD 0x101c -#define PCI_DEVICE_ID_WD_7197 0x3296 #define PCI_DEVICE_ID_WD_90C 0xc24a #define PCI_VENDOR_ID_AMI 0x101e @@ -499,33 +469,18 @@ #define PCI_DEVICE_ID_AMD_FE_GATE_7006 0x7006 #define PCI_DEVICE_ID_AMD_FE_GATE_7007 0x7007 #define PCI_DEVICE_ID_AMD_FE_GATE_700C 0x700C -#define PCI_DEVICE_ID_AMD_FE_GATE_700D 0x700D #define PCI_DEVICE_ID_AMD_FE_GATE_700E 0x700E -#define PCI_DEVICE_ID_AMD_FE_GATE_700F 0x700F -#define PCI_DEVICE_ID_AMD_COBRA_7400 0x7400 #define PCI_DEVICE_ID_AMD_COBRA_7401 0x7401 -#define PCI_DEVICE_ID_AMD_COBRA_7403 0x7403 -#define PCI_DEVICE_ID_AMD_COBRA_7404 0x7404 -#define PCI_DEVICE_ID_AMD_VIPER_7408 0x7408 #define PCI_DEVICE_ID_AMD_VIPER_7409 0x7409 #define PCI_DEVICE_ID_AMD_VIPER_740B 0x740B -#define PCI_DEVICE_ID_AMD_VIPER_740C 0x740C #define PCI_DEVICE_ID_AMD_VIPER_7410 0x7410 #define PCI_DEVICE_ID_AMD_VIPER_7411 0x7411 #define PCI_DEVICE_ID_AMD_VIPER_7413 0x7413 -#define PCI_DEVICE_ID_AMD_VIPER_7414 0x7414 -#define PCI_DEVICE_ID_AMD_OPUS_7440 0x7440 -# define PCI_DEVICE_ID_AMD_VIPER_7440 PCI_DEVICE_ID_AMD_OPUS_7440 +#define PCI_DEVICE_ID_AMD_VIPER_7440 0x7440 #define PCI_DEVICE_ID_AMD_OPUS_7441 0x7441 -# define PCI_DEVICE_ID_AMD_VIPER_7441 PCI_DEVICE_ID_AMD_OPUS_7441 #define PCI_DEVICE_ID_AMD_OPUS_7443 0x7443 -# define PCI_DEVICE_ID_AMD_VIPER_7443 PCI_DEVICE_ID_AMD_OPUS_7443 +#define PCI_DEVICE_ID_AMD_VIPER_7443 0x7443 #define PCI_DEVICE_ID_AMD_OPUS_7445 0x7445 -#define PCI_DEVICE_ID_AMD_OPUS_7448 0x7448 -# define PCI_DEVICE_ID_AMD_VIPER_7448 PCI_DEVICE_ID_AMD_OPUS_7448 -#define PCI_DEVICE_ID_AMD_OPUS_7449 0x7449 -# define PCI_DEVICE_ID_AMD_VIPER_7449 PCI_DEVICE_ID_AMD_OPUS_7449 -#define PCI_DEVICE_ID_AMD_8111_LAN 0x7462 #define PCI_DEVICE_ID_AMD_8111_LPC 0x7468 #define PCI_DEVICE_ID_AMD_8111_IDE 0x7469 #define PCI_DEVICE_ID_AMD_8111_SMBUS2 0x746a @@ -534,6 +489,8 @@ #define PCI_DEVICE_ID_AMD_8151_0 0x7454 #define PCI_DEVICE_ID_AMD_8131_APIC 0x7450 +#define PCI_DEVICE_ID_AMD_CS5536_IDE 0x209A + #define PCI_VENDOR_ID_TRIDENT 0x1023 #define PCI_DEVICE_ID_TRIDENT_4DWAVE_DX 0x2000 #define PCI_DEVICE_ID_TRIDENT_4DWAVE_NX 0x2001 @@ -559,12 +516,14 @@ #define PCI_VENDOR_ID_DELL 0x1028 #define PCI_DEVICE_ID_DELL_RACIII 0x0008 #define PCI_DEVICE_ID_DELL_RAC4 0x0012 +#define PCI_DEVICE_ID_DELL_PERC5 0x0015 #define PCI_VENDOR_ID_MATROX 0x102B #define PCI_DEVICE_ID_MATROX_MGA_2 0x0518 #define PCI_DEVICE_ID_MATROX_MIL 0x0519 #define PCI_DEVICE_ID_MATROX_MYS 0x051A #define PCI_DEVICE_ID_MATROX_MIL_2 0x051b +#define PCI_DEVICE_ID_MATROX_MYS_AGP 0x051e #define PCI_DEVICE_ID_MATROX_MIL_2_AGP 0x051f #define PCI_DEVICE_ID_MATROX_MGA_IMP 0x0d10 #define PCI_DEVICE_ID_MATROX_G100_MM 0x1000 @@ -582,7 +541,6 @@ #define PCI_DEVICE_ID_CT_65550 0x00e0 #define PCI_DEVICE_ID_CT_65554 0x00e4 #define PCI_DEVICE_ID_CT_65555 0x00e5 -#define PCI_DEVICE_ID_CT_69000 0x00c0 #define PCI_VENDOR_ID_MIRO 0x1031 #define PCI_DEVICE_ID_MIRO_36050 0x5601 @@ -636,7 +594,6 @@ #define PCI_DEVICE_ID_SI_550 0x0550 #define PCI_DEVICE_ID_SI_540_VGA 0x5300 #define PCI_DEVICE_ID_SI_550_VGA 0x5315 -#define PCI_DEVICE_ID_SI_601 0x0601 #define PCI_DEVICE_ID_SI_620 0x0620 #define PCI_DEVICE_ID_SI_630 0x0630 #define PCI_DEVICE_ID_SI_633 0x0633 @@ -647,30 +604,23 @@ #define PCI_DEVICE_ID_SI_648 0x0648 #define PCI_DEVICE_ID_SI_650 0x0650 #define PCI_DEVICE_ID_SI_651 0x0651 -#define PCI_DEVICE_ID_SI_652 0x0652 #define PCI_DEVICE_ID_SI_655 0x0655 #define PCI_DEVICE_ID_SI_661 0x0661 #define PCI_DEVICE_ID_SI_730 0x0730 #define PCI_DEVICE_ID_SI_733 0x0733 #define PCI_DEVICE_ID_SI_630_VGA 0x6300 -#define PCI_DEVICE_ID_SI_730_VGA 0x7300 #define PCI_DEVICE_ID_SI_735 0x0735 #define PCI_DEVICE_ID_SI_740 0x0740 #define PCI_DEVICE_ID_SI_741 0x0741 #define PCI_DEVICE_ID_SI_745 0x0745 #define PCI_DEVICE_ID_SI_746 0x0746 -#define PCI_DEVICE_ID_SI_748 0x0748 -#define PCI_DEVICE_ID_SI_750 0x0750 -#define PCI_DEVICE_ID_SI_751 0x0751 -#define PCI_DEVICE_ID_SI_752 0x0752 #define PCI_DEVICE_ID_SI_755 0x0755 #define PCI_DEVICE_ID_SI_760 0x0760 #define PCI_DEVICE_ID_SI_900 0x0900 #define PCI_DEVICE_ID_SI_961 0x0961 #define PCI_DEVICE_ID_SI_962 0x0962 #define PCI_DEVICE_ID_SI_963 0x0963 -#define PCI_DEVICE_ID_SI_5107 0x5107 -#define PCI_DEVICE_ID_SI_5300 0x5300 +#define PCI_DEVICE_ID_SI_965 0x0965 #define PCI_DEVICE_ID_SI_5511 0x5511 #define PCI_DEVICE_ID_SI_5513 0x5513 #define PCI_DEVICE_ID_SI_5518 0x5518 @@ -682,10 +632,6 @@ #define PCI_DEVICE_ID_SI_5597 0x5597 #define PCI_DEVICE_ID_SI_5598 0x5598 #define PCI_DEVICE_ID_SI_5600 0x5600 -#define PCI_DEVICE_ID_SI_6300 0x6300 -#define PCI_DEVICE_ID_SI_6306 0x6306 -#define PCI_DEVICE_ID_SI_6326 0x6326 -#define PCI_DEVICE_ID_SI_7001 0x7001 #define PCI_DEVICE_ID_SI_7012 0x7012 #define PCI_DEVICE_ID_SI_7013 0x7013 #define PCI_DEVICE_ID_SI_7016 0x7016 @@ -706,23 +652,19 @@ #define PCI_DEVICE_ID_HP_DIVA_TOSCA1 0x1049 #define PCI_DEVICE_ID_HP_DIVA_TOSCA2 0x104A #define PCI_DEVICE_ID_HP_DIVA_MAESTRO 0x104B -#define PCI_DEVICE_ID_HP_PCI_LBA 0x1054 -#define PCI_DEVICE_ID_HP_REO_SBA 0x10f0 #define PCI_DEVICE_ID_HP_REO_IOC 0x10f1 #define PCI_DEVICE_ID_HP_VISUALIZE_FXE 0x108b #define PCI_DEVICE_ID_HP_DIVA_HALFDOME 0x1223 #define PCI_DEVICE_ID_HP_DIVA_KEYSTONE 0x1226 #define PCI_DEVICE_ID_HP_DIVA_POWERBAR 0x1227 -#define PCI_DEVICE_ID_HP_ZX1_SBA 0x1229 #define PCI_DEVICE_ID_HP_ZX1_IOC 0x122a #define PCI_DEVICE_ID_HP_PCIX_LBA 0x122e #define PCI_DEVICE_ID_HP_SX1000_IOC 0x127c #define PCI_DEVICE_ID_HP_DIVA_EVEREST 0x1282 #define PCI_DEVICE_ID_HP_DIVA_AUX 0x1290 #define PCI_DEVICE_ID_HP_DIVA_RMP3 0x1301 -#define PCI_DEVICE_ID_HP_CISS 0x3210 +#define PCI_DEVICE_ID_HP_DIVA_HURRICANE 0x132a #define PCI_DEVICE_ID_HP_CISSA 0x3220 -#define PCI_DEVICE_ID_HP_CISSB 0x3222 #define PCI_DEVICE_ID_HP_CISSC 0x3230 #define PCI_DEVICE_ID_HP_CISSD 0x3238 #define PCI_DEVICE_ID_HP_ZX2_IOC 0x4031 @@ -730,8 +672,6 @@ #define PCI_VENDOR_ID_PCTECH 0x1042 #define PCI_DEVICE_ID_PCTECH_RZ1000 0x1000 #define PCI_DEVICE_ID_PCTECH_RZ1001 0x1001 -#define PCI_DEVICE_ID_PCTECH_SAMURAI_0 0x3000 -#define PCI_DEVICE_ID_PCTECH_SAMURAI_1 0x3010 #define PCI_DEVICE_ID_PCTECH_SAMURAI_IDE 0x3020 #define PCI_VENDOR_ID_ASUSTEK 0x1043 @@ -741,24 +681,15 @@ #define PCI_DEVICE_ID_DPT 0xa400 #define PCI_VENDOR_ID_OPTI 0x1045 -#define PCI_DEVICE_ID_OPTI_92C178 0xc178 -#define PCI_DEVICE_ID_OPTI_82C557 0xc557 #define PCI_DEVICE_ID_OPTI_82C558 0xc558 #define PCI_DEVICE_ID_OPTI_82C621 0xc621 #define PCI_DEVICE_ID_OPTI_82C700 0xc700 -#define PCI_DEVICE_ID_OPTI_82C701 0xc701 -#define PCI_DEVICE_ID_OPTI_82C814 0xc814 -#define PCI_DEVICE_ID_OPTI_82C822 0xc822 -#define PCI_DEVICE_ID_OPTI_82C861 0xc861 #define PCI_DEVICE_ID_OPTI_82C825 0xd568 #define PCI_VENDOR_ID_ELSA 0x1048 #define PCI_DEVICE_ID_ELSA_MICROLINK 0x1000 #define PCI_DEVICE_ID_ELSA_QS3000 0x3000 -#define PCI_VENDOR_ID_SGS 0x104a -#define PCI_DEVICE_ID_SGS_2000 0x0008 -#define PCI_DEVICE_ID_SGS_1764 0x0009 #define PCI_VENDOR_ID_BUSLOGIC 0x104B #define PCI_DEVICE_ID_BUSLOGIC_MULTIMASTER_NC 0x0140 @@ -766,9 +697,10 @@ #define PCI_DEVICE_ID_BUSLOGIC_FLASHPOINT 0x8130 #define PCI_VENDOR_ID_TI 0x104c -#define PCI_DEVICE_ID_TI_TVP4010 0x3d04 #define PCI_DEVICE_ID_TI_TVP4020 0x3d07 #define PCI_DEVICE_ID_TI_4450 0x8011 +#define PCI_DEVICE_ID_TI_XX21_XX11 0x8031 +#define PCI_DEVICE_ID_TI_X515 0x8036 #define PCI_DEVICE_ID_TI_1130 0xac12 #define PCI_DEVICE_ID_TI_1031 0xac13 #define PCI_DEVICE_ID_TI_1131 0xac15 @@ -785,22 +717,23 @@ #define PCI_DEVICE_ID_TI_4451 0xac42 #define PCI_DEVICE_ID_TI_4510 0xac44 #define PCI_DEVICE_ID_TI_4520 0xac46 +#define PCI_DEVICE_ID_TI_7510 0xac47 +#define PCI_DEVICE_ID_TI_7610 0xac48 +#define PCI_DEVICE_ID_TI_7410 0xac49 #define PCI_DEVICE_ID_TI_1410 0xac50 #define PCI_DEVICE_ID_TI_1420 0xac51 #define PCI_DEVICE_ID_TI_1451A 0xac52 #define PCI_DEVICE_ID_TI_1620 0xac54 #define PCI_DEVICE_ID_TI_1520 0xac55 #define PCI_DEVICE_ID_TI_1510 0xac56 +#define PCI_DEVICE_ID_TI_X620 0xac8d +#define PCI_DEVICE_ID_TI_X420 0xac8e #define PCI_VENDOR_ID_SONY 0x104d -#define PCI_DEVICE_ID_SONY_CXD3222 0x8039 -#define PCI_VENDOR_ID_OAK 0x104e -#define PCI_DEVICE_ID_OAK_OTI107 0x0107 /* Winbond have two vendor IDs! See 0x10ad as well */ #define PCI_VENDOR_ID_WINBOND2 0x1050 -#define PCI_DEVICE_ID_WINBOND2_89C940 0x0940 #define PCI_DEVICE_ID_WINBOND2_89C940F 0x5a5a #define PCI_DEVICE_ID_WINBOND2_6692 0x6692 @@ -809,19 +742,15 @@ #define PCI_VENDOR_ID_EFAR 0x1055 #define PCI_DEVICE_ID_EFAR_SLC90E66_1 0x9130 -#define PCI_DEVICE_ID_EFAR_SLC90E66_0 0x9460 -#define PCI_DEVICE_ID_EFAR_SLC90E66_2 0x9462 #define PCI_DEVICE_ID_EFAR_SLC90E66_3 0x9463 #define PCI_VENDOR_ID_MOTOROLA 0x1057 -#define PCI_VENDOR_ID_MOTOROLA_OOPS 0x1507 #define PCI_DEVICE_ID_MOTOROLA_MPC105 0x0001 #define PCI_DEVICE_ID_MOTOROLA_MPC106 0x0002 #define PCI_DEVICE_ID_MOTOROLA_MPC107 0x0004 #define PCI_DEVICE_ID_MOTOROLA_RAVEN 0x4801 #define PCI_DEVICE_ID_MOTOROLA_FALCON 0x4802 #define PCI_DEVICE_ID_MOTOROLA_HAWK 0x4803 -#define PCI_DEVICE_ID_MOTOROLA_CPX8216 0x4806 #define PCI_DEVICE_ID_MOTOROLA_HARRIER 0x480b #define PCI_DEVICE_ID_MOTOROLA_MPC5200 0x5803 @@ -832,33 +761,19 @@ #define PCI_DEVICE_ID_PROMISE_20262 0x4d38 #define PCI_DEVICE_ID_PROMISE_20263 0x0D38 #define PCI_DEVICE_ID_PROMISE_20268 0x4d68 -#define PCI_DEVICE_ID_PROMISE_20268R 0x6268 #define PCI_DEVICE_ID_PROMISE_20269 0x4d69 #define PCI_DEVICE_ID_PROMISE_20270 0x6268 #define PCI_DEVICE_ID_PROMISE_20271 0x6269 #define PCI_DEVICE_ID_PROMISE_20275 0x1275 #define PCI_DEVICE_ID_PROMISE_20276 0x5275 #define PCI_DEVICE_ID_PROMISE_20277 0x7275 -#define PCI_DEVICE_ID_PROMISE_5300 0x5300 -#define PCI_VENDOR_ID_N9 0x105d -#define PCI_DEVICE_ID_N9_I128 0x2309 -#define PCI_DEVICE_ID_N9_I128_2 0x2339 -#define PCI_DEVICE_ID_N9_I128_T2R 0x493d #define PCI_VENDOR_ID_UMC 0x1060 #define PCI_DEVICE_ID_UMC_UM8673F 0x0101 -#define PCI_DEVICE_ID_UMC_UM8891A 0x0891 #define PCI_DEVICE_ID_UMC_UM8886BF 0x673a #define PCI_DEVICE_ID_UMC_UM8886A 0x886a -#define PCI_DEVICE_ID_UMC_UM8881F 0x8881 -#define PCI_DEVICE_ID_UMC_UM8886F 0x8886 -#define PCI_DEVICE_ID_UMC_UM9017F 0x9017 -#define PCI_DEVICE_ID_UMC_UM8886N 0xe886 -#define PCI_DEVICE_ID_UMC_UM8891N 0xe891 -#define PCI_VENDOR_ID_X 0x1061 -#define PCI_DEVICE_ID_X_AGX016 0x0001 #define PCI_VENDOR_ID_MYLEX 0x1069 #define PCI_DEVICE_ID_MYLEX_DAC960_P 0x0001 @@ -869,39 +784,32 @@ #define PCI_DEVICE_ID_MYLEX_DAC960_BA 0xBA56 #define PCI_DEVICE_ID_MYLEX_DAC960_GEM 0xB166 -#define PCI_VENDOR_ID_PICOP 0x1066 -#define PCI_DEVICE_ID_PICOP_PT86C52X 0x0001 -#define PCI_DEVICE_ID_PICOP_PT80C524 0x8002 #define PCI_VENDOR_ID_APPLE 0x106b #define PCI_DEVICE_ID_APPLE_BANDIT 0x0001 -#define PCI_DEVICE_ID_APPLE_GC 0x0002 #define PCI_DEVICE_ID_APPLE_HYDRA 0x000e #define PCI_DEVICE_ID_APPLE_UNI_N_FW 0x0018 -#define PCI_DEVICE_ID_APPLE_KL_USB 0x0019 #define PCI_DEVICE_ID_APPLE_UNI_N_AGP 0x0020 #define PCI_DEVICE_ID_APPLE_UNI_N_GMAC 0x0021 -#define PCI_DEVICE_ID_APPLE_KEYLARGO 0x0022 #define PCI_DEVICE_ID_APPLE_UNI_N_GMACP 0x0024 -#define PCI_DEVICE_ID_APPLE_KEYLARGO_P 0x0025 -#define PCI_DEVICE_ID_APPLE_KL_USB_P 0x0026 #define PCI_DEVICE_ID_APPLE_UNI_N_AGP_P 0x0027 #define PCI_DEVICE_ID_APPLE_UNI_N_AGP15 0x002d #define PCI_DEVICE_ID_APPLE_UNI_N_PCI15 0x002e -#define PCI_DEVICE_ID_APPLE_UNI_N_FW2 0x0030 #define PCI_DEVICE_ID_APPLE_UNI_N_GMAC2 0x0032 #define PCI_DEVICE_ID_APPLE_UNI_N_ATA 0x0033 #define PCI_DEVICE_ID_APPLE_UNI_N_AGP2 0x0034 #define PCI_DEVICE_ID_APPLE_IPID_ATA100 0x003b -#define PCI_DEVICE_ID_APPLE_KEYLARGO_I 0x003e #define PCI_DEVICE_ID_APPLE_K2_ATA100 0x0043 #define PCI_DEVICE_ID_APPLE_U3_AGP 0x004b #define PCI_DEVICE_ID_APPLE_K2_GMAC 0x004c #define PCI_DEVICE_ID_APPLE_SH_ATA 0x0050 #define PCI_DEVICE_ID_APPLE_SH_SUNGEM 0x0051 -#define PCI_DEVICE_ID_APPLE_SH_FW 0x0052 #define PCI_DEVICE_ID_APPLE_U3L_AGP 0x0058 #define PCI_DEVICE_ID_APPLE_U3H_AGP 0x0059 +#define PCI_DEVICE_ID_APPLE_IPID2_AGP 0x0066 +#define PCI_DEVICE_ID_APPLE_IPID2_ATA 0x0069 +#define PCI_DEVICE_ID_APPLE_IPID2_FW 0x006a +#define PCI_DEVICE_ID_APPLE_IPID2_GMAC 0x006b #define PCI_DEVICE_ID_APPLE_TIGON3 0x1645 #define PCI_VENDOR_ID_YAMAHA 0x1073 @@ -912,12 +820,9 @@ #define PCI_DEVICE_ID_YAMAHA_744 0x0010 #define PCI_DEVICE_ID_YAMAHA_754 0x0012 -#define PCI_VENDOR_ID_NEXGEN 0x1074 -#define PCI_DEVICE_ID_NEXGEN_82C501 0x4e78 #define PCI_VENDOR_ID_QLOGIC 0x1077 #define PCI_DEVICE_ID_QLOGIC_ISP1020 0x1020 -#define PCI_DEVICE_ID_QLOGIC_ISP1022 0x1022 #define PCI_DEVICE_ID_QLOGIC_ISP2100 0x2100 #define PCI_DEVICE_ID_QLOGIC_ISP2200 0x2200 #define PCI_DEVICE_ID_QLOGIC_ISP2300 0x2300 @@ -935,32 +840,20 @@ #define PCI_DEVICE_ID_CYRIX_PCI_MASTER 0x0001 #define PCI_DEVICE_ID_CYRIX_5520 0x0002 #define PCI_DEVICE_ID_CYRIX_5530_LEGACY 0x0100 -#define PCI_DEVICE_ID_CYRIX_5530_SMI 0x0101 #define PCI_DEVICE_ID_CYRIX_5530_IDE 0x0102 #define PCI_DEVICE_ID_CYRIX_5530_AUDIO 0x0103 #define PCI_DEVICE_ID_CYRIX_5530_VIDEO 0x0104 -#define PCI_VENDOR_ID_LEADTEK 0x107d -#define PCI_DEVICE_ID_LEADTEK_805 0x0000 -#define PCI_VENDOR_ID_INTERPHASE 0x107e -#define PCI_DEVICE_ID_INTERPHASE_5526 0x0004 -#define PCI_DEVICE_ID_INTERPHASE_55x6 0x0005 -#define PCI_DEVICE_ID_INTERPHASE_5575 0x0008 #define PCI_VENDOR_ID_CONTAQ 0x1080 -#define PCI_DEVICE_ID_CONTAQ_82C599 0x0600 #define PCI_DEVICE_ID_CONTAQ_82C693 0xc693 -#define PCI_VENDOR_ID_FOREX 0x1083 #define PCI_VENDOR_ID_OLICOM 0x108d -#define PCI_DEVICE_ID_OLICOM_OC3136 0x0001 -#define PCI_DEVICE_ID_OLICOM_OC2315 0x0011 #define PCI_DEVICE_ID_OLICOM_OC2325 0x0012 #define PCI_DEVICE_ID_OLICOM_OC2183 0x0013 #define PCI_DEVICE_ID_OLICOM_OC2326 0x0014 -#define PCI_DEVICE_ID_OLICOM_OC6151 0x0021 #define PCI_VENDOR_ID_SUN 0x108e #define PCI_DEVICE_ID_SUN_EBUS 0x1000 @@ -976,51 +869,34 @@ #define PCI_DEVICE_ID_SUN_SABRE 0xa000 #define PCI_DEVICE_ID_SUN_HUMMINGBIRD 0xa001 #define PCI_DEVICE_ID_SUN_TOMATILLO 0xa801 +#define PCI_DEVICE_ID_SUN_CASSINI 0xabba #define PCI_VENDOR_ID_CMD 0x1095 -#define PCI_DEVICE_ID_CMD_640 0x0640 #define PCI_DEVICE_ID_CMD_643 0x0643 #define PCI_DEVICE_ID_CMD_646 0x0646 -#define PCI_DEVICE_ID_CMD_647 0x0647 #define PCI_DEVICE_ID_CMD_648 0x0648 #define PCI_DEVICE_ID_CMD_649 0x0649 -#define PCI_DEVICE_ID_CMD_670 0x0670 -#define PCI_DEVICE_ID_CMD_680 0x0680 #define PCI_DEVICE_ID_SII_680 0x0680 #define PCI_DEVICE_ID_SII_3112 0x3112 #define PCI_DEVICE_ID_SII_1210SA 0x0240 -#define PCI_VENDOR_ID_VISION 0x1098 -#define PCI_DEVICE_ID_VISION_QD8500 0x0001 -#define PCI_DEVICE_ID_VISION_QD8580 0x0002 #define PCI_VENDOR_ID_BROOKTREE 0x109e -#define PCI_DEVICE_ID_BROOKTREE_848 0x0350 -#define PCI_DEVICE_ID_BROOKTREE_849A 0x0351 -#define PCI_DEVICE_ID_BROOKTREE_878_1 0x036e #define PCI_DEVICE_ID_BROOKTREE_878 0x0878 #define PCI_DEVICE_ID_BROOKTREE_879 0x0879 -#define PCI_DEVICE_ID_BROOKTREE_8474 0x8474 -#define PCI_VENDOR_ID_SIERRA 0x10a8 -#define PCI_DEVICE_ID_SIERRA_STB 0x0000 #define PCI_VENDOR_ID_SGI 0x10a9 #define PCI_DEVICE_ID_SGI_IOC3 0x0003 #define PCI_DEVICE_ID_SGI_IOC4 0x100a #define PCI_VENDOR_ID_SGI_LITHIUM 0x1002 -#define PCI_VENDOR_ID_ACC 0x10aa -#define PCI_DEVICE_ID_ACC_2056 0x0000 #define PCI_VENDOR_ID_WINBOND 0x10ad -#define PCI_DEVICE_ID_WINBOND_83769 0x0001 #define PCI_DEVICE_ID_WINBOND_82C105 0x0105 #define PCI_DEVICE_ID_WINBOND_83C553 0x0565 -#define PCI_VENDOR_ID_DATABOOK 0x10b3 -#define PCI_DEVICE_ID_DATABOOK_87144 0xb106 #define PCI_VENDOR_ID_PLX 0x10b5 #define PCI_DEVICE_ID_PLX_R685 0x1030 @@ -1031,33 +907,19 @@ #define PCI_DEVICE_ID_PLX_DJINN_ITOO 0x1151 #define PCI_DEVICE_ID_PLX_R753 0x1152 #define PCI_DEVICE_ID_PLX_OLITEC 0x1187 -#define PCI_DEVICE_ID_PLX_9030 0x9030 #define PCI_DEVICE_ID_PLX_9050 0x9050 -#define PCI_DEVICE_ID_PLX_9060 0x9060 -#define PCI_DEVICE_ID_PLX_9060ES 0x906E -#define PCI_DEVICE_ID_PLX_9060SD 0x906D #define PCI_DEVICE_ID_PLX_9080 0x9080 #define PCI_DEVICE_ID_PLX_GTEK_SERIAL2 0xa001 #define PCI_VENDOR_ID_MADGE 0x10b6 #define PCI_DEVICE_ID_MADGE_MK2 0x0002 -#define PCI_DEVICE_ID_MADGE_C155S 0x1001 #define PCI_VENDOR_ID_3COM 0x10b7 #define PCI_DEVICE_ID_3COM_3C985 0x0001 #define PCI_DEVICE_ID_3COM_3C940 0x1700 #define PCI_DEVICE_ID_3COM_3C339 0x3390 #define PCI_DEVICE_ID_3COM_3C359 0x3590 -#define PCI_DEVICE_ID_3COM_3C590 0x5900 -#define PCI_DEVICE_ID_3COM_3C595TX 0x5950 -#define PCI_DEVICE_ID_3COM_3C595T4 0x5951 -#define PCI_DEVICE_ID_3COM_3C595MII 0x5952 #define PCI_DEVICE_ID_3COM_3C940B 0x80eb -#define PCI_DEVICE_ID_3COM_3C900TPO 0x9000 -#define PCI_DEVICE_ID_3COM_3C900COMBO 0x9001 -#define PCI_DEVICE_ID_3COM_3C905TX 0x9050 -#define PCI_DEVICE_ID_3COM_3C905T4 0x9051 -#define PCI_DEVICE_ID_3COM_3C905B_TX 0x9055 #define PCI_DEVICE_ID_3COM_3CR990 0x9900 #define PCI_DEVICE_ID_3COM_3CR990_TX_95 0x9902 #define PCI_DEVICE_ID_3COM_3CR990_TX_97 0x9903 @@ -1067,24 +929,11 @@ #define PCI_DEVICE_ID_3COM_3CR990SVR97 0x9909 #define PCI_DEVICE_ID_3COM_3CR990SVR 0x990a -#define PCI_VENDOR_ID_SMC 0x10b8 -#define PCI_DEVICE_ID_SMC_EPIC100 0x0005 #define PCI_VENDOR_ID_AL 0x10b9 -#define PCI_DEVICE_ID_AL_M1445 0x1445 -#define PCI_DEVICE_ID_AL_M1449 0x1449 -#define PCI_DEVICE_ID_AL_M1451 0x1451 -#define PCI_DEVICE_ID_AL_M1461 0x1461 -#define PCI_DEVICE_ID_AL_M1489 0x1489 -#define PCI_DEVICE_ID_AL_M1511 0x1511 -#define PCI_DEVICE_ID_AL_M1513 0x1513 -#define PCI_DEVICE_ID_AL_M1521 0x1521 -#define PCI_DEVICE_ID_AL_M1523 0x1523 -#define PCI_DEVICE_ID_AL_M1531 0x1531 #define PCI_DEVICE_ID_AL_M1533 0x1533 #define PCI_DEVICE_ID_AL_M1535 0x1535 #define PCI_DEVICE_ID_AL_M1541 0x1541 -#define PCI_DEVICE_ID_AL_M1543 0x1543 #define PCI_DEVICE_ID_AL_M1563 0x1563 #define PCI_DEVICE_ID_AL_M1621 0x1621 #define PCI_DEVICE_ID_AL_M1631 0x1631 @@ -1097,49 +946,23 @@ #define PCI_DEVICE_ID_AL_M1681 0x1681 #define PCI_DEVICE_ID_AL_M1683 0x1683 #define PCI_DEVICE_ID_AL_M1689 0x1689 -#define PCI_DEVICE_ID_AL_M3307 0x3307 -#define PCI_DEVICE_ID_AL_M4803 0x5215 #define PCI_DEVICE_ID_AL_M5219 0x5219 #define PCI_DEVICE_ID_AL_M5228 0x5228 #define PCI_DEVICE_ID_AL_M5229 0x5229 -#define PCI_DEVICE_ID_AL_M5237 0x5237 -#define PCI_DEVICE_ID_AL_M5243 0x5243 #define PCI_DEVICE_ID_AL_M5451 0x5451 #define PCI_DEVICE_ID_AL_M7101 0x7101 -#define PCI_VENDOR_ID_MITSUBISHI 0x10ba -#define PCI_VENDOR_ID_SURECOM 0x10bd -#define PCI_DEVICE_ID_SURECOM_NE34 0x0e34 #define PCI_VENDOR_ID_NEOMAGIC 0x10c8 -#define PCI_DEVICE_ID_NEOMAGIC_MAGICGRAPH_NM2070 0x0001 -#define PCI_DEVICE_ID_NEOMAGIC_MAGICGRAPH_128V 0x0002 -#define PCI_DEVICE_ID_NEOMAGIC_MAGICGRAPH_128ZV 0x0003 -#define PCI_DEVICE_ID_NEOMAGIC_MAGICGRAPH_NM2160 0x0004 -#define PCI_DEVICE_ID_NEOMAGIC_MAGICMEDIA_256AV 0x0005 -#define PCI_DEVICE_ID_NEOMAGIC_MAGICGRAPH_128ZVPLUS 0x0083 #define PCI_DEVICE_ID_NEOMAGIC_NM256AV_AUDIO 0x8005 #define PCI_DEVICE_ID_NEOMAGIC_NM256ZX_AUDIO 0x8006 #define PCI_DEVICE_ID_NEOMAGIC_NM256XL_PLUS_AUDIO 0x8016 -#define PCI_VENDOR_ID_ASP 0x10cd -#define PCI_DEVICE_ID_ASP_ABP940 0x1200 -#define PCI_DEVICE_ID_ASP_ABP940U 0x1300 -#define PCI_DEVICE_ID_ASP_ABP940UW 0x2300 - -#define PCI_VENDOR_ID_MACRONIX 0x10d9 -#define PCI_DEVICE_ID_MACRONIX_MX98713 0x0512 -#define PCI_DEVICE_ID_MACRONIX_MX987x5 0x0531 #define PCI_VENDOR_ID_TCONRAD 0x10da #define PCI_DEVICE_ID_TCONRAD_TOKENRING 0x0508 -#define PCI_VENDOR_ID_CERN 0x10dc -#define PCI_DEVICE_ID_CERN_SPSB_PMC 0x0001 -#define PCI_DEVICE_ID_CERN_SPSB_PCI 0x0002 -#define PCI_DEVICE_ID_CERN_HIPPI_DST 0x0021 -#define PCI_DEVICE_ID_CERN_HIPPI_SRC 0x0022 #define PCI_VENDOR_ID_NVIDIA 0x10de #define PCI_DEVICE_ID_NVIDIA_TNT 0x0020 @@ -1177,6 +1000,10 @@ #define PCI_DEVICE_ID_NVIDIA_CK8_AUDIO 0x008a #define PCI_DEVICE_ID_NVIDIA_NVENET_5 0x008c #define PCI_DEVICE_ID_NVIDIA_NFORCE2S_SATA 0x008e +#define PCI_DEVICE_ID_NVIDIA_GEFORCE_7800_GT 0x0090 +#define PCI_DEVICE_ID_NVIDIA_GEFORCE_7800_GTX 0x0091 +#define PCI_DEVICE_ID_NVIDIA_GEFORCE_GO_7800 0x0098 +#define PCI_DEVICE_ID_NVIDIA_GEFORCE_GO_7800_GTX 0x0099 #define PCI_DEVICE_ID_NVIDIA_ITNT2 0x00A0 #define PCI_DEVICE_ID_GEFORCE_6800A 0x00c1 #define PCI_DEVICE_ID_GEFORCE_6800A_LE 0x00c2 @@ -1185,7 +1012,6 @@ #define PCI_DEVICE_ID_QUADRO_FX_GO1400 0x00cc #define PCI_DEVICE_ID_QUADRO_FX_1400 0x00ce #define PCI_DEVICE_ID_NVIDIA_NFORCE3 0x00d1 -#define PCI_DEVICE_ID_NVIDIA_MCP3_AUDIO 0x00da #define PCI_DEVICE_ID_NVIDIA_NFORCE3_SMBUS 0x00d4 #define PCI_DEVICE_ID_NVIDIA_NFORCE3_IDE 0x00d5 #define PCI_DEVICE_ID_NVIDIA_NVENET_3 0x00d6 @@ -1268,10 +1094,10 @@ #define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_SATA 0x0266 #define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_SATA2 0x0267 #define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_IDE 0x036E -#define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_SATA 0x036F +#define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_SATA 0x037E +#define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_SATA2 0x037F #define PCI_DEVICE_ID_NVIDIA_NVENET_12 0x0268 #define PCI_DEVICE_ID_NVIDIA_NVENET_13 0x0269 -#define PCI_DEVICE_ID_NVIDIA_MCP51_AUDIO 0x026B #define PCI_DEVICE_ID_NVIDIA_GEFORCE4_TI_4800 0x0280 #define PCI_DEVICE_ID_NVIDIA_GEFORCE4_TI_4800_8X 0x0281 #define PCI_DEVICE_ID_NVIDIA_GEFORCE4_TI_4800SE 0x0282 @@ -1322,24 +1148,13 @@ #define PCI_DEVICE_ID_NVIDIA_NVENET_15 0x0373 #define PCI_VENDOR_ID_IMS 0x10e0 -#define PCI_DEVICE_ID_IMS_8849 0x8849 #define PCI_DEVICE_ID_IMS_TT128 0x9128 #define PCI_DEVICE_ID_IMS_TT3D 0x9135 -#define PCI_VENDOR_ID_TEKRAM2 0x10e1 -#define PCI_DEVICE_ID_TEKRAM2_690c 0x690c -#define PCI_VENDOR_ID_TUNDRA 0x10e3 -#define PCI_DEVICE_ID_TUNDRA_CA91C042 0x0000 -#define PCI_VENDOR_ID_AMCC 0x10e8 -#define PCI_DEVICE_ID_AMCC_MYRINET 0x8043 -#define PCI_DEVICE_ID_AMCC_PARASTATION 0x8062 -#define PCI_DEVICE_ID_AMCC_S5933 0x807d -#define PCI_DEVICE_ID_AMCC_S5933_HEPC3 0x809c #define PCI_VENDOR_ID_INTERG 0x10ea -#define PCI_DEVICE_ID_INTERG_1680 0x1680 #define PCI_DEVICE_ID_INTERG_1682 0x1682 #define PCI_DEVICE_ID_INTERG_2000 0x2000 #define PCI_DEVICE_ID_INTERG_2010 0x2010 @@ -1347,32 +1162,23 @@ #define PCI_DEVICE_ID_INTERG_5050 0x5050 #define PCI_VENDOR_ID_REALTEK 0x10ec -#define PCI_DEVICE_ID_REALTEK_8029 0x8029 -#define PCI_DEVICE_ID_REALTEK_8129 0x8129 #define PCI_DEVICE_ID_REALTEK_8139 0x8139 -#define PCI_DEVICE_ID_REALTEK_8169 0x8169 #define PCI_VENDOR_ID_XILINX 0x10ee #define PCI_DEVICE_ID_RME_DIGI96 0x3fc0 #define PCI_DEVICE_ID_RME_DIGI96_8 0x3fc1 #define PCI_DEVICE_ID_RME_DIGI96_8_PRO 0x3fc2 #define PCI_DEVICE_ID_RME_DIGI96_8_PAD_OR_PST 0x3fc3 -#define PCI_DEVICE_ID_XILINX_HAMMERFALL 0x3fc4 #define PCI_DEVICE_ID_XILINX_HAMMERFALL_DSP 0x3fc5 #define PCI_DEVICE_ID_XILINX_HAMMERFALL_DSP_MADI 0x3fc6 -#define PCI_DEVICE_ID_TURBOPAM 0x4020 -#define PCI_VENDOR_ID_TRUEVISION 0x10fa -#define PCI_DEVICE_ID_TRUEVISION_T1000 0x000c #define PCI_VENDOR_ID_INIT 0x1101 -#define PCI_DEVICE_ID_INIT_320P 0x9100 -#define PCI_DEVICE_ID_INIT_360P 0x9500 -#define PCI_VENDOR_ID_CREATIVE 0x1102 // duplicate: ECTIVA +#define PCI_VENDOR_ID_CREATIVE 0x1102 /* duplicate: ECTIVA */ #define PCI_DEVICE_ID_CREATIVE_EMU10K1 0x0002 -#define PCI_VENDOR_ID_ECTIVA 0x1102 // duplicate: CREATIVE +#define PCI_VENDOR_ID_ECTIVA 0x1102 /* duplicate: CREATIVE */ #define PCI_DEVICE_ID_ECTIVA_EV1938 0x8938 #define PCI_VENDOR_ID_TTI 0x1103 @@ -1382,7 +1188,7 @@ #define PCI_DEVICE_ID_TTI_HPT302 0x0006 #define PCI_DEVICE_ID_TTI_HPT371 0x0007 #define PCI_DEVICE_ID_TTI_HPT374 0x0008 -#define PCI_DEVICE_ID_TTI_HPT372N 0x0009 // apparently a 372N variant? +#define PCI_DEVICE_ID_TTI_HPT372N 0x0009 /* apparently a 372N variant? */ #define PCI_VENDOR_ID_VIA 0x1106 #define PCI_DEVICE_ID_VIA_8763_0 0x0198 @@ -1393,38 +1199,28 @@ #define PCI_DEVICE_ID_VIA_3269_0 0x0269 #define PCI_DEVICE_ID_VIA_K8T800PRO_0 0x0282 #define PCI_DEVICE_ID_VIA_8363_0 0x0305 +#define PCI_DEVICE_ID_VIA_P4M800CE 0x0314 #define PCI_DEVICE_ID_VIA_8371_0 0x0391 #define PCI_DEVICE_ID_VIA_8501_0 0x0501 -#define PCI_DEVICE_ID_VIA_82C505 0x0505 #define PCI_DEVICE_ID_VIA_82C561 0x0561 #define PCI_DEVICE_ID_VIA_82C586_1 0x0571 #define PCI_DEVICE_ID_VIA_82C576 0x0576 -#define PCI_DEVICE_ID_VIA_82C585 0x0585 #define PCI_DEVICE_ID_VIA_82C586_0 0x0586 -#define PCI_DEVICE_ID_VIA_82C595 0x0595 #define PCI_DEVICE_ID_VIA_82C596 0x0596 #define PCI_DEVICE_ID_VIA_82C597_0 0x0597 #define PCI_DEVICE_ID_VIA_82C598_0 0x0598 #define PCI_DEVICE_ID_VIA_8601_0 0x0601 #define PCI_DEVICE_ID_VIA_8605_0 0x0605 -#define PCI_DEVICE_ID_VIA_82C680 0x0680 #define PCI_DEVICE_ID_VIA_82C686 0x0686 #define PCI_DEVICE_ID_VIA_82C691_0 0x0691 -#define PCI_DEVICE_ID_VIA_82C693 0x0693 -#define PCI_DEVICE_ID_VIA_82C693_1 0x0698 -#define PCI_DEVICE_ID_VIA_82C926 0x0926 #define PCI_DEVICE_ID_VIA_82C576_1 0x1571 -#define PCI_DEVICE_ID_VIA_82C595_97 0x1595 #define PCI_DEVICE_ID_VIA_82C586_2 0x3038 #define PCI_DEVICE_ID_VIA_82C586_3 0x3040 -#define PCI_DEVICE_ID_VIA_6305 0x3044 #define PCI_DEVICE_ID_VIA_82C596_3 0x3050 #define PCI_DEVICE_ID_VIA_82C596B_3 0x3051 #define PCI_DEVICE_ID_VIA_82C686_4 0x3057 #define PCI_DEVICE_ID_VIA_82C686_5 0x3058 #define PCI_DEVICE_ID_VIA_8233_5 0x3059 -#define PCI_DEVICE_ID_VIA_8233_7 0x3065 -#define PCI_DEVICE_ID_VIA_82C686_6 0x3068 #define PCI_DEVICE_ID_VIA_8233_0 0x3074 #define PCI_DEVICE_ID_VIA_8633_0 0x3091 #define PCI_DEVICE_ID_VIA_8367_0 0x3099 @@ -1440,40 +1236,26 @@ #define PCI_DEVICE_ID_VIA_8703_51_0 0x3148 #define PCI_DEVICE_ID_VIA_8237_SATA 0x3149 #define PCI_DEVICE_ID_VIA_XN266 0x3156 +#define PCI_DEVICE_ID_VIA_6410 0x3164 #define PCI_DEVICE_ID_VIA_8754C_0 0x3168 #define PCI_DEVICE_ID_VIA_8235 0x3177 -#define PCI_DEVICE_ID_VIA_P4N333 0x3178 #define PCI_DEVICE_ID_VIA_8385_0 0x3188 #define PCI_DEVICE_ID_VIA_8377_0 0x3189 #define PCI_DEVICE_ID_VIA_8378_0 0x3205 #define PCI_DEVICE_ID_VIA_8783_0 0x3208 -#define PCI_DEVICE_ID_VIA_P4M400 0x3209 #define PCI_DEVICE_ID_VIA_8237 0x3227 #define PCI_DEVICE_ID_VIA_3296_0 0x0296 -#define PCI_DEVICE_ID_VIA_86C100A 0x6100 #define PCI_DEVICE_ID_VIA_8231 0x8231 #define PCI_DEVICE_ID_VIA_8231_4 0x8235 #define PCI_DEVICE_ID_VIA_8365_1 0x8305 #define PCI_DEVICE_ID_VIA_8371_1 0x8391 -#define PCI_DEVICE_ID_VIA_8501_1 0x8501 -#define PCI_DEVICE_ID_VIA_82C597_1 0x8597 #define PCI_DEVICE_ID_VIA_82C598_1 0x8598 -#define PCI_DEVICE_ID_VIA_8601_1 0x8601 -#define PCI_DEVICE_ID_VIA_8505_1 0x8605 -#define PCI_DEVICE_ID_VIA_8633_1 0xB091 -#define PCI_DEVICE_ID_VIA_8367_1 0xB099 -#define PCI_DEVICE_ID_VIA_P4X266_1 0xB101 -#define PCI_DEVICE_ID_VIA_8615_1 0xB103 -#define PCI_DEVICE_ID_VIA_8361_1 0xB112 -#define PCI_DEVICE_ID_VIA_8235_1 0xB168 #define PCI_DEVICE_ID_VIA_838X_1 0xB188 #define PCI_DEVICE_ID_VIA_83_87XX_1 0xB198 #define PCI_VENDOR_ID_SIEMENS 0x110A #define PCI_DEVICE_ID_SIEMENS_DSCC4 0x2102 -#define PCI_VENDOR_ID_SMC2 0x1113 -#define PCI_DEVICE_ID_SMC2_1211TX 0x1211 #define PCI_VENDOR_ID_VORTEX 0x1119 #define PCI_DEVICE_ID_VORTEX_GDT60x0 0x0000 @@ -1496,18 +1278,6 @@ #define PCI_DEVICE_ID_VORTEX_GDT6557RP 0x0103 #define PCI_DEVICE_ID_VORTEX_GDT6x11RP 0x0104 #define PCI_DEVICE_ID_VORTEX_GDT6x21RP 0x0105 -#define PCI_DEVICE_ID_VORTEX_GDT6x17RP1 0x0110 -#define PCI_DEVICE_ID_VORTEX_GDT6x27RP1 0x0111 -#define PCI_DEVICE_ID_VORTEX_GDT6537RP1 0x0112 -#define PCI_DEVICE_ID_VORTEX_GDT6557RP1 0x0113 -#define PCI_DEVICE_ID_VORTEX_GDT6x11RP1 0x0114 -#define PCI_DEVICE_ID_VORTEX_GDT6x21RP1 0x0115 -#define PCI_DEVICE_ID_VORTEX_GDT6x17RP2 0x0120 -#define PCI_DEVICE_ID_VORTEX_GDT6x27RP2 0x0121 -#define PCI_DEVICE_ID_VORTEX_GDT6537RP2 0x0122 -#define PCI_DEVICE_ID_VORTEX_GDT6557RP2 0x0123 -#define PCI_DEVICE_ID_VORTEX_GDT6x11RP2 0x0124 -#define PCI_DEVICE_ID_VORTEX_GDT6x21RP2 0x0125 #define PCI_VENDOR_ID_EF 0x111a #define PCI_DEVICE_ID_EF_ATM_FPGA 0x0000 @@ -1519,21 +1289,15 @@ #define PCI_DEVICE_ID_IDT_IDT77201 0x0001 #define PCI_VENDOR_ID_FORE 0x1127 -#define PCI_DEVICE_ID_FORE_PCA200PC 0x0210 #define PCI_DEVICE_ID_FORE_PCA200E 0x0300 -#define PCI_VENDOR_ID_IMAGINGTECH 0x112f -#define PCI_DEVICE_ID_IMAGINGTECH_ICPCI 0x0000 #define PCI_VENDOR_ID_PHILIPS 0x1131 -#define PCI_DEVICE_ID_PHILIPS_SAA7145 0x7145 #define PCI_DEVICE_ID_PHILIPS_SAA7146 0x7146 #define PCI_DEVICE_ID_PHILIPS_SAA9730 0x9730 #define PCI_VENDOR_ID_EICON 0x1133 -#define PCI_DEVICE_ID_EICON_DIVA20PRO 0xe001 #define PCI_DEVICE_ID_EICON_DIVA20 0xe002 -#define PCI_DEVICE_ID_EICON_DIVA20PRO_U 0xe003 #define PCI_DEVICE_ID_EICON_DIVA20_U 0xe004 #define PCI_DEVICE_ID_EICON_DIVA201 0xe005 #define PCI_DEVICE_ID_EICON_DIVA202 0xe00b @@ -1545,35 +1309,17 @@ #define PCI_VENDOR_ID_ZIATECH 0x1138 #define PCI_DEVICE_ID_ZIATECH_5550_HC 0x5550 -#define PCI_VENDOR_ID_CYCLONE 0x113c -#define PCI_DEVICE_ID_CYCLONE_SDK 0x0001 -#define PCI_VENDOR_ID_ALLIANCE 0x1142 -#define PCI_DEVICE_ID_ALLIANCE_PROMOTIO 0x3210 -#define PCI_DEVICE_ID_ALLIANCE_PROVIDEO 0x6422 -#define PCI_DEVICE_ID_ALLIANCE_AT24 0x6424 -#define PCI_DEVICE_ID_ALLIANCE_AT3D 0x643d #define PCI_VENDOR_ID_SYSKONNECT 0x1148 -#define PCI_DEVICE_ID_SYSKONNECT_FP 0x4000 #define PCI_DEVICE_ID_SYSKONNECT_TR 0x4200 #define PCI_DEVICE_ID_SYSKONNECT_GE 0x4300 #define PCI_DEVICE_ID_SYSKONNECT_YU 0x4320 #define PCI_DEVICE_ID_SYSKONNECT_9DXX 0x4400 #define PCI_DEVICE_ID_SYSKONNECT_9MXX 0x4500 -#define PCI_VENDOR_ID_VMIC 0x114a -#define PCI_DEVICE_ID_VMIC_VME 0x7587 #define PCI_VENDOR_ID_DIGI 0x114f -#define PCI_DEVICE_ID_DIGI_EPC 0x0002 -#define PCI_DEVICE_ID_DIGI_RIGHTSWITCH 0x0003 -#define PCI_DEVICE_ID_DIGI_XEM 0x0004 -#define PCI_DEVICE_ID_DIGI_XR 0x0005 -#define PCI_DEVICE_ID_DIGI_CX 0x0006 -#define PCI_DEVICE_ID_DIGI_XRJ 0x0009 -#define PCI_DEVICE_ID_DIGI_EPCJ 0x000a -#define PCI_DEVICE_ID_DIGI_XR_920 0x0027 #define PCI_DEVICE_ID_DIGI_DF_M_IOM2_E 0x0070 #define PCI_DEVICE_ID_DIGI_DF_M_E 0x0071 #define PCI_DEVICE_ID_DIGI_DF_M_IOM2_A 0x0072 @@ -1583,23 +1329,15 @@ #define PCI_DEVICE_ID_NEO_2RJ45 0x00CA #define PCI_DEVICE_ID_NEO_2RJ45PRI 0x00CB -#define PCI_VENDOR_ID_MUTECH 0x1159 -#define PCI_DEVICE_ID_MUTECH_MV1000 0x0001 #define PCI_VENDOR_ID_XIRCOM 0x115d -#define PCI_DEVICE_ID_XIRCOM_X3201_ETH 0x0003 #define PCI_DEVICE_ID_XIRCOM_RBM56G 0x0101 #define PCI_DEVICE_ID_XIRCOM_X3201_MDM 0x0103 -#define PCI_VENDOR_ID_RENDITION 0x1163 -#define PCI_DEVICE_ID_RENDITION_VERITE 0x0001 -#define PCI_DEVICE_ID_RENDITION_VERITE2100 0x2000 #define PCI_VENDOR_ID_SERVERWORKS 0x1166 #define PCI_DEVICE_ID_SERVERWORKS_HE 0x0008 #define PCI_DEVICE_ID_SERVERWORKS_LE 0x0009 -#define PCI_DEVICE_ID_SERVERWORKS_CIOB30 0x0010 -#define PCI_DEVICE_ID_SERVERWORKS_CMIC_HE 0x0011 #define PCI_DEVICE_ID_SERVERWORKS_GCNB_LE 0x0017 #define PCI_DEVICE_ID_SERVERWORKS_OSB4 0x0200 #define PCI_DEVICE_ID_SERVERWORKS_CSB5 0x0201 @@ -1609,13 +1347,7 @@ #define PCI_DEVICE_ID_SERVERWORKS_CSB6IDE 0x0213 #define PCI_DEVICE_ID_SERVERWORKS_HT1000IDE 0x0214 #define PCI_DEVICE_ID_SERVERWORKS_CSB6IDE2 0x0217 -#define PCI_DEVICE_ID_SERVERWORKS_OSB4USB 0x0220 -#define PCI_DEVICE_ID_SERVERWORKS_CSB5USB PCI_DEVICE_ID_SERVERWORKS_OSB4USB -#define PCI_DEVICE_ID_SERVERWORKS_CSB6USB 0x0221 #define PCI_DEVICE_ID_SERVERWORKS_CSB6LPC 0x0227 -#define PCI_DEVICE_ID_SERVERWORKS_GCLE 0x0225 -#define PCI_DEVICE_ID_SERVERWORKS_GCLE2 0x0227 -#define PCI_DEVICE_ID_SERVERWORKS_CSB5ISA 0x0230 #define PCI_VENDOR_ID_SBE 0x1176 #define PCI_DEVICE_ID_SBE_WANXL100 0x0301 @@ -1626,17 +1358,12 @@ #define PCI_DEVICE_ID_TOSHIBA_PICCOLO 0x0102 #define PCI_DEVICE_ID_TOSHIBA_PICCOLO_1 0x0103 #define PCI_DEVICE_ID_TOSHIBA_PICCOLO_2 0x0105 -#define PCI_DEVICE_ID_TOSHIBA_601 0x0601 #define PCI_DEVICE_ID_TOSHIBA_TOPIC95 0x060a -#define PCI_DEVICE_ID_TOSHIBA_TOPIC95_A 0x0603 -#define PCI_DEVICE_ID_TOSHIBA_TOPIC95_B 0x060a #define PCI_DEVICE_ID_TOSHIBA_TOPIC97 0x060f #define PCI_DEVICE_ID_TOSHIBA_TOPIC100 0x0617 #define PCI_VENDOR_ID_TOSHIBA_2 0x102f -#define PCI_DEVICE_ID_TOSHIBA_TX3927 0x000a #define PCI_DEVICE_ID_TOSHIBA_TC35815CF 0x0030 -#define PCI_DEVICE_ID_TOSHIBA_TX4927 0x0180 #define PCI_DEVICE_ID_TOSHIBA_TC86C001_MISC 0x0108 #define PCI_DEVICE_ID_TOSHIBA_SPIDER_NET 0x01b3 @@ -1651,7 +1378,6 @@ #define PCI_DEVICE_ID_DLINK_DGE510T 0x4c00 #define PCI_VENDOR_ID_ARTOP 0x1191 -#define PCI_DEVICE_ID_ARTOP_ATP8400 0x0004 #define PCI_DEVICE_ID_ARTOP_ATP850UF 0x0005 #define PCI_DEVICE_ID_ARTOP_ATP860 0x0006 #define PCI_DEVICE_ID_ARTOP_ATP860R 0x0007 @@ -1664,16 +1390,11 @@ #define PCI_DEVICE_ID_ARTOP_AEC7612D 0x8040 #define PCI_DEVICE_ID_ARTOP_AEC7612SUW 0x8050 #define PCI_DEVICE_ID_ARTOP_8060 0x8060 -#define PCI_DEVICE_ID_ARTOP_AEC67160 0x8080 -#define PCI_DEVICE_ID_ARTOP_AEC67160_2 0x8081 -#define PCI_DEVICE_ID_ARTOP_AEC67162 0x808a #define PCI_VENDOR_ID_ZEITNET 0x1193 #define PCI_DEVICE_ID_ZEITNET_1221 0x0001 #define PCI_DEVICE_ID_ZEITNET_1225 0x0002 -#define PCI_VENDOR_ID_OMEGA 0x119b -#define PCI_DEVICE_ID_OMEGA_82C092G 0x1221 #define PCI_VENDOR_ID_FUJITSU_ME 0x119e #define PCI_DEVICE_ID_FUJITSU_FS155 0x0001 @@ -1683,7 +1404,6 @@ #define PCI_SUBDEVICE_ID_KEYSPAN_SX2 0x5334 #define PCI_VENDOR_ID_MARVELL 0x11ab -#define PCI_DEVICE_ID_MARVELL_GT64011 0x4146 #define PCI_DEVICE_ID_MARVELL_GT64111 0x4146 #define PCI_DEVICE_ID_MARVELL_GT64260 0x6430 #define PCI_DEVICE_ID_MARVELL_MV64360 0x6460 @@ -1691,53 +1411,35 @@ #define PCI_DEVICE_ID_MARVELL_GT96100 0x9652 #define PCI_DEVICE_ID_MARVELL_GT96100A 0x9653 -#define PCI_VENDOR_ID_LITEON 0x11ad -#define PCI_DEVICE_ID_LITEON_LNE100TX 0x0002 #define PCI_VENDOR_ID_V3 0x11b0 #define PCI_DEVICE_ID_V3_V960 0x0001 -#define PCI_DEVICE_ID_V3_V350 0x0001 -#define PCI_DEVICE_ID_V3_V961 0x0002 #define PCI_DEVICE_ID_V3_V351 0x0002 -#define PCI_VENDOR_ID_NP 0x11bc -#define PCI_DEVICE_ID_NP_PCI_FDDI 0x0001 #define PCI_VENDOR_ID_ATT 0x11c1 -#define PCI_DEVICE_ID_ATT_L56XMF 0x0440 #define PCI_DEVICE_ID_ATT_VENUS_MODEM 0x480 -#define PCI_VENDOR_ID_NEC2 0x11c3 /* NEC (2nd) */ #define PCI_VENDOR_ID_SPECIALIX 0x11cb #define PCI_DEVICE_ID_SPECIALIX_IO8 0x2000 -#define PCI_DEVICE_ID_SPECIALIX_XIO 0x4000 #define PCI_DEVICE_ID_SPECIALIX_RIO 0x8000 #define PCI_SUBDEVICE_ID_SPECIALIX_SPEED4 0xa004 -#define PCI_VENDOR_ID_AURAVISION 0x11d1 -#define PCI_DEVICE_ID_AURAVISION_VXP524 0x01f7 #define PCI_VENDOR_ID_ANALOG_DEVICES 0x11d4 #define PCI_DEVICE_ID_AD1889JS 0x1889 -#define PCI_VENDOR_ID_IKON 0x11d5 -#define PCI_DEVICE_ID_IKON_10115 0x0115 -#define PCI_DEVICE_ID_IKON_10117 0x0117 -#define PCI_VENDOR_ID_SEGA 0x11db #define PCI_DEVICE_ID_SEGA_BBA 0x1234 #define PCI_VENDOR_ID_ZORAN 0x11de #define PCI_DEVICE_ID_ZORAN_36057 0x6057 #define PCI_DEVICE_ID_ZORAN_36120 0x6120 -#define PCI_VENDOR_ID_KINETIC 0x11f4 -#define PCI_DEVICE_ID_KINETIC_2915 0x2915 #define PCI_VENDOR_ID_COMPEX 0x11f6 #define PCI_DEVICE_ID_COMPEX_ENET100VG4 0x0112 -#define PCI_DEVICE_ID_COMPEX_RL2000 0x1401 #define PCI_VENDOR_ID_RP 0x11fe #define PCI_DEVICE_ID_RP32INTF 0x0001 @@ -1751,7 +1453,6 @@ #define PCI_DEVICE_ID_RP16SNI 0x0009 #define PCI_DEVICE_ID_RPP4 0x000A #define PCI_DEVICE_ID_RPP8 0x000B -#define PCI_DEVICE_ID_RP8M 0x000C #define PCI_DEVICE_ID_RP4M 0x000D #define PCI_DEVICE_ID_RP2_232 0x000E #define PCI_DEVICE_ID_RP2_422 0x000F @@ -1779,10 +1480,6 @@ #define PCI_DEVICE_ID_PC300_TE_M_2 0x0320 #define PCI_DEVICE_ID_PC300_TE_M_1 0x0321 -/* Allied Telesyn */ -#define PCI_VENDOR_ID_AT 0x1259 -#define PCI_SUBDEVICE_ID_AT_2701FX 0x2703 - #define PCI_VENDOR_ID_ESSENTIAL 0x120f #define PCI_DEVICE_ID_ESSENTIAL_ROADRUNNER 0x0001 @@ -1799,10 +1496,7 @@ #define PCI_DEVICE_ID_3DFX_VOODOO3 0x0005 #define PCI_DEVICE_ID_3DFX_VOODOO5 0x0009 -#define PCI_VENDOR_ID_SIGMADES 0x1236 -#define PCI_DEVICE_ID_SIGMADES_6425 0x6401 -#define PCI_VENDOR_ID_CCUBE 0x123f #define PCI_VENDOR_ID_AVM 0x1244 #define PCI_DEVICE_ID_AVM_B1 0x0700 @@ -1812,19 +1506,8 @@ #define PCI_DEVICE_ID_AVM_C2 0x1100 #define PCI_DEVICE_ID_AVM_T1 0x1200 -#define PCI_VENDOR_ID_DIPIX 0x1246 #define PCI_VENDOR_ID_STALLION 0x124d -#define PCI_DEVICE_ID_STALLION_ECHPCI832 0x0000 -#define PCI_DEVICE_ID_STALLION_ECHPCI864 0x0002 -#define PCI_DEVICE_ID_STALLION_EIOPCI 0x0003 - -#define PCI_VENDOR_ID_OPTIBASE 0x1255 -#define PCI_DEVICE_ID_OPTIBASE_FORGE 0x1110 -#define PCI_DEVICE_ID_OPTIBASE_FUSION 0x1210 -#define PCI_DEVICE_ID_OPTIBASE_VPLEX 0x2110 -#define PCI_DEVICE_ID_OPTIBASE_VPLEXCC 0x2120 -#define PCI_DEVICE_ID_OPTIBASE_VQUEST 0x2130 /* Allied Telesyn */ #define PCI_VENDOR_ID_AT 0x1259 @@ -1833,7 +1516,6 @@ #define PCI_VENDOR_ID_ESS 0x125d #define PCI_DEVICE_ID_ESS_ESS1968 0x1968 -#define PCI_DEVICE_ID_ESS_AUDIOPCI 0x1969 #define PCI_DEVICE_ID_ESS_ESS1978 0x1978 #define PCI_DEVICE_ID_ESS_ALLEGRO_1 0x1988 #define PCI_DEVICE_ID_ESS_ALLEGRO 0x1989 @@ -1846,11 +1528,7 @@ #define PCI_VENDOR_ID_SATSAGEM 0x1267 #define PCI_DEVICE_ID_SATSAGEM_NICCY 0x1016 -#define PCI_DEVICE_ID_SATSAGEM_PCR2101 0x5352 -#define PCI_DEVICE_ID_SATSAGEM_TELSATTURBO 0x5a4b -#define PCI_VENDOR_ID_HUGHES 0x1273 -#define PCI_DEVICE_ID_HUGHES_DIRECPC 0x0002 #define PCI_VENDOR_ID_ENSONIQ 0x1274 #define PCI_DEVICE_ID_ENSONIQ_CT5880 0x5880 @@ -1871,13 +1549,10 @@ #define PCI_DEVICE_ID_ITE_IT8330G_0 0xe886 /* formerly Platform Tech */ -#define PCI_VENDOR_ID_ESS_OLD 0x1285 #define PCI_DEVICE_ID_ESS_ESS0100 0x0100 #define PCI_VENDOR_ID_ALTEON 0x12ae -#define PCI_DEVICE_ID_ALTEON_ACENIC 0x0001 -#define PCI_VENDOR_ID_USR 0x12B9 #define PCI_SUBVENDOR_ID_CONNECT_TECH 0x12c4 #define PCI_SUBDEVICE_ID_CONNECT_TECH_BH8_232 0x0001 @@ -1892,8 +1567,6 @@ #define PCI_SUBDEVICE_ID_CONNECT_TECH_BH081101V1 0x000A #define PCI_SUBDEVICE_ID_CONNECT_TECH_BH041101V1 0x000B -#define PCI_VENDOR_ID_PICTUREL 0x12c5 -#define PCI_DEVICE_ID_PICTUREL_PCIVST 0x0081 #define PCI_VENDOR_ID_NVIDIA_SGS 0x12d2 #define PCI_DEVICE_ID_NVIDIA_SGS_RIVA128 0x0018 @@ -1915,8 +1588,6 @@ #define PCI_VENDOR_ID_ELECTRONICDESIGNGMBH 0x12f8 #define PCI_DEVICE_ID_LML_33R10 0x8a02 -#define PCI_VENDOR_ID_CBOARDS 0x1307 -#define PCI_DEVICE_ID_CBOARDS_DAS1602_16 0x0001 #define PCI_VENDOR_ID_SIIG 0x131f #define PCI_SUBVENDOR_ID_SIIG 0x131f @@ -1960,7 +1631,6 @@ #define PCI_SUBDEVICE_ID_SIIG_QUARTET_SERIAL 0x2050 #define PCI_VENDOR_ID_RADISYS 0x1331 -#define PCI_DEVICE_ID_RADISYS_ENP2611 0x0030 #define PCI_VENDOR_ID_DOMEX 0x134a #define PCI_DEVICE_ID_DOMEX_DMX3191D 0x0001 @@ -1968,8 +1638,6 @@ #define PCI_VENDOR_ID_QUATECH 0x135C #define PCI_DEVICE_ID_QUATECH_QSC100 0x0010 #define PCI_DEVICE_ID_QUATECH_DSC100 0x0020 -#define PCI_DEVICE_ID_QUATECH_DSC200 0x0030 -#define PCI_DEVICE_ID_QUATECH_QSC200 0x0040 #define PCI_DEVICE_ID_QUATECH_ESC100D 0x0050 #define PCI_DEVICE_ID_QUATECH_ESC100M 0x0060 @@ -1988,7 +1656,6 @@ #define PCI_SUBDEVICE_ID_HYPERCOPE_ERGO 0x0106 #define PCI_SUBDEVICE_ID_HYPERCOPE_METRO 0x0107 #define PCI_SUBDEVICE_ID_HYPERCOPE_CHAMP2 0x0108 -#define PCI_SUBDEVICE_ID_HYPERCOPE_PLEXUS 0x0109 #define PCI_VENDOR_ID_KAWASAKI 0x136b #define PCI_DEVICE_ID_MCHIP_KL5A72002 0xff01 @@ -2002,12 +1669,9 @@ #define PCI_DEVICE_ID_LMC_SSI 0x0005 #define PCI_DEVICE_ID_LMC_T1 0x0006 -#define PCI_VENDOR_ID_MARIAN 0x1382 -#define PCI_DEVICE_ID_MARIAN_PRODIF_PLUS 0x2048 #define PCI_VENDOR_ID_NETGEAR 0x1385 #define PCI_DEVICE_ID_NETGEAR_GA620 0x620a -#define PCI_DEVICE_ID_NETGEAR_GA622 0x622a #define PCI_VENDOR_ID_APPLICOM 0x1389 #define PCI_DEVICE_ID_APPLICOM_PCIGENERIC 0x0001 @@ -2030,9 +1694,6 @@ #define PCI_DEVICE_ID_MOXA_CP134U 0x1340 #define PCI_DEVICE_ID_MOXA_C168 0x1680 #define PCI_DEVICE_ID_MOXA_CP168U 0x1681 -#define PCI_DEVICE_ID_MOXA_CP204J 0x2040 -#define PCI_DEVICE_ID_MOXA_C218 0x2180 -#define PCI_DEVICE_ID_MOXA_C320 0x3200 #define PCI_VENDOR_ID_CCD 0x1397 #define PCI_DEVICE_ID_CCD_2BD0 0x2bd0 @@ -2053,9 +1714,7 @@ #define PCI_VENDOR_ID_MICROGATE 0x13c0 #define PCI_DEVICE_ID_MICROGATE_USC 0x0010 -#define PCI_DEVICE_ID_MICROGATE_SCC 0x0020 #define PCI_DEVICE_ID_MICROGATE_SCA 0x0030 -#define PCI_DEVICE_ID_MICROGATE_USC2 0x0210 #define PCI_VENDOR_ID_3WARE 0x13C1 #define PCI_DEVICE_ID_3WARE_1000 0x1000 @@ -2106,10 +1765,6 @@ #define PCI_VENDOR_ID_SAMSUNG 0x144d -#define PCI_VENDOR_ID_AIRONET 0x14b9 -#define PCI_DEVICE_ID_AIRONET_4800_1 0x0001 -#define PCI_DEVICE_ID_AIRONET_4800 0x4500 // values switched? see -#define PCI_DEVICE_ID_AIRONET_4500 0x4800 // drivers/net/aironet4500_card.c #define PCI_VENDOR_ID_TITAN 0x14D2 #define PCI_DEVICE_ID_TITAN_010L 0x8001 @@ -2128,8 +1783,6 @@ #define PCI_DEVICE_ID_PANACOM_QUADMODEM 0x0400 #define PCI_DEVICE_ID_PANACOM_DUALMODEM 0x0402 -#define PCI_VENDOR_ID_SIPACKETS 0x14d9 -#define PCI_DEVICE_ID_SP_HT 0x0010 #define PCI_VENDOR_ID_AFAVLAB 0x14db #define PCI_DEVICE_ID_AFAVLAB_P028 0x2180 @@ -2145,6 +1798,7 @@ #define PCI_DEVICE_ID_TIGON3_5704 0x1648 #define PCI_DEVICE_ID_TIGON3_5704S_2 0x1649 #define PCI_DEVICE_ID_NX2_5706 0x164a +#define PCI_DEVICE_ID_NX2_5708 0x164c #define PCI_DEVICE_ID_TIGON3_5702FE 0x164d #define PCI_DEVICE_ID_TIGON3_5705 0x1653 #define PCI_DEVICE_ID_TIGON3_5705_2 0x1654 @@ -2152,11 +1806,13 @@ #define PCI_DEVICE_ID_TIGON3_5721 0x1659 #define PCI_DEVICE_ID_TIGON3_5705M 0x165d #define PCI_DEVICE_ID_TIGON3_5705M_2 0x165e +#define PCI_DEVICE_ID_TIGON3_5714 0x1668 #define PCI_DEVICE_ID_TIGON3_5780 0x166a #define PCI_DEVICE_ID_TIGON3_5780S 0x166b #define PCI_DEVICE_ID_TIGON3_5705F 0x166e #define PCI_DEVICE_ID_TIGON3_5750 0x1676 #define PCI_DEVICE_ID_TIGON3_5751 0x1677 +#define PCI_DEVICE_ID_TIGON3_5715 0x1678 #define PCI_DEVICE_ID_TIGON3_5750M 0x167c #define PCI_DEVICE_ID_TIGON3_5751M 0x167d #define PCI_DEVICE_ID_TIGON3_5751F 0x167e @@ -2167,6 +1823,7 @@ #define PCI_DEVICE_ID_TIGON3_5703X 0x16a7 #define PCI_DEVICE_ID_TIGON3_5704S 0x16a8 #define PCI_DEVICE_ID_NX2_5706S 0x16aa +#define PCI_DEVICE_ID_NX2_5708S 0x16ac #define PCI_DEVICE_ID_TIGON3_5702A3 0x16c6 #define PCI_DEVICE_ID_TIGON3_5703A3 0x16c7 #define PCI_DEVICE_ID_TIGON3_5781 0x16dd @@ -2186,11 +1843,14 @@ #define PCI_DEVICE_ID_ENE_1211 0x1211 #define PCI_DEVICE_ID_ENE_1225 0x1225 #define PCI_DEVICE_ID_ENE_1410 0x1410 +#define PCI_DEVICE_ID_ENE_710 0x1411 +#define PCI_DEVICE_ID_ENE_712 0x1412 #define PCI_DEVICE_ID_ENE_1420 0x1420 +#define PCI_DEVICE_ID_ENE_720 0x1421 +#define PCI_DEVICE_ID_ENE_722 0x1422 + #define PCI_VENDOR_ID_CHELSIO 0x1425 -#define PCI_VENDOR_ID_MIPS 0x153f -#define PCI_DEVICE_ID_SOC_IT 0x0001 #define PCI_VENDOR_ID_SYBA 0x1592 #define PCI_DEVICE_ID_SYBA_2P_EPP 0x0782 @@ -2210,15 +1870,7 @@ #define PCI_DEVICE_ID_MELLANOX_SINAI 0x6274 #define PCI_VENDOR_ID_PDC 0x15e9 -#define PCI_DEVICE_ID_PDC_1841 0x1841 -#define PCI_VENDOR_ID_MACROLINK 0x15ed -#define PCI_DEVICE_ID_MACROLINK_MCCS8 0x1000 -#define PCI_DEVICE_ID_MACROLINK_MCCS 0x1001 -#define PCI_DEVICE_ID_MACROLINK_MCCS8H 0x1002 -#define PCI_DEVICE_ID_MACROLINK_MCCSH 0x1003 -#define PCI_DEVICE_ID_MACROLINK_MCCR8 0x2000 -#define PCI_DEVICE_ID_MACROLINK_MCCR 0x2001 #define PCI_VENDOR_ID_FARSITE 0x1619 #define PCI_DEVICE_ID_FARSITE_T2P 0x0400 @@ -2236,7 +1888,6 @@ #define PCI_DEVICE_ID_REVOLUTION 0x0044 #define PCI_VENDOR_ID_LINKSYS 0x1737 -#define PCI_DEVICE_ID_LINKSYS_EG1032 0x1032 #define PCI_DEVICE_ID_LINKSYS_EG1064 0x1064 #define PCI_VENDOR_ID_ALTIMA 0x173b @@ -2251,7 +1902,6 @@ #define PCI_DEVICE_ID_HERC_WIN 0x5732 #define PCI_DEVICE_ID_HERC_UNI 0x5832 -#define PCI_VENDOR_ID_INFINICON 0x1820 #define PCI_VENDOR_ID_SITECOM 0x182d #define PCI_DEVICE_ID_SITECOM_DC105V2 0x3069 @@ -2261,8 +1911,6 @@ #define PCI_VENDOR_ID_TDI 0x192E #define PCI_DEVICE_ID_TDI_EHCI 0x0101 -#define PCI_VENDOR_ID_SYMPHONY 0x1c1c -#define PCI_DEVICE_ID_SYMPHONY_101 0x0001 #define PCI_VENDOR_ID_TEKRAM 0x1de1 #define PCI_DEVICE_ID_TEKRAM_DC290 0xdc29 @@ -2271,70 +1919,33 @@ #define PCI_DEVICE_ID_HINT_VXPROII_IDE 0x8013 #define PCI_VENDOR_ID_3DLABS 0x3d3d -#define PCI_DEVICE_ID_3DLABS_300SX 0x0001 -#define PCI_DEVICE_ID_3DLABS_500TX 0x0002 -#define PCI_DEVICE_ID_3DLABS_DELTA 0x0003 -#define PCI_DEVICE_ID_3DLABS_PERMEDIA 0x0004 -#define PCI_DEVICE_ID_3DLABS_MX 0x0006 #define PCI_DEVICE_ID_3DLABS_PERMEDIA2 0x0007 -#define PCI_DEVICE_ID_3DLABS_GAMMA 0x0008 #define PCI_DEVICE_ID_3DLABS_PERMEDIA2V 0x0009 -#define PCI_VENDOR_ID_AVANCE 0x4005 -#define PCI_DEVICE_ID_AVANCE_ALG2064 0x2064 -#define PCI_DEVICE_ID_AVANCE_2302 0x2302 #define PCI_VENDOR_ID_AKS 0x416c #define PCI_DEVICE_ID_AKS_ALADDINCARD 0x0100 -#define PCI_DEVICE_ID_AKS_CPC 0x0200 -#define PCI_VENDOR_ID_REDCREEK 0x4916 -#define PCI_DEVICE_ID_RC45 0x1960 -#define PCI_VENDOR_ID_NETVIN 0x4a14 -#define PCI_DEVICE_ID_NETVIN_NV5000SC 0x5000 #define PCI_VENDOR_ID_S3 0x5333 -#define PCI_DEVICE_ID_S3_PLATO_PXS 0x0551 -#define PCI_DEVICE_ID_S3_ViRGE 0x5631 #define PCI_DEVICE_ID_S3_TRIO 0x8811 -#define PCI_DEVICE_ID_S3_AURORA64VP 0x8812 -#define PCI_DEVICE_ID_S3_TRIO64UVP 0x8814 -#define PCI_DEVICE_ID_S3_ViRGE_VX 0x883d #define PCI_DEVICE_ID_S3_868 0x8880 -#define PCI_DEVICE_ID_S3_928 0x88b0 -#define PCI_DEVICE_ID_S3_864_1 0x88c0 -#define PCI_DEVICE_ID_S3_864_2 0x88c1 -#define PCI_DEVICE_ID_S3_964_1 0x88d0 -#define PCI_DEVICE_ID_S3_964_2 0x88d1 #define PCI_DEVICE_ID_S3_968 0x88f0 -#define PCI_DEVICE_ID_S3_TRIO64V2 0x8901 -#define PCI_DEVICE_ID_S3_PLATO_PXG 0x8902 -#define PCI_DEVICE_ID_S3_ViRGE_DXGX 0x8a01 -#define PCI_DEVICE_ID_S3_ViRGE_GX2 0x8a10 #define PCI_DEVICE_ID_S3_SAVAGE4 0x8a25 -#define PCI_DEVICE_ID_S3_ViRGE_MX 0x8c01 -#define PCI_DEVICE_ID_S3_ViRGE_MXP 0x8c02 -#define PCI_DEVICE_ID_S3_ViRGE_MXPMV 0x8c03 #define PCI_DEVICE_ID_S3_PROSAVAGE8 0x8d04 #define PCI_DEVICE_ID_S3_SONICVIBES 0xca00 #define PCI_VENDOR_ID_DUNORD 0x5544 #define PCI_DEVICE_ID_DUNORD_I3000 0x0001 + #define PCI_VENDOR_ID_DCI 0x6666 #define PCI_DEVICE_ID_DCI_PCCOM4 0x0001 #define PCI_DEVICE_ID_DCI_PCCOM8 0x0002 -#define PCI_VENDOR_ID_DUNORD 0x5544 -#define PCI_DEVICE_ID_DUNORD_I3000 0x0001 - -#define PCI_VENDOR_ID_GENROCO 0x5555 -#define PCI_DEVICE_ID_GENROCO_HFP832 0x0003 - #define PCI_VENDOR_ID_INTEL 0x8086 #define PCI_DEVICE_ID_INTEL_EESSC 0x0008 -#define PCI_DEVICE_ID_INTEL_21145 0x0039 #define PCI_DEVICE_ID_INTEL_PXHD_0 0x0320 #define PCI_DEVICE_ID_INTEL_PXHD_1 0x0321 #define PCI_DEVICE_ID_INTEL_PXH_0 0x0329 @@ -2343,30 +1954,17 @@ #define PCI_DEVICE_ID_INTEL_82375 0x0482 #define PCI_DEVICE_ID_INTEL_82424 0x0483 #define PCI_DEVICE_ID_INTEL_82378 0x0484 -#define PCI_DEVICE_ID_INTEL_82430 0x0486 -#define PCI_DEVICE_ID_INTEL_82434 0x04a3 #define PCI_DEVICE_ID_INTEL_I960 0x0960 #define PCI_DEVICE_ID_INTEL_I960RM 0x0962 -#define PCI_DEVICE_ID_INTEL_82562ET 0x1031 -#define PCI_DEVICE_ID_INTEL_82801CAM 0x1038 #define PCI_DEVICE_ID_INTEL_82815_MC 0x1130 -#define PCI_DEVICE_ID_INTEL_82815_AB 0x1131 #define PCI_DEVICE_ID_INTEL_82815_CGC 0x1132 -#define PCI_DEVICE_ID_INTEL_82559ER 0x1209 #define PCI_DEVICE_ID_INTEL_82092AA_0 0x1221 -#define PCI_DEVICE_ID_INTEL_82092AA_1 0x1222 -#define PCI_DEVICE_ID_INTEL_7116 0x1223 #define PCI_DEVICE_ID_INTEL_7505_0 0x2550 -#define PCI_DEVICE_ID_INTEL_7505_1 0x2552 #define PCI_DEVICE_ID_INTEL_7205_0 0x255d -#define PCI_DEVICE_ID_INTEL_82596 0x1226 -#define PCI_DEVICE_ID_INTEL_82865 0x1227 -#define PCI_DEVICE_ID_INTEL_82557 0x1229 #define PCI_DEVICE_ID_INTEL_82437 0x122d #define PCI_DEVICE_ID_INTEL_82371FB_0 0x122e #define PCI_DEVICE_ID_INTEL_82371FB_1 0x1230 #define PCI_DEVICE_ID_INTEL_82371MX 0x1234 -#define PCI_DEVICE_ID_INTEL_82437MX 0x1235 #define PCI_DEVICE_ID_INTEL_82441 0x1237 #define PCI_DEVICE_ID_INTEL_82380FB 0x124b #define PCI_DEVICE_ID_INTEL_82439 0x1250 @@ -2375,83 +1973,53 @@ #define PCI_DEVICE_ID_INTEL_82845_HB 0x1a30 #define PCI_DEVICE_ID_INTEL_82801AA_0 0x2410 #define PCI_DEVICE_ID_INTEL_82801AA_1 0x2411 -#define PCI_DEVICE_ID_INTEL_82801AA_2 0x2412 #define PCI_DEVICE_ID_INTEL_82801AA_3 0x2413 #define PCI_DEVICE_ID_INTEL_82801AA_5 0x2415 #define PCI_DEVICE_ID_INTEL_82801AA_6 0x2416 #define PCI_DEVICE_ID_INTEL_82801AA_8 0x2418 #define PCI_DEVICE_ID_INTEL_82801AB_0 0x2420 #define PCI_DEVICE_ID_INTEL_82801AB_1 0x2421 -#define PCI_DEVICE_ID_INTEL_82801AB_2 0x2422 #define PCI_DEVICE_ID_INTEL_82801AB_3 0x2423 #define PCI_DEVICE_ID_INTEL_82801AB_5 0x2425 #define PCI_DEVICE_ID_INTEL_82801AB_6 0x2426 #define PCI_DEVICE_ID_INTEL_82801AB_8 0x2428 #define PCI_DEVICE_ID_INTEL_82801BA_0 0x2440 -#define PCI_DEVICE_ID_INTEL_82801BA_1 0x2442 #define PCI_DEVICE_ID_INTEL_82801BA_2 0x2443 -#define PCI_DEVICE_ID_INTEL_82801BA_3 0x2444 #define PCI_DEVICE_ID_INTEL_82801BA_4 0x2445 -#define PCI_DEVICE_ID_INTEL_82801BA_5 0x2446 #define PCI_DEVICE_ID_INTEL_82801BA_6 0x2448 -#define PCI_DEVICE_ID_INTEL_82801BA_7 0x2449 #define PCI_DEVICE_ID_INTEL_82801BA_8 0x244a #define PCI_DEVICE_ID_INTEL_82801BA_9 0x244b #define PCI_DEVICE_ID_INTEL_82801BA_10 0x244c #define PCI_DEVICE_ID_INTEL_82801BA_11 0x244e #define PCI_DEVICE_ID_INTEL_82801E_0 0x2450 -#define PCI_DEVICE_ID_INTEL_82801E_2 0x2452 -#define PCI_DEVICE_ID_INTEL_82801E_3 0x2453 -#define PCI_DEVICE_ID_INTEL_82801E_9 0x2459 #define PCI_DEVICE_ID_INTEL_82801E_11 0x245b -#define PCI_DEVICE_ID_INTEL_82801E_13 0x245d -#define PCI_DEVICE_ID_INTEL_82801E_14 0x245e #define PCI_DEVICE_ID_INTEL_82801CA_0 0x2480 -#define PCI_DEVICE_ID_INTEL_82801CA_2 0x2482 #define PCI_DEVICE_ID_INTEL_82801CA_3 0x2483 -#define PCI_DEVICE_ID_INTEL_82801CA_4 0x2484 #define PCI_DEVICE_ID_INTEL_82801CA_5 0x2485 #define PCI_DEVICE_ID_INTEL_82801CA_6 0x2486 -#define PCI_DEVICE_ID_INTEL_82801CA_7 0x2487 #define PCI_DEVICE_ID_INTEL_82801CA_10 0x248a #define PCI_DEVICE_ID_INTEL_82801CA_11 0x248b #define PCI_DEVICE_ID_INTEL_82801CA_12 0x248c #define PCI_DEVICE_ID_INTEL_82801DB_0 0x24c0 #define PCI_DEVICE_ID_INTEL_82801DB_1 0x24c1 -#define PCI_DEVICE_ID_INTEL_82801DB_2 0x24c2 #define PCI_DEVICE_ID_INTEL_82801DB_3 0x24c3 -#define PCI_DEVICE_ID_INTEL_82801DB_4 0x24c4 #define PCI_DEVICE_ID_INTEL_82801DB_5 0x24c5 #define PCI_DEVICE_ID_INTEL_82801DB_6 0x24c6 -#define PCI_DEVICE_ID_INTEL_82801DB_7 0x24c7 #define PCI_DEVICE_ID_INTEL_82801DB_9 0x24c9 #define PCI_DEVICE_ID_INTEL_82801DB_10 0x24ca #define PCI_DEVICE_ID_INTEL_82801DB_11 0x24cb #define PCI_DEVICE_ID_INTEL_82801DB_12 0x24cc -#define PCI_DEVICE_ID_INTEL_82801DB_13 0x24cd #define PCI_DEVICE_ID_INTEL_82801EB_0 0x24d0 #define PCI_DEVICE_ID_INTEL_82801EB_1 0x24d1 -#define PCI_DEVICE_ID_INTEL_82801EB_2 0x24d2 #define PCI_DEVICE_ID_INTEL_82801EB_3 0x24d3 -#define PCI_DEVICE_ID_INTEL_82801EB_4 0x24d4 #define PCI_DEVICE_ID_INTEL_82801EB_5 0x24d5 #define PCI_DEVICE_ID_INTEL_82801EB_6 0x24d6 -#define PCI_DEVICE_ID_INTEL_82801EB_7 0x24d7 #define PCI_DEVICE_ID_INTEL_82801EB_11 0x24db -#define PCI_DEVICE_ID_INTEL_82801EB_13 0x24dd #define PCI_DEVICE_ID_INTEL_ESB_1 0x25a1 #define PCI_DEVICE_ID_INTEL_ESB_2 0x25a2 -#define PCI_DEVICE_ID_INTEL_ESB_3 0x25a3 -#define PCI_DEVICE_ID_INTEL_ESB_31 0x25b0 #define PCI_DEVICE_ID_INTEL_ESB_4 0x25a4 #define PCI_DEVICE_ID_INTEL_ESB_5 0x25a6 -#define PCI_DEVICE_ID_INTEL_ESB_6 0x25a7 -#define PCI_DEVICE_ID_INTEL_ESB_7 0x25a9 -#define PCI_DEVICE_ID_INTEL_ESB_8 0x25aa #define PCI_DEVICE_ID_INTEL_ESB_9 0x25ab -#define PCI_DEVICE_ID_INTEL_ESB_11 0x25ac -#define PCI_DEVICE_ID_INTEL_ESB_12 0x25ad -#define PCI_DEVICE_ID_INTEL_ESB_13 0x25ae #define PCI_DEVICE_ID_INTEL_82820_HB 0x2500 #define PCI_DEVICE_ID_INTEL_82820_UP_HB 0x2501 #define PCI_DEVICE_ID_INTEL_82850_HB 0x2530 @@ -2461,7 +2029,6 @@ #define PCI_DEVICE_ID_INTEL_82865_HB 0x2570 #define PCI_DEVICE_ID_INTEL_82865_IG 0x2572 #define PCI_DEVICE_ID_INTEL_82875_HB 0x2578 -#define PCI_DEVICE_ID_INTEL_82875_IG 0x257b #define PCI_DEVICE_ID_INTEL_82915G_HB 0x2580 #define PCI_DEVICE_ID_INTEL_82915G_IG 0x2582 #define PCI_DEVICE_ID_INTEL_82915GM_HB 0x2590 @@ -2471,80 +2038,23 @@ #define PCI_DEVICE_ID_INTEL_ICH6_0 0x2640 #define PCI_DEVICE_ID_INTEL_ICH6_1 0x2641 #define PCI_DEVICE_ID_INTEL_ICH6_2 0x2642 -#define PCI_DEVICE_ID_INTEL_ICH6_3 0x2651 -#define PCI_DEVICE_ID_INTEL_ICH6_4 0x2652 -#define PCI_DEVICE_ID_INTEL_ICH6_5 0x2653 -#define PCI_DEVICE_ID_INTEL_ICH6_6 0x2658 -#define PCI_DEVICE_ID_INTEL_ICH6_7 0x2659 -#define PCI_DEVICE_ID_INTEL_ICH6_8 0x265a -#define PCI_DEVICE_ID_INTEL_ICH6_9 0x265b -#define PCI_DEVICE_ID_INTEL_ICH6_10 0x265c -#define PCI_DEVICE_ID_INTEL_ICH6_11 0x2660 -#define PCI_DEVICE_ID_INTEL_ICH6_12 0x2662 -#define PCI_DEVICE_ID_INTEL_ICH6_13 0x2664 -#define PCI_DEVICE_ID_INTEL_ICH6_14 0x2666 -#define PCI_DEVICE_ID_INTEL_ICH6_15 0x2668 #define PCI_DEVICE_ID_INTEL_ICH6_16 0x266a #define PCI_DEVICE_ID_INTEL_ICH6_17 0x266d #define PCI_DEVICE_ID_INTEL_ICH6_18 0x266e #define PCI_DEVICE_ID_INTEL_ICH6_19 0x266f #define PCI_DEVICE_ID_INTEL_ESB2_0 0x2670 -#define PCI_DEVICE_ID_INTEL_ESB2_1 0x2680 -#define PCI_DEVICE_ID_INTEL_ESB2_2 0x2681 -#define PCI_DEVICE_ID_INTEL_ESB2_3 0x2682 -#define PCI_DEVICE_ID_INTEL_ESB2_4 0x2683 -#define PCI_DEVICE_ID_INTEL_ESB2_5 0x2688 -#define PCI_DEVICE_ID_INTEL_ESB2_6 0x2689 -#define PCI_DEVICE_ID_INTEL_ESB2_7 0x268a -#define PCI_DEVICE_ID_INTEL_ESB2_8 0x268b -#define PCI_DEVICE_ID_INTEL_ESB2_9 0x268c -#define PCI_DEVICE_ID_INTEL_ESB2_10 0x2690 -#define PCI_DEVICE_ID_INTEL_ESB2_11 0x2692 -#define PCI_DEVICE_ID_INTEL_ESB2_12 0x2694 -#define PCI_DEVICE_ID_INTEL_ESB2_13 0x2696 #define PCI_DEVICE_ID_INTEL_ESB2_14 0x2698 -#define PCI_DEVICE_ID_INTEL_ESB2_15 0x2699 -#define PCI_DEVICE_ID_INTEL_ESB2_16 0x269a #define PCI_DEVICE_ID_INTEL_ESB2_17 0x269b #define PCI_DEVICE_ID_INTEL_ESB2_18 0x269e #define PCI_DEVICE_ID_INTEL_ICH7_0 0x27b8 #define PCI_DEVICE_ID_INTEL_ICH7_1 0x27b9 -#define PCI_DEVICE_ID_INTEL_ICH7_2 0x27c0 -#define PCI_DEVICE_ID_INTEL_ICH7_3 0x27c1 #define PCI_DEVICE_ID_INTEL_ICH7_30 0x27b0 #define PCI_DEVICE_ID_INTEL_ICH7_31 0x27bd -#define PCI_DEVICE_ID_INTEL_ICH7_5 0x27c4 -#define PCI_DEVICE_ID_INTEL_ICH7_6 0x27c5 -#define PCI_DEVICE_ID_INTEL_ICH7_7 0x27c8 -#define PCI_DEVICE_ID_INTEL_ICH7_8 0x27c9 -#define PCI_DEVICE_ID_INTEL_ICH7_9 0x27ca -#define PCI_DEVICE_ID_INTEL_ICH7_10 0x27cb -#define PCI_DEVICE_ID_INTEL_ICH7_11 0x27cc -#define PCI_DEVICE_ID_INTEL_ICH7_12 0x27d0 -#define PCI_DEVICE_ID_INTEL_ICH7_13 0x27d2 -#define PCI_DEVICE_ID_INTEL_ICH7_14 0x27d4 -#define PCI_DEVICE_ID_INTEL_ICH7_15 0x27d6 -#define PCI_DEVICE_ID_INTEL_ICH7_16 0x27d8 #define PCI_DEVICE_ID_INTEL_ICH7_17 0x27da -#define PCI_DEVICE_ID_INTEL_ICH7_18 0x27dc #define PCI_DEVICE_ID_INTEL_ICH7_19 0x27dd #define PCI_DEVICE_ID_INTEL_ICH7_20 0x27de #define PCI_DEVICE_ID_INTEL_ICH7_21 0x27df -#define PCI_DEVICE_ID_INTEL_ICH7_22 0x27e0 -#define PCI_DEVICE_ID_INTEL_ICH7_23 0x27e2 #define PCI_DEVICE_ID_INTEL_82855PM_HB 0x3340 -#define PCI_DEVICE_ID_INTEL_ESB2_19 0x3500 -#define PCI_DEVICE_ID_INTEL_ESB2_20 0x3501 -#define PCI_DEVICE_ID_INTEL_ESB2_21 0x3504 -#define PCI_DEVICE_ID_INTEL_ESB2_22 0x3505 -#define PCI_DEVICE_ID_INTEL_ESB2_23 0x350c -#define PCI_DEVICE_ID_INTEL_ESB2_24 0x350d -#define PCI_DEVICE_ID_INTEL_ESB2_25 0x3510 -#define PCI_DEVICE_ID_INTEL_ESB2_26 0x3511 -#define PCI_DEVICE_ID_INTEL_ESB2_27 0x3514 -#define PCI_DEVICE_ID_INTEL_ESB2_28 0x3515 -#define PCI_DEVICE_ID_INTEL_ESB2_29 0x3518 -#define PCI_DEVICE_ID_INTEL_ESB2_30 0x3519 #define PCI_DEVICE_ID_INTEL_82830_HB 0x3575 #define PCI_DEVICE_ID_INTEL_82830_CGC 0x3577 #define PCI_DEVICE_ID_INTEL_82855GM_HB 0x3580 @@ -2558,7 +2068,6 @@ #define PCI_DEVICE_ID_INTEL_MCH_PC 0x3599 #define PCI_DEVICE_ID_INTEL_MCH_PC1 0x359a #define PCI_DEVICE_ID_INTEL_E7525_MCH 0x359e -#define PCI_DEVICE_ID_INTEL_80310 0x530d #define PCI_DEVICE_ID_INTEL_82371SB_0 0x7000 #define PCI_DEVICE_ID_INTEL_82371SB_1 0x7010 #define PCI_DEVICE_ID_INTEL_82371SB_2 0x7020 @@ -2583,22 +2092,15 @@ #define PCI_DEVICE_ID_INTEL_440MX_6 0x7196 #define PCI_DEVICE_ID_INTEL_82443MX_0 0x7198 #define PCI_DEVICE_ID_INTEL_82443MX_1 0x7199 -#define PCI_DEVICE_ID_INTEL_82443MX_2 0x719a #define PCI_DEVICE_ID_INTEL_82443MX_3 0x719b #define PCI_DEVICE_ID_INTEL_82443GX_0 0x71a0 -#define PCI_DEVICE_ID_INTEL_82443GX_1 0x71a1 #define PCI_DEVICE_ID_INTEL_82443GX_2 0x71a2 -#define PCI_DEVICE_ID_INTEL_82372FB_0 0x7600 #define PCI_DEVICE_ID_INTEL_82372FB_1 0x7601 -#define PCI_DEVICE_ID_INTEL_82372FB_2 0x7602 -#define PCI_DEVICE_ID_INTEL_82372FB_3 0x7603 #define PCI_DEVICE_ID_INTEL_82454GX 0x84c4 -#define PCI_DEVICE_ID_INTEL_82450GX 0x84c5 #define PCI_DEVICE_ID_INTEL_82451NX 0x84ca #define PCI_DEVICE_ID_INTEL_82454NX 0x84cb #define PCI_DEVICE_ID_INTEL_84460GX 0x84ea #define PCI_DEVICE_ID_INTEL_IXP4XX 0x8500 -#define PCI_DEVICE_ID_INTEL_IXP2400 0x9001 #define PCI_DEVICE_ID_INTEL_IXP2800 0x9004 #define PCI_DEVICE_ID_INTEL_S21152BB 0xb152 @@ -2611,7 +2113,6 @@ #define PCI_SUBDEVICE_ID_COMPUTONE_PG6 0x0003 #define PCI_VENDOR_ID_KTI 0x8e2e -#define PCI_DEVICE_ID_KTI_ET32P2 0x3000 #define PCI_VENDOR_ID_ADAPTEC 0x9004 #define PCI_DEVICE_ID_ADAPTEC_7810 0x1078 @@ -2619,7 +2120,6 @@ #define PCI_DEVICE_ID_ADAPTEC_38602 0x3860 #define PCI_DEVICE_ID_ADAPTEC_7850 0x5078 #define PCI_DEVICE_ID_ADAPTEC_7855 0x5578 -#define PCI_DEVICE_ID_ADAPTEC_5800 0x5800 #define PCI_DEVICE_ID_ADAPTEC_3860 0x6038 #define PCI_DEVICE_ID_ADAPTEC_1480A 0x6075 #define PCI_DEVICE_ID_ADAPTEC_7860 0x6078 @@ -2639,7 +2139,6 @@ #define PCI_DEVICE_ID_ADAPTEC_7886 0x8678 #define PCI_DEVICE_ID_ADAPTEC_7887 0x8778 #define PCI_DEVICE_ID_ADAPTEC_7888 0x8878 -#define PCI_DEVICE_ID_ADAPTEC_1030 0x8b78 #define PCI_VENDOR_ID_ADAPTEC2 0x9005 #define PCI_DEVICE_ID_ADAPTEC2_2940U2 0x0010 @@ -2657,10 +2156,9 @@ #define PCI_DEVICE_ID_ADAPTEC2_7899B 0x00c1 #define PCI_DEVICE_ID_ADAPTEC2_7899D 0x00c3 #define PCI_DEVICE_ID_ADAPTEC2_7899P 0x00cf +#define PCI_DEVICE_ID_ADAPTEC2_OBSIDIAN 0x0500 #define PCI_DEVICE_ID_ADAPTEC2_SCAMP 0x0503 -#define PCI_VENDOR_ID_ATRONICS 0x907f -#define PCI_DEVICE_ID_ATRONICS_2015 0x2015 #define PCI_VENDOR_ID_HOLTEK 0x9412 #define PCI_DEVICE_ID_HOLTEK_6565 0x6565 @@ -2679,6 +2177,7 @@ #define PCI_SUBVENDOR_ID_EXSYS 0xd84d #define PCI_SUBDEVICE_ID_EXSYS_4014 0x4014 +#define PCI_SUBDEVICE_ID_EXSYS_4055 0x4055 #define PCI_VENDOR_ID_TIGERJET 0xe159 #define PCI_DEVICE_ID_TIGERJET_300 0x0001 @@ -2692,7 +2191,3 @@ #define PCI_DEVICE_ID_RME_DIGI32_PRO 0x9897 #define PCI_DEVICE_ID_RME_DIGI32_8 0x9898 -#define PCI_VENDOR_ID_ARK 0xedd8 -#define PCI_DEVICE_ID_ARK_STING 0xa091 -#define PCI_DEVICE_ID_ARK_STINGARK 0xa099 -#define PCI_DEVICE_ID_ARK_2000MT 0xa0a1 diff --git a/include/linux/percpu.h b/include/linux/percpu.h index 5451eb1e781d..fb8d2d24e4bb 100644 --- a/include/linux/percpu.h +++ b/include/linux/percpu.h @@ -38,7 +38,7 @@ extern void free_percpu(const void *); #else /* CONFIG_SMP */ -#define per_cpu_ptr(ptr, cpu) (ptr) +#define per_cpu_ptr(ptr, cpu) ({ (void)(cpu); (ptr); }) static inline void *__alloc_percpu(size_t size, size_t align) { diff --git a/include/linux/phonedev.h b/include/linux/phonedev.h index d54049eed0c3..a0e31adf3abe 100644 --- a/include/linux/phonedev.h +++ b/include/linux/phonedev.h @@ -2,7 +2,6 @@ #define __LINUX_PHONEDEV_H #include <linux/types.h> -#include <linux/version.h> #ifdef __KERNEL__ diff --git a/include/linux/phy.h b/include/linux/phy.h index 72cb67b66e0c..92a9696fdebe 100644 --- a/include/linux/phy.h +++ b/include/linux/phy.h @@ -72,6 +72,9 @@ struct mii_bus { /* list of all PHYs on bus */ struct phy_device *phy_map[PHY_MAX_ADDR]; + /* Phy addresses to be ignored when probing */ + u32 phy_mask; + /* Pointer to an array of interrupts, each PHY's * interrupt at the index matching its address */ int *irq; diff --git a/include/linux/pkt_sched.h b/include/linux/pkt_sched.h index 60ffcb9c5791..e87b233615b3 100644 --- a/include/linux/pkt_sched.h +++ b/include/linux/pkt_sched.h @@ -93,6 +93,7 @@ struct tc_fifo_qopt /* PRIO section */ #define TCQ_PRIO_BANDS 16 +#define TCQ_MIN_PRIO_BANDS 2 struct tc_prio_qopt { @@ -169,6 +170,7 @@ struct tc_red_qopt unsigned char Scell_log; /* cell size for idle damping */ unsigned char flags; #define TC_RED_ECN 1 +#define TC_RED_HARDDROP 2 }; struct tc_red_xstats @@ -194,38 +196,34 @@ enum #define TCA_GRED_MAX (__TCA_GRED_MAX - 1) -#define TCA_SET_OFF TCA_GRED_PARMS struct tc_gred_qopt { - __u32 limit; /* HARD maximal queue length (bytes) -*/ - __u32 qth_min; /* Min average length threshold (bytes) -*/ - __u32 qth_max; /* Max average length threshold (bytes) -*/ - __u32 DP; /* upto 2^32 DPs */ - __u32 backlog; - __u32 qave; - __u32 forced; - __u32 early; - __u32 other; - __u32 pdrop; - - unsigned char Wlog; /* log(W) */ - unsigned char Plog; /* log(P_max/(qth_max-qth_min)) */ - unsigned char Scell_log; /* cell size for idle damping */ - __u8 prio; /* prio of this VQ */ - __u32 packets; - __u32 bytesin; + __u32 limit; /* HARD maximal queue length (bytes) */ + __u32 qth_min; /* Min average length threshold (bytes) */ + __u32 qth_max; /* Max average length threshold (bytes) */ + __u32 DP; /* upto 2^32 DPs */ + __u32 backlog; + __u32 qave; + __u32 forced; + __u32 early; + __u32 other; + __u32 pdrop; + __u8 Wlog; /* log(W) */ + __u8 Plog; /* log(P_max/(qth_max-qth_min)) */ + __u8 Scell_log; /* cell size for idle damping */ + __u8 prio; /* prio of this VQ */ + __u32 packets; + __u32 bytesin; }; + /* gred setup */ struct tc_gred_sopt { - __u32 DPs; - __u32 def_DP; - __u8 grio; - __u8 pad1; - __u16 pad2; + __u32 DPs; + __u32 def_DP; + __u8 grio; + __u8 flags; + __u16 pad1; }; /* HTB section */ diff --git a/include/linux/platform_device.h b/include/linux/platform_device.h new file mode 100644 index 000000000000..17e336f40b47 --- /dev/null +++ b/include/linux/platform_device.h @@ -0,0 +1,61 @@ +/* + * platform_device.h - generic, centralized driver model + * + * Copyright (c) 2001-2003 Patrick Mochel <mochel@osdl.org> + * + * This file is released under the GPLv2 + * + * See Documentation/driver-model/ for more information. + */ + +#ifndef _PLATFORM_DEVICE_H_ +#define _PLATFORM_DEVICE_H_ + +#include <linux/device.h> + +struct platform_device { + const char * name; + u32 id; + struct device dev; + u32 num_resources; + struct resource * resource; +}; + +#define to_platform_device(x) container_of((x), struct platform_device, dev) + +extern int platform_device_register(struct platform_device *); +extern void platform_device_unregister(struct platform_device *); + +extern struct bus_type platform_bus_type; +extern struct device platform_bus; + +extern struct resource *platform_get_resource(struct platform_device *, unsigned int, unsigned int); +extern int platform_get_irq(struct platform_device *, unsigned int); +extern struct resource *platform_get_resource_byname(struct platform_device *, unsigned int, char *); +extern int platform_get_irq_byname(struct platform_device *, char *); +extern int platform_add_devices(struct platform_device **, int); + +extern struct platform_device *platform_device_register_simple(char *, unsigned int, struct resource *, unsigned int); + +extern struct platform_device *platform_device_alloc(const char *name, unsigned int id); +extern int platform_device_add_resources(struct platform_device *pdev, struct resource *res, unsigned int num); +extern int platform_device_add_data(struct platform_device *pdev, void *data, size_t size); +extern int platform_device_add(struct platform_device *pdev); +extern void platform_device_put(struct platform_device *pdev); + +struct platform_driver { + int (*probe)(struct platform_device *); + int (*remove)(struct platform_device *); + void (*shutdown)(struct platform_device *); + int (*suspend)(struct platform_device *, pm_message_t state); + int (*resume)(struct platform_device *); + struct device_driver driver; +}; + +extern int platform_driver_register(struct platform_driver *); +extern void platform_driver_unregister(struct platform_driver *); + +#define platform_get_drvdata(_dev) dev_get_drvdata(&(_dev)->dev) +#define platform_set_drvdata(_dev,data) dev_set_drvdata(&(_dev)->dev, (data)) + +#endif /* _PLATFORM_DEVICE_H_ */ diff --git a/include/linux/pm.h b/include/linux/pm.h index 5cfb07648eca..5be87ba3b7ac 100644 --- a/include/linux/pm.h +++ b/include/linux/pm.h @@ -94,55 +94,6 @@ struct pm_dev struct list_head entry; }; -#ifdef CONFIG_PM - -extern int pm_active; - -#define PM_IS_ACTIVE() (pm_active != 0) - -/* - * Register a device with power management - */ -struct pm_dev __deprecated * -pm_register(pm_dev_t type, unsigned long id, pm_callback callback); - -/* - * Unregister a device with power management - */ -void __deprecated pm_unregister(struct pm_dev *dev); - -/* - * Unregister all devices with matching callback - */ -void __deprecated pm_unregister_all(pm_callback callback); - -/* - * Send a request to all devices - */ -int __deprecated pm_send_all(pm_request_t rqst, void *data); - -#else /* CONFIG_PM */ - -#define PM_IS_ACTIVE() 0 - -static inline struct pm_dev *pm_register(pm_dev_t type, - unsigned long id, - pm_callback callback) -{ - return NULL; -} - -static inline void pm_unregister(struct pm_dev *dev) {} - -static inline void pm_unregister_all(pm_callback callback) {} - -static inline int pm_send_all(pm_request_t rqst, void *data) -{ - return 0; -} - -#endif /* CONFIG_PM */ - /* Functions above this comment are list-based old-style power * managment. Please avoid using them. */ @@ -170,6 +121,7 @@ typedef int __bitwise suspend_disk_method_t; struct pm_ops { suspend_disk_method_t pm_disk_mode; + int (*valid)(suspend_state_t state); int (*prepare)(suspend_state_t state); int (*enter)(suspend_state_t state); int (*finish)(suspend_state_t state); @@ -219,10 +171,11 @@ typedef struct pm_message { struct dev_pm_info { pm_message_t power_state; + unsigned can_wakeup:1; #ifdef CONFIG_PM + unsigned should_wakeup:1; pm_message_t prev_state; void * saved_state; - atomic_t pm_users; struct device * pm_parent; struct list_head entry; #endif @@ -236,13 +189,48 @@ extern void device_resume(void); #ifdef CONFIG_PM extern int device_suspend(pm_message_t state); -#else + +#define device_set_wakeup_enable(dev,val) \ + ((dev)->power.should_wakeup = !!(val)) +#define device_may_wakeup(dev) \ + (device_can_wakeup(dev) && (dev)->power.should_wakeup) + +extern int dpm_runtime_suspend(struct device *, pm_message_t); +extern void dpm_runtime_resume(struct device *); + +#else /* !CONFIG_PM */ + static inline int device_suspend(pm_message_t state) { return 0; } + +#define device_set_wakeup_enable(dev,val) do{}while(0) +#define device_may_wakeup(dev) (0) + +static inline int dpm_runtime_suspend(struct device * dev, pm_message_t state) +{ + return 0; +} + +static inline void dpm_runtime_resume(struct device * dev) +{ + +} + #endif +/* changes to device_may_wakeup take effect on the next pm state change. + * by default, devices should wakeup if they can. + */ +#define device_can_wakeup(dev) \ + ((dev)->power.can_wakeup) +#define device_init_wakeup(dev,val) \ + do { \ + device_can_wakeup(dev) = !!(val); \ + device_set_wakeup_enable(dev,val); \ + } while(0) + #endif /* __KERNEL__ */ #endif /* _LINUX_PM_H */ diff --git a/include/linux/pm_legacy.h b/include/linux/pm_legacy.h new file mode 100644 index 000000000000..1252b45face1 --- /dev/null +++ b/include/linux/pm_legacy.h @@ -0,0 +1,56 @@ +#ifndef __LINUX_PM_LEGACY_H__ +#define __LINUX_PM_LEGACY_H__ + +#include <linux/config.h> + +#ifdef CONFIG_PM_LEGACY + +extern int pm_active; + +#define PM_IS_ACTIVE() (pm_active != 0) + +/* + * Register a device with power management + */ +struct pm_dev __deprecated * +pm_register(pm_dev_t type, unsigned long id, pm_callback callback); + +/* + * Unregister a device with power management + */ +void __deprecated pm_unregister(struct pm_dev *dev); + +/* + * Unregister all devices with matching callback + */ +void __deprecated pm_unregister_all(pm_callback callback); + +/* + * Send a request to all devices + */ +int __deprecated pm_send_all(pm_request_t rqst, void *data); + +#else /* CONFIG_PM_LEGACY */ + +#define PM_IS_ACTIVE() 0 + +static inline struct pm_dev *pm_register(pm_dev_t type, + unsigned long id, + pm_callback callback) +{ + return NULL; +} + +static inline void pm_unregister(struct pm_dev *dev) {} + +static inline void pm_unregister_all(pm_callback callback) {} + +static inline int pm_send_all(pm_request_t rqst, void *data) +{ + return 0; +} + +#endif /* CONFIG_PM_LEGACY */ + +#endif /* __LINUX_PM_LEGACY_H__ */ + diff --git a/include/linux/pnp.h b/include/linux/pnp.h index aadbac29103c..584d57cb393a 100644 --- a/include/linux/pnp.h +++ b/include/linux/pnp.h @@ -353,7 +353,6 @@ struct pnp_protocol { int pnp_register_protocol(struct pnp_protocol *protocol); void pnp_unregister_protocol(struct pnp_protocol *protocol); int pnp_add_device(struct pnp_dev *dev); -void pnp_remove_device(struct pnp_dev *dev); int pnp_device_attach(struct pnp_dev *pnp_dev); void pnp_device_detach(struct pnp_dev *pnp_dev); extern struct list_head pnp_global; @@ -399,7 +398,6 @@ static inline int pnp_register_protocol(struct pnp_protocol *protocol) { return static inline void pnp_unregister_protocol(struct pnp_protocol *protocol) { } static inline int pnp_init_device(struct pnp_dev *dev) { return -ENODEV; } static inline int pnp_add_device(struct pnp_dev *dev) { return -ENODEV; } -static inline void pnp_remove_device(struct pnp_dev *dev) { } static inline int pnp_device_attach(struct pnp_dev *pnp_dev) { return -ENODEV; } static inline void pnp_device_detach(struct pnp_dev *pnp_dev) { ; } diff --git a/include/linux/posix_acl.h b/include/linux/posix_acl.h index 4caedddaa033..4bc241290c24 100644 --- a/include/linux/posix_acl.h +++ b/include/linux/posix_acl.h @@ -71,11 +71,11 @@ posix_acl_release(struct posix_acl *acl) /* posix_acl.c */ -extern struct posix_acl *posix_acl_alloc(int, unsigned int __nocast); -extern struct posix_acl *posix_acl_clone(const struct posix_acl *, unsigned int __nocast); +extern struct posix_acl *posix_acl_alloc(int, gfp_t); +extern struct posix_acl *posix_acl_clone(const struct posix_acl *, gfp_t); extern int posix_acl_valid(const struct posix_acl *); extern int posix_acl_permission(struct inode *, const struct posix_acl *, int); -extern struct posix_acl *posix_acl_from_mode(mode_t, unsigned int __nocast); +extern struct posix_acl *posix_acl_from_mode(mode_t, gfp_t); extern int posix_acl_equiv_mode(const struct posix_acl *, mode_t *); extern int posix_acl_create_masq(struct posix_acl *, mode_t *); extern int posix_acl_chmod_masq(struct posix_acl *, mode_t); diff --git a/include/linux/ppp-comp.h b/include/linux/ppp-comp.h index 7227e653b3be..e86a7a5cf355 100644 --- a/include/linux/ppp-comp.h +++ b/include/linux/ppp-comp.h @@ -111,6 +111,8 @@ struct compressor { /* Used in locking compressor modules */ struct module *owner; + /* Extra skb space needed by the compressor algorithm */ + unsigned int comp_extra; }; /* @@ -191,6 +193,13 @@ struct compressor { #define DEFLATE_CHK_SEQUENCE 0 /* + * Definitions for MPPE. + */ + +#define CI_MPPE 18 /* config option for MPPE */ +#define CILEN_MPPE 6 /* length of config option */ + +/* * Definitions for other, as yet unsupported, compression methods. */ diff --git a/include/linux/preempt.h b/include/linux/preempt.h index dd98c54a23b4..d9a2f5254a51 100644 --- a/include/linux/preempt.h +++ b/include/linux/preempt.h @@ -7,6 +7,7 @@ */ #include <linux/config.h> +#include <linux/thread_info.h> #include <linux/linkage.h> #ifdef CONFIG_DEBUG_PREEMPT diff --git a/include/linux/proc_fs.h b/include/linux/proc_fs.h index 0563581e3a02..74488e49166d 100644 --- a/include/linux/proc_fs.h +++ b/include/linux/proc_fs.h @@ -66,6 +66,7 @@ struct proc_dir_entry { write_proc_t *write_proc; atomic_t count; /* use count */ int deleted; /* delete flag */ + void *set; }; struct kcore_list { @@ -139,15 +140,12 @@ extern void proc_tty_unregister_driver(struct tty_driver *driver); /* * proc_devtree.c */ +#ifdef CONFIG_PROC_DEVICETREE struct device_node; +struct property; extern void proc_device_tree_init(void); -#ifdef CONFIG_PROC_DEVICETREE extern void proc_device_tree_add_node(struct device_node *, struct proc_dir_entry *); -#else /* !CONFIG_PROC_DEVICETREE */ -static inline void proc_device_tree_add_node(struct device_node *np, struct proc_dir_entry *pde) -{ - return; -} +extern void proc_device_tree_add_prop(struct proc_dir_entry *pde, struct property *prop); #endif /* CONFIG_PROC_DEVICETREE */ extern struct proc_dir_entry *proc_symlink(const char *, diff --git a/include/linux/ptrace.h b/include/linux/ptrace.h index dc6f3647bfbc..b2b3dba1298d 100644 --- a/include/linux/ptrace.h +++ b/include/linux/ptrace.h @@ -78,6 +78,8 @@ #include <linux/compiler.h> /* For unlikely. */ #include <linux/sched.h> /* For struct task_struct. */ + +extern long arch_ptrace(struct task_struct *child, long request, long addr, long data); extern int ptrace_readdata(struct task_struct *tsk, unsigned long src, char __user *dst, int len); extern int ptrace_writedata(struct task_struct *tsk, char __user *src, unsigned long dst, int len); extern int ptrace_attach(struct task_struct *tsk); diff --git a/include/linux/quota.h b/include/linux/quota.h index 700ead45084f..f33aeb22c26a 100644 --- a/include/linux/quota.h +++ b/include/linux/quota.h @@ -289,7 +289,6 @@ struct quota_info { struct semaphore dqonoff_sem; /* Serialize quotaon & quotaoff */ struct rw_semaphore dqptr_sem; /* serialize ops using quota_info struct, pointers from inode to dquots */ struct inode *files[MAXQUOTAS]; /* inodes of quotafiles */ - struct vfsmount *mnt[MAXQUOTAS]; /* mountpoint entries of filesystems with quota files */ struct mem_dqinfo info[MAXQUOTAS]; /* Information for each quota type */ struct quota_format_ops *ops[MAXQUOTAS]; /* Operations for each type */ }; diff --git a/include/linux/quotaops.h b/include/linux/quotaops.h index d211507ab246..4f34d3d60f2e 100644 --- a/include/linux/quotaops.h +++ b/include/linux/quotaops.h @@ -198,38 +198,38 @@ static __inline__ int DQUOT_OFF(struct super_block *sb) #define DQUOT_SYNC(sb) do { } while(0) #define DQUOT_OFF(sb) do { } while(0) #define DQUOT_TRANSFER(inode, iattr) (0) -extern __inline__ int DQUOT_PREALLOC_SPACE_NODIRTY(struct inode *inode, qsize_t nr) +static inline int DQUOT_PREALLOC_SPACE_NODIRTY(struct inode *inode, qsize_t nr) { inode_add_bytes(inode, nr); return 0; } -extern __inline__ int DQUOT_PREALLOC_SPACE(struct inode *inode, qsize_t nr) +static inline int DQUOT_PREALLOC_SPACE(struct inode *inode, qsize_t nr) { DQUOT_PREALLOC_SPACE_NODIRTY(inode, nr); mark_inode_dirty(inode); return 0; } -extern __inline__ int DQUOT_ALLOC_SPACE_NODIRTY(struct inode *inode, qsize_t nr) +static inline int DQUOT_ALLOC_SPACE_NODIRTY(struct inode *inode, qsize_t nr) { inode_add_bytes(inode, nr); return 0; } -extern __inline__ int DQUOT_ALLOC_SPACE(struct inode *inode, qsize_t nr) +static inline int DQUOT_ALLOC_SPACE(struct inode *inode, qsize_t nr) { DQUOT_ALLOC_SPACE_NODIRTY(inode, nr); mark_inode_dirty(inode); return 0; } -extern __inline__ void DQUOT_FREE_SPACE_NODIRTY(struct inode *inode, qsize_t nr) +static inline void DQUOT_FREE_SPACE_NODIRTY(struct inode *inode, qsize_t nr) { inode_sub_bytes(inode, nr); } -extern __inline__ void DQUOT_FREE_SPACE(struct inode *inode, qsize_t nr) +static inline void DQUOT_FREE_SPACE(struct inode *inode, qsize_t nr) { DQUOT_FREE_SPACE_NODIRTY(inode, nr); mark_inode_dirty(inode); diff --git a/include/linux/radix-tree.h b/include/linux/radix-tree.h index 9c51917b1cce..36e5d269612f 100644 --- a/include/linux/radix-tree.h +++ b/include/linux/radix-tree.h @@ -24,7 +24,7 @@ struct radix_tree_root { unsigned int height; - unsigned int gfp_mask; + gfp_t gfp_mask; struct radix_tree_node *rnode; }; @@ -46,11 +46,12 @@ do { \ int radix_tree_insert(struct radix_tree_root *, unsigned long, void *); void *radix_tree_lookup(struct radix_tree_root *, unsigned long); +void **radix_tree_lookup_slot(struct radix_tree_root *, unsigned long); void *radix_tree_delete(struct radix_tree_root *, unsigned long); unsigned int radix_tree_gang_lookup(struct radix_tree_root *root, void **results, unsigned long first_index, unsigned int max_items); -int radix_tree_preload(unsigned int __nocast gfp_mask); +int radix_tree_preload(gfp_t gfp_mask); void radix_tree_init(void); void *radix_tree_tag_set(struct radix_tree_root *root, unsigned long index, int tag); diff --git a/include/linux/raid/bitmap.h b/include/linux/raid/bitmap.h index 9de99198caf1..899437802aea 100644 --- a/include/linux/raid/bitmap.h +++ b/include/linux/raid/bitmap.h @@ -6,7 +6,13 @@ #ifndef BITMAP_H #define BITMAP_H 1 -#define BITMAP_MAJOR 3 +#define BITMAP_MAJOR_LO 3 +/* version 4 insists the bitmap is in little-endian order + * with version 3, it is host-endian which is non-portable + */ +#define BITMAP_MAJOR_HI 4 +#define BITMAP_MAJOR_HOSTENDIAN 3 + #define BITMAP_MINOR 39 /* @@ -133,7 +139,8 @@ typedef __u16 bitmap_counter_t; /* use these for bitmap->flags and bitmap->sb->state bit-fields */ enum bitmap_state { BITMAP_ACTIVE = 0x001, /* the bitmap is in use */ - BITMAP_STALE = 0x002 /* the bitmap file is out of date or had -EIO */ + BITMAP_STALE = 0x002, /* the bitmap file is out of date or had -EIO */ + BITMAP_HOSTENDIAN = 0x8000, }; /* the superblock at the front of the bitmap file -- little endian */ diff --git a/include/linux/raid/md.h b/include/linux/raid/md.h index ffa316ce4dc8..13e7c4b62367 100644 --- a/include/linux/raid/md.h +++ b/include/linux/raid/md.h @@ -66,8 +66,10 @@ * and major_version/minor_version accordingly * >=2 means that Internal bitmaps are supported by setting MD_SB_BITMAP_PRESENT * in the super status byte + * >=3 means that bitmap superblock version 4 is supported, which uses + * little-ending representation rather than host-endian */ -#define MD_PATCHLEVEL_VERSION 2 +#define MD_PATCHLEVEL_VERSION 3 extern int register_md_personality (int p_num, mdk_personality_t *p); extern int unregister_md_personality (int p_num); @@ -87,6 +89,7 @@ extern void md_print_devices (void); extern void md_super_write(mddev_t *mddev, mdk_rdev_t *rdev, sector_t sector, int size, struct page *page); +extern void md_super_wait(mddev_t *mddev); extern int sync_page_io(struct block_device *bdev, sector_t sector, int size, struct page *page, int rw); diff --git a/include/linux/raid/md_k.h b/include/linux/raid/md_k.h index ebce949b1443..46629a275ba9 100644 --- a/include/linux/raid/md_k.h +++ b/include/linux/raid/md_k.h @@ -105,6 +105,8 @@ struct mdk_rdev_s int sb_size; /* bytes in the superblock */ int preferred_minor; /* autorun support */ + struct kobject kobj; + /* A device can be in one of three states based on two flags: * Not working: faulty==1 in_sync==0 * Fully working: faulty==0 in_sync==1 @@ -115,11 +117,12 @@ struct mdk_rdev_s * It can never have faulty==1, in_sync==1 * This reduces the burden of testing multiple flags in many cases */ - int faulty; /* if faulty do not issue IO requests */ - int in_sync; /* device is a full member of the array */ - unsigned long flags; /* Should include faulty and in_sync here. */ + unsigned long flags; +#define Faulty 1 /* device is known to have a fault */ +#define In_sync 2 /* device is in_sync with rest of array */ #define WriteMostly 4 /* Avoid reading if at all possible */ +#define BarriersNotsupp 5 /* BIO_RW_BARRIER is not supported */ int desc_nr; /* descriptor index in the superblock */ int raid_disk; /* role of device in array */ @@ -132,6 +135,9 @@ struct mdk_rdev_s * only maintained for arrays that * support hot removal */ + atomic_t read_errors; /* number of consecutive read errors that + * we have tried to ignore. + */ }; typedef struct mdk_personality_s mdk_personality_t; @@ -148,6 +154,8 @@ struct mddev_s struct gendisk *gendisk; + struct kobject kobj; + /* Superblock information */ int major_version, minor_version, @@ -171,6 +179,10 @@ struct mddev_s sector_t resync_mark_cnt;/* blocks written at resync_mark */ sector_t resync_max_sectors; /* may be set by personality */ + + sector_t resync_mismatches; /* count of sectors where + * parity/replica mismatch found + */ /* recovery/resync flags * NEEDED: we might need to start a resync/recover * RUNNING: a thread is running, or about to be started @@ -178,6 +190,8 @@ struct mddev_s * ERR: and IO error was detected - abort the resync/recovery * INTR: someone requested a (clean) early abort. * DONE: thread is done and is waiting to be reaped + * REQUEST: user-space has requested a sync (used with SYNC) + * CHECK: user-space request for for check-only, no repair */ #define MD_RECOVERY_RUNNING 0 #define MD_RECOVERY_SYNC 1 @@ -185,6 +199,8 @@ struct mddev_s #define MD_RECOVERY_INTR 3 #define MD_RECOVERY_DONE 4 #define MD_RECOVERY_NEEDED 5 +#define MD_RECOVERY_REQUESTED 6 +#define MD_RECOVERY_CHECK 7 unsigned long recovery; int in_sync; /* know to not need resync */ @@ -195,6 +211,13 @@ struct mddev_s int degraded; /* whether md should consider * adding a spare */ + int barriers_work; /* initialised to true, cleared as soon + * as a barrier request to slave + * fails. Only supported + */ + struct bio *biolist; /* bios that need to be retried + * because BIO_RW_BARRIER is not supported + */ atomic_t recovery_active; /* blocks scheduled, but not written */ wait_queue_head_t recovery_wait; @@ -232,7 +255,7 @@ struct mddev_s static inline void rdev_dec_pending(mdk_rdev_t *rdev, mddev_t *mddev) { - int faulty = rdev->faulty; + int faulty = test_bit(Faulty, &rdev->flags); if (atomic_dec_and_test(&rdev->nr_pending) && faulty) set_bit(MD_RECOVERY_NEEDED, &mddev->recovery); } @@ -270,6 +293,13 @@ struct mdk_personality_s }; +struct md_sysfs_entry { + struct attribute attr; + ssize_t (*show)(mddev_t *, char *); + ssize_t (*store)(mddev_t *, const char *, size_t); +}; + + static inline char * mdname (mddev_t * mddev) { return mddev->gendisk ? mddev->gendisk->disk_name : "mdX"; @@ -304,10 +334,8 @@ typedef struct mdk_thread_s { mddev_t *mddev; wait_queue_head_t wqueue; unsigned long flags; - struct completion *event; struct task_struct *tsk; unsigned long timeout; - const char *name; } mdk_thread_t; #define THREAD_WAKEUP 0 diff --git a/include/linux/raid/raid1.h b/include/linux/raid/raid1.h index 60e19b667548..292b98f2b408 100644 --- a/include/linux/raid/raid1.h +++ b/include/linux/raid/raid1.h @@ -110,7 +110,9 @@ struct r1bio_s { #define R1BIO_Uptodate 0 #define R1BIO_IsSync 1 #define R1BIO_Degraded 2 -#define R1BIO_BehindIO 3 +#define R1BIO_BehindIO 3 +#define R1BIO_Barrier 4 +#define R1BIO_BarrierRetry 5 /* For write-behind requests, we call bi_end_io when * the last non-write-behind device completes, providing * any write was successful. Otherwise we call when diff --git a/include/linux/raid/raid5.h b/include/linux/raid/raid5.h index 176fc653c284..f025ba6fb14c 100644 --- a/include/linux/raid/raid5.h +++ b/include/linux/raid/raid5.h @@ -154,6 +154,8 @@ struct stripe_head { #define R5_Wantwrite 5 #define R5_Syncio 6 /* this io need to be accounted as resync io */ #define R5_Overlap 7 /* There is a pending overlapping request on this block */ +#define R5_ReadError 8 /* seen a read error here recently */ +#define R5_ReWrite 9 /* have tried to over-write the readerror */ /* * Write method diff --git a/include/linux/raid_class.h b/include/linux/raid_class.h index a71123c28272..48831eac2910 100644 --- a/include/linux/raid_class.h +++ b/include/linux/raid_class.h @@ -1,4 +1,9 @@ /* + * raid_class.h - a generic raid visualisation class + * + * Copyright (c) 2005 - James Bottomley <James.Bottomley@steeleye.com> + * + * This file is licensed under GPLv2 */ #include <linux/transport_class.h> @@ -14,20 +19,35 @@ struct raid_function_template { }; enum raid_state { - RAID_ACTIVE = 1, - RAID_DEGRADED, - RAID_RESYNCING, - RAID_OFFLINE, + RAID_STATE_UNKNOWN = 0, + RAID_STATE_ACTIVE, + RAID_STATE_DEGRADED, + RAID_STATE_RESYNCING, + RAID_STATE_OFFLINE, +}; + +enum raid_level { + RAID_LEVEL_UNKNOWN = 0, + RAID_LEVEL_LINEAR, + RAID_LEVEL_0, + RAID_LEVEL_1, + RAID_LEVEL_3, + RAID_LEVEL_4, + RAID_LEVEL_5, + RAID_LEVEL_6, }; struct raid_data { struct list_head component_list; int component_count; - int level; + enum raid_level level; enum raid_state state; int resync; }; +/* resync complete goes from 0 to this */ +#define RAID_MAX_RESYNC (10000) + #define DEFINE_RAID_ATTRIBUTE(type, attr) \ static inline void \ raid_set_##attr(struct raid_template *r, struct device *dev, type value) { \ @@ -48,7 +68,7 @@ raid_get_##attr(struct raid_template *r, struct device *dev) { \ return rd->attr; \ } -DEFINE_RAID_ATTRIBUTE(int, level) +DEFINE_RAID_ATTRIBUTE(enum raid_level, level) DEFINE_RAID_ATTRIBUTE(int, resync) DEFINE_RAID_ATTRIBUTE(enum raid_state, state) diff --git a/include/linux/rcupdate.h b/include/linux/rcupdate.h index 4e65eb44adfd..cce25591eec2 100644 --- a/include/linux/rcupdate.h +++ b/include/linux/rcupdate.h @@ -94,6 +94,7 @@ struct rcu_data { long batch; /* Batch # for current RCU batch */ struct rcu_head *nxtlist; struct rcu_head **nxttail; + long count; /* # of queued items */ struct rcu_head *curlist; struct rcu_head **curtail; struct rcu_head *donelist; @@ -274,6 +275,7 @@ static inline int rcu_pending(int cpu) extern void rcu_init(void); extern void rcu_check_callbacks(int cpu, int user); extern void rcu_restart_cpu(int cpu); +extern long rcu_batches_completed(void); /* Exported interfaces */ extern void FASTCALL(call_rcu(struct rcu_head *head, diff --git a/include/linux/reboot.h b/include/linux/reboot.h index 3b3266ff1a95..7ab2cdb83ef0 100644 --- a/include/linux/reboot.h +++ b/include/linux/reboot.h @@ -59,6 +59,10 @@ extern void machine_crash_shutdown(struct pt_regs *); * Architecture independent implemenations of sys_reboot commands. */ +extern void kernel_restart_prepare(char *cmd); +extern void kernel_halt_prepare(void); +extern void kernel_power_off_prepare(void); + extern void kernel_restart(char *cmd); extern void kernel_halt(void); extern void kernel_power_off(void); diff --git a/include/linux/reiserfs_fs.h b/include/linux/reiserfs_fs.h index af00b10294cd..001ab82df051 100644 --- a/include/linux/reiserfs_fs.h +++ b/include/linux/reiserfs_fs.h @@ -1972,7 +1972,7 @@ extern struct address_space_operations reiserfs_address_space_operations; /* fix_nodes.c */ #ifdef CONFIG_REISERFS_CHECK -void *reiserfs_kmalloc(size_t size, int flags, struct super_block *s); +void *reiserfs_kmalloc(size_t size, gfp_t flags, struct super_block *s); void reiserfs_kfree(const void *vp, size_t size, struct super_block *s); #else static inline void *reiserfs_kmalloc(size_t size, int flags, diff --git a/include/linux/rio.h b/include/linux/rio.h new file mode 100644 index 000000000000..c7e907faae9c --- /dev/null +++ b/include/linux/rio.h @@ -0,0 +1,325 @@ +/* + * RapidIO interconnect services + * (RapidIO Interconnect Specification, http://www.rapidio.org) + * + * Copyright 2005 MontaVista Software, Inc. + * Matt Porter <mporter@kernel.crashing.org> + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ + +#ifndef LINUX_RIO_H +#define LINUX_RIO_H + +#ifdef __KERNEL__ + +#include <linux/types.h> +#include <linux/config.h> +#include <linux/ioport.h> +#include <linux/list.h> +#include <linux/errno.h> +#include <linux/device.h> +#include <linux/rio_regs.h> + +#define RIO_ANY_DESTID 0xff +#define RIO_NO_HOPCOUNT -1 + +#define RIO_MAX_MPORT_RESOURCES 16 +#define RIO_MAX_DEV_RESOURCES 16 + +#define RIO_GLOBAL_TABLE 0xff /* Indicates access of a switch's + global routing table if it + has multiple (or per port) + tables */ + +#define RIO_INVALID_ROUTE 0xff /* Indicates that a route table + entry is invalid (no route + exists for the device ID) */ + +#ifdef CONFIG_RAPIDIO_8_BIT_TRANSPORT +#define RIO_MAX_ROUTE_ENTRIES (1 << 8) +#else +#define RIO_MAX_ROUTE_ENTRIES (1 << 16) +#endif + +#define RIO_MAX_MBOX 4 +#define RIO_MAX_MSG_SIZE 0x1000 + +/* + * Error values that may be returned by RIO functions. + */ +#define RIO_SUCCESSFUL 0x00 +#define RIO_BAD_SIZE 0x81 + +/* + * For RIO devices, the region numbers are assigned this way: + * + * 0 RapidIO outbound doorbells + * 1-15 RapidIO memory regions + * + * For RIO master ports, the region number are assigned this way: + * + * 0 RapidIO inbound doorbells + * 1 RapidIO inbound mailboxes + * 1 RapidIO outbound mailboxes + */ +#define RIO_DOORBELL_RESOURCE 0 +#define RIO_INB_MBOX_RESOURCE 1 +#define RIO_OUTB_MBOX_RESOURCE 2 + +extern struct bus_type rio_bus_type; +extern struct list_head rio_devices; /* list of all devices */ + +struct rio_mport; + +/** + * struct rio_dev - RIO device info + * @global_list: Node in list of all RIO devices + * @net_list: Node in list of RIO devices in a network + * @net: Network this device is a part of + * @did: Device ID + * @vid: Vendor ID + * @device_rev: Device revision + * @asm_did: Assembly device ID + * @asm_vid: Assembly vendor ID + * @asm_rev: Assembly revision + * @efptr: Extended feature pointer + * @pef: Processing element features + * @swpinfo: Switch port info + * @src_ops: Source operation capabilities + * @dst_ops: Destination operation capabilities + * @dma_mask: Mask of bits of RIO address this device implements + * @rswitch: Pointer to &struct rio_switch if valid for this device + * @driver: Driver claiming this device + * @dev: Device model device + * @riores: RIO resources this device owns + * @destid: Network destination ID + */ +struct rio_dev { + struct list_head global_list; /* node in list of all RIO devices */ + struct list_head net_list; /* node in per net list */ + struct rio_net *net; /* RIO net this device resides in */ + u16 did; + u16 vid; + u32 device_rev; + u16 asm_did; + u16 asm_vid; + u16 asm_rev; + u16 efptr; + u32 pef; + u32 swpinfo; /* Only used for switches */ + u32 src_ops; + u32 dst_ops; + u64 dma_mask; + struct rio_switch *rswitch; /* RIO switch info */ + struct rio_driver *driver; /* RIO driver claiming this device */ + struct device dev; /* LDM device structure */ + struct resource riores[RIO_MAX_DEV_RESOURCES]; + u16 destid; +}; + +#define rio_dev_g(n) list_entry(n, struct rio_dev, global_list) +#define rio_dev_f(n) list_entry(n, struct rio_dev, net_list) +#define to_rio_dev(n) container_of(n, struct rio_dev, dev) + +/** + * struct rio_msg - RIO message event + * @res: Mailbox resource + * @mcback: Message event callback + */ +struct rio_msg { + struct resource *res; + void (*mcback) (struct rio_mport * mport, void *dev_id, int mbox, int slot); +}; + +/** + * struct rio_dbell - RIO doorbell event + * @node: Node in list of doorbell events + * @res: Doorbell resource + * @dinb: Doorbell event callback + * @dev_id: Device specific pointer to pass on event + */ +struct rio_dbell { + struct list_head node; + struct resource *res; + void (*dinb) (struct rio_mport *mport, void *dev_id, u16 src, u16 dst, u16 info); + void *dev_id; +}; + +/** + * struct rio_mport - RIO master port info + * @dbells: List of doorbell events + * @node: Node in global list of master ports + * @nnode: Node in network list of master ports + * @iores: I/O mem resource that this master port interface owns + * @riores: RIO resources that this master port interfaces owns + * @inb_msg: RIO inbound message event descriptors + * @outb_msg: RIO outbound message event descriptors + * @host_deviceid: Host device ID associated with this master port + * @ops: configuration space functions + * @id: Port ID, unique among all ports + * @index: Port index, unique among all port interfaces of the same type + * @name: Port name string + */ +struct rio_mport { + struct list_head dbells; /* list of doorbell events */ + struct list_head node; /* node in global list of ports */ + struct list_head nnode; /* node in net list of ports */ + struct resource iores; + struct resource riores[RIO_MAX_MPORT_RESOURCES]; + struct rio_msg inb_msg[RIO_MAX_MBOX]; + struct rio_msg outb_msg[RIO_MAX_MBOX]; + int host_deviceid; /* Host device ID */ + struct rio_ops *ops; /* maintenance transaction functions */ + unsigned char id; /* port ID, unique among all ports */ + unsigned char index; /* port index, unique among all port + interfaces of the same type */ + unsigned char name[40]; +}; + +/** + * struct rio_net - RIO network info + * @node: Node in global list of RIO networks + * @devices: List of devices in this network + * @mports: List of master ports accessing this network + * @hport: Default port for accessing this network + * @id: RIO network ID + */ +struct rio_net { + struct list_head node; /* node in list of networks */ + struct list_head devices; /* list of devices in this net */ + struct list_head mports; /* list of ports accessing net */ + struct rio_mport *hport; /* primary port for accessing net */ + unsigned char id; /* RIO network ID */ +}; + +/** + * struct rio_switch - RIO switch info + * @node: Node in global list of switches + * @switchid: Switch ID that is unique across a network + * @hopcount: Hopcount to this switch + * @destid: Associated destid in the path + * @route_table: Copy of switch routing table + * @add_entry: Callback for switch-specific route add function + * @get_entry: Callback for switch-specific route get function + */ +struct rio_switch { + struct list_head node; + u16 switchid; + u16 hopcount; + u16 destid; + u8 route_table[RIO_MAX_ROUTE_ENTRIES]; + int (*add_entry) (struct rio_mport * mport, u16 destid, u8 hopcount, + u16 table, u16 route_destid, u8 route_port); + int (*get_entry) (struct rio_mport * mport, u16 destid, u8 hopcount, + u16 table, u16 route_destid, u8 * route_port); +}; + +/* Low-level architecture-dependent routines */ + +/** + * struct rio_ops - Low-level RIO configuration space operations + * @lcread: Callback to perform local (master port) read of config space. + * @lcwrite: Callback to perform local (master port) write of config space. + * @cread: Callback to perform network read of config space. + * @cwrite: Callback to perform network write of config space. + * @dsend: Callback to send a doorbell message. + */ +struct rio_ops { + int (*lcread) (int index, u32 offset, int len, u32 * data); + int (*lcwrite) (int index, u32 offset, int len, u32 data); + int (*cread) (int index, u16 destid, u8 hopcount, u32 offset, int len, + u32 * data); + int (*cwrite) (int index, u16 destid, u8 hopcount, u32 offset, int len, + u32 data); + int (*dsend) (int index, u16 destid, u16 data); +}; + +#define RIO_RESOURCE_MEM 0x00000100 +#define RIO_RESOURCE_DOORBELL 0x00000200 +#define RIO_RESOURCE_MAILBOX 0x00000400 + +#define RIO_RESOURCE_CACHEABLE 0x00010000 +#define RIO_RESOURCE_PCI 0x00020000 + +#define RIO_RESOURCE_BUSY 0x80000000 + +/** + * struct rio_driver - RIO driver info + * @node: Node in list of drivers + * @name: RIO driver name + * @id_table: RIO device ids to be associated with this driver + * @probe: RIO device inserted + * @remove: RIO device removed + * @suspend: RIO device suspended + * @resume: RIO device awakened + * @enable_wake: RIO device enable wake event + * @driver: LDM driver struct + * + * Provides info on a RIO device driver for insertion/removal and + * power management purposes. + */ +struct rio_driver { + struct list_head node; + char *name; + const struct rio_device_id *id_table; + int (*probe) (struct rio_dev * dev, const struct rio_device_id * id); + void (*remove) (struct rio_dev * dev); + int (*suspend) (struct rio_dev * dev, u32 state); + int (*resume) (struct rio_dev * dev); + int (*enable_wake) (struct rio_dev * dev, u32 state, int enable); + struct device_driver driver; +}; + +#define to_rio_driver(drv) container_of(drv,struct rio_driver, driver) + +/** + * struct rio_device_id - RIO device identifier + * @did: RIO device ID + * @vid: RIO vendor ID + * @asm_did: RIO assembly device ID + * @asm_vid: RIO assembly vendor ID + * + * Identifies a RIO device based on both the device/vendor IDs and + * the assembly device/vendor IDs. + */ +struct rio_device_id { + u16 did, vid; + u16 asm_did, asm_vid; +}; + +/** + * struct rio_route_ops - Per-switch route operations + * @vid: RIO vendor ID + * @did: RIO device ID + * @add_hook: Callback that adds a route entry + * @get_hook: Callback that gets a route entry + * + * Defines the operations that are necessary to manipulate the route + * tables for a particular RIO switch device. + */ +struct rio_route_ops { + u16 vid, did; + int (*add_hook) (struct rio_mport * mport, u16 destid, u8 hopcount, + u16 table, u16 route_destid, u8 route_port); + int (*get_hook) (struct rio_mport * mport, u16 destid, u8 hopcount, + u16 table, u16 route_destid, u8 * route_port); +}; + +/* Architecture and hardware-specific functions */ +extern int rio_init_mports(void); +extern void rio_register_mport(struct rio_mport *); +extern int rio_hw_add_outb_message(struct rio_mport *, struct rio_dev *, int, + void *, size_t); +extern int rio_hw_add_inb_buffer(struct rio_mport *, int, void *); +extern void *rio_hw_get_inb_message(struct rio_mport *, int); +extern int rio_open_inb_mbox(struct rio_mport *, void *, int, int); +extern void rio_close_inb_mbox(struct rio_mport *, int); +extern int rio_open_outb_mbox(struct rio_mport *, void *, int, int); +extern void rio_close_outb_mbox(struct rio_mport *, int); + +#endif /* __KERNEL__ */ +#endif /* LINUX_RIO_H */ diff --git a/include/linux/rio_drv.h b/include/linux/rio_drv.h new file mode 100644 index 000000000000..3bd7cce19e26 --- /dev/null +++ b/include/linux/rio_drv.h @@ -0,0 +1,469 @@ +/* + * RapidIO driver services + * + * Copyright 2005 MontaVista Software, Inc. + * Matt Porter <mporter@kernel.crashing.org> + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ + +#ifndef LINUX_RIO_DRV_H +#define LINUX_RIO_DRV_H + +#ifdef __KERNEL__ + +#include <linux/types.h> +#include <linux/config.h> +#include <linux/ioport.h> +#include <linux/list.h> +#include <linux/errno.h> +#include <linux/device.h> +#include <linux/rio.h> + +extern int __rio_local_read_config_32(struct rio_mport *port, u32 offset, + u32 * data); +extern int __rio_local_write_config_32(struct rio_mport *port, u32 offset, + u32 data); +extern int __rio_local_read_config_16(struct rio_mport *port, u32 offset, + u16 * data); +extern int __rio_local_write_config_16(struct rio_mport *port, u32 offset, + u16 data); +extern int __rio_local_read_config_8(struct rio_mport *port, u32 offset, + u8 * data); +extern int __rio_local_write_config_8(struct rio_mport *port, u32 offset, + u8 data); + +extern int rio_mport_read_config_32(struct rio_mport *port, u16 destid, + u8 hopcount, u32 offset, u32 * data); +extern int rio_mport_write_config_32(struct rio_mport *port, u16 destid, + u8 hopcount, u32 offset, u32 data); +extern int rio_mport_read_config_16(struct rio_mport *port, u16 destid, + u8 hopcount, u32 offset, u16 * data); +extern int rio_mport_write_config_16(struct rio_mport *port, u16 destid, + u8 hopcount, u32 offset, u16 data); +extern int rio_mport_read_config_8(struct rio_mport *port, u16 destid, + u8 hopcount, u32 offset, u8 * data); +extern int rio_mport_write_config_8(struct rio_mport *port, u16 destid, + u8 hopcount, u32 offset, u8 data); + +/** + * rio_local_read_config_32 - Read 32 bits from local configuration space + * @port: Master port + * @offset: Offset into local configuration space + * @data: Pointer to read data into + * + * Reads 32 bits of data from the specified offset within the local + * device's configuration space. + */ +static inline int rio_local_read_config_32(struct rio_mport *port, u32 offset, + u32 * data) +{ + return __rio_local_read_config_32(port, offset, data); +} + +/** + * rio_local_write_config_32 - Write 32 bits to local configuration space + * @port: Master port + * @offset: Offset into local configuration space + * @data: Data to be written + * + * Writes 32 bits of data to the specified offset within the local + * device's configuration space. + */ +static inline int rio_local_write_config_32(struct rio_mport *port, u32 offset, + u32 data) +{ + return __rio_local_write_config_32(port, offset, data); +} + +/** + * rio_local_read_config_16 - Read 16 bits from local configuration space + * @port: Master port + * @offset: Offset into local configuration space + * @data: Pointer to read data into + * + * Reads 16 bits of data from the specified offset within the local + * device's configuration space. + */ +static inline int rio_local_read_config_16(struct rio_mport *port, u32 offset, + u16 * data) +{ + return __rio_local_read_config_16(port, offset, data); +} + +/** + * rio_local_write_config_16 - Write 16 bits to local configuration space + * @port: Master port + * @offset: Offset into local configuration space + * @data: Data to be written + * + * Writes 16 bits of data to the specified offset within the local + * device's configuration space. + */ + +static inline int rio_local_write_config_16(struct rio_mport *port, u32 offset, + u16 data) +{ + return __rio_local_write_config_16(port, offset, data); +} + +/** + * rio_local_read_config_8 - Read 8 bits from local configuration space + * @port: Master port + * @offset: Offset into local configuration space + * @data: Pointer to read data into + * + * Reads 8 bits of data from the specified offset within the local + * device's configuration space. + */ +static inline int rio_local_read_config_8(struct rio_mport *port, u32 offset, + u8 * data) +{ + return __rio_local_read_config_8(port, offset, data); +} + +/** + * rio_local_write_config_8 - Write 8 bits to local configuration space + * @port: Master port + * @offset: Offset into local configuration space + * @data: Data to be written + * + * Writes 8 bits of data to the specified offset within the local + * device's configuration space. + */ +static inline int rio_local_write_config_8(struct rio_mport *port, u32 offset, + u8 data) +{ + return __rio_local_write_config_8(port, offset, data); +} + +/** + * rio_read_config_32 - Read 32 bits from configuration space + * @rdev: RIO device + * @offset: Offset into device configuration space + * @data: Pointer to read data into + * + * Reads 32 bits of data from the specified offset within the + * RIO device's configuration space. + */ +static inline int rio_read_config_32(struct rio_dev *rdev, u32 offset, + u32 * data) +{ + u8 hopcount = 0xff; + u16 destid = rdev->destid; + + if (rdev->rswitch) { + destid = rdev->rswitch->destid; + hopcount = rdev->rswitch->hopcount; + } + + return rio_mport_read_config_32(rdev->net->hport, destid, hopcount, + offset, data); +}; + +/** + * rio_write_config_32 - Write 32 bits to configuration space + * @rdev: RIO device + * @offset: Offset into device configuration space + * @data: Data to be written + * + * Writes 32 bits of data to the specified offset within the + * RIO device's configuration space. + */ +static inline int rio_write_config_32(struct rio_dev *rdev, u32 offset, + u32 data) +{ + u8 hopcount = 0xff; + u16 destid = rdev->destid; + + if (rdev->rswitch) { + destid = rdev->rswitch->destid; + hopcount = rdev->rswitch->hopcount; + } + + return rio_mport_write_config_32(rdev->net->hport, destid, hopcount, + offset, data); +}; + +/** + * rio_read_config_16 - Read 16 bits from configuration space + * @rdev: RIO device + * @offset: Offset into device configuration space + * @data: Pointer to read data into + * + * Reads 16 bits of data from the specified offset within the + * RIO device's configuration space. + */ +static inline int rio_read_config_16(struct rio_dev *rdev, u32 offset, + u16 * data) +{ + u8 hopcount = 0xff; + u16 destid = rdev->destid; + + if (rdev->rswitch) { + destid = rdev->rswitch->destid; + hopcount = rdev->rswitch->hopcount; + } + + return rio_mport_read_config_16(rdev->net->hport, destid, hopcount, + offset, data); +}; + +/** + * rio_write_config_16 - Write 16 bits to configuration space + * @rdev: RIO device + * @offset: Offset into device configuration space + * @data: Data to be written + * + * Writes 16 bits of data to the specified offset within the + * RIO device's configuration space. + */ +static inline int rio_write_config_16(struct rio_dev *rdev, u32 offset, + u16 data) +{ + u8 hopcount = 0xff; + u16 destid = rdev->destid; + + if (rdev->rswitch) { + destid = rdev->rswitch->destid; + hopcount = rdev->rswitch->hopcount; + } + + return rio_mport_write_config_16(rdev->net->hport, destid, hopcount, + offset, data); +}; + +/** + * rio_read_config_8 - Read 8 bits from configuration space + * @rdev: RIO device + * @offset: Offset into device configuration space + * @data: Pointer to read data into + * + * Reads 8 bits of data from the specified offset within the + * RIO device's configuration space. + */ +static inline int rio_read_config_8(struct rio_dev *rdev, u32 offset, u8 * data) +{ + u8 hopcount = 0xff; + u16 destid = rdev->destid; + + if (rdev->rswitch) { + destid = rdev->rswitch->destid; + hopcount = rdev->rswitch->hopcount; + } + + return rio_mport_read_config_8(rdev->net->hport, destid, hopcount, + offset, data); +}; + +/** + * rio_write_config_8 - Write 8 bits to configuration space + * @rdev: RIO device + * @offset: Offset into device configuration space + * @data: Data to be written + * + * Writes 8 bits of data to the specified offset within the + * RIO device's configuration space. + */ +static inline int rio_write_config_8(struct rio_dev *rdev, u32 offset, u8 data) +{ + u8 hopcount = 0xff; + u16 destid = rdev->destid; + + if (rdev->rswitch) { + destid = rdev->rswitch->destid; + hopcount = rdev->rswitch->hopcount; + } + + return rio_mport_write_config_8(rdev->net->hport, destid, hopcount, + offset, data); +}; + +extern int rio_mport_send_doorbell(struct rio_mport *mport, u16 destid, + u16 data); + +/** + * rio_send_doorbell - Send a doorbell message to a device + * @rdev: RIO device + * @data: Doorbell message data + * + * Send a doorbell message to a RIO device. The doorbell message + * has a 16-bit info field provided by the @data argument. + */ +static inline int rio_send_doorbell(struct rio_dev *rdev, u16 data) +{ + return rio_mport_send_doorbell(rdev->net->hport, rdev->destid, data); +}; + +/** + * rio_init_mbox_res - Initialize a RIO mailbox resource + * @res: resource struct + * @start: start of mailbox range + * @end: end of mailbox range + * + * This function is used to initialize the fields of a resource + * for use as a mailbox resource. It initializes a range of + * mailboxes using the start and end arguments. + */ +static inline void rio_init_mbox_res(struct resource *res, int start, int end) +{ + memset(res, 0, sizeof(struct resource)); + res->start = start; + res->end = end; + res->flags = RIO_RESOURCE_MAILBOX; +} + +/** + * rio_init_dbell_res - Initialize a RIO doorbell resource + * @res: resource struct + * @start: start of doorbell range + * @end: end of doorbell range + * + * This function is used to initialize the fields of a resource + * for use as a doorbell resource. It initializes a range of + * doorbell messages using the start and end arguments. + */ +static inline void rio_init_dbell_res(struct resource *res, u16 start, u16 end) +{ + memset(res, 0, sizeof(struct resource)); + res->start = start; + res->end = end; + res->flags = RIO_RESOURCE_DOORBELL; +} + +/** + * RIO_DEVICE - macro used to describe a specific RIO device + * @vid: the 16 bit RIO vendor ID + * @did: the 16 bit RIO device ID + * + * This macro is used to create a struct rio_device_id that matches a + * specific device. The assembly vendor and assembly device fields + * will be set to %RIO_ANY_ID. + */ +#define RIO_DEVICE(dev,ven) \ + .did = (dev), .vid = (ven), \ + .asm_did = RIO_ANY_ID, .asm_vid = RIO_ANY_ID + +/* Mailbox management */ +extern int rio_request_outb_mbox(struct rio_mport *, void *, int, int, + void (*)(struct rio_mport *, void *,int, int)); +extern int rio_release_outb_mbox(struct rio_mport *, int); + +/** + * rio_add_outb_message - Add RIO message to an outbound mailbox queue + * @mport: RIO master port containing the outbound queue + * @rdev: RIO device the message is be sent to + * @mbox: The outbound mailbox queue + * @buffer: Pointer to the message buffer + * @len: Length of the message buffer + * + * Adds a RIO message buffer to an outbound mailbox queue for + * transmission. Returns 0 on success. + */ +static inline int rio_add_outb_message(struct rio_mport *mport, + struct rio_dev *rdev, int mbox, + void *buffer, size_t len) +{ + return rio_hw_add_outb_message(mport, rdev, mbox, buffer, len); +} + +extern int rio_request_inb_mbox(struct rio_mport *, void *, int, int, + void (*)(struct rio_mport *, void *, int, int)); +extern int rio_release_inb_mbox(struct rio_mport *, int); + +/** + * rio_add_inb_buffer - Add buffer to an inbound mailbox queue + * @mport: Master port containing the inbound mailbox + * @mbox: The inbound mailbox number + * @buffer: Pointer to the message buffer + * + * Adds a buffer to an inbound mailbox queue for reception. Returns + * 0 on success. + */ +static inline int rio_add_inb_buffer(struct rio_mport *mport, int mbox, + void *buffer) +{ + return rio_hw_add_inb_buffer(mport, mbox, buffer); +} + +/** + * rio_get_inb_message - Get A RIO message from an inbound mailbox queue + * @mport: Master port containing the inbound mailbox + * @mbox: The inbound mailbox number + * @buffer: Pointer to the message buffer + * + * Get a RIO message from an inbound mailbox queue. Returns 0 on success. + */ +static inline void *rio_get_inb_message(struct rio_mport *mport, int mbox) +{ + return rio_hw_get_inb_message(mport, mbox); +} + +/* Doorbell management */ +extern int rio_request_inb_dbell(struct rio_mport *, void *, u16, u16, + void (*)(struct rio_mport *, void *, u16, u16, u16)); +extern int rio_release_inb_dbell(struct rio_mport *, u16, u16); +extern struct resource *rio_request_outb_dbell(struct rio_dev *, u16, u16); +extern int rio_release_outb_dbell(struct rio_dev *, struct resource *); + +/* Memory region management */ +int rio_claim_resource(struct rio_dev *, int); +int rio_request_regions(struct rio_dev *, char *); +void rio_release_regions(struct rio_dev *); +int rio_request_region(struct rio_dev *, int, char *); +void rio_release_region(struct rio_dev *, int); + +/* LDM support */ +int rio_register_driver(struct rio_driver *); +void rio_unregister_driver(struct rio_driver *); +struct rio_dev *rio_dev_get(struct rio_dev *); +void rio_dev_put(struct rio_dev *); + +/** + * rio_name - Get the unique RIO device identifier + * @rdev: RIO device + * + * Get the unique RIO device identifier. Returns the device + * identifier string. + */ +static inline char *rio_name(struct rio_dev *rdev) +{ + return rdev->dev.bus_id; +} + +/** + * rio_get_drvdata - Get RIO driver specific data + * @rdev: RIO device + * + * Get RIO driver specific data. Returns a pointer to the + * driver specific data. + */ +static inline void *rio_get_drvdata(struct rio_dev *rdev) +{ + return dev_get_drvdata(&rdev->dev); +} + +/** + * rio_set_drvdata - Set RIO driver specific data + * @rdev: RIO device + * @data: Pointer to driver specific data + * + * Set RIO driver specific data. device struct driver data pointer + * is set to the @data argument. + */ +static inline void rio_set_drvdata(struct rio_dev *rdev, void *data) +{ + dev_set_drvdata(&rdev->dev, data); +} + +/* Misc driver helpers */ +extern u16 rio_local_get_device_id(struct rio_mport *port); +extern struct rio_dev *rio_get_device(u16 vid, u16 did, struct rio_dev *from); +extern struct rio_dev *rio_get_asm(u16 vid, u16 did, u16 asm_vid, u16 asm_did, + struct rio_dev *from); + +#endif /* __KERNEL__ */ +#endif /* LINUX_RIO_DRV_H */ diff --git a/include/linux/rio_ids.h b/include/linux/rio_ids.h new file mode 100644 index 000000000000..919d4e07d54e --- /dev/null +++ b/include/linux/rio_ids.h @@ -0,0 +1,24 @@ +/* + * RapidIO devices + * + * Copyright 2005 MontaVista Software, Inc. + * Matt Porter <mporter@kernel.crashing.org> + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ + +#ifndef LINUX_RIO_IDS_H +#define LINUX_RIO_IDS_H + +#define RIO_ANY_ID 0xffff + +#define RIO_VID_FREESCALE 0x0002 +#define RIO_DID_MPC8560 0x0003 + +#define RIO_VID_TUNDRA 0x000d +#define RIO_DID_TSI500 0x0500 + +#endif /* LINUX_RIO_IDS_H */ diff --git a/include/linux/rio_regs.h b/include/linux/rio_regs.h new file mode 100644 index 000000000000..326540f9b54e --- /dev/null +++ b/include/linux/rio_regs.h @@ -0,0 +1,215 @@ +/* + * RapidIO register definitions + * + * Copyright 2005 MontaVista Software, Inc. + * Matt Porter <mporter@kernel.crashing.org> + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ + +#ifndef LINUX_RIO_REGS_H +#define LINUX_RIO_REGS_H + +/* + * In RapidIO, each device has a 2MB configuration space that is + * accessed via maintenance transactions. Portions of configuration + * space are standardized and/or reserved. + */ +#define RIO_DEV_ID_CAR 0x00 /* [I] Device Identity CAR */ +#define RIO_DEV_INFO_CAR 0x04 /* [I] Device Information CAR */ +#define RIO_ASM_ID_CAR 0x08 /* [I] Assembly Identity CAR */ +#define RIO_ASM_ID_MASK 0xffff0000 /* [I] Asm ID Mask */ +#define RIO_ASM_VEN_ID_MASK 0x0000ffff /* [I] Asm Vend Mask */ + +#define RIO_ASM_INFO_CAR 0x0c /* [I] Assembly Information CAR */ +#define RIO_ASM_REV_MASK 0xffff0000 /* [I] Asm Rev Mask */ +#define RIO_EXT_FTR_PTR_MASK 0x0000ffff /* [I] EF_PTR Mask */ + +#define RIO_PEF_CAR 0x10 /* [I] Processing Element Features CAR */ +#define RIO_PEF_BRIDGE 0x80000000 /* [I] Bridge */ +#define RIO_PEF_MEMORY 0x40000000 /* [I] MMIO */ +#define RIO_PEF_PROCESSOR 0x20000000 /* [I] Processor */ +#define RIO_PEF_SWITCH 0x10000000 /* [I] Switch */ +#define RIO_PEF_INB_MBOX 0x00f00000 /* [II] Mailboxes */ +#define RIO_PEF_INB_MBOX0 0x00800000 /* [II] Mailbox 0 */ +#define RIO_PEF_INB_MBOX1 0x00400000 /* [II] Mailbox 1 */ +#define RIO_PEF_INB_MBOX2 0x00200000 /* [II] Mailbox 2 */ +#define RIO_PEF_INB_MBOX3 0x00100000 /* [II] Mailbox 3 */ +#define RIO_PEF_INB_DOORBELL 0x00080000 /* [II] Doorbells */ +#define RIO_PEF_CTLS 0x00000010 /* [III] CTLS */ +#define RIO_PEF_EXT_FEATURES 0x00000008 /* [I] EFT_PTR valid */ +#define RIO_PEF_ADDR_66 0x00000004 /* [I] 66 bits */ +#define RIO_PEF_ADDR_50 0x00000002 /* [I] 50 bits */ +#define RIO_PEF_ADDR_34 0x00000001 /* [I] 34 bits */ + +#define RIO_SWP_INFO_CAR 0x14 /* [I] Switch Port Information CAR */ +#define RIO_SWP_INFO_PORT_TOTAL_MASK 0x0000ff00 /* [I] Total number of ports */ +#define RIO_SWP_INFO_PORT_NUM_MASK 0x000000ff /* [I] Maintenance transaction port number */ +#define RIO_GET_TOTAL_PORTS(x) ((x & RIO_SWP_INFO_PORT_TOTAL_MASK) >> 8) + +#define RIO_SRC_OPS_CAR 0x18 /* [I] Source Operations CAR */ +#define RIO_SRC_OPS_READ 0x00008000 /* [I] Read op */ +#define RIO_SRC_OPS_WRITE 0x00004000 /* [I] Write op */ +#define RIO_SRC_OPS_STREAM_WRITE 0x00002000 /* [I] Str-write op */ +#define RIO_SRC_OPS_WRITE_RESPONSE 0x00001000 /* [I] Write/resp op */ +#define RIO_SRC_OPS_DATA_MSG 0x00000800 /* [II] Data msg op */ +#define RIO_SRC_OPS_DOORBELL 0x00000400 /* [II] Doorbell op */ +#define RIO_SRC_OPS_ATOMIC_TST_SWP 0x00000100 /* [I] Atomic TAS op */ +#define RIO_SRC_OPS_ATOMIC_INC 0x00000080 /* [I] Atomic inc op */ +#define RIO_SRC_OPS_ATOMIC_DEC 0x00000040 /* [I] Atomic dec op */ +#define RIO_SRC_OPS_ATOMIC_SET 0x00000020 /* [I] Atomic set op */ +#define RIO_SRC_OPS_ATOMIC_CLR 0x00000010 /* [I] Atomic clr op */ +#define RIO_SRC_OPS_PORT_WRITE 0x00000004 /* [I] Port-write op */ + +#define RIO_DST_OPS_CAR 0x1c /* Destination Operations CAR */ +#define RIO_DST_OPS_READ 0x00008000 /* [I] Read op */ +#define RIO_DST_OPS_WRITE 0x00004000 /* [I] Write op */ +#define RIO_DST_OPS_STREAM_WRITE 0x00002000 /* [I] Str-write op */ +#define RIO_DST_OPS_WRITE_RESPONSE 0x00001000 /* [I] Write/resp op */ +#define RIO_DST_OPS_DATA_MSG 0x00000800 /* [II] Data msg op */ +#define RIO_DST_OPS_DOORBELL 0x00000400 /* [II] Doorbell op */ +#define RIO_DST_OPS_ATOMIC_TST_SWP 0x00000100 /* [I] Atomic TAS op */ +#define RIO_DST_OPS_ATOMIC_INC 0x00000080 /* [I] Atomic inc op */ +#define RIO_DST_OPS_ATOMIC_DEC 0x00000040 /* [I] Atomic dec op */ +#define RIO_DST_OPS_ATOMIC_SET 0x00000020 /* [I] Atomic set op */ +#define RIO_DST_OPS_ATOMIC_CLR 0x00000010 /* [I] Atomic clr op */ +#define RIO_DST_OPS_PORT_WRITE 0x00000004 /* [I] Port-write op */ + +#define RIO_OPS_READ 0x00008000 /* [I] Read op */ +#define RIO_OPS_WRITE 0x00004000 /* [I] Write op */ +#define RIO_OPS_STREAM_WRITE 0x00002000 /* [I] Str-write op */ +#define RIO_OPS_WRITE_RESPONSE 0x00001000 /* [I] Write/resp op */ +#define RIO_OPS_DATA_MSG 0x00000800 /* [II] Data msg op */ +#define RIO_OPS_DOORBELL 0x00000400 /* [II] Doorbell op */ +#define RIO_OPS_ATOMIC_TST_SWP 0x00000100 /* [I] Atomic TAS op */ +#define RIO_OPS_ATOMIC_INC 0x00000080 /* [I] Atomic inc op */ +#define RIO_OPS_ATOMIC_DEC 0x00000040 /* [I] Atomic dec op */ +#define RIO_OPS_ATOMIC_SET 0x00000020 /* [I] Atomic set op */ +#define RIO_OPS_ATOMIC_CLR 0x00000010 /* [I] Atomic clr op */ +#define RIO_OPS_PORT_WRITE 0x00000004 /* [I] Port-write op */ + + /* 0x20-0x3c *//* Reserved */ + +#define RIO_MBOX_CSR 0x40 /* [II] Mailbox CSR */ +#define RIO_MBOX0_AVAIL 0x80000000 /* [II] Mbox 0 avail */ +#define RIO_MBOX0_FULL 0x40000000 /* [II] Mbox 0 full */ +#define RIO_MBOX0_EMPTY 0x20000000 /* [II] Mbox 0 empty */ +#define RIO_MBOX0_BUSY 0x10000000 /* [II] Mbox 0 busy */ +#define RIO_MBOX0_FAIL 0x08000000 /* [II] Mbox 0 fail */ +#define RIO_MBOX0_ERROR 0x04000000 /* [II] Mbox 0 error */ +#define RIO_MBOX1_AVAIL 0x00800000 /* [II] Mbox 1 avail */ +#define RIO_MBOX1_FULL 0x00200000 /* [II] Mbox 1 full */ +#define RIO_MBOX1_EMPTY 0x00200000 /* [II] Mbox 1 empty */ +#define RIO_MBOX1_BUSY 0x00100000 /* [II] Mbox 1 busy */ +#define RIO_MBOX1_FAIL 0x00080000 /* [II] Mbox 1 fail */ +#define RIO_MBOX1_ERROR 0x00040000 /* [II] Mbox 1 error */ +#define RIO_MBOX2_AVAIL 0x00008000 /* [II] Mbox 2 avail */ +#define RIO_MBOX2_FULL 0x00004000 /* [II] Mbox 2 full */ +#define RIO_MBOX2_EMPTY 0x00002000 /* [II] Mbox 2 empty */ +#define RIO_MBOX2_BUSY 0x00001000 /* [II] Mbox 2 busy */ +#define RIO_MBOX2_FAIL 0x00000800 /* [II] Mbox 2 fail */ +#define RIO_MBOX2_ERROR 0x00000400 /* [II] Mbox 2 error */ +#define RIO_MBOX3_AVAIL 0x00000080 /* [II] Mbox 3 avail */ +#define RIO_MBOX3_FULL 0x00000040 /* [II] Mbox 3 full */ +#define RIO_MBOX3_EMPTY 0x00000020 /* [II] Mbox 3 empty */ +#define RIO_MBOX3_BUSY 0x00000010 /* [II] Mbox 3 busy */ +#define RIO_MBOX3_FAIL 0x00000008 /* [II] Mbox 3 fail */ +#define RIO_MBOX3_ERROR 0x00000004 /* [II] Mbox 3 error */ + +#define RIO_WRITE_PORT_CSR 0x44 /* [I] Write Port CSR */ +#define RIO_DOORBELL_CSR 0x44 /* [II] Doorbell CSR */ +#define RIO_DOORBELL_AVAIL 0x80000000 /* [II] Doorbell avail */ +#define RIO_DOORBELL_FULL 0x40000000 /* [II] Doorbell full */ +#define RIO_DOORBELL_EMPTY 0x20000000 /* [II] Doorbell empty */ +#define RIO_DOORBELL_BUSY 0x10000000 /* [II] Doorbell busy */ +#define RIO_DOORBELL_FAILED 0x08000000 /* [II] Doorbell failed */ +#define RIO_DOORBELL_ERROR 0x04000000 /* [II] Doorbell error */ +#define RIO_WRITE_PORT_AVAILABLE 0x00000080 /* [I] Write Port Available */ +#define RIO_WRITE_PORT_FULL 0x00000040 /* [I] Write Port Full */ +#define RIO_WRITE_PORT_EMPTY 0x00000020 /* [I] Write Port Empty */ +#define RIO_WRITE_PORT_BUSY 0x00000010 /* [I] Write Port Busy */ +#define RIO_WRITE_PORT_FAILED 0x00000008 /* [I] Write Port Failed */ +#define RIO_WRITE_PORT_ERROR 0x00000004 /* [I] Write Port Error */ + + /* 0x48 *//* Reserved */ + +#define RIO_PELL_CTRL_CSR 0x4c /* [I] PE Logical Layer Control CSR */ +#define RIO_PELL_ADDR_66 0x00000004 /* [I] 66-bit addr */ +#define RIO_PELL_ADDR_50 0x00000002 /* [I] 50-bit addr */ +#define RIO_PELL_ADDR_34 0x00000001 /* [I] 34-bit addr */ + + /* 0x50-0x54 *//* Reserved */ + +#define RIO_LCSH_BA 0x58 /* [I] LCS High Base Address */ +#define RIO_LCSL_BA 0x5c /* [I] LCS Base Address */ + +#define RIO_DID_CSR 0x60 /* [III] Base Device ID CSR */ + + /* 0x64 *//* Reserved */ + +#define RIO_HOST_DID_LOCK_CSR 0x68 /* [III] Host Base Device ID Lock CSR */ +#define RIO_COMPONENT_TAG_CSR 0x6c /* [III] Component Tag CSR */ + + /* 0x70-0xf8 *//* Reserved */ + /* 0x100-0xfff8 *//* [I] Extended Features Space */ + /* 0x10000-0xfffff8 *//* [I] Implementation-defined Space */ + +/* + * Extended Features Space is a configuration space area where + * functionality is mapped into extended feature blocks via a + * singly linked list of extended feature pointers (EFT_PTR). + * + * Each extended feature block can be identified/located in + * Extended Features Space by walking the extended feature + * list starting with the Extended Feature Pointer located + * in the Assembly Information CAR. + * + * Extended Feature Blocks (EFBs) are identified with an assigned + * EFB ID. Extended feature block offsets in the definitions are + * relative to the offset of the EFB within the Extended Features + * Space. + */ + +/* Helper macros to parse the Extended Feature Block header */ +#define RIO_EFB_PTR_MASK 0xffff0000 +#define RIO_EFB_ID_MASK 0x0000ffff +#define RIO_GET_BLOCK_PTR(x) ((x & RIO_EFB_PTR_MASK) >> 16) +#define RIO_GET_BLOCK_ID(x) (x & RIO_EFB_ID_MASK) + +/* Extended Feature Block IDs */ +#define RIO_EFB_PAR_EP_ID 0x0001 /* [IV] LP/LVDS EP Devices */ +#define RIO_EFB_PAR_EP_REC_ID 0x0002 /* [IV] LP/LVDS EP Recovery Devices */ +#define RIO_EFB_PAR_EP_FREE_ID 0x0003 /* [IV] LP/LVDS EP Free Devices */ +#define RIO_EFB_SER_EP_ID 0x0004 /* [VI] LP/Serial EP Devices */ +#define RIO_EFB_SER_EP_REC_ID 0x0005 /* [VI] LP/Serial EP Recovery Devices */ +#define RIO_EFB_SER_EP_FREE_ID 0x0006 /* [VI] LP/Serial EP Free Devices */ + +/* + * Physical 8/16 LP-LVDS + * ID=0x0001, Generic End Point Devices + * ID=0x0002, Generic End Point Devices, software assisted recovery option + * ID=0x0003, Generic End Point Free Devices + * + * Physical LP-Serial + * ID=0x0004, Generic End Point Devices + * ID=0x0005, Generic End Point Devices, software assisted recovery option + * ID=0x0006, Generic End Point Free Devices + */ +#define RIO_PORT_MNT_HEADER 0x0000 +#define RIO_PORT_REQ_CTL_CSR 0x0020 +#define RIO_PORT_RSP_CTL_CSR 0x0024 /* 0x0001/0x0002 */ +#define RIO_PORT_GEN_CTL_CSR 0x003c +#define RIO_PORT_GEN_HOST 0x80000000 +#define RIO_PORT_GEN_MASTER 0x40000000 +#define RIO_PORT_GEN_DISCOVERED 0x20000000 +#define RIO_PORT_N_MNT_REQ_CSR(x) (0x0040 + x*0x20) /* 0x0002 */ +#define RIO_PORT_N_MNT_RSP_CSR(x) (0x0044 + x*0x20) /* 0x0002 */ +#define RIO_PORT_N_ACK_STS_CSR(x) (0x0048 + x*0x20) /* 0x0002 */ +#define RIO_PORT_N_ERR_STS_CSR(x) (0x58 + x*0x20) +#define PORT_N_ERR_STS_PORT_OK 0x00000002 +#define RIO_PORT_N_CTL_CSR(x) (0x5c + x*0x20) + +#endif /* LINUX_RIO_REGS_H */ diff --git a/include/linux/rmap.h b/include/linux/rmap.h index e80fb7ee6efd..33261f1d2239 100644 --- a/include/linux/rmap.h +++ b/include/linux/rmap.h @@ -89,14 +89,14 @@ static inline void page_dup_rmap(struct page *page) /* * Called from mm/vmscan.c to handle paging out */ -int page_referenced(struct page *, int is_locked, int ignore_token); +int page_referenced(struct page *, int is_locked); int try_to_unmap(struct page *); /* * Called from mm/filemap_xip.c to unmap empty zero page */ -pte_t *page_check_address(struct page *, struct mm_struct *, unsigned long); - +pte_t *page_check_address(struct page *, struct mm_struct *, + unsigned long, spinlock_t **); /* * Used by swapoff to help locate where page is expected in vma. @@ -109,7 +109,7 @@ unsigned long page_address_in_vma(struct page *, struct vm_area_struct *); #define anon_vma_prepare(vma) (0) #define anon_vma_link(vma) do {} while (0) -#define page_referenced(page,l,i) TestClearPageReferenced(page) +#define page_referenced(page,l) TestClearPageReferenced(page) #define try_to_unmap(page) SWAP_FAIL #endif /* CONFIG_MMU */ diff --git a/include/linux/rslib.h b/include/linux/rslib.h index 980c8f74d8dc..ace25acfdc97 100644 --- a/include/linux/rslib.h +++ b/include/linux/rslib.h @@ -1,15 +1,15 @@ -/* +/* * include/linux/rslib.h * * Overview: * Generic Reed Solomon encoder / decoder library - * + * * Copyright (C) 2004 Thomas Gleixner (tglx@linutronix.de) * * RS code lifted from reed solomon library written by Phil Karn * Copyright 2002 Phil Karn, KA9Q * - * $Id: rslib.h,v 1.3 2004/10/05 22:08:22 gleixner Exp $ + * $Id: rslib.h,v 1.4 2005/11/07 11:14:52 gleixner Exp $ * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as @@ -21,20 +21,20 @@ #include <linux/list.h> -/** +/** * struct rs_control - rs control structure - * + * * @mm: Bits per symbol * @nn: Symbols per block (= (1<<mm)-1) * @alpha_to: log lookup table * @index_of: Antilog lookup table - * @genpoly: Generator polynomial + * @genpoly: Generator polynomial * @nroots: Number of generator roots = number of parity symbols * @fcr: First consecutive root, index form - * @prim: Primitive element, index form - * @iprim: prim-th root of 1, index form - * @gfpoly: The primitive generator polynominal - * @users: Users of this structure + * @prim: Primitive element, index form + * @iprim: prim-th root of 1, index form + * @gfpoly: The primitive generator polynominal + * @users: Users of this structure * @list: List entry for the rs control list */ struct rs_control { @@ -58,7 +58,7 @@ int encode_rs8(struct rs_control *rs, uint8_t *data, int len, uint16_t *par, uint16_t invmsk); #endif #ifdef CONFIG_REED_SOLOMON_DEC8 -int decode_rs8(struct rs_control *rs, uint8_t *data, uint16_t *par, int len, +int decode_rs8(struct rs_control *rs, uint8_t *data, uint16_t *par, int len, uint16_t *s, int no_eras, int *eras_pos, uint16_t invmsk, uint16_t *corr); #endif @@ -75,7 +75,7 @@ int decode_rs16(struct rs_control *rs, uint16_t *data, uint16_t *par, int len, #endif /* Create or get a matching rs control structure */ -struct rs_control *init_rs(int symsize, int gfpoly, int fcr, int prim, +struct rs_control *init_rs(int symsize, int gfpoly, int fcr, int prim, int nroots); /* Release a rs control structure */ @@ -87,9 +87,9 @@ void free_rs(struct rs_control *rs); * @x: the value to reduce * * where - * rs->mm = number of bits per symbol + * rs->mm = number of bits per symbol * rs->nn = (2^rs->mm) - 1 - * + * * Simple arithmetic modulo would return a wrong result for values * >= 3 * rs->nn */ diff --git a/include/linux/rwsem-spinlock.h b/include/linux/rwsem-spinlock.h index b52a2af25f1f..f30f805080ae 100644 --- a/include/linux/rwsem-spinlock.h +++ b/include/linux/rwsem-spinlock.h @@ -61,5 +61,10 @@ extern void FASTCALL(__up_read(struct rw_semaphore *sem)); extern void FASTCALL(__up_write(struct rw_semaphore *sem)); extern void FASTCALL(__downgrade_write(struct rw_semaphore *sem)); +static inline int rwsem_is_locked(struct rw_semaphore *sem) +{ + return (sem->activity != 0); +} + #endif /* __KERNEL__ */ #endif /* _LINUX_RWSEM_SPINLOCK_H */ diff --git a/include/linux/scatterlist.h b/include/linux/scatterlist.h index 7f717e95ae37..66ff545552f7 100644 --- a/include/linux/scatterlist.h +++ b/include/linux/scatterlist.h @@ -1,14 +1,23 @@ #ifndef _LINUX_SCATTERLIST_H #define _LINUX_SCATTERLIST_H -static inline void sg_init_one(struct scatterlist *sg, - u8 *buf, unsigned int buflen) -{ - memset(sg, 0, sizeof(*sg)); +#include <asm/scatterlist.h> +#include <linux/mm.h> +#include <linux/string.h> +static inline void sg_set_buf(struct scatterlist *sg, void *buf, + unsigned int buflen) +{ sg->page = virt_to_page(buf); sg->offset = offset_in_page(buf); sg->length = buflen; } +static inline void sg_init_one(struct scatterlist *sg, void *buf, + unsigned int buflen) +{ + memset(sg, 0, sizeof(*sg)); + sg_set_buf(sg, buf, buflen); +} + #endif /* _LINUX_SCATTERLIST_H */ diff --git a/include/linux/sched.h b/include/linux/sched.h index 49e617fa0f66..b0ad6f30679e 100644 --- a/include/linux/sched.h +++ b/include/linux/sched.h @@ -107,13 +107,25 @@ extern unsigned long nr_iowait(void); #include <asm/processor.h> +/* + * Task state bitmask. NOTE! These bits are also + * encoded in fs/proc/array.c: get_task_state(). + * + * We have two separate sets of flags: task->state + * is about runnability, while task->exit_state are + * about the task exiting. Confusing, but this way + * modifying one set can't modify the other one by + * mistake. + */ #define TASK_RUNNING 0 #define TASK_INTERRUPTIBLE 1 #define TASK_UNINTERRUPTIBLE 2 #define TASK_STOPPED 4 #define TASK_TRACED 8 +/* in tsk->exit_state */ #define EXIT_ZOMBIE 16 #define EXIT_DEAD 32 +/* in tsk->state again */ #define TASK_NONINTERACTIVE 64 #define __set_task_state(tsk, state_value) \ @@ -237,6 +249,36 @@ arch_get_unmapped_area_topdown(struct file *filp, unsigned long addr, extern void arch_unmap_area(struct mm_struct *, unsigned long); extern void arch_unmap_area_topdown(struct mm_struct *, unsigned long); +#if NR_CPUS >= CONFIG_SPLIT_PTLOCK_CPUS +/* + * The mm counters are not protected by its page_table_lock, + * so must be incremented atomically. + */ +#ifdef ATOMIC64_INIT +#define set_mm_counter(mm, member, value) atomic64_set(&(mm)->_##member, value) +#define get_mm_counter(mm, member) ((unsigned long)atomic64_read(&(mm)->_##member)) +#define add_mm_counter(mm, member, value) atomic64_add(value, &(mm)->_##member) +#define inc_mm_counter(mm, member) atomic64_inc(&(mm)->_##member) +#define dec_mm_counter(mm, member) atomic64_dec(&(mm)->_##member) +typedef atomic64_t mm_counter_t; +#else /* !ATOMIC64_INIT */ +/* + * The counters wrap back to 0 at 2^32 * PAGE_SIZE, + * that is, at 16TB if using 4kB page size. + */ +#define set_mm_counter(mm, member, value) atomic_set(&(mm)->_##member, value) +#define get_mm_counter(mm, member) ((unsigned long)atomic_read(&(mm)->_##member)) +#define add_mm_counter(mm, member, value) atomic_add(value, &(mm)->_##member) +#define inc_mm_counter(mm, member) atomic_inc(&(mm)->_##member) +#define dec_mm_counter(mm, member) atomic_dec(&(mm)->_##member) +typedef atomic_t mm_counter_t; +#endif /* !ATOMIC64_INIT */ + +#else /* NR_CPUS < CONFIG_SPLIT_PTLOCK_CPUS */ +/* + * The mm counters are protected by its page_table_lock, + * so can be incremented directly. + */ #define set_mm_counter(mm, member, value) (mm)->_##member = (value) #define get_mm_counter(mm, member) ((mm)->_##member) #define add_mm_counter(mm, member, value) (mm)->_##member += (value) @@ -244,6 +286,20 @@ extern void arch_unmap_area_topdown(struct mm_struct *, unsigned long); #define dec_mm_counter(mm, member) (mm)->_##member-- typedef unsigned long mm_counter_t; +#endif /* NR_CPUS < CONFIG_SPLIT_PTLOCK_CPUS */ + +#define get_mm_rss(mm) \ + (get_mm_counter(mm, file_rss) + get_mm_counter(mm, anon_rss)) +#define update_hiwater_rss(mm) do { \ + unsigned long _rss = get_mm_rss(mm); \ + if ((mm)->hiwater_rss < _rss) \ + (mm)->hiwater_rss = _rss; \ +} while (0) +#define update_hiwater_vm(mm) do { \ + if ((mm)->hiwater_vm < (mm)->total_vm) \ + (mm)->hiwater_vm = (mm)->total_vm; \ +} while (0) + struct mm_struct { struct vm_area_struct * mmap; /* list of VMAs */ struct rb_root mm_rb; @@ -267,15 +323,20 @@ struct mm_struct { * by mmlist_lock */ + /* Special counters, in some configurations protected by the + * page_table_lock, in other configurations by being atomic. + */ + mm_counter_t _file_rss; + mm_counter_t _anon_rss; + + unsigned long hiwater_rss; /* High-watermark of RSS usage */ + unsigned long hiwater_vm; /* High-water virtual memory usage */ + + unsigned long total_vm, locked_vm, shared_vm, exec_vm; + unsigned long stack_vm, reserved_vm, def_flags, nr_ptes; unsigned long start_code, end_code, start_data, end_data; unsigned long start_brk, brk, start_stack; unsigned long arg_start, arg_end, env_start, env_end; - unsigned long total_vm, locked_vm, shared_vm; - unsigned long exec_vm, stack_vm, reserved_vm, def_flags, nr_ptes; - - /* Special counters protected by the page_table_lock */ - mm_counter_t _rss; - mm_counter_t _anon_rss; unsigned long saved_auxv[AT_VECTOR_SIZE]; /* for /proc/PID/auxv */ @@ -296,11 +357,6 @@ struct mm_struct { /* aio bits */ rwlock_t ioctx_list_lock; struct kioctx *ioctx_list; - - struct kioctx default_kioctx; - - unsigned long hiwater_rss; /* High-water RSS usage */ - unsigned long hiwater_vm; /* High-water virtual memory usage */ }; struct sighand_struct { @@ -883,7 +939,7 @@ extern int set_cpus_allowed(task_t *p, cpumask_t new_mask); #else static inline int set_cpus_allowed(task_t *p, cpumask_t new_mask) { - if (!cpus_intersects(new_mask, cpu_online_map)) + if (!cpu_isset(0, new_mask)) return -EINVAL; return 0; } @@ -1006,6 +1062,7 @@ extern int force_sig_info(int, struct siginfo *, struct task_struct *); extern int __kill_pg_info(int sig, struct siginfo *info, pid_t pgrp); extern int kill_pg_info(int, struct siginfo *, pid_t); extern int kill_proc_info(int, struct siginfo *, pid_t); +extern int kill_proc_info_as_uid(int, struct siginfo *, pid_t, uid_t, uid_t); extern void do_notify_parent(struct task_struct *, int); extern void force_sig(int, struct task_struct *); extern void force_sig_specific(int, struct task_struct *); @@ -1026,6 +1083,11 @@ extern int do_sigaltstack(const stack_t __user *, stack_t __user *, unsigned lon #define SEND_SIG_PRIV ((struct siginfo *) 1) #define SEND_SIG_FORCED ((struct siginfo *) 2) +static inline int is_si_special(const struct siginfo *info) +{ + return info <= SEND_SIG_FORCED; +} + /* True if we are on the alternate signal stack. */ static inline int on_sig_stack(unsigned long sp) @@ -1153,7 +1215,7 @@ extern void unhash_process(struct task_struct *p); /* * Protects ->fs, ->files, ->mm, ->ptrace, ->group_info, ->comm, keyring * subscriptions and synchronises with wait4(). Also used in procfs. Also - * pins the final release of task.io_context. + * pins the final release of task.io_context. Also protects ->cpuset. * * Nests both inside and outside of read_lock(&tasklist_lock). * It must not be nested with write_lock_irq(&tasklist_lock), @@ -1169,32 +1231,49 @@ static inline void task_unlock(struct task_struct *p) spin_unlock(&p->alloc_lock); } +#ifndef __HAVE_THREAD_FUNCTIONS + +#define task_thread_info(task) (task)->thread_info + +static inline void setup_thread_stack(struct task_struct *p, struct task_struct *org) +{ + *task_thread_info(p) = *task_thread_info(org); + task_thread_info(p)->task = p; +} + +static inline unsigned long *end_of_stack(struct task_struct *p) +{ + return (unsigned long *)(p->thread_info + 1); +} + +#endif + /* set thread flags in other task's structures * - see asm/thread_info.h for TIF_xxxx flags available */ static inline void set_tsk_thread_flag(struct task_struct *tsk, int flag) { - set_ti_thread_flag(tsk->thread_info,flag); + set_ti_thread_flag(task_thread_info(tsk), flag); } static inline void clear_tsk_thread_flag(struct task_struct *tsk, int flag) { - clear_ti_thread_flag(tsk->thread_info,flag); + clear_ti_thread_flag(task_thread_info(tsk), flag); } static inline int test_and_set_tsk_thread_flag(struct task_struct *tsk, int flag) { - return test_and_set_ti_thread_flag(tsk->thread_info,flag); + return test_and_set_ti_thread_flag(task_thread_info(tsk), flag); } static inline int test_and_clear_tsk_thread_flag(struct task_struct *tsk, int flag) { - return test_and_clear_ti_thread_flag(tsk->thread_info,flag); + return test_and_clear_ti_thread_flag(task_thread_info(tsk), flag); } static inline int test_tsk_thread_flag(struct task_struct *tsk, int flag) { - return test_ti_thread_flag(tsk->thread_info,flag); + return test_ti_thread_flag(task_thread_info(tsk), flag); } static inline void set_tsk_need_resched(struct task_struct *tsk) @@ -1265,12 +1344,12 @@ extern void signal_wake_up(struct task_struct *t, int resume_stopped); static inline unsigned int task_cpu(const struct task_struct *p) { - return p->thread_info->cpu; + return task_thread_info(p)->cpu; } static inline void set_task_cpu(struct task_struct *p, unsigned int cpu) { - p->thread_info->cpu = cpu; + task_thread_info(p)->cpu = cpu; } #else diff --git a/include/linux/sdladrv.h b/include/linux/sdladrv.h index 78f634007fc6..c85e103d5e7b 100644 --- a/include/linux/sdladrv.h +++ b/include/linux/sdladrv.h @@ -52,12 +52,8 @@ typedef struct sdlahw extern int sdla_setup (sdlahw_t* hw, void* sfm, unsigned len); extern int sdla_down (sdlahw_t* hw); -extern int sdla_inten (sdlahw_t* hw); -extern int sdla_intde (sdlahw_t* hw); -extern int sdla_intack (sdlahw_t* hw); extern void S514_intack (sdlahw_t* hw, u32 int_status); extern void read_S514_int_stat (sdlahw_t* hw, u32* int_status); -extern int sdla_intr (sdlahw_t* hw); extern int sdla_mapmem (sdlahw_t* hw, unsigned long addr); extern int sdla_peek (sdlahw_t* hw, unsigned long addr, void* buf, unsigned len); diff --git a/include/linux/security.h b/include/linux/security.h index 0e43460d374e..f7e0ae018712 100644 --- a/include/linux/security.h +++ b/include/linux/security.h @@ -30,6 +30,7 @@ #include <linux/shm.h> #include <linux/msg.h> #include <linux/sched.h> +#include <linux/key.h> struct ctl_table; @@ -385,6 +386,9 @@ struct swap_info_struct; * NULL to request the size of the buffer required. @size indicates * the size of @buffer in bytes. Note that @name is the remainder * of the attribute name after the security. prefix has been removed. + * @err is the return value from the preceding fs getxattr call, + * and can be used by the security module to determine whether it + * should try and canonicalize the attribute value. * Return number of bytes used/required on success. * @inode_setsecurity: * Set the security label associated with @name for @inode from the @@ -785,6 +789,27 @@ struct swap_info_struct; * @sk_free_security: * Deallocate security structure. * + * Security hooks affecting all Key Management operations + * + * @key_alloc: + * Permit allocation of a key and assign security data. Note that key does + * not have a serial number assigned at this point. + * @key points to the key. + * Return 0 if permission is granted, -ve error otherwise. + * @key_free: + * Notification of destruction; free security data. + * @key points to the key. + * No return value. + * @key_permission: + * See whether a specific operational right is granted to a process on a + * key. + * @key_ref refers to the key (key pointer + possession attribute bit). + * @context points to the process to provide the context against which to + * evaluate the security data on the key. + * @perm describes the combination of permissions required of this key. + * Return 1 if permission granted, 0 if permission denied and -ve it the + * normal permissions model should be effected. + * * Security hooks affecting all System V IPC operations. * * @ipc_permission: @@ -1091,7 +1116,7 @@ struct security_operations { int (*inode_getxattr) (struct dentry *dentry, char *name); int (*inode_listxattr) (struct dentry *dentry); int (*inode_removexattr) (struct dentry *dentry, char *name); - int (*inode_getsecurity)(struct inode *inode, const char *name, void *buffer, size_t size); + int (*inode_getsecurity)(struct inode *inode, const char *name, void *buffer, size_t size, int err); int (*inode_setsecurity)(struct inode *inode, const char *name, const void *value, size_t size, int flags); int (*inode_listsecurity)(struct inode *inode, char *buffer, size_t buffer_size); @@ -1210,9 +1235,20 @@ struct security_operations { int (*socket_shutdown) (struct socket * sock, int how); int (*socket_sock_rcv_skb) (struct sock * sk, struct sk_buff * skb); int (*socket_getpeersec) (struct socket *sock, char __user *optval, int __user *optlen, unsigned len); - int (*sk_alloc_security) (struct sock *sk, int family, int priority); + int (*sk_alloc_security) (struct sock *sk, int family, gfp_t priority); void (*sk_free_security) (struct sock *sk); #endif /* CONFIG_SECURITY_NETWORK */ + + /* key management security hooks */ +#ifdef CONFIG_KEYS + int (*key_alloc)(struct key *key); + void (*key_free)(struct key *key); + int (*key_permission)(key_ref_t key_ref, + struct task_struct *context, + key_perm_t perm); + +#endif /* CONFIG_KEYS */ + }; /* global variables */ @@ -1580,11 +1616,11 @@ static inline int security_inode_removexattr (struct dentry *dentry, char *name) return security_ops->inode_removexattr (dentry, name); } -static inline int security_inode_getsecurity(struct inode *inode, const char *name, void *buffer, size_t size) +static inline int security_inode_getsecurity(struct inode *inode, const char *name, void *buffer, size_t size, int err) { if (unlikely (IS_PRIVATE (inode))) return 0; - return security_ops->inode_getsecurity(inode, name, buffer, size); + return security_ops->inode_getsecurity(inode, name, buffer, size, err); } static inline int security_inode_setsecurity(struct inode *inode, const char *name, const void *value, size_t size, int flags) @@ -2222,7 +2258,7 @@ static inline int security_inode_removexattr (struct dentry *dentry, char *name) return cap_inode_removexattr(dentry, name); } -static inline int security_inode_getsecurity(struct inode *inode, const char *name, void *buffer, size_t size) +static inline int security_inode_getsecurity(struct inode *inode, const char *name, void *buffer, size_t size, int err) { return -EOPNOTSUPP; } @@ -2634,8 +2670,7 @@ static inline int security_socket_getpeersec(struct socket *sock, char __user *o return security_ops->socket_getpeersec(sock, optval, optlen, len); } -static inline int security_sk_alloc(struct sock *sk, int family, - unsigned int __nocast priority) +static inline int security_sk_alloc(struct sock *sk, int family, gfp_t priority) { return security_ops->sk_alloc_security(sk, family, priority); } @@ -2752,8 +2787,7 @@ static inline int security_socket_getpeersec(struct socket *sock, char __user *o return -ENOPROTOOPT; } -static inline int security_sk_alloc(struct sock *sk, int family, - unsigned int __nocast priority) +static inline int security_sk_alloc(struct sock *sk, int family, gfp_t priority) { return 0; } @@ -2763,5 +2797,45 @@ static inline void security_sk_free(struct sock *sk) } #endif /* CONFIG_SECURITY_NETWORK */ +#ifdef CONFIG_KEYS +#ifdef CONFIG_SECURITY +static inline int security_key_alloc(struct key *key) +{ + return security_ops->key_alloc(key); +} + +static inline void security_key_free(struct key *key) +{ + security_ops->key_free(key); +} + +static inline int security_key_permission(key_ref_t key_ref, + struct task_struct *context, + key_perm_t perm) +{ + return security_ops->key_permission(key_ref, context, perm); +} + +#else + +static inline int security_key_alloc(struct key *key) +{ + return 0; +} + +static inline void security_key_free(struct key *key) +{ +} + +static inline int security_key_permission(key_ref_t key_ref, + struct task_struct *context, + key_perm_t perm) +{ + return 0; +} + +#endif +#endif /* CONFIG_KEYS */ + #endif /* ! __LINUX_SECURITY_H */ diff --git a/include/linux/sem.h b/include/linux/sem.h index 106f9757339a..3c1f1120fe88 100644 --- a/include/linux/sem.h +++ b/include/linux/sem.h @@ -79,6 +79,8 @@ struct seminfo { #ifdef __KERNEL__ +struct task_struct; + /* One semaphore structure for each semaphore in the system. */ struct sem { int semval; /* current value */ diff --git a/include/linux/serial.h b/include/linux/serial.h index 12cd9cf65e8f..33fc8cb8ddfb 100644 --- a/include/linux/serial.h +++ b/include/linux/serial.h @@ -11,6 +11,7 @@ #define _LINUX_SERIAL_H #ifdef __KERNEL__ +#include <linux/types.h> #include <asm/page.h> /* diff --git a/include/linux/serial_8250.h b/include/linux/serial_8250.h index 317a979b24de..cee302aefdb7 100644 --- a/include/linux/serial_8250.h +++ b/include/linux/serial_8250.h @@ -12,7 +12,7 @@ #define _LINUX_SERIAL_8250_H #include <linux/serial_core.h> -#include <linux/device.h> +#include <linux/platform_device.h> /* * This is the platform device platform_data structure @@ -42,6 +42,7 @@ enum { PLAT8250_DEV_BOCA, PLAT8250_DEV_HUB6, PLAT8250_DEV_MCA, + PLAT8250_DEV_AU1X00, }; /* diff --git a/include/linux/serial_core.h b/include/linux/serial_core.h index 27db8da43aa4..e3710d7e260a 100644 --- a/include/linux/serial_core.h +++ b/include/linux/serial_core.h @@ -117,7 +117,12 @@ #define PORT_M32R_SIO 68 /*Digi jsm */ -#define PORT_JSM 65 +#define PORT_JSM 69 + +#define PORT_IP3106 70 + +/* Hilscher netx */ +#define PORT_NETX 71 #ifdef __KERNEL__ @@ -209,6 +214,7 @@ struct uart_port { #define UPIO_HUB6 (1) #define UPIO_MEM (2) #define UPIO_MEM32 (3) +#define UPIO_AU (4) /* Au1x00 type IO */ unsigned int read_status_mask; /* driver specific */ unsigned int ignore_status_mask; /* driver specific */ diff --git a/include/linux/serial_ip3106.h b/include/linux/serial_ip3106.h new file mode 100644 index 000000000000..f500ac602c5c --- /dev/null +++ b/include/linux/serial_ip3106.h @@ -0,0 +1,81 @@ +/* + * Embedded Alley Solutions, source@embeddedalley.com. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#ifndef _LINUX_SERIAL_IP3106_H +#define _LINUX_SERIAL_IP3106_H + +#include <linux/serial_core.h> +#include <linux/device.h> + +#define IP3106_NR_PORTS 2 + +struct ip3106_port { + struct uart_port port; + struct timer_list timer; + unsigned int old_status; +}; + +/* register offsets */ +#define IP3106_LCR 0 +#define IP3106_MCR 0x004 +#define IP3106_BAUD 0x008 +#define IP3106_CFG 0x00c +#define IP3106_FIFO 0x028 +#define IP3106_ISTAT 0xfe0 +#define IP3106_IEN 0xfe4 +#define IP3106_ICLR 0xfe8 +#define IP3106_ISET 0xfec +#define IP3106_PD 0xff4 +#define IP3106_MID 0xffc + +#define IP3106_UART_LCR_TXBREAK (1<<30) +#define IP3106_UART_LCR_PAREVN 0x10000000 +#define IP3106_UART_LCR_PAREN 0x08000000 +#define IP3106_UART_LCR_2STOPB 0x04000000 +#define IP3106_UART_LCR_8BIT 0x01000000 +#define IP3106_UART_LCR_TX_RST 0x00040000 +#define IP3106_UART_LCR_RX_RST 0x00020000 +#define IP3106_UART_LCR_RX_NEXT 0x00010000 + +#define IP3106_UART_MCR_SCR 0xFF000000 +#define IP3106_UART_MCR_DCD 0x00800000 +#define IP3106_UART_MCR_CTS 0x00100000 +#define IP3106_UART_MCR_LOOP 0x00000010 +#define IP3106_UART_MCR_RTS 0x00000002 +#define IP3106_UART_MCR_DTR 0x00000001 + +#define IP3106_UART_INT_TX 0x00000080 +#define IP3106_UART_INT_EMPTY 0x00000040 +#define IP3106_UART_INT_RCVTO 0x00000020 +#define IP3106_UART_INT_RX 0x00000010 +#define IP3106_UART_INT_RXOVRN 0x00000008 +#define IP3106_UART_INT_FRERR 0x00000004 +#define IP3106_UART_INT_BREAK 0x00000002 +#define IP3106_UART_INT_PARITY 0x00000001 +#define IP3106_UART_INT_ALLRX 0x0000003F +#define IP3106_UART_INT_ALLTX 0x000000C0 + +#define IP3106_UART_FIFO_TXFIFO 0x001F0000 +#define IP3106_UART_FIFO_TXFIFO_STA (0x1f<<16) +#define IP3106_UART_FIFO_RXBRK 0x00008000 +#define IP3106_UART_FIFO_RXFE 0x00004000 +#define IP3106_UART_FIFO_RXPAR 0x00002000 +#define IP3106_UART_FIFO_RXFIFO 0x00001F00 +#define IP3106_UART_FIFO_RBRTHR 0x000000FF + +#endif diff --git a/include/linux/shm.h b/include/linux/shm.h index 80113a1f60bc..a2c896ad0bef 100644 --- a/include/linux/shm.h +++ b/include/linux/shm.h @@ -92,6 +92,7 @@ struct shmid_kernel /* private to the kernel */ #define SHM_DEST 01000 /* segment will be destroyed on last detach */ #define SHM_LOCKED 02000 /* segment will not be swapped */ #define SHM_HUGETLB 04000 /* segment will use huge TLB pages */ +#define SHM_NORESERVE 010000 /* don't check for reservations */ #ifdef CONFIG_SYSVIPC long do_shmat(int shmid, char __user *shmaddr, int shmflg, unsigned long *addr); diff --git a/include/linux/signal.h b/include/linux/signal.h index 7be18b5e2fb4..5dd5f02c5c5f 100644 --- a/include/linux/signal.h +++ b/include/linux/signal.h @@ -25,7 +25,6 @@ struct sigqueue { struct list_head list; - spinlock_t *lock; int flags; siginfo_t info; struct user_struct *user; diff --git a/include/linux/skbuff.h b/include/linux/skbuff.h index 2741c0c55e83..8c5d6001a923 100644 --- a/include/linux/skbuff.h +++ b/include/linux/skbuff.h @@ -137,6 +137,8 @@ struct skb_shared_info { unsigned int nr_frags; unsigned short tso_size; unsigned short tso_segs; + unsigned short ufo_size; + unsigned int ip6_frag_id; struct sk_buff *frag_list; skb_frag_t frags[MAX_SKB_FRAGS]; }; @@ -155,8 +157,6 @@ struct skb_shared_info { #define SKB_DATAREF_SHIFT 16 #define SKB_DATAREF_MASK ((1 << SKB_DATAREF_SHIFT) - 1) -extern struct timeval skb_tv_base; - struct skb_timeval { u32 off_sec; u32 off_usec; @@ -173,9 +173,8 @@ enum { * struct sk_buff - socket buffer * @next: Next buffer in list * @prev: Previous buffer in list - * @list: List we are on * @sk: Socket we are owned by - * @tstamp: Time we arrived stored as offset to skb_tv_base + * @tstamp: Time we arrived * @dev: Device we arrived on/are leaving by * @input_dev: Device we arrived on * @h: Transport layer header @@ -192,6 +191,7 @@ enum { * @cloned: Head may be cloned (check refcnt to be sure) * @nohdr: Payload reference only, must not modify header * @pkt_type: Packet class + * @fclone: skbuff clone status * @ip_summed: Driver fed us an IP checksum * @priority: Packet queueing priority * @users: User count - see {datagram,tcp}.c @@ -204,7 +204,9 @@ enum { * @destructor: Destruct function * @nfmark: Can be used for communication between hooks * @nfct: Associated connection, if any + * @ipvs_property: skbuff is owned by ipvs * @nfctinfo: Relationship of this skb to the connection + * @nfct_reasm: netfilter conntrack re-assembly pointer * @nf_bridge: Saved data about a bridged frame - see br_netfilter.c * @tc_index: Traffic control index * @tc_verd: traffic control verdict @@ -263,15 +265,16 @@ struct sk_buff { nohdr:1, nfctinfo:3; __u8 pkt_type:3, - fclone:2; + fclone:2, + ipvs_property:1; __be16 protocol; void (*destructor)(struct sk_buff *skb); #ifdef CONFIG_NETFILTER __u32 nfmark; struct nf_conntrack *nfct; -#if defined(CONFIG_IP_VS) || defined(CONFIG_IP_VS_MODULE) - __u8 ipvs_property:1; +#if defined(CONFIG_NF_CONNTRACK) || defined(CONFIG_NF_CONNTRACK_MODULE) + struct sk_buff *nfct_reasm; #endif #ifdef CONFIG_BRIDGE_NETFILTER struct nf_bridge_info *nf_bridge; @@ -304,37 +307,37 @@ struct sk_buff { extern void __kfree_skb(struct sk_buff *skb); extern struct sk_buff *__alloc_skb(unsigned int size, - unsigned int __nocast priority, int fclone); + gfp_t priority, int fclone); static inline struct sk_buff *alloc_skb(unsigned int size, - unsigned int __nocast priority) + gfp_t priority) { return __alloc_skb(size, priority, 0); } static inline struct sk_buff *alloc_skb_fclone(unsigned int size, - unsigned int __nocast priority) + gfp_t priority) { return __alloc_skb(size, priority, 1); } extern struct sk_buff *alloc_skb_from_cache(kmem_cache_t *cp, unsigned int size, - unsigned int __nocast priority); + gfp_t priority); extern void kfree_skbmem(struct sk_buff *skb); extern struct sk_buff *skb_clone(struct sk_buff *skb, - unsigned int __nocast priority); + gfp_t priority); extern struct sk_buff *skb_copy(const struct sk_buff *skb, - unsigned int __nocast priority); + gfp_t priority); extern struct sk_buff *pskb_copy(struct sk_buff *skb, - unsigned int __nocast gfp_mask); + gfp_t gfp_mask); extern int pskb_expand_head(struct sk_buff *skb, int nhead, int ntail, - unsigned int __nocast gfp_mask); + gfp_t gfp_mask); extern struct sk_buff *skb_realloc_headroom(struct sk_buff *skb, unsigned int headroom); extern struct sk_buff *skb_copy_expand(const struct sk_buff *skb, int newheadroom, int newtailroom, - unsigned int __nocast priority); + gfp_t priority); extern struct sk_buff * skb_pad(struct sk_buff *skb, int pad); #define dev_kfree_skb(a) kfree_skb(a) extern void skb_over_panic(struct sk_buff *skb, int len, @@ -342,6 +345,11 @@ extern void skb_over_panic(struct sk_buff *skb, int len, extern void skb_under_panic(struct sk_buff *skb, int len, void *here); +extern int skb_append_datato_frags(struct sock *sk, struct sk_buff *skb, + int getfrag(void *from, char *to, int offset, + int len,int odd, struct sk_buff *skb), + void *from, int length); + struct skb_seq_state { __u32 lower_offset; @@ -486,7 +494,7 @@ static inline int skb_shared(const struct sk_buff *skb) * NULL is returned on a memory allocation failure. */ static inline struct sk_buff *skb_share_check(struct sk_buff *skb, - unsigned int __nocast pri) + gfp_t pri) { might_sleep_if(pri & __GFP_WAIT); if (skb_shared(skb)) { @@ -518,7 +526,7 @@ static inline struct sk_buff *skb_share_check(struct sk_buff *skb, * %NULL is returned on a memory allocation failure. */ static inline struct sk_buff *skb_unshare(struct sk_buff *skb, - unsigned int __nocast pri) + gfp_t pri) { might_sleep_if(pri & __GFP_WAIT); if (skb_cloned(skb)) { @@ -597,23 +605,23 @@ static inline void skb_queue_head_init(struct sk_buff_head *list) */ /** - * __skb_queue_head - queue a buffer at the list head + * __skb_queue_after - queue a buffer at the list head * @list: list to use + * @prev: place after this buffer * @newsk: buffer to queue * - * Queue a buffer at the start of a list. This function takes no locks + * Queue a buffer int the middle of a list. This function takes no locks * and you must therefore hold required locks before calling it. * * A buffer cannot be placed on two lists at the same time. */ -extern void skb_queue_head(struct sk_buff_head *list, struct sk_buff *newsk); -static inline void __skb_queue_head(struct sk_buff_head *list, - struct sk_buff *newsk) +static inline void __skb_queue_after(struct sk_buff_head *list, + struct sk_buff *prev, + struct sk_buff *newsk) { - struct sk_buff *prev, *next; - + struct sk_buff *next; list->qlen++; - prev = (struct sk_buff *)list; + next = prev->next; newsk->next = next; newsk->prev = prev; @@ -621,6 +629,23 @@ static inline void __skb_queue_head(struct sk_buff_head *list, } /** + * __skb_queue_head - queue a buffer at the list head + * @list: list to use + * @newsk: buffer to queue + * + * Queue a buffer at the start of a list. This function takes no locks + * and you must therefore hold required locks before calling it. + * + * A buffer cannot be placed on two lists at the same time. + */ +extern void skb_queue_head(struct sk_buff_head *list, struct sk_buff *newsk); +static inline void __skb_queue_head(struct sk_buff_head *list, + struct sk_buff *newsk) +{ + __skb_queue_after(list, (struct sk_buff *)list, newsk); +} + +/** * __skb_queue_tail - queue a buffer at the list tail * @list: list to use * @newsk: buffer to queue @@ -1019,7 +1044,7 @@ static inline void __skb_queue_purge(struct sk_buff_head *list) * %NULL is returned in there is no free memory. */ static inline struct sk_buff *__dev_alloc_skb(unsigned int length, - unsigned int __nocast gfp_mask) + gfp_t gfp_mask) { struct sk_buff *skb = alloc_skb(length + 16, gfp_mask); if (likely(skb)) @@ -1132,8 +1157,8 @@ static inline int skb_can_coalesce(struct sk_buff *skb, int i, * If there is no free memory -ENOMEM is returned, otherwise zero * is returned and the old skb data released. */ -extern int __skb_linearize(struct sk_buff *skb, unsigned int __nocast gfp); -static inline int skb_linearize(struct sk_buff *skb, unsigned int __nocast gfp) +extern int __skb_linearize(struct sk_buff *skb, gfp_t gfp); +static inline int skb_linearize(struct sk_buff *skb, gfp_t gfp) { return __skb_linearize(skb, gfp); } @@ -1197,6 +1222,11 @@ static inline void kunmap_skb_frag(void *vaddr) prefetch(skb->next), (skb != (struct sk_buff *)(queue)); \ skb = skb->next) +#define skb_queue_reverse_walk(queue, skb) \ + for (skb = (queue)->prev; \ + prefetch(skb->prev), (skb != (struct sk_buff *)(queue)); \ + skb = skb->prev) + extern struct sk_buff *skb_recv_datagram(struct sock *sk, unsigned flags, int noblock, int *err); @@ -1205,8 +1235,7 @@ extern unsigned int datagram_poll(struct file *file, struct socket *sock, extern int skb_copy_datagram_iovec(const struct sk_buff *from, int offset, struct iovec *to, int size); -extern int skb_copy_and_csum_datagram_iovec(const - struct sk_buff *skb, +extern int skb_copy_and_csum_datagram_iovec(struct sk_buff *skb, int hlen, struct iovec *iov); extern void skb_free_datagram(struct sock *sk, struct sk_buff *skb); @@ -1255,10 +1284,6 @@ static inline void skb_get_timestamp(const struct sk_buff *skb, struct timeval * { stamp->tv_sec = skb->tstamp.off_sec; stamp->tv_usec = skb->tstamp.off_usec; - if (skb->tstamp.off_sec) { - stamp->tv_sec += skb_tv_base.tv_sec; - stamp->tv_usec += skb_tv_base.tv_usec; - } } /** @@ -1272,12 +1297,36 @@ static inline void skb_get_timestamp(const struct sk_buff *skb, struct timeval * */ static inline void skb_set_timestamp(struct sk_buff *skb, const struct timeval *stamp) { - skb->tstamp.off_sec = stamp->tv_sec - skb_tv_base.tv_sec; - skb->tstamp.off_usec = stamp->tv_usec - skb_tv_base.tv_usec; + skb->tstamp.off_sec = stamp->tv_sec; + skb->tstamp.off_usec = stamp->tv_usec; } extern void __net_timestamp(struct sk_buff *skb); +extern unsigned int __skb_checksum_complete(struct sk_buff *skb); + +/** + * skb_checksum_complete - Calculate checksum of an entire packet + * @skb: packet to process + * + * This function calculates the checksum over the entire packet plus + * the value of skb->csum. The latter can be used to supply the + * checksum of a pseudo header as used by TCP/UDP. It returns the + * checksum. + * + * For protocols that contain complete checksums such as ICMP/TCP/UDP, + * this function can be used to verify that checksum on received + * packets. In that case the function should return zero if the + * checksum is correct. In particular, this function will return zero + * if skb->ip_summed is CHECKSUM_UNNECESSARY which indicates that the + * hardware has already verified the correctness of the checksum. + */ +static inline unsigned int skb_checksum_complete(struct sk_buff *skb) +{ + return skb->ip_summed != CHECKSUM_UNNECESSARY && + __skb_checksum_complete(skb); +} + #ifdef CONFIG_NETFILTER static inline void nf_conntrack_put(struct nf_conntrack *nfct) { @@ -1289,10 +1338,26 @@ static inline void nf_conntrack_get(struct nf_conntrack *nfct) if (nfct) atomic_inc(&nfct->use); } +#if defined(CONFIG_NF_CONNTRACK) || defined(CONFIG_NF_CONNTRACK_MODULE) +static inline void nf_conntrack_get_reasm(struct sk_buff *skb) +{ + if (skb) + atomic_inc(&skb->users); +} +static inline void nf_conntrack_put_reasm(struct sk_buff *skb) +{ + if (skb) + kfree_skb(skb); +} +#endif static inline void nf_reset(struct sk_buff *skb) { nf_conntrack_put(skb->nfct); skb->nfct = NULL; +#if defined(CONFIG_NF_CONNTRACK) || defined(CONFIG_NF_CONNTRACK_MODULE) + nf_conntrack_put_reasm(skb->nfct_reasm); + skb->nfct_reasm = NULL; +#endif } #ifdef CONFIG_BRIDGE_NETFILTER diff --git a/include/linux/slab.h b/include/linux/slab.h index 1f356f3bbc64..d1ea4051b996 100644 --- a/include/linux/slab.h +++ b/include/linux/slab.h @@ -9,7 +9,7 @@ #if defined(__KERNEL__) -typedef struct kmem_cache_s kmem_cache_t; +typedef struct kmem_cache kmem_cache_t; #include <linux/config.h> /* kmalloc_sizes.h needs CONFIG_ options */ #include <linux/gfp.h> @@ -61,11 +61,11 @@ extern kmem_cache_t *kmem_cache_create(const char *, size_t, size_t, unsigned lo void (*)(void *, kmem_cache_t *, unsigned long)); extern int kmem_cache_destroy(kmem_cache_t *); extern int kmem_cache_shrink(kmem_cache_t *); -extern void *kmem_cache_alloc(kmem_cache_t *, unsigned int __nocast); +extern void *kmem_cache_alloc(kmem_cache_t *, gfp_t); extern void kmem_cache_free(kmem_cache_t *, void *); extern unsigned int kmem_cache_size(kmem_cache_t *); extern const char *kmem_cache_name(kmem_cache_t *); -extern kmem_cache_t *kmem_find_general_cachep(size_t size, unsigned int __nocast gfpflags); +extern kmem_cache_t *kmem_find_general_cachep(size_t size, gfp_t gfpflags); /* Size description struct for general caches. */ struct cache_sizes { @@ -74,9 +74,9 @@ struct cache_sizes { kmem_cache_t *cs_dmacachep; }; extern struct cache_sizes malloc_sizes[]; -extern void *__kmalloc(size_t, unsigned int __nocast); +extern void *__kmalloc(size_t, gfp_t); -static inline void *kmalloc(size_t size, unsigned int __nocast flags) +static inline void *kmalloc(size_t size, gfp_t flags) { if (__builtin_constant_p(size)) { int i = 0; @@ -99,7 +99,7 @@ found: return __kmalloc(size, flags); } -extern void *kzalloc(size_t, unsigned int __nocast); +extern void *kzalloc(size_t, gfp_t); /** * kcalloc - allocate memory for an array. The memory is set to zero. @@ -107,7 +107,7 @@ extern void *kzalloc(size_t, unsigned int __nocast); * @size: element size. * @flags: the type of memory to allocate. */ -static inline void *kcalloc(size_t n, size_t size, unsigned int __nocast flags) +static inline void *kcalloc(size_t n, size_t size, gfp_t flags) { if (n != 0 && size > INT_MAX / n) return NULL; @@ -118,15 +118,14 @@ extern void kfree(const void *); extern unsigned int ksize(const void *); #ifdef CONFIG_NUMA -extern void *kmem_cache_alloc_node(kmem_cache_t *, - unsigned int __nocast flags, int node); -extern void *kmalloc_node(size_t size, unsigned int __nocast flags, int node); +extern void *kmem_cache_alloc_node(kmem_cache_t *, gfp_t flags, int node); +extern void *kmalloc_node(size_t size, gfp_t flags, int node); #else -static inline void *kmem_cache_alloc_node(kmem_cache_t *cachep, int flags, int node) +static inline void *kmem_cache_alloc_node(kmem_cache_t *cachep, gfp_t flags, int node) { return kmem_cache_alloc(cachep, flags); } -static inline void *kmalloc_node(size_t size, unsigned int __nocast flags, int node) +static inline void *kmalloc_node(size_t size, gfp_t flags, int node) { return kmalloc(size, flags); } diff --git a/include/linux/smp_lock.h b/include/linux/smp_lock.h index b63ce7014093..fa1ff3b165fe 100644 --- a/include/linux/smp_lock.h +++ b/include/linux/smp_lock.h @@ -2,11 +2,10 @@ #define __LINUX_SMPLOCK_H #include <linux/config.h> +#ifdef CONFIG_LOCK_KERNEL #include <linux/sched.h> #include <linux/spinlock.h> -#ifdef CONFIG_LOCK_KERNEL - #define kernel_locked() (current->lock_depth >= 0) extern int __lockfunc __reacquire_kernel_lock(void); diff --git a/include/linux/spinlock.h b/include/linux/spinlock.h index cdc99a27840d..0e9682c9def5 100644 --- a/include/linux/spinlock.h +++ b/include/linux/spinlock.h @@ -171,23 +171,42 @@ extern int __lockfunc generic__raw_read_trylock(raw_rwlock_t *lock); #define write_lock_irq(lock) _write_lock_irq(lock) #define write_lock_bh(lock) _write_lock_bh(lock) -#define spin_unlock(lock) _spin_unlock(lock) -#define write_unlock(lock) _write_unlock(lock) -#define read_unlock(lock) _read_unlock(lock) +/* + * We inline the unlock functions in the nondebug case: + */ +#if defined(CONFIG_DEBUG_SPINLOCK) || defined(CONFIG_PREEMPT) || !defined(CONFIG_SMP) +# define spin_unlock(lock) _spin_unlock(lock) +# define read_unlock(lock) _read_unlock(lock) +# define write_unlock(lock) _write_unlock(lock) +#else +# define spin_unlock(lock) __raw_spin_unlock(&(lock)->raw_lock) +# define read_unlock(lock) __raw_read_unlock(&(lock)->raw_lock) +# define write_unlock(lock) __raw_write_unlock(&(lock)->raw_lock) +#endif + +#if defined(CONFIG_DEBUG_SPINLOCK) || defined(CONFIG_PREEMPT) || !defined(CONFIG_SMP) +# define spin_unlock_irq(lock) _spin_unlock_irq(lock) +# define read_unlock_irq(lock) _read_unlock_irq(lock) +# define write_unlock_irq(lock) _write_unlock_irq(lock) +#else +# define spin_unlock_irq(lock) \ + do { __raw_spin_unlock(&(lock)->raw_lock); local_irq_enable(); } while (0) +# define read_unlock_irq(lock) \ + do { __raw_read_unlock(&(lock)->raw_lock); local_irq_enable(); } while (0) +# define write_unlock_irq(lock) \ + do { __raw_write_unlock(&(lock)->raw_lock); local_irq_enable(); } while (0) +#endif #define spin_unlock_irqrestore(lock, flags) \ _spin_unlock_irqrestore(lock, flags) -#define spin_unlock_irq(lock) _spin_unlock_irq(lock) #define spin_unlock_bh(lock) _spin_unlock_bh(lock) #define read_unlock_irqrestore(lock, flags) \ _read_unlock_irqrestore(lock, flags) -#define read_unlock_irq(lock) _read_unlock_irq(lock) #define read_unlock_bh(lock) _read_unlock_bh(lock) #define write_unlock_irqrestore(lock, flags) \ _write_unlock_irqrestore(lock, flags) -#define write_unlock_irq(lock) _write_unlock_irq(lock) #define write_unlock_bh(lock) _write_unlock_bh(lock) #define spin_trylock_bh(lock) __cond_lock(_spin_trylock_bh(lock)) diff --git a/include/linux/stallion.h b/include/linux/stallion.h index e89b77b6505a..13a37f137ea2 100644 --- a/include/linux/stallion.h +++ b/include/linux/stallion.h @@ -21,8 +21,6 @@ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */ -#include <linux/version.h> - /*****************************************************************************/ #ifndef _STALLION_H #define _STALLION_H diff --git a/include/linux/string.h b/include/linux/string.h index dab2652acbd8..369be3264a55 100644 --- a/include/linux/string.h +++ b/include/linux/string.h @@ -88,7 +88,7 @@ extern int memcmp(const void *,const void *,__kernel_size_t); extern void * memchr(const void *,int,__kernel_size_t); #endif -extern char *kstrdup(const char *s, unsigned int __nocast gfp); +extern char *kstrdup(const char *s, gfp_t gfp); #ifdef __cplusplus } diff --git a/include/linux/sunrpc/auth.h b/include/linux/sunrpc/auth.h index 04ebc24db348..b68c11a2d6dd 100644 --- a/include/linux/sunrpc/auth.h +++ b/include/linux/sunrpc/auth.h @@ -66,7 +66,12 @@ struct rpc_cred_cache { struct rpc_auth { unsigned int au_cslack; /* call cred size estimate */ - unsigned int au_rslack; /* reply verf size guess */ + /* guess at number of u32's auth adds before + * reply data; normally the verifier size: */ + unsigned int au_rslack; + /* for gss, used to calculate au_rslack: */ + unsigned int au_verfsize; + unsigned int au_flags; /* various flags */ struct rpc_authops * au_ops; /* operations */ rpc_authflavor_t au_flavor; /* pseudoflavor (note may diff --git a/include/linux/sunrpc/debug.h b/include/linux/sunrpc/debug.h index eadb31e3c198..1a42d902bc11 100644 --- a/include/linux/sunrpc/debug.h +++ b/include/linux/sunrpc/debug.h @@ -32,6 +32,7 @@ #define RPCDBG_AUTH 0x0010 #define RPCDBG_PMAP 0x0020 #define RPCDBG_SCHED 0x0040 +#define RPCDBG_TRANS 0x0080 #define RPCDBG_SVCSOCK 0x0100 #define RPCDBG_SVCDSP 0x0200 #define RPCDBG_MISC 0x0400 @@ -94,6 +95,8 @@ enum { CTL_NLMDEBUG, CTL_SLOTTABLE_UDP, CTL_SLOTTABLE_TCP, + CTL_MIN_RESVPORT, + CTL_MAX_RESVPORT, }; #endif /* _LINUX_SUNRPC_DEBUG_H_ */ diff --git a/include/linux/sunrpc/gss_api.h b/include/linux/sunrpc/gss_api.h index 689262f63059..9b8bcf125c18 100644 --- a/include/linux/sunrpc/gss_api.h +++ b/include/linux/sunrpc/gss_api.h @@ -40,14 +40,21 @@ int gss_import_sec_context( struct gss_ctx **ctx_id); u32 gss_get_mic( struct gss_ctx *ctx_id, - u32 qop, struct xdr_buf *message, struct xdr_netobj *mic_token); u32 gss_verify_mic( struct gss_ctx *ctx_id, struct xdr_buf *message, - struct xdr_netobj *mic_token, - u32 *qstate); + struct xdr_netobj *mic_token); +u32 gss_wrap( + struct gss_ctx *ctx_id, + int offset, + struct xdr_buf *outbuf, + struct page **inpages); +u32 gss_unwrap( + struct gss_ctx *ctx_id, + int offset, + struct xdr_buf *inbuf); u32 gss_delete_sec_context( struct gss_ctx **ctx_id); @@ -56,7 +63,6 @@ char *gss_service_to_auth_domain_name(struct gss_api_mech *, u32 service); struct pf_desc { u32 pseudoflavor; - u32 qop; u32 service; char *name; char *auth_domain_name; @@ -85,14 +91,21 @@ struct gss_api_ops { struct gss_ctx *ctx_id); u32 (*gss_get_mic)( struct gss_ctx *ctx_id, - u32 qop, struct xdr_buf *message, struct xdr_netobj *mic_token); u32 (*gss_verify_mic)( struct gss_ctx *ctx_id, struct xdr_buf *message, - struct xdr_netobj *mic_token, - u32 *qstate); + struct xdr_netobj *mic_token); + u32 (*gss_wrap)( + struct gss_ctx *ctx_id, + int offset, + struct xdr_buf *outbuf, + struct page **inpages); + u32 (*gss_unwrap)( + struct gss_ctx *ctx_id, + int offset, + struct xdr_buf *buf); void (*gss_delete_sec_context)( void *internal_ctx_id); }; diff --git a/include/linux/sunrpc/gss_err.h b/include/linux/sunrpc/gss_err.h index 92608a2e574c..a6807867bd21 100644 --- a/include/linux/sunrpc/gss_err.h +++ b/include/linux/sunrpc/gss_err.h @@ -66,16 +66,6 @@ typedef unsigned int OM_uint32; /* - * Define the default Quality of Protection for per-message services. Note - * that an implementation that offers multiple levels of QOP may either reserve - * a value (for example zero, as assumed here) to mean "default protection", or - * alternatively may simply equate GSS_C_QOP_DEFAULT to a specific explicit - * QOP value. However a value of 0 should always be interpreted by a GSSAPI - * implementation as a request for the default protection level. - */ -#define GSS_C_QOP_DEFAULT 0 - -/* * Expiration time of 2^32-1 seconds means infinite lifetime for a * credential or security context */ diff --git a/include/linux/sunrpc/gss_krb5.h b/include/linux/sunrpc/gss_krb5.h index ffe31d2eb9ec..2c3601d31045 100644 --- a/include/linux/sunrpc/gss_krb5.h +++ b/include/linux/sunrpc/gss_krb5.h @@ -116,18 +116,22 @@ enum seal_alg { s32 make_checksum(s32 cksumtype, char *header, int hdrlen, struct xdr_buf *body, - struct xdr_netobj *cksum); + int body_offset, struct xdr_netobj *cksum); + +u32 gss_get_mic_kerberos(struct gss_ctx *, struct xdr_buf *, + struct xdr_netobj *); + +u32 gss_verify_mic_kerberos(struct gss_ctx *, struct xdr_buf *, + struct xdr_netobj *); u32 -krb5_make_token(struct krb5_ctx *context_handle, int qop_req, - struct xdr_buf *input_message_buffer, - struct xdr_netobj *output_message_buffer, int toktype); +gss_wrap_kerberos(struct gss_ctx *ctx_id, int offset, + struct xdr_buf *outbuf, struct page **pages); u32 -krb5_read_token(struct krb5_ctx *context_handle, - struct xdr_netobj *input_token_buffer, - struct xdr_buf *message_buffer, - int *qop_state, int toktype); +gss_unwrap_kerberos(struct gss_ctx *ctx_id, int offset, + struct xdr_buf *buf); + u32 krb5_encrypt(struct crypto_tfm * key, @@ -137,6 +141,13 @@ u32 krb5_decrypt(struct crypto_tfm * key, void *iv, void *in, void *out, int length); +int +gss_encrypt_xdr_buf(struct crypto_tfm *tfm, struct xdr_buf *outbuf, int offset, + struct page **pages); + +int +gss_decrypt_xdr_buf(struct crypto_tfm *tfm, struct xdr_buf *inbuf, int offset); + s32 krb5_make_seq_num(struct crypto_tfm * key, int direction, diff --git a/include/linux/sunrpc/gss_spkm3.h b/include/linux/sunrpc/gss_spkm3.h index b5c9968c3c17..0beb2cf00a84 100644 --- a/include/linux/sunrpc/gss_spkm3.h +++ b/include/linux/sunrpc/gss_spkm3.h @@ -41,9 +41,9 @@ struct spkm3_ctx { #define SPKM_WRAP_TOK 5 #define SPKM_DEL_TOK 6 -u32 spkm3_make_token(struct spkm3_ctx *ctx, int qop_req, struct xdr_buf * text, struct xdr_netobj * token, int toktype); +u32 spkm3_make_token(struct spkm3_ctx *ctx, struct xdr_buf * text, struct xdr_netobj * token, int toktype); -u32 spkm3_read_token(struct spkm3_ctx *ctx, struct xdr_netobj *read_token, struct xdr_buf *message_buffer, int *qop_state, int toktype); +u32 spkm3_read_token(struct spkm3_ctx *ctx, struct xdr_netobj *read_token, struct xdr_buf *message_buffer, int toktype); #define CKSUMTYPE_RSA_MD5 0x0007 diff --git a/include/linux/sunrpc/msg_prot.h b/include/linux/sunrpc/msg_prot.h index 15f115332389..f43f237360ae 100644 --- a/include/linux/sunrpc/msg_prot.h +++ b/include/linux/sunrpc/msg_prot.h @@ -76,5 +76,30 @@ enum rpc_auth_stat { #define RPC_MAXNETNAMELEN 256 +/* + * From RFC 1831: + * + * "A record is composed of one or more record fragments. A record + * fragment is a four-byte header followed by 0 to (2**31) - 1 bytes of + * fragment data. The bytes encode an unsigned binary number; as with + * XDR integers, the byte order is from highest to lowest. The number + * encodes two values -- a boolean which indicates whether the fragment + * is the last fragment of the record (bit value 1 implies the fragment + * is the last fragment) and a 31-bit unsigned binary value which is the + * length in bytes of the fragment's data. The boolean value is the + * highest-order bit of the header; the length is the 31 low-order bits. + * (Note that this record specification is NOT in XDR standard form!)" + * + * The Linux RPC client always sends its requests in a single record + * fragment, limiting the maximum payload size for stream transports to + * 2GB. + */ + +typedef u32 rpc_fraghdr; + +#define RPC_LAST_STREAM_FRAGMENT (1U << 31) +#define RPC_FRAGMENT_SIZE_MASK (~RPC_LAST_STREAM_FRAGMENT) +#define RPC_MAX_FRAGMENT_SIZE ((1U << 31) - 1) + #endif /* __KERNEL__ */ #endif /* _LINUX_SUNRPC_MSGPROT_H_ */ diff --git a/include/linux/sunrpc/svc.h b/include/linux/sunrpc/svc.h index 5af8800e0ce3..e4086ec8b952 100644 --- a/include/linux/sunrpc/svc.h +++ b/include/linux/sunrpc/svc.h @@ -171,7 +171,8 @@ xdr_argsize_check(struct svc_rqst *rqstp, u32 *p) { char *cp = (char *)p; struct kvec *vec = &rqstp->rq_arg.head[0]; - return cp - (char*)vec->iov_base <= vec->iov_len; + return cp >= (char*)vec->iov_base + && cp <= (char*)vec->iov_base + vec->iov_len; } static inline int diff --git a/include/linux/sunrpc/xdr.h b/include/linux/sunrpc/xdr.h index 23448d0fb5bc..5da968729cf8 100644 --- a/include/linux/sunrpc/xdr.h +++ b/include/linux/sunrpc/xdr.h @@ -161,14 +161,10 @@ typedef struct { typedef size_t (*skb_read_actor_t)(skb_reader_t *desc, void *to, size_t len); +extern int csum_partial_copy_to_xdr(struct xdr_buf *, struct sk_buff *); extern ssize_t xdr_partial_copy_from_skb(struct xdr_buf *, unsigned int, skb_reader_t *, skb_read_actor_t); -struct socket; -struct sockaddr; -extern int xdr_sendpages(struct socket *, struct sockaddr *, int, - struct xdr_buf *, unsigned int, int); - extern int xdr_encode_word(struct xdr_buf *, int, u32); extern int xdr_decode_word(struct xdr_buf *, int, u32 *); diff --git a/include/linux/sunrpc/xprt.h b/include/linux/sunrpc/xprt.h index e618c1649814..3b8b6e823c70 100644 --- a/include/linux/sunrpc/xprt.h +++ b/include/linux/sunrpc/xprt.h @@ -1,5 +1,5 @@ /* - * linux/include/linux/sunrpc/clnt_xprt.h + * linux/include/linux/sunrpc/xprt.h * * Declarations for the RPC transport interface. * @@ -15,20 +15,6 @@ #include <linux/sunrpc/sched.h> #include <linux/sunrpc/xdr.h> -/* - * The transport code maintains an estimate on the maximum number of out- - * standing RPC requests, using a smoothed version of the congestion - * avoidance implemented in 44BSD. This is basically the Van Jacobson - * congestion algorithm: If a retransmit occurs, the congestion window is - * halved; otherwise, it is incremented by 1/cwnd when - * - * - a reply is received and - * - a full number of requests are outstanding and - * - the congestion window hasn't been updated recently. - * - * Upper procedures may check whether a request would block waiting for - * a free RPC slot by using the RPC_CONGESTED() macro. - */ extern unsigned int xprt_udp_slot_table_entries; extern unsigned int xprt_tcp_slot_table_entries; @@ -36,34 +22,23 @@ extern unsigned int xprt_tcp_slot_table_entries; #define RPC_DEF_SLOT_TABLE (16U) #define RPC_MAX_SLOT_TABLE (128U) -#define RPC_CWNDSHIFT (8U) -#define RPC_CWNDSCALE (1U << RPC_CWNDSHIFT) -#define RPC_INITCWND RPC_CWNDSCALE -#define RPC_MAXCWND(xprt) ((xprt)->max_reqs << RPC_CWNDSHIFT) -#define RPCXPRT_CONGESTED(xprt) ((xprt)->cong >= (xprt)->cwnd) - -/* Default timeout values */ -#define RPC_MAX_UDP_TIMEOUT (60*HZ) -#define RPC_MAX_TCP_TIMEOUT (600*HZ) - /* - * Wait duration for an RPC TCP connection to be established. Solaris - * NFS over TCP uses 60 seconds, for example, which is in line with how - * long a server takes to reboot. + * RPC call and reply header size as number of 32bit words (verifier + * size computed separately) */ -#define RPC_CONNECT_TIMEOUT (60*HZ) +#define RPC_CALLHDRSIZE 6 +#define RPC_REPHDRSIZE 4 /* - * Delay an arbitrary number of seconds before attempting to reconnect - * after an error. + * Parameters for choosing a free port */ -#define RPC_REESTABLISH_TIMEOUT (15*HZ) +extern unsigned int xprt_min_resvport; +extern unsigned int xprt_max_resvport; -/* RPC call and reply header size as number of 32bit words (verifier - * size computed separately) - */ -#define RPC_CALLHDRSIZE 6 -#define RPC_REPHDRSIZE 4 +#define RPC_MIN_RESVPORT (1U) +#define RPC_MAX_RESVPORT (65535U) +#define RPC_DEF_MIN_RESVPORT (650U) +#define RPC_DEF_MAX_RESVPORT (1023U) /* * This describes a timeout strategy @@ -76,6 +51,9 @@ struct rpc_timeout { unsigned char to_exponential; }; +struct rpc_task; +struct rpc_xprt; + /* * This describes a complete RPC request */ @@ -95,7 +73,10 @@ struct rpc_rqst { int rq_cong; /* has incremented xprt->cong */ int rq_received; /* receive completed */ u32 rq_seqno; /* gss seq no. used on req. */ - + int rq_enc_pages_num; + struct page **rq_enc_pages; /* scratch pages for use by + gss privacy code */ + void (*rq_release_snd_buf)(struct rpc_rqst *); /* release rq_enc_pages */ struct list_head rq_list; struct xdr_buf rq_private_buf; /* The receive buffer @@ -121,12 +102,21 @@ struct rpc_rqst { #define rq_svec rq_snd_buf.head #define rq_slen rq_snd_buf.len -#define XPRT_LAST_FRAG (1 << 0) -#define XPRT_COPY_RECM (1 << 1) -#define XPRT_COPY_XID (1 << 2) -#define XPRT_COPY_DATA (1 << 3) +struct rpc_xprt_ops { + void (*set_buffer_size)(struct rpc_xprt *xprt, size_t sndsize, size_t rcvsize); + int (*reserve_xprt)(struct rpc_task *task); + void (*release_xprt)(struct rpc_xprt *xprt, struct rpc_task *task); + void (*connect)(struct rpc_task *task); + int (*send_request)(struct rpc_task *task); + void (*set_retrans_timeout)(struct rpc_task *task); + void (*timer)(struct rpc_task *task); + void (*release_request)(struct rpc_task *task); + void (*close)(struct rpc_xprt *xprt); + void (*destroy)(struct rpc_xprt *xprt); +}; struct rpc_xprt { + struct rpc_xprt_ops * ops; /* transport methods */ struct socket * sock; /* BSD socket layer */ struct sock * inet; /* INET layer */ @@ -137,11 +127,13 @@ struct rpc_xprt { unsigned long cong; /* current congestion */ unsigned long cwnd; /* congestion window */ - unsigned int rcvsize, /* socket receive buffer size */ - sndsize; /* socket send buffer size */ + size_t rcvsize, /* transport rcv buffer size */ + sndsize; /* transport send buffer size */ size_t max_payload; /* largest RPC payload size, in bytes */ + unsigned int tsh_size; /* size of transport specific + header */ struct rpc_wait_queue sending; /* requests waiting to send */ struct rpc_wait_queue resend; /* requests waiting to resend */ @@ -150,11 +142,9 @@ struct rpc_xprt { struct list_head free; /* free slots */ struct rpc_rqst * slot; /* slot table storage */ unsigned int max_reqs; /* total slots */ - unsigned long sockstate; /* Socket state */ + unsigned long state; /* transport state */ unsigned char shutdown : 1, /* being shut down */ - nocong : 1, /* no congestion control */ - resvport : 1, /* use a reserved port */ - stream : 1; /* TCP */ + resvport : 1; /* use a reserved port */ /* * XID @@ -171,22 +161,27 @@ struct rpc_xprt { unsigned long tcp_copied, /* copied to request */ tcp_flags; /* - * Connection of sockets + * Connection of transports */ - struct work_struct sock_connect; + unsigned long connect_timeout, + bind_timeout, + reestablish_timeout; + struct work_struct connect_worker; unsigned short port; + /* - * Disconnection of idle sockets + * Disconnection of idle transports */ struct work_struct task_cleanup; struct timer_list timer; - unsigned long last_used; + unsigned long last_used, + idle_timeout; /* * Send stuff */ - spinlock_t sock_lock; /* lock socket info */ - spinlock_t xprt_lock; /* lock xprt info */ + spinlock_t transport_lock; /* lock transport info */ + spinlock_t reserve_lock; /* lock slot table */ struct rpc_task * snd_task; /* Task blocked in send */ struct list_head recv; @@ -195,37 +190,111 @@ struct rpc_xprt { void (*old_data_ready)(struct sock *, int); void (*old_state_change)(struct sock *); void (*old_write_space)(struct sock *); - - wait_queue_head_t cong_wait; }; +#define XPRT_LAST_FRAG (1 << 0) +#define XPRT_COPY_RECM (1 << 1) +#define XPRT_COPY_XID (1 << 2) +#define XPRT_COPY_DATA (1 << 3) + #ifdef __KERNEL__ -struct rpc_xprt * xprt_create_proto(int proto, struct sockaddr_in *addr, - struct rpc_timeout *toparms); -int xprt_destroy(struct rpc_xprt *); -void xprt_set_timeout(struct rpc_timeout *, unsigned int, - unsigned long); +/* + * Transport operations used by ULPs + */ +struct rpc_xprt * xprt_create_proto(int proto, struct sockaddr_in *addr, struct rpc_timeout *to); +void xprt_set_timeout(struct rpc_timeout *to, unsigned int retr, unsigned long incr); -void xprt_reserve(struct rpc_task *); -int xprt_prepare_transmit(struct rpc_task *); -void xprt_transmit(struct rpc_task *); -void xprt_receive(struct rpc_task *); +/* + * Generic internal transport functions + */ +void xprt_connect(struct rpc_task *task); +void xprt_reserve(struct rpc_task *task); +int xprt_reserve_xprt(struct rpc_task *task); +int xprt_reserve_xprt_cong(struct rpc_task *task); +int xprt_prepare_transmit(struct rpc_task *task); +void xprt_transmit(struct rpc_task *task); +void xprt_abort_transmit(struct rpc_task *task); int xprt_adjust_timeout(struct rpc_rqst *req); -void xprt_release(struct rpc_task *); -void xprt_connect(struct rpc_task *); -void xprt_sock_setbufsize(struct rpc_xprt *); - -#define XPRT_LOCKED 0 -#define XPRT_CONNECT 1 -#define XPRT_CONNECTING 2 - -#define xprt_connected(xp) (test_bit(XPRT_CONNECT, &(xp)->sockstate)) -#define xprt_set_connected(xp) (set_bit(XPRT_CONNECT, &(xp)->sockstate)) -#define xprt_test_and_set_connected(xp) (test_and_set_bit(XPRT_CONNECT, &(xp)->sockstate)) -#define xprt_test_and_clear_connected(xp) \ - (test_and_clear_bit(XPRT_CONNECT, &(xp)->sockstate)) -#define xprt_clear_connected(xp) (clear_bit(XPRT_CONNECT, &(xp)->sockstate)) +void xprt_release_xprt(struct rpc_xprt *xprt, struct rpc_task *task); +void xprt_release_xprt_cong(struct rpc_xprt *xprt, struct rpc_task *task); +void xprt_release(struct rpc_task *task); +int xprt_destroy(struct rpc_xprt *xprt); + +static inline u32 *xprt_skip_transport_header(struct rpc_xprt *xprt, u32 *p) +{ + return p + xprt->tsh_size; +} + +/* + * Transport switch helper functions + */ +void xprt_set_retrans_timeout_def(struct rpc_task *task); +void xprt_set_retrans_timeout_rtt(struct rpc_task *task); +void xprt_wake_pending_tasks(struct rpc_xprt *xprt, int status); +void xprt_wait_for_buffer_space(struct rpc_task *task); +void xprt_write_space(struct rpc_xprt *xprt); +void xprt_update_rtt(struct rpc_task *task); +void xprt_adjust_cwnd(struct rpc_task *task, int result); +struct rpc_rqst * xprt_lookup_rqst(struct rpc_xprt *xprt, u32 xid); +void xprt_complete_rqst(struct rpc_task *task, int copied); +void xprt_release_rqst_cong(struct rpc_task *task); +void xprt_disconnect(struct rpc_xprt *xprt); + +/* + * Socket transport setup operations + */ +int xs_setup_udp(struct rpc_xprt *xprt, struct rpc_timeout *to); +int xs_setup_tcp(struct rpc_xprt *xprt, struct rpc_timeout *to); + +/* + * Reserved bit positions in xprt->state + */ +#define XPRT_LOCKED (0) +#define XPRT_CONNECTED (1) +#define XPRT_CONNECTING (2) + +static inline void xprt_set_connected(struct rpc_xprt *xprt) +{ + set_bit(XPRT_CONNECTED, &xprt->state); +} + +static inline void xprt_clear_connected(struct rpc_xprt *xprt) +{ + clear_bit(XPRT_CONNECTED, &xprt->state); +} + +static inline int xprt_connected(struct rpc_xprt *xprt) +{ + return test_bit(XPRT_CONNECTED, &xprt->state); +} + +static inline int xprt_test_and_set_connected(struct rpc_xprt *xprt) +{ + return test_and_set_bit(XPRT_CONNECTED, &xprt->state); +} + +static inline int xprt_test_and_clear_connected(struct rpc_xprt *xprt) +{ + return test_and_clear_bit(XPRT_CONNECTED, &xprt->state); +} + +static inline void xprt_clear_connecting(struct rpc_xprt *xprt) +{ + smp_mb__before_clear_bit(); + clear_bit(XPRT_CONNECTING, &xprt->state); + smp_mb__after_clear_bit(); +} + +static inline int xprt_connecting(struct rpc_xprt *xprt) +{ + return test_bit(XPRT_CONNECTING, &xprt->state); +} + +static inline int xprt_test_and_set_connecting(struct rpc_xprt *xprt) +{ + return test_and_set_bit(XPRT_CONNECTING, &xprt->state); +} #endif /* __KERNEL__*/ diff --git a/include/linux/superhyway.h b/include/linux/superhyway.h index c906c5a0aaef..17ea468fa362 100644 --- a/include/linux/superhyway.h +++ b/include/linux/superhyway.h @@ -19,7 +19,7 @@ */ #define SUPERHYWAY_DEVICE_ID_SH5_DMAC 0x0183 -struct vcr_info { +struct superhyway_vcr_info { u8 perr_flags; /* P-port Error flags */ u8 merr_flags; /* Module Error flags */ u16 mod_vers; /* Module Version */ @@ -28,6 +28,17 @@ struct vcr_info { u8 top_mb; /* Top Memory block */ }; +struct superhyway_ops { + int (*read_vcr)(unsigned long base, struct superhyway_vcr_info *vcr); + int (*write_vcr)(unsigned long base, struct superhyway_vcr_info vcr); +}; + +struct superhyway_bus { + struct superhyway_ops *ops; +}; + +extern struct superhyway_bus superhyway_channels[]; + struct superhyway_device_id { unsigned int id; unsigned long driver_data; @@ -55,9 +66,11 @@ struct superhyway_device { struct superhyway_device_id id; struct superhyway_driver *drv; + struct superhyway_bus *bus; - struct resource resource; - struct vcr_info vcr; + int num_resources; + struct resource *resource; + struct superhyway_vcr_info vcr; }; #define to_superhyway_device(d) container_of((d), struct superhyway_device, dev) @@ -65,12 +78,27 @@ struct superhyway_device { #define superhyway_get_drvdata(d) dev_get_drvdata(&(d)->dev) #define superhyway_set_drvdata(d,p) dev_set_drvdata(&(d)->dev, (p)) -extern int superhyway_scan_bus(void); +static inline int +superhyway_read_vcr(struct superhyway_device *dev, unsigned long base, + struct superhyway_vcr_info *vcr) +{ + return dev->bus->ops->read_vcr(base, vcr); +} + +static inline int +superhyway_write_vcr(struct superhyway_device *dev, unsigned long base, + struct superhyway_vcr_info vcr) +{ + return dev->bus->ops->write_vcr(base, vcr); +} + +extern int superhyway_scan_bus(struct superhyway_bus *); /* drivers/sh/superhyway/superhyway.c */ int superhyway_register_driver(struct superhyway_driver *); void superhyway_unregister_driver(struct superhyway_driver *); -int superhyway_add_device(unsigned int, unsigned long, unsigned long long); +int superhyway_add_device(unsigned long base, struct superhyway_device *, struct superhyway_bus *); +int superhyway_add_devices(struct superhyway_bus *bus, struct superhyway_device **devices, int nr_devices); /* drivers/sh/superhyway/superhyway-sysfs.c */ extern struct device_attribute superhyway_dev_attrs[]; diff --git a/include/linux/suspend.h b/include/linux/suspend.h index f2e96fdfaae0..a61c04f804b2 100644 --- a/include/linux/suspend.h +++ b/include/linux/suspend.h @@ -71,5 +71,12 @@ void restore_processor_state(void); struct saved_context; void __save_processor_state(struct saved_context *ctxt); void __restore_processor_state(struct saved_context *ctxt); +unsigned long get_safe_page(gfp_t gfp_mask); + +/* + * XXX: We try to keep some more pages free so that I/O operations succeed + * without paging. Might this be more? + */ +#define PAGES_FOR_IO 512 #endif /* _LINUX_SWSUSP_H */ diff --git a/include/linux/swap.h b/include/linux/swap.h index 3c9ff0048153..508668f840b6 100644 --- a/include/linux/swap.h +++ b/include/linux/swap.h @@ -147,7 +147,7 @@ struct swap_list_t { #define vm_swap_full() (nr_swap_pages*2 < total_swap_pages) /* linux/mm/oom_kill.c */ -extern void out_of_memory(unsigned int __nocast gfp_mask, int order); +extern void out_of_memory(gfp_t gfp_mask, int order); /* linux/mm/memory.c */ extern void swapin_readahead(swp_entry_t, unsigned long, struct vm_area_struct *); @@ -171,8 +171,8 @@ extern int rotate_reclaimable_page(struct page *page); extern void swap_setup(void); /* linux/mm/vmscan.c */ -extern int try_to_free_pages(struct zone **, unsigned int); -extern int zone_reclaim(struct zone *, unsigned int, unsigned int); +extern int try_to_free_pages(struct zone **, gfp_t); +extern int zone_reclaim(struct zone *, gfp_t, unsigned int); extern int shrink_all_memory(int); extern int vm_swappiness; @@ -239,6 +239,11 @@ static inline void put_swap_token(struct mm_struct *mm) __put_swap_token(mm); } +static inline void disable_swap_token(void) +{ + put_swap_token(swap_token_mm); +} + #else /* CONFIG_SWAP */ #define total_swap_pages 0 @@ -283,6 +288,7 @@ static inline swp_entry_t get_swap_page(void) #define put_swap_token(x) do { } while(0) #define grab_swap_token() do { } while(0) #define has_swap_token(x) 0 +#define disable_swap_token() do { } while(0) #endif /* CONFIG_SWAP */ #endif /* __KERNEL__*/ diff --git a/include/linux/syscalls.h b/include/linux/syscalls.h index a6f03e473737..c7007b1db91d 100644 --- a/include/linux/syscalls.h +++ b/include/linux/syscalls.h @@ -491,6 +491,7 @@ asmlinkage long sys_nfsservctl(int cmd, asmlinkage long sys_syslog(int type, char __user *buf, int len); asmlinkage long sys_uselib(const char __user *library); asmlinkage long sys_ni_syscall(void); +asmlinkage long sys_ptrace(long request, long pid, long addr, long data); asmlinkage long sys_add_key(const char __user *_type, const char __user *_description, diff --git a/include/linux/sysctl.h b/include/linux/sysctl.h index 3a29a9f9b451..6bc03c911a83 100644 --- a/include/linux/sysctl.h +++ b/include/linux/sysctl.h @@ -20,10 +20,10 @@ #include <linux/kernel.h> #include <linux/types.h> -#include <linux/list.h> #include <linux/compiler.h> struct file; +struct completion; #define CTL_MAXNAME 10 /* how many path components do we allow in a call to sysctl? In other words, what is @@ -202,7 +202,9 @@ enum NET_TR=14, NET_DECNET=15, NET_ECONET=16, - NET_SCTP=17, + NET_SCTP=17, + NET_LLC=18, + NET_NETFILTER=19, }; /* /proc/sys/kernel/random */ @@ -268,6 +270,42 @@ enum NET_UNIX_MAX_DGRAM_QLEN=3, }; +/* /proc/sys/net/netfilter */ +enum +{ + NET_NF_CONNTRACK_MAX=1, + NET_NF_CONNTRACK_TCP_TIMEOUT_SYN_SENT=2, + NET_NF_CONNTRACK_TCP_TIMEOUT_SYN_RECV=3, + NET_NF_CONNTRACK_TCP_TIMEOUT_ESTABLISHED=4, + NET_NF_CONNTRACK_TCP_TIMEOUT_FIN_WAIT=5, + NET_NF_CONNTRACK_TCP_TIMEOUT_CLOSE_WAIT=6, + NET_NF_CONNTRACK_TCP_TIMEOUT_LAST_ACK=7, + NET_NF_CONNTRACK_TCP_TIMEOUT_TIME_WAIT=8, + NET_NF_CONNTRACK_TCP_TIMEOUT_CLOSE=9, + NET_NF_CONNTRACK_UDP_TIMEOUT=10, + NET_NF_CONNTRACK_UDP_TIMEOUT_STREAM=11, + NET_NF_CONNTRACK_ICMP_TIMEOUT=12, + NET_NF_CONNTRACK_GENERIC_TIMEOUT=13, + NET_NF_CONNTRACK_BUCKETS=14, + NET_NF_CONNTRACK_LOG_INVALID=15, + NET_NF_CONNTRACK_TCP_TIMEOUT_MAX_RETRANS=16, + NET_NF_CONNTRACK_TCP_LOOSE=17, + NET_NF_CONNTRACK_TCP_BE_LIBERAL=18, + NET_NF_CONNTRACK_TCP_MAX_RETRANS=19, + NET_NF_CONNTRACK_SCTP_TIMEOUT_CLOSED=20, + NET_NF_CONNTRACK_SCTP_TIMEOUT_COOKIE_WAIT=21, + NET_NF_CONNTRACK_SCTP_TIMEOUT_COOKIE_ECHOED=22, + NET_NF_CONNTRACK_SCTP_TIMEOUT_ESTABLISHED=23, + NET_NF_CONNTRACK_SCTP_TIMEOUT_SHUTDOWN_SENT=24, + NET_NF_CONNTRACK_SCTP_TIMEOUT_SHUTDOWN_RECD=25, + NET_NF_CONNTRACK_SCTP_TIMEOUT_SHUTDOWN_ACK_SENT=26, + NET_NF_CONNTRACK_COUNT=27, + NET_NF_CONNTRACK_ICMPV6_TIMEOUT=28, + NET_NF_CONNTRACK_FRAG6_TIMEOUT=29, + NET_NF_CONNTRACK_FRAG6_LOW_THRESH=30, + NET_NF_CONNTRACK_FRAG6_HIGH_THRESH=31, +}; + /* /proc/sys/net/ipv4 */ enum { @@ -351,6 +389,7 @@ enum NET_TCP_BIC_BETA=108, NET_IPV4_ICMP_ERRORS_USE_INBOUND_IFADDR=109, NET_TCP_CONG_CONTROL=110, + NET_TCP_ABC=111, }; enum { @@ -522,6 +561,29 @@ enum { NET_IPX_FORWARDING=2 }; +/* /proc/sys/net/llc */ +enum { + NET_LLC2=1, + NET_LLC_STATION=2, +}; + +/* /proc/sys/net/llc/llc2 */ +enum { + NET_LLC2_TIMEOUT=1, +}; + +/* /proc/sys/net/llc/station */ +enum { + NET_LLC_STATION_ACK_TIMEOUT=1, +}; + +/* /proc/sys/net/llc/llc2/timeout */ +enum { + NET_LLC2_ACK_TIMEOUT=1, + NET_LLC2_P_TIMEOUT=2, + NET_LLC2_REJ_TIMEOUT=3, + NET_LLC2_BUSY_TIMEOUT=4, +}; /* /proc/sys/net/appletalk */ enum { @@ -652,6 +714,7 @@ enum { NET_SCTP_PRSCTP_ENABLE = 14, NET_SCTP_SNDBUF_POLICY = 15, NET_SCTP_SACK_TIMEOUT = 16, + NET_SCTP_RCVBUF_POLICY = 17, }; /* /proc/sys/net/bridge */ @@ -795,6 +858,7 @@ enum }; #ifdef __KERNEL__ +#include <linux/list.h> extern void sysctl_init(void); @@ -901,6 +965,8 @@ struct ctl_table_header { ctl_table *ctl_table; struct list_head ctl_entry; + int used; + struct completion *unregistering; }; struct ctl_table_header * register_sysctl_table(ctl_table * table, diff --git a/include/linux/tc_ematch/tc_em_meta.h b/include/linux/tc_ematch/tc_em_meta.h index 081b1ee8516e..e21937cf91d0 100644 --- a/include/linux/tc_ematch/tc_em_meta.h +++ b/include/linux/tc_ematch/tc_em_meta.h @@ -71,7 +71,7 @@ enum TCF_META_ID_SK_SNDBUF, TCF_META_ID_SK_ALLOCS, TCF_META_ID_SK_ROUTE_CAPS, - TCF_META_ID_SK_HASHENT, + TCF_META_ID_SK_HASH, TCF_META_ID_SK_LINGERTIME, TCF_META_ID_SK_ACK_BACKLOG, TCF_META_ID_SK_MAX_ACK_BACKLOG, diff --git a/include/linux/tcp.h b/include/linux/tcp.h index ac4ca44c75ca..0e1da6602e05 100644 --- a/include/linux/tcp.h +++ b/include/linux/tcp.h @@ -307,6 +307,21 @@ struct tcp_sock { struct tcp_sack_block duplicate_sack[1]; /* D-SACK block */ struct tcp_sack_block selective_acks[4]; /* The SACKS themselves*/ + struct tcp_sack_block recv_sack_cache[4]; + + /* from STCP, retrans queue hinting */ + struct sk_buff* lost_skb_hint; + + struct sk_buff *scoreboard_skb_hint; + struct sk_buff *retransmit_skb_hint; + struct sk_buff *forward_skb_hint; + struct sk_buff *fastpath_skb_hint; + + int fastpath_cnt_hint; + int lost_cnt_hint; + int retransmit_cnt_hint; + int forward_cnt_hint; + __u16 advmss; /* Advertised MSS */ __u16 prior_ssthresh; /* ssthresh saved at recovery start */ __u32 lost_out; /* Lost packets */ @@ -326,6 +341,7 @@ struct tcp_sock { __u32 snd_up; /* Urgent pointer */ __u32 total_retrans; /* Total retransmits for entire connection */ + __u32 bytes_acked; /* Appropriate Byte Counting - RFC3465 */ unsigned int keepalive_time; /* time before keep alive takes place */ unsigned int keepalive_intvl; /* time interval between keep alive probes */ diff --git a/include/linux/textsearch.h b/include/linux/textsearch.h index 941f45ac117a..7dac8f04d28e 100644 --- a/include/linux/textsearch.h +++ b/include/linux/textsearch.h @@ -8,6 +8,7 @@ #include <linux/kernel.h> #include <linux/module.h> #include <linux/err.h> +#include <linux/slab.h> struct ts_config; @@ -40,7 +41,7 @@ struct ts_state struct ts_ops { const char *name; - struct ts_config * (*init)(const void *, unsigned int, int); + struct ts_config * (*init)(const void *, unsigned int, gfp_t); unsigned int (*find)(struct ts_config *, struct ts_state *); void (*destroy)(struct ts_config *); @@ -148,7 +149,7 @@ static inline unsigned int textsearch_get_pattern_len(struct ts_config *conf) extern int textsearch_register(struct ts_ops *); extern int textsearch_unregister(struct ts_ops *); extern struct ts_config *textsearch_prepare(const char *, const void *, - unsigned int, int, int); + unsigned int, gfp_t, int); extern void textsearch_destroy(struct ts_config *conf); extern unsigned int textsearch_find_continuous(struct ts_config *, struct ts_state *, @@ -158,7 +159,8 @@ extern unsigned int textsearch_find_continuous(struct ts_config *, #define TS_PRIV_ALIGNTO 8 #define TS_PRIV_ALIGN(len) (((len) + TS_PRIV_ALIGNTO-1) & ~(TS_PRIV_ALIGNTO-1)) -static inline struct ts_config *alloc_ts_config(size_t payload, int gfp_mask) +static inline struct ts_config *alloc_ts_config(size_t payload, + gfp_t gfp_mask) { struct ts_config *conf; diff --git a/include/linux/thread_info.h b/include/linux/thread_info.h index d252f45a0f9b..1c4eb41dbd89 100644 --- a/include/linux/thread_info.h +++ b/include/linux/thread_info.h @@ -27,31 +27,6 @@ extern long do_no_restart_syscall(struct restart_block *parm); * - pass TIF_xxxx constants to these functions */ -static inline void set_thread_flag(int flag) -{ - set_bit(flag,¤t_thread_info()->flags); -} - -static inline void clear_thread_flag(int flag) -{ - clear_bit(flag,¤t_thread_info()->flags); -} - -static inline int test_and_set_thread_flag(int flag) -{ - return test_and_set_bit(flag,¤t_thread_info()->flags); -} - -static inline int test_and_clear_thread_flag(int flag) -{ - return test_and_clear_bit(flag,¤t_thread_info()->flags); -} - -static inline int test_thread_flag(int flag) -{ - return test_bit(flag,¤t_thread_info()->flags); -} - static inline void set_ti_thread_flag(struct thread_info *ti, int flag) { set_bit(flag,&ti->flags); @@ -77,15 +52,19 @@ static inline int test_ti_thread_flag(struct thread_info *ti, int flag) return test_bit(flag,&ti->flags); } -static inline void set_need_resched(void) -{ - set_thread_flag(TIF_NEED_RESCHED); -} - -static inline void clear_need_resched(void) -{ - clear_thread_flag(TIF_NEED_RESCHED); -} +#define set_thread_flag(flag) \ + set_ti_thread_flag(current_thread_info(), flag) +#define clear_thread_flag(flag) \ + clear_ti_thread_flag(current_thread_info(), flag) +#define test_and_set_thread_flag(flag) \ + test_and_set_ti_thread_flag(current_thread_info(), flag) +#define test_and_clear_thread_flag(flag) \ + test_and_clear_ti_thread_flag(current_thread_info(), flag) +#define test_thread_flag(flag) \ + test_ti_thread_flag(current_thread_info(), flag) + +#define set_need_resched() set_thread_flag(TIF_NEED_RESCHED) +#define clear_need_resched() clear_thread_flag(TIF_NEED_RESCHED) #endif diff --git a/include/linux/time.h b/include/linux/time.h index 8e83f4e778bb..bfbe92d0767c 100644 --- a/include/linux/time.h +++ b/include/linux/time.h @@ -101,7 +101,7 @@ extern struct timespec timespec_trunc(struct timespec t, unsigned gran); static inline void set_normalized_timespec (struct timespec *ts, time_t sec, long nsec) { - while (nsec > NSEC_PER_SEC) { + while (nsec >= NSEC_PER_SEC) { nsec -= NSEC_PER_SEC; ++sec; } diff --git a/include/linux/timer.h b/include/linux/timer.h index 3340f3bd135d..72f3a7781106 100644 --- a/include/linux/timer.h +++ b/include/linux/timer.h @@ -12,16 +12,12 @@ struct timer_list { struct list_head entry; unsigned long expires; - unsigned long magic; - void (*function)(unsigned long); unsigned long data; struct timer_base_s *base; }; -#define TIMER_MAGIC 0x4b87ad6e - extern struct timer_base_s __init_timer_base; #define TIMER_INITIALIZER(_function, _expires, _data) { \ @@ -29,7 +25,6 @@ extern struct timer_base_s __init_timer_base; .expires = (_expires), \ .data = (_data), \ .base = &__init_timer_base, \ - .magic = TIMER_MAGIC, \ } #define DEFINE_TIMER(_name, _function, _expires, _data) \ @@ -38,6 +33,15 @@ extern struct timer_base_s __init_timer_base; void fastcall init_timer(struct timer_list * timer); +static inline void setup_timer(struct timer_list * timer, + void (*function)(unsigned long), + unsigned long data) +{ + timer->function = function; + timer->data = data; + init_timer(timer); +} + /*** * timer_pending - is a timer pending? * @timer: the timer in question @@ -74,8 +78,9 @@ extern unsigned long next_timer_interrupt(void); * Timers with an ->expired field in the past will be executed in the next * timer tick. */ -static inline void add_timer(struct timer_list * timer) +static inline void add_timer(struct timer_list *timer) { + BUG_ON(timer_pending(timer)); __mod_timer(timer, timer->expires); } diff --git a/include/linux/timex.h b/include/linux/timex.h index 7e050a2cc35b..04a4a8cb4ed3 100644 --- a/include/linux/timex.h +++ b/include/linux/timex.h @@ -282,6 +282,13 @@ static inline int ntp_synced(void) return !(time_status & STA_UNSYNC); } +/* Required to safely shift negative values */ +#define shift_right(x, s) ({ \ + __typeof__(x) __x = (x); \ + __typeof__(s) __s = (s); \ + __x < 0 ? -(-__x >> __s) : __x >> __s; \ +}) + #ifdef CONFIG_TIME_INTERPOLATION diff --git a/include/linux/types.h b/include/linux/types.h index 2b678c22ca4a..21b9ce803644 100644 --- a/include/linux/types.h +++ b/include/linux/types.h @@ -151,7 +151,12 @@ typedef unsigned long sector_t; */ #ifdef __CHECKER__ -#define __bitwise __attribute__((bitwise)) +#define __bitwise__ __attribute__((bitwise)) +#else +#define __bitwise__ +#endif +#ifdef __CHECK_ENDIAN__ +#define __bitwise __bitwise__ #else #define __bitwise #endif @@ -165,6 +170,10 @@ typedef __u64 __bitwise __le64; typedef __u64 __bitwise __be64; #endif +#ifdef __KERNEL__ +typedef unsigned __bitwise__ gfp_t; +#endif + struct ustat { __kernel_daddr_t f_tfree; __kernel_ino_t f_tinode; diff --git a/include/linux/uinput.h b/include/linux/uinput.h index 84876077027f..0ff7ca68e5c5 100644 --- a/include/linux/uinput.h +++ b/include/linux/uinput.h @@ -34,8 +34,7 @@ #define UINPUT_BUFFER_SIZE 16 #define UINPUT_NUM_REQUESTS 16 -/* state flags => bit index for {set|clear|test}_bit ops */ -#define UIST_CREATED 0 +enum uinput_state { UIST_NEW_DEVICE, UIST_SETUP_COMPLETE, UIST_CREATED }; struct uinput_request { int id; @@ -52,11 +51,12 @@ struct uinput_request { struct uinput_device { struct input_dev *dev; - unsigned long state; + struct semaphore sem; + enum uinput_state state; wait_queue_head_t waitq; - unsigned char ready, - head, - tail; + unsigned char ready; + unsigned char head; + unsigned char tail; struct input_event buff[UINPUT_BUFFER_SIZE]; struct uinput_request *requests[UINPUT_NUM_REQUESTS]; @@ -91,6 +91,7 @@ struct uinput_ff_erase { #define UI_SET_SNDBIT _IOW(UINPUT_IOCTL_BASE, 106, int) #define UI_SET_FFBIT _IOW(UINPUT_IOCTL_BASE, 107, int) #define UI_SET_PHYS _IOW(UINPUT_IOCTL_BASE, 108, char*) +#define UI_SET_SWBIT _IOW(UINPUT_IOCTL_BASE, 109, int) #define UI_BEGIN_FF_UPLOAD _IOWR(UINPUT_IOCTL_BASE, 200, struct uinput_ff_upload) #define UI_END_FF_UPLOAD _IOW(UINPUT_IOCTL_BASE, 201, struct uinput_ff_upload) diff --git a/include/linux/usb.h b/include/linux/usb.h index 4dbe580f9335..d81b050e5955 100644 --- a/include/linux/usb.h +++ b/include/linux/usb.h @@ -47,6 +47,7 @@ struct usb_driver; * @urb_list: urbs queued to this endpoint; maintained by usbcore * @hcpriv: for use by HCD; typically holds hardware dma queue head (QH) * with one or more transfer descriptors (TDs) per urb + * @kobj: kobject for sysfs info * @extra: descriptors following this endpoint in the configuration * @extralen: how many bytes of "extra" are valid * @@ -57,6 +58,7 @@ struct usb_host_endpoint { struct usb_endpoint_descriptor desc; struct list_head urb_list; void *hcpriv; + struct kobject *kobj; /* For sysfs info */ unsigned char *extra; /* Extra descriptors */ int extralen; @@ -136,7 +138,8 @@ struct usb_interface { * active alternate setting */ unsigned num_altsetting; /* number of alternate settings */ - int minor; /* minor number this interface is bound to */ + int minor; /* minor number this interface is + * bound to */ enum usb_interface_condition condition; /* state of binding */ struct device dev; /* interface specific device info */ struct class_device *class_dev; @@ -229,7 +232,7 @@ struct usb_interface_cache { struct usb_host_config { struct usb_config_descriptor desc; - char *string; + char *string; /* iConfiguration string, if present */ /* the interfaces associated with this configuration, * stored in no particular order */ struct usb_interface *interface[USB_MAXINTERFACES]; @@ -248,7 +251,7 @@ int __usb_get_extra_descriptor(char *buffer, unsigned size, __usb_get_extra_descriptor((ifpoint)->extra,(ifpoint)->extralen,\ type,(void**)ptr) -/* -------------------------------------------------------------------------- */ +/* ----------------------------------------------------------------------- */ struct usb_operations; @@ -268,7 +271,8 @@ struct usb_bus { unsigned is_b_host:1; /* true during some HNP roleswitches */ unsigned b_hnp_enable:1; /* OTG: did A-Host enable HNP? */ - int devnum_next; /* Next open device number in round-robin allocation */ + int devnum_next; /* Next open device number in + * round-robin allocation */ struct usb_devmap devmap; /* device address allocation map */ struct usb_operations *op; /* Operations (specific to the HC) */ @@ -289,15 +293,16 @@ struct usb_bus { struct dentry *usbfs_dentry; /* usbfs dentry entry for the bus */ struct class_device *class_dev; /* class device for this bus */ - struct kref kref; /* handles reference counting this bus */ - void (*release)(struct usb_bus *bus); /* function to destroy this bus's memory */ + struct kref kref; /* reference counting for this bus */ + void (*release)(struct usb_bus *bus); + #if defined(CONFIG_USB_MON) struct mon_bus *mon_bus; /* non-null when associated */ int monitored; /* non-zero when monitored */ #endif }; -/* -------------------------------------------------------------------------- */ +/* ----------------------------------------------------------------------- */ /* This is arbitrary. * From USB 2.0 spec Table 11-13, offset 7, a hub can @@ -326,7 +331,8 @@ struct usb_device { struct semaphore serialize; - unsigned int toggle[2]; /* one bit for each endpoint ([0] = IN, [1] = OUT) */ + unsigned int toggle[2]; /* one bit for each endpoint + * ([0] = IN, [1] = OUT) */ struct usb_device *parent; /* our hub, unless we're the root */ struct usb_bus *bus; /* Bus we're part of */ @@ -343,12 +349,14 @@ struct usb_device { char **rawdescriptors; /* Raw descriptors for each config */ - int have_langid; /* whether string_langid is valid yet */ + int have_langid; /* whether string_langid is valid */ int string_langid; /* language ID for strings */ - char *product; - char *manufacturer; - char *serial; /* static strings from the device */ + /* static strings from the device */ + char *product; /* iProduct string, if present */ + char *manufacturer; /* iManufacturer string, if present */ + char *serial; /* iSerialNumber string, if present */ + struct list_head filelist; struct class_device *class_dev; struct dentry *usbfs_dentry; /* usbfs dentry entry for the device */ @@ -440,22 +448,31 @@ extern struct usb_host_interface *usb_altnum_to_altsetting( * USB 2.0 root hubs (EHCI host controllers) will get one path ID if they are * high speed, and a different one if they are full or low speed. */ -static inline int usb_make_path (struct usb_device *dev, char *buf, size_t size) +static inline int usb_make_path (struct usb_device *dev, char *buf, + size_t size) { int actual; - actual = snprintf (buf, size, "usb-%s-%s", dev->bus->bus_name, dev->devpath); + actual = snprintf (buf, size, "usb-%s-%s", dev->bus->bus_name, + dev->devpath); return (actual >= (int)size) ? -1 : actual; } /*-------------------------------------------------------------------------*/ -#define USB_DEVICE_ID_MATCH_DEVICE (USB_DEVICE_ID_MATCH_VENDOR | USB_DEVICE_ID_MATCH_PRODUCT) -#define USB_DEVICE_ID_MATCH_DEV_RANGE (USB_DEVICE_ID_MATCH_DEV_LO | USB_DEVICE_ID_MATCH_DEV_HI) -#define USB_DEVICE_ID_MATCH_DEVICE_AND_VERSION (USB_DEVICE_ID_MATCH_DEVICE | USB_DEVICE_ID_MATCH_DEV_RANGE) +#define USB_DEVICE_ID_MATCH_DEVICE \ + (USB_DEVICE_ID_MATCH_VENDOR | USB_DEVICE_ID_MATCH_PRODUCT) +#define USB_DEVICE_ID_MATCH_DEV_RANGE \ + (USB_DEVICE_ID_MATCH_DEV_LO | USB_DEVICE_ID_MATCH_DEV_HI) +#define USB_DEVICE_ID_MATCH_DEVICE_AND_VERSION \ + (USB_DEVICE_ID_MATCH_DEVICE | USB_DEVICE_ID_MATCH_DEV_RANGE) #define USB_DEVICE_ID_MATCH_DEV_INFO \ - (USB_DEVICE_ID_MATCH_DEV_CLASS | USB_DEVICE_ID_MATCH_DEV_SUBCLASS | USB_DEVICE_ID_MATCH_DEV_PROTOCOL) + (USB_DEVICE_ID_MATCH_DEV_CLASS | \ + USB_DEVICE_ID_MATCH_DEV_SUBCLASS | \ + USB_DEVICE_ID_MATCH_DEV_PROTOCOL) #define USB_DEVICE_ID_MATCH_INT_INFO \ - (USB_DEVICE_ID_MATCH_INT_CLASS | USB_DEVICE_ID_MATCH_INT_SUBCLASS | USB_DEVICE_ID_MATCH_INT_PROTOCOL) + (USB_DEVICE_ID_MATCH_INT_CLASS | \ + USB_DEVICE_ID_MATCH_INT_SUBCLASS | \ + USB_DEVICE_ID_MATCH_INT_PROTOCOL) /** * USB_DEVICE - macro used to describe a specific usb device @@ -466,9 +483,11 @@ static inline int usb_make_path (struct usb_device *dev, char *buf, size_t size) * specific device. */ #define USB_DEVICE(vend,prod) \ - .match_flags = USB_DEVICE_ID_MATCH_DEVICE, .idVendor = (vend), .idProduct = (prod) + .match_flags = USB_DEVICE_ID_MATCH_DEVICE, .idVendor = (vend), \ + .idProduct = (prod) /** - * USB_DEVICE_VER - macro used to describe a specific usb device with a version range + * USB_DEVICE_VER - macro used to describe a specific usb device with a + * version range * @vend: the 16 bit USB Vendor ID * @prod: the 16 bit USB Product ID * @lo: the bcdDevice_lo value @@ -478,7 +497,9 @@ static inline int usb_make_path (struct usb_device *dev, char *buf, size_t size) * specific device, with a version range. */ #define USB_DEVICE_VER(vend,prod,lo,hi) \ - .match_flags = USB_DEVICE_ID_MATCH_DEVICE_AND_VERSION, .idVendor = (vend), .idProduct = (prod), .bcdDevice_lo = (lo), .bcdDevice_hi = (hi) + .match_flags = USB_DEVICE_ID_MATCH_DEVICE_AND_VERSION, \ + .idVendor = (vend), .idProduct = (prod), \ + .bcdDevice_lo = (lo), .bcdDevice_hi = (hi) /** * USB_DEVICE_INFO - macro used to describe a class of usb devices @@ -490,7 +511,8 @@ static inline int usb_make_path (struct usb_device *dev, char *buf, size_t size) * specific class of devices. */ #define USB_DEVICE_INFO(cl,sc,pr) \ - .match_flags = USB_DEVICE_ID_MATCH_DEV_INFO, .bDeviceClass = (cl), .bDeviceSubClass = (sc), .bDeviceProtocol = (pr) + .match_flags = USB_DEVICE_ID_MATCH_DEV_INFO, .bDeviceClass = (cl), \ + .bDeviceSubClass = (sc), .bDeviceProtocol = (pr) /** * USB_INTERFACE_INFO - macro used to describe a class of usb interfaces @@ -502,9 +524,10 @@ static inline int usb_make_path (struct usb_device *dev, char *buf, size_t size) * specific class of interfaces. */ #define USB_INTERFACE_INFO(cl,sc,pr) \ - .match_flags = USB_DEVICE_ID_MATCH_INT_INFO, .bInterfaceClass = (cl), .bInterfaceSubClass = (sc), .bInterfaceProtocol = (pr) + .match_flags = USB_DEVICE_ID_MATCH_INT_INFO, .bInterfaceClass = (cl), \ + .bInterfaceSubClass = (sc), .bInterfaceProtocol = (pr) -/* -------------------------------------------------------------------------- */ +/* ----------------------------------------------------------------------- */ /** * struct usb_driver - identifies USB driver to usbcore @@ -557,7 +580,8 @@ struct usb_driver { void (*disconnect) (struct usb_interface *intf); - int (*ioctl) (struct usb_interface *intf, unsigned int code, void *buf); + int (*ioctl) (struct usb_interface *intf, unsigned int code, + void *buf); int (*suspend) (struct usb_interface *intf, pm_message_t message); int (*resume) (struct usb_interface *intf); @@ -572,10 +596,8 @@ extern struct bus_type usb_bus_type; /** * struct usb_class_driver - identifies a USB driver that wants to use the USB major number - * @name: devfs name for this driver. Will also be used by the driver - * class code to create a usb class device. + * @name: the usb class device name for this driver. Will show up in sysfs. * @fops: pointer to the struct file_operations of this driver. - * @mode: the mode for the devfs file to be created for this driver. * @minor_base: the start of the minor range for this driver. * * This structure is used for the usb_register_dev() and @@ -585,8 +607,7 @@ extern struct bus_type usb_bus_type; struct usb_class_driver { char *name; struct file_operations *fops; - mode_t mode; - int minor_base; + int minor_base; }; /* @@ -603,7 +624,7 @@ extern void usb_deregister_dev(struct usb_interface *intf, extern int usb_disabled(void); -/* -------------------------------------------------------------------------- */ +/* ----------------------------------------------------------------------- */ /* * URB support, for asynchronous request completions @@ -613,12 +634,14 @@ extern int usb_disabled(void); * urb->transfer_flags: */ #define URB_SHORT_NOT_OK 0x0001 /* report short reads as errors */ -#define URB_ISO_ASAP 0x0002 /* iso-only, urb->start_frame ignored */ +#define URB_ISO_ASAP 0x0002 /* iso-only, urb->start_frame + * ignored */ #define URB_NO_TRANSFER_DMA_MAP 0x0004 /* urb->transfer_dma valid on submit */ #define URB_NO_SETUP_DMA_MAP 0x0008 /* urb->setup_dma valid on submit */ #define URB_NO_FSBR 0x0020 /* UHCI-specific */ -#define URB_ZERO_PACKET 0x0040 /* Finish bulk OUTs with short packet */ -#define URB_NO_INTERRUPT 0x0080 /* HINT: no non-error interrupt needed */ +#define URB_ZERO_PACKET 0x0040 /* Finish bulk OUT with short packet */ +#define URB_NO_INTERRUPT 0x0080 /* HINT: no non-error interrupt + * needed */ struct usb_iso_packet_descriptor { unsigned int offset; @@ -797,7 +820,7 @@ typedef void (*usb_complete_t)(struct urb *, struct pt_regs *); */ struct urb { - /* private, usb core and host controller only fields in the urb */ + /* private: usb core and host controller only fields in the urb */ struct kref kref; /* reference count of the URB */ spinlock_t lock; /* lock for the URB */ void *hcpriv; /* private data for host controller */ @@ -805,8 +828,9 @@ struct urb atomic_t use_count; /* concurrent submissions counter */ u8 reject; /* submissions will fail */ - /* public, documented fields in the urb that can be used by drivers */ - struct list_head urb_list; /* list head for use by the urb owner */ + /* public: documented fields in the urb that can be used by drivers */ + struct list_head urb_list; /* list head for use by the urb's + * current owner */ struct usb_device *dev; /* (in) pointer to associated device */ unsigned int pipe; /* (in) pipe information */ int status; /* (return) non-ISO status */ @@ -819,14 +843,16 @@ struct urb dma_addr_t setup_dma; /* (in) dma addr for setup_packet */ int start_frame; /* (modify) start frame (ISO) */ int number_of_packets; /* (in) number of ISO packets */ - int interval; /* (modify) transfer interval (INT/ISO) */ + int interval; /* (modify) transfer interval + * (INT/ISO) */ int error_count; /* (return) number of ISO errors */ void *context; /* (in) context for completion */ usb_complete_t complete; /* (in) completion routine */ - struct usb_iso_packet_descriptor iso_frame_desc[0]; /* (in) ISO ONLY */ + struct usb_iso_packet_descriptor iso_frame_desc[0]; + /* (in) ISO ONLY */ }; -/* -------------------------------------------------------------------------- */ +/* ----------------------------------------------------------------------- */ /** * usb_fill_control_urb - initializes a control urb @@ -933,17 +959,17 @@ static inline void usb_fill_int_urb (struct urb *urb, } extern void usb_init_urb(struct urb *urb); -extern struct urb *usb_alloc_urb(int iso_packets, unsigned mem_flags); +extern struct urb *usb_alloc_urb(int iso_packets, gfp_t mem_flags); extern void usb_free_urb(struct urb *urb); #define usb_put_urb usb_free_urb extern struct urb *usb_get_urb(struct urb *urb); -extern int usb_submit_urb(struct urb *urb, unsigned mem_flags); +extern int usb_submit_urb(struct urb *urb, gfp_t mem_flags); extern int usb_unlink_urb(struct urb *urb); extern void usb_kill_urb(struct urb *urb); #define HAVE_USB_BUFFERS void *usb_buffer_alloc (struct usb_device *dev, size_t size, - unsigned mem_flags, dma_addr_t *dma); + gfp_t mem_flags, dma_addr_t *dma); void usb_buffer_free (struct usb_device *dev, size_t size, void *addr, dma_addr_t dma); @@ -974,11 +1000,6 @@ extern int usb_bulk_msg(struct usb_device *usb_dev, unsigned int pipe, void *data, int len, int *actual_length, int timeout); -/* selective suspend/resume */ -extern int usb_suspend_device(struct usb_device *dev, pm_message_t message); -extern int usb_resume_device(struct usb_device *dev); - - /* wrappers around usb_control_msg() for the most common standard requests */ extern int usb_get_descriptor(struct usb_device *dev, unsigned char desctype, unsigned char descindex, void *buf, int size); @@ -1025,7 +1046,7 @@ struct usb_sg_request { size_t bytes; /* - * members below are private to usbcore, + * members below are private: to usbcore, * and are not provided for driver access! */ spinlock_t lock; @@ -1050,13 +1071,13 @@ int usb_sg_init ( struct scatterlist *sg, int nents, size_t length, - unsigned mem_flags + gfp_t mem_flags ); void usb_sg_cancel (struct usb_sg_request *io); void usb_sg_wait (struct usb_sg_request *io); -/* -------------------------------------------------------------------------- */ +/* ----------------------------------------------------------------------- */ /* * For various legacy reasons, Linux has a small cookie that's paired with @@ -1097,23 +1118,34 @@ void usb_sg_wait (struct usb_sg_request *io); /* The D0/D1 toggle bits ... USE WITH CAUTION (they're almost hcd-internal) */ #define usb_gettoggle(dev, ep, out) (((dev)->toggle[out] >> (ep)) & 1) #define usb_dotoggle(dev, ep, out) ((dev)->toggle[out] ^= (1 << (ep))) -#define usb_settoggle(dev, ep, out, bit) ((dev)->toggle[out] = ((dev)->toggle[out] & ~(1 << (ep))) | ((bit) << (ep))) +#define usb_settoggle(dev, ep, out, bit) \ + ((dev)->toggle[out] = ((dev)->toggle[out] & ~(1 << (ep))) | \ + ((bit) << (ep))) -static inline unsigned int __create_pipe(struct usb_device *dev, unsigned int endpoint) +static inline unsigned int __create_pipe(struct usb_device *dev, + unsigned int endpoint) { return (dev->devnum << 8) | (endpoint << 15); } /* Create various pipes... */ -#define usb_sndctrlpipe(dev,endpoint) ((PIPE_CONTROL << 30) | __create_pipe(dev,endpoint)) -#define usb_rcvctrlpipe(dev,endpoint) ((PIPE_CONTROL << 30) | __create_pipe(dev,endpoint) | USB_DIR_IN) -#define usb_sndisocpipe(dev,endpoint) ((PIPE_ISOCHRONOUS << 30) | __create_pipe(dev,endpoint)) -#define usb_rcvisocpipe(dev,endpoint) ((PIPE_ISOCHRONOUS << 30) | __create_pipe(dev,endpoint) | USB_DIR_IN) -#define usb_sndbulkpipe(dev,endpoint) ((PIPE_BULK << 30) | __create_pipe(dev,endpoint)) -#define usb_rcvbulkpipe(dev,endpoint) ((PIPE_BULK << 30) | __create_pipe(dev,endpoint) | USB_DIR_IN) -#define usb_sndintpipe(dev,endpoint) ((PIPE_INTERRUPT << 30) | __create_pipe(dev,endpoint)) -#define usb_rcvintpipe(dev,endpoint) ((PIPE_INTERRUPT << 30) | __create_pipe(dev,endpoint) | USB_DIR_IN) +#define usb_sndctrlpipe(dev,endpoint) \ + ((PIPE_CONTROL << 30) | __create_pipe(dev,endpoint)) +#define usb_rcvctrlpipe(dev,endpoint) \ + ((PIPE_CONTROL << 30) | __create_pipe(dev,endpoint) | USB_DIR_IN) +#define usb_sndisocpipe(dev,endpoint) \ + ((PIPE_ISOCHRONOUS << 30) | __create_pipe(dev,endpoint)) +#define usb_rcvisocpipe(dev,endpoint) \ + ((PIPE_ISOCHRONOUS << 30) | __create_pipe(dev,endpoint) | USB_DIR_IN) +#define usb_sndbulkpipe(dev,endpoint) \ + ((PIPE_BULK << 30) | __create_pipe(dev,endpoint)) +#define usb_rcvbulkpipe(dev,endpoint) \ + ((PIPE_BULK << 30) | __create_pipe(dev,endpoint) | USB_DIR_IN) +#define usb_sndintpipe(dev,endpoint) \ + ((PIPE_INTERRUPT << 30) | __create_pipe(dev,endpoint)) +#define usb_rcvintpipe(dev,endpoint) \ + ((PIPE_INTERRUPT << 30) | __create_pipe(dev,endpoint) | USB_DIR_IN) /*-------------------------------------------------------------------------*/ @@ -1137,17 +1169,29 @@ usb_maxpacket(struct usb_device *udev, int pipe, int is_out) return le16_to_cpu(ep->desc.wMaxPacketSize); } -/* -------------------------------------------------------------------------- */ +/* ----------------------------------------------------------------------- */ + +/* Events from the usb core */ +#define USB_DEVICE_ADD 0x0001 +#define USB_DEVICE_REMOVE 0x0002 +#define USB_BUS_ADD 0x0003 +#define USB_BUS_REMOVE 0x0004 +extern void usb_register_notify(struct notifier_block *nb); +extern void usb_unregister_notify(struct notifier_block *nb); #ifdef DEBUG -#define dbg(format, arg...) printk(KERN_DEBUG "%s: " format "\n" , __FILE__ , ## arg) +#define dbg(format, arg...) printk(KERN_DEBUG "%s: " format "\n" , \ + __FILE__ , ## arg) #else #define dbg(format, arg...) do {} while (0) #endif -#define err(format, arg...) printk(KERN_ERR "%s: " format "\n" , __FILE__ , ## arg) -#define info(format, arg...) printk(KERN_INFO "%s: " format "\n" , __FILE__ , ## arg) -#define warn(format, arg...) printk(KERN_WARNING "%s: " format "\n" , __FILE__ , ## arg) +#define err(format, arg...) printk(KERN_ERR "%s: " format "\n" , \ + __FILE__ , ## arg) +#define info(format, arg...) printk(KERN_INFO "%s: " format "\n" , \ + __FILE__ , ## arg) +#define warn(format, arg...) printk(KERN_WARNING "%s: " format "\n" , \ + __FILE__ , ## arg) #endif /* __KERNEL__ */ diff --git a/include/linux/usb_gadget.h b/include/linux/usb_gadget.h index 71e608607324..ff81117eb733 100644 --- a/include/linux/usb_gadget.h +++ b/include/linux/usb_gadget.h @@ -107,18 +107,18 @@ struct usb_ep_ops { int (*disable) (struct usb_ep *ep); struct usb_request *(*alloc_request) (struct usb_ep *ep, - unsigned gfp_flags); + gfp_t gfp_flags); void (*free_request) (struct usb_ep *ep, struct usb_request *req); void *(*alloc_buffer) (struct usb_ep *ep, unsigned bytes, - dma_addr_t *dma, unsigned gfp_flags); + dma_addr_t *dma, gfp_t gfp_flags); void (*free_buffer) (struct usb_ep *ep, void *buf, dma_addr_t dma, unsigned bytes); // NOTE: on 2.6, drivers may also use dma_map() and // dma_sync_single_*() to directly manage dma overhead. int (*queue) (struct usb_ep *ep, struct usb_request *req, - unsigned gfp_flags); + gfp_t gfp_flags); int (*dequeue) (struct usb_ep *ep, struct usb_request *req); int (*set_halt) (struct usb_ep *ep, int value); @@ -214,7 +214,7 @@ usb_ep_disable (struct usb_ep *ep) * Returns the request, or null if one could not be allocated. */ static inline struct usb_request * -usb_ep_alloc_request (struct usb_ep *ep, unsigned gfp_flags) +usb_ep_alloc_request (struct usb_ep *ep, gfp_t gfp_flags) { return ep->ops->alloc_request (ep, gfp_flags); } @@ -254,7 +254,7 @@ usb_ep_free_request (struct usb_ep *ep, struct usb_request *req) */ static inline void * usb_ep_alloc_buffer (struct usb_ep *ep, unsigned len, dma_addr_t *dma, - unsigned gfp_flags) + gfp_t gfp_flags) { return ep->ops->alloc_buffer (ep, len, dma, gfp_flags); } @@ -330,7 +330,7 @@ usb_ep_free_buffer (struct usb_ep *ep, void *buf, dma_addr_t dma, unsigned len) * reported when the usb peripheral is disconnected. */ static inline int -usb_ep_queue (struct usb_ep *ep, struct usb_request *req, unsigned gfp_flags) +usb_ep_queue (struct usb_ep *ep, struct usb_request *req, gfp_t gfp_flags) { return ep->ops->queue (ep, req, gfp_flags); } diff --git a/include/linux/usb_otg.h b/include/linux/usb_otg.h index c6683146e9b0..f827f6e203c2 100644 --- a/include/linux/usb_otg.h +++ b/include/linux/usb_otg.h @@ -63,6 +63,10 @@ struct otg_transceiver { int (*set_power)(struct otg_transceiver *otg, unsigned mA); + /* for non-OTG B devices: set transceiver into suspend mode */ + int (*set_suspend)(struct otg_transceiver *otg, + int suspend); + /* for B devices only: start session with A-Host */ int (*start_srp)(struct otg_transceiver *otg); @@ -108,6 +112,15 @@ otg_set_power(struct otg_transceiver *otg, unsigned mA) } static inline int +otg_set_suspend(struct otg_transceiver *otg, int suspend) +{ + if (otg->set_suspend != NULL) + return otg->set_suspend(otg, suspend); + else + return 0; +} + +static inline int otg_start_srp(struct otg_transceiver *otg) { return otg->start_srp(otg); diff --git a/include/linux/usbdevice_fs.h b/include/linux/usbdevice_fs.h index 9facf733800c..8859f0b41543 100644 --- a/include/linux/usbdevice_fs.h +++ b/include/linux/usbdevice_fs.h @@ -140,6 +140,12 @@ struct usbdevfs_urb32 { compat_caddr_t usercontext; /* unused */ struct usbdevfs_iso_packet_desc iso_frame_desc[0]; }; + +struct usbdevfs_ioctl32 { + s32 ifno; + s32 ioctl_code; + compat_caddr_t data; +}; #endif #define USBDEVFS_CONTROL _IOWR('U', 0, struct usbdevfs_ctrltransfer) @@ -160,6 +166,7 @@ struct usbdevfs_urb32 { #define USBDEVFS_RELEASEINTERFACE _IOR('U', 16, unsigned int) #define USBDEVFS_CONNECTINFO _IOW('U', 17, struct usbdevfs_connectinfo) #define USBDEVFS_IOCTL _IOWR('U', 18, struct usbdevfs_ioctl) +#define USBDEVFS_IOCTL32 _IOWR('U', 18, struct usbdevfs_ioctl32) #define USBDEVFS_HUB_PORTINFO _IOR('U', 19, struct usbdevfs_hub_portinfo) #define USBDEVFS_RESET _IO('U', 20) #define USBDEVFS_CLEAR_HALT _IOR('U', 21, unsigned int) diff --git a/include/linux/videodev.h b/include/linux/videodev.h index 1cc8c31b7988..91140091ced2 100644 --- a/include/linux/videodev.h +++ b/include/linux/videodev.h @@ -1,57 +1,16 @@ #ifndef __LINUX_VIDEODEV_H #define __LINUX_VIDEODEV_H -#include <linux/compiler.h> #include <linux/types.h> -#define HAVE_V4L2 1 +#define HAVE_V4L1 1 + #include <linux/videodev2.h> #ifdef __KERNEL__ -#include <linux/poll.h> #include <linux/mm.h> -#include <linux/device.h> - -struct video_device -{ - /* device info */ - struct device *dev; - char name[32]; - int type; /* v4l1 */ - int type2; /* v4l2 */ - int hardware; - int minor; - - /* device ops + callbacks */ - struct file_operations *fops; - void (*release)(struct video_device *vfd); - - - /* obsolete -- fops->owner is used instead */ - struct module *owner; - /* dev->driver_data will be used instead some day. - * Use the video_{get|set}_drvdata() helper functions, - * so the switch over will be transparent for you. - * Or use {pci|usb}_{get|set}_drvdata() directly. */ - void *priv; - - /* for videodev.c intenal usage -- please don't touch */ - int users; /* video_exclusive_{open|close} ... */ - struct semaphore lock; /* ... helper function uses these */ - char devfs_name[64]; /* devfs */ - struct class_device class_dev; /* sysfs */ -}; - -#define VIDEO_MAJOR 81 - -#define VFL_TYPE_GRABBER 0 -#define VFL_TYPE_VBI 1 -#define VFL_TYPE_RADIO 2 -#define VFL_TYPE_VTX 3 -extern int video_register_device(struct video_device *, int type, int nr); -extern void video_unregister_device(struct video_device *); extern struct video_device* video_devdata(struct file*); #define to_video_device(cd) container_of(cd, struct video_device, class_dev) @@ -68,11 +27,7 @@ video_device_remove_file(struct video_device *vfd, class_device_remove_file(&vfd->class_dev, attr); } -/* helper functions to alloc / release struct video_device, the - later can be used for video_device->release() */ -struct video_device *video_device_alloc(void); -void video_device_release(struct video_device *vfd); - +#if OBSOLETE_OWNER /* to be removed in 2.6.15 */ /* helper functions to access driver private data. */ static inline void *video_get_drvdata(struct video_device *dev) { @@ -83,30 +38,12 @@ static inline void video_set_drvdata(struct video_device *dev, void *data) { dev->priv = data; } +#endif extern int video_exclusive_open(struct inode *inode, struct file *file); extern int video_exclusive_release(struct inode *inode, struct file *file); -extern int video_usercopy(struct inode *inode, struct file *file, - unsigned int cmd, unsigned long arg, - int (*func)(struct inode *inode, struct file *file, - unsigned int cmd, void *arg)); #endif /* __KERNEL__ */ -#define VID_TYPE_CAPTURE 1 /* Can capture */ -#define VID_TYPE_TUNER 2 /* Can tune */ -#define VID_TYPE_TELETEXT 4 /* Does teletext */ -#define VID_TYPE_OVERLAY 8 /* Overlay onto frame buffer */ -#define VID_TYPE_CHROMAKEY 16 /* Overlay by chromakey */ -#define VID_TYPE_CLIPPING 32 /* Can clip */ -#define VID_TYPE_FRAMERAM 64 /* Uses the frame buffer memory */ -#define VID_TYPE_SCALES 128 /* Scalable */ -#define VID_TYPE_MONOCHROME 256 /* Monochrome only */ -#define VID_TYPE_SUBCAPTURE 512 /* Can capture subareas of the image */ -#define VID_TYPE_MPEG_DECODER 1024 /* Can decode MPEG streams */ -#define VID_TYPE_MPEG_ENCODER 2048 /* Can encode MPEG streams */ -#define VID_TYPE_MJPEG_DECODER 4096 /* Can decode MJPEG streams */ -#define VID_TYPE_MJPEG_ENCODER 8192 /* Can encode MJPEG streams */ - struct video_capability { char name[32]; @@ -202,9 +139,9 @@ struct video_audio #define VIDEO_SOUND_STEREO 2 #define VIDEO_SOUND_LANG1 4 #define VIDEO_SOUND_LANG2 8 - __u16 mode; - __u16 balance; /* Stereo balance */ - __u16 step; /* Step actual volume uses */ + __u16 mode; + __u16 balance; /* Stereo balance */ + __u16 step; /* Step actual volume uses */ }; struct video_clip @@ -260,9 +197,6 @@ struct video_key __u32 flags; }; - -#define VIDEO_MAX_FRAME 32 - struct video_mbuf { int size; /* Total memory to map */ @@ -270,10 +204,8 @@ struct video_mbuf int offsets[VIDEO_MAX_FRAME]; }; - #define VIDEO_NO_UNIT (-1) - struct video_unit { int video; /* Video minor */ diff --git a/include/linux/videodev2.h b/include/linux/videodev2.h index 89a055761bed..1cded681eb6d 100644 --- a/include/linux/videodev2.h +++ b/include/linux/videodev2.h @@ -15,16 +15,99 @@ */ #ifdef __KERNEL__ #include <linux/time.h> /* need struct timeval */ +#include <linux/poll.h> +#include <linux/device.h> #endif #include <linux/compiler.h> /* need __user */ + +#define OBSOLETE_OWNER 1 /* It will be removed for 2.6.15 */ +#define HAVE_V4L2 1 + +/* + * Common stuff for both V4L1 and V4L2 + * Moved from videodev.h + */ + +#define VIDEO_MAX_FRAME 32 + +#define VID_TYPE_CAPTURE 1 /* Can capture */ +#define VID_TYPE_TUNER 2 /* Can tune */ +#define VID_TYPE_TELETEXT 4 /* Does teletext */ +#define VID_TYPE_OVERLAY 8 /* Overlay onto frame buffer */ +#define VID_TYPE_CHROMAKEY 16 /* Overlay by chromakey */ +#define VID_TYPE_CLIPPING 32 /* Can clip */ +#define VID_TYPE_FRAMERAM 64 /* Uses the frame buffer memory */ +#define VID_TYPE_SCALES 128 /* Scalable */ +#define VID_TYPE_MONOCHROME 256 /* Monochrome only */ +#define VID_TYPE_SUBCAPTURE 512 /* Can capture subareas of the image */ +#define VID_TYPE_MPEG_DECODER 1024 /* Can decode MPEG streams */ +#define VID_TYPE_MPEG_ENCODER 2048 /* Can encode MPEG streams */ +#define VID_TYPE_MJPEG_DECODER 4096 /* Can decode MJPEG streams */ +#define VID_TYPE_MJPEG_ENCODER 8192 /* Can encode MJPEG streams */ + +#ifdef __KERNEL__ + +#define VFL_TYPE_GRABBER 0 +#define VFL_TYPE_VBI 1 +#define VFL_TYPE_RADIO 2 +#define VFL_TYPE_VTX 3 + +struct video_device +{ + /* device info */ + struct device *dev; + char name[32]; + int type; /* v4l1 */ + int type2; /* v4l2 */ + int hardware; + int minor; + + /* device ops + callbacks */ + struct file_operations *fops; + void (*release)(struct video_device *vfd); + + +#if OBSOLETE_OWNER /* to be removed in 2.6.15 */ + /* obsolete -- fops->owner is used instead */ + struct module *owner; + /* dev->driver_data will be used instead some day. + * Use the video_{get|set}_drvdata() helper functions, + * so the switch over will be transparent for you. + * Or use {pci|usb}_{get|set}_drvdata() directly. */ + void *priv; +#endif + + /* for videodev.c intenal usage -- please don't touch */ + int users; /* video_exclusive_{open|close} ... */ + struct semaphore lock; /* ... helper function uses these */ + char devfs_name[64]; /* devfs */ + struct class_device class_dev; /* sysfs */ +}; + +#define VIDEO_MAJOR 81 + +extern int video_register_device(struct video_device *, int type, int nr); +extern void video_unregister_device(struct video_device *); +extern int video_usercopy(struct inode *inode, struct file *file, + unsigned int cmd, unsigned long arg, + int (*func)(struct inode *inode, struct file *file, + unsigned int cmd, void *arg)); + +/* helper functions to alloc / release struct video_device, the + later can be used for video_device->release() */ +struct video_device *video_device_alloc(void); +void video_device_release(struct video_device *vfd); + +#endif + /* * M I S C E L L A N E O U S */ /* Four-character-code (FOURCC) */ #define v4l2_fourcc(a,b,c,d)\ - (((__u32)(a)<<0)|((__u32)(b)<<8)|((__u32)(c)<<16)|((__u32)(d)<<24)) + (((__u32)(a)<<0)|((__u32)(b)<<8)|((__u32)(c)<<16)|((__u32)(d)<<24)) /* * E N U M S @@ -154,20 +237,20 @@ struct v4l2_capability }; /* Values for 'capabilities' field */ -#define V4L2_CAP_VIDEO_CAPTURE 0x00000001 /* Is a video capture device */ -#define V4L2_CAP_VIDEO_OUTPUT 0x00000002 /* Is a video output device */ -#define V4L2_CAP_VIDEO_OVERLAY 0x00000004 /* Can do video overlay */ -#define V4L2_CAP_VBI_CAPTURE 0x00000010 /* Is a raw VBI capture device */ -#define V4L2_CAP_VBI_OUTPUT 0x00000020 /* Is a raw VBI output device */ +#define V4L2_CAP_VIDEO_CAPTURE 0x00000001 /* Is a video capture device */ +#define V4L2_CAP_VIDEO_OUTPUT 0x00000002 /* Is a video output device */ +#define V4L2_CAP_VIDEO_OVERLAY 0x00000004 /* Can do video overlay */ +#define V4L2_CAP_VBI_CAPTURE 0x00000010 /* Is a raw VBI capture device */ +#define V4L2_CAP_VBI_OUTPUT 0x00000020 /* Is a raw VBI output device */ #if 1 #define V4L2_CAP_SLICED_VBI_CAPTURE 0x00000040 /* Is a sliced VBI capture device */ #define V4L2_CAP_SLICED_VBI_OUTPUT 0x00000080 /* Is a sliced VBI output device */ #endif -#define V4L2_CAP_RDS_CAPTURE 0x00000100 /* RDS data capture */ +#define V4L2_CAP_RDS_CAPTURE 0x00000100 /* RDS data capture */ -#define V4L2_CAP_TUNER 0x00010000 /* has a tuner */ -#define V4L2_CAP_AUDIO 0x00020000 /* has audio support */ -#define V4L2_CAP_RADIO 0x00040000 /* is a radio device */ +#define V4L2_CAP_TUNER 0x00010000 /* has a tuner */ +#define V4L2_CAP_AUDIO 0x00020000 /* has audio support */ +#define V4L2_CAP_RADIO 0x00040000 /* is a radio device */ #define V4L2_CAP_READWRITE 0x01000000 /* read/write systemcalls */ #define V4L2_CAP_ASYNCIO 0x02000000 /* async I/O */ @@ -179,13 +262,13 @@ struct v4l2_capability struct v4l2_pix_format { - __u32 width; - __u32 height; - __u32 pixelformat; + __u32 width; + __u32 height; + __u32 pixelformat; enum v4l2_field field; __u32 bytesperline; /* for padding, zero if unused */ - __u32 sizeimage; - enum v4l2_colorspace colorspace; + __u32 sizeimage; + enum v4l2_colorspace colorspace; __u32 priv; /* private data, depends on pixelformat */ }; @@ -238,12 +321,12 @@ struct v4l2_pix_format */ struct v4l2_fmtdesc { - __u32 index; /* Format number */ + __u32 index; /* Format number */ enum v4l2_buf_type type; /* buffer type */ __u32 flags; - __u8 description[32]; /* Description string */ - __u32 pixelformat; /* Format fourcc */ - __u32 reserved[4]; + __u8 description[32]; /* Description string */ + __u32 pixelformat; /* Format fourcc */ + __u32 reserved[4]; }; #define V4L2_FMT_FLAG_COMPRESSED 0x0001 @@ -393,7 +476,7 @@ struct v4l2_jpegcompression #define V4L2_JPEG_MARKER_DRI (1<<5) /* Define Restart Interval */ #define V4L2_JPEG_MARKER_COM (1<<6) /* Comment segment */ #define V4L2_JPEG_MARKER_APP (1<<7) /* App segment, driver will - * allways use APP0 */ + * allways use APP0 */ }; @@ -402,10 +485,10 @@ struct v4l2_jpegcompression */ struct v4l2_requestbuffers { - __u32 count; + __u32 count; enum v4l2_buf_type type; enum v4l2_memory memory; - __u32 reserved[2]; + __u32 reserved[2]; }; struct v4l2_buffer @@ -511,9 +594,9 @@ struct v4l2_outputparm struct v4l2_cropcap { enum v4l2_buf_type type; - struct v4l2_rect bounds; - struct v4l2_rect defrect; - struct v4l2_fract pixelaspect; + struct v4l2_rect bounds; + struct v4l2_rect defrect; + struct v4l2_fract pixelaspect; }; struct v4l2_crop { @@ -544,6 +627,7 @@ typedef __u64 v4l2_std_id; #define V4L2_STD_NTSC_M ((v4l2_std_id)0x00001000) #define V4L2_STD_NTSC_M_JP ((v4l2_std_id)0x00002000) +#define V4L2_STD_NTSC_443 ((v4l2_std_id)0x00004000) #define V4L2_STD_SECAM_B ((v4l2_std_id)0x00010000) #define V4L2_STD_SECAM_D ((v4l2_std_id)0x00020000) @@ -552,6 +636,7 @@ typedef __u64 v4l2_std_id; #define V4L2_STD_SECAM_K ((v4l2_std_id)0x00100000) #define V4L2_STD_SECAM_K1 ((v4l2_std_id)0x00200000) #define V4L2_STD_SECAM_L ((v4l2_std_id)0x00400000) +#define V4L2_STD_SECAM_LC ((v4l2_std_id)0x00800000) /* ATSC/HDTV */ #define V4L2_STD_ATSC_8_VSB ((v4l2_std_id)0x01000000) @@ -581,13 +666,14 @@ typedef __u64 v4l2_std_id; #define V4L2_STD_525_60 (V4L2_STD_PAL_M |\ V4L2_STD_PAL_60 |\ - V4L2_STD_NTSC) + V4L2_STD_NTSC |\ + V4L2_STD_NTSC_443) #define V4L2_STD_625_50 (V4L2_STD_PAL |\ V4L2_STD_PAL_N |\ V4L2_STD_PAL_Nc |\ V4L2_STD_SECAM) #define V4L2_STD_ATSC (V4L2_STD_ATSC_8_VSB |\ - V4L2_STD_ATSC_16_VSB) + V4L2_STD_ATSC_16_VSB) #define V4L2_STD_UNKNOWN 0 #define V4L2_STD_ALL (V4L2_STD_525_60 |\ @@ -595,7 +681,7 @@ typedef __u64 v4l2_std_id; struct v4l2_standard { - __u32 index; + __u32 index; v4l2_std_id id; __u8 name[24]; struct v4l2_fract frameperiod; /* Frames, not fields */ @@ -610,9 +696,9 @@ struct v4l2_standard struct v4l2_input { __u32 index; /* Which input */ - __u8 name[32]; /* Label */ + __u8 name[32]; /* Label */ __u32 type; /* Type of input */ - __u32 audioset; /* Associated audios (bitfield) */ + __u32 audioset; /* Associated audios (bitfield) */ __u32 tuner; /* Associated tuner */ v4l2_std_id std; __u32 status; @@ -647,9 +733,9 @@ struct v4l2_input struct v4l2_output { __u32 index; /* Which output */ - __u8 name[32]; /* Label */ + __u8 name[32]; /* Label */ __u32 type; /* Type of output */ - __u32 audioset; /* Associated audios (bitfield) */ + __u32 audioset; /* Associated audios (bitfield) */ __u32 modulator; /* Associated modulator */ v4l2_std_id std; __u32 reserved[4]; @@ -671,12 +757,12 @@ struct v4l2_control /* Used in the VIDIOC_QUERYCTRL ioctl for querying controls */ struct v4l2_queryctrl { - __u32 id; + __u32 id; enum v4l2_ctrl_type type; __u8 name[32]; /* Whatever */ __s32 minimum; /* Note signedness */ __s32 maximum; - __s32 step; + __s32 step; __s32 default_value; __u32 flags; __u32 reserved[2]; @@ -779,10 +865,10 @@ struct v4l2_modulator struct v4l2_frequency { - __u32 tuner; + __u32 tuner; enum v4l2_tuner_type type; - __u32 frequency; - __u32 reserved[8]; + __u32 frequency; + __u32 reserved[8]; }; /* @@ -802,6 +888,7 @@ struct v4l2_audio /* Flags for the 'mode' field */ #define V4L2_AUDMODE_AVL 0x00001 +#define V4L2_AUDMODE_32BITS 0x00002 struct v4l2_audioout { @@ -846,14 +933,14 @@ struct v4l2_vbi_format struct v4l2_sliced_vbi_format { - __u16 service_set; - /* service_lines[0][...] specifies lines 0-23 (1-23 used) of the first field - service_lines[1][...] specifies lines 0-23 (1-23 used) of the second field - (equals frame lines 313-336 for 625 line video - standards, 263-286 for 525 line standards) */ - __u16 service_lines[2][24]; - __u32 io_size; - __u32 reserved[2]; /* must be zero */ + __u16 service_set; + /* service_lines[0][...] specifies lines 0-23 (1-23 used) of the first field + service_lines[1][...] specifies lines 0-23 (1-23 used) of the second field + (equals frame lines 313-336 for 625 line video + standards, 263-286 for 525 line standards) */ + __u16 service_lines[2][24]; + __u32 io_size; + __u32 reserved[2]; /* must be zero */ }; #define V4L2_SLICED_TELETEXT_B (0x0001) @@ -866,22 +953,22 @@ struct v4l2_sliced_vbi_format struct v4l2_sliced_vbi_cap { - __u16 service_set; - /* service_lines[0][...] specifies lines 0-23 (1-23 used) of the first field - service_lines[1][...] specifies lines 0-23 (1-23 used) of the second field - (equals frame lines 313-336 for 625 line video - standards, 263-286 for 525 line standards) */ - __u16 service_lines[2][24]; - __u32 reserved[4]; /* must be 0 */ + __u16 service_set; + /* service_lines[0][...] specifies lines 0-23 (1-23 used) of the first field + service_lines[1][...] specifies lines 0-23 (1-23 used) of the second field + (equals frame lines 313-336 for 625 line video + standards, 263-286 for 525 line standards) */ + __u16 service_lines[2][24]; + __u32 reserved[4]; /* must be 0 */ }; struct v4l2_sliced_vbi_data { - __u32 id; - __u32 field; /* 0: first field, 1: second field */ - __u32 line; /* 1-23 */ - __u32 reserved; /* must be 0 */ - __u8 data[48]; + __u32 id; + __u32 field; /* 0: first field, 1: second field */ + __u32 line; /* 1-23 */ + __u32 reserved; /* must be 0 */ + __u8 data[48]; }; #endif @@ -896,9 +983,9 @@ struct v4l2_format enum v4l2_buf_type type; union { - struct v4l2_pix_format pix; // V4L2_BUF_TYPE_VIDEO_CAPTURE - struct v4l2_window win; // V4L2_BUF_TYPE_VIDEO_OVERLAY - struct v4l2_vbi_format vbi; // V4L2_BUF_TYPE_VBI_CAPTURE + struct v4l2_pix_format pix; // V4L2_BUF_TYPE_VIDEO_CAPTURE + struct v4l2_window win; // V4L2_BUF_TYPE_VIDEO_OVERLAY + struct v4l2_vbi_format vbi; // V4L2_BUF_TYPE_VBI_CAPTURE #if 1 struct v4l2_sliced_vbi_format sliced; // V4L2_BUF_TYPE_SLICED_VBI_CAPTURE #endif @@ -981,6 +1068,7 @@ struct v4l2_streamparm #if 1 #define VIDIOC_G_SLICED_VBI_CAP _IOR ('V', 69, struct v4l2_sliced_vbi_cap) #endif +#define VIDIOC_LOG_STATUS _IO ('V', 70) /* for compatibility, will go away some day */ #define VIDIOC_OVERLAY_OLD _IOWR ('V', 14, int) diff --git a/include/linux/vmalloc.h b/include/linux/vmalloc.h index b244f69ef682..1d5577b2b752 100644 --- a/include/linux/vmalloc.h +++ b/include/linux/vmalloc.h @@ -32,10 +32,14 @@ struct vm_struct { * Highlevel APIs for driver use */ extern void *vmalloc(unsigned long size); +extern void *vmalloc_node(unsigned long size, int node); extern void *vmalloc_exec(unsigned long size); extern void *vmalloc_32(unsigned long size); -extern void *__vmalloc(unsigned long size, unsigned int __nocast gfp_mask, pgprot_t prot); -extern void *__vmalloc_area(struct vm_struct *area, unsigned int __nocast gfp_mask, pgprot_t prot); +extern void *__vmalloc(unsigned long size, gfp_t gfp_mask, pgprot_t prot); +extern void *__vmalloc_area(struct vm_struct *area, gfp_t gfp_mask, + pgprot_t prot); +extern void *__vmalloc_node(unsigned long size, gfp_t gfp_mask, + pgprot_t prot, int node); extern void vfree(void *addr); extern void *vmap(struct page **pages, unsigned int count, @@ -48,6 +52,8 @@ extern void vunmap(void *addr); extern struct vm_struct *get_vm_area(unsigned long size, unsigned long flags); extern struct vm_struct *__get_vm_area(unsigned long size, unsigned long flags, unsigned long start, unsigned long end); +extern struct vm_struct *get_vm_area_node(unsigned long size, + unsigned long flags, int node); extern struct vm_struct *remove_vm_area(void *addr); extern struct vm_struct *__remove_vm_area(void *addr); extern int map_vm_area(struct vm_struct *area, pgprot_t prot, diff --git a/include/linux/wait.h b/include/linux/wait.h index d38c9fecdc36..d28518236b62 100644 --- a/include/linux/wait.h +++ b/include/linux/wait.h @@ -54,6 +54,7 @@ struct __wait_queue_head { }; typedef struct __wait_queue_head wait_queue_head_t; +struct task_struct; /* * Macros for declaration and initialisaton of the datatypes diff --git a/include/linux/wanpipe.h b/include/linux/wanpipe.h index 167d956c492b..dae9860091dd 100644 --- a/include/linux/wanpipe.h +++ b/include/linux/wanpipe.h @@ -265,15 +265,6 @@ typedef struct { #include <linux/tty_driver.h> #include <linux/tty_flip.h> - -#define is_digit(ch) (((ch)>=(unsigned)'0'&&(ch)<=(unsigned)'9')?1:0) -#define is_alpha(ch) ((((ch)>=(unsigned)'a'&&(ch)<=(unsigned)'z')||\ - ((ch)>=(unsigned)'A'&&(ch)<=(unsigned)'Z'))?1:0) -#define is_hex_digit(ch) ((((ch)>=(unsigned)'0'&&(ch)<=(unsigned)'9')||\ - ((ch)>=(unsigned)'a'&&(ch)<=(unsigned)'f')||\ - ((ch)>=(unsigned)'A'&&(ch)<=(unsigned)'F'))?1:0) - - /****** Data Structures *****************************************************/ /* Adapter Data Space. diff --git a/include/linux/x1205.h b/include/linux/x1205.h new file mode 100644 index 000000000000..64fd3af894a5 --- /dev/null +++ b/include/linux/x1205.h @@ -0,0 +1,31 @@ +/* + * x1205.h - defines for drivers/i2c/chips/x1205.c + * Copyright 2004 Karen Spearel + * Copyright 2005 Alessandro Zummo + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#ifndef __LINUX_X1205_H__ +#define __LINUX_X1205_H__ + +/* commands */ + +#define X1205_CMD_GETDATETIME 0 +#define X1205_CMD_SETTIME 1 +#define X1205_CMD_SETDATETIME 2 +#define X1205_CMD_GETALARM 3 +#define X1205_CMD_SETALARM 4 +#define X1205_CMD_GETDTRIM 5 +#define X1205_CMD_SETDTRIM 6 +#define X1205_CMD_GETATRIM 7 +#define X1205_CMD_SETATRIM 8 + +extern int x1205_do_command(unsigned int cmd, void *arg); +extern int x1205_direct_attach(int adapter_id, + struct i2c_client_address_data *address_data); + +#endif /* __LINUX_X1205_H__ */ diff --git a/include/linux/zutil.h b/include/linux/zutil.h index fdfd5ed41ec4..ee0c59cf2136 100644 --- a/include/linux/zutil.h +++ b/include/linux/zutil.h @@ -15,7 +15,6 @@ #include <linux/zlib.h> #include <linux/string.h> -#include <linux/errno.h> #include <linux/kernel.h> typedef unsigned char uch; diff --git a/include/media/audiochip.h b/include/media/audiochip.h index a7ceee9fc5e9..b7d4b0930408 100644 --- a/include/media/audiochip.h +++ b/include/media/audiochip.h @@ -4,6 +4,23 @@ #ifndef AUDIOCHIP_H #define AUDIOCHIP_H +enum audiochip { + AUDIO_CHIP_NONE, + AUDIO_CHIP_UNKNOWN, + /* Provided by video chip */ + AUDIO_CHIP_INTERNAL, + /* Provided by tvaudio.c */ + AUDIO_CHIP_TDA8425, + AUDIO_CHIP_TEA6300, + AUDIO_CHIP_TEA6420, + AUDIO_CHIP_TDA9840, + AUDIO_CHIP_TDA985X, + AUDIO_CHIP_TDA9874, + AUDIO_CHIP_PIC16C54, + /* Provided by msp3400.c */ + AUDIO_CHIP_MSP34XX +}; + /* ---------------------------------------------------------------------- */ /* v4l device was opened in Radio mode */ diff --git a/include/media/id.h b/include/media/id.h deleted file mode 100644 index 6d02c94cdc0d..000000000000 --- a/include/media/id.h +++ /dev/null @@ -1,35 +0,0 @@ -/* - */ - -/* FIXME: this temporarely, until these are included in linux/i2c-id.h */ - -/* drivers */ -#ifndef I2C_DRIVERID_TVMIXER -# define I2C_DRIVERID_TVMIXER I2C_DRIVERID_EXP0 -#endif -#ifndef I2C_DRIVERID_TVAUDIO -# define I2C_DRIVERID_TVAUDIO I2C_DRIVERID_EXP1 -#endif - -/* chips */ -#ifndef I2C_DRIVERID_DPL3518 -# define I2C_DRIVERID_DPL3518 I2C_DRIVERID_EXP2 -#endif -#ifndef I2C_DRIVERID_TDA9873 -# define I2C_DRIVERID_TDA9873 I2C_DRIVERID_EXP3 -#endif -#ifndef I2C_DRIVERID_TDA9875 -# define I2C_DRIVERID_TDA9875 I2C_DRIVERID_EXP0+4 -#endif -#ifndef I2C_DRIVERID_PIC16C54_PV951 -# define I2C_DRIVERID_PIC16C54_PV951 I2C_DRIVERID_EXP0+5 -#endif -#ifndef I2C_DRIVERID_TDA7432 -# define I2C_DRIVERID_TDA7432 I2C_DRIVERID_EXP0+6 -#endif -#ifndef I2C_DRIVERID_TDA9874 -# define I2C_DRIVERID_TDA9874 I2C_DRIVERID_EXP0+7 -#endif -#ifndef I2C_DRIVERID_SAA6752HS -# define I2C_DRIVERID_SAA6752HS I2C_DRIVERID_EXP0+8 -#endif diff --git a/include/media/ir-common.h b/include/media/ir-common.h index 01b56822df4d..ad3e9bb670c3 100644 --- a/include/media/ir-common.h +++ b/include/media/ir-common.h @@ -20,8 +20,10 @@ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ -#include <linux/input.h> +#ifndef _IR_COMMON +#define _IR_COMMON +#include <linux/input.h> #define IR_TYPE_RC5 1 #define IR_TYPE_PD 2 /* Pulse distance encoded IR */ @@ -47,6 +49,7 @@ struct ir_input_state { extern IR_KEYTAB_TYPE ir_codes_rc5_tv[IR_KEYTAB_SIZE]; extern IR_KEYTAB_TYPE ir_codes_winfast[IR_KEYTAB_SIZE]; +extern IR_KEYTAB_TYPE ir_codes_pinnacle[IR_KEYTAB_SIZE]; extern IR_KEYTAB_TYPE ir_codes_empty[IR_KEYTAB_SIZE]; extern IR_KEYTAB_TYPE ir_codes_hauppauge_new[IR_KEYTAB_SIZE]; extern IR_KEYTAB_TYPE ir_codes_pixelview[IR_KEYTAB_SIZE]; @@ -61,6 +64,8 @@ int ir_dump_samples(u32 *samples, int count); int ir_decode_biphase(u32 *samples, int count, int low, int high); int ir_decode_pulsedistance(u32 *samples, int count, int low, int high); +#endif + /* * Local variables: * c-basic-offset: 8 diff --git a/include/media/ir-kbd-i2c.h b/include/media/ir-kbd-i2c.h new file mode 100644 index 000000000000..730f21ed91db --- /dev/null +++ b/include/media/ir-kbd-i2c.h @@ -0,0 +1,24 @@ +#ifndef _IR_I2C +#define _IR_I2C + +#include <media/ir-common.h> + +struct IR_i2c; + +struct IR_i2c { + IR_KEYTAB_TYPE *ir_codes; + struct i2c_client c; + struct input_dev *input; + struct ir_input_state ir; + + /* Used to avoid fast repeating */ + unsigned char old; + + struct work_struct work; + struct timer_list timer; + char phys[32]; + int (*get_key)(struct IR_i2c*, u32*, u32*); +}; + +int get_key_pinnacle(struct IR_i2c *ir, u32 *ir_key, u32 *ir_raw); +#endif diff --git a/include/media/ovcamchip.h b/include/media/ovcamchip.h index cb7c0aa96f22..8138983adced 100644 --- a/include/media/ovcamchip.h +++ b/include/media/ovcamchip.h @@ -17,20 +17,6 @@ #include <linux/videodev.h> #include <linux/i2c.h> -/* Remove these once they are officially defined */ -#ifndef I2C_DRIVERID_OVCAMCHIP - #define I2C_DRIVERID_OVCAMCHIP 0xf00f -#endif -#ifndef I2C_HW_SMBUS_OV511 - #define I2C_HW_SMBUS_OV511 0xfe -#endif -#ifndef I2C_HW_SMBUS_OV518 - #define I2C_HW_SMBUS_OV518 0xff -#endif -#ifndef I2C_HW_SMBUS_OVFX2 - #define I2C_HW_SMBUS_OVFX2 0xfd -#endif - /* --------------------------------- */ /* ENUMERATIONS */ /* --------------------------------- */ diff --git a/include/media/saa7146_vv.h b/include/media/saa7146_vv.h index f3aa24f8131c..64691753721e 100644 --- a/include/media/saa7146_vv.h +++ b/include/media/saa7146_vv.h @@ -1,7 +1,7 @@ #ifndef __SAA7146_VV__ #define __SAA7146_VV__ -#include <linux/videodev2.h> +#include <linux/videodev.h> #include <media/saa7146.h> #include <media/video-buf.h> diff --git a/include/media/tuner.h b/include/media/tuner.h index 4ad08e24a1aa..faa0f8e3091b 100644 --- a/include/media/tuner.h +++ b/include/media/tuner.h @@ -95,7 +95,7 @@ #define TUNER_THOMSON_DTT7610 52 #define TUNER_PHILIPS_FQ1286 53 #define TUNER_PHILIPS_TDA8290 54 -#define TUNER_LG_PAL_TAPE 55 /* Hauppauge PVR-150 PAL */ +#define TUNER_TCL_2002MB 55 /* Hauppauge PVR-150 PAL */ #define TUNER_PHILIPS_FQ1216AME_MK4 56 /* Hauppauge PVR-150 PAL */ #define TUNER_PHILIPS_FQ1236A_MK4 57 /* Hauppauge PVR-500MCE NTSC */ @@ -110,6 +110,10 @@ #define TUNER_LG_TDVS_H062F 64 /* DViCO FusionHDTV 5 */ #define TUNER_YMEC_TVF66T5_B_DFF 65 /* Acorp Y878F */ #define TUNER_LG_NTSC_TALN_MINI 66 +#define TUNER_PHILIPS_TD1316 67 + +#define TUNER_PHILIPS_TUV1236D 68 /* ATI HDTV Wonder */ +#define TUNER_TNF_5335MF 69 /* Sabrent Bt848 */ #define NOTUNER 0 #define PAL 1 /* PAL_BG */ @@ -145,6 +149,7 @@ # define TDA9887_INTERCARRIER (1<<4) # define TDA9887_PORT1_ACTIVE (1<<5) # define TDA9887_PORT2_ACTIVE (1<<6) +# define TDA9887_INTERCARRIER_NTSC (1<<7) /* config options */ # define TDA9887_DEEMPHASIS_MASK (3<<16) # define TDA9887_DEEMPHASIS_NONE (1<<16) @@ -188,8 +193,11 @@ struct tuner { unsigned int radio_if2; /* used by tda8290 */ - unsigned char i2c_easy_mode[2]; - unsigned char i2c_set_freq[8]; + unsigned char tda8290_easy_mode; + unsigned char tda827x_lpsel; + unsigned char tda827x_addr; + unsigned char tda827x_ver; + unsigned int sgIF; /* function ptrs */ void (*tv_freq)(struct i2c_client *c, unsigned int freq); @@ -204,20 +212,21 @@ extern unsigned const int tuner_count; extern int microtune_init(struct i2c_client *c); extern int tda8290_init(struct i2c_client *c); +extern int tda8290_probe(struct i2c_client *c); extern int tea5767_tuner_init(struct i2c_client *c); extern int default_tuner_init(struct i2c_client *c); extern int tea5767_autodetection(struct i2c_client *c); #define tuner_warn(fmt, arg...) do {\ printk(KERN_WARNING "%s %d-%04x: " fmt, t->i2c.driver->name, \ - t->i2c.adapter->nr, t->i2c.addr , ##arg); } while (0) + t->i2c.adapter->nr, t->i2c.addr , ##arg); } while (0) #define tuner_info(fmt, arg...) do {\ printk(KERN_INFO "%s %d-%04x: " fmt, t->i2c.driver->name, \ - t->i2c.adapter->nr, t->i2c.addr , ##arg); } while (0) + t->i2c.adapter->nr, t->i2c.addr , ##arg); } while (0) #define tuner_dbg(fmt, arg...) do {\ if (tuner_debug) \ - printk(KERN_DEBUG "%s %d-%04x: " fmt, t->i2c.driver->name, \ - t->i2c.adapter->nr, t->i2c.addr , ##arg); } while (0) + printk(KERN_DEBUG "%s %d-%04x: " fmt, t->i2c.driver->name, \ + t->i2c.adapter->nr, t->i2c.addr , ##arg); } while (0) #endif /* __KERNEL__ */ diff --git a/include/media/tveeprom.h b/include/media/tveeprom.h index e2035c7da094..e9fc1a785497 100644 --- a/include/media/tveeprom.h +++ b/include/media/tveeprom.h @@ -4,12 +4,15 @@ struct tveeprom { u32 has_radio; u32 has_ir; /* 0: no IR, 1: IR present, 2: unknown */ + u32 has_MAC_address; /* 0: no MAC, 1: MAC present, 2: unknown */ u32 tuner_type; u32 tuner_formats; + u32 tuner_hauppauge_model; u32 tuner2_type; u32 tuner2_formats; + u32 tuner2_hauppauge_model; u32 digitizer; u32 digitizer_formats; @@ -21,6 +24,7 @@ struct tveeprom { u32 revision; u32 serial_number; char rev_str[5]; + u8 MAC_address[6]; }; void tveeprom_hauppauge_analog(struct i2c_client *c, struct tveeprom *tvee, diff --git a/include/media/v4l2-common.h b/include/media/v4l2-common.h new file mode 100644 index 000000000000..d3fd48157eb8 --- /dev/null +++ b/include/media/v4l2-common.h @@ -0,0 +1,110 @@ +/* + v4l2 common internal API header + + This header contains internal shared ioctl definitions for use by the + internal low-level v4l2 drivers. + Each ioctl begins with VIDIOC_INT_ to clearly mark that it is an internal + define, + + Copyright (C) 2005 Hans Verkuil <hverkuil@xs4all.nl> + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#ifndef V4L2_COMMON_H_ +#define V4L2_COMMON_H_ + +/* VIDIOC_INT_AUDIO_CLOCK_FREQ */ +enum v4l2_audio_clock_freq { + V4L2_AUDCLK_32_KHZ = 32000, + V4L2_AUDCLK_441_KHZ = 44100, + V4L2_AUDCLK_48_KHZ = 48000, +}; + +/* VIDIOC_INT_G_REGISTER and VIDIOC_INT_S_REGISTER */ +struct v4l2_register { + u32 i2c_id; /* I2C driver ID of the I2C chip. 0 for the I2C adapter. */ + unsigned long reg; + u32 val; +}; + +/* VIDIOC_INT_DECODE_VBI_LINE */ +struct v4l2_decode_vbi_line { + u32 is_second_field; /* Set to 0 for the first (odd) field, + set to 1 for the second (even) field. */ + u8 *p; /* Pointer to the sliced VBI data from the decoder. + On exit points to the start of the payload. */ + u32 line; /* Line number of the sliced VBI data (1-23) */ + u32 type; /* VBI service type (V4L2_SLICED_*). 0 if no service found */ +}; + +/* VIDIOC_INT_G_CHIP_IDENT: identifies the actual chip installed on the board */ +enum v4l2_chip_ident { + /* general idents: reserved range 0-49 */ + V4L2_IDENT_UNKNOWN = 0, + + /* module saa7115: reserved range 100-149 */ + V4L2_IDENT_SAA7114 = 104, + V4L2_IDENT_SAA7115 = 105, + + /* module saa7127: reserved range 150-199 */ + V4L2_IDENT_SAA7127 = 157, + V4L2_IDENT_SAA7129 = 159, + + /* module cx25840: reserved range 200-249 */ + V4L2_IDENT_CX25840 = 240, + V4L2_IDENT_CX25841 = 241, + V4L2_IDENT_CX25842 = 242, + V4L2_IDENT_CX25843 = 243, +}; + +/* only implemented if CONFIG_VIDEO_ADV_DEBUG is defined */ +#define VIDIOC_INT_S_REGISTER _IOR ('d', 100, struct v4l2_register) +#define VIDIOC_INT_G_REGISTER _IOWR('d', 101, struct v4l2_register) + +/* Reset the I2C chip */ +#define VIDIOC_INT_RESET _IO ('d', 102) + +/* Set the frequency of the audio clock output. + Used to slave an audio processor to the video decoder, ensuring that audio + and video remain synchronized. */ +#define VIDIOC_INT_AUDIO_CLOCK_FREQ _IOR ('d', 103, enum v4l2_audio_clock_freq) + +/* Video decoders that support sliced VBI need to implement this ioctl. + Field p of the v4l2_sliced_vbi_line struct is set to the start of the VBI + data that was generated by the decoder. The driver then parses the sliced + VBI data and sets the other fields in the struct accordingly. The pointer p + is updated to point to the start of the payload which can be copied + verbatim into the data field of the v4l2_sliced_vbi_data struct. If no + valid VBI data was found, then the type field is set to 0 on return. */ +#define VIDIOC_INT_DECODE_VBI_LINE _IOWR('d', 104, struct v4l2_decode_vbi_line) + +/* Used to generate VBI signals on a video signal. v4l2_sliced_vbi_data is + filled with the data packets that should be output. Note that if you set + the line field to 0, then that VBI signal is disabled. */ +#define VIDIOC_INT_S_VBI_DATA _IOW ('d', 105, struct v4l2_sliced_vbi_data) + +/* Used to obtain the sliced VBI packet from a readback register. Not all + video decoders support this. If no data is available because the readback + register contains invalid or erroneous data -EIO is returned. Note that + you must fill in the 'id' member and the 'field' member (to determine + whether CC data from the first or second field should be obtained). */ +#define VIDIOC_INT_G_VBI_DATA _IOWR('d', 106, struct v4l2_sliced_vbi_data *) + +/* Returns the chip identifier or V4L2_IDENT_UNKNOWN if no identification can + be made. */ +#define VIDIOC_INT_G_CHIP_IDENT _IOR ('d', 107, enum v4l2_chip_ident *) + +#endif /* V4L2_COMMON_H_ */ diff --git a/include/media/video-buf.h b/include/media/video-buf.h index ae8d7a000440..8ecfd78e0027 100644 --- a/include/media/video-buf.h +++ b/include/media/video-buf.h @@ -17,7 +17,7 @@ * (at your option) any later version. */ -#include <linux/videodev.h> +#include <linux/videodev2.h> #define UNSET (-1U) @@ -177,7 +177,7 @@ struct videobuf_queue_ops { }; struct videobuf_queue { - struct semaphore lock; + struct semaphore lock; spinlock_t *irqlock; struct pci_dev *pci; diff --git a/include/mtd/inftl-user.h b/include/mtd/inftl-user.h index bda4f2c8f728..9b1e2526b45e 100644 --- a/include/mtd/inftl-user.h +++ b/include/mtd/inftl-user.h @@ -1,7 +1,7 @@ /* - * $Id: inftl-user.h,v 1.1 2004/05/05 15:17:00 dwmw2 Exp $ + * $Id: inftl-user.h,v 1.2 2005/11/07 11:14:56 gleixner Exp $ * - * Parts of INFTL headers shared with userspace + * Parts of INFTL headers shared with userspace * */ diff --git a/include/mtd/mtd-abi.h b/include/mtd/mtd-abi.h index 428d9122940b..b5994ea56a5a 100644 --- a/include/mtd/mtd-abi.h +++ b/include/mtd/mtd-abi.h @@ -1,7 +1,7 @@ /* - * $Id: mtd-abi.h,v 1.11 2005/05/19 16:08:58 gleixner Exp $ + * $Id: mtd-abi.h,v 1.13 2005/11/07 11:14:56 gleixner Exp $ * - * Portions of MTD ABI definition which are shared by kernel and user space + * Portions of MTD ABI definition which are shared by kernel and user space */ #ifndef __MTD_ABI_H__ @@ -42,6 +42,7 @@ struct mtd_oob_buf { #define MTD_OOB 64 // Out-of-band data (NAND flash) #define MTD_ECC 128 // Device capable of automatic ECC #define MTD_NO_VIRTBLOCKS 256 // Virtual blocks not allowed +#define MTD_PROGRAM_REGIONS 512 // Configurable Programming Regions // Some common devices / combinations of capabilities #define MTD_CAP_ROM 0 @@ -80,7 +81,7 @@ struct mtd_info_user { }; struct region_info_user { - uint32_t offset; /* At which this region starts, + uint32_t offset; /* At which this region starts, * from the beginning of the MTD */ uint32_t erasesize; /* For this region */ uint32_t numblocks; /* Number of blocks in this region */ diff --git a/include/mtd/nftl-user.h b/include/mtd/nftl-user.h index 924ec0459e9c..b2bca18e7311 100644 --- a/include/mtd/nftl-user.h +++ b/include/mtd/nftl-user.h @@ -1,7 +1,7 @@ /* - * $Id: nftl-user.h,v 1.1 2004/05/05 14:44:57 dwmw2 Exp $ + * $Id: nftl-user.h,v 1.2 2005/11/07 11:14:56 gleixner Exp $ * - * Parts of NFTL headers shared with userspace + * Parts of NFTL headers shared with userspace * */ diff --git a/include/net/ax25.h b/include/net/ax25.h index 9dbcd9e51c00..2250a18b0cbb 100644 --- a/include/net/ax25.h +++ b/include/net/ax25.h @@ -171,7 +171,7 @@ typedef struct { ax25_address calls[AX25_MAX_DIGIS]; unsigned char repeated[AX25_MAX_DIGIS]; unsigned char ndigi; - char lastrepeat; + signed char lastrepeat; } ax25_digi; typedef struct ax25_route { @@ -237,8 +237,7 @@ typedef struct ax25_cb { static __inline__ void ax25_cb_put(ax25_cb *ax25) { if (atomic_dec_and_test(&ax25->refcount)) { - if (ax25->digipeat) - kfree(ax25->digipeat); + kfree(ax25->digipeat); kfree(ax25); } } diff --git a/include/net/bluetooth/bluetooth.h b/include/net/bluetooth/bluetooth.h index 6dfa4a61ffd0..911ceb5cd263 100644 --- a/include/net/bluetooth/bluetooth.h +++ b/include/net/bluetooth/bluetooth.h @@ -57,8 +57,6 @@ #define BT_DBG(fmt, arg...) printk(KERN_INFO "%s: " fmt "\n" , __FUNCTION__ , ## arg) #define BT_ERR(fmt, arg...) printk(KERN_ERR "%s: " fmt "\n" , __FUNCTION__ , ## arg) -extern struct proc_dir_entry *proc_bt; - /* Connection and socket states */ enum { BT_CONNECTED = 1, /* Equal to TCP_ESTABLISHED to make net code happy */ @@ -136,7 +134,7 @@ struct bt_skb_cb { }; #define bt_cb(skb) ((struct bt_skb_cb *)(skb->cb)) -static inline struct sk_buff *bt_skb_alloc(unsigned int len, unsigned int __nocast how) +static inline struct sk_buff *bt_skb_alloc(unsigned int len, gfp_t how) { struct sk_buff *skb; @@ -171,4 +169,12 @@ static inline int skb_frags_no(struct sk_buff *skb) int bt_err(__u16 code); +extern int hci_sock_init(void); +extern int hci_sock_cleanup(void); + +extern int bt_sysfs_init(void); +extern void bt_sysfs_cleanup(void); + +extern struct class bt_class; + #endif /* __BLUETOOTH_H */ diff --git a/include/net/bluetooth/hci.h b/include/net/bluetooth/hci.h index fa2d12b0579b..b06a2d2f63d2 100644 --- a/include/net/bluetooth/hci.h +++ b/include/net/bluetooth/hci.h @@ -184,10 +184,10 @@ enum { struct hci_rp_read_loc_version { __u8 status; __u8 hci_ver; - __u16 hci_rev; + __le16 hci_rev; __u8 lmp_ver; - __u16 manufacturer; - __u16 lmp_subver; + __le16 manufacturer; + __le16 lmp_subver; } __attribute__ ((packed)); #define OCF_READ_LOCAL_FEATURES 0x0003 @@ -199,10 +199,10 @@ struct hci_rp_read_loc_features { #define OCF_READ_BUFFER_SIZE 0x0005 struct hci_rp_read_buffer_size { __u8 status; - __u16 acl_mtu; + __le16 acl_mtu; __u8 sco_mtu; - __u16 acl_max_pkt; - __u16 sco_max_pkt; + __le16 acl_max_pkt; + __le16 sco_max_pkt; } __attribute__ ((packed)); #define OCF_READ_BD_ADDR 0x0009 @@ -267,21 +267,21 @@ struct hci_cp_write_dev_class { #define OCF_READ_VOICE_SETTING 0x0025 struct hci_rp_read_voice_setting { - __u8 status; - __u16 voice_setting; + __u8 status; + __le16 voice_setting; } __attribute__ ((packed)); #define OCF_WRITE_VOICE_SETTING 0x0026 struct hci_cp_write_voice_setting { - __u16 voice_setting; + __le16 voice_setting; } __attribute__ ((packed)); #define OCF_HOST_BUFFER_SIZE 0x0033 struct hci_cp_host_buffer_size { - __u16 acl_mtu; + __le16 acl_mtu; __u8 sco_mtu; - __u16 acl_max_pkt; - __u16 sco_max_pkt; + __le16 acl_max_pkt; + __le16 sco_max_pkt; } __attribute__ ((packed)); /* Link Control */ @@ -289,10 +289,10 @@ struct hci_cp_host_buffer_size { #define OCF_CREATE_CONN 0x0005 struct hci_cp_create_conn { bdaddr_t bdaddr; - __u16 pkt_type; + __le16 pkt_type; __u8 pscan_rep_mode; __u8 pscan_mode; - __u16 clock_offset; + __le16 clock_offset; __u8 role_switch; } __attribute__ ((packed)); @@ -310,14 +310,14 @@ struct hci_cp_reject_conn_req { #define OCF_DISCONNECT 0x0006 struct hci_cp_disconnect { - __u16 handle; + __le16 handle; __u8 reason; } __attribute__ ((packed)); #define OCF_ADD_SCO 0x0007 struct hci_cp_add_sco { - __u16 handle; - __u16 pkt_type; + __le16 handle; + __le16 pkt_type; } __attribute__ ((packed)); #define OCF_INQUIRY 0x0001 @@ -354,56 +354,56 @@ struct hci_cp_pin_code_neg_reply { #define OCF_CHANGE_CONN_PTYPE 0x000F struct hci_cp_change_conn_ptype { - __u16 handle; - __u16 pkt_type; + __le16 handle; + __le16 pkt_type; } __attribute__ ((packed)); #define OCF_AUTH_REQUESTED 0x0011 struct hci_cp_auth_requested { - __u16 handle; + __le16 handle; } __attribute__ ((packed)); #define OCF_SET_CONN_ENCRYPT 0x0013 struct hci_cp_set_conn_encrypt { - __u16 handle; + __le16 handle; __u8 encrypt; } __attribute__ ((packed)); #define OCF_CHANGE_CONN_LINK_KEY 0x0015 struct hci_cp_change_conn_link_key { - __u16 handle; + __le16 handle; } __attribute__ ((packed)); #define OCF_READ_REMOTE_FEATURES 0x001B struct hci_cp_read_rmt_features { - __u16 handle; + __le16 handle; } __attribute__ ((packed)); #define OCF_READ_REMOTE_VERSION 0x001D struct hci_cp_read_rmt_version { - __u16 handle; + __le16 handle; } __attribute__ ((packed)); /* Link Policy */ #define OGF_LINK_POLICY 0x02 #define OCF_ROLE_DISCOVERY 0x0009 struct hci_cp_role_discovery { - __u16 handle; + __le16 handle; } __attribute__ ((packed)); struct hci_rp_role_discovery { __u8 status; - __u16 handle; + __le16 handle; __u8 role; } __attribute__ ((packed)); #define OCF_READ_LINK_POLICY 0x000C struct hci_cp_read_link_policy { - __u16 handle; + __le16 handle; } __attribute__ ((packed)); struct hci_rp_read_link_policy { __u8 status; - __u16 handle; - __u16 policy; + __le16 handle; + __le16 policy; } __attribute__ ((packed)); #define OCF_SWITCH_ROLE 0x000B @@ -414,12 +414,12 @@ struct hci_cp_switch_role { #define OCF_WRITE_LINK_POLICY 0x000D struct hci_cp_write_link_policy { - __u16 handle; - __u16 policy; + __le16 handle; + __le16 policy; } __attribute__ ((packed)); struct hci_rp_write_link_policy { __u8 status; - __u16 handle; + __le16 handle; } __attribute__ ((packed)); /* Status params */ @@ -441,7 +441,7 @@ struct inquiry_info { __u8 pscan_period_mode; __u8 pscan_mode; __u8 dev_class[3]; - __u16 clock_offset; + __le16 clock_offset; } __attribute__ ((packed)); #define HCI_EV_INQUIRY_RESULT_WITH_RSSI 0x22 @@ -450,7 +450,7 @@ struct inquiry_info_with_rssi { __u8 pscan_rep_mode; __u8 pscan_period_mode; __u8 dev_class[3]; - __u16 clock_offset; + __le16 clock_offset; __s8 rssi; } __attribute__ ((packed)); struct inquiry_info_with_rssi_and_pscan_mode { @@ -459,7 +459,7 @@ struct inquiry_info_with_rssi_and_pscan_mode { __u8 pscan_period_mode; __u8 pscan_mode; __u8 dev_class[3]; - __u16 clock_offset; + __le16 clock_offset; __s8 rssi; } __attribute__ ((packed)); @@ -469,7 +469,7 @@ struct extended_inquiry_info { __u8 pscan_rep_mode; __u8 pscan_period_mode; __u8 dev_class[3]; - __u16 clock_offset; + __le16 clock_offset; __s8 rssi; __u8 data[240]; } __attribute__ ((packed)); @@ -477,7 +477,7 @@ struct extended_inquiry_info { #define HCI_EV_CONN_COMPLETE 0x03 struct hci_ev_conn_complete { __u8 status; - __u16 handle; + __le16 handle; bdaddr_t bdaddr; __u8 link_type; __u8 encr_mode; @@ -493,27 +493,27 @@ struct hci_ev_conn_request { #define HCI_EV_DISCONN_COMPLETE 0x05 struct hci_ev_disconn_complete { __u8 status; - __u16 handle; + __le16 handle; __u8 reason; } __attribute__ ((packed)); #define HCI_EV_AUTH_COMPLETE 0x06 struct hci_ev_auth_complete { __u8 status; - __u16 handle; + __le16 handle; } __attribute__ ((packed)); #define HCI_EV_ENCRYPT_CHANGE 0x08 struct hci_ev_encrypt_change { __u8 status; - __u16 handle; + __le16 handle; __u8 encrypt; } __attribute__ ((packed)); #define HCI_EV_CHANGE_CONN_LINK_KEY_COMPLETE 0x09 struct hci_ev_change_conn_link_key_complete { __u8 status; - __u16 handle; + __le16 handle; } __attribute__ ((packed)); #define HCI_EV_QOS_SETUP_COMPLETE 0x0D @@ -526,21 +526,21 @@ struct hci_qos { } __attribute__ ((packed)); struct hci_ev_qos_setup_complete { __u8 status; - __u16 handle; + __le16 handle; struct hci_qos qos; } __attribute__ ((packed)); #define HCI_EV_CMD_COMPLETE 0x0E struct hci_ev_cmd_complete { __u8 ncmd; - __u16 opcode; + __le16 opcode; } __attribute__ ((packed)); #define HCI_EV_CMD_STATUS 0x0F struct hci_ev_cmd_status { __u8 status; __u8 ncmd; - __u16 opcode; + __le16 opcode; } __attribute__ ((packed)); #define HCI_EV_NUM_COMP_PKTS 0x13 @@ -559,9 +559,9 @@ struct hci_ev_role_change { #define HCI_EV_MODE_CHANGE 0x14 struct hci_ev_mode_change { __u8 status; - __u16 handle; + __le16 handle; __u8 mode; - __u16 interval; + __le16 interval; } __attribute__ ((packed)); #define HCI_EV_PIN_CODE_REQ 0x16 @@ -584,24 +584,24 @@ struct hci_ev_link_key_notify { #define HCI_EV_RMT_FEATURES 0x0B struct hci_ev_rmt_features { __u8 status; - __u16 handle; + __le16 handle; __u8 features[8]; } __attribute__ ((packed)); #define HCI_EV_RMT_VERSION 0x0C struct hci_ev_rmt_version { __u8 status; - __u16 handle; + __le16 handle; __u8 lmp_ver; - __u16 manufacturer; - __u16 lmp_subver; + __le16 manufacturer; + __le16 lmp_subver; } __attribute__ ((packed)); #define HCI_EV_CLOCK_OFFSET 0x01C struct hci_ev_clock_offset { __u8 status; - __u16 handle; - __u16 clock_offset; + __le16 handle; + __le16 clock_offset; } __attribute__ ((packed)); #define HCI_EV_PSCAN_REP_MODE 0x20 @@ -638,7 +638,7 @@ struct hci_ev_si_security { #define HCI_SCO_HDR_SIZE 3 struct hci_command_hdr { - __u16 opcode; /* OCF & OGF */ + __le16 opcode; /* OCF & OGF */ __u8 plen; } __attribute__ ((packed)); @@ -648,22 +648,22 @@ struct hci_event_hdr { } __attribute__ ((packed)); struct hci_acl_hdr { - __u16 handle; /* Handle & Flags(PB, BC) */ - __u16 dlen; + __le16 handle; /* Handle & Flags(PB, BC) */ + __le16 dlen; } __attribute__ ((packed)); struct hci_sco_hdr { - __u16 handle; + __le16 handle; __u8 dlen; } __attribute__ ((packed)); /* Command opcode pack/unpack */ -#define hci_opcode_pack(ogf, ocf) (__u16)((ocf & 0x03ff)|(ogf << 10)) +#define hci_opcode_pack(ogf, ocf) (__u16) ((ocf & 0x03ff)|(ogf << 10)) #define hci_opcode_ogf(op) (op >> 10) #define hci_opcode_ocf(op) (op & 0x03ff) /* ACL handle and flags pack/unpack */ -#define hci_handle_pack(h, f) (__u16)((h & 0x0fff)|(f << 12)) +#define hci_handle_pack(h, f) (__u16) ((h & 0x0fff)|(f << 12)) #define hci_handle(h) (h & 0x0fff) #define hci_flags(h) (h >> 12) diff --git a/include/net/bluetooth/hci_core.h b/include/net/bluetooth/hci_core.h index 7f933f302078..bb9f81dc8723 100644 --- a/include/net/bluetooth/hci_core.h +++ b/include/net/bluetooth/hci_core.h @@ -25,7 +25,6 @@ #ifndef __HCI_CORE_H #define __HCI_CORE_H -#include <linux/proc_fs.h> #include <net/bluetooth/hci.h> /* HCI upper protocols */ @@ -34,8 +33,6 @@ #define HCI_INIT_TIMEOUT (HZ * 10) -extern struct proc_dir_entry *proc_bt_hci; - /* HCI Core structures */ struct inquiry_data { @@ -44,7 +41,7 @@ struct inquiry_data { __u8 pscan_period_mode; __u8 pscan_mode; __u8 dev_class[3]; - __u16 clock_offset; + __le16 clock_offset; __s8 rssi; }; @@ -126,10 +123,6 @@ struct hci_dev { atomic_t promisc; -#ifdef CONFIG_PROC_FS - struct proc_dir_entry *proc; -#endif - struct class_device class_dev; struct module *owner; diff --git a/include/net/bluetooth/rfcomm.h b/include/net/bluetooth/rfcomm.h index ffea9d54071f..bbfac86734ec 100644 --- a/include/net/bluetooth/rfcomm.h +++ b/include/net/bluetooth/rfcomm.h @@ -230,7 +230,7 @@ int rfcomm_send_rpn(struct rfcomm_session *s, int cr, u8 dlci, u8 xon_char, u8 xoff_char, u16 param_mask); /* ---- RFCOMM DLCs (channels) ---- */ -struct rfcomm_dlc *rfcomm_dlc_alloc(unsigned int __nocast prio); +struct rfcomm_dlc *rfcomm_dlc_alloc(gfp_t prio); void rfcomm_dlc_free(struct rfcomm_dlc *d); int rfcomm_dlc_open(struct rfcomm_dlc *d, bdaddr_t *src, bdaddr_t *dst, u8 channel); int rfcomm_dlc_close(struct rfcomm_dlc *d, int reason); @@ -275,9 +275,6 @@ static inline void rfcomm_session_hold(struct rfcomm_session *s) atomic_inc(&s->refcnt); } -/* ---- RFCOMM chechsum ---- */ -extern u8 rfcomm_crc_table[]; - /* ---- RFCOMM sockets ---- */ struct sockaddr_rc { sa_family_t rc_family; @@ -354,6 +351,4 @@ int rfcomm_dev_ioctl(struct sock *sk, unsigned int cmd, void __user *arg); int rfcomm_init_ttys(void); void rfcomm_cleanup_ttys(void); -extern struct proc_dir_entry *proc_bt_rfcomm; - #endif /* __RFCOMM_H */ diff --git a/include/net/dn_nsp.h b/include/net/dn_nsp.h index 6bbeafa73e8b..1ba03be0af3a 100644 --- a/include/net/dn_nsp.h +++ b/include/net/dn_nsp.h @@ -19,9 +19,9 @@ extern void dn_nsp_send_data_ack(struct sock *sk); extern void dn_nsp_send_oth_ack(struct sock *sk); extern void dn_nsp_delayed_ack(struct sock *sk); extern void dn_send_conn_ack(struct sock *sk); -extern void dn_send_conn_conf(struct sock *sk, int gfp); +extern void dn_send_conn_conf(struct sock *sk, gfp_t gfp); extern void dn_nsp_send_disc(struct sock *sk, unsigned char type, - unsigned short reason, int gfp); + unsigned short reason, gfp_t gfp); extern void dn_nsp_return_disc(struct sk_buff *skb, unsigned char type, unsigned short reason); extern void dn_nsp_send_link(struct sock *sk, unsigned char lsflags, char fcval); @@ -29,14 +29,14 @@ extern void dn_nsp_send_conninit(struct sock *sk, unsigned char flags); extern void dn_nsp_output(struct sock *sk); extern int dn_nsp_check_xmit_queue(struct sock *sk, struct sk_buff *skb, struct sk_buff_head *q, unsigned short acknum); -extern void dn_nsp_queue_xmit(struct sock *sk, struct sk_buff *skb, int gfp, int oob); +extern void dn_nsp_queue_xmit(struct sock *sk, struct sk_buff *skb, gfp_t gfp, int oob); extern unsigned long dn_nsp_persist(struct sock *sk); extern int dn_nsp_xmit_timeout(struct sock *sk); extern int dn_nsp_rx(struct sk_buff *); extern int dn_nsp_backlog_rcv(struct sock *sk, struct sk_buff *skb); -extern struct sk_buff *dn_alloc_skb(struct sock *sk, int size, int pri); +extern struct sk_buff *dn_alloc_skb(struct sock *sk, int size, gfp_t pri); extern struct sk_buff *dn_alloc_send_skb(struct sock *sk, size_t *size, int noblock, long timeo, int *err); #define NSP_REASON_OK 0 /* No error */ diff --git a/include/net/dn_route.h b/include/net/dn_route.h index d084721db198..5122da3f2eb3 100644 --- a/include/net/dn_route.h +++ b/include/net/dn_route.h @@ -15,7 +15,7 @@ GNU General Public License for more details. *******************************************************************************/ -extern struct sk_buff *dn_alloc_skb(struct sock *sk, int size, int pri); +extern struct sk_buff *dn_alloc_skb(struct sock *sk, int size, gfp_t pri); extern int dn_route_output_sock(struct dst_entry **pprt, struct flowi *, struct sock *sk, int flags); extern int dn_cache_dump(struct sk_buff *skb, struct netlink_callback *cb); extern int dn_cache_getroute(struct sk_buff *skb, struct nlmsghdr *nlh, void *arg); diff --git a/include/net/dst.h b/include/net/dst.h index 4a056a682435..6c196a5baf24 100644 --- a/include/net/dst.h +++ b/include/net/dst.h @@ -94,7 +94,6 @@ struct dst_ops struct dst_entry * (*negative_advice)(struct dst_entry *); void (*link_failure)(struct sk_buff *); void (*update_pmtu)(struct dst_entry *dst, u32 mtu); - int (*get_mss)(struct dst_entry *dst, u32 mtu); int entry_size; atomic_t entries; diff --git a/include/net/genetlink.h b/include/net/genetlink.h new file mode 100644 index 000000000000..52d8b1a73d52 --- /dev/null +++ b/include/net/genetlink.h @@ -0,0 +1,154 @@ +#ifndef __NET_GENERIC_NETLINK_H +#define __NET_GENERIC_NETLINK_H + +#include <linux/genetlink.h> +#include <net/netlink.h> + +/** + * struct genl_family - generic netlink family + * @id: protocol family idenfitier + * @hdrsize: length of user specific header in bytes + * @name: name of family + * @version: protocol version + * @maxattr: maximum number of attributes supported + * @attrbuf: buffer to store parsed attributes + * @ops_list: list of all assigned operations + * @family_list: family list + */ +struct genl_family +{ + unsigned int id; + unsigned int hdrsize; + char name[GENL_NAMSIZ]; + unsigned int version; + unsigned int maxattr; + struct module * owner; + struct nlattr ** attrbuf; /* private */ + struct list_head ops_list; /* private */ + struct list_head family_list; /* private */ +}; + +#define GENL_ADMIN_PERM 0x01 + +/** + * struct genl_info - receiving information + * @snd_seq: sending sequence number + * @snd_pid: netlink pid of sender + * @nlhdr: netlink message header + * @genlhdr: generic netlink message header + * @userhdr: user specific header + * @attrs: netlink attributes + */ +struct genl_info +{ + u32 snd_seq; + u32 snd_pid; + struct nlmsghdr * nlhdr; + struct genlmsghdr * genlhdr; + void * userhdr; + struct nlattr ** attrs; +}; + +/** + * struct genl_ops - generic netlink operations + * @cmd: command identifier + * @flags: flags + * @policy: attribute validation policy + * @doit: standard command callback + * @dumpit: callback for dumpers + * @ops_list: operations list + */ +struct genl_ops +{ + unsigned int cmd; + unsigned int flags; + struct nla_policy *policy; + int (*doit)(struct sk_buff *skb, + struct genl_info *info); + int (*dumpit)(struct sk_buff *skb, + struct netlink_callback *cb); + struct list_head ops_list; +}; + +extern int genl_register_family(struct genl_family *family); +extern int genl_unregister_family(struct genl_family *family); +extern int genl_register_ops(struct genl_family *, struct genl_ops *ops); +extern int genl_unregister_ops(struct genl_family *, struct genl_ops *ops); + +extern struct sock *genl_sock; + +/** + * genlmsg_put - Add generic netlink header to netlink message + * @skb: socket buffer holding the message + * @pid: netlink pid the message is addressed to + * @seq: sequence number (usually the one of the sender) + * @type: netlink message type + * @hdrlen: length of the user specific header + * @flags netlink message flags + * @cmd: generic netlink command + * @version: version + * + * Returns pointer to user specific header + */ +static inline void *genlmsg_put(struct sk_buff *skb, u32 pid, u32 seq, + int type, int hdrlen, int flags, + u8 cmd, u8 version) +{ + struct nlmsghdr *nlh; + struct genlmsghdr *hdr; + + nlh = nlmsg_put(skb, pid, seq, type, GENL_HDRLEN + hdrlen, flags); + if (nlh == NULL) + return NULL; + + hdr = nlmsg_data(nlh); + hdr->cmd = cmd; + hdr->version = version; + hdr->reserved = 0; + + return (char *) hdr + GENL_HDRLEN; +} + +/** + * genlmsg_end - Finalize a generic netlink message + * @skb: socket buffer the message is stored in + * @hdr: user specific header + */ +static inline int genlmsg_end(struct sk_buff *skb, void *hdr) +{ + return nlmsg_end(skb, hdr - GENL_HDRLEN - NLMSG_HDRLEN); +} + +/** + * genlmsg_cancel - Cancel construction of a generic netlink message + * @skb: socket buffer the message is stored in + * @hdr: generic netlink message header + */ +static inline int genlmsg_cancel(struct sk_buff *skb, void *hdr) +{ + return nlmsg_cancel(skb, hdr - GENL_HDRLEN - NLMSG_HDRLEN); +} + +/** + * genlmsg_multicast - multicast a netlink message + * @skb: netlink message as socket buffer + * @pid: own netlink pid to avoid sending to yourself + * @group: multicast group id + */ +static inline int genlmsg_multicast(struct sk_buff *skb, u32 pid, + unsigned int group) +{ + return nlmsg_multicast(genl_sock, skb, pid, group); +} + +/** + * genlmsg_unicast - unicast a netlink message + * @skb: netlink message as socket buffer + * @pid: netlink pid of the destination socket + */ +static inline int genlmsg_unicast(struct sk_buff *skb, u32 pid) +{ + return nlmsg_unicast(genl_sock, skb, pid); +} + +#endif /* __NET_GENERIC_NETLINK_H */ diff --git a/include/net/ieee80211.h b/include/net/ieee80211.h index dc36b1be6745..cde2f4f4f501 100644 --- a/include/net/ieee80211.h +++ b/include/net/ieee80211.h @@ -11,19 +11,26 @@ * * Adaption to a generic IEEE 802.11 stack by James Ketrenos * <jketreno@linux.intel.com> - * Copyright (c) 2004, Intel Corporation + * Copyright (c) 2004-2005, Intel Corporation * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. See README and COPYING for * more details. + * + * API Version History + * 1.0.x -- Initial version + * 1.1.x -- Added radiotap, QoS, TIM, ieee80211_geo APIs, + * various structure changes, and crypto API init method */ #ifndef IEEE80211_H #define IEEE80211_H -#include <linux/if_ether.h> /* ETH_ALEN */ -#include <linux/kernel.h> /* ARRAY_SIZE */ +#include <linux/if_ether.h> /* ETH_ALEN */ +#include <linux/kernel.h> /* ARRAY_SIZE */ #include <linux/wireless.h> +#define IEEE80211_VERSION "git-1.1.7" + #define IEEE80211_DATA_LEN 2304 /* Maximum size for the MA-UNITDATA primitive, 802.11 standard section 6.2.1.1.2. @@ -33,34 +40,13 @@ represents the 2304 bytes of real data, plus a possible 8 bytes of WEP IV and ICV. (this interpretation suggested by Ramiro Barreiro) */ - -#define IEEE80211_HLEN 30 -#define IEEE80211_FRAME_LEN (IEEE80211_DATA_LEN + IEEE80211_HLEN) - -struct ieee80211_hdr { - __le16 frame_ctl; - __le16 duration_id; - u8 addr1[ETH_ALEN]; - u8 addr2[ETH_ALEN]; - u8 addr3[ETH_ALEN]; - __le16 seq_ctl; - u8 addr4[ETH_ALEN]; -} __attribute__ ((packed)); - -struct ieee80211_hdr_3addr { - __le16 frame_ctl; - __le16 duration_id; - u8 addr1[ETH_ALEN]; - u8 addr2[ETH_ALEN]; - u8 addr3[ETH_ALEN]; - __le16 seq_ctl; -} __attribute__ ((packed)); - #define IEEE80211_1ADDR_LEN 10 #define IEEE80211_2ADDR_LEN 16 #define IEEE80211_3ADDR_LEN 24 #define IEEE80211_4ADDR_LEN 30 #define IEEE80211_FCS_LEN 4 +#define IEEE80211_HLEN (IEEE80211_4ADDR_LEN) +#define IEEE80211_FRAME_LEN (IEEE80211_DATA_LEN + IEEE80211_HLEN) #define MIN_FRAG_THRESHOLD 256U #define MAX_FRAG_THRESHOLD 2346U @@ -113,11 +99,11 @@ struct ieee80211_hdr_3addr { #define IEEE80211_STYPE_CFACK 0x0050 #define IEEE80211_STYPE_CFPOLL 0x0060 #define IEEE80211_STYPE_CFACKPOLL 0x0070 +#define IEEE80211_STYPE_QOS_DATA 0x0080 #define IEEE80211_SCTL_FRAG 0x000F #define IEEE80211_SCTL_SEQ 0xFFF0 - /* debug macros */ #ifdef CONFIG_IEEE80211_DEBUG @@ -128,8 +114,7 @@ do { if (ieee80211_debug_level & (level)) \ in_interrupt() ? 'I' : 'U', __FUNCTION__ , ## args); } while (0) #else #define IEEE80211_DEBUG(level, fmt, args...) do {} while (0) -#endif /* CONFIG_IEEE80211_DEBUG */ - +#endif /* CONFIG_IEEE80211_DEBUG */ /* debug macros not dependent on CONFIG_IEEE80211_DEBUG */ @@ -140,7 +125,6 @@ do { if (ieee80211_debug_level & (level)) \ * messages. It should never be used for passing essid to user space. */ const char *escape_essid(const char *essid, u8 essid_len); - /* * To use the debug system: * @@ -177,6 +161,7 @@ const char *escape_essid(const char *essid, u8 essid_len); #define IEEE80211_DL_TX (1<<8) #define IEEE80211_DL_RX (1<<9) +#define IEEE80211_DL_QOS (1<<31) #define IEEE80211_ERROR(f, a...) printk(KERN_ERR "ieee80211: " f, ## a) #define IEEE80211_WARNING(f, a...) printk(KERN_WARNING "ieee80211: " f, ## a) @@ -190,9 +175,10 @@ const char *escape_essid(const char *essid, u8 essid_len); #define IEEE80211_DEBUG_DROP(f, a...) IEEE80211_DEBUG(IEEE80211_DL_DROP, f, ## a) #define IEEE80211_DEBUG_TX(f, a...) IEEE80211_DEBUG(IEEE80211_DL_TX, f, ## a) #define IEEE80211_DEBUG_RX(f, a...) IEEE80211_DEBUG(IEEE80211_DL_RX, f, ## a) +#define IEEE80211_DEBUG_QOS(f, a...) IEEE80211_DEBUG(IEEE80211_DL_QOS, f, ## a) #include <linux/netdevice.h> #include <linux/wireless.h> -#include <linux/if_arp.h> /* ARPHRD_ETHER */ +#include <linux/if_arp.h> /* ARPHRD_ETHER */ #ifndef WIRELESS_SPY #define WIRELESS_SPY /* enable iwspy support */ @@ -200,10 +186,10 @@ const char *escape_essid(const char *essid, u8 essid_len); #include <net/iw_handler.h> /* new driver API */ #ifndef ETH_P_PAE -#define ETH_P_PAE 0x888E /* Port Access Entity (IEEE 802.1X) */ -#endif /* ETH_P_PAE */ +#define ETH_P_PAE 0x888E /* Port Access Entity (IEEE 802.1X) */ +#endif /* ETH_P_PAE */ -#define ETH_P_PREAUTH 0x88C7 /* IEEE 802.11i pre-authentication */ +#define ETH_P_PREAUTH 0x88C7 /* IEEE 802.11i pre-authentication */ #ifndef ETH_P_80211_RAW #define ETH_P_80211_RAW (ETH_P_ECONET + 1) @@ -215,10 +201,10 @@ const char *escape_essid(const char *essid, u8 essid_len); struct ieee80211_snap_hdr { - u8 dsap; /* always 0xAA */ - u8 ssap; /* always 0xAA */ - u8 ctrl; /* always 0x03 */ - u8 oui[P80211_OUI_LEN]; /* organizational universal id */ + u8 dsap; /* always 0xAA */ + u8 ssap; /* always 0xAA */ + u8 ctrl; /* always 0x03 */ + u8 oui[P80211_OUI_LEN]; /* organizational universal id */ } __attribute__ ((packed)); @@ -246,8 +232,9 @@ struct ieee80211_snap_hdr { #define WLAN_CAPABILITY_PBCC (1<<6) #define WLAN_CAPABILITY_CHANNEL_AGILITY (1<<7) #define WLAN_CAPABILITY_SPECTRUM_MGMT (1<<8) +#define WLAN_CAPABILITY_QOS (1<<9) #define WLAN_CAPABILITY_SHORT_SLOT_TIME (1<<10) -#define WLAN_CAPABILITY_OSSS_OFDM (1<<13) +#define WLAN_CAPABILITY_DSSS_OFDM (1<<13) /* Status codes */ enum ieee80211_statuscode { @@ -312,14 +299,12 @@ enum ieee80211_reasoncode { WLAN_REASON_CIPHER_SUITE_REJECTED = 24, }; - #define IEEE80211_STATMASK_SIGNAL (1<<0) #define IEEE80211_STATMASK_RSSI (1<<1) #define IEEE80211_STATMASK_NOISE (1<<2) #define IEEE80211_STATMASK_RATE (1<<3) #define IEEE80211_STATMASK_WEMASK 0x7 - #define IEEE80211_CCK_MODULATION (1<<0) #define IEEE80211_OFDM_MODULATION (1<<1) @@ -377,9 +362,6 @@ enum ieee80211_reasoncode { #define IEEE80211_NUM_CCK_RATES 4 #define IEEE80211_OFDM_SHIFT_MASK_A 4 - - - /* NOTE: This data is for statistical purposes; not all hardware provides this * information for frames received. Not setting these will not cause * any adverse affects. */ @@ -388,7 +370,7 @@ struct ieee80211_rx_stats { s8 rssi; u8 signal; u8 noise; - u16 rate; /* in 100 kbps */ + u16 rate; /* in 100 kbps */ u8 received_channel; u8 control; u8 mask; @@ -439,38 +421,44 @@ struct ieee80211_device; #include "ieee80211_crypt.h" -#define SEC_KEY_1 (1<<0) -#define SEC_KEY_2 (1<<1) -#define SEC_KEY_3 (1<<2) -#define SEC_KEY_4 (1<<3) -#define SEC_ACTIVE_KEY (1<<4) -#define SEC_AUTH_MODE (1<<5) -#define SEC_UNICAST_GROUP (1<<6) -#define SEC_LEVEL (1<<7) -#define SEC_ENABLED (1<<8) - -#define SEC_LEVEL_0 0 /* None */ -#define SEC_LEVEL_1 1 /* WEP 40 and 104 bit */ -#define SEC_LEVEL_2 2 /* Level 1 + TKIP */ -#define SEC_LEVEL_2_CKIP 3 /* Level 1 + CKIP */ -#define SEC_LEVEL_3 4 /* Level 2 + CCMP */ - -#define WEP_KEYS 4 -#define WEP_KEY_LEN 13 +#define SEC_KEY_1 (1<<0) +#define SEC_KEY_2 (1<<1) +#define SEC_KEY_3 (1<<2) +#define SEC_KEY_4 (1<<3) +#define SEC_ACTIVE_KEY (1<<4) +#define SEC_AUTH_MODE (1<<5) +#define SEC_UNICAST_GROUP (1<<6) +#define SEC_LEVEL (1<<7) +#define SEC_ENABLED (1<<8) +#define SEC_ENCRYPT (1<<9) + +#define SEC_LEVEL_0 0 /* None */ +#define SEC_LEVEL_1 1 /* WEP 40 and 104 bit */ +#define SEC_LEVEL_2 2 /* Level 1 + TKIP */ +#define SEC_LEVEL_2_CKIP 3 /* Level 1 + CKIP */ +#define SEC_LEVEL_3 4 /* Level 2 + CCMP */ + +#define SEC_ALG_NONE 0 +#define SEC_ALG_WEP 1 +#define SEC_ALG_TKIP 2 +#define SEC_ALG_CCMP 3 + +#define WEP_KEYS 4 +#define WEP_KEY_LEN 13 +#define SCM_KEY_LEN 32 +#define SCM_TEMPORAL_KEY_LENGTH 16 struct ieee80211_security { u16 active_key:2, - enabled:1, - auth_mode:2, - auth_algo:4, - unicast_uses_group:1; + enabled:1, + auth_mode:2, auth_algo:4, unicast_uses_group:1, encrypt:1; + u8 encode_alg[WEP_KEYS]; u8 key_sizes[WEP_KEYS]; - u8 keys[WEP_KEYS][WEP_KEY_LEN]; + u8 keys[WEP_KEYS][SCM_KEY_LEN]; u8 level; u16 flags; } __attribute__ ((packed)); - /* 802.11 data frame from AP @@ -494,7 +482,7 @@ enum ieee80211_mfie { MFIE_TYPE_RATES = 1, MFIE_TYPE_FH_SET = 2, MFIE_TYPE_DS_SET = 3, - MFIE_TYPE_CF_SET = 4, + MFIE_TYPE_CF_SET = 4, MFIE_TYPE_TIM = 5, MFIE_TYPE_IBSS_SET = 6, MFIE_TYPE_COUNTRY = 7, @@ -516,11 +504,75 @@ enum ieee80211_mfie { MFIE_TYPE_RSN = 48, MFIE_TYPE_RATES_EX = 50, MFIE_TYPE_GENERIC = 221, + MFIE_TYPE_QOS_PARAMETER = 222, }; -struct ieee80211_info_element_hdr { - u8 id; - u8 len; +/* Minimal header; can be used for passing 802.11 frames with sufficient + * information to determine what type of underlying data type is actually + * stored in the data. */ +struct ieee80211_hdr { + __le16 frame_ctl; + __le16 duration_id; + u8 payload[0]; +} __attribute__ ((packed)); + +struct ieee80211_hdr_1addr { + __le16 frame_ctl; + __le16 duration_id; + u8 addr1[ETH_ALEN]; + u8 payload[0]; +} __attribute__ ((packed)); + +struct ieee80211_hdr_2addr { + __le16 frame_ctl; + __le16 duration_id; + u8 addr1[ETH_ALEN]; + u8 addr2[ETH_ALEN]; + u8 payload[0]; +} __attribute__ ((packed)); + +struct ieee80211_hdr_3addr { + __le16 frame_ctl; + __le16 duration_id; + u8 addr1[ETH_ALEN]; + u8 addr2[ETH_ALEN]; + u8 addr3[ETH_ALEN]; + __le16 seq_ctl; + u8 payload[0]; +} __attribute__ ((packed)); + +struct ieee80211_hdr_4addr { + __le16 frame_ctl; + __le16 duration_id; + u8 addr1[ETH_ALEN]; + u8 addr2[ETH_ALEN]; + u8 addr3[ETH_ALEN]; + __le16 seq_ctl; + u8 addr4[ETH_ALEN]; + u8 payload[0]; +} __attribute__ ((packed)); + +struct ieee80211_hdr_3addrqos { + __le16 frame_ctl; + __le16 duration_id; + u8 addr1[ETH_ALEN]; + u8 addr2[ETH_ALEN]; + u8 addr3[ETH_ALEN]; + __le16 seq_ctl; + u8 payload[0]; + __le16 qos_ctl; +} __attribute__ ((packed)); + +struct ieee80211_hdr_4addrqos { + __le16 frame_ctl; + __le16 duration_id; + u8 addr1[ETH_ALEN]; + u8 addr2[ETH_ALEN]; + u8 addr3[ETH_ALEN]; + __le16 seq_ctl; + u8 addr4[ETH_ALEN]; + u8 payload[0]; + __le16 qos_ctl; } __attribute__ ((packed)); struct ieee80211_info_element { @@ -546,49 +598,77 @@ struct ieee80211_info_element { u16 status; */ -struct ieee80211_authentication { +struct ieee80211_auth { struct ieee80211_hdr_3addr header; __le16 algorithm; __le16 transaction; __le16 status; - struct ieee80211_info_element info_element; + /* challenge */ + struct ieee80211_info_element info_element[0]; } __attribute__ ((packed)); +struct ieee80211_disassoc { + struct ieee80211_hdr_3addr header; + __le16 reason; +} __attribute__ ((packed)); + +/* Alias deauth for disassoc */ +#define ieee80211_deauth ieee80211_disassoc + +struct ieee80211_probe_request { + struct ieee80211_hdr_3addr header; + /* SSID, supported rates */ + struct ieee80211_info_element info_element[0]; +} __attribute__ ((packed)); struct ieee80211_probe_response { struct ieee80211_hdr_3addr header; u32 time_stamp[2]; __le16 beacon_interval; __le16 capability; - struct ieee80211_info_element info_element; + /* SSID, supported rates, FH params, DS params, + * CF params, IBSS params, TIM (if beacon), RSN */ + struct ieee80211_info_element info_element[0]; } __attribute__ ((packed)); -struct ieee80211_assoc_request_frame { +/* Alias beacon for probe_response */ +#define ieee80211_beacon ieee80211_probe_response + +struct ieee80211_assoc_request { + struct ieee80211_hdr_3addr header; + __le16 capability; + __le16 listen_interval; + /* SSID, supported rates, RSN */ + struct ieee80211_info_element info_element[0]; +} __attribute__ ((packed)); + +struct ieee80211_reassoc_request { + struct ieee80211_hdr_3addr header; __le16 capability; __le16 listen_interval; u8 current_ap[ETH_ALEN]; - struct ieee80211_info_element info_element; + struct ieee80211_info_element info_element[0]; } __attribute__ ((packed)); -struct ieee80211_assoc_response_frame { +struct ieee80211_assoc_response { struct ieee80211_hdr_3addr header; __le16 capability; __le16 status; __le16 aid; - struct ieee80211_info_element info_element; /* supported rates */ + /* supported rates */ + struct ieee80211_info_element info_element[0]; } __attribute__ ((packed)); - struct ieee80211_txb { u8 nr_frags; u8 encrypted; - u16 reserved; - u16 frag_size; - u16 payload_size; + u8 rts_included; + u8 reserved; + __le16 frag_size; + __le16 payload_size; struct sk_buff *fragments[0]; }; - /* SWEEP TABLE ENTRIES NUMBER */ #define MAX_SWEEP_TAB_ENTRIES 42 #define MAX_SWEEP_TAB_ENTRIES_PER_PACKET 7 @@ -604,9 +684,68 @@ struct ieee80211_txb { #define MAX_WPA_IE_LEN 64 -#define NETWORK_EMPTY_ESSID (1<<0) -#define NETWORK_HAS_OFDM (1<<1) -#define NETWORK_HAS_CCK (1<<2) +#define NETWORK_EMPTY_ESSID (1<<0) +#define NETWORK_HAS_OFDM (1<<1) +#define NETWORK_HAS_CCK (1<<2) + +/* QoS structure */ +#define NETWORK_HAS_QOS_PARAMETERS (1<<3) +#define NETWORK_HAS_QOS_INFORMATION (1<<4) +#define NETWORK_HAS_QOS_MASK (NETWORK_HAS_QOS_PARAMETERS | NETWORK_HAS_QOS_INFORMATION) + +#define QOS_QUEUE_NUM 4 +#define QOS_OUI_LEN 3 +#define QOS_OUI_TYPE 2 +#define QOS_ELEMENT_ID 221 +#define QOS_OUI_INFO_SUB_TYPE 0 +#define QOS_OUI_PARAM_SUB_TYPE 1 +#define QOS_VERSION_1 1 +#define QOS_AIFSN_MIN_VALUE 2 + +struct ieee80211_qos_information_element { + u8 elementID; + u8 length; + u8 qui[QOS_OUI_LEN]; + u8 qui_type; + u8 qui_subtype; + u8 version; + u8 ac_info; +} __attribute__ ((packed)); + +struct ieee80211_qos_ac_parameter { + u8 aci_aifsn; + u8 ecw_min_max; + __le16 tx_op_limit; +} __attribute__ ((packed)); + +struct ieee80211_qos_parameter_info { + struct ieee80211_qos_information_element info_element; + u8 reserved; + struct ieee80211_qos_ac_parameter ac_params_record[QOS_QUEUE_NUM]; +} __attribute__ ((packed)); + +struct ieee80211_qos_parameters { + __le16 cw_min[QOS_QUEUE_NUM]; + __le16 cw_max[QOS_QUEUE_NUM]; + u8 aifs[QOS_QUEUE_NUM]; + u8 flag[QOS_QUEUE_NUM]; + __le16 tx_op_limit[QOS_QUEUE_NUM]; +} __attribute__ ((packed)); + +struct ieee80211_qos_data { + struct ieee80211_qos_parameters parameters; + int active; + int supported; + u8 param_count; + u8 old_param_count; +}; + +struct ieee80211_tim_parameters { + u8 tim_count; + u8 tim_period; +} __attribute__ ((packed)); + +/*******************************************************/ struct ieee80211_network { /* These entries are used to identify a unique network */ @@ -616,6 +755,8 @@ struct ieee80211_network { u8 ssid[IW_ESSID_MAX_SIZE + 1]; u8 ssid_len; + struct ieee80211_qos_data qos_data; + /* These are network statistics */ struct ieee80211_rx_stats stats; u16 capability; @@ -631,10 +772,12 @@ struct ieee80211_network { u16 beacon_interval; u16 listen_interval; u16 atim_window; + u8 erp_value; u8 wpa_ie[MAX_WPA_IE_LEN]; size_t wpa_ie_len; u8 rsn_ie[MAX_WPA_IE_LEN]; size_t rsn_ie_len; + struct ieee80211_tim_parameters tim; struct list_head list; }; @@ -651,17 +794,52 @@ enum ieee80211_state { #define DEFAULT_MAX_SCAN_AGE (15 * HZ) #define DEFAULT_FTS 2346 - #define CFG_IEEE80211_RESERVE_FCS (1<<0) #define CFG_IEEE80211_COMPUTE_FCS (1<<1) +#define CFG_IEEE80211_RTS (1<<2) + +#define IEEE80211_24GHZ_MIN_CHANNEL 1 +#define IEEE80211_24GHZ_MAX_CHANNEL 14 +#define IEEE80211_24GHZ_CHANNELS 14 + +#define IEEE80211_52GHZ_MIN_CHANNEL 36 +#define IEEE80211_52GHZ_MAX_CHANNEL 165 +#define IEEE80211_52GHZ_CHANNELS 32 + +enum { + IEEE80211_CH_PASSIVE_ONLY = (1 << 0), + IEEE80211_CH_B_ONLY = (1 << 2), + IEEE80211_CH_NO_IBSS = (1 << 3), + IEEE80211_CH_UNIFORM_SPREADING = (1 << 4), + IEEE80211_CH_RADAR_DETECT = (1 << 5), + IEEE80211_CH_INVALID = (1 << 6), +}; + +struct ieee80211_channel { + u32 freq; + u8 channel; + u8 flags; + u8 max_power; +}; + +struct ieee80211_geo { + u8 name[4]; + u8 bg_channels; + u8 a_channels; + struct ieee80211_channel bg[IEEE80211_24GHZ_CHANNELS]; + struct ieee80211_channel a[IEEE80211_52GHZ_CHANNELS]; +}; struct ieee80211_device { struct net_device *dev; + struct ieee80211_security sec; /* Bookkeeping structures */ struct net_device_stats stats; struct ieee80211_stats ieee_stats; + struct ieee80211_geo geo; + /* Probe / Beacon management */ struct list_head network_free_list; struct list_head network_list; @@ -669,62 +847,102 @@ struct ieee80211_device { int scans; int scan_age; - int iw_mode; /* operating mode (IW_MODE_*) */ + int iw_mode; /* operating mode (IW_MODE_*) */ + struct iw_spy_data spy_data; /* iwspy support */ spinlock_t lock; - int tx_headroom; /* Set to size of any additional room needed at front - * of allocated Tx SKBs */ + int tx_headroom; /* Set to size of any additional room needed at front + * of allocated Tx SKBs */ u32 config; /* WEP and other encryption related settings at the device level */ - int open_wep; /* Set to 1 to allow unencrypted frames */ + int open_wep; /* Set to 1 to allow unencrypted frames */ - int reset_on_keychange; /* Set to 1 if the HW needs to be reset on + int reset_on_keychange; /* Set to 1 if the HW needs to be reset on * WEP key changes */ /* If the host performs {en,de}cryption, then set to 1 */ int host_encrypt; + int host_encrypt_msdu; int host_decrypt; - int ieee802_1x; /* is IEEE 802.1X used */ + /* host performs multicast decryption */ + int host_mc_decrypt; + + int host_open_frag; + int host_build_iv; + int ieee802_1x; /* is IEEE 802.1X used */ /* WPA data */ int wpa_enabled; int drop_unencrypted; - int tkip_countermeasures; int privacy_invoked; size_t wpa_ie_len; u8 *wpa_ie; struct list_head crypt_deinit_list; struct ieee80211_crypt_data *crypt[WEP_KEYS]; - int tx_keyidx; /* default TX key index (crypt[tx_keyidx]) */ + int tx_keyidx; /* default TX key index (crypt[tx_keyidx]) */ struct timer_list crypt_deinit_timer; + int crypt_quiesced; - int bcrx_sta_key; /* use individual keys to override default keys even - * with RX of broad/multicast frames */ + int bcrx_sta_key; /* use individual keys to override default keys even + * with RX of broad/multicast frames */ /* Fragmentation structures */ struct ieee80211_frag_entry frag_cache[IEEE80211_FRAG_CACHE_LEN]; unsigned int frag_next_idx; - u16 fts; /* Fragmentation Threshold */ + u16 fts; /* Fragmentation Threshold */ + u16 rts; /* RTS threshold */ /* Association info */ u8 bssid[ETH_ALEN]; enum ieee80211_state state; - int mode; /* A, B, G */ - int modulation; /* CCK, OFDM */ - int freq_band; /* 2.4Ghz, 5.2Ghz, Mixed */ - int abg_ture; /* ABG flag */ + int mode; /* A, B, G */ + int modulation; /* CCK, OFDM */ + int freq_band; /* 2.4Ghz, 5.2Ghz, Mixed */ + int abg_true; /* ABG flag */ + + int perfect_rssi; + int worst_rssi; /* Callback functions */ - void (*set_security)(struct net_device *dev, - struct ieee80211_security *sec); - int (*hard_start_xmit)(struct ieee80211_txb *txb, - struct net_device *dev); - int (*reset_port)(struct net_device *dev); + void (*set_security) (struct net_device * dev, + struct ieee80211_security * sec); + int (*hard_start_xmit) (struct ieee80211_txb * txb, + struct net_device * dev, int pri); + int (*reset_port) (struct net_device * dev); + int (*is_queue_full) (struct net_device * dev, int pri); + + int (*handle_management) (struct net_device * dev, + struct ieee80211_network * network, u16 type); + + /* Typical STA methods */ + int (*handle_auth) (struct net_device * dev, + struct ieee80211_auth * auth); + int (*handle_deauth) (struct net_device * dev, + struct ieee80211_auth * auth); + int (*handle_disassoc) (struct net_device * dev, + struct ieee80211_disassoc * assoc); + int (*handle_beacon) (struct net_device * dev, + struct ieee80211_beacon * beacon, + struct ieee80211_network * network); + int (*handle_probe_response) (struct net_device * dev, + struct ieee80211_probe_response * resp, + struct ieee80211_network * network); + int (*handle_probe_request) (struct net_device * dev, + struct ieee80211_probe_request * req, + struct ieee80211_rx_stats * stats); + int (*handle_assoc_response) (struct net_device * dev, + struct ieee80211_assoc_response * resp, + struct ieee80211_network * network); + + /* Typical AP methods */ + int (*handle_assoc_request) (struct net_device * dev); + int (*handle_reassoc_request) (struct net_device * dev, + struct ieee80211_reassoc_request * req); /* This must be the last item so that it points to the data * allocated beyond this structure by alloc_ieee80211 */ @@ -736,12 +954,12 @@ struct ieee80211_device { #define IEEE_G (1<<2) #define IEEE_MODE_MASK (IEEE_A|IEEE_B|IEEE_G) -extern inline void *ieee80211_priv(struct net_device *dev) +static inline void *ieee80211_priv(struct net_device *dev) { return ((struct ieee80211_device *)netdev_priv(dev))->priv; } -extern inline int ieee80211_is_empty_essid(const char *essid, int essid_len) +static inline int ieee80211_is_empty_essid(const char *essid, int essid_len) { /* Single white space is for Linksys APs */ if (essid_len == 1 && essid[0] == ' ') @@ -757,7 +975,8 @@ extern inline int ieee80211_is_empty_essid(const char *essid, int essid_len) return 1; } -extern inline int ieee80211_is_valid_mode(struct ieee80211_device *ieee, int mode) +static inline int ieee80211_is_valid_mode(struct ieee80211_device *ieee, + int mode) { /* * It is possible for both access points and our device to support @@ -783,14 +1002,17 @@ extern inline int ieee80211_is_valid_mode(struct ieee80211_device *ieee, int mod return 0; } -extern inline int ieee80211_get_hdrlen(u16 fc) +static inline int ieee80211_get_hdrlen(u16 fc) { int hdrlen = IEEE80211_3ADDR_LEN; + u16 stype = WLAN_FC_GET_STYPE(fc); switch (WLAN_FC_GET_TYPE(fc)) { case IEEE80211_FTYPE_DATA: if ((fc & IEEE80211_FCTL_FROMDS) && (fc & IEEE80211_FCTL_TODS)) hdrlen = IEEE80211_4ADDR_LEN; + if (stype & IEEE80211_STYPE_QOS_DATA) + hdrlen += 2; break; case IEEE80211_FTYPE_CTL: switch (WLAN_FC_GET_STYPE(fc)) { @@ -808,7 +1030,48 @@ extern inline int ieee80211_get_hdrlen(u16 fc) return hdrlen; } +static inline u8 *ieee80211_get_payload(struct ieee80211_hdr *hdr) +{ + switch (ieee80211_get_hdrlen(le16_to_cpu(hdr->frame_ctl))) { + case IEEE80211_1ADDR_LEN: + return ((struct ieee80211_hdr_1addr *)hdr)->payload; + case IEEE80211_2ADDR_LEN: + return ((struct ieee80211_hdr_2addr *)hdr)->payload; + case IEEE80211_3ADDR_LEN: + return ((struct ieee80211_hdr_3addr *)hdr)->payload; + case IEEE80211_4ADDR_LEN: + return ((struct ieee80211_hdr_4addr *)hdr)->payload; + } + return NULL; +} + +static inline int ieee80211_is_ofdm_rate(u8 rate) +{ + switch (rate & ~IEEE80211_BASIC_RATE_MASK) { + case IEEE80211_OFDM_RATE_6MB: + case IEEE80211_OFDM_RATE_9MB: + case IEEE80211_OFDM_RATE_12MB: + case IEEE80211_OFDM_RATE_18MB: + case IEEE80211_OFDM_RATE_24MB: + case IEEE80211_OFDM_RATE_36MB: + case IEEE80211_OFDM_RATE_48MB: + case IEEE80211_OFDM_RATE_54MB: + return 1; + } + return 0; +} +static inline int ieee80211_is_cck_rate(u8 rate) +{ + switch (rate & ~IEEE80211_BASIC_RATE_MASK) { + case IEEE80211_CCK_RATE_1MB: + case IEEE80211_CCK_RATE_2MB: + case IEEE80211_CCK_RATE_5MB: + case IEEE80211_CCK_RATE_11MB: + return 1; + } + return 0; +} /* ieee80211.c */ extern void free_ieee80211(struct net_device *dev); @@ -817,18 +1080,30 @@ extern struct net_device *alloc_ieee80211(int sizeof_priv); extern int ieee80211_set_encryption(struct ieee80211_device *ieee); /* ieee80211_tx.c */ -extern int ieee80211_xmit(struct sk_buff *skb, - struct net_device *dev); +extern int ieee80211_xmit(struct sk_buff *skb, struct net_device *dev); extern void ieee80211_txb_free(struct ieee80211_txb *); - +extern int ieee80211_tx_frame(struct ieee80211_device *ieee, + struct ieee80211_hdr *frame, int len); /* ieee80211_rx.c */ extern int ieee80211_rx(struct ieee80211_device *ieee, struct sk_buff *skb, struct ieee80211_rx_stats *rx_stats); extern void ieee80211_rx_mgt(struct ieee80211_device *ieee, - struct ieee80211_hdr *header, + struct ieee80211_hdr_4addr *header, struct ieee80211_rx_stats *stats); +/* ieee80211_geo.c */ +extern const struct ieee80211_geo *ieee80211_get_geo(struct ieee80211_device + *ieee); +extern int ieee80211_set_geo(struct ieee80211_device *ieee, + const struct ieee80211_geo *geo); + +extern int ieee80211_is_valid_channel(struct ieee80211_device *ieee, + u8 channel); +extern int ieee80211_channel_to_index(struct ieee80211_device *ieee, + u8 channel); +extern u8 ieee80211_freq_to_channel(struct ieee80211_device *ieee, u32 freq); + /* ieee80211_wx.c */ extern int ieee80211_wx_get_scan(struct ieee80211_device *ieee, struct iw_request_info *info, @@ -839,17 +1114,21 @@ extern int ieee80211_wx_set_encode(struct ieee80211_device *ieee, extern int ieee80211_wx_get_encode(struct ieee80211_device *ieee, struct iw_request_info *info, union iwreq_data *wrqu, char *key); - - -extern inline void ieee80211_increment_scans(struct ieee80211_device *ieee) +extern int ieee80211_wx_set_encodeext(struct ieee80211_device *ieee, + struct iw_request_info *info, + union iwreq_data *wrqu, char *extra); +extern int ieee80211_wx_get_encodeext(struct ieee80211_device *ieee, + struct iw_request_info *info, + union iwreq_data *wrqu, char *extra); + +static inline void ieee80211_increment_scans(struct ieee80211_device *ieee) { ieee->scans++; } -extern inline int ieee80211_get_scans(struct ieee80211_device *ieee) +static inline int ieee80211_get_scans(struct ieee80211_device *ieee) { return ieee->scans; } - -#endif /* IEEE80211_H */ +#endif /* IEEE80211_H */ diff --git a/include/net/ieee80211_crypt.h b/include/net/ieee80211_crypt.h index b58a3bcc0dc0..225fc751d464 100644 --- a/include/net/ieee80211_crypt.h +++ b/include/net/ieee80211_crypt.h @@ -25,16 +25,23 @@ #include <linux/skbuff.h> +enum { + IEEE80211_CRYPTO_TKIP_COUNTERMEASURES = (1 << 0), +}; + struct ieee80211_crypto_ops { const char *name; + struct list_head list; /* init new crypto context (e.g., allocate private data space, * select IV, etc.); returns NULL on failure or pointer to allocated * private data on success */ - void * (*init)(int keyidx); + void *(*init) (int keyidx); /* deinitialize crypto context and free allocated private data */ - void (*deinit)(void *priv); + void (*deinit) (void *priv); + + int (*build_iv) (struct sk_buff * skb, int hdr_len, void *priv); /* encrypt/decrypt return < 0 on error or >= 0 on success. The return * value from decrypt_mpdu is passed as the keyidx value for @@ -42,34 +49,39 @@ struct ieee80211_crypto_ops { * encryption; if not, error will be returned; these functions are * called for all MPDUs (i.e., fragments). */ - int (*encrypt_mpdu)(struct sk_buff *skb, int hdr_len, void *priv); - int (*decrypt_mpdu)(struct sk_buff *skb, int hdr_len, void *priv); + int (*encrypt_mpdu) (struct sk_buff * skb, int hdr_len, void *priv); + int (*decrypt_mpdu) (struct sk_buff * skb, int hdr_len, void *priv); /* These functions are called for full MSDUs, i.e. full frames. * These can be NULL if full MSDU operations are not needed. */ - int (*encrypt_msdu)(struct sk_buff *skb, int hdr_len, void *priv); - int (*decrypt_msdu)(struct sk_buff *skb, int keyidx, int hdr_len, - void *priv); + int (*encrypt_msdu) (struct sk_buff * skb, int hdr_len, void *priv); + int (*decrypt_msdu) (struct sk_buff * skb, int keyidx, int hdr_len, + void *priv); - int (*set_key)(void *key, int len, u8 *seq, void *priv); - int (*get_key)(void *key, int len, u8 *seq, void *priv); + int (*set_key) (void *key, int len, u8 * seq, void *priv); + int (*get_key) (void *key, int len, u8 * seq, void *priv); /* procfs handler for printing out key information and possible * statistics */ - char * (*print_stats)(char *p, void *priv); + char *(*print_stats) (char *p, void *priv); + + /* Crypto specific flag get/set for configuration settings */ + unsigned long (*get_flags) (void *priv); + unsigned long (*set_flags) (unsigned long flags, void *priv); /* maximum number of bytes added by encryption; encrypt buf is * allocated with extra_prefix_len bytes, copy of in_buf, and * extra_postfix_len; encrypt need not use all this space, but * the result must start at the beginning of the buffer and correct * length must be returned */ - int extra_prefix_len, extra_postfix_len; + int extra_mpdu_prefix_len, extra_mpdu_postfix_len; + int extra_msdu_prefix_len, extra_msdu_postfix_len; struct module *owner; }; struct ieee80211_crypt_data { - struct list_head list; /* delayed deletion list */ + struct list_head list; /* delayed deletion list */ struct ieee80211_crypto_ops *ops; void *priv; atomic_t refcnt; @@ -77,10 +89,11 @@ struct ieee80211_crypt_data { int ieee80211_register_crypto_ops(struct ieee80211_crypto_ops *ops); int ieee80211_unregister_crypto_ops(struct ieee80211_crypto_ops *ops); -struct ieee80211_crypto_ops * ieee80211_get_crypto_ops(const char *name); +struct ieee80211_crypto_ops *ieee80211_get_crypto_ops(const char *name); void ieee80211_crypt_deinit_entries(struct ieee80211_device *, int); void ieee80211_crypt_deinit_handler(unsigned long); void ieee80211_crypt_delayed_deinit(struct ieee80211_device *ieee, struct ieee80211_crypt_data **crypt); +void ieee80211_crypt_quiescing(struct ieee80211_device *ieee); #endif diff --git a/include/net/ieee80211_radiotap.h b/include/net/ieee80211_radiotap.h new file mode 100644 index 000000000000..429b73892a5f --- /dev/null +++ b/include/net/ieee80211_radiotap.h @@ -0,0 +1,231 @@ +/* $FreeBSD: src/sys/net80211/ieee80211_radiotap.h,v 1.5 2005/01/22 20:12:05 sam Exp $ */ +/* $NetBSD: ieee80211_radiotap.h,v 1.11 2005/06/22 06:16:02 dyoung Exp $ */ + +/*- + * Copyright (c) 2003, 2004 David Young. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. The name of David Young may not be used to endorse or promote + * products derived from this software without specific prior + * written permission. + * + * THIS SOFTWARE IS PROVIDED BY DAVID YOUNG ``AS IS'' AND ANY + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, + * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A + * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL DAVID + * YOUNG BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED + * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + */ + +/* + * Modifications to fit into the linux IEEE 802.11 stack, + * Mike Kershaw (dragorn@kismetwireless.net) + */ + +#ifndef IEEE80211RADIOTAP_H +#define IEEE80211RADIOTAP_H + +#include <linux/if_ether.h> +#include <linux/kernel.h> + +/* Radiotap header version (from official NetBSD feed) */ +#define IEEE80211RADIOTAP_VERSION "1.5" +/* Base version of the radiotap packet header data */ +#define PKTHDR_RADIOTAP_VERSION 0 + +/* A generic radio capture format is desirable. There is one for + * Linux, but it is neither rigidly defined (there were not even + * units given for some fields) nor easily extensible. + * + * I suggest the following extensible radio capture format. It is + * based on a bitmap indicating which fields are present. + * + * I am trying to describe precisely what the application programmer + * should expect in the following, and for that reason I tell the + * units and origin of each measurement (where it applies), or else I + * use sufficiently weaselly language ("is a monotonically nondecreasing + * function of...") that I cannot set false expectations for lawyerly + * readers. + */ + +/* XXX tcpdump/libpcap do not tolerate variable-length headers, + * yet, so we pad every radiotap header to 64 bytes. Ugh. + */ +#define IEEE80211_RADIOTAP_HDRLEN 64 + +/* The radio capture header precedes the 802.11 header. */ +struct ieee80211_radiotap_header { + u8 it_version; /* Version 0. Only increases + * for drastic changes, + * introduction of compatible + * new fields does not count. + */ + u8 it_pad; + u16 it_len; /* length of the whole + * header in bytes, including + * it_version, it_pad, + * it_len, and data fields. + */ + u32 it_present; /* A bitmap telling which + * fields are present. Set bit 31 + * (0x80000000) to extend the + * bitmap by another 32 bits. + * Additional extensions are made + * by setting bit 31. + */ +}; + +/* Name Data type Units + * ---- --------- ----- + * + * IEEE80211_RADIOTAP_TSFT u64 microseconds + * + * Value in microseconds of the MAC's 64-bit 802.11 Time + * Synchronization Function timer when the first bit of the + * MPDU arrived at the MAC. For received frames, only. + * + * IEEE80211_RADIOTAP_CHANNEL 2 x u16 MHz, bitmap + * + * Tx/Rx frequency in MHz, followed by flags (see below). + * + * IEEE80211_RADIOTAP_FHSS u16 see below + * + * For frequency-hopping radios, the hop set (first byte) + * and pattern (second byte). + * + * IEEE80211_RADIOTAP_RATE u8 500kb/s + * + * Tx/Rx data rate + * + * IEEE80211_RADIOTAP_DBM_ANTSIGNAL int8_t decibels from + * one milliwatt (dBm) + * + * RF signal power at the antenna, decibel difference from + * one milliwatt. + * + * IEEE80211_RADIOTAP_DBM_ANTNOISE int8_t decibels from + * one milliwatt (dBm) + * + * RF noise power at the antenna, decibel difference from one + * milliwatt. + * + * IEEE80211_RADIOTAP_DB_ANTSIGNAL u8 decibel (dB) + * + * RF signal power at the antenna, decibel difference from an + * arbitrary, fixed reference. + * + * IEEE80211_RADIOTAP_DB_ANTNOISE u8 decibel (dB) + * + * RF noise power at the antenna, decibel difference from an + * arbitrary, fixed reference point. + * + * IEEE80211_RADIOTAP_LOCK_QUALITY u16 unitless + * + * Quality of Barker code lock. Unitless. Monotonically + * nondecreasing with "better" lock strength. Called "Signal + * Quality" in datasheets. (Is there a standard way to measure + * this?) + * + * IEEE80211_RADIOTAP_TX_ATTENUATION u16 unitless + * + * Transmit power expressed as unitless distance from max + * power set at factory calibration. 0 is max power. + * Monotonically nondecreasing with lower power levels. + * + * IEEE80211_RADIOTAP_DB_TX_ATTENUATION u16 decibels (dB) + * + * Transmit power expressed as decibel distance from max power + * set at factory calibration. 0 is max power. Monotonically + * nondecreasing with lower power levels. + * + * IEEE80211_RADIOTAP_DBM_TX_POWER int8_t decibels from + * one milliwatt (dBm) + * + * Transmit power expressed as dBm (decibels from a 1 milliwatt + * reference). This is the absolute power level measured at + * the antenna port. + * + * IEEE80211_RADIOTAP_FLAGS u8 bitmap + * + * Properties of transmitted and received frames. See flags + * defined below. + * + * IEEE80211_RADIOTAP_ANTENNA u8 antenna index + * + * Unitless indication of the Rx/Tx antenna for this packet. + * The first antenna is antenna 0. + * + * IEEE80211_RADIOTAP_FCS u32 data + * + * FCS from frame in network byte order. + */ +enum ieee80211_radiotap_type { + IEEE80211_RADIOTAP_TSFT = 0, + IEEE80211_RADIOTAP_FLAGS = 1, + IEEE80211_RADIOTAP_RATE = 2, + IEEE80211_RADIOTAP_CHANNEL = 3, + IEEE80211_RADIOTAP_FHSS = 4, + IEEE80211_RADIOTAP_DBM_ANTSIGNAL = 5, + IEEE80211_RADIOTAP_DBM_ANTNOISE = 6, + IEEE80211_RADIOTAP_LOCK_QUALITY = 7, + IEEE80211_RADIOTAP_TX_ATTENUATION = 8, + IEEE80211_RADIOTAP_DB_TX_ATTENUATION = 9, + IEEE80211_RADIOTAP_DBM_TX_POWER = 10, + IEEE80211_RADIOTAP_ANTENNA = 11, + IEEE80211_RADIOTAP_DB_ANTSIGNAL = 12, + IEEE80211_RADIOTAP_DB_ANTNOISE = 13, + IEEE80211_RADIOTAP_EXT = 31, +}; + +/* Channel flags. */ +#define IEEE80211_CHAN_TURBO 0x0010 /* Turbo channel */ +#define IEEE80211_CHAN_CCK 0x0020 /* CCK channel */ +#define IEEE80211_CHAN_OFDM 0x0040 /* OFDM channel */ +#define IEEE80211_CHAN_2GHZ 0x0080 /* 2 GHz spectrum channel. */ +#define IEEE80211_CHAN_5GHZ 0x0100 /* 5 GHz spectrum channel */ +#define IEEE80211_CHAN_PASSIVE 0x0200 /* Only passive scan allowed */ +#define IEEE80211_CHAN_DYN 0x0400 /* Dynamic CCK-OFDM channel */ +#define IEEE80211_CHAN_GFSK 0x0800 /* GFSK channel (FHSS PHY) */ + +/* For IEEE80211_RADIOTAP_FLAGS */ +#define IEEE80211_RADIOTAP_F_CFP 0x01 /* sent/received + * during CFP + */ +#define IEEE80211_RADIOTAP_F_SHORTPRE 0x02 /* sent/received + * with short + * preamble + */ +#define IEEE80211_RADIOTAP_F_WEP 0x04 /* sent/received + * with WEP encryption + */ +#define IEEE80211_RADIOTAP_F_FRAG 0x08 /* sent/received + * with fragmentation + */ +#define IEEE80211_RADIOTAP_F_FCS 0x10 /* frame includes FCS */ +#define IEEE80211_RADIOTAP_F_DATAPAD 0x20 /* frame has padding between + * 802.11 header and payload + * (to 32-bit boundary) + */ + +/* Ugly macro to convert literal channel numbers into their mhz equivalents + * There are certianly some conditions that will break this (like feeding it '30') + * but they shouldn't arise since nothing talks on channel 30. */ +#define ieee80211chan2mhz(x) \ + (((x) <= 14) ? \ + (((x) == 14) ? 2484 : ((x) * 5) + 2407) : \ + ((x) + 1000) * 5) + +#endif /* IEEE80211_RADIOTAP_H */ diff --git a/include/net/inet6_hashtables.h b/include/net/inet6_hashtables.h index 03df3b157960..5a2beed5a770 100644 --- a/include/net/inet6_hashtables.h +++ b/include/net/inet6_hashtables.h @@ -26,19 +26,18 @@ struct inet_hashinfo; /* I have no idea if this is a good hash for v6 or not. -DaveM */ -static inline int inet6_ehashfn(const struct in6_addr *laddr, const u16 lport, - const struct in6_addr *faddr, const u16 fport, - const int ehash_size) +static inline unsigned int inet6_ehashfn(const struct in6_addr *laddr, const u16 lport, + const struct in6_addr *faddr, const u16 fport) { - int hashent = (lport ^ fport); + unsigned int hashent = (lport ^ fport); hashent ^= (laddr->s6_addr32[3] ^ faddr->s6_addr32[3]); hashent ^= hashent >> 16; hashent ^= hashent >> 8; - return (hashent & (ehash_size - 1)); + return hashent; } -static inline int inet6_sk_ehashfn(const struct sock *sk, const int ehash_size) +static inline int inet6_sk_ehashfn(const struct sock *sk) { const struct inet_sock *inet = inet_sk(sk); const struct ipv6_pinfo *np = inet6_sk(sk); @@ -46,7 +45,7 @@ static inline int inet6_sk_ehashfn(const struct sock *sk, const int ehash_size) const struct in6_addr *faddr = &np->daddr; const __u16 lport = inet->num; const __u16 fport = inet->dport; - return inet6_ehashfn(laddr, lport, faddr, fport, ehash_size); + return inet6_ehashfn(laddr, lport, faddr, fport); } /* @@ -69,14 +68,14 @@ static inline struct sock * /* Optimize here for direct hit, only listening connections can * have wildcards anyways. */ - const int hash = inet6_ehashfn(daddr, hnum, saddr, sport, - hashinfo->ehash_size); - struct inet_ehash_bucket *head = &hashinfo->ehash[hash]; + unsigned int hash = inet6_ehashfn(daddr, hnum, saddr, sport); + struct inet_ehash_bucket *head = inet_ehash_bucket(hashinfo, hash); + prefetch(head->chain.first); read_lock(&head->lock); sk_for_each(sk, node, &head->chain) { /* For IPV6 do the cheaper port and family tests first. */ - if (INET6_MATCH(sk, saddr, daddr, ports, dif)) + if (INET6_MATCH(sk, hash, saddr, daddr, ports, dif)) goto hit; /* You sunk my battleship! */ } /* Must check for a TIME_WAIT'er before going to listener hash. */ diff --git a/include/net/inet_connection_sock.h b/include/net/inet_connection_sock.h index 651f824c1008..b0c99060b78d 100644 --- a/include/net/inet_connection_sock.h +++ b/include/net/inet_connection_sock.h @@ -94,7 +94,7 @@ static inline void *inet_csk_ca(const struct sock *sk) extern struct sock *inet_csk_clone(struct sock *sk, const struct request_sock *req, - const unsigned int __nocast priority); + const gfp_t priority); enum inet_csk_ack_state_t { ICSK_ACK_SCHED = 1, diff --git a/include/net/inet_ecn.h b/include/net/inet_ecn.h index f87845e2e965..b0c47e2eccf1 100644 --- a/include/net/inet_ecn.h +++ b/include/net/inet_ecn.h @@ -2,6 +2,7 @@ #define _INET_ECN_H_ #include <linux/ip.h> +#include <linux/skbuff.h> #include <net/dsfield.h> enum { @@ -48,7 +49,7 @@ static inline __u8 INET_ECN_encapsulate(__u8 outer, __u8 inner) (label) |= __constant_htons(INET_ECN_ECT_0 << 4); \ } while (0) -static inline void IP_ECN_set_ce(struct iphdr *iph) +static inline int IP_ECN_set_ce(struct iphdr *iph) { u32 check = iph->check; u32 ecn = (iph->tos + 1) & INET_ECN_MASK; @@ -61,7 +62,7 @@ static inline void IP_ECN_set_ce(struct iphdr *iph) * INET_ECN_CE => 00 */ if (!(ecn & 2)) - return; + return !ecn; /* * The following gives us: @@ -72,6 +73,7 @@ static inline void IP_ECN_set_ce(struct iphdr *iph) iph->check = check + (check>=0xFFFF); iph->tos |= INET_ECN_CE; + return 1; } static inline void IP_ECN_clear(struct iphdr *iph) @@ -87,11 +89,12 @@ static inline void ipv4_copy_dscp(struct iphdr *outer, struct iphdr *inner) struct ipv6hdr; -static inline void IP6_ECN_set_ce(struct ipv6hdr *iph) +static inline int IP6_ECN_set_ce(struct ipv6hdr *iph) { if (INET_ECN_is_not_ect(ipv6_get_dsfield(iph))) - return; + return 0; *(u32*)iph |= htonl(INET_ECN_CE << 20); + return 1; } static inline void IP6_ECN_clear(struct ipv6hdr *iph) @@ -105,4 +108,21 @@ static inline void ipv6_copy_dscp(struct ipv6hdr *outer, struct ipv6hdr *inner) ipv6_change_dsfield(inner, INET_ECN_MASK, dscp); } +static inline int INET_ECN_set_ce(struct sk_buff *skb) +{ + switch (skb->protocol) { + case __constant_htons(ETH_P_IP): + if (skb->nh.raw + sizeof(struct iphdr) <= skb->tail) + return IP_ECN_set_ce(skb->nh.iph); + break; + + case __constant_htons(ETH_P_IPV6): + if (skb->nh.raw + sizeof(struct ipv6hdr) <= skb->tail) + return IP6_ECN_set_ce(skb->nh.ipv6h); + break; + } + + return 0; +} + #endif diff --git a/include/net/inet_hashtables.h b/include/net/inet_hashtables.h index 646b6ea7fe26..07840baa9341 100644 --- a/include/net/inet_hashtables.h +++ b/include/net/inet_hashtables.h @@ -40,7 +40,7 @@ struct inet_ehash_bucket { rwlock_t lock; struct hlist_head chain; -} __attribute__((__aligned__(8))); +}; /* There are a few simple rules, which allow for local port reuse by * an application. In essence: @@ -108,7 +108,7 @@ struct inet_hashinfo { struct inet_bind_hashbucket *bhash; int bhash_size; - int ehash_size; + unsigned int ehash_size; /* All sockets in TCP_LISTEN state will be in here. This is the only * table where wildcard'd TCP sockets can exist. Hash function here @@ -125,22 +125,19 @@ struct inet_hashinfo { rwlock_t lhash_lock ____cacheline_aligned; atomic_t lhash_users; wait_queue_head_t lhash_wait; - spinlock_t portalloc_lock; kmem_cache_t *bind_bucket_cachep; - int port_rover; }; -static inline int inet_ehashfn(const __u32 laddr, const __u16 lport, - const __u32 faddr, const __u16 fport, - const int ehash_size) +static inline unsigned int inet_ehashfn(const __u32 laddr, const __u16 lport, + const __u32 faddr, const __u16 fport) { - int h = (laddr ^ lport) ^ (faddr ^ fport); + unsigned int h = (laddr ^ lport) ^ (faddr ^ fport); h ^= h >> 16; h ^= h >> 8; - return h & (ehash_size - 1); + return h; } -static inline int inet_sk_ehashfn(const struct sock *sk, const int ehash_size) +static inline int inet_sk_ehashfn(const struct sock *sk) { const struct inet_sock *inet = inet_sk(sk); const __u32 laddr = inet->rcv_saddr; @@ -148,7 +145,14 @@ static inline int inet_sk_ehashfn(const struct sock *sk, const int ehash_size) const __u32 faddr = inet->daddr; const __u16 fport = inet->dport; - return inet_ehashfn(laddr, lport, faddr, fport, ehash_size); + return inet_ehashfn(laddr, lport, faddr, fport); +} + +static inline struct inet_ehash_bucket *inet_ehash_bucket( + struct inet_hashinfo *hashinfo, + unsigned int hash) +{ + return &hashinfo->ehash[hash & (hashinfo->ehash_size - 1)]; } extern struct inet_bind_bucket * @@ -235,9 +239,11 @@ static inline void __inet_hash(struct inet_hashinfo *hashinfo, lock = &hashinfo->lhash_lock; inet_listen_wlock(hashinfo); } else { - sk->sk_hashent = inet_sk_ehashfn(sk, hashinfo->ehash_size); - list = &hashinfo->ehash[sk->sk_hashent].chain; - lock = &hashinfo->ehash[sk->sk_hashent].lock; + struct inet_ehash_bucket *head; + sk->sk_hash = inet_sk_ehashfn(sk); + head = inet_ehash_bucket(hashinfo, sk->sk_hash); + list = &head->chain; + lock = &head->lock; write_lock(lock); } __sk_add_node(sk, list); @@ -268,9 +274,8 @@ static inline void inet_unhash(struct inet_hashinfo *hashinfo, struct sock *sk) inet_listen_wlock(hashinfo); lock = &hashinfo->lhash_lock; } else { - struct inet_ehash_bucket *head = &hashinfo->ehash[sk->sk_hashent]; - lock = &head->lock; - write_lock_bh(&head->lock); + lock = &inet_ehash_bucket(hashinfo, sk->sk_hash)->lock; + write_lock_bh(lock); } if (__sk_del_node_init(sk)) @@ -337,23 +342,27 @@ sherry_cache: #define INET_ADDR_COOKIE(__name, __saddr, __daddr) \ const __u64 __name = (((__u64)(__daddr)) << 32) | ((__u64)(__saddr)); #endif /* __BIG_ENDIAN */ -#define INET_MATCH(__sk, __cookie, __saddr, __daddr, __ports, __dif)\ - (((*((__u64 *)&(inet_sk(__sk)->daddr))) == (__cookie)) && \ +#define INET_MATCH(__sk, __hash, __cookie, __saddr, __daddr, __ports, __dif)\ + (((__sk)->sk_hash == (__hash)) && \ + ((*((__u64 *)&(inet_sk(__sk)->daddr))) == (__cookie)) && \ ((*((__u32 *)&(inet_sk(__sk)->dport))) == (__ports)) && \ (!((__sk)->sk_bound_dev_if) || ((__sk)->sk_bound_dev_if == (__dif)))) -#define INET_TW_MATCH(__sk, __cookie, __saddr, __daddr, __ports, __dif)\ - (((*((__u64 *)&(inet_twsk(__sk)->tw_daddr))) == (__cookie)) && \ +#define INET_TW_MATCH(__sk, __hash, __cookie, __saddr, __daddr, __ports, __dif)\ + (((__sk)->sk_hash == (__hash)) && \ + ((*((__u64 *)&(inet_twsk(__sk)->tw_daddr))) == (__cookie)) && \ ((*((__u32 *)&(inet_twsk(__sk)->tw_dport))) == (__ports)) && \ (!((__sk)->sk_bound_dev_if) || ((__sk)->sk_bound_dev_if == (__dif)))) #else /* 32-bit arch */ #define INET_ADDR_COOKIE(__name, __saddr, __daddr) -#define INET_MATCH(__sk, __cookie, __saddr, __daddr, __ports, __dif) \ - ((inet_sk(__sk)->daddr == (__saddr)) && \ +#define INET_MATCH(__sk, __hash, __cookie, __saddr, __daddr, __ports, __dif) \ + (((__sk)->sk_hash == (__hash)) && \ + (inet_sk(__sk)->daddr == (__saddr)) && \ (inet_sk(__sk)->rcv_saddr == (__daddr)) && \ ((*((__u32 *)&(inet_sk(__sk)->dport))) == (__ports)) && \ (!((__sk)->sk_bound_dev_if) || ((__sk)->sk_bound_dev_if == (__dif)))) -#define INET_TW_MATCH(__sk, __cookie, __saddr, __daddr, __ports, __dif) \ - ((inet_twsk(__sk)->tw_daddr == (__saddr)) && \ +#define INET_TW_MATCH(__sk, __hash,__cookie, __saddr, __daddr, __ports, __dif) \ + (((__sk)->sk_hash == (__hash)) && \ + (inet_twsk(__sk)->tw_daddr == (__saddr)) && \ (inet_twsk(__sk)->tw_rcv_saddr == (__daddr)) && \ ((*((__u32 *)&(inet_twsk(__sk)->tw_dport))) == (__ports)) && \ (!((__sk)->sk_bound_dev_if) || ((__sk)->sk_bound_dev_if == (__dif)))) @@ -378,18 +387,19 @@ static inline struct sock * /* Optimize here for direct hit, only listening connections can * have wildcards anyways. */ - const int hash = inet_ehashfn(daddr, hnum, saddr, sport, hashinfo->ehash_size); - struct inet_ehash_bucket *head = &hashinfo->ehash[hash]; + unsigned int hash = inet_ehashfn(daddr, hnum, saddr, sport); + struct inet_ehash_bucket *head = inet_ehash_bucket(hashinfo, hash); + prefetch(head->chain.first); read_lock(&head->lock); sk_for_each(sk, node, &head->chain) { - if (INET_MATCH(sk, acookie, saddr, daddr, ports, dif)) + if (INET_MATCH(sk, hash, acookie, saddr, daddr, ports, dif)) goto hit; /* You sunk my battleship! */ } /* Must check for a TIME_WAIT'er before going to listener hash. */ sk_for_each(sk, node, &(head + hashinfo->ehash_size)->chain) { - if (INET_TW_MATCH(sk, acookie, saddr, daddr, ports, dif)) + if (INET_TW_MATCH(sk, hash, acookie, saddr, daddr, ports, dif)) goto hit; } sk = NULL; diff --git a/include/net/inet_timewait_sock.h b/include/net/inet_timewait_sock.h index 3b070352e869..28f7b2103505 100644 --- a/include/net/inet_timewait_sock.h +++ b/include/net/inet_timewait_sock.h @@ -19,6 +19,7 @@ #include <linux/ip.h> #include <linux/list.h> +#include <linux/module.h> #include <linux/timer.h> #include <linux/types.h> #include <linux/workqueue.h> @@ -112,6 +113,7 @@ struct inet_timewait_sock { #define tw_node __tw_common.skc_node #define tw_bind_node __tw_common.skc_bind_node #define tw_refcnt __tw_common.skc_refcnt +#define tw_hash __tw_common.skc_hash #define tw_prot __tw_common.skc_prot volatile unsigned char tw_substate; /* 3 bits hole, try to pack */ @@ -126,7 +128,6 @@ struct inet_timewait_sock { /* And these are ours. */ __u8 tw_ipv6only:1; /* 31 bits hole, try to pack */ - int tw_hashent; int tw_timeout; unsigned long tw_ttd; struct inet_bind_bucket *tw_tb; @@ -193,11 +194,13 @@ static inline u32 inet_rcv_saddr(const struct sock *sk) static inline void inet_twsk_put(struct inet_timewait_sock *tw) { if (atomic_dec_and_test(&tw->tw_refcnt)) { + struct module *owner = tw->tw_prot->owner; #ifdef SOCK_REFCNT_DEBUG printk(KERN_DEBUG "%s timewait_sock %p released\n", tw->tw_prot->name, tw); #endif kmem_cache_free(tw->tw_prot->twsk_slab, tw); + module_put(owner); } } diff --git a/include/net/ip_vs.h b/include/net/ip_vs.h index 06b4235aa016..3b5559a023a4 100644 --- a/include/net/ip_vs.h +++ b/include/net/ip_vs.h @@ -832,7 +832,7 @@ extern void ip_vs_app_inc_put(struct ip_vs_app *inc); extern int ip_vs_app_pkt_out(struct ip_vs_conn *, struct sk_buff **pskb); extern int ip_vs_app_pkt_in(struct ip_vs_conn *, struct sk_buff **pskb); -extern int ip_vs_skb_replace(struct sk_buff *skb, int pri, +extern int ip_vs_skb_replace(struct sk_buff *skb, gfp_t pri, char *o_buf, int o_len, char *n_buf, int n_len); extern int ip_vs_app_init(void); extern void ip_vs_app_cleanup(void); diff --git a/include/net/ipv6.h b/include/net/ipv6.h index 65ec86678a08..0a2ad51cff82 100644 --- a/include/net/ipv6.h +++ b/include/net/ipv6.h @@ -237,6 +237,8 @@ extern struct ipv6_txoptions * ipv6_renew_options(struct sock *sk, struct ipv6_t int newtype, struct ipv6_opt_hdr __user *newopt, int newoptlen); +struct ipv6_txoptions *ipv6_fixup_options(struct ipv6_txoptions *opt_space, + struct ipv6_txoptions *opt); extern int ip6_frag_nqueues; extern atomic_t ip6_frag_mem; @@ -252,12 +254,25 @@ typedef int (*inet_getfrag_t) (const void *data, char *, unsigned int, unsigned int); - -extern int ipv6_addr_type(const struct in6_addr *addr); +extern int __ipv6_addr_type(const struct in6_addr *addr); +static inline int ipv6_addr_type(const struct in6_addr *addr) +{ + return __ipv6_addr_type(addr) & 0xffff; +} static inline int ipv6_addr_scope(const struct in6_addr *addr) { - return ipv6_addr_type(addr) & IPV6_ADDR_SCOPE_MASK; + return __ipv6_addr_type(addr) & IPV6_ADDR_SCOPE_MASK; +} + +static inline int __ipv6_addr_src_scope(int type) +{ + return (type == IPV6_ADDR_ANY ? __IPV6_ADDR_SCOPE_INVALID : (type >> 16)); +} + +static inline int ipv6_addr_src_scope(const struct in6_addr *addr) +{ + return __ipv6_addr_src_scope(__ipv6_addr_type(addr)); } static inline int ipv6_addr_cmp(const struct in6_addr *a1, const struct in6_addr *a2) @@ -341,6 +356,54 @@ static inline int ipv6_addr_any(const struct in6_addr *a) } /* + * find the first different bit between two addresses + * length of address must be a multiple of 32bits + */ +static inline int __ipv6_addr_diff(const void *token1, const void *token2, int addrlen) +{ + const __u32 *a1 = token1, *a2 = token2; + int i; + + addrlen >>= 2; + + for (i = 0; i < addrlen; i++) { + __u32 xb = a1[i] ^ a2[i]; + if (xb) { + int j = 31; + + xb = ntohl(xb); + while ((xb & (1 << j)) == 0) + j--; + + return (i * 32 + 31 - j); + } + } + + /* + * we should *never* get to this point since that + * would mean the addrs are equal + * + * However, we do get to it 8) And exacly, when + * addresses are equal 8) + * + * ip route add 1111::/128 via ... + * ip route add 1111::/64 via ... + * and we are here. + * + * Ideally, this function should stop comparison + * at prefix length. It does not, but it is still OK, + * if returned value is greater than prefix length. + * --ANK (980803) + */ + return (addrlen << 5); +} + +static inline int ipv6_addr_diff(const struct in6_addr *a1, const struct in6_addr *a2) +{ + return __ipv6_addr_diff(a1, a2, sizeof(struct in6_addr)); +} + +/* * Prototypes exported by ipv6 */ diff --git a/include/net/llc.h b/include/net/llc.h index 71769a5aeef3..1adb2ef3f6f7 100644 --- a/include/net/llc.h +++ b/include/net/llc.h @@ -17,6 +17,8 @@ #include <linux/list.h> #include <linux/spinlock.h> +#include <asm/atomic.h> + struct net_device; struct packet_type; struct sk_buff; @@ -44,6 +46,7 @@ struct llc_sap { unsigned char state; unsigned char p_bit; unsigned char f_bit; + atomic_t refcnt; int (*rcv_func)(struct sk_buff *skb, struct net_device *dev, struct packet_type *pt, @@ -81,13 +84,27 @@ extern struct llc_sap *llc_sap_open(unsigned char lsap, struct net_device *dev, struct packet_type *pt, struct net_device *orig_dev)); +static inline void llc_sap_hold(struct llc_sap *sap) +{ + atomic_inc(&sap->refcnt); +} + extern void llc_sap_close(struct llc_sap *sap); +static inline void llc_sap_put(struct llc_sap *sap) +{ + if (atomic_dec_and_test(&sap->refcnt)) + llc_sap_close(sap); +} + extern struct llc_sap *llc_sap_find(unsigned char sap_value); extern int llc_build_and_send_ui_pkt(struct llc_sap *sap, struct sk_buff *skb, unsigned char *dmac, unsigned char dsap); +extern void llc_sap_handler(struct llc_sap *sap, struct sk_buff *skb); +extern void llc_conn_handler(struct llc_sap *sap, struct sk_buff *skb); + extern int llc_station_init(void); extern void llc_station_exit(void); @@ -98,4 +115,17 @@ extern void llc_proc_exit(void); #define llc_proc_init() (0) #define llc_proc_exit() do { } while(0) #endif /* CONFIG_PROC_FS */ +#ifdef CONFIG_SYSCTL +extern int llc_sysctl_init(void); +extern void llc_sysctl_exit(void); + +extern int sysctl_llc2_ack_timeout; +extern int sysctl_llc2_busy_timeout; +extern int sysctl_llc2_p_timeout; +extern int sysctl_llc2_rej_timeout; +extern int sysctl_llc_station_ack_timeout; +#else +#define llc_sysctl_init() (0) +#define llc_sysctl_exit() do { } while(0) +#endif /* CONFIG_SYSCTL */ #endif /* LLC_H */ diff --git a/include/net/llc_conn.h b/include/net/llc_conn.h index 8ad3bc2c23d7..00730d21b522 100644 --- a/include/net/llc_conn.h +++ b/include/net/llc_conn.h @@ -19,14 +19,14 @@ #define LLC_EVENT 1 #define LLC_PACKET 2 -#define LLC_P_TIME 2 -#define LLC_ACK_TIME 1 -#define LLC_REJ_TIME 3 -#define LLC_BUSY_TIME 3 +#define LLC2_P_TIME 2 +#define LLC2_ACK_TIME 1 +#define LLC2_REJ_TIME 3 +#define LLC2_BUSY_TIME 3 struct llc_timer { struct timer_list timer; - u16 expire; /* timer expire time */ + unsigned long expire; /* timer expire time */ }; struct llc_sock { @@ -38,6 +38,7 @@ struct llc_sock { struct llc_addr laddr; /* lsap/mac pair */ struct llc_addr daddr; /* dsap/mac pair */ struct net_device *dev; /* device to send to remote */ + u32 copied_seq; /* head of yet unread data */ u8 retry_count; /* number of retries */ u8 ack_must_be_send; u8 first_pdu_Ns; @@ -92,7 +93,8 @@ static __inline__ char llc_backlog_type(struct sk_buff *skb) return skb->cb[sizeof(skb->cb) - 1]; } -extern struct sock *llc_sk_alloc(int family, int priority, struct proto *prot); +extern struct sock *llc_sk_alloc(int family, gfp_t priority, + struct proto *prot); extern void llc_sk_free(struct sock *sk); extern void llc_sk_reset(struct sock *sk); @@ -115,5 +117,4 @@ extern void llc_sap_remove_socket(struct llc_sap *sap, struct sock *sk); extern u8 llc_data_accept_state(u8 state); extern void llc_build_offset_table(void); -extern int llc_release_sockets(struct llc_sap *sap); #endif /* LLC_CONN_H */ diff --git a/include/net/llc_pdu.h b/include/net/llc_pdu.h index f45c37d89cf7..8f6306581fa7 100644 --- a/include/net/llc_pdu.h +++ b/include/net/llc_pdu.h @@ -254,8 +254,10 @@ static inline void llc_pdu_decode_sa(struct sk_buff *skb, u8 *sa) { if (skb->protocol == ntohs(ETH_P_802_2)) memcpy(sa, eth_hdr(skb)->h_source, ETH_ALEN); - else if (skb->protocol == ntohs(ETH_P_TR_802_2)) + else if (skb->protocol == ntohs(ETH_P_TR_802_2)) { memcpy(sa, tr_hdr(skb)->saddr, ETH_ALEN); + *sa &= 0x7F; + } } /** @@ -355,7 +357,7 @@ static inline void llc_pdu_init_as_test_rsp(struct sk_buff *skb, /* LLC Type 1 XID command/response information fields format */ struct llc_xid_info { - u8 fmt_id; /* always 0x18 for LLC */ + u8 fmt_id; /* always 0x81 for LLC */ u8 type; /* different if NULL/non-NULL LSAP */ u8 rw; /* sender receive window */ }; diff --git a/include/net/llc_sap.h b/include/net/llc_sap.h index 353baaa627f3..2c56dbece729 100644 --- a/include/net/llc_sap.h +++ b/include/net/llc_sap.h @@ -12,11 +12,15 @@ * See the GNU General Public License for more details. */ struct llc_sap; +struct net_device; struct sk_buff; +struct sock; extern void llc_sap_rtn_pdu(struct llc_sap *sap, struct sk_buff *skb); -extern void llc_save_primitive(struct sk_buff* skb, unsigned char prim); -extern struct sk_buff *llc_alloc_frame(void); +extern void llc_save_primitive(struct sock *sk, struct sk_buff* skb, + unsigned char prim); +extern struct sk_buff *llc_alloc_frame(struct sock *sk, + struct net_device *dev); extern void llc_build_and_send_test_pkt(struct llc_sap *sap, struct sk_buff *skb, diff --git a/include/net/netfilter/ipv4/nf_conntrack_icmp.h b/include/net/netfilter/ipv4/nf_conntrack_icmp.h new file mode 100644 index 000000000000..3dd22cff23ec --- /dev/null +++ b/include/net/netfilter/ipv4/nf_conntrack_icmp.h @@ -0,0 +1,11 @@ +#ifndef _NF_CONNTRACK_ICMP_H +#define _NF_CONNTRACK_ICMP_H +/* ICMP tracking. */ +#include <asm/atomic.h> + +struct ip_ct_icmp +{ + /* Optimization: when number in == number out, forget immediately. */ + atomic_t count; +}; +#endif /* _NF_CONNTRACK_ICMP_H */ diff --git a/include/net/netfilter/ipv4/nf_conntrack_ipv4.h b/include/net/netfilter/ipv4/nf_conntrack_ipv4.h new file mode 100644 index 000000000000..25b081a730e6 --- /dev/null +++ b/include/net/netfilter/ipv4/nf_conntrack_ipv4.h @@ -0,0 +1,43 @@ +/* + * IPv4 support for nf_conntrack. + * + * 23 Mar 2004: Yasuyuki Kozakai @ USAGI <yasuyuki.kozakai@toshiba.co.jp> + * - move L3 protocol dependent part from include/linux/netfilter_ipv4/ + * ip_conntarck.h + */ + +#ifndef _NF_CONNTRACK_IPV4_H +#define _NF_CONNTRACK_IPV4_H + +#ifdef CONFIG_IP_NF_NAT_NEEDED +#include <linux/netfilter_ipv4/ip_nat.h> + +/* per conntrack: nat application helper private data */ +union ip_conntrack_nat_help { + /* insert nat helper private data here */ +}; + +struct nf_conntrack_ipv4_nat { + struct ip_nat_info info; + union ip_conntrack_nat_help help; +#if defined(CONFIG_IP_NF_TARGET_MASQUERADE) || \ + defined(CONFIG_IP_NF_TARGET_MASQUERADE_MODULE) + int masq_index; +#endif +}; +#endif /* CONFIG_IP_NF_NAT_NEEDED */ + +struct nf_conntrack_ipv4 { +#ifdef CONFIG_IP_NF_NAT_NEEDED + struct nf_conntrack_ipv4_nat *nat; +#endif +}; + +/* Returns new sk_buff, or NULL */ +struct sk_buff * +nf_ct_ipv4_ct_gather_frags(struct sk_buff *skb); + +/* call to create an explicit dependency on nf_conntrack_l3proto_ipv4. */ +extern void need_ip_conntrack(void); + +#endif /*_NF_CONNTRACK_IPV4_H*/ diff --git a/include/net/netfilter/ipv6/nf_conntrack_icmpv6.h b/include/net/netfilter/ipv6/nf_conntrack_icmpv6.h new file mode 100644 index 000000000000..86591afda29c --- /dev/null +++ b/include/net/netfilter/ipv6/nf_conntrack_icmpv6.h @@ -0,0 +1,27 @@ +/* + * ICMPv6 tracking. + * + * 21 Apl 2004: Yasuyuki Kozakai @USAGI <yasuyuki.kozakai@toshiba.co.jp> + * - separated from nf_conntrack_icmp.h + * + * Derived from include/linux/netfiter_ipv4/ip_conntrack_icmp.h + */ + +#ifndef _NF_CONNTRACK_ICMPV6_H +#define _NF_CONNTRACK_ICMPV6_H +#include <asm/atomic.h> + +#ifndef ICMPV6_NI_QUERY +#define ICMPV6_NI_QUERY 139 +#endif +#ifndef ICMPV6_NI_REPLY +#define ICMPV6_NI_REPLY 140 +#endif + +struct nf_ct_icmpv6 +{ + /* Optimization: when number in == number out, forget immediately. */ + atomic_t count; +}; + +#endif /* _NF_CONNTRACK_ICMPV6_H */ diff --git a/include/net/netfilter/nf_conntrack.h b/include/net/netfilter/nf_conntrack.h new file mode 100644 index 000000000000..cc4825610795 --- /dev/null +++ b/include/net/netfilter/nf_conntrack.h @@ -0,0 +1,354 @@ +/* + * Connection state tracking for netfilter. This is separated from, + * but required by, the (future) NAT layer; it can also be used by an iptables + * extension. + * + * 16 Dec 2003: Yasuyuki Kozakai @USAGI <yasuyuki.kozakai@toshiba.co.jp> + * - generalize L3 protocol dependent part. + * + * Derived from include/linux/netfiter_ipv4/ip_conntrack.h + */ + +#ifndef _NF_CONNTRACK_H +#define _NF_CONNTRACK_H + +#include <linux/netfilter/nf_conntrack_common.h> + +#ifdef __KERNEL__ +#include <linux/config.h> +#include <linux/bitops.h> +#include <linux/compiler.h> +#include <asm/atomic.h> + +#include <linux/netfilter/nf_conntrack_tcp.h> +#include <linux/netfilter/nf_conntrack_sctp.h> +#include <net/netfilter/ipv4/nf_conntrack_icmp.h> +#include <net/netfilter/ipv6/nf_conntrack_icmpv6.h> + +#include <net/netfilter/nf_conntrack_tuple.h> + +/* per conntrack: protocol private data */ +union nf_conntrack_proto { + /* insert conntrack proto private data here */ + struct ip_ct_sctp sctp; + struct ip_ct_tcp tcp; + struct ip_ct_icmp icmp; + struct nf_ct_icmpv6 icmpv6; +}; + +union nf_conntrack_expect_proto { + /* insert expect proto private data here */ +}; + +/* Add protocol helper include file here */ +#include <linux/netfilter/nf_conntrack_ftp.h> + +/* per conntrack: application helper private data */ +union nf_conntrack_help { + /* insert conntrack helper private data (master) here */ + struct ip_ct_ftp_master ct_ftp_info; +}; + +#include <linux/types.h> +#include <linux/skbuff.h> + +#ifdef CONFIG_NETFILTER_DEBUG +#define NF_CT_ASSERT(x) \ +do { \ + if (!(x)) \ + /* Wooah! I'm tripping my conntrack in a frenzy of \ + netplay... */ \ + printk("NF_CT_ASSERT: %s:%i(%s)\n", \ + __FILE__, __LINE__, __FUNCTION__); \ +} while(0) +#else +#define NF_CT_ASSERT(x) +#endif + +struct nf_conntrack_helper; + +#include <net/netfilter/ipv4/nf_conntrack_ipv4.h> +struct nf_conn +{ + /* Usage count in here is 1 for hash table/destruct timer, 1 per skb, + plus 1 for any connection(s) we are `master' for */ + struct nf_conntrack ct_general; + + /* XXX should I move this to the tail ? - Y.K */ + /* These are my tuples; original and reply */ + struct nf_conntrack_tuple_hash tuplehash[IP_CT_DIR_MAX]; + + /* Have we seen traffic both ways yet? (bitset) */ + unsigned long status; + + /* Timer function; drops refcnt when it goes off. */ + struct timer_list timeout; + +#ifdef CONFIG_NF_CT_ACCT + /* Accounting Information (same cache line as other written members) */ + struct ip_conntrack_counter counters[IP_CT_DIR_MAX]; +#endif + /* If we were expected by an expectation, this will be it */ + struct nf_conn *master; + + /* Current number of expected connections */ + unsigned int expecting; + + /* Helper. if any */ + struct nf_conntrack_helper *helper; + + /* features - nat, helper, ... used by allocating system */ + u_int32_t features; + + /* Storage reserved for other modules: */ + + union nf_conntrack_proto proto; + +#if defined(CONFIG_NF_CONNTRACK_MARK) + u_int32_t mark; +#endif + + /* These members are dynamically allocated. */ + + union nf_conntrack_help *help; + + /* Layer 3 dependent members. (ex: NAT) */ + union { + struct nf_conntrack_ipv4 *ipv4; + } l3proto; + void *data[0]; +}; + +struct nf_conntrack_expect +{ + /* Internal linked list (global expectation list) */ + struct list_head list; + + /* We expect this tuple, with the following mask */ + struct nf_conntrack_tuple tuple, mask; + + /* Function to call after setup and insertion */ + void (*expectfn)(struct nf_conn *new, + struct nf_conntrack_expect *this); + + /* The conntrack of the master connection */ + struct nf_conn *master; + + /* Timer function; deletes the expectation. */ + struct timer_list timeout; + + /* Usage count. */ + atomic_t use; + + /* Flags */ + unsigned int flags; + +#ifdef CONFIG_NF_NAT_NEEDED + /* This is the original per-proto part, used to map the + * expected connection the way the recipient expects. */ + union nf_conntrack_manip_proto saved_proto; + /* Direction relative to the master connection. */ + enum ip_conntrack_dir dir; +#endif +}; + +#define NF_CT_EXPECT_PERMANENT 0x1 + +static inline struct nf_conn * +nf_ct_tuplehash_to_ctrack(const struct nf_conntrack_tuple_hash *hash) +{ + return container_of(hash, struct nf_conn, + tuplehash[hash->tuple.dst.dir]); +} + +/* get master conntrack via master expectation */ +#define master_ct(conntr) (conntr->master) + +/* Alter reply tuple (maybe alter helper). */ +extern void +nf_conntrack_alter_reply(struct nf_conn *conntrack, + const struct nf_conntrack_tuple *newreply); + +/* Is this tuple taken? (ignoring any belonging to the given + conntrack). */ +extern int +nf_conntrack_tuple_taken(const struct nf_conntrack_tuple *tuple, + const struct nf_conn *ignored_conntrack); + +/* Return conntrack_info and tuple hash for given skb. */ +static inline struct nf_conn * +nf_ct_get(const struct sk_buff *skb, enum ip_conntrack_info *ctinfo) +{ + *ctinfo = skb->nfctinfo; + return (struct nf_conn *)skb->nfct; +} + +/* decrement reference count on a conntrack */ +static inline void nf_ct_put(struct nf_conn *ct) +{ + NF_CT_ASSERT(ct); + nf_conntrack_put(&ct->ct_general); +} + +/* call to create an explicit dependency on nf_conntrack. */ +extern void need_nf_conntrack(void); + +extern int nf_ct_invert_tuplepr(struct nf_conntrack_tuple *inverse, + const struct nf_conntrack_tuple *orig); + +extern void __nf_ct_refresh_acct(struct nf_conn *ct, + enum ip_conntrack_info ctinfo, + const struct sk_buff *skb, + unsigned long extra_jiffies, + int do_acct); + +/* Refresh conntrack for this many jiffies and do accounting */ +static inline void nf_ct_refresh_acct(struct nf_conn *ct, + enum ip_conntrack_info ctinfo, + const struct sk_buff *skb, + unsigned long extra_jiffies) +{ + __nf_ct_refresh_acct(ct, ctinfo, skb, extra_jiffies, 1); +} + +/* Refresh conntrack for this many jiffies */ +static inline void nf_ct_refresh(struct nf_conn *ct, + const struct sk_buff *skb, + unsigned long extra_jiffies) +{ + __nf_ct_refresh_acct(ct, 0, skb, extra_jiffies, 0); +} + +/* These are for NAT. Icky. */ +/* Update TCP window tracking data when NAT mangles the packet */ +extern void nf_conntrack_tcp_update(struct sk_buff *skb, + unsigned int dataoff, + struct nf_conn *conntrack, + int dir); + +/* Call me when a conntrack is destroyed. */ +extern void (*nf_conntrack_destroyed)(struct nf_conn *conntrack); + +/* Fake conntrack entry for untracked connections */ +extern struct nf_conn nf_conntrack_untracked; + +extern int nf_ct_no_defrag; + +/* Iterate over all conntracks: if iter returns true, it's deleted. */ +extern void +nf_ct_iterate_cleanup(int (*iter)(struct nf_conn *i, void *data), void *data); +extern void nf_conntrack_free(struct nf_conn *ct); +extern struct nf_conn * +nf_conntrack_alloc(const struct nf_conntrack_tuple *orig, + const struct nf_conntrack_tuple *repl); + +/* It's confirmed if it is, or has been in the hash table. */ +static inline int nf_ct_is_confirmed(struct nf_conn *ct) +{ + return test_bit(IPS_CONFIRMED_BIT, &ct->status); +} + +static inline int nf_ct_is_dying(struct nf_conn *ct) +{ + return test_bit(IPS_DYING_BIT, &ct->status); +} + +extern unsigned int nf_conntrack_htable_size; + +#define NF_CT_STAT_INC(count) (__get_cpu_var(nf_conntrack_stat).count++) + +#ifdef CONFIG_NF_CONNTRACK_EVENTS +#include <linux/notifier.h> +#include <linux/interrupt.h> + +struct nf_conntrack_ecache { + struct nf_conn *ct; + unsigned int events; +}; +DECLARE_PER_CPU(struct nf_conntrack_ecache, nf_conntrack_ecache); + +#define CONNTRACK_ECACHE(x) (__get_cpu_var(nf_conntrack_ecache).x) + +extern struct notifier_block *nf_conntrack_chain; +extern struct notifier_block *nf_conntrack_expect_chain; + +static inline int nf_conntrack_register_notifier(struct notifier_block *nb) +{ + return notifier_chain_register(&nf_conntrack_chain, nb); +} + +static inline int nf_conntrack_unregister_notifier(struct notifier_block *nb) +{ + return notifier_chain_unregister(&nf_conntrack_chain, nb); +} + +static inline int +nf_conntrack_expect_register_notifier(struct notifier_block *nb) +{ + return notifier_chain_register(&nf_conntrack_expect_chain, nb); +} + +static inline int +nf_conntrack_expect_unregister_notifier(struct notifier_block *nb) +{ + return notifier_chain_unregister(&nf_conntrack_expect_chain, nb); +} + +extern void nf_ct_deliver_cached_events(const struct nf_conn *ct); +extern void __nf_ct_event_cache_init(struct nf_conn *ct); + +static inline void +nf_conntrack_event_cache(enum ip_conntrack_events event, + const struct sk_buff *skb) +{ + struct nf_conn *ct = (struct nf_conn *)skb->nfct; + struct nf_conntrack_ecache *ecache; + + local_bh_disable(); + ecache = &__get_cpu_var(nf_conntrack_ecache); + if (ct != ecache->ct) + __nf_ct_event_cache_init(ct); + ecache->events |= event; + local_bh_enable(); +} + +static inline void nf_conntrack_event(enum ip_conntrack_events event, + struct nf_conn *ct) +{ + if (nf_ct_is_confirmed(ct) && !nf_ct_is_dying(ct)) + notifier_call_chain(&nf_conntrack_chain, event, ct); +} + +static inline void +nf_conntrack_expect_event(enum ip_conntrack_expect_events event, + struct nf_conntrack_expect *exp) +{ + notifier_call_chain(&nf_conntrack_expect_chain, event, exp); +} +#else /* CONFIG_NF_CONNTRACK_EVENTS */ +static inline void nf_conntrack_event_cache(enum ip_conntrack_events event, + const struct sk_buff *skb) {} +static inline void nf_conntrack_event(enum ip_conntrack_events event, + struct nf_conn *ct) {} +static inline void nf_ct_deliver_cached_events(const struct nf_conn *ct) {} +static inline void +nf_conntrack_expect_event(enum ip_conntrack_expect_events event, + struct nf_conntrack_expect *exp) {} +#endif /* CONFIG_NF_CONNTRACK_EVENTS */ + +/* no helper, no nat */ +#define NF_CT_F_BASIC 0 +/* for helper */ +#define NF_CT_F_HELP 1 +/* for nat. */ +#define NF_CT_F_NAT 2 +#define NF_CT_F_NUM 4 + +extern int +nf_conntrack_register_cache(u_int32_t features, const char *name, size_t size, + int (*init_conntrack)(struct nf_conn *, u_int32_t)); +extern void +nf_conntrack_unregister_cache(u_int32_t features); + +#endif /* __KERNEL__ */ +#endif /* _NF_CONNTRACK_H */ diff --git a/include/net/netfilter/nf_conntrack_compat.h b/include/net/netfilter/nf_conntrack_compat.h new file mode 100644 index 000000000000..3cac19fb3648 --- /dev/null +++ b/include/net/netfilter/nf_conntrack_compat.h @@ -0,0 +1,108 @@ +#ifndef _NF_CONNTRACK_COMPAT_H +#define _NF_CONNTRACK_COMPAT_H + +#ifdef __KERNEL__ + +#if defined(CONFIG_IP_NF_CONNTRACK) || defined(CONFIG_IP_NF_CONNTRACK_MODULE) + +#include <linux/netfilter_ipv4/ip_conntrack.h> + +#ifdef CONFIG_IP_NF_CONNTRACK_MARK +static inline u_int32_t *nf_ct_get_mark(const struct sk_buff *skb, + u_int32_t *ctinfo) +{ + struct ip_conntrack *ct = ip_conntrack_get(skb, ctinfo); + + if (ct) + return &ct->mark; + else + return NULL; +} +#endif /* CONFIG_IP_NF_CONNTRACK_MARK */ + +#ifdef CONFIG_IP_NF_CT_ACCT +static inline struct ip_conntrack_counter * +nf_ct_get_counters(const struct sk_buff *skb) +{ + enum ip_conntrack_info ctinfo; + struct ip_conntrack *ct = ip_conntrack_get(skb, &ctinfo); + + if (ct) + return ct->counters; + else + return NULL; +} +#endif /* CONFIG_IP_NF_CT_ACCT */ + +static inline int nf_ct_is_untracked(const struct sk_buff *skb) +{ + return (skb->nfct == &ip_conntrack_untracked.ct_general); +} + +static inline void nf_ct_untrack(struct sk_buff *skb) +{ + skb->nfct = &ip_conntrack_untracked.ct_general; +} + +static inline int nf_ct_get_ctinfo(const struct sk_buff *skb, + enum ip_conntrack_info *ctinfo) +{ + struct ip_conntrack *ct = ip_conntrack_get(skb, ctinfo); + return (ct != NULL); +} + +#else /* CONFIG_IP_NF_CONNTRACK */ + +#include <net/netfilter/ipv4/nf_conntrack_ipv4.h> +#include <net/netfilter/nf_conntrack.h> + +#ifdef CONFIG_NF_CONNTRACK_MARK + +static inline u_int32_t *nf_ct_get_mark(const struct sk_buff *skb, + u_int32_t *ctinfo) +{ + struct nf_conn *ct = nf_ct_get(skb, ctinfo); + + if (ct) + return &ct->mark; + else + return NULL; +} +#endif /* CONFIG_NF_CONNTRACK_MARK */ + +#ifdef CONFIG_NF_CT_ACCT +static inline struct ip_conntrack_counter * +nf_ct_get_counters(const struct sk_buff *skb) +{ + enum ip_conntrack_info ctinfo; + struct nf_conn *ct = nf_ct_get(skb, &ctinfo); + + if (ct) + return ct->counters; + else + return NULL; +} +#endif /* CONFIG_NF_CT_ACCT */ + +static inline int nf_ct_is_untracked(const struct sk_buff *skb) +{ + return (skb->nfct == &nf_conntrack_untracked.ct_general); +} + +static inline void nf_ct_untrack(struct sk_buff *skb) +{ + skb->nfct = &nf_conntrack_untracked.ct_general; +} + +static inline int nf_ct_get_ctinfo(const struct sk_buff *skb, + enum ip_conntrack_info *ctinfo) +{ + struct nf_conn *ct = nf_ct_get(skb, ctinfo); + return (ct != NULL); +} + +#endif /* CONFIG_IP_NF_CONNTRACK */ + +#endif /* __KERNEL__ */ + +#endif /* _NF_CONNTRACK_COMPAT_H */ diff --git a/include/net/netfilter/nf_conntrack_core.h b/include/net/netfilter/nf_conntrack_core.h new file mode 100644 index 000000000000..da254525a4ce --- /dev/null +++ b/include/net/netfilter/nf_conntrack_core.h @@ -0,0 +1,76 @@ +/* + * This header is used to share core functionality between the + * standalone connection tracking module, and the compatibility layer's use + * of connection tracking. + * + * 16 Dec 2003: Yasuyuki Kozakai @USAGI <yasuyuki.kozakai@toshiba.co.jp> + * - generalize L3 protocol dependent part. + * + * Derived from include/linux/netfiter_ipv4/ip_conntrack_core.h + */ + +#ifndef _NF_CONNTRACK_CORE_H +#define _NF_CONNTRACK_CORE_H + +#include <linux/netfilter.h> + +/* This header is used to share core functionality between the + standalone connection tracking module, and the compatibility layer's use + of connection tracking. */ +extern unsigned int nf_conntrack_in(int pf, + unsigned int hooknum, + struct sk_buff **pskb); + +extern int nf_conntrack_init(void); +extern void nf_conntrack_cleanup(void); + +struct nf_conntrack_l3proto; +extern struct nf_conntrack_l3proto *nf_ct_find_l3proto(u_int16_t pf); +/* Like above, but you already have conntrack read lock. */ +extern struct nf_conntrack_l3proto *__nf_ct_find_l3proto(u_int16_t l3proto); + +struct nf_conntrack_protocol; + +extern int +nf_ct_get_tuple(const struct sk_buff *skb, + unsigned int nhoff, + unsigned int dataoff, + u_int16_t l3num, + u_int8_t protonum, + struct nf_conntrack_tuple *tuple, + const struct nf_conntrack_l3proto *l3proto, + const struct nf_conntrack_protocol *protocol); + +extern int +nf_ct_invert_tuple(struct nf_conntrack_tuple *inverse, + const struct nf_conntrack_tuple *orig, + const struct nf_conntrack_l3proto *l3proto, + const struct nf_conntrack_protocol *protocol); + +/* Find a connection corresponding to a tuple. */ +extern struct nf_conntrack_tuple_hash * +nf_conntrack_find_get(const struct nf_conntrack_tuple *tuple, + const struct nf_conn *ignored_conntrack); + +extern int __nf_conntrack_confirm(struct sk_buff **pskb); + +/* Confirm a connection: returns NF_DROP if packet must be dropped. */ +static inline int nf_conntrack_confirm(struct sk_buff **pskb) +{ + struct nf_conn *ct = (struct nf_conn *)(*pskb)->nfct; + int ret = NF_ACCEPT; + + if (ct) { + if (!nf_ct_is_confirmed(ct)) + ret = __nf_conntrack_confirm(pskb); + nf_ct_deliver_cached_events(ct); + } + return ret; +} + +extern void __nf_conntrack_attach(struct sk_buff *nskb, struct sk_buff *skb); + +extern struct list_head *nf_conntrack_hash; +extern struct list_head nf_conntrack_expect_list; +extern rwlock_t nf_conntrack_lock ; +#endif /* _NF_CONNTRACK_CORE_H */ diff --git a/include/net/netfilter/nf_conntrack_helper.h b/include/net/netfilter/nf_conntrack_helper.h new file mode 100644 index 000000000000..5a66b2a3a623 --- /dev/null +++ b/include/net/netfilter/nf_conntrack_helper.h @@ -0,0 +1,51 @@ +/* + * connection tracking helpers. + * + * 16 Dec 2003: Yasuyuki Kozakai @USAGI <yasuyuki.kozakai@toshiba.co.jp> + * - generalize L3 protocol dependent part. + * + * Derived from include/linux/netfiter_ipv4/ip_conntrack_helper.h + */ + +#ifndef _NF_CONNTRACK_HELPER_H +#define _NF_CONNTRACK_HELPER_H +#include <net/netfilter/nf_conntrack.h> + +struct module; + +struct nf_conntrack_helper +{ + struct list_head list; /* Internal use. */ + + const char *name; /* name of the module */ + struct module *me; /* pointer to self */ + unsigned int max_expected; /* Maximum number of concurrent + * expected connections */ + unsigned int timeout; /* timeout for expecteds */ + + /* Mask of things we will help (compared against server response) */ + struct nf_conntrack_tuple tuple; + struct nf_conntrack_tuple mask; + + /* Function to call when data passes; return verdict, or -1 to + invalidate. */ + int (*help)(struct sk_buff **pskb, + unsigned int protoff, + struct nf_conn *ct, + enum ip_conntrack_info conntrackinfo); +}; + +extern int nf_conntrack_helper_register(struct nf_conntrack_helper *); +extern void nf_conntrack_helper_unregister(struct nf_conntrack_helper *); + +/* Allocate space for an expectation: this is mandatory before calling + nf_conntrack_expect_related. You will have to call put afterwards. */ +extern struct nf_conntrack_expect * +nf_conntrack_expect_alloc(struct nf_conn *master); +extern void nf_conntrack_expect_put(struct nf_conntrack_expect *exp); + +/* Add an expected connection: can have more than one per connection */ +extern int nf_conntrack_expect_related(struct nf_conntrack_expect *exp); +extern void nf_conntrack_unexpect_related(struct nf_conntrack_expect *exp); + +#endif /*_NF_CONNTRACK_HELPER_H*/ diff --git a/include/net/netfilter/nf_conntrack_l3proto.h b/include/net/netfilter/nf_conntrack_l3proto.h new file mode 100644 index 000000000000..01663e5b33df --- /dev/null +++ b/include/net/netfilter/nf_conntrack_l3proto.h @@ -0,0 +1,93 @@ +/* + * Copyright (C)2003,2004 USAGI/WIDE Project + * + * Header for use in defining a given L3 protocol for connection tracking. + * + * Author: + * Yasuyuki Kozakai @USAGI <yasuyuki.kozakai@toshiba.co.jp> + * + * Derived from include/netfilter_ipv4/ip_conntrack_protocol.h + */ + +#ifndef _NF_CONNTRACK_L3PROTO_H +#define _NF_CONNTRACK_L3PROTO_H +#include <linux/seq_file.h> +#include <net/netfilter/nf_conntrack.h> + +struct nf_conntrack_l3proto +{ + /* Next pointer. */ + struct list_head list; + + /* L3 Protocol Family number. ex) PF_INET */ + u_int16_t l3proto; + + /* Protocol name */ + const char *name; + + /* + * Try to fill in the third arg: nhoff is offset of l3 proto + * hdr. Return true if possible. + */ + int (*pkt_to_tuple)(const struct sk_buff *skb, unsigned int nhoff, + struct nf_conntrack_tuple *tuple); + + /* + * Invert the per-proto part of the tuple: ie. turn xmit into reply. + * Some packets can't be inverted: return 0 in that case. + */ + int (*invert_tuple)(struct nf_conntrack_tuple *inverse, + const struct nf_conntrack_tuple *orig); + + /* Print out the per-protocol part of the tuple. */ + int (*print_tuple)(struct seq_file *s, + const struct nf_conntrack_tuple *); + + /* Print out the private part of the conntrack. */ + int (*print_conntrack)(struct seq_file *s, const struct nf_conn *); + + /* Returns verdict for packet, or -1 for invalid. */ + int (*packet)(struct nf_conn *conntrack, + const struct sk_buff *skb, + enum ip_conntrack_info ctinfo); + + /* + * Called when a new connection for this protocol found; + * returns TRUE if it's OK. If so, packet() called next. + */ + int (*new)(struct nf_conn *conntrack, const struct sk_buff *skb); + + /* Called when a conntrack entry is destroyed */ + void (*destroy)(struct nf_conn *conntrack); + + /* + * Called before tracking. + * *dataoff: offset of protocol header (TCP, UDP,...) in *pskb + * *protonum: protocol number + */ + int (*prepare)(struct sk_buff **pskb, unsigned int hooknum, + unsigned int *dataoff, u_int8_t *protonum); + + u_int32_t (*get_features)(const struct nf_conntrack_tuple *tuple); + + /* Module (if any) which this is connected to. */ + struct module *me; +}; + +extern struct nf_conntrack_l3proto *nf_ct_l3protos[AF_MAX]; + +/* Protocol registration. */ +extern int nf_conntrack_l3proto_register(struct nf_conntrack_l3proto *proto); +extern void nf_conntrack_l3proto_unregister(struct nf_conntrack_l3proto *proto); + +static inline struct nf_conntrack_l3proto * +nf_ct_find_l3proto(u_int16_t l3proto) +{ + return nf_ct_l3protos[l3proto]; +} + +/* Existing built-in protocols */ +extern struct nf_conntrack_l3proto nf_conntrack_l3proto_ipv4; +extern struct nf_conntrack_l3proto nf_conntrack_l3proto_ipv6; +extern struct nf_conntrack_l3proto nf_conntrack_generic_l3proto; +#endif /*_NF_CONNTRACK_L3PROTO_H*/ diff --git a/include/net/netfilter/nf_conntrack_protocol.h b/include/net/netfilter/nf_conntrack_protocol.h new file mode 100644 index 000000000000..b3afda35397a --- /dev/null +++ b/include/net/netfilter/nf_conntrack_protocol.h @@ -0,0 +1,105 @@ +/* + * Header for use in defining a given protocol for connection tracking. + * + * 16 Dec 2003: Yasuyuki Kozakai @USAGI <yasuyuki.kozakai@toshiba.co.jp> + * - generalized L3 protocol dependent part. + * + * Derived from include/linux/netfiter_ipv4/ip_conntrack_protcol.h + */ + +#ifndef _NF_CONNTRACK_PROTOCOL_H +#define _NF_CONNTRACK_PROTOCOL_H +#include <net/netfilter/nf_conntrack.h> + +struct seq_file; + +struct nf_conntrack_protocol +{ + /* Next pointer. */ + struct list_head list; + + /* L3 Protocol number. */ + u_int16_t l3proto; + + /* Protocol number. */ + u_int8_t proto; + + /* Protocol name */ + const char *name; + + /* Try to fill in the third arg: dataoff is offset past network protocol + hdr. Return true if possible. */ + int (*pkt_to_tuple)(const struct sk_buff *skb, + unsigned int dataoff, + struct nf_conntrack_tuple *tuple); + + /* Invert the per-proto part of the tuple: ie. turn xmit into reply. + * Some packets can't be inverted: return 0 in that case. + */ + int (*invert_tuple)(struct nf_conntrack_tuple *inverse, + const struct nf_conntrack_tuple *orig); + + /* Print out the per-protocol part of the tuple. Return like seq_* */ + int (*print_tuple)(struct seq_file *s, + const struct nf_conntrack_tuple *); + + /* Print out the private part of the conntrack. */ + int (*print_conntrack)(struct seq_file *s, const struct nf_conn *); + + /* Returns verdict for packet, or -1 for invalid. */ + int (*packet)(struct nf_conn *conntrack, + const struct sk_buff *skb, + unsigned int dataoff, + enum ip_conntrack_info ctinfo, + int pf, + unsigned int hooknum); + + /* Called when a new connection for this protocol found; + * returns TRUE if it's OK. If so, packet() called next. */ + int (*new)(struct nf_conn *conntrack, const struct sk_buff *skb, + unsigned int dataoff); + + /* Called when a conntrack entry is destroyed */ + void (*destroy)(struct nf_conn *conntrack); + + int (*error)(struct sk_buff *skb, unsigned int dataoff, + enum ip_conntrack_info *ctinfo, + int pf, unsigned int hooknum); + + /* Module (if any) which this is connected to. */ + struct module *me; +}; + +/* Existing built-in protocols */ +extern struct nf_conntrack_protocol nf_conntrack_protocol_tcp6; +extern struct nf_conntrack_protocol nf_conntrack_protocol_udp4; +extern struct nf_conntrack_protocol nf_conntrack_protocol_udp6; +extern struct nf_conntrack_protocol nf_conntrack_generic_protocol; + +#define MAX_NF_CT_PROTO 256 +extern struct nf_conntrack_protocol **nf_ct_protos[PF_MAX]; + +extern struct nf_conntrack_protocol * +nf_ct_find_proto(u_int16_t l3proto, u_int8_t protocol); + +/* Protocol registration. */ +extern int nf_conntrack_protocol_register(struct nf_conntrack_protocol *proto); +extern void nf_conntrack_protocol_unregister(struct nf_conntrack_protocol *proto); + +/* Log invalid packets */ +extern unsigned int nf_ct_log_invalid; + +#ifdef CONFIG_SYSCTL +#ifdef DEBUG_INVALID_PACKETS +#define LOG_INVALID(proto) \ + (nf_ct_log_invalid == (proto) || nf_ct_log_invalid == IPPROTO_RAW) +#else +#define LOG_INVALID(proto) \ + ((nf_ct_log_invalid == (proto) || nf_ct_log_invalid == IPPROTO_RAW) \ + && net_ratelimit()) +#endif +#else +#define LOG_INVALID(proto) 0 +#endif /* CONFIG_SYSCTL */ + +#endif /*_NF_CONNTRACK_PROTOCOL_H*/ diff --git a/include/net/netfilter/nf_conntrack_tuple.h b/include/net/netfilter/nf_conntrack_tuple.h new file mode 100644 index 000000000000..14ce790e5c65 --- /dev/null +++ b/include/net/netfilter/nf_conntrack_tuple.h @@ -0,0 +1,190 @@ +/* + * Definitions and Declarations for tuple. + * + * 16 Dec 2003: Yasuyuki Kozakai @USAGI <yasuyuki.kozakai@toshiba.co.jp> + * - generalize L3 protocol dependent part. + * + * Derived from include/linux/netfiter_ipv4/ip_conntrack_tuple.h + */ + +#ifndef _NF_CONNTRACK_TUPLE_H +#define _NF_CONNTRACK_TUPLE_H + +#include <linux/netfilter/nf_conntrack_tuple_common.h> + +/* A `tuple' is a structure containing the information to uniquely + identify a connection. ie. if two packets have the same tuple, they + are in the same connection; if not, they are not. + + We divide the structure along "manipulatable" and + "non-manipulatable" lines, for the benefit of the NAT code. +*/ + +#define NF_CT_TUPLE_L3SIZE 4 + +/* The l3 protocol-specific manipulable parts of the tuple: always in + network order! */ +union nf_conntrack_man_l3proto { + u_int32_t all[NF_CT_TUPLE_L3SIZE]; + u_int32_t ip; + u_int32_t ip6[4]; +}; + +/* The protocol-specific manipulable parts of the tuple: always in + network order! */ +union nf_conntrack_man_proto +{ + /* Add other protocols here. */ + u_int16_t all; + + struct { + u_int16_t port; + } tcp; + struct { + u_int16_t port; + } udp; + struct { + u_int16_t id; + } icmp; + struct { + u_int16_t port; + } sctp; +}; + +/* The manipulable part of the tuple. */ +struct nf_conntrack_man +{ + union nf_conntrack_man_l3proto u3; + union nf_conntrack_man_proto u; + /* Layer 3 protocol */ + u_int16_t l3num; +}; + +/* This contains the information to distinguish a connection. */ +struct nf_conntrack_tuple +{ + struct nf_conntrack_man src; + + /* These are the parts of the tuple which are fixed. */ + struct { + union { + u_int32_t all[NF_CT_TUPLE_L3SIZE]; + u_int32_t ip; + u_int32_t ip6[4]; + } u3; + union { + /* Add other protocols here. */ + u_int16_t all; + + struct { + u_int16_t port; + } tcp; + struct { + u_int16_t port; + } udp; + struct { + u_int8_t type, code; + } icmp; + struct { + u_int16_t port; + } sctp; + } u; + + /* The protocol. */ + u_int8_t protonum; + + /* The direction (for tuplehash) */ + u_int8_t dir; + } dst; +}; + +/* This is optimized opposed to a memset of the whole structure. Everything we + * really care about is the source/destination unions */ +#define NF_CT_TUPLE_U_BLANK(tuple) \ + do { \ + (tuple)->src.u.all = 0; \ + (tuple)->dst.u.all = 0; \ + memset(&(tuple)->src.u3, 0, sizeof((tuple)->src.u3)); \ + memset(&(tuple)->dst.u3, 0, sizeof((tuple)->dst.u3)); \ + } while (0) + +#ifdef __KERNEL__ + +#define NF_CT_DUMP_TUPLE(tp) \ +DEBUGP("tuple %p: %u %u %04x:%04x:%04x:%04x:%04x:%04x:%04x:%04x %hu -> %04x:%04x:%04x:%04x:%04x:%04x:%04x:%04x %hu\n", \ + (tp), (tp)->src.l3num, (tp)->dst.protonum, \ + NIP6(*(struct in6_addr *)(tp)->src.u3.all), ntohs((tp)->src.u.all), \ + NIP6(*(struct in6_addr *)(tp)->dst.u3.all), ntohs((tp)->dst.u.all)) + +/* If we're the first tuple, it's the original dir. */ +#define NF_CT_DIRECTION(h) \ + ((enum ip_conntrack_dir)(h)->tuple.dst.dir) + +/* Connections have two entries in the hash table: one for each way */ +struct nf_conntrack_tuple_hash +{ + struct list_head list; + + struct nf_conntrack_tuple tuple; +}; + +#endif /* __KERNEL__ */ + +static inline int nf_ct_tuple_src_equal(const struct nf_conntrack_tuple *t1, + const struct nf_conntrack_tuple *t2) +{ + return (t1->src.u3.all[0] == t2->src.u3.all[0] && + t1->src.u3.all[1] == t2->src.u3.all[1] && + t1->src.u3.all[2] == t2->src.u3.all[2] && + t1->src.u3.all[3] == t2->src.u3.all[3] && + t1->src.u.all == t2->src.u.all && + t1->src.l3num == t2->src.l3num && + t1->dst.protonum == t2->dst.protonum); +} + +static inline int nf_ct_tuple_dst_equal(const struct nf_conntrack_tuple *t1, + const struct nf_conntrack_tuple *t2) +{ + return (t1->dst.u3.all[0] == t2->dst.u3.all[0] && + t1->dst.u3.all[1] == t2->dst.u3.all[1] && + t1->dst.u3.all[2] == t2->dst.u3.all[2] && + t1->dst.u3.all[3] == t2->dst.u3.all[3] && + t1->dst.u.all == t2->dst.u.all && + t1->src.l3num == t2->src.l3num && + t1->dst.protonum == t2->dst.protonum); +} + +static inline int nf_ct_tuple_equal(const struct nf_conntrack_tuple *t1, + const struct nf_conntrack_tuple *t2) +{ + return nf_ct_tuple_src_equal(t1, t2) && nf_ct_tuple_dst_equal(t1, t2); +} + +static inline int nf_ct_tuple_mask_cmp(const struct nf_conntrack_tuple *t, + const struct nf_conntrack_tuple *tuple, + const struct nf_conntrack_tuple *mask) +{ + int count = 0; + + for (count = 0; count < NF_CT_TUPLE_L3SIZE; count++){ + if ((t->src.u3.all[count] ^ tuple->src.u3.all[count]) & + mask->src.u3.all[count]) + return 0; + } + + for (count = 0; count < NF_CT_TUPLE_L3SIZE; count++){ + if ((t->dst.u3.all[count] ^ tuple->dst.u3.all[count]) & + mask->dst.u3.all[count]) + return 0; + } + + if ((t->src.u.all ^ tuple->src.u.all) & mask->src.u.all || + (t->dst.u.all ^ tuple->dst.u.all) & mask->dst.u.all || + (t->src.l3num ^ tuple->src.l3num) & mask->src.l3num || + (t->dst.protonum ^ tuple->dst.protonum) & mask->dst.protonum) + return 0; + + return 1; +} + +#endif /* _NF_CONNTRACK_TUPLE_H */ diff --git a/include/net/netlink.h b/include/net/netlink.h new file mode 100644 index 000000000000..640c26a90cf1 --- /dev/null +++ b/include/net/netlink.h @@ -0,0 +1,883 @@ +#ifndef __NET_NETLINK_H +#define __NET_NETLINK_H + +#include <linux/types.h> +#include <linux/netlink.h> + +/* ======================================================================== + * Netlink Messages and Attributes Interface (As Seen On TV) + * ------------------------------------------------------------------------ + * Messages Interface + * ------------------------------------------------------------------------ + * + * Message Format: + * <--- nlmsg_total_size(payload) ---> + * <-- nlmsg_msg_size(payload) -> + * +----------+- - -+-------------+- - -+-------- - - + * | nlmsghdr | Pad | Payload | Pad | nlmsghdr + * +----------+- - -+-------------+- - -+-------- - - + * nlmsg_data(nlh)---^ ^ + * nlmsg_next(nlh)-----------------------+ + * + * Payload Format: + * <---------------------- nlmsg_len(nlh) ---------------------> + * <------ hdrlen ------> <- nlmsg_attrlen(nlh, hdrlen) -> + * +----------------------+- - -+--------------------------------+ + * | Family Header | Pad | Attributes | + * +----------------------+- - -+--------------------------------+ + * nlmsg_attrdata(nlh, hdrlen)---^ + * + * Data Structures: + * struct nlmsghdr netlink message header + * + * Message Construction: + * nlmsg_new() create a new netlink message + * nlmsg_put() add a netlink message to an skb + * nlmsg_put_answer() callback based nlmsg_put() + * nlmsg_end() finanlize netlink message + * nlmsg_cancel() cancel message construction + * nlmsg_free() free a netlink message + * + * Message Sending: + * nlmsg_multicast() multicast message to several groups + * nlmsg_unicast() unicast a message to a single socket + * + * Message Length Calculations: + * nlmsg_msg_size(payload) length of message w/o padding + * nlmsg_total_size(payload) length of message w/ padding + * nlmsg_padlen(payload) length of padding at tail + * + * Message Payload Access: + * nlmsg_data(nlh) head of message payload + * nlmsg_len(nlh) length of message payload + * nlmsg_attrdata(nlh, hdrlen) head of attributes data + * nlmsg_attrlen(nlh, hdrlen) length of attributes data + * + * Message Parsing: + * nlmsg_ok(nlh, remaining) does nlh fit into remaining bytes? + * nlmsg_next(nlh, remaining) get next netlink message + * nlmsg_parse() parse attributes of a message + * nlmsg_find_attr() find an attribute in a message + * nlmsg_for_each_msg() loop over all messages + * nlmsg_validate() validate netlink message incl. attrs + * nlmsg_for_each_attr() loop over all attributes + * + * ------------------------------------------------------------------------ + * Attributes Interface + * ------------------------------------------------------------------------ + * + * Attribute Format: + * <------- nla_total_size(payload) -------> + * <---- nla_attr_size(payload) -----> + * +----------+- - -+- - - - - - - - - +- - -+-------- - - + * | Header | Pad | Payload | Pad | Header + * +----------+- - -+- - - - - - - - - +- - -+-------- - - + * <- nla_len(nla) -> ^ + * nla_data(nla)----^ | + * nla_next(nla)-----------------------------' + * + * Data Structures: + * struct nlattr netlink attribtue header + * + * Attribute Construction: + * nla_reserve(skb, type, len) reserve skb tailroom for an attribute + * nla_put(skb, type, len, data) add attribute to skb + * + * Attribute Construction for Basic Types: + * nla_put_u8(skb, type, value) add u8 attribute to skb + * nla_put_u16(skb, type, value) add u16 attribute to skb + * nla_put_u32(skb, type, value) add u32 attribute to skb + * nla_put_u64(skb, type, value) add u64 attribute to skb + * nla_put_string(skb, type, str) add string attribute to skb + * nla_put_flag(skb, type) add flag attribute to skb + * nla_put_msecs(skb, type, jiffies) add msecs attribute to skb + * + * Exceptions Based Attribute Construction: + * NLA_PUT(skb, type, len, data) add attribute to skb + * NLA_PUT_U8(skb, type, value) add u8 attribute to skb + * NLA_PUT_U16(skb, type, value) add u16 attribute to skb + * NLA_PUT_U32(skb, type, value) add u32 attribute to skb + * NLA_PUT_U64(skb, type, value) add u64 attribute to skb + * NLA_PUT_STRING(skb, type, str) add string attribute to skb + * NLA_PUT_FLAG(skb, type) add flag attribute to skb + * NLA_PUT_MSECS(skb, type, jiffies) add msecs attribute to skb + * + * The meaning of these functions is equal to their lower case + * variants but they jump to the label nla_put_failure in case + * of a failure. + * + * Nested Attributes Construction: + * nla_nest_start(skb, type) start a nested attribute + * nla_nest_end(skb, nla) finalize a nested attribute + * nla_nest_cancel(skb, nla) cancel nested attribute construction + * + * Attribute Length Calculations: + * nla_attr_size(payload) length of attribute w/o padding + * nla_total_size(payload) length of attribute w/ padding + * nla_padlen(payload) length of padding + * + * Attribute Payload Access: + * nla_data(nla) head of attribute payload + * nla_len(nla) length of attribute payload + * + * Attribute Payload Access for Basic Types: + * nla_get_u8(nla) get payload for a u8 attribute + * nla_get_u16(nla) get payload for a u16 attribute + * nla_get_u32(nla) get payload for a u32 attribute + * nla_get_u64(nla) get payload for a u64 attribute + * nla_get_flag(nla) return 1 if flag is true + * nla_get_msecs(nla) get payload for a msecs attribute + * + * Attribute Misc: + * nla_memcpy(dest, nla, count) copy attribute into memory + * nla_memcmp(nla, data, size) compare attribute with memory area + * nla_strlcpy(dst, nla, size) copy attribute to a sized string + * nla_strcmp(nla, str) compare attribute with string + * + * Attribute Parsing: + * nla_ok(nla, remaining) does nla fit into remaining bytes? + * nla_next(nla, remaining) get next netlink attribute + * nla_validate() validate a stream of attributes + * nla_find() find attribute in stream of attributes + * nla_parse() parse and validate stream of attrs + * nla_parse_nested() parse nested attribuets + * nla_for_each_attr() loop over all attributes + *========================================================================= + */ + + /** + * Standard attribute types to specify validation policy + */ +enum { + NLA_UNSPEC, + NLA_U8, + NLA_U16, + NLA_U32, + NLA_U64, + NLA_STRING, + NLA_FLAG, + NLA_MSECS, + NLA_NESTED, + __NLA_TYPE_MAX, +}; + +#define NLA_TYPE_MAX (__NLA_TYPE_MAX - 1) + +/** + * struct nla_policy - attribute validation policy + * @type: Type of attribute or NLA_UNSPEC + * @minlen: Minimal length of payload required to be available + * + * Policies are defined as arrays of this struct, the array must be + * accessible by attribute type up to the highest identifier to be expected. + * + * Example: + * static struct nla_policy my_policy[ATTR_MAX+1] __read_mostly = { + * [ATTR_FOO] = { .type = NLA_U16 }, + * [ATTR_BAR] = { .type = NLA_STRING }, + * [ATTR_BAZ] = { .minlen = sizeof(struct mystruct) }, + * }; + */ +struct nla_policy { + u16 type; + u16 minlen; +}; + +extern void netlink_run_queue(struct sock *sk, unsigned int *qlen, + int (*cb)(struct sk_buff *, + struct nlmsghdr *, int *)); +extern void netlink_queue_skip(struct nlmsghdr *nlh, + struct sk_buff *skb); + +extern int nla_validate(struct nlattr *head, int len, int maxtype, + struct nla_policy *policy); +extern int nla_parse(struct nlattr *tb[], int maxtype, + struct nlattr *head, int len, + struct nla_policy *policy); +extern struct nlattr * nla_find(struct nlattr *head, int len, int attrtype); +extern size_t nla_strlcpy(char *dst, const struct nlattr *nla, + size_t dstsize); +extern int nla_memcpy(void *dest, struct nlattr *src, int count); +extern int nla_memcmp(const struct nlattr *nla, const void *data, + size_t size); +extern int nla_strcmp(const struct nlattr *nla, const char *str); +extern struct nlattr * __nla_reserve(struct sk_buff *skb, int attrtype, + int attrlen); +extern struct nlattr * nla_reserve(struct sk_buff *skb, int attrtype, + int attrlen); +extern void __nla_put(struct sk_buff *skb, int attrtype, + int attrlen, const void *data); +extern int nla_put(struct sk_buff *skb, int attrtype, + int attrlen, const void *data); + +/************************************************************************** + * Netlink Messages + **************************************************************************/ + +/** + * nlmsg_msg_size - length of netlink message not including padding + * @payload: length of message payload + */ +static inline int nlmsg_msg_size(int payload) +{ + return NLMSG_HDRLEN + payload; +} + +/** + * nlmsg_total_size - length of netlink message including padding + * @payload: length of message payload + */ +static inline int nlmsg_total_size(int payload) +{ + return NLMSG_ALIGN(nlmsg_msg_size(payload)); +} + +/** + * nlmsg_padlen - length of padding at the message's tail + * @payload: length of message payload + */ +static inline int nlmsg_padlen(int payload) +{ + return nlmsg_total_size(payload) - nlmsg_msg_size(payload); +} + +/** + * nlmsg_data - head of message payload + * @nlh: netlink messsage header + */ +static inline void *nlmsg_data(const struct nlmsghdr *nlh) +{ + return (unsigned char *) nlh + NLMSG_HDRLEN; +} + +/** + * nlmsg_len - length of message payload + * @nlh: netlink message header + */ +static inline int nlmsg_len(const struct nlmsghdr *nlh) +{ + return nlh->nlmsg_len - NLMSG_HDRLEN; +} + +/** + * nlmsg_attrdata - head of attributes data + * @nlh: netlink message header + * @hdrlen: length of family specific header + */ +static inline struct nlattr *nlmsg_attrdata(const struct nlmsghdr *nlh, + int hdrlen) +{ + unsigned char *data = nlmsg_data(nlh); + return (struct nlattr *) (data + NLMSG_ALIGN(hdrlen)); +} + +/** + * nlmsg_attrlen - length of attributes data + * @nlh: netlink message header + * @hdrlen: length of family specific header + */ +static inline int nlmsg_attrlen(const struct nlmsghdr *nlh, int hdrlen) +{ + return nlmsg_len(nlh) - NLMSG_ALIGN(hdrlen); +} + +/** + * nlmsg_ok - check if the netlink message fits into the remaining bytes + * @nlh: netlink message header + * @remaining: number of bytes remaining in message stream + */ +static inline int nlmsg_ok(const struct nlmsghdr *nlh, int remaining) +{ + return (remaining >= sizeof(struct nlmsghdr) && + nlh->nlmsg_len >= sizeof(struct nlmsghdr) && + nlh->nlmsg_len <= remaining); +} + +/** + * nlmsg_next - next netlink message in message stream + * @nlh: netlink message header + * @remaining: number of bytes remaining in message stream + * + * Returns the next netlink message in the message stream and + * decrements remaining by the size of the current message. + */ +static inline struct nlmsghdr *nlmsg_next(struct nlmsghdr *nlh, int *remaining) +{ + int totlen = NLMSG_ALIGN(nlh->nlmsg_len); + + *remaining -= totlen; + + return (struct nlmsghdr *) ((unsigned char *) nlh + totlen); +} + +/** + * nlmsg_parse - parse attributes of a netlink message + * @nlh: netlink message header + * @hdrlen: length of family specific header + * @tb: destination array with maxtype+1 elements + * @maxtype: maximum attribute type to be expected + * @policy: validation policy + * + * See nla_parse() + */ +static inline int nlmsg_parse(struct nlmsghdr *nlh, int hdrlen, + struct nlattr *tb[], int maxtype, + struct nla_policy *policy) +{ + if (nlh->nlmsg_len < nlmsg_msg_size(hdrlen)) + return -EINVAL; + + return nla_parse(tb, maxtype, nlmsg_attrdata(nlh, hdrlen), + nlmsg_attrlen(nlh, hdrlen), policy); +} + +/** + * nlmsg_find_attr - find a specific attribute in a netlink message + * @nlh: netlink message header + * @hdrlen: length of familiy specific header + * @attrtype: type of attribute to look for + * + * Returns the first attribute which matches the specified type. + */ +static inline struct nlattr *nlmsg_find_attr(struct nlmsghdr *nlh, + int hdrlen, int attrtype) +{ + return nla_find(nlmsg_attrdata(nlh, hdrlen), + nlmsg_attrlen(nlh, hdrlen), attrtype); +} + +/** + * nlmsg_validate - validate a netlink message including attributes + * @nlh: netlinket message header + * @hdrlen: length of familiy specific header + * @maxtype: maximum attribute type to be expected + * @policy: validation policy + */ +static inline int nlmsg_validate(struct nlmsghdr *nlh, int hdrlen, int maxtype, + struct nla_policy *policy) +{ + if (nlh->nlmsg_len < nlmsg_msg_size(hdrlen)) + return -EINVAL; + + return nla_validate(nlmsg_attrdata(nlh, hdrlen), + nlmsg_attrlen(nlh, hdrlen), maxtype, policy); +} + +/** + * nlmsg_for_each_attr - iterate over a stream of attributes + * @pos: loop counter, set to current attribute + * @nlh: netlink message header + * @hdrlen: length of familiy specific header + * @rem: initialized to len, holds bytes currently remaining in stream + */ +#define nlmsg_for_each_attr(pos, nlh, hdrlen, rem) \ + nla_for_each_attr(pos, nlmsg_attrdata(nlh, hdrlen), \ + nlmsg_attrlen(nlh, hdrlen), rem) + +#if 0 +/* FIXME: Enable once all users have been converted */ + +/** + * __nlmsg_put - Add a new netlink message to an skb + * @skb: socket buffer to store message in + * @pid: netlink process id + * @seq: sequence number of message + * @type: message type + * @payload: length of message payload + * @flags: message flags + * + * The caller is responsible to ensure that the skb provides enough + * tailroom for both the netlink header and payload. + */ +static inline struct nlmsghdr *__nlmsg_put(struct sk_buff *skb, u32 pid, + u32 seq, int type, int payload, + int flags) +{ + struct nlmsghdr *nlh; + + nlh = (struct nlmsghdr *) skb_put(skb, nlmsg_total_size(payload)); + nlh->nlmsg_type = type; + nlh->nlmsg_len = nlmsg_msg_size(payload); + nlh->nlmsg_flags = flags; + nlh->nlmsg_pid = pid; + nlh->nlmsg_seq = seq; + + memset((unsigned char *) nlmsg_data(nlh) + payload, 0, + nlmsg_padlen(payload)); + + return nlh; +} +#endif + +/** + * nlmsg_put - Add a new netlink message to an skb + * @skb: socket buffer to store message in + * @pid: netlink process id + * @seq: sequence number of message + * @type: message type + * @payload: length of message payload + * @flags: message flags + * + * Returns NULL if the tailroom of the skb is insufficient to store + * the message header and payload. + */ +static inline struct nlmsghdr *nlmsg_put(struct sk_buff *skb, u32 pid, u32 seq, + int type, int payload, int flags) +{ + if (unlikely(skb_tailroom(skb) < nlmsg_total_size(payload))) + return NULL; + + return __nlmsg_put(skb, pid, seq, type, payload, flags); +} + +/** + * nlmsg_put_answer - Add a new callback based netlink message to an skb + * @skb: socket buffer to store message in + * @cb: netlink callback + * @type: message type + * @payload: length of message payload + * @flags: message flags + * + * Returns NULL if the tailroom of the skb is insufficient to store + * the message header and payload. + */ +static inline struct nlmsghdr *nlmsg_put_answer(struct sk_buff *skb, + struct netlink_callback *cb, + int type, int payload, + int flags) +{ + return nlmsg_put(skb, NETLINK_CB(cb->skb).pid, cb->nlh->nlmsg_seq, + type, payload, flags); +} + +/** + * nlmsg_new - Allocate a new netlink message + * @size: maximum size of message + * + * Use NLMSG_GOODSIZE if size isn't know and you need a good default size. + */ +static inline struct sk_buff *nlmsg_new(int size) +{ + return alloc_skb(NLMSG_GOODSIZE, GFP_KERNEL); +} + +/** + * nlmsg_end - Finalize a netlink message + * @skb: socket buffer the message is stored in + * @nlh: netlink message header + * + * Corrects the netlink message header to include the appeneded + * attributes. Only necessary if attributes have been added to + * the message. + * + * Returns the total data length of the skb. + */ +static inline int nlmsg_end(struct sk_buff *skb, struct nlmsghdr *nlh) +{ + nlh->nlmsg_len = skb->tail - (unsigned char *) nlh; + + return skb->len; +} + +/** + * nlmsg_cancel - Cancel construction of a netlink message + * @skb: socket buffer the message is stored in + * @nlh: netlink message header + * + * Removes the complete netlink message including all + * attributes from the socket buffer again. Returns -1. + */ +static inline int nlmsg_cancel(struct sk_buff *skb, struct nlmsghdr *nlh) +{ + skb_trim(skb, (unsigned char *) nlh - skb->data); + + return -1; +} + +/** + * nlmsg_free - free a netlink message + * @skb: socket buffer of netlink message + */ +static inline void nlmsg_free(struct sk_buff *skb) +{ + kfree_skb(skb); +} + +/** + * nlmsg_multicast - multicast a netlink message + * @sk: netlink socket to spread messages to + * @skb: netlink message as socket buffer + * @pid: own netlink pid to avoid sending to yourself + * @group: multicast group id + */ +static inline int nlmsg_multicast(struct sock *sk, struct sk_buff *skb, + u32 pid, unsigned int group) +{ + int err; + + NETLINK_CB(skb).dst_group = group; + + err = netlink_broadcast(sk, skb, pid, group, GFP_KERNEL); + if (err > 0) + err = 0; + + return err; +} + +/** + * nlmsg_unicast - unicast a netlink message + * @sk: netlink socket to spread message to + * @skb: netlink message as socket buffer + * @pid: netlink pid of the destination socket + */ +static inline int nlmsg_unicast(struct sock *sk, struct sk_buff *skb, u32 pid) +{ + int err; + + err = netlink_unicast(sk, skb, pid, MSG_DONTWAIT); + if (err > 0) + err = 0; + + return err; +} + +/** + * nlmsg_for_each_msg - iterate over a stream of messages + * @pos: loop counter, set to current message + * @head: head of message stream + * @len: length of message stream + * @rem: initialized to len, holds bytes currently remaining in stream + */ +#define nlmsg_for_each_msg(pos, head, len, rem) \ + for (pos = head, rem = len; \ + nlmsg_ok(pos, rem); \ + pos = nlmsg_next(pos, &(rem))) + +/************************************************************************** + * Netlink Attributes + **************************************************************************/ + +/** + * nla_attr_size - length of attribute not including padding + * @payload: length of payload + */ +static inline int nla_attr_size(int payload) +{ + return NLA_HDRLEN + payload; +} + +/** + * nla_total_size - total length of attribute including padding + * @payload: length of payload + */ +static inline int nla_total_size(int payload) +{ + return NLA_ALIGN(nla_attr_size(payload)); +} + +/** + * nla_padlen - length of padding at the tail of attribute + * @payload: length of payload + */ +static inline int nla_padlen(int payload) +{ + return nla_total_size(payload) - nla_attr_size(payload); +} + +/** + * nla_data - head of payload + * @nla: netlink attribute + */ +static inline void *nla_data(const struct nlattr *nla) +{ + return (char *) nla + NLA_HDRLEN; +} + +/** + * nla_len - length of payload + * @nla: netlink attribute + */ +static inline int nla_len(const struct nlattr *nla) +{ + return nla->nla_len - NLA_HDRLEN; +} + +/** + * nla_ok - check if the netlink attribute fits into the remaining bytes + * @nla: netlink attribute + * @remaining: number of bytes remaining in attribute stream + */ +static inline int nla_ok(const struct nlattr *nla, int remaining) +{ + return remaining >= sizeof(*nla) && + nla->nla_len >= sizeof(*nla) && + nla->nla_len <= remaining; +} + +/** + * nla_next - next netlink attribte in attribute stream + * @nla: netlink attribute + * @remaining: number of bytes remaining in attribute stream + * + * Returns the next netlink attribute in the attribute stream and + * decrements remaining by the size of the current attribute. + */ +static inline struct nlattr *nla_next(const struct nlattr *nla, int *remaining) +{ + int totlen = NLA_ALIGN(nla->nla_len); + + *remaining -= totlen; + return (struct nlattr *) ((char *) nla + totlen); +} + +/** + * nla_parse_nested - parse nested attributes + * @tb: destination array with maxtype+1 elements + * @maxtype: maximum attribute type to be expected + * @nla: attribute containing the nested attributes + * @policy: validation policy + * + * See nla_parse() + */ +static inline int nla_parse_nested(struct nlattr *tb[], int maxtype, + struct nlattr *nla, + struct nla_policy *policy) +{ + return nla_parse(tb, maxtype, nla_data(nla), nla_len(nla), policy); +} +/** + * nla_put_u8 - Add a u16 netlink attribute to a socket buffer + * @skb: socket buffer to add attribute to + * @attrtype: attribute type + * @value: numeric value + */ +static inline int nla_put_u8(struct sk_buff *skb, int attrtype, u8 value) +{ + return nla_put(skb, attrtype, sizeof(u8), &value); +} + +/** + * nla_put_u16 - Add a u16 netlink attribute to a socket buffer + * @skb: socket buffer to add attribute to + * @attrtype: attribute type + * @value: numeric value + */ +static inline int nla_put_u16(struct sk_buff *skb, int attrtype, u16 value) +{ + return nla_put(skb, attrtype, sizeof(u16), &value); +} + +/** + * nla_put_u32 - Add a u32 netlink attribute to a socket buffer + * @skb: socket buffer to add attribute to + * @attrtype: attribute type + * @value: numeric value + */ +static inline int nla_put_u32(struct sk_buff *skb, int attrtype, u32 value) +{ + return nla_put(skb, attrtype, sizeof(u32), &value); +} + +/** + * nla_put_64 - Add a u64 netlink attribute to a socket buffer + * @skb: socket buffer to add attribute to + * @attrtype: attribute type + * @value: numeric value + */ +static inline int nla_put_u64(struct sk_buff *skb, int attrtype, u64 value) +{ + return nla_put(skb, attrtype, sizeof(u64), &value); +} + +/** + * nla_put_string - Add a string netlink attribute to a socket buffer + * @skb: socket buffer to add attribute to + * @attrtype: attribute type + * @str: NUL terminated string + */ +static inline int nla_put_string(struct sk_buff *skb, int attrtype, + const char *str) +{ + return nla_put(skb, attrtype, strlen(str) + 1, str); +} + +/** + * nla_put_flag - Add a flag netlink attribute to a socket buffer + * @skb: socket buffer to add attribute to + * @attrtype: attribute type + */ +static inline int nla_put_flag(struct sk_buff *skb, int attrtype) +{ + return nla_put(skb, attrtype, 0, NULL); +} + +/** + * nla_put_msecs - Add a msecs netlink attribute to a socket buffer + * @skb: socket buffer to add attribute to + * @attrtype: attribute type + * @jiffies: number of msecs in jiffies + */ +static inline int nla_put_msecs(struct sk_buff *skb, int attrtype, + unsigned long jiffies) +{ + u64 tmp = jiffies_to_msecs(jiffies); + return nla_put(skb, attrtype, sizeof(u64), &tmp); +} + +#define NLA_PUT(skb, attrtype, attrlen, data) \ + do { \ + if (nla_put(skb, attrtype, attrlen, data) < 0) \ + goto nla_put_failure; \ + } while(0) + +#define NLA_PUT_TYPE(skb, type, attrtype, value) \ + do { \ + type __tmp = value; \ + NLA_PUT(skb, attrtype, sizeof(type), &__tmp); \ + } while(0) + +#define NLA_PUT_U8(skb, attrtype, value) \ + NLA_PUT_TYPE(skb, u8, attrtype, value) + +#define NLA_PUT_U16(skb, attrtype, value) \ + NLA_PUT_TYPE(skb, u16, attrtype, value) + +#define NLA_PUT_U32(skb, attrtype, value) \ + NLA_PUT_TYPE(skb, u32, attrtype, value) + +#define NLA_PUT_U64(skb, attrtype, value) \ + NLA_PUT_TYPE(skb, u64, attrtype, value) + +#define NLA_PUT_STRING(skb, attrtype, value) \ + NLA_PUT(skb, attrtype, strlen(value) + 1, value) + +#define NLA_PUT_FLAG(skb, attrtype, value) \ + NLA_PUT(skb, attrtype, 0, NULL) + +#define NLA_PUT_MSECS(skb, attrtype, jiffies) \ + NLA_PUT_U64(skb, attrtype, jiffies_to_msecs(jiffies)) + +/** + * nla_get_u32 - return payload of u32 attribute + * @nla: u32 netlink attribute + */ +static inline u32 nla_get_u32(struct nlattr *nla) +{ + return *(u32 *) nla_data(nla); +} + +/** + * nla_get_u16 - return payload of u16 attribute + * @nla: u16 netlink attribute + */ +static inline u16 nla_get_u16(struct nlattr *nla) +{ + return *(u16 *) nla_data(nla); +} + +/** + * nla_get_u8 - return payload of u8 attribute + * @nla: u8 netlink attribute + */ +static inline u8 nla_get_u8(struct nlattr *nla) +{ + return *(u8 *) nla_data(nla); +} + +/** + * nla_get_u64 - return payload of u64 attribute + * @nla: u64 netlink attribute + */ +static inline u64 nla_get_u64(struct nlattr *nla) +{ + u64 tmp; + + nla_memcpy(&tmp, nla, sizeof(tmp)); + + return tmp; +} + +/** + * nla_get_flag - return payload of flag attribute + * @nla: flag netlink attribute + */ +static inline int nla_get_flag(struct nlattr *nla) +{ + return !!nla; +} + +/** + * nla_get_msecs - return payload of msecs attribute + * @nla: msecs netlink attribute + * + * Returns the number of milliseconds in jiffies. + */ +static inline unsigned long nla_get_msecs(struct nlattr *nla) +{ + u64 msecs = nla_get_u64(nla); + + return msecs_to_jiffies((unsigned long) msecs); +} + +/** + * nla_nest_start - Start a new level of nested attributes + * @skb: socket buffer to add attributes to + * @attrtype: attribute type of container + * + * Returns the container attribute + */ +static inline struct nlattr *nla_nest_start(struct sk_buff *skb, int attrtype) +{ + struct nlattr *start = (struct nlattr *) skb->tail; + + if (nla_put(skb, attrtype, 0, NULL) < 0) + return NULL; + + return start; +} + +/** + * nla_nest_end - Finalize nesting of attributes + * @skb: socket buffer the attribtues are stored in + * @start: container attribute + * + * Corrects the container attribute header to include the all + * appeneded attributes. + * + * Returns the total data length of the skb. + */ +static inline int nla_nest_end(struct sk_buff *skb, struct nlattr *start) +{ + start->nla_len = skb->tail - (unsigned char *) start; + return skb->len; +} + +/** + * nla_nest_cancel - Cancel nesting of attributes + * @skb: socket buffer the message is stored in + * @start: container attribute + * + * Removes the container attribute and including all nested + * attributes. Returns -1. + */ +static inline int nla_nest_cancel(struct sk_buff *skb, struct nlattr *start) +{ + if (start) + skb_trim(skb, (unsigned char *) start - skb->data); + + return -1; +} + +/** + * nla_for_each_attr - iterate over a stream of attributes + * @pos: loop counter, set to current attribute + * @head: head of attribute stream + * @len: length of attribute stream + * @rem: initialized to len, holds bytes currently remaining in stream + */ +#define nla_for_each_attr(pos, head, len, rem) \ + for (pos = head, rem = len; \ + nla_ok(pos, rem); \ + pos = nla_next(pos, &(rem))) + +#endif diff --git a/include/net/netrom.h b/include/net/netrom.h index a6bf6e0f606a..a5ee53bce62f 100644 --- a/include/net/netrom.h +++ b/include/net/netrom.h @@ -136,8 +136,7 @@ static __inline__ void nr_node_put(struct nr_node *nr_node) static __inline__ void nr_neigh_put(struct nr_neigh *nr_neigh) { if (atomic_dec_and_test(&nr_neigh->refcount)) { - if (nr_neigh->digipeat != NULL) - kfree(nr_neigh->digipeat); + kfree(nr_neigh->digipeat); kfree(nr_neigh); } } diff --git a/include/net/red.h b/include/net/red.h new file mode 100644 index 000000000000..2ed4358e3295 --- /dev/null +++ b/include/net/red.h @@ -0,0 +1,325 @@ +#ifndef __NET_SCHED_RED_H +#define __NET_SCHED_RED_H + +#include <linux/config.h> +#include <linux/types.h> +#include <net/pkt_sched.h> +#include <net/inet_ecn.h> +#include <net/dsfield.h> + +/* Random Early Detection (RED) algorithm. + ======================================= + + Source: Sally Floyd and Van Jacobson, "Random Early Detection Gateways + for Congestion Avoidance", 1993, IEEE/ACM Transactions on Networking. + + This file codes a "divisionless" version of RED algorithm + as written down in Fig.17 of the paper. + + Short description. + ------------------ + + When a new packet arrives we calculate the average queue length: + + avg = (1-W)*avg + W*current_queue_len, + + W is the filter time constant (chosen as 2^(-Wlog)), it controls + the inertia of the algorithm. To allow larger bursts, W should be + decreased. + + if (avg > th_max) -> packet marked (dropped). + if (avg < th_min) -> packet passes. + if (th_min < avg < th_max) we calculate probability: + + Pb = max_P * (avg - th_min)/(th_max-th_min) + + and mark (drop) packet with this probability. + Pb changes from 0 (at avg==th_min) to max_P (avg==th_max). + max_P should be small (not 1), usually 0.01..0.02 is good value. + + max_P is chosen as a number, so that max_P/(th_max-th_min) + is a negative power of two in order arithmetics to contain + only shifts. + + + Parameters, settable by user: + ----------------------------- + + qth_min - bytes (should be < qth_max/2) + qth_max - bytes (should be at least 2*qth_min and less limit) + Wlog - bits (<32) log(1/W). + Plog - bits (<32) + + Plog is related to max_P by formula: + + max_P = (qth_max-qth_min)/2^Plog; + + F.e. if qth_max=128K and qth_min=32K, then Plog=22 + corresponds to max_P=0.02 + + Scell_log + Stab + + Lookup table for log((1-W)^(t/t_ave). + + + NOTES: + + Upper bound on W. + ----------------- + + If you want to allow bursts of L packets of size S, + you should choose W: + + L + 1 - th_min/S < (1-(1-W)^L)/W + + th_min/S = 32 th_min/S = 4 + + log(W) L + -1 33 + -2 35 + -3 39 + -4 46 + -5 57 + -6 75 + -7 101 + -8 135 + -9 190 + etc. + */ + +#define RED_STAB_SIZE 256 +#define RED_STAB_MASK (RED_STAB_SIZE - 1) + +struct red_stats +{ + u32 prob_drop; /* Early probability drops */ + u32 prob_mark; /* Early probability marks */ + u32 forced_drop; /* Forced drops, qavg > max_thresh */ + u32 forced_mark; /* Forced marks, qavg > max_thresh */ + u32 pdrop; /* Drops due to queue limits */ + u32 other; /* Drops due to drop() calls */ + u32 backlog; +}; + +struct red_parms +{ + /* Parameters */ + u32 qth_min; /* Min avg length threshold: A scaled */ + u32 qth_max; /* Max avg length threshold: A scaled */ + u32 Scell_max; + u32 Rmask; /* Cached random mask, see red_rmask */ + u8 Scell_log; + u8 Wlog; /* log(W) */ + u8 Plog; /* random number bits */ + u8 Stab[RED_STAB_SIZE]; + + /* Variables */ + int qcount; /* Number of packets since last random + number generation */ + u32 qR; /* Cached random number */ + + unsigned long qavg; /* Average queue length: A scaled */ + psched_time_t qidlestart; /* Start of current idle period */ +}; + +static inline u32 red_rmask(u8 Plog) +{ + return Plog < 32 ? ((1 << Plog) - 1) : ~0UL; +} + +static inline void red_set_parms(struct red_parms *p, + u32 qth_min, u32 qth_max, u8 Wlog, u8 Plog, + u8 Scell_log, u8 *stab) +{ + /* Reset average queue length, the value is strictly bound + * to the parameters below, reseting hurts a bit but leaving + * it might result in an unreasonable qavg for a while. --TGR + */ + p->qavg = 0; + + p->qcount = -1; + p->qth_min = qth_min << Wlog; + p->qth_max = qth_max << Wlog; + p->Wlog = Wlog; + p->Plog = Plog; + p->Rmask = red_rmask(Plog); + p->Scell_log = Scell_log; + p->Scell_max = (255 << Scell_log); + + memcpy(p->Stab, stab, sizeof(p->Stab)); +} + +static inline int red_is_idling(struct red_parms *p) +{ + return !PSCHED_IS_PASTPERFECT(p->qidlestart); +} + +static inline void red_start_of_idle_period(struct red_parms *p) +{ + PSCHED_GET_TIME(p->qidlestart); +} + +static inline void red_end_of_idle_period(struct red_parms *p) +{ + PSCHED_SET_PASTPERFECT(p->qidlestart); +} + +static inline void red_restart(struct red_parms *p) +{ + red_end_of_idle_period(p); + p->qavg = 0; + p->qcount = -1; +} + +static inline unsigned long red_calc_qavg_from_idle_time(struct red_parms *p) +{ + psched_time_t now; + long us_idle; + int shift; + + PSCHED_GET_TIME(now); + us_idle = PSCHED_TDIFF_SAFE(now, p->qidlestart, p->Scell_max); + + /* + * The problem: ideally, average length queue recalcultion should + * be done over constant clock intervals. This is too expensive, so + * that the calculation is driven by outgoing packets. + * When the queue is idle we have to model this clock by hand. + * + * SF+VJ proposed to "generate": + * + * m = idletime / (average_pkt_size / bandwidth) + * + * dummy packets as a burst after idle time, i.e. + * + * p->qavg *= (1-W)^m + * + * This is an apparently overcomplicated solution (f.e. we have to + * precompute a table to make this calculation in reasonable time) + * I believe that a simpler model may be used here, + * but it is field for experiments. + */ + + shift = p->Stab[(us_idle >> p->Scell_log) & RED_STAB_MASK]; + + if (shift) + return p->qavg >> shift; + else { + /* Approximate initial part of exponent with linear function: + * + * (1-W)^m ~= 1-mW + ... + * + * Seems, it is the best solution to + * problem of too coarse exponent tabulation. + */ + us_idle = (p->qavg * us_idle) >> p->Scell_log; + + if (us_idle < (p->qavg >> 1)) + return p->qavg - us_idle; + else + return p->qavg >> 1; + } +} + +static inline unsigned long red_calc_qavg_no_idle_time(struct red_parms *p, + unsigned int backlog) +{ + /* + * NOTE: p->qavg is fixed point number with point at Wlog. + * The formula below is equvalent to floating point + * version: + * + * qavg = qavg*(1-W) + backlog*W; + * + * --ANK (980924) + */ + return p->qavg + (backlog - (p->qavg >> p->Wlog)); +} + +static inline unsigned long red_calc_qavg(struct red_parms *p, + unsigned int backlog) +{ + if (!red_is_idling(p)) + return red_calc_qavg_no_idle_time(p, backlog); + else + return red_calc_qavg_from_idle_time(p); +} + +static inline u32 red_random(struct red_parms *p) +{ + return net_random() & p->Rmask; +} + +static inline int red_mark_probability(struct red_parms *p, unsigned long qavg) +{ + /* The formula used below causes questions. + + OK. qR is random number in the interval 0..Rmask + i.e. 0..(2^Plog). If we used floating point + arithmetics, it would be: (2^Plog)*rnd_num, + where rnd_num is less 1. + + Taking into account, that qavg have fixed + point at Wlog, and Plog is related to max_P by + max_P = (qth_max-qth_min)/2^Plog; two lines + below have the following floating point equivalent: + + max_P*(qavg - qth_min)/(qth_max-qth_min) < rnd/qcount + + Any questions? --ANK (980924) + */ + return !(((qavg - p->qth_min) >> p->Wlog) * p->qcount < p->qR); +} + +enum { + RED_BELOW_MIN_THRESH, + RED_BETWEEN_TRESH, + RED_ABOVE_MAX_TRESH, +}; + +static inline int red_cmp_thresh(struct red_parms *p, unsigned long qavg) +{ + if (qavg < p->qth_min) + return RED_BELOW_MIN_THRESH; + else if (qavg >= p->qth_max) + return RED_ABOVE_MAX_TRESH; + else + return RED_BETWEEN_TRESH; +} + +enum { + RED_DONT_MARK, + RED_PROB_MARK, + RED_HARD_MARK, +}; + +static inline int red_action(struct red_parms *p, unsigned long qavg) +{ + switch (red_cmp_thresh(p, qavg)) { + case RED_BELOW_MIN_THRESH: + p->qcount = -1; + return RED_DONT_MARK; + + case RED_BETWEEN_TRESH: + if (++p->qcount) { + if (red_mark_probability(p, qavg)) { + p->qcount = 0; + p->qR = red_random(p); + return RED_PROB_MARK; + } + } else + p->qR = red_random(p); + + return RED_DONT_MARK; + + case RED_ABOVE_MAX_TRESH: + p->qcount = -1; + return RED_HARD_MARK; + } + + BUG(); + return RED_DONT_MARK; +} + +#endif diff --git a/include/net/route.h b/include/net/route.h index dbe79ca67d31..e3e5436f8017 100644 --- a/include/net/route.h +++ b/include/net/route.h @@ -126,6 +126,9 @@ extern int ip_rt_ioctl(unsigned int cmd, void __user *arg); extern void ip_rt_get_source(u8 *src, struct rtable *rt); extern int ip_rt_dump(struct sk_buff *skb, struct netlink_callback *cb); +struct in_ifaddr; +extern void fib_add_ifaddr(struct in_ifaddr *); + static inline void ip_rt_put(struct rtable * rt) { if (rt) diff --git a/include/net/sctp/command.h b/include/net/sctp/command.h index dc107ffad483..34a1a09e5aef 100644 --- a/include/net/sctp/command.h +++ b/include/net/sctp/command.h @@ -120,6 +120,7 @@ typedef union { int error; sctp_state_t state; sctp_event_timeout_t to; + unsigned long zero; void *ptr; struct sctp_chunk *chunk; struct sctp_association *asoc; @@ -148,17 +149,17 @@ static inline sctp_arg_t SCTP_NULL(void) } static inline sctp_arg_t SCTP_NOFORCE(void) { - sctp_arg_t retval; retval.i32 = 0; return retval; + sctp_arg_t retval = {.zero = 0UL}; retval.i32 = 0; return retval; } static inline sctp_arg_t SCTP_FORCE(void) { - sctp_arg_t retval; retval.i32 = 1; return retval; + sctp_arg_t retval = {.zero = 0UL}; retval.i32 = 1; return retval; } #define SCTP_ARG_CONSTRUCTOR(name, type, elt) \ static inline sctp_arg_t \ SCTP_## name (type arg) \ -{ sctp_arg_t retval; retval.elt = arg; return retval; } +{ sctp_arg_t retval = {.zero = 0UL}; retval.elt = arg; return retval; } SCTP_ARG_CONSTRUCTOR(I32, __s32, i32) SCTP_ARG_CONSTRUCTOR(U32, __u32, u32) diff --git a/include/net/sctp/sctp.h b/include/net/sctp/sctp.h index e1d5ec1c23c0..8f241216f46b 100644 --- a/include/net/sctp/sctp.h +++ b/include/net/sctp/sctp.h @@ -125,7 +125,7 @@ */ extern struct sock *sctp_get_ctl_sock(void); extern int sctp_copy_local_addr_list(struct sctp_bind_addr *, - sctp_scope_t, unsigned int __nocast gfp, + sctp_scope_t, gfp_t gfp, int flags); extern struct sctp_pf *sctp_get_pf_specific(sa_family_t family); extern int sctp_register_pf(struct sctp_pf *, sa_family_t); diff --git a/include/net/sctp/sm.h b/include/net/sctp/sm.h index 58462164d960..1eac3d0eb7a9 100644 --- a/include/net/sctp/sm.h +++ b/include/net/sctp/sm.h @@ -181,17 +181,17 @@ const sctp_sm_table_entry_t *sctp_sm_lookup_event(sctp_event_t, int sctp_chunk_iif(const struct sctp_chunk *); struct sctp_association *sctp_make_temp_asoc(const struct sctp_endpoint *, struct sctp_chunk *, - unsigned int __nocast gfp); + gfp_t gfp); __u32 sctp_generate_verification_tag(void); void sctp_populate_tie_tags(__u8 *cookie, __u32 curTag, __u32 hisTag); /* Prototypes for chunk-building functions. */ struct sctp_chunk *sctp_make_init(const struct sctp_association *, const struct sctp_bind_addr *, - unsigned int __nocast gfp, int vparam_len); + gfp_t gfp, int vparam_len); struct sctp_chunk *sctp_make_init_ack(const struct sctp_association *, const struct sctp_chunk *, - const unsigned int __nocast gfp, + const gfp_t gfp, const int unkparam_len); struct sctp_chunk *sctp_make_cookie_echo(const struct sctp_association *, const struct sctp_chunk *); @@ -265,7 +265,7 @@ int sctp_do_sm(sctp_event_t event_type, sctp_subtype_t subtype, struct sctp_endpoint *, struct sctp_association *asoc, void *event_arg, - unsigned int __nocast gfp); + gfp_t gfp); /* 2nd level prototypes */ void sctp_generate_t3_rtx_event(unsigned long peer); @@ -276,7 +276,7 @@ void sctp_ootb_pkt_free(struct sctp_packet *); struct sctp_association *sctp_unpack_cookie(const struct sctp_endpoint *, const struct sctp_association *, struct sctp_chunk *, - unsigned int __nocast gfp, int *err, + gfp_t gfp, int *err, struct sctp_chunk **err_chk_p); int sctp_addip_addr_config(struct sctp_association *, sctp_param_t, struct sockaddr_storage*, int); diff --git a/include/net/sctp/structs.h b/include/net/sctp/structs.h index 994009bbe3b4..8e7794ee27ff 100644 --- a/include/net/sctp/structs.h +++ b/include/net/sctp/structs.h @@ -161,6 +161,13 @@ extern struct sctp_globals { */ int sndbuf_policy; + /* + * Policy for preforming sctp/socket accounting + * 0 - do socket level accounting, all assocs share sk_rcvbuf + * 1 - do sctp accounting, each asoc may use sk_rcvbuf bytes + */ + int rcvbuf_policy; + /* Delayed SACK timeout 200ms default*/ int sack_timeout; @@ -218,6 +225,7 @@ extern struct sctp_globals { #define sctp_cookie_preserve_enable (sctp_globals.cookie_preserve_enable) #define sctp_max_retrans_association (sctp_globals.max_retrans_association) #define sctp_sndbuf_policy (sctp_globals.sndbuf_policy) +#define sctp_rcvbuf_policy (sctp_globals.rcvbuf_policy) #define sctp_max_retrans_path (sctp_globals.max_retrans_path) #define sctp_max_retrans_init (sctp_globals.max_retrans_init) #define sctp_sack_timeout (sctp_globals.sack_timeout) @@ -446,7 +454,7 @@ struct sctp_ssnmap { }; struct sctp_ssnmap *sctp_ssnmap_new(__u16 in, __u16 out, - unsigned int __nocast gfp); + gfp_t gfp); void sctp_ssnmap_free(struct sctp_ssnmap *map); void sctp_ssnmap_clear(struct sctp_ssnmap *map); @@ -947,7 +955,7 @@ struct sctp_transport { }; struct sctp_transport *sctp_transport_new(const union sctp_addr *, - unsigned int __nocast); + gfp_t); void sctp_transport_set_owner(struct sctp_transport *, struct sctp_association *); void sctp_transport_route(struct sctp_transport *, union sctp_addr *, @@ -1095,10 +1103,10 @@ void sctp_bind_addr_init(struct sctp_bind_addr *, __u16 port); void sctp_bind_addr_free(struct sctp_bind_addr *); int sctp_bind_addr_copy(struct sctp_bind_addr *dest, const struct sctp_bind_addr *src, - sctp_scope_t scope, unsigned int __nocast gfp, + sctp_scope_t scope, gfp_t gfp, int flags); int sctp_add_bind_addr(struct sctp_bind_addr *, union sctp_addr *, - unsigned int __nocast gfp); + gfp_t gfp); int sctp_del_bind_addr(struct sctp_bind_addr *, union sctp_addr *); int sctp_bind_addr_match(struct sctp_bind_addr *, const union sctp_addr *, struct sctp_sock *); @@ -1108,9 +1116,9 @@ union sctp_addr *sctp_find_unmatch_addr(struct sctp_bind_addr *bp, struct sctp_sock *opt); union sctp_params sctp_bind_addrs_to_raw(const struct sctp_bind_addr *bp, int *addrs_len, - unsigned int __nocast gfp); + gfp_t gfp); int sctp_raw_to_bind_addrs(struct sctp_bind_addr *bp, __u8 *raw, int len, - __u16 port, unsigned int __nocast gfp); + __u16 port, gfp_t gfp); sctp_scope_t sctp_scope(const union sctp_addr *); int sctp_in_scope(const union sctp_addr *addr, const sctp_scope_t scope); @@ -1222,11 +1230,11 @@ struct sctp_endpoint { int last_key; int key_changed_at; - /* Default timeouts. */ - int timeouts[SCTP_NUM_TIMEOUT_TYPES]; - /* sendbuf acct. policy. */ __u32 sndbuf_policy; + + /* rcvbuf acct. policy. */ + __u32 rcvbuf_policy; }; /* Recover the outter endpoint structure. */ @@ -1239,7 +1247,7 @@ static inline struct sctp_endpoint *sctp_ep(struct sctp_ep_common *base) } /* These are function signatures for manipulating endpoints. */ -struct sctp_endpoint *sctp_endpoint_new(struct sock *, unsigned int __nocast); +struct sctp_endpoint *sctp_endpoint_new(struct sock *, gfp_t); void sctp_endpoint_free(struct sctp_endpoint *); void sctp_endpoint_put(struct sctp_endpoint *); void sctp_endpoint_hold(struct sctp_endpoint *); @@ -1260,7 +1268,7 @@ int sctp_verify_init(const struct sctp_association *asoc, sctp_cid_t, struct sctp_chunk **err_chunk); int sctp_process_init(struct sctp_association *, sctp_cid_t cid, const union sctp_addr *peer, - sctp_init_chunk_t *init, unsigned int __nocast gfp); + sctp_init_chunk_t *init, gfp_t gfp); __u32 sctp_generate_tag(const struct sctp_endpoint *); __u32 sctp_generate_tsn(const struct sctp_endpoint *); @@ -1553,6 +1561,11 @@ struct sctp_association { */ int sndbuf_used; + /* This is the amount of memory that this association has allocated + * in the receive path at any given time. + */ + atomic_t rmem_alloc; + /* This is the wait queue head for send requests waiting on * the association sndbuf space. */ @@ -1723,7 +1736,7 @@ static inline struct sctp_association *sctp_assoc(struct sctp_ep_common *base) struct sctp_association * sctp_association_new(const struct sctp_endpoint *, const struct sock *, - sctp_scope_t scope, unsigned int __nocast gfp); + sctp_scope_t scope, gfp_t gfp); void sctp_association_free(struct sctp_association *); void sctp_association_put(struct sctp_association *); void sctp_association_hold(struct sctp_association *); @@ -1739,7 +1752,7 @@ int sctp_assoc_lookup_laddr(struct sctp_association *asoc, const union sctp_addr *laddr); struct sctp_transport *sctp_assoc_add_peer(struct sctp_association *, const union sctp_addr *address, - const unsigned int __nocast gfp, + const gfp_t gfp, const int peer_state); void sctp_assoc_del_peer(struct sctp_association *asoc, const union sctp_addr *addr); @@ -1764,10 +1777,10 @@ void sctp_assoc_rwnd_decrease(struct sctp_association *, unsigned); void sctp_assoc_set_primary(struct sctp_association *, struct sctp_transport *); int sctp_assoc_set_bind_addr_from_ep(struct sctp_association *, - unsigned int __nocast); + gfp_t); int sctp_assoc_set_bind_addr_from_cookie(struct sctp_association *, struct sctp_cookie*, - unsigned int __nocast gfp); + gfp_t gfp); int sctp_cmp_addr_exact(const union sctp_addr *ss1, const union sctp_addr *ss2); diff --git a/include/net/sctp/ulpevent.h b/include/net/sctp/ulpevent.h index 90fe4bf6754f..6c40cfc4832d 100644 --- a/include/net/sctp/ulpevent.h +++ b/include/net/sctp/ulpevent.h @@ -88,7 +88,7 @@ struct sctp_ulpevent *sctp_ulpevent_make_assoc_change( __u16 error, __u16 outbound, __u16 inbound, - unsigned int __nocast gfp); + gfp_t gfp); struct sctp_ulpevent *sctp_ulpevent_make_peer_addr_change( const struct sctp_association *asoc, @@ -96,35 +96,35 @@ struct sctp_ulpevent *sctp_ulpevent_make_peer_addr_change( int flags, int state, int error, - unsigned int __nocast gfp); + gfp_t gfp); struct sctp_ulpevent *sctp_ulpevent_make_remote_error( const struct sctp_association *asoc, struct sctp_chunk *chunk, __u16 flags, - unsigned int __nocast gfp); + gfp_t gfp); struct sctp_ulpevent *sctp_ulpevent_make_send_failed( const struct sctp_association *asoc, struct sctp_chunk *chunk, __u16 flags, __u32 error, - unsigned int __nocast gfp); + gfp_t gfp); struct sctp_ulpevent *sctp_ulpevent_make_shutdown_event( const struct sctp_association *asoc, __u16 flags, - unsigned int __nocast gfp); + gfp_t gfp); struct sctp_ulpevent *sctp_ulpevent_make_pdapi( const struct sctp_association *asoc, - __u32 indication, unsigned int __nocast gfp); + __u32 indication, gfp_t gfp); struct sctp_ulpevent *sctp_ulpevent_make_adaption_indication( - const struct sctp_association *asoc, unsigned int __nocast gfp); + const struct sctp_association *asoc, gfp_t gfp); struct sctp_ulpevent *sctp_ulpevent_make_rcvmsg(struct sctp_association *asoc, struct sctp_chunk *chunk, - unsigned int __nocast gfp); + gfp_t gfp); void sctp_ulpevent_read_sndrcvinfo(const struct sctp_ulpevent *event, struct msghdr *); diff --git a/include/net/sctp/ulpqueue.h b/include/net/sctp/ulpqueue.h index 1a60c6d943c1..a43c8788b650 100644 --- a/include/net/sctp/ulpqueue.h +++ b/include/net/sctp/ulpqueue.h @@ -62,22 +62,19 @@ struct sctp_ulpq *sctp_ulpq_init(struct sctp_ulpq *, void sctp_ulpq_free(struct sctp_ulpq *); /* Add a new DATA chunk for processing. */ -int sctp_ulpq_tail_data(struct sctp_ulpq *, struct sctp_chunk *, - unsigned int __nocast); +int sctp_ulpq_tail_data(struct sctp_ulpq *, struct sctp_chunk *, gfp_t); /* Add a new event for propagation to the ULP. */ int sctp_ulpq_tail_event(struct sctp_ulpq *, struct sctp_ulpevent *ev); /* Renege previously received chunks. */ -void sctp_ulpq_renege(struct sctp_ulpq *, struct sctp_chunk *, - unsigned int __nocast); +void sctp_ulpq_renege(struct sctp_ulpq *, struct sctp_chunk *, gfp_t); /* Perform partial delivery. */ -void sctp_ulpq_partial_delivery(struct sctp_ulpq *, struct sctp_chunk *, - unsigned int __nocast); +void sctp_ulpq_partial_delivery(struct sctp_ulpq *, struct sctp_chunk *, gfp_t); /* Abort the partial delivery. */ -void sctp_ulpq_abort_pd(struct sctp_ulpq *, unsigned int __nocast); +void sctp_ulpq_abort_pd(struct sctp_ulpq *, gfp_t); /* Clear the partial data delivery condition on this socket. */ int sctp_clear_pd(struct sock *sk); diff --git a/include/net/sctp/user.h b/include/net/sctp/user.h index f6328aeddcce..f1c3bc54526a 100644 --- a/include/net/sctp/user.h +++ b/include/net/sctp/user.h @@ -103,16 +103,20 @@ enum sctp_optname { #define SCTP_SOCKOPT_BINDX_REM SCTP_SOCKOPT_BINDX_REM SCTP_SOCKOPT_PEELOFF, /* peel off association. */ #define SCTP_SOCKOPT_PEELOFF SCTP_SOCKOPT_PEELOFF - SCTP_GET_PEER_ADDRS_NUM, /* Get number of peer addresss. */ -#define SCTP_GET_PEER_ADDRS_NUM SCTP_GET_PEER_ADDRS_NUM + SCTP_GET_PEER_ADDRS_NUM_OLD, /* Get number of peer addresss. */ +#define SCTP_GET_PEER_ADDRS_NUM_OLD SCTP_GET_PEER_ADDRS_NUM_OLD + SCTP_GET_PEER_ADDRS_OLD, /* Get all peer addresss. */ +#define SCTP_GET_PEER_ADDRS_OLD SCTP_GET_PEER_ADDRS_OLD + SCTP_GET_LOCAL_ADDRS_NUM_OLD, /* Get number of local addresss. */ +#define SCTP_GET_LOCAL_ADDRS_NUM_OLD SCTP_GET_LOCAL_ADDRS_NUM_OLD + SCTP_GET_LOCAL_ADDRS_OLD, /* Get all local addresss. */ +#define SCTP_GET_LOCAL_ADDRS_OLD SCTP_GET_LOCAL_ADDRS_OLD + SCTP_SOCKOPT_CONNECTX, /* CONNECTX requests. */ +#define SCTP_SOCKOPT_CONNECTX SCTP_SOCKOPT_CONNECTX SCTP_GET_PEER_ADDRS, /* Get all peer addresss. */ #define SCTP_GET_PEER_ADDRS SCTP_GET_PEER_ADDRS - SCTP_GET_LOCAL_ADDRS_NUM, /* Get number of local addresss. */ -#define SCTP_GET_LOCAL_ADDRS_NUM SCTP_GET_LOCAL_ADDRS_NUM SCTP_GET_LOCAL_ADDRS, /* Get all local addresss. */ #define SCTP_GET_LOCAL_ADDRS SCTP_GET_LOCAL_ADDRS - SCTP_SOCKOPT_CONNECTX, /* CONNECTX requests. */ -#define SCTP_SOCKOPT_CONNECTX SCTP_SOCKOPT_CONNECTX }; /* @@ -167,10 +171,10 @@ struct sctp_sndrcvinfo { */ enum sctp_sinfo_flags { - MSG_UNORDERED = 1, /* Send/receive message unordered. */ - MSG_ADDR_OVER = 2, /* Override the primary destination. */ - MSG_ABORT=4, /* Send an ABORT message to the peer. */ - /* MSG_EOF is already defined per socket.h */ + SCTP_UNORDERED = 1, /* Send/receive message unordered. */ + SCTP_ADDR_OVER = 2, /* Override the primary destination. */ + SCTP_ABORT=4, /* Send an ABORT message to the peer. */ + SCTP_EOF=MSG_FIN, /* Initiate graceful shutdown process. */ }; @@ -239,7 +243,7 @@ struct sctp_paddr_change { int spc_state; int spc_error; sctp_assoc_t spc_assoc_id; -}; +} __attribute__((packed, aligned(4))); /* * spc_state: 32 bits (signed integer) @@ -464,7 +468,7 @@ struct sctp_assocparams { struct sctp_setpeerprim { sctp_assoc_t sspp_assoc_id; struct sockaddr_storage sspp_addr; -}; +} __attribute__((packed, aligned(4))); /* * 7.1.10 Set Primary Address (SCTP_PRIMARY_ADDR) @@ -477,7 +481,7 @@ struct sctp_setpeerprim { struct sctp_prim { sctp_assoc_t ssp_assoc_id; struct sockaddr_storage ssp_addr; -}; +} __attribute__((packed, aligned(4))); /* * 7.1.11 Set Adaption Layer Indicator (SCTP_ADAPTION_LAYER) @@ -504,7 +508,7 @@ struct sctp_paddrparams { struct sockaddr_storage spp_address; __u32 spp_hbinterval; __u16 spp_pathmaxrxt; -}; +} __attribute__((packed, aligned(4))); /* * 7.2.2 Peer Address Information @@ -523,7 +527,7 @@ struct sctp_paddrinfo { __u32 spinfo_srtt; __u32 spinfo_rto; __u32 spinfo_mtu; -}; +} __attribute__((packed, aligned(4))); /* Peer addresses's state. */ enum sctp_spinfo_state { @@ -559,11 +563,16 @@ struct sctp_status { * SCTP_GET_LOCAL_ADDRS socket options used internally to implement * sctp_getpaddrs() and sctp_getladdrs() API. */ -struct sctp_getaddrs { +struct sctp_getaddrs_old { sctp_assoc_t assoc_id; int addr_num; struct sockaddr __user *addrs; }; +struct sctp_getaddrs { + sctp_assoc_t assoc_id; /*input*/ + __u32 addr_num; /*output*/ + __u8 addrs[0]; /*output, variable size*/ +}; /* These are bit fields for msghdr->msg_flags. See section 5.1. */ /* On user space Linux, these live in <bits/socket.h> as an enum. */ diff --git a/include/net/sock.h b/include/net/sock.h index 8c48fbecb7cf..982b4ecd187b 100644 --- a/include/net/sock.h +++ b/include/net/sock.h @@ -99,6 +99,7 @@ struct proto; * @skc_node: main hash linkage for various protocol lookup tables * @skc_bind_node: bind hash linkage for various protocol lookup tables * @skc_refcnt: reference count + * @skc_hash: hash value used with various protocol lookup tables * @skc_prot: protocol handlers inside a network family * * This is the minimal network layer representation of sockets, the header @@ -112,6 +113,7 @@ struct sock_common { struct hlist_node skc_node; struct hlist_node skc_bind_node; atomic_t skc_refcnt; + unsigned int skc_hash; struct proto *skc_prot; }; @@ -139,7 +141,6 @@ struct sock_common { * @sk_no_check: %SO_NO_CHECK setting, wether or not checkup packets * @sk_route_caps: route capabilities (e.g. %NETIF_F_TSO) * @sk_lingertime: %SO_LINGER l_linger setting - * @sk_hashent: hash entry in several tables (e.g. inet_hashinfo.ehash) * @sk_backlog: always used with the per-socket spinlock held * @sk_callback_lock: used with the callbacks in the end of this struct * @sk_error_queue: rarely used @@ -186,6 +187,7 @@ struct sock { #define sk_node __sk_common.skc_node #define sk_bind_node __sk_common.skc_bind_node #define sk_refcnt __sk_common.skc_refcnt +#define sk_hash __sk_common.skc_hash #define sk_prot __sk_common.skc_prot unsigned char sk_shutdown : 2, sk_no_check : 2, @@ -205,10 +207,9 @@ struct sock { struct sk_buff_head sk_write_queue; int sk_wmem_queued; int sk_forward_alloc; - unsigned int sk_allocation; + gfp_t sk_allocation; int sk_sndbuf; int sk_route_caps; - int sk_hashent; unsigned long sk_flags; unsigned long sk_lingertime; /* @@ -460,16 +461,16 @@ static inline void sk_stream_free_skb(struct sock *sk, struct sk_buff *skb) } /* The per-socket spinlock must be held here. */ -#define sk_add_backlog(__sk, __skb) \ -do { if (!(__sk)->sk_backlog.tail) { \ - (__sk)->sk_backlog.head = \ - (__sk)->sk_backlog.tail = (__skb); \ - } else { \ - ((__sk)->sk_backlog.tail)->next = (__skb); \ - (__sk)->sk_backlog.tail = (__skb); \ - } \ - (__skb)->next = NULL; \ -} while(0) +static inline void sk_add_backlog(struct sock *sk, struct sk_buff *skb) +{ + if (!sk->sk_backlog.tail) { + sk->sk_backlog.head = sk->sk_backlog.tail = skb; + } else { + sk->sk_backlog.tail->next = skb; + sk->sk_backlog.tail = skb; + } + skb->next = NULL; +} #define sk_wait_event(__sk, __timeo, __condition) \ ({ int rc; \ @@ -738,18 +739,18 @@ extern void FASTCALL(release_sock(struct sock *sk)); #define bh_unlock_sock(__sk) spin_unlock(&((__sk)->sk_lock.slock)) extern struct sock *sk_alloc(int family, - unsigned int __nocast priority, + gfp_t priority, struct proto *prot, int zero_it); extern void sk_free(struct sock *sk); extern struct sock *sk_clone(const struct sock *sk, - const unsigned int __nocast priority); + const gfp_t priority); extern struct sk_buff *sock_wmalloc(struct sock *sk, unsigned long size, int force, - unsigned int __nocast priority); + gfp_t priority); extern struct sk_buff *sock_rmalloc(struct sock *sk, unsigned long size, int force, - unsigned int __nocast priority); + gfp_t priority); extern void sock_wfree(struct sk_buff *skb); extern void sock_rfree(struct sk_buff *skb); @@ -765,7 +766,7 @@ extern struct sk_buff *sock_alloc_send_skb(struct sock *sk, int noblock, int *errcode); extern void *sock_kmalloc(struct sock *sk, int size, - unsigned int __nocast priority); + gfp_t priority); extern void sock_kfree_s(struct sock *sk, void *mem, int size); extern void sk_send_sigurg(struct sock *sk); @@ -1200,7 +1201,7 @@ static inline void sk_stream_moderate_sndbuf(struct sock *sk) static inline struct sk_buff *sk_stream_alloc_pskb(struct sock *sk, int size, int mem, - unsigned int __nocast gfp) + gfp_t gfp) { struct sk_buff *skb; int hdr_len; @@ -1223,7 +1224,7 @@ static inline struct sk_buff *sk_stream_alloc_pskb(struct sock *sk, static inline struct sk_buff *sk_stream_alloc_skb(struct sock *sk, int size, - unsigned int __nocast gfp) + gfp_t gfp) { return sk_stream_alloc_pskb(sk, size, 0, gfp); } @@ -1246,6 +1247,12 @@ static inline struct page *sk_stream_alloc_page(struct sock *sk) (skb != (struct sk_buff *)&(sk)->sk_write_queue); \ skb = skb->next) +/*from STCP for fast SACK Process*/ +#define sk_stream_for_retrans_queue_from(skb, sk) \ + for (; (skb != (sk)->sk_send_head) && \ + (skb != (struct sk_buff *)&(sk)->sk_write_queue); \ + skb = skb->next) + /* * Default write policy as shown to user space via poll/select/SIGIO */ @@ -1254,7 +1261,7 @@ static inline int sock_writeable(const struct sock *sk) return atomic_read(&sk->sk_wmem_alloc) < (sk->sk_sndbuf / 2); } -static inline unsigned int __nocast gfp_any(void) +static inline gfp_t gfp_any(void) { return in_softirq() ? GFP_ATOMIC : GFP_KERNEL; } diff --git a/include/net/syncppp.h b/include/net/syncppp.h index 614cb6ba564e..877efa434700 100644 --- a/include/net/syncppp.h +++ b/include/net/syncppp.h @@ -86,7 +86,6 @@ static inline struct sppp *sppp_of(struct net_device *dev) void sppp_attach (struct ppp_device *pd); void sppp_detach (struct net_device *dev); -void sppp_input (struct net_device *dev, struct sk_buff *m); int sppp_do_ioctl (struct net_device *dev, struct ifreq *ifr, int cmd); struct sk_buff *sppp_dequeue (struct net_device *dev); int sppp_isempty (struct net_device *dev); diff --git a/include/net/tcp.h b/include/net/tcp.h index 97af77c4d096..d78025f9fbea 100644 --- a/include/net/tcp.h +++ b/include/net/tcp.h @@ -27,6 +27,7 @@ #include <linux/slab.h> #include <linux/cache.h> #include <linux/percpu.h> +#include <linux/skbuff.h> #include <net/inet_connection_sock.h> #include <net/inet_timewait_sock.h> @@ -88,10 +89,10 @@ extern void tcp_time_wait(struct sock *sk, int state, int timeo); */ #define TCP_SYN_RETRIES 5 /* number of times to retry active opening a - * connection: ~180sec is RFC minumum */ + * connection: ~180sec is RFC minimum */ #define TCP_SYNACK_RETRIES 5 /* number of times to retry passive opening a - * connection: ~180sec is RFC minumum */ + * connection: ~180sec is RFC minimum */ #define TCP_ORPHAN_RETRIES 7 /* number of times to retry on an orphaned @@ -179,7 +180,7 @@ extern void tcp_time_wait(struct sock *sk, int state, int timeo); /* Flags in tp->nonagle */ #define TCP_NAGLE_OFF 1 /* Nagle's algo is disabled */ #define TCP_NAGLE_CORK 2 /* Socket is corked */ -#define TCP_NAGLE_PUSH 4 /* Cork is overriden for already queued data */ +#define TCP_NAGLE_PUSH 4 /* Cork is overridden for already queued data */ extern struct inet_timewait_death_row tcp_death_row; @@ -217,6 +218,7 @@ extern int sysctl_tcp_low_latency; extern int sysctl_tcp_nometrics_save; extern int sysctl_tcp_moderate_rcvbuf; extern int sysctl_tcp_tso_win_divisor; +extern int sysctl_tcp_abc; extern atomic_t tcp_memory_allocated; extern atomic_t tcp_sockets_allocated; @@ -460,8 +462,7 @@ extern void tcp_send_probe0(struct sock *); extern void tcp_send_partial(struct sock *); extern int tcp_write_wakeup(struct sock *); extern void tcp_send_fin(struct sock *sk); -extern void tcp_send_active_reset(struct sock *sk, - unsigned int __nocast priority); +extern void tcp_send_active_reset(struct sock *sk, gfp_t priority); extern int tcp_send_synack(struct sock *); extern void tcp_push_one(struct sock *, unsigned int mss_now); extern void tcp_send_ack(struct sock *sk); @@ -551,13 +552,13 @@ extern u32 __tcp_select_window(struct sock *sk); /* TCP timestamps are only 32-bits, this causes a slight * complication on 64-bit systems since we store a snapshot - * of jiffies in the buffer control blocks below. We decidely - * only use of the low 32-bits of jiffies and hide the ugly + * of jiffies in the buffer control blocks below. We decided + * to use only the low 32-bits of jiffies and hide the ugly * casts with the following macro. */ #define tcp_time_stamp ((__u32)(jiffies)) -/* This is what the send packet queueing engine uses to pass +/* This is what the send packet queuing engine uses to pass * TCP per-packet control information to the transmission * code. We also store the host-order sequence numbers in * here too. This is 36 bytes on 32-bit architectures, @@ -597,7 +598,7 @@ struct tcp_skb_cb { #define TCPCB_EVER_RETRANS 0x80 /* Ever retransmitted frame */ #define TCPCB_RETRANS (TCPCB_SACKED_RETRANS|TCPCB_EVER_RETRANS) -#define TCPCB_URG 0x20 /* Urgent pointer advenced here */ +#define TCPCB_URG 0x20 /* Urgent pointer advanced here */ #define TCPCB_AT_TAIL (TCPCB_URG) @@ -765,6 +766,33 @@ static inline __u32 tcp_current_ssthresh(const struct sock *sk) (tp->snd_cwnd >> 2))); } +/* + * Linear increase during slow start + */ +static inline void tcp_slow_start(struct tcp_sock *tp) +{ + if (sysctl_tcp_abc) { + /* RFC3465: Slow Start + * TCP sender SHOULD increase cwnd by the number of + * previously unacknowledged bytes ACKed by each incoming + * acknowledgment, provided the increase is not more than L + */ + if (tp->bytes_acked < tp->mss_cache) + return; + + /* We MAY increase by 2 if discovered delayed ack */ + if (sysctl_tcp_abc > 1 && tp->bytes_acked > 2*tp->mss_cache) { + if (tp->snd_cwnd < tp->snd_cwnd_clamp) + tp->snd_cwnd++; + } + } + tp->bytes_acked = 0; + + if (tp->snd_cwnd < tp->snd_cwnd_clamp) + tp->snd_cwnd++; +} + + static inline void tcp_sync_left_out(struct tcp_sock *tp) { if (tp->rx_opt.sack_ok && @@ -794,6 +822,7 @@ static inline void tcp_enter_cwr(struct sock *sk) struct tcp_sock *tp = tcp_sk(sk); tp->prior_ssthresh = 0; + tp->bytes_acked = 0; if (inet_csk(sk)->icsk_ca_state < TCP_CA_CWR) { __tcp_enter_cwr(sk); tcp_set_ca_state(sk, TCP_CA_CWR); @@ -810,6 +839,27 @@ static __inline__ __u32 tcp_max_burst(const struct tcp_sock *tp) return 3; } +/* RFC2861 Check whether we are limited by application or congestion window + * This is the inverse of cwnd check in tcp_tso_should_defer + */ +static inline int tcp_is_cwnd_limited(const struct sock *sk, u32 in_flight) +{ + const struct tcp_sock *tp = tcp_sk(sk); + u32 left; + + if (in_flight >= tp->snd_cwnd) + return 1; + + if (!(sk->sk_route_caps & NETIF_F_TSO)) + return 0; + + left = tp->snd_cwnd - in_flight; + if (sysctl_tcp_tso_win_divisor) + return left * sysctl_tcp_tso_win_divisor < tp->snd_cwnd; + else + return left <= tcp_max_burst(tp); +} + static __inline__ void tcp_minshall_update(struct tcp_sock *tp, int mss, const struct sk_buff *skb) { @@ -853,7 +903,7 @@ static __inline__ u16 tcp_v4_check(struct tcphdr *th, int len, static __inline__ int __tcp_checksum_complete(struct sk_buff *skb) { - return (unsigned short)csum_fold(skb_checksum(skb, 0, skb->len, skb->csum)); + return __skb_checksum_complete(skb); } static __inline__ int tcp_checksum_complete(struct sk_buff *skb) @@ -1157,6 +1207,15 @@ static inline void tcp_mib_init(void) TCP_ADD_STATS_USER(TCP_MIB_MAXCONN, -1); } +/*from STCP */ +static inline void clear_all_retrans_hints(struct tcp_sock *tp){ + tp->lost_skb_hint = NULL; + tp->scoreboard_skb_hint = NULL; + tp->retransmit_skb_hint = NULL; + tp->forward_skb_hint = NULL; + tp->fastpath_skb_hint = NULL; +} + /* /proc */ enum tcp_seq_states { TCP_SEQ_STATE_LISTENING, diff --git a/include/net/xfrm.h b/include/net/xfrm.h index a9d0d8c5dfbf..5beae1ccd574 100644 --- a/include/net/xfrm.h +++ b/include/net/xfrm.h @@ -875,7 +875,7 @@ static inline int xfrm_dst_lookup(struct xfrm_dst **dst, struct flowi *fl, unsig } #endif -struct xfrm_policy *xfrm_policy_alloc(int gfp); +struct xfrm_policy *xfrm_policy_alloc(gfp_t gfp); extern int xfrm_policy_walk(int (*func)(struct xfrm_policy *, int, int, void*), void *); int xfrm_policy_insert(int dir, struct xfrm_policy *policy, int excl); struct xfrm_policy *xfrm_policy_bysel(int dir, struct xfrm_selector *sel, @@ -931,4 +931,9 @@ static inline int xfrm_addr_cmp(xfrm_address_t *a, xfrm_address_t *b, } } +static inline int xfrm_policy_id2dir(u32 index) +{ + return index & 7; +} + #endif /* _NET_XFRM_H */ diff --git a/include/pcmcia/ss.h b/include/pcmcia/ss.h index 0f7aacc33fe9..e788bbc5657d 100644 --- a/include/pcmcia/ss.h +++ b/include/pcmcia/ss.h @@ -17,10 +17,14 @@ #include <linux/config.h> #include <linux/device.h> +#include <linux/sched.h> /* task_struct, completion */ #include <pcmcia/cs_types.h> #include <pcmcia/cs.h> #include <pcmcia/bulkmem.h> +#ifdef CONFIG_CARDBUS +#include <linux/pci.h> +#endif /* Definitions for card status flags for GetStatus */ #define SS_WRPROT 0x0001 @@ -233,7 +237,11 @@ struct pcmcia_socket { /* so is power hook */ int (*power_hook)(struct pcmcia_socket *sock, int operation); - +#ifdef CONFIG_CARDBUS + /* allows tuning the CB bridge before loading driver for the CB card */ + void (*tune_bridge)(struct pcmcia_socket *sock, struct pci_bus *bus); +#endif + /* state thread */ struct semaphore skt_sem; /* protects socket h/w state */ diff --git a/include/rdma/ib_cm.h b/include/rdma/ib_cm.h index 5308683c8c41..0a9fcd59eb43 100644 --- a/include/rdma/ib_cm.h +++ b/include/rdma/ib_cm.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2004 Intel Corporation. All rights reserved. + * Copyright (c) 2004, 2005 Intel Corporation. All rights reserved. * Copyright (c) 2004 Topspin Corporation. All rights reserved. * Copyright (c) 2004 Voltaire Corporation. All rights reserved. * Copyright (c) 2005 Sun Microsystems, Inc. All rights reserved. @@ -109,7 +109,6 @@ struct ib_cm_id; struct ib_cm_req_event_param { struct ib_cm_id *listen_id; - struct ib_device *device; u8 port; struct ib_sa_path_rec *primary_path; @@ -220,7 +219,6 @@ struct ib_cm_apr_event_param { struct ib_cm_sidr_req_event_param { struct ib_cm_id *listen_id; - struct ib_device *device; u8 port; u16 pkey; }; @@ -284,6 +282,7 @@ typedef int (*ib_cm_handler)(struct ib_cm_id *cm_id, struct ib_cm_id { ib_cm_handler cm_handler; void *context; + struct ib_device *device; __be64 service_id; __be64 service_mask; enum ib_cm_state state; /* internal CM/debug use */ @@ -295,6 +294,8 @@ struct ib_cm_id { /** * ib_create_cm_id - Allocate a communication identifier. + * @device: Device associated with the cm_id. All related communication will + * be associated with the specified device. * @cm_handler: Callback invoked to notify the user of CM events. * @context: User specified context associated with the communication * identifier. @@ -302,7 +303,8 @@ struct ib_cm_id { * Communication identifiers are used to track connection states, service * ID resolution requests, and listen requests. */ -struct ib_cm_id *ib_create_cm_id(ib_cm_handler cm_handler, +struct ib_cm_id *ib_create_cm_id(struct ib_device *device, + ib_cm_handler cm_handler, void *context); /** diff --git a/include/rdma/ib_mad.h b/include/rdma/ib_mad.h index 0e293fe733b0..2c133506742b 100644 --- a/include/rdma/ib_mad.h +++ b/include/rdma/ib_mad.h @@ -109,10 +109,14 @@ #define IB_QP_SET_QKEY 0x80000000 enum { + IB_MGMT_MAD_HDR = 24, IB_MGMT_MAD_DATA = 232, + IB_MGMT_RMPP_HDR = 36, IB_MGMT_RMPP_DATA = 220, + IB_MGMT_VENDOR_HDR = 40, IB_MGMT_VENDOR_DATA = 216, - IB_MGMT_SA_DATA = 200 + IB_MGMT_SA_HDR = 56, + IB_MGMT_SA_DATA = 200, }; struct ib_mad_hdr { @@ -203,26 +207,25 @@ struct ib_class_port_info /** * ib_mad_send_buf - MAD data buffer and work request for sends. - * @mad: References an allocated MAD data buffer. The size of the data - * buffer is specified in the @send_wr.length field. - * @mapping: DMA mapping information. + * @next: A pointer used to chain together MADs for posting. + * @mad: References an allocated MAD data buffer. * @mad_agent: MAD agent that allocated the buffer. + * @ah: The address handle to use when sending the MAD. * @context: User-controlled context fields. - * @send_wr: An initialized work request structure used when sending the MAD. - * The wr_id field of the work request is initialized to reference this - * data structure. - * @sge: A scatter-gather list referenced by the work request. + * @timeout_ms: Time to wait for a response. + * @retries: Number of times to retry a request for a response. * * Users are responsible for initializing the MAD buffer itself, with the * exception of specifying the payload length field in any RMPP MAD. */ struct ib_mad_send_buf { - struct ib_mad *mad; - DECLARE_PCI_UNMAP_ADDR(mapping) + struct ib_mad_send_buf *next; + void *mad; struct ib_mad_agent *mad_agent; + struct ib_ah *ah; void *context[2]; - struct ib_send_wr send_wr; - struct ib_sge sge; + int timeout_ms; + int retries; }; /** @@ -287,7 +290,7 @@ typedef void (*ib_mad_send_handler)(struct ib_mad_agent *mad_agent, * or @mad_send_wc. */ typedef void (*ib_mad_snoop_handler)(struct ib_mad_agent *mad_agent, - struct ib_send_wr *send_wr, + struct ib_mad_send_buf *send_buf, struct ib_mad_send_wc *mad_send_wc); /** @@ -334,13 +337,13 @@ struct ib_mad_agent { /** * ib_mad_send_wc - MAD send completion information. - * @wr_id: Work request identifier associated with the send MAD request. + * @send_buf: Send MAD data buffer associated with the send MAD request. * @status: Completion status. * @vendor_err: Optional vendor error information returned with a failed * request. */ struct ib_mad_send_wc { - u64 wr_id; + struct ib_mad_send_buf *send_buf; enum ib_wc_status status; u32 vendor_err; }; @@ -366,7 +369,7 @@ struct ib_mad_recv_buf { * @rmpp_list: Specifies a list of RMPP reassembled received MAD buffers. * @mad_len: The length of the received MAD, without duplicated headers. * - * For received response, the wr_id field of the wc is set to the wr_id + * For received response, the wr_id contains a pointer to the ib_mad_send_buf * for the corresponding send request. */ struct ib_mad_recv_wc { @@ -463,9 +466,9 @@ int ib_unregister_mad_agent(struct ib_mad_agent *mad_agent); /** * ib_post_send_mad - Posts MAD(s) to the send queue of the QP associated * with the registered client. - * @mad_agent: Specifies the associated registration to post the send to. - * @send_wr: Specifies the information needed to send the MAD(s). - * @bad_send_wr: Specifies the MAD on which an error was encountered. + * @send_buf: Specifies the information needed to send the MAD(s). + * @bad_send_buf: Specifies the MAD on which an error was encountered. This + * parameter is optional if only a single MAD is posted. * * Sent MADs are not guaranteed to complete in the order that they were posted. * @@ -479,9 +482,8 @@ int ib_unregister_mad_agent(struct ib_mad_agent *mad_agent); * defined data being transferred. The paylen_newwin field should be * specified in network-byte order. */ -int ib_post_send_mad(struct ib_mad_agent *mad_agent, - struct ib_send_wr *send_wr, - struct ib_send_wr **bad_send_wr); +int ib_post_send_mad(struct ib_mad_send_buf *send_buf, + struct ib_mad_send_buf **bad_send_buf); /** * ib_coalesce_recv_mad - Coalesces received MAD data into a single buffer. @@ -507,23 +509,25 @@ void ib_free_recv_mad(struct ib_mad_recv_wc *mad_recv_wc); /** * ib_cancel_mad - Cancels an outstanding send MAD operation. * @mad_agent: Specifies the registration associated with sent MAD. - * @wr_id: Indicates the work request identifier of the MAD to cancel. + * @send_buf: Indicates the MAD to cancel. * * MADs will be returned to the user through the corresponding * ib_mad_send_handler. */ -void ib_cancel_mad(struct ib_mad_agent *mad_agent, u64 wr_id); +void ib_cancel_mad(struct ib_mad_agent *mad_agent, + struct ib_mad_send_buf *send_buf); /** * ib_modify_mad - Modifies an outstanding send MAD operation. * @mad_agent: Specifies the registration associated with sent MAD. - * @wr_id: Indicates the work request identifier of the MAD to modify. + * @send_buf: Indicates the MAD to modify. * @timeout_ms: New timeout value for sent MAD. * * This call will reset the timeout value for a sent MAD to the specified * value. */ -int ib_modify_mad(struct ib_mad_agent *mad_agent, u64 wr_id, u32 timeout_ms); +int ib_modify_mad(struct ib_mad_agent *mad_agent, + struct ib_mad_send_buf *send_buf, u32 timeout_ms); /** * ib_redirect_mad_qp - Registers a QP for MAD services. @@ -572,7 +576,6 @@ int ib_process_mad_wc(struct ib_mad_agent *mad_agent, * @remote_qpn: Specifies the QPN of the receiving node. * @pkey_index: Specifies which PKey the MAD will be sent using. This field * is valid only if the remote_qpn is QP 1. - * @ah: References the address handle used to transfer to the remote node. * @rmpp_active: Indicates if the send will enable RMPP. * @hdr_len: Indicates the size of the data header of the MAD. This length * should include the common MAD header, RMPP header, plus any class @@ -582,11 +585,10 @@ int ib_process_mad_wc(struct ib_mad_agent *mad_agent, * additional padding that may be necessary. * @gfp_mask: GFP mask used for the memory allocation. * - * This is a helper routine that may be used to allocate a MAD. Users are - * not required to allocate outbound MADs using this call. The returned - * MAD send buffer will reference a data buffer usable for sending a MAD, along + * This routine allocates a MAD for sending. The returned MAD send buffer + * will reference a data buffer usable for sending a MAD, along * with an initialized work request structure. Users may modify the returned - * MAD data buffer or work request before posting the send. + * MAD data buffer before posting the send. * * The returned data buffer will be cleared. Users are responsible for * initializing the common MAD and any class specific headers. If @rmpp_active @@ -594,9 +596,9 @@ int ib_process_mad_wc(struct ib_mad_agent *mad_agent, */ struct ib_mad_send_buf * ib_create_send_mad(struct ib_mad_agent *mad_agent, u32 remote_qpn, u16 pkey_index, - struct ib_ah *ah, int rmpp_active, + int rmpp_active, int hdr_len, int data_len, - unsigned int __nocast gfp_mask); + gfp_t gfp_mask); /** * ib_free_send_mad - Returns data buffers used to send a MAD. diff --git a/include/rdma/ib_sa.h b/include/rdma/ib_sa.h index a7555c800ecf..f404fe21cc21 100644 --- a/include/rdma/ib_sa.h +++ b/include/rdma/ib_sa.h @@ -285,7 +285,7 @@ void ib_sa_cancel_query(int id, struct ib_sa_query *query); int ib_sa_path_rec_get(struct ib_device *device, u8 port_num, struct ib_sa_path_rec *rec, ib_sa_comp_mask comp_mask, - int timeout_ms, unsigned int __nocast gfp_mask, + int timeout_ms, gfp_t gfp_mask, void (*callback)(int status, struct ib_sa_path_rec *resp, void *context), @@ -296,7 +296,7 @@ int ib_sa_mcmember_rec_query(struct ib_device *device, u8 port_num, u8 method, struct ib_sa_mcmember_rec *rec, ib_sa_comp_mask comp_mask, - int timeout_ms, unsigned int __nocast gfp_mask, + int timeout_ms, gfp_t gfp_mask, void (*callback)(int status, struct ib_sa_mcmember_rec *resp, void *context), @@ -307,7 +307,7 @@ int ib_sa_service_rec_query(struct ib_device *device, u8 port_num, u8 method, struct ib_sa_service_rec *rec, ib_sa_comp_mask comp_mask, - int timeout_ms, unsigned int __nocast gfp_mask, + int timeout_ms, gfp_t gfp_mask, void (*callback)(int status, struct ib_sa_service_rec *resp, void *context), @@ -342,7 +342,7 @@ static inline int ib_sa_mcmember_rec_set(struct ib_device *device, u8 port_num, struct ib_sa_mcmember_rec *rec, ib_sa_comp_mask comp_mask, - int timeout_ms, unsigned int __nocast gfp_mask, + int timeout_ms, gfp_t gfp_mask, void (*callback)(int status, struct ib_sa_mcmember_rec *resp, void *context), @@ -384,7 +384,7 @@ static inline int ib_sa_mcmember_rec_delete(struct ib_device *device, u8 port_num, struct ib_sa_mcmember_rec *rec, ib_sa_comp_mask comp_mask, - int timeout_ms, unsigned int __nocast gfp_mask, + int timeout_ms, gfp_t gfp_mask, void (*callback)(int status, struct ib_sa_mcmember_rec *resp, void *context), diff --git a/include/rdma/ib_user_cm.h b/include/rdma/ib_user_cm.h index e4d1654276ad..19be116047f6 100644 --- a/include/rdma/ib_user_cm.h +++ b/include/rdma/ib_user_cm.h @@ -38,7 +38,7 @@ #include <linux/types.h> -#define IB_USER_CM_ABI_VERSION 2 +#define IB_USER_CM_ABI_VERSION 4 enum { IB_USER_CM_CMD_CREATE_ID, @@ -84,6 +84,7 @@ struct ib_ucm_create_id_resp { struct ib_ucm_destroy_id { __u64 response; __u32 id; + __u32 reserved; }; struct ib_ucm_destroy_id_resp { @@ -93,6 +94,7 @@ struct ib_ucm_destroy_id_resp { struct ib_ucm_attr_id { __u64 response; __u32 id; + __u32 reserved; }; struct ib_ucm_attr_id_resp { @@ -164,6 +166,7 @@ struct ib_ucm_listen { __be64 service_id; __be64 service_mask; __u32 id; + __u32 reserved; }; struct ib_ucm_establish { @@ -219,7 +222,7 @@ struct ib_ucm_req { __u8 rnr_retry_count; __u8 max_cm_retries; __u8 srq; - __u8 reserved[1]; + __u8 reserved[5]; }; struct ib_ucm_rep { @@ -236,6 +239,7 @@ struct ib_ucm_rep { __u8 flow_control; __u8 rnr_retry_count; __u8 srq; + __u8 reserved[4]; }; struct ib_ucm_info { @@ -245,7 +249,7 @@ struct ib_ucm_info { __u64 data; __u8 info_len; __u8 data_len; - __u8 reserved[2]; + __u8 reserved[6]; }; struct ib_ucm_mra { @@ -273,6 +277,7 @@ struct ib_ucm_sidr_req { __u16 pkey; __u8 len; __u8 max_cm_retries; + __u8 reserved[4]; }; struct ib_ucm_sidr_rep { @@ -284,7 +289,7 @@ struct ib_ucm_sidr_rep { __u64 data; __u8 info_len; __u8 data_len; - __u8 reserved[2]; + __u8 reserved[6]; }; /* * event notification ABI structures. @@ -295,12 +300,10 @@ struct ib_ucm_event_get { __u64 info; __u8 data_len; __u8 info_len; - __u8 reserved[2]; + __u8 reserved[6]; }; struct ib_ucm_req_event_resp { - /* device */ - /* port */ struct ib_ucm_path_rec primary_path; struct ib_ucm_path_rec alternate_path; __be64 remote_ca_guid; @@ -316,6 +319,8 @@ struct ib_ucm_req_event_resp { __u8 retry_count; __u8 rnr_retry_count; __u8 srq; + __u8 port; + __u8 reserved[7]; }; struct ib_ucm_rep_event_resp { @@ -330,7 +335,7 @@ struct ib_ucm_rep_event_resp { __u8 flow_control; __u8 rnr_retry_count; __u8 srq; - __u8 reserved[1]; + __u8 reserved[5]; }; struct ib_ucm_rej_event_resp { @@ -353,10 +358,9 @@ struct ib_ucm_apr_event_resp { }; struct ib_ucm_sidr_req_event_resp { - /* device */ - /* port */ __u16 pkey; - __u8 reserved[2]; + __u8 port; + __u8 reserved; }; struct ib_ucm_sidr_rep_event_resp { @@ -376,6 +380,7 @@ struct ib_ucm_event_resp { __u32 id; __u32 event; __u32 present; + __u32 reserved; union { struct ib_ucm_req_event_resp req_resp; struct ib_ucm_rep_event_resp rep_resp; diff --git a/include/rdma/ib_user_verbs.h b/include/rdma/ib_user_verbs.h index fd85725391a4..5ff1490c08db 100644 --- a/include/rdma/ib_user_verbs.h +++ b/include/rdma/ib_user_verbs.h @@ -1,6 +1,7 @@ /* * Copyright (c) 2005 Topspin Communications. All rights reserved. * Copyright (c) 2005 Cisco Systems. All rights reserved. + * Copyright (c) 2005 PathScale, Inc. All rights reserved. * * This software is available to you under a choice of one of two * licenses. You may choose to be licensed under the terms of the GNU @@ -42,15 +43,12 @@ * Increment this value if any changes that break userspace ABI * compatibility are made. */ -#define IB_USER_VERBS_ABI_VERSION 2 +#define IB_USER_VERBS_ABI_VERSION 4 enum { - IB_USER_VERBS_CMD_QUERY_PARAMS, IB_USER_VERBS_CMD_GET_CONTEXT, IB_USER_VERBS_CMD_QUERY_DEVICE, IB_USER_VERBS_CMD_QUERY_PORT, - IB_USER_VERBS_CMD_QUERY_GID, - IB_USER_VERBS_CMD_QUERY_PKEY, IB_USER_VERBS_CMD_ALLOC_PD, IB_USER_VERBS_CMD_DEALLOC_PD, IB_USER_VERBS_CMD_CREATE_AH, @@ -65,6 +63,7 @@ enum { IB_USER_VERBS_CMD_ALLOC_MW, IB_USER_VERBS_CMD_BIND_MW, IB_USER_VERBS_CMD_DEALLOC_MW, + IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL, IB_USER_VERBS_CMD_CREATE_CQ, IB_USER_VERBS_CMD_RESIZE_CQ, IB_USER_VERBS_CMD_DESTROY_CQ, @@ -90,8 +89,11 @@ enum { * Make sure that all structs defined in this file remain laid out so * that they pack the same way on 32-bit and 64-bit architectures (to * avoid incompatibility between 32-bit userspace and 64-bit kernels). - * In particular do not use pointer types -- pass pointers in __u64 - * instead. + * Specifically: + * - Do not use pointer types -- pass pointers in __u64 instead. + * - Make sure that any structure larger than 4 bytes is padded to a + * multiple of 8 bytes. Otherwise the structure size will be + * different between 32-bit and 64-bit architectures. */ struct ib_uverbs_async_event_desc { @@ -118,27 +120,14 @@ struct ib_uverbs_cmd_hdr { __u16 out_words; }; -/* - * No driver_data for "query params" command, since this is intended - * to be a core function with no possible device dependence. - */ -struct ib_uverbs_query_params { - __u64 response; -}; - -struct ib_uverbs_query_params_resp { - __u32 num_cq_events; -}; - struct ib_uverbs_get_context { __u64 response; - __u64 cq_fd_tab; __u64 driver_data[0]; }; struct ib_uverbs_get_context_resp { __u32 async_fd; - __u32 reserved; + __u32 num_comp_vectors; }; struct ib_uverbs_query_device { @@ -220,31 +209,6 @@ struct ib_uverbs_query_port_resp { __u8 reserved[3]; }; -struct ib_uverbs_query_gid { - __u64 response; - __u8 port_num; - __u8 index; - __u8 reserved[6]; - __u64 driver_data[0]; -}; - -struct ib_uverbs_query_gid_resp { - __u8 gid[16]; -}; - -struct ib_uverbs_query_pkey { - __u64 response; - __u8 port_num; - __u8 index; - __u8 reserved[6]; - __u64 driver_data[0]; -}; - -struct ib_uverbs_query_pkey_resp { - __u16 pkey; - __u16 reserved; -}; - struct ib_uverbs_alloc_pd { __u64 response; __u64 driver_data[0]; @@ -278,11 +242,21 @@ struct ib_uverbs_dereg_mr { __u32 mr_handle; }; +struct ib_uverbs_create_comp_channel { + __u64 response; +}; + +struct ib_uverbs_create_comp_channel_resp { + __u32 fd; +}; + struct ib_uverbs_create_cq { __u64 response; __u64 user_handle; __u32 cqe; - __u32 event_handler; + __u32 comp_vector; + __s32 comp_channel; + __u32 reserved; __u64 driver_data[0]; }; @@ -291,6 +265,41 @@ struct ib_uverbs_create_cq_resp { __u32 cqe; }; +struct ib_uverbs_poll_cq { + __u64 response; + __u32 cq_handle; + __u32 ne; +}; + +struct ib_uverbs_wc { + __u64 wr_id; + __u32 status; + __u32 opcode; + __u32 vendor_err; + __u32 byte_len; + __u32 imm_data; + __u32 qp_num; + __u32 src_qp; + __u32 wc_flags; + __u16 pkey_index; + __u16 slid; + __u8 sl; + __u8 dlid_path_bits; + __u8 port_num; + __u8 reserved; +}; + +struct ib_uverbs_poll_cq_resp { + __u32 count; + __u32 reserved; + struct ib_uverbs_wc wc[0]; +}; + +struct ib_uverbs_req_notify_cq { + __u32 cq_handle; + __u32 solicited_only; +}; + struct ib_uverbs_destroy_cq { __u64 response; __u32 cq_handle; @@ -324,6 +333,11 @@ struct ib_uverbs_create_qp { struct ib_uverbs_create_qp_resp { __u32 qp_handle; __u32 qpn; + __u32 max_send_wr; + __u32 max_recv_wr; + __u32 max_send_sge; + __u32 max_recv_sge; + __u32 max_inline_data; }; /* @@ -388,6 +402,127 @@ struct ib_uverbs_destroy_qp_resp { __u32 events_reported; }; +/* + * The ib_uverbs_sge structure isn't used anywhere, since we assume + * the ib_sge structure is packed the same way on 32-bit and 64-bit + * architectures in both kernel and user space. It's just here to + * document the ABI. + */ +struct ib_uverbs_sge { + __u64 addr; + __u32 length; + __u32 lkey; +}; + +struct ib_uverbs_send_wr { + __u64 wr_id; + __u32 num_sge; + __u32 opcode; + __u32 send_flags; + __u32 imm_data; + union { + struct { + __u64 remote_addr; + __u32 rkey; + __u32 reserved; + } rdma; + struct { + __u64 remote_addr; + __u64 compare_add; + __u64 swap; + __u32 rkey; + __u32 reserved; + } atomic; + struct { + __u32 ah; + __u32 remote_qpn; + __u32 remote_qkey; + __u32 reserved; + } ud; + } wr; +}; + +struct ib_uverbs_post_send { + __u64 response; + __u32 qp_handle; + __u32 wr_count; + __u32 sge_count; + __u32 wqe_size; + struct ib_uverbs_send_wr send_wr[0]; +}; + +struct ib_uverbs_post_send_resp { + __u32 bad_wr; +}; + +struct ib_uverbs_recv_wr { + __u64 wr_id; + __u32 num_sge; + __u32 reserved; +}; + +struct ib_uverbs_post_recv { + __u64 response; + __u32 qp_handle; + __u32 wr_count; + __u32 sge_count; + __u32 wqe_size; + struct ib_uverbs_recv_wr recv_wr[0]; +}; + +struct ib_uverbs_post_recv_resp { + __u32 bad_wr; +}; + +struct ib_uverbs_post_srq_recv { + __u64 response; + __u32 srq_handle; + __u32 wr_count; + __u32 sge_count; + __u32 wqe_size; + struct ib_uverbs_recv_wr recv[0]; +}; + +struct ib_uverbs_post_srq_recv_resp { + __u32 bad_wr; +}; + +struct ib_uverbs_global_route { + __u8 dgid[16]; + __u32 flow_label; + __u8 sgid_index; + __u8 hop_limit; + __u8 traffic_class; + __u8 reserved; +}; + +struct ib_uverbs_ah_attr { + struct ib_uverbs_global_route grh; + __u16 dlid; + __u8 sl; + __u8 src_path_bits; + __u8 static_rate; + __u8 is_global; + __u8 port_num; + __u8 reserved; +}; + +struct ib_uverbs_create_ah { + __u64 response; + __u64 user_handle; + __u32 pd_handle; + __u32 reserved; + struct ib_uverbs_ah_attr attr; +}; + +struct ib_uverbs_create_ah_resp { + __u32 ah_handle; +}; + +struct ib_uverbs_destroy_ah { + __u32 ah_handle; +}; + struct ib_uverbs_attach_mcast { __u8 gid[16]; __u32 qp_handle; @@ -422,9 +557,7 @@ struct ib_uverbs_modify_srq { __u32 srq_handle; __u32 attr_mask; __u32 max_wr; - __u32 max_sge; __u32 srq_limit; - __u32 reserved; __u64 driver_data[0]; }; diff --git a/include/rdma/ib_verbs.h b/include/rdma/ib_verbs.h index e16cf94870f2..a7f4c355a91f 100644 --- a/include/rdma/ib_verbs.h +++ b/include/rdma/ib_verbs.h @@ -595,11 +595,8 @@ struct ib_send_wr { } atomic; struct { struct ib_ah *ah; - struct ib_mad_hdr *mad_hdr; u32 remote_qpn; u32 remote_qkey; - int timeout_ms; /* valid for MADs only */ - int retries; /* valid for MADs only */ u16 pkey_index; /* valid for GSI only */ u8 port_num; /* valid for DR SMPs on switch only */ } ud; @@ -665,7 +662,6 @@ struct ib_ucontext { struct list_head qp_list; struct list_head srq_list; struct list_head ah_list; - spinlock_t lock; }; struct ib_uobject { @@ -885,7 +881,7 @@ struct ib_device { struct ib_ucontext *context, struct ib_udata *udata); int (*destroy_cq)(struct ib_cq *cq); - int (*resize_cq)(struct ib_cq *cq, int *cqe); + int (*resize_cq)(struct ib_cq *cq, int cqe); int (*poll_cq)(struct ib_cq *cq, int num_entries, struct ib_wc *wc); int (*peek_cq)(struct ib_cq *cq, int wc_cnt); @@ -952,6 +948,9 @@ struct ib_device { IB_DEV_UNREGISTERED } reg_state; + u64 uverbs_cmd_mask; + int uverbs_abi_ver; + u8 node_type; u8 phys_port_cnt; }; diff --git a/include/rxrpc/call.h b/include/rxrpc/call.h index f48f27e9e0ab..b86f83743510 100644 --- a/include/rxrpc/call.h +++ b/include/rxrpc/call.h @@ -203,7 +203,7 @@ extern int rxrpc_call_write_data(struct rxrpc_call *call, size_t sioc, struct kvec *siov, uint8_t rxhdr_flags, - int alloc_flags, + gfp_t alloc_flags, int dup_data, size_t *size_sent); diff --git a/include/rxrpc/message.h b/include/rxrpc/message.h index 3a59df6870b2..b318f273d4f2 100644 --- a/include/rxrpc/message.h +++ b/include/rxrpc/message.h @@ -63,7 +63,7 @@ extern int rxrpc_conn_newmsg(struct rxrpc_connection *conn, uint8_t type, int count, struct kvec *diov, - int alloc_flags, + gfp_t alloc_flags, struct rxrpc_message **_msg); extern int rxrpc_conn_sendmsg(struct rxrpc_connection *conn, struct rxrpc_message *msg); diff --git a/include/scsi/iscsi_if.h b/include/scsi/iscsi_if.h new file mode 100644 index 000000000000..be1bc792ab18 --- /dev/null +++ b/include/scsi/iscsi_if.h @@ -0,0 +1,245 @@ +/* + * iSCSI User/Kernel Shares (Defines, Constants, Protocol definitions, etc) + * + * Copyright (C) 2005 Dmitry Yusupov + * Copyright (C) 2005 Alex Aizman + * maintained by open-iscsi@googlegroups.com + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published + * by the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + * + * See the file COPYING included with this distribution for more details. + */ + +#ifndef ISCSI_IF_H +#define ISCSI_IF_H + +#include <scsi/iscsi_proto.h> + +#define UEVENT_BASE 10 +#define KEVENT_BASE 100 +#define ISCSI_ERR_BASE 1000 + +enum iscsi_uevent_e { + ISCSI_UEVENT_UNKNOWN = 0, + + /* down events */ + ISCSI_UEVENT_CREATE_SESSION = UEVENT_BASE + 1, + ISCSI_UEVENT_DESTROY_SESSION = UEVENT_BASE + 2, + ISCSI_UEVENT_CREATE_CONN = UEVENT_BASE + 3, + ISCSI_UEVENT_DESTROY_CONN = UEVENT_BASE + 4, + ISCSI_UEVENT_BIND_CONN = UEVENT_BASE + 5, + ISCSI_UEVENT_SET_PARAM = UEVENT_BASE + 6, + ISCSI_UEVENT_START_CONN = UEVENT_BASE + 7, + ISCSI_UEVENT_STOP_CONN = UEVENT_BASE + 8, + ISCSI_UEVENT_SEND_PDU = UEVENT_BASE + 9, + ISCSI_UEVENT_GET_STATS = UEVENT_BASE + 10, + ISCSI_UEVENT_GET_PARAM = UEVENT_BASE + 11, + + /* up events */ + ISCSI_KEVENT_RECV_PDU = KEVENT_BASE + 1, + ISCSI_KEVENT_CONN_ERROR = KEVENT_BASE + 2, + ISCSI_KEVENT_IF_ERROR = KEVENT_BASE + 3, +}; + +struct iscsi_uevent { + uint32_t type; /* k/u events type */ + uint32_t iferror; /* carries interface or resource errors */ + uint64_t transport_handle; + + union { + /* messages u -> k */ + struct msg_create_session { + uint32_t initial_cmdsn; + } c_session; + struct msg_destroy_session { + uint64_t session_handle; + uint32_t sid; + } d_session; + struct msg_create_conn { + uint64_t session_handle; + uint32_t cid; + uint32_t sid; + } c_conn; + struct msg_bind_conn { + uint64_t session_handle; + uint64_t conn_handle; + uint32_t transport_fd; + uint32_t is_leading; + } b_conn; + struct msg_destroy_conn { + uint64_t conn_handle; + uint32_t cid; + } d_conn; + struct msg_send_pdu { + uint32_t hdr_size; + uint32_t data_size; + uint64_t conn_handle; + } send_pdu; + struct msg_set_param { + uint64_t conn_handle; + uint32_t param; /* enum iscsi_param */ + uint32_t value; + } set_param; + struct msg_start_conn { + uint64_t conn_handle; + } start_conn; + struct msg_stop_conn { + uint64_t conn_handle; + uint32_t flag; + } stop_conn; + struct msg_get_stats { + uint64_t conn_handle; + } get_stats; + } u; + union { + /* messages k -> u */ + uint64_t handle; + int retcode; + struct msg_create_session_ret { + uint64_t session_handle; + uint32_t sid; + } c_session_ret; + struct msg_recv_req { + uint64_t recv_handle; + uint64_t conn_handle; + } recv_req; + struct msg_conn_error { + uint64_t conn_handle; + uint32_t error; /* enum iscsi_err */ + } connerror; + } r; +} __attribute__ ((aligned (sizeof(uint64_t)))); + +/* + * Common error codes + */ +enum iscsi_err { + ISCSI_OK = 0, + + ISCSI_ERR_DATASN = ISCSI_ERR_BASE + 1, + ISCSI_ERR_DATA_OFFSET = ISCSI_ERR_BASE + 2, + ISCSI_ERR_MAX_CMDSN = ISCSI_ERR_BASE + 3, + ISCSI_ERR_EXP_CMDSN = ISCSI_ERR_BASE + 4, + ISCSI_ERR_BAD_OPCODE = ISCSI_ERR_BASE + 5, + ISCSI_ERR_DATALEN = ISCSI_ERR_BASE + 6, + ISCSI_ERR_AHSLEN = ISCSI_ERR_BASE + 7, + ISCSI_ERR_PROTO = ISCSI_ERR_BASE + 8, + ISCSI_ERR_LUN = ISCSI_ERR_BASE + 9, + ISCSI_ERR_BAD_ITT = ISCSI_ERR_BASE + 10, + ISCSI_ERR_CONN_FAILED = ISCSI_ERR_BASE + 11, + ISCSI_ERR_R2TSN = ISCSI_ERR_BASE + 12, + ISCSI_ERR_SESSION_FAILED = ISCSI_ERR_BASE + 13, + ISCSI_ERR_HDR_DGST = ISCSI_ERR_BASE + 14, + ISCSI_ERR_DATA_DGST = ISCSI_ERR_BASE + 15, + ISCSI_ERR_PARAM_NOT_FOUND = ISCSI_ERR_BASE + 16 +}; + +/* + * iSCSI Parameters (RFC3720) + */ +enum iscsi_param { + ISCSI_PARAM_MAX_RECV_DLENGTH = 0, + ISCSI_PARAM_MAX_XMIT_DLENGTH = 1, + ISCSI_PARAM_HDRDGST_EN = 2, + ISCSI_PARAM_DATADGST_EN = 3, + ISCSI_PARAM_INITIAL_R2T_EN = 4, + ISCSI_PARAM_MAX_R2T = 5, + ISCSI_PARAM_IMM_DATA_EN = 6, + ISCSI_PARAM_FIRST_BURST = 7, + ISCSI_PARAM_MAX_BURST = 8, + ISCSI_PARAM_PDU_INORDER_EN = 9, + ISCSI_PARAM_DATASEQ_INORDER_EN = 10, + ISCSI_PARAM_ERL = 11, + ISCSI_PARAM_IFMARKER_EN = 12, + ISCSI_PARAM_OFMARKER_EN = 13, +}; +#define ISCSI_PARAM_MAX 14 + +typedef uint64_t iscsi_sessionh_t; /* iSCSI Data-Path session handle */ +typedef uint64_t iscsi_connh_t; /* iSCSI Data-Path connection handle */ + +#define iscsi_ptr(_handle) ((void*)(unsigned long)_handle) +#define iscsi_handle(_ptr) ((uint64_t)(unsigned long)_ptr) +#define iscsi_hostdata(_hostdata) ((void*)_hostdata + sizeof(unsigned long)) + +/* + * These flags presents iSCSI Data-Path capabilities. + */ +#define CAP_RECOVERY_L0 0x1 +#define CAP_RECOVERY_L1 0x2 +#define CAP_RECOVERY_L2 0x4 +#define CAP_MULTI_R2T 0x8 +#define CAP_HDRDGST 0x10 +#define CAP_DATADGST 0x20 +#define CAP_MULTI_CONN 0x40 +#define CAP_TEXT_NEGO 0x80 +#define CAP_MARKERS 0x100 + +/* + * These flags describes reason of stop_conn() call + */ +#define STOP_CONN_TERM 0x1 +#define STOP_CONN_SUSPEND 0x2 +#define STOP_CONN_RECOVER 0x3 + +#define ISCSI_STATS_CUSTOM_MAX 32 +#define ISCSI_STATS_CUSTOM_DESC_MAX 64 +struct iscsi_stats_custom { + char desc[ISCSI_STATS_CUSTOM_DESC_MAX]; + uint64_t value; +}; + +/* + * struct iscsi_stats - iSCSI Statistics (iSCSI MIB) + * + * Note: this structure contains counters collected on per-connection basis. + */ +struct iscsi_stats { + /* octets */ + uint64_t txdata_octets; + uint64_t rxdata_octets; + + /* xmit pdus */ + uint32_t noptx_pdus; + uint32_t scsicmd_pdus; + uint32_t tmfcmd_pdus; + uint32_t login_pdus; + uint32_t text_pdus; + uint32_t dataout_pdus; + uint32_t logout_pdus; + uint32_t snack_pdus; + + /* recv pdus */ + uint32_t noprx_pdus; + uint32_t scsirsp_pdus; + uint32_t tmfrsp_pdus; + uint32_t textrsp_pdus; + uint32_t datain_pdus; + uint32_t logoutrsp_pdus; + uint32_t r2t_pdus; + uint32_t async_pdus; + uint32_t rjt_pdus; + + /* errors */ + uint32_t digest_err; + uint32_t timeout_err; + + /* + * iSCSI Custom Statistics support, i.e. Transport could + * extend existing MIB statistics with its own specific statistics + * up to ISCSI_STATS_CUSTOM_MAX + */ + uint32_t custom_length; + struct iscsi_stats_custom custom[0] + __attribute__ ((aligned (sizeof(uint64_t)))); +}; + +#endif diff --git a/include/scsi/iscsi_proto.h b/include/scsi/iscsi_proto.h new file mode 100644 index 000000000000..4feda05fdf25 --- /dev/null +++ b/include/scsi/iscsi_proto.h @@ -0,0 +1,589 @@ +/* + * RFC 3720 (iSCSI) protocol data types + * + * Copyright (C) 2005 Dmitry Yusupov + * Copyright (C) 2005 Alex Aizman + * maintained by open-iscsi@googlegroups.com + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published + * by the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + * + * See the file COPYING included with this distribution for more details. + */ + +#ifndef ISCSI_PROTO_H +#define ISCSI_PROTO_H + +#define ISCSI_VERSION_STR "0.3" +#define ISCSI_DATE_STR "22-Apr-2005" +#define ISCSI_DRAFT20_VERSION 0x00 + +/* default iSCSI listen port for incoming connections */ +#define ISCSI_LISTEN_PORT 3260 + +/* Padding word length */ +#define PAD_WORD_LEN 4 + +/* + * useful common(control and data pathes) macro + */ +#define ntoh24(p) (((p)[0] << 16) | ((p)[1] << 8) | ((p)[2])) +#define hton24(p, v) { \ + p[0] = (((v) >> 16) & 0xFF); \ + p[1] = (((v) >> 8) & 0xFF); \ + p[2] = ((v) & 0xFF); \ +} +#define zero_data(p) {p[0]=0;p[1]=0;p[2]=0;} + +/* + * iSCSI Template Message Header + */ +struct iscsi_hdr { + uint8_t opcode; + uint8_t flags; /* Final bit */ + uint8_t rsvd2[2]; + uint8_t hlength; /* AHSs total length */ + uint8_t dlength[3]; /* Data length */ + uint8_t lun[8]; + __be32 itt; /* Initiator Task Tag */ + __be32 ttt; /* Target Task Tag */ + __be32 statsn; + __be32 exp_statsn; + __be32 max_statsn; + uint8_t other[12]; +}; + +/************************* RFC 3720 Begin *****************************/ + +#define ISCSI_RESERVED_TAG 0xffffffff + +/* Opcode encoding bits */ +#define ISCSI_OP_RETRY 0x80 +#define ISCSI_OP_IMMEDIATE 0x40 +#define ISCSI_OPCODE_MASK 0x3F + +/* Initiator Opcode values */ +#define ISCSI_OP_NOOP_OUT 0x00 +#define ISCSI_OP_SCSI_CMD 0x01 +#define ISCSI_OP_SCSI_TMFUNC 0x02 +#define ISCSI_OP_LOGIN 0x03 +#define ISCSI_OP_TEXT 0x04 +#define ISCSI_OP_SCSI_DATA_OUT 0x05 +#define ISCSI_OP_LOGOUT 0x06 +#define ISCSI_OP_SNACK 0x10 + +#define ISCSI_OP_VENDOR1_CMD 0x1c +#define ISCSI_OP_VENDOR2_CMD 0x1d +#define ISCSI_OP_VENDOR3_CMD 0x1e +#define ISCSI_OP_VENDOR4_CMD 0x1f + +/* Target Opcode values */ +#define ISCSI_OP_NOOP_IN 0x20 +#define ISCSI_OP_SCSI_CMD_RSP 0x21 +#define ISCSI_OP_SCSI_TMFUNC_RSP 0x22 +#define ISCSI_OP_LOGIN_RSP 0x23 +#define ISCSI_OP_TEXT_RSP 0x24 +#define ISCSI_OP_SCSI_DATA_IN 0x25 +#define ISCSI_OP_LOGOUT_RSP 0x26 +#define ISCSI_OP_R2T 0x31 +#define ISCSI_OP_ASYNC_EVENT 0x32 +#define ISCSI_OP_REJECT 0x3f + +struct iscsi_ahs_hdr { + __be16 ahslength; + uint8_t ahstype; + uint8_t ahspec[5]; +}; + +#define ISCSI_AHSTYPE_CDB 1 +#define ISCSI_AHSTYPE_RLENGTH 2 + +/* iSCSI PDU Header */ +struct iscsi_cmd { + uint8_t opcode; + uint8_t flags; + __be16 rsvd2; + uint8_t hlength; + uint8_t dlength[3]; + uint8_t lun[8]; + __be32 itt; /* Initiator Task Tag */ + __be32 data_length; + __be32 cmdsn; + __be32 exp_statsn; + uint8_t cdb[16]; /* SCSI Command Block */ + /* Additional Data (Command Dependent) */ +}; + +/* Command PDU flags */ +#define ISCSI_FLAG_CMD_FINAL 0x80 +#define ISCSI_FLAG_CMD_READ 0x40 +#define ISCSI_FLAG_CMD_WRITE 0x20 +#define ISCSI_FLAG_CMD_ATTR_MASK 0x07 /* 3 bits */ + +/* SCSI Command Attribute values */ +#define ISCSI_ATTR_UNTAGGED 0 +#define ISCSI_ATTR_SIMPLE 1 +#define ISCSI_ATTR_ORDERED 2 +#define ISCSI_ATTR_HEAD_OF_QUEUE 3 +#define ISCSI_ATTR_ACA 4 + +struct iscsi_rlength_ahdr { + __be16 ahslength; + uint8_t ahstype; + uint8_t reserved; + __be32 read_length; +}; + +/* SCSI Response Header */ +struct iscsi_cmd_rsp { + uint8_t opcode; + uint8_t flags; + uint8_t response; + uint8_t cmd_status; + uint8_t hlength; + uint8_t dlength[3]; + uint8_t rsvd[8]; + __be32 itt; /* Initiator Task Tag */ + __be32 rsvd1; + __be32 statsn; + __be32 exp_cmdsn; + __be32 max_cmdsn; + __be32 exp_datasn; + __be32 bi_residual_count; + __be32 residual_count; + /* Response or Sense Data (optional) */ +}; + +/* Command Response PDU flags */ +#define ISCSI_FLAG_CMD_BIDI_OVERFLOW 0x10 +#define ISCSI_FLAG_CMD_BIDI_UNDERFLOW 0x08 +#define ISCSI_FLAG_CMD_OVERFLOW 0x04 +#define ISCSI_FLAG_CMD_UNDERFLOW 0x02 + +/* iSCSI Status values. Valid if Rsp Selector bit is not set */ +#define ISCSI_STATUS_CMD_COMPLETED 0 +#define ISCSI_STATUS_TARGET_FAILURE 1 +#define ISCSI_STATUS_SUBSYS_FAILURE 2 + +/* Asynchronous Event Header */ +struct iscsi_async { + uint8_t opcode; + uint8_t flags; + uint8_t rsvd2[2]; + uint8_t rsvd3; + uint8_t dlength[3]; + uint8_t lun[8]; + uint8_t rsvd4[8]; + __be32 statsn; + __be32 exp_cmdsn; + __be32 max_cmdsn; + uint8_t async_event; + uint8_t async_vcode; + __be16 param1; + __be16 param2; + __be16 param3; + uint8_t rsvd5[4]; +}; + +/* iSCSI Event Codes */ +#define ISCSI_ASYNC_MSG_SCSI_EVENT 0 +#define ISCSI_ASYNC_MSG_REQUEST_LOGOUT 1 +#define ISCSI_ASYNC_MSG_DROPPING_CONNECTION 2 +#define ISCSI_ASYNC_MSG_DROPPING_ALL_CONNECTIONS 3 +#define ISCSI_ASYNC_MSG_PARAM_NEGOTIATION 4 +#define ISCSI_ASYNC_MSG_VENDOR_SPECIFIC 255 + +/* NOP-Out Message */ +struct iscsi_nopout { + uint8_t opcode; + uint8_t flags; + __be16 rsvd2; + uint8_t rsvd3; + uint8_t dlength[3]; + uint8_t lun[8]; + __be32 itt; /* Initiator Task Tag */ + __be32 ttt; /* Target Transfer Tag */ + __be32 cmdsn; + __be32 exp_statsn; + uint8_t rsvd4[16]; +}; + +/* NOP-In Message */ +struct iscsi_nopin { + uint8_t opcode; + uint8_t flags; + __be16 rsvd2; + uint8_t rsvd3; + uint8_t dlength[3]; + uint8_t lun[8]; + __be32 itt; /* Initiator Task Tag */ + __be32 ttt; /* Target Transfer Tag */ + __be32 statsn; + __be32 exp_cmdsn; + __be32 max_cmdsn; + uint8_t rsvd4[12]; +}; + +/* SCSI Task Management Message Header */ +struct iscsi_tm { + uint8_t opcode; + uint8_t flags; + uint8_t rsvd1[2]; + uint8_t hlength; + uint8_t dlength[3]; + uint8_t lun[8]; + __be32 itt; /* Initiator Task Tag */ + __be32 rtt; /* Reference Task Tag */ + __be32 cmdsn; + __be32 exp_statsn; + __be32 refcmdsn; + __be32 exp_datasn; + uint8_t rsvd2[8]; +}; + +#define ISCSI_FLAG_TM_FUNC_MASK 0x7F + +/* Function values */ +#define ISCSI_TM_FUNC_ABORT_TASK 1 +#define ISCSI_TM_FUNC_ABORT_TASK_SET 2 +#define ISCSI_TM_FUNC_CLEAR_ACA 3 +#define ISCSI_TM_FUNC_CLEAR_TASK_SET 4 +#define ISCSI_TM_FUNC_LOGICAL_UNIT_RESET 5 +#define ISCSI_TM_FUNC_TARGET_WARM_RESET 6 +#define ISCSI_TM_FUNC_TARGET_COLD_RESET 7 +#define ISCSI_TM_FUNC_TASK_REASSIGN 8 + +/* SCSI Task Management Response Header */ +struct iscsi_tm_rsp { + uint8_t opcode; + uint8_t flags; + uint8_t response; /* see Response values below */ + uint8_t qualifier; + uint8_t hlength; + uint8_t dlength[3]; + uint8_t rsvd2[8]; + __be32 itt; /* Initiator Task Tag */ + __be32 rtt; /* Reference Task Tag */ + __be32 statsn; + __be32 exp_cmdsn; + __be32 max_cmdsn; + uint8_t rsvd3[12]; +}; + +/* Response values */ +#define ISCSI_TMF_RSP_COMPLETE 0x00 +#define ISCSI_TMF_RSP_NO_TASK 0x01 +#define ISCSI_TMF_RSP_NO_LUN 0x02 +#define ISCSI_TMF_RSP_TASK_ALLEGIANT 0x03 +#define ISCSI_TMF_RSP_NO_FAILOVER 0x04 +#define ISCSI_TMF_RSP_NOT_SUPPORTED 0x05 +#define ISCSI_TMF_RSP_AUTH_FAILED 0x06 +#define ISCSI_TMF_RSP_REJECTED 0xff + +/* Ready To Transfer Header */ +struct iscsi_r2t_rsp { + uint8_t opcode; + uint8_t flags; + uint8_t rsvd2[2]; + uint8_t hlength; + uint8_t dlength[3]; + uint8_t lun[8]; + __be32 itt; /* Initiator Task Tag */ + __be32 ttt; /* Target Transfer Tag */ + __be32 statsn; + __be32 exp_cmdsn; + __be32 max_cmdsn; + __be32 r2tsn; + __be32 data_offset; + __be32 data_length; +}; + +/* SCSI Data Hdr */ +struct iscsi_data { + uint8_t opcode; + uint8_t flags; + uint8_t rsvd2[2]; + uint8_t rsvd3; + uint8_t dlength[3]; + uint8_t lun[8]; + __be32 itt; + __be32 ttt; + __be32 rsvd4; + __be32 exp_statsn; + __be32 rsvd5; + __be32 datasn; + __be32 offset; + __be32 rsvd6; + /* Payload */ +}; + +/* SCSI Data Response Hdr */ +struct iscsi_data_rsp { + uint8_t opcode; + uint8_t flags; + uint8_t rsvd2; + uint8_t cmd_status; + uint8_t hlength; + uint8_t dlength[3]; + uint8_t lun[8]; + __be32 itt; + __be32 ttt; + __be32 statsn; + __be32 exp_cmdsn; + __be32 max_cmdsn; + __be32 datasn; + __be32 offset; + __be32 residual_count; +}; + +/* Data Response PDU flags */ +#define ISCSI_FLAG_DATA_ACK 0x40 +#define ISCSI_FLAG_DATA_OVERFLOW 0x04 +#define ISCSI_FLAG_DATA_UNDERFLOW 0x02 +#define ISCSI_FLAG_DATA_STATUS 0x01 + +/* Text Header */ +struct iscsi_text { + uint8_t opcode; + uint8_t flags; + uint8_t rsvd2[2]; + uint8_t hlength; + uint8_t dlength[3]; + uint8_t rsvd4[8]; + __be32 itt; + __be32 ttt; + __be32 cmdsn; + __be32 exp_statsn; + uint8_t rsvd5[16]; + /* Text - key=value pairs */ +}; + +#define ISCSI_FLAG_TEXT_CONTINUE 0x40 + +/* Text Response Header */ +struct iscsi_text_rsp { + uint8_t opcode; + uint8_t flags; + uint8_t rsvd2[2]; + uint8_t hlength; + uint8_t dlength[3]; + uint8_t rsvd4[8]; + __be32 itt; + __be32 ttt; + __be32 statsn; + __be32 exp_cmdsn; + __be32 max_cmdsn; + uint8_t rsvd5[12]; + /* Text Response - key:value pairs */ +}; + +/* Login Header */ +struct iscsi_login { + uint8_t opcode; + uint8_t flags; + uint8_t max_version; /* Max. version supported */ + uint8_t min_version; /* Min. version supported */ + uint8_t hlength; + uint8_t dlength[3]; + uint8_t isid[6]; /* Initiator Session ID */ + __be16 tsih; /* Target Session Handle */ + __be32 itt; /* Initiator Task Tag */ + __be16 cid; + __be16 rsvd3; + __be32 cmdsn; + __be32 exp_statsn; + uint8_t rsvd5[16]; +}; + +/* Login PDU flags */ +#define ISCSI_FLAG_LOGIN_TRANSIT 0x80 +#define ISCSI_FLAG_LOGIN_CONTINUE 0x40 +#define ISCSI_FLAG_LOGIN_CURRENT_STAGE_MASK 0x0C /* 2 bits */ +#define ISCSI_FLAG_LOGIN_NEXT_STAGE_MASK 0x03 /* 2 bits */ + +#define ISCSI_LOGIN_CURRENT_STAGE(flags) \ + ((flags & ISCSI_FLAG_LOGIN_CURRENT_STAGE_MASK) >> 2) +#define ISCSI_LOGIN_NEXT_STAGE(flags) \ + (flags & ISCSI_FLAG_LOGIN_NEXT_STAGE_MASK) + +/* Login Response Header */ +struct iscsi_login_rsp { + uint8_t opcode; + uint8_t flags; + uint8_t max_version; /* Max. version supported */ + uint8_t active_version; /* Active version */ + uint8_t hlength; + uint8_t dlength[3]; + uint8_t isid[6]; /* Initiator Session ID */ + __be16 tsih; /* Target Session Handle */ + __be32 itt; /* Initiator Task Tag */ + __be32 rsvd3; + __be32 statsn; + __be32 exp_cmdsn; + __be32 max_cmdsn; + uint8_t status_class; /* see Login RSP ststus classes below */ + uint8_t status_detail; /* see Login RSP Status details below */ + uint8_t rsvd4[10]; +}; + +/* Login stage (phase) codes for CSG, NSG */ +#define ISCSI_INITIAL_LOGIN_STAGE -1 +#define ISCSI_SECURITY_NEGOTIATION_STAGE 0 +#define ISCSI_OP_PARMS_NEGOTIATION_STAGE 1 +#define ISCSI_FULL_FEATURE_PHASE 3 + +/* Login Status response classes */ +#define ISCSI_STATUS_CLS_SUCCESS 0x00 +#define ISCSI_STATUS_CLS_REDIRECT 0x01 +#define ISCSI_STATUS_CLS_INITIATOR_ERR 0x02 +#define ISCSI_STATUS_CLS_TARGET_ERR 0x03 + +/* Login Status response detail codes */ +/* Class-0 (Success) */ +#define ISCSI_LOGIN_STATUS_ACCEPT 0x00 + +/* Class-1 (Redirection) */ +#define ISCSI_LOGIN_STATUS_TGT_MOVED_TEMP 0x01 +#define ISCSI_LOGIN_STATUS_TGT_MOVED_PERM 0x02 + +/* Class-2 (Initiator Error) */ +#define ISCSI_LOGIN_STATUS_INIT_ERR 0x00 +#define ISCSI_LOGIN_STATUS_AUTH_FAILED 0x01 +#define ISCSI_LOGIN_STATUS_TGT_FORBIDDEN 0x02 +#define ISCSI_LOGIN_STATUS_TGT_NOT_FOUND 0x03 +#define ISCSI_LOGIN_STATUS_TGT_REMOVED 0x04 +#define ISCSI_LOGIN_STATUS_NO_VERSION 0x05 +#define ISCSI_LOGIN_STATUS_ISID_ERROR 0x06 +#define ISCSI_LOGIN_STATUS_MISSING_FIELDS 0x07 +#define ISCSI_LOGIN_STATUS_CONN_ADD_FAILED 0x08 +#define ISCSI_LOGIN_STATUS_NO_SESSION_TYPE 0x09 +#define ISCSI_LOGIN_STATUS_NO_SESSION 0x0a +#define ISCSI_LOGIN_STATUS_INVALID_REQUEST 0x0b + +/* Class-3 (Target Error) */ +#define ISCSI_LOGIN_STATUS_TARGET_ERROR 0x00 +#define ISCSI_LOGIN_STATUS_SVC_UNAVAILABLE 0x01 +#define ISCSI_LOGIN_STATUS_NO_RESOURCES 0x02 + +/* Logout Header */ +struct iscsi_logout { + uint8_t opcode; + uint8_t flags; + uint8_t rsvd1[2]; + uint8_t hlength; + uint8_t dlength[3]; + uint8_t rsvd2[8]; + __be32 itt; /* Initiator Task Tag */ + __be16 cid; + uint8_t rsvd3[2]; + __be32 cmdsn; + __be32 exp_statsn; + uint8_t rsvd4[16]; +}; + +/* Logout PDU flags */ +#define ISCSI_FLAG_LOGOUT_REASON_MASK 0x7F + +/* logout reason_code values */ + +#define ISCSI_LOGOUT_REASON_CLOSE_SESSION 0 +#define ISCSI_LOGOUT_REASON_CLOSE_CONNECTION 1 +#define ISCSI_LOGOUT_REASON_RECOVERY 2 +#define ISCSI_LOGOUT_REASON_AEN_REQUEST 3 + +/* Logout Response Header */ +struct iscsi_logout_rsp { + uint8_t opcode; + uint8_t flags; + uint8_t response; /* see Logout response values below */ + uint8_t rsvd2; + uint8_t hlength; + uint8_t dlength[3]; + uint8_t rsvd3[8]; + __be32 itt; /* Initiator Task Tag */ + __be32 rsvd4; + __be32 statsn; + __be32 exp_cmdsn; + __be32 max_cmdsn; + __be32 rsvd5; + __be16 t2wait; + __be16 t2retain; + __be32 rsvd6; +}; + +/* logout response status values */ + +#define ISCSI_LOGOUT_SUCCESS 0 +#define ISCSI_LOGOUT_CID_NOT_FOUND 1 +#define ISCSI_LOGOUT_RECOVERY_UNSUPPORTED 2 +#define ISCSI_LOGOUT_CLEANUP_FAILED 3 + +/* SNACK Header */ +struct iscsi_snack { + uint8_t opcode; + uint8_t flags; + uint8_t rsvd2[14]; + __be32 itt; + __be32 begrun; + __be32 runlength; + __be32 exp_statsn; + __be32 rsvd3; + __be32 exp_datasn; + uint8_t rsvd6[8]; +}; + +/* SNACK PDU flags */ +#define ISCSI_FLAG_SNACK_TYPE_MASK 0x0F /* 4 bits */ + +/* Reject Message Header */ +struct iscsi_reject { + uint8_t opcode; + uint8_t flags; + uint8_t reason; + uint8_t rsvd2; + uint8_t hlength; + uint8_t dlength[3]; + uint8_t rsvd3[8]; + __be32 ffffffff; + uint8_t rsvd4[4]; + __be32 statsn; + __be32 exp_cmdsn; + __be32 max_cmdsn; + __be32 datasn; + uint8_t rsvd5[8]; + /* Text - Rejected hdr */ +}; + +/* Reason for Reject */ +#define ISCSI_REASON_CMD_BEFORE_LOGIN 1 +#define ISCSI_REASON_DATA_DIGEST_ERROR 2 +#define ISCSI_REASON_DATA_SNACK_REJECT 3 +#define ISCSI_REASON_PROTOCOL_ERROR 4 +#define ISCSI_REASON_CMD_NOT_SUPPORTED 5 +#define ISCSI_REASON_IMM_CMD_REJECT 6 +#define ISCSI_REASON_TASK_IN_PROGRESS 7 +#define ISCSI_REASON_INVALID_SNACK 8 +#define ISCSI_REASON_BOOKMARK_INVALID 9 +#define ISCSI_REASON_BOOKMARK_NO_RESOURCES 10 +#define ISCSI_REASON_NEGOTIATION_RESET 11 + +/* Max. number of Key=Value pairs in a text message */ +#define MAX_KEY_VALUE_PAIRS 8192 + +/* maximum length for text keys/values */ +#define KEY_MAXLEN 64 +#define VALUE_MAXLEN 255 +#define TARGET_NAME_MAXLEN VALUE_MAXLEN + +#define DEFAULT_MAX_RECV_DATA_SEGMENT_LENGTH 8192 + +/************************* RFC 3720 End *****************************/ + +#endif /* ISCSI_PROTO_H */ diff --git a/include/scsi/scsi.h b/include/scsi/scsi.h index b361172b576c..6cb1e2788d8b 100644 --- a/include/scsi/scsi.h +++ b/include/scsi/scsi.h @@ -116,6 +116,9 @@ extern const char *const scsi_device_types[MAX_SCSI_DEVICE_CODE]; /* values for service action in */ #define SAI_READ_CAPACITY_16 0x10 +/* Values for T10/04-262r7 */ +#define ATA_16 0x85 /* 16-byte pass-thru */ +#define ATA_12 0xa1 /* 12-byte pass-thru */ /* * SCSI Architecture Model (SAM) Status codes. Taken from SAM-3 draft diff --git a/include/scsi/scsi_cmnd.h b/include/scsi/scsi_cmnd.h index bed4b7c9be99..7529f4388bb4 100644 --- a/include/scsi/scsi_cmnd.h +++ b/include/scsi/scsi_cmnd.h @@ -4,6 +4,7 @@ #include <linux/dma-mapping.h> #include <linux/list.h> #include <linux/types.h> +#include <linux/timer.h> struct request; struct scatterlist; @@ -146,7 +147,7 @@ struct scsi_cmnd { #define SCSI_STATE_MLQUEUE 0x100b -extern struct scsi_cmnd *scsi_get_command(struct scsi_device *, int); +extern struct scsi_cmnd *scsi_get_command(struct scsi_device *, gfp_t); extern void scsi_put_command(struct scsi_cmnd *); extern void scsi_io_completion(struct scsi_cmnd *, unsigned int, unsigned int); extern void scsi_finish_command(struct scsi_cmnd *cmd); diff --git a/include/scsi/scsi_device.h b/include/scsi/scsi_device.h index c0e4c67d836f..85cfd88461c8 100644 --- a/include/scsi/scsi_device.h +++ b/include/scsi/scsi_device.h @@ -148,6 +148,12 @@ struct scsi_device { #define transport_class_to_sdev(class_dev) \ to_scsi_device(class_dev->dev) +#define sdev_printk(prefix, sdev, fmt, a...) \ + dev_printk(prefix, &(sdev)->sdev_gendev, fmt, ##a) + +#define scmd_printk(prefix, scmd, fmt, a...) \ + dev_printk(prefix, &(scmd)->device->sdev_gendev, fmt, ##a) + /* * scsi_target: representation of a scsi target, for now, this is only * used for single_lun devices. If no one has active IO to the target, @@ -163,6 +169,7 @@ struct scsi_target { unsigned int id; /* target id ... replace * scsi_device.id eventually */ unsigned long create:1; /* signal that it needs to be added */ + char scsi_level; void *hostdata; /* available to low-level driver */ unsigned long starget_data[0]; /* for the transport */ /* starget_data must be the last element!!!! */ @@ -176,6 +183,9 @@ static inline struct scsi_target *scsi_target(struct scsi_device *sdev) #define transport_class_to_starget(class_dev) \ to_scsi_target(class_dev->dev) +#define starget_printk(prefix, starget, fmt, a...) \ + dev_printk(prefix, &(starget)->dev, fmt, ##a) + extern struct scsi_device *__scsi_add_device(struct Scsi_Host *, uint, uint, uint, void *hostdata); extern int scsi_add_device(struct Scsi_Host *host, uint channel, @@ -265,6 +275,19 @@ extern int scsi_execute_req(struct scsi_device *sdev, const unsigned char *cmd, int data_direction, void *buffer, unsigned bufflen, struct scsi_sense_hdr *, int timeout, int retries); +static inline unsigned int sdev_channel(struct scsi_device *sdev) +{ + return sdev->channel; +} + +static inline unsigned int sdev_id(struct scsi_device *sdev) +{ + return sdev->id; +} + +#define scmd_id(scmd) sdev_id((scmd)->device) +#define scmd_channel(scmd) sdev_channel((scmd)->device) + static inline int scsi_device_online(struct scsi_device *sdev) { return sdev->sdev_state != SDEV_OFFLINE; diff --git a/include/scsi/scsi_host.h b/include/scsi/scsi_host.h index 69313ba7505b..6cbb1982ed03 100644 --- a/include/scsi/scsi_host.h +++ b/include/scsi/scsi_host.h @@ -7,6 +7,7 @@ #include <linux/workqueue.h> struct block_device; +struct completion; struct module; struct scsi_cmnd; struct scsi_device; @@ -467,10 +468,8 @@ struct Scsi_Host { struct list_head eh_cmd_q; struct task_struct * ehandler; /* Error recovery thread. */ - struct semaphore * eh_action; /* Wait for specific actions on the - host. */ - unsigned int eh_active:1; /* Indicates the eh thread is awake and active if - this is true. */ + struct completion * eh_action; /* Wait for specific actions on the + host. */ wait_queue_head_t host_wait; struct scsi_host_template *hostt; struct scsi_transport_template *transportt; @@ -609,6 +608,10 @@ struct Scsi_Host { #define class_to_shost(d) \ container_of(d, struct Scsi_Host, shost_classdev) +#define shost_printk(prefix, shost, fmt, a...) \ + dev_printk(prefix, &(shost)->shost_gendev, fmt, ##a) + + int scsi_is_host_device(const struct device *); static inline struct Scsi_Host *dev_to_shost(struct device *dev) @@ -634,8 +637,6 @@ extern void scsi_flush_work(struct Scsi_Host *); extern struct Scsi_Host *scsi_host_alloc(struct scsi_host_template *, int); extern int __must_check scsi_add_host(struct Scsi_Host *, struct device *); extern void scsi_scan_host(struct Scsi_Host *); -extern void scsi_scan_single_target(struct Scsi_Host *, unsigned int, - unsigned int); extern void scsi_rescan_device(struct device *); extern void scsi_remove_host(struct Scsi_Host *); extern struct Scsi_Host *scsi_host_get(struct Scsi_Host *); diff --git a/include/scsi/scsi_request.h b/include/scsi/scsi_request.h index 6a140020d7cb..98d69fdb851c 100644 --- a/include/scsi/scsi_request.h +++ b/include/scsi/scsi_request.h @@ -45,11 +45,8 @@ struct scsi_request { level driver) of this request */ }; -extern struct scsi_request *scsi_allocate_request(struct scsi_device *, int); +extern struct scsi_request *scsi_allocate_request(struct scsi_device *, gfp_t); extern void scsi_release_request(struct scsi_request *); -extern void scsi_wait_req(struct scsi_request *, const void *cmnd, - void *buffer, unsigned bufflen, - int timeout, int retries); extern void scsi_do_req(struct scsi_request *, const void *cmnd, void *buffer, unsigned bufflen, void (*done) (struct scsi_cmnd *), diff --git a/include/scsi/scsi_transport_fc.h b/include/scsi/scsi_transport_fc.h index b0d445437372..fac547d32a98 100644 --- a/include/scsi/scsi_transport_fc.h +++ b/include/scsi/scsi_transport_fc.h @@ -28,6 +28,8 @@ #define SCSI_TRANSPORT_FC_H #include <linux/config.h> +#include <linux/sched.h> +#include <scsi/scsi.h> struct scsi_transport_template; @@ -384,6 +386,8 @@ struct fc_function_template { struct fc_host_statistics * (*get_fc_host_stats)(struct Scsi_Host *); void (*reset_fc_host_stats)(struct Scsi_Host *); + int (*issue_fc_host_lip)(struct Scsi_Host *); + /* allocation lengths for host-specific data */ u32 dd_fcrport_size; @@ -427,6 +431,34 @@ struct fc_function_template { }; +/** + * fc_remote_port_chkready - called to validate the remote port state + * prior to initiating io to the port. + * + * Returns a scsi result code that can be returned by the LLDD. + * + * @rport: remote port to be checked + **/ +static inline int +fc_remote_port_chkready(struct fc_rport *rport) +{ + int result; + + switch (rport->port_state) { + case FC_PORTSTATE_ONLINE: + result = 0; + break; + case FC_PORTSTATE_BLOCKED: + result = DID_BUS_BUSY << 16; + break; + default: + result = DID_NO_CONNECT << 16; + break; + } + return result; +} + + struct scsi_transport_template *fc_attach_transport( struct fc_function_template *); void fc_release_transport(struct scsi_transport_template *); @@ -435,8 +467,6 @@ struct fc_rport *fc_remote_port_add(struct Scsi_Host *shost, int channel, struct fc_rport_identifiers *ids); void fc_remote_port_delete(struct fc_rport *rport); void fc_remote_port_rolechg(struct fc_rport *rport, u32 roles); -int fc_remote_port_block(struct fc_rport *rport); -void fc_remote_port_unblock(struct fc_rport *rport); int scsi_is_fc_rport(const struct device *); static inline u64 wwn_to_u64(u8 *wwn) diff --git a/include/scsi/scsi_transport_iscsi.h b/include/scsi/scsi_transport_iscsi.h index 1b26a6c0aa2a..f25041c386ec 100644 --- a/include/scsi/scsi_transport_iscsi.h +++ b/include/scsi/scsi_transport_iscsi.h @@ -1,8 +1,10 @@ -/* +/* * iSCSI transport class definitions * * Copyright (C) IBM Corporation, 2004 - * Copyright (C) Mike Christie, 2004 + * Copyright (C) Mike Christie, 2004 - 2005 + * Copyright (C) Dmitry Yusupov, 2004 - 2005 + * Copyright (C) Alex Aizman, 2004 - 2005 * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -21,158 +23,64 @@ #ifndef SCSI_TRANSPORT_ISCSI_H #define SCSI_TRANSPORT_ISCSI_H -#include <linux/config.h> -#include <linux/in6.h> -#include <linux/in.h> - -struct scsi_transport_template; +#include <scsi/iscsi_if.h> -struct iscsi_class_session { - uint8_t isid[6]; - uint16_t tsih; - int header_digest; /* 1 CRC32, 0 None */ - int data_digest; /* 1 CRC32, 0 None */ - uint16_t tpgt; - union { - struct in6_addr sin6_addr; - struct in_addr sin_addr; - } u; - sa_family_t addr_type; /* must be AF_INET or AF_INET6 */ - uint16_t port; /* must be in network byte order */ - int initial_r2t; /* 1 Yes, 0 No */ - int immediate_data; /* 1 Yes, 0 No */ - uint32_t max_recv_data_segment_len; - uint32_t max_burst_len; - uint32_t first_burst_len; - uint16_t def_time2wait; - uint16_t def_time2retain; - uint16_t max_outstanding_r2t; - int data_pdu_in_order; /* 1 Yes, 0 No */ - int data_sequence_in_order; /* 1 Yes, 0 No */ - int erl; +/** + * struct iscsi_transport - iSCSI Transport template + * + * @name: transport name + * @caps: iSCSI Data-Path capabilities + * @create_session: create new iSCSI session object + * @destroy_session: destroy existing iSCSI session object + * @create_conn: create new iSCSI connection + * @bind_conn: associate this connection with existing iSCSI session + * and specified transport descriptor + * @destroy_conn: destroy inactive iSCSI connection + * @set_param: set iSCSI Data-Path operational parameter + * @start_conn: set connection to be operational + * @stop_conn: suspend/recover/terminate connection + * @send_pdu: send iSCSI PDU, Login, Logout, NOP-Out, Reject, Text. + * + * Template API provided by iSCSI Transport + */ +struct iscsi_transport { + struct module *owner; + char *name; + unsigned int caps; + struct scsi_host_template *host_template; + int hostdata_size; + int max_lun; + unsigned int max_conn; + unsigned int max_cmd_len; + iscsi_sessionh_t (*create_session) (uint32_t initial_cmdsn, + struct Scsi_Host *shost); + void (*destroy_session) (iscsi_sessionh_t session); + iscsi_connh_t (*create_conn) (iscsi_sessionh_t session, uint32_t cid); + int (*bind_conn) (iscsi_sessionh_t session, iscsi_connh_t conn, + uint32_t transport_fd, int is_leading); + int (*start_conn) (iscsi_connh_t conn); + void (*stop_conn) (iscsi_connh_t conn, int flag); + void (*destroy_conn) (iscsi_connh_t conn); + int (*set_param) (iscsi_connh_t conn, enum iscsi_param param, + uint32_t value); + int (*get_param) (iscsi_connh_t conn, enum iscsi_param param, + uint32_t *value); + int (*send_pdu) (iscsi_connh_t conn, struct iscsi_hdr *hdr, + char *data, uint32_t data_size); + void (*get_stats) (iscsi_connh_t conn, struct iscsi_stats *stats); }; /* - * accessor macros + * transport registration upcalls */ -#define iscsi_isid(x) \ - (((struct iscsi_class_session *)&(x)->starget_data)->isid) -#define iscsi_tsih(x) \ - (((struct iscsi_class_session *)&(x)->starget_data)->tsih) -#define iscsi_header_digest(x) \ - (((struct iscsi_class_session *)&(x)->starget_data)->header_digest) -#define iscsi_data_digest(x) \ - (((struct iscsi_class_session *)&(x)->starget_data)->data_digest) -#define iscsi_port(x) \ - (((struct iscsi_class_session *)&(x)->starget_data)->port) -#define iscsi_addr_type(x) \ - (((struct iscsi_class_session *)&(x)->starget_data)->addr_type) -#define iscsi_sin_addr(x) \ - (((struct iscsi_class_session *)&(x)->starget_data)->u.sin_addr) -#define iscsi_sin6_addr(x) \ - (((struct iscsi_class_session *)&(x)->starget_data)->u.sin6_addr) -#define iscsi_tpgt(x) \ - (((struct iscsi_class_session *)&(x)->starget_data)->tpgt) -#define iscsi_initial_r2t(x) \ - (((struct iscsi_class_session *)&(x)->starget_data)->initial_r2t) -#define iscsi_immediate_data(x) \ - (((struct iscsi_class_session *)&(x)->starget_data)->immediate_data) -#define iscsi_max_recv_data_segment_len(x) \ - (((struct iscsi_class_session *)&(x)->starget_data)->max_recv_data_segment_len) -#define iscsi_max_burst_len(x) \ - (((struct iscsi_class_session *)&(x)->starget_data)->max_burst_len) -#define iscsi_first_burst_len(x) \ - (((struct iscsi_class_session *)&(x)->starget_data)->first_burst_len) -#define iscsi_def_time2wait(x) \ - (((struct iscsi_class_session *)&(x)->starget_data)->def_time2wait) -#define iscsi_def_time2retain(x) \ - (((struct iscsi_class_session *)&(x)->starget_data)->def_time2retain) -#define iscsi_max_outstanding_r2t(x) \ - (((struct iscsi_class_session *)&(x)->starget_data)->max_outstanding_r2t) -#define iscsi_data_pdu_in_order(x) \ - (((struct iscsi_class_session *)&(x)->starget_data)->data_pdu_in_order) -#define iscsi_data_sequence_in_order(x) \ - (((struct iscsi_class_session *)&(x)->starget_data)->data_sequence_in_order) -#define iscsi_erl(x) \ - (((struct iscsi_class_session *)&(x)->starget_data)->erl) +extern int iscsi_register_transport(struct iscsi_transport *tt); +extern int iscsi_unregister_transport(struct iscsi_transport *tt); /* - * The functions by which the transport class and the driver communicate + * control plane upcalls */ -struct iscsi_function_template { - /* - * target attrs - */ - void (*get_isid)(struct scsi_target *); - void (*get_tsih)(struct scsi_target *); - void (*get_header_digest)(struct scsi_target *); - void (*get_data_digest)(struct scsi_target *); - void (*get_port)(struct scsi_target *); - void (*get_tpgt)(struct scsi_target *); - /* - * In get_ip_address the lld must set the address and - * the address type - */ - void (*get_ip_address)(struct scsi_target *); - /* - * The lld should snprintf the name or alias to the buffer - */ - ssize_t (*get_target_name)(struct scsi_target *, char *, ssize_t); - ssize_t (*get_target_alias)(struct scsi_target *, char *, ssize_t); - void (*get_initial_r2t)(struct scsi_target *); - void (*get_immediate_data)(struct scsi_target *); - void (*get_max_recv_data_segment_len)(struct scsi_target *); - void (*get_max_burst_len)(struct scsi_target *); - void (*get_first_burst_len)(struct scsi_target *); - void (*get_def_time2wait)(struct scsi_target *); - void (*get_def_time2retain)(struct scsi_target *); - void (*get_max_outstanding_r2t)(struct scsi_target *); - void (*get_data_pdu_in_order)(struct scsi_target *); - void (*get_data_sequence_in_order)(struct scsi_target *); - void (*get_erl)(struct scsi_target *); - - /* - * host atts - */ - - /* - * The lld should snprintf the name or alias to the buffer - */ - ssize_t (*get_initiator_alias)(struct Scsi_Host *, char *, ssize_t); - ssize_t (*get_initiator_name)(struct Scsi_Host *, char *, ssize_t); - /* - * The driver sets these to tell the transport class it - * wants the attributes displayed in sysfs. If the show_ flag - * is not set, the attribute will be private to the transport - * class. We could probably just test if a get_ fn was set - * since we only use the values for sysfs but this is how - * fc does it too. - */ - unsigned long show_isid:1; - unsigned long show_tsih:1; - unsigned long show_header_digest:1; - unsigned long show_data_digest:1; - unsigned long show_port:1; - unsigned long show_tpgt:1; - unsigned long show_ip_address:1; - unsigned long show_target_name:1; - unsigned long show_target_alias:1; - unsigned long show_initial_r2t:1; - unsigned long show_immediate_data:1; - unsigned long show_max_recv_data_segment_len:1; - unsigned long show_max_burst_len:1; - unsigned long show_first_burst_len:1; - unsigned long show_def_time2wait:1; - unsigned long show_def_time2retain:1; - unsigned long show_max_outstanding_r2t:1; - unsigned long show_data_pdu_in_order:1; - unsigned long show_data_sequence_in_order:1; - unsigned long show_erl:1; - unsigned long show_initiator_name:1; - unsigned long show_initiator_alias:1; -}; - -struct scsi_transport_template *iscsi_attach_transport(struct iscsi_function_template *); -void iscsi_release_transport(struct scsi_transport_template *); +extern void iscsi_conn_error(iscsi_connh_t conn, enum iscsi_err error); +extern int iscsi_recv_pdu(iscsi_connh_t conn, struct iscsi_hdr *hdr, + char *data, uint32_t data_size); #endif diff --git a/include/scsi/scsi_transport_sas.h b/include/scsi/scsi_transport_sas.h index bc4aeb660dd3..b91400bfb02a 100644 --- a/include/scsi/scsi_transport_sas.h +++ b/include/scsi/scsi_transport_sas.h @@ -41,20 +41,31 @@ struct sas_identify { u8 phy_identifier; }; -/* The functions by which the transport class and the driver communicate */ -struct sas_function_template { -}; - struct sas_phy { struct device dev; int number; + + /* phy identification */ struct sas_identify identify; + + /* phy attributes */ enum sas_linkrate negotiated_linkrate; enum sas_linkrate minimum_linkrate_hw; enum sas_linkrate minimum_linkrate; enum sas_linkrate maximum_linkrate_hw; enum sas_linkrate maximum_linkrate; u8 port_identifier; + + /* internal state */ + unsigned int local_attached : 1; + + /* link error statistics */ + u32 invalid_dword_count; + u32 running_disparity_error_count; + u32 loss_of_dword_sync_count; + u32 phy_reset_problem_count; + + /* the other end of the link */ struct sas_rphy *rphy; }; @@ -79,6 +90,14 @@ struct sas_rphy { #define rphy_to_shost(rphy) \ dev_to_shost((rphy)->dev.parent) + +/* The functions by which the transport class and the driver communicate */ +struct sas_function_template { + int (*get_linkerrors)(struct sas_phy *); + int (*phy_reset)(struct sas_phy *, int); +}; + + extern void sas_remove_host(struct Scsi_Host *); extern struct sas_phy *sas_phy_alloc(struct device *, int); diff --git a/include/scsi/srp.h b/include/scsi/srp.h new file mode 100644 index 000000000000..6c2681dc5b46 --- /dev/null +++ b/include/scsi/srp.h @@ -0,0 +1,226 @@ +/* + * Copyright (c) 2005 Cisco Systems. All rights reserved. + * + * This software is available to you under a choice of one of two + * licenses. You may choose to be licensed under the terms of the GNU + * General Public License (GPL) Version 2, available from the file + * COPYING in the main directory of this source tree, or the + * OpenIB.org BSD license below: + * + * Redistribution and use in source and binary forms, with or + * without modification, are permitted provided that the following + * conditions are met: + * + * - Redistributions of source code must retain the above + * copyright notice, this list of conditions and the following + * disclaimer. + * + * - Redistributions in binary form must reproduce the above + * copyright notice, this list of conditions and the following + * disclaimer in the documentation and/or other materials + * provided with the distribution. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS + * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN + * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * + * $Id$ + */ + +#ifndef SCSI_SRP_H +#define SCSI_SRP_H + +/* + * Structures and constants for the SCSI RDMA Protocol (SRP) as + * defined by the INCITS T10 committee. This file was written using + * draft Revision 16a of the SRP standard. + */ + +#include <linux/types.h> + +enum { + SRP_LOGIN_REQ = 0x00, + SRP_TSK_MGMT = 0x01, + SRP_CMD = 0x02, + SRP_I_LOGOUT = 0x03, + SRP_LOGIN_RSP = 0xc0, + SRP_RSP = 0xc1, + SRP_LOGIN_REJ = 0xc2, + SRP_T_LOGOUT = 0x80, + SRP_CRED_REQ = 0x81, + SRP_AER_REQ = 0x82, + SRP_CRED_RSP = 0x41, + SRP_AER_RSP = 0x42 +}; + +enum { + SRP_BUF_FORMAT_DIRECT = 1 << 1, + SRP_BUF_FORMAT_INDIRECT = 1 << 2 +}; + +enum { + SRP_NO_DATA_DESC = 0, + SRP_DATA_DESC_DIRECT = 1, + SRP_DATA_DESC_INDIRECT = 2 +}; + +enum { + SRP_TSK_ABORT_TASK = 0x01, + SRP_TSK_ABORT_TASK_SET = 0x02, + SRP_TSK_CLEAR_TASK_SET = 0x04, + SRP_TSK_LUN_RESET = 0x08, + SRP_TSK_CLEAR_ACA = 0x40 +}; + +enum srp_login_rej_reason { + SRP_LOGIN_REJ_UNABLE_ESTABLISH_CHANNEL = 0x00010000, + SRP_LOGIN_REJ_INSUFFICIENT_RESOURCES = 0x00010001, + SRP_LOGIN_REJ_REQ_IT_IU_LENGTH_TOO_LARGE = 0x00010002, + SRP_LOGIN_REJ_UNABLE_ASSOCIATE_CHANNEL = 0x00010003, + SRP_LOGIN_REJ_UNSUPPORTED_DESCRIPTOR_FMT = 0x00010004, + SRP_LOGIN_REJ_MULTI_CHANNEL_UNSUPPORTED = 0x00010005, + SRP_LOGIN_REJ_CHANNEL_LIMIT_REACHED = 0x00010006 +}; + +struct srp_direct_buf { + __be64 va; + __be32 key; + __be32 len; +}; + +/* + * We need the packed attribute because the SRP spec puts the list of + * descriptors at an offset of 20, which is not aligned to the size + * of struct srp_direct_buf. + */ +struct srp_indirect_buf { + struct srp_direct_buf table_desc; + __be32 len; + struct srp_direct_buf desc_list[0] __attribute__((packed)); +}; + +enum { + SRP_MULTICHAN_SINGLE = 0, + SRP_MULTICHAN_MULTI = 1 +}; + +struct srp_login_req { + u8 opcode; + u8 reserved1[7]; + u64 tag; + __be32 req_it_iu_len; + u8 reserved2[4]; + __be16 req_buf_fmt; + u8 req_flags; + u8 reserved3[5]; + u8 initiator_port_id[16]; + u8 target_port_id[16]; +}; + +struct srp_login_rsp { + u8 opcode; + u8 reserved1[3]; + __be32 req_lim_delta; + u64 tag; + __be32 max_it_iu_len; + __be32 max_ti_iu_len; + __be16 buf_fmt; + u8 rsp_flags; + u8 reserved2[25]; +}; + +struct srp_login_rej { + u8 opcode; + u8 reserved1[3]; + __be32 reason; + u64 tag; + u8 reserved2[8]; + __be16 buf_fmt; + u8 reserved3[6]; +}; + +struct srp_i_logout { + u8 opcode; + u8 reserved[7]; + u64 tag; +}; + +struct srp_t_logout { + u8 opcode; + u8 sol_not; + u8 reserved[2]; + __be32 reason; + u64 tag; +}; + +/* + * We need the packed attribute because the SRP spec only aligns the + * 8-byte LUN field to 4 bytes. + */ +struct srp_tsk_mgmt { + u8 opcode; + u8 sol_not; + u8 reserved1[6]; + u64 tag; + u8 reserved2[4]; + __be64 lun __attribute__((packed)); + u8 reserved3[2]; + u8 tsk_mgmt_func; + u8 reserved4; + u64 task_tag; + u8 reserved5[8]; +}; + +/* + * We need the packed attribute because the SRP spec only aligns the + * 8-byte LUN field to 4 bytes. + */ +struct srp_cmd { + u8 opcode; + u8 sol_not; + u8 reserved1[3]; + u8 buf_fmt; + u8 data_out_desc_cnt; + u8 data_in_desc_cnt; + u64 tag; + u8 reserved2[4]; + __be64 lun __attribute__((packed)); + u8 reserved3; + u8 task_attr; + u8 reserved4; + u8 add_cdb_len; + u8 cdb[16]; + u8 add_data[0]; +}; + +enum { + SRP_RSP_FLAG_RSPVALID = 1 << 0, + SRP_RSP_FLAG_SNSVALID = 1 << 1, + SRP_RSP_FLAG_DOOVER = 1 << 2, + SRP_RSP_FLAG_DOUNDER = 1 << 3, + SRP_RSP_FLAG_DIOVER = 1 << 4, + SRP_RSP_FLAG_DIUNDER = 1 << 5 +}; + +struct srp_rsp { + u8 opcode; + u8 sol_not; + u8 reserved1[2]; + __be32 req_lim_delta; + u64 tag; + u8 reserved2[2]; + u8 flags; + u8 status; + __be32 data_out_res_cnt; + __be32 data_in_res_cnt; + __be32 sense_data_len; + __be32 resp_data_len; + u8 data[0]; +}; + +#endif /* SCSI_SRP_H */ diff --git a/include/sound/ac97_codec.h b/include/sound/ac97_codec.h index 2857cf0472df..7f0ca79d6c98 100644 --- a/include/sound/ac97_codec.h +++ b/include/sound/ac97_codec.h @@ -387,15 +387,6 @@ #define AC97_RATES_MIC_ADC 4 #define AC97_RATES_SPDIF 5 -/* shared controllers */ -enum { - AC97_SHARED_TYPE_NONE, - AC97_SHARED_TYPE_ICH, - AC97_SHARED_TYPE_ATIIXP, - AC97_SHARED_TYPE_VIA, - AC97_SHARED_TYPES -}; - /* * */ @@ -468,7 +459,6 @@ struct _snd_ac97_bus { unsigned short used_slots[2][4]; /* actually used PCM slots */ unsigned short pcms_count; /* count of PCMs */ struct ac97_pcm *pcms; - unsigned int shared_type; /* type of shared controller betwen audio and modem */ ac97_t *codec[4]; snd_info_entry_t *proc; }; @@ -527,6 +517,8 @@ struct _snd_ac97 { struct device dev; }; +#define to_ac97_t(d) container_of(d, struct _snd_ac97, dev) + /* conditions */ static inline int ac97_is_audio(ac97_t * ac97) { diff --git a/include/sound/core.h b/include/sound/core.h index 26160adcdffc..2be65ad2fd83 100644 --- a/include/sound/core.h +++ b/include/sound/core.h @@ -29,7 +29,6 @@ #include <linux/pm.h> /* pm_message_t */ /* Typedef's */ -typedef struct timespec snd_timestamp_t; typedef struct sndrv_interval snd_interval_t; typedef enum sndrv_card_type snd_card_type; typedef struct sndrv_xferi snd_xferi_t; @@ -256,6 +255,7 @@ typedef struct _snd_minor snd_minor_t; /* sound.c */ +extern int snd_major; extern int snd_ecards_limit; void snd_request_card(int card); @@ -285,39 +285,6 @@ int snd_oss_init_module(void); /* memory.c */ -#ifdef CONFIG_SND_DEBUG_MEMORY -void snd_memory_init(void); -void snd_memory_done(void); -int snd_memory_info_init(void); -int snd_memory_info_done(void); -void *snd_hidden_kmalloc(size_t size, unsigned int __nocast flags); -void *snd_hidden_kzalloc(size_t size, unsigned int __nocast flags); -void *snd_hidden_kcalloc(size_t n, size_t size, unsigned int __nocast flags); -void snd_hidden_kfree(const void *obj); -void *snd_hidden_vmalloc(unsigned long size); -void snd_hidden_vfree(void *obj); -char *snd_hidden_kstrdup(const char *s, unsigned int __nocast flags); -#define kmalloc(size, flags) snd_hidden_kmalloc(size, flags) -#define kzalloc(size, flags) snd_hidden_kzalloc(size, flags) -#define kcalloc(n, size, flags) snd_hidden_kcalloc(n, size, flags) -#define kfree(obj) snd_hidden_kfree(obj) -#define vmalloc(size) snd_hidden_vmalloc(size) -#define vfree(obj) snd_hidden_vfree(obj) -#define kmalloc_nocheck(size, flags) snd_wrapper_kmalloc(size, flags) -#define vmalloc_nocheck(size) snd_wrapper_vmalloc(size) -#define kfree_nocheck(obj) snd_wrapper_kfree(obj) -#define vfree_nocheck(obj) snd_wrapper_vfree(obj) -#define kstrdup(s, flags) snd_hidden_kstrdup(s, flags) -#else -#define snd_memory_init() /*NOP*/ -#define snd_memory_done() /*NOP*/ -#define snd_memory_info_init() /*NOP*/ -#define snd_memory_info_done() /*NOP*/ -#define kmalloc_nocheck(size, flags) kmalloc(size, flags) -#define vmalloc_nocheck(size) vmalloc(size) -#define kfree_nocheck(obj) kfree(obj) -#define vfree_nocheck(obj) vfree(obj) -#endif int copy_to_user_fromio(void __user *dst, const volatile void __iomem *src, size_t count); int copy_from_user_toio(volatile void __iomem *dst, const void __user *src, size_t count); @@ -373,8 +340,9 @@ unsigned int snd_dma_pointer(unsigned long dma, unsigned int size); #endif /* misc.c */ +struct resource; +void release_and_free_resource(struct resource *res); -int snd_task_name(struct task_struct *task, char *name, size_t size); #ifdef CONFIG_SND_VERBOSE_PRINTK void snd_verbose_printk(const char *file, int line, const char *format, ...) __attribute__ ((format (printf, 3, 4))); @@ -429,34 +397,24 @@ void snd_verbose_printd(const char *file, int line, const char *format, ...) * When CONFIG_SND_DEBUG is not set, the expression is executed but * not checked. */ -#define snd_assert(expr, args...) do {\ - if (unlikely(!(expr))) { \ - snd_printk(KERN_ERR "BUG? (%s) (called from %p)\n", __ASTRING__(expr), __builtin_return_address(0));\ - args;\ - }\ +#define snd_assert(expr, args...) do { \ + if (unlikely(!(expr))) { \ + snd_printk(KERN_ERR "BUG? (%s)\n", __ASTRING__(expr)); \ + dump_stack(); \ + args; \ + } \ } while (0) -/** - * snd_runtime_check - run-time assertion macro - * @expr: expression - * @args...: the action - * - * This macro checks the expression in run-time and invokes the commands - * given in the rest arguments if the assertion is failed. - * Unlike snd_assert(), the action commands are executed even if - * CONFIG_SND_DEBUG is not set but without any error messages. - */ -#define snd_runtime_check(expr, args...) do {\ - if (unlikely(!(expr))) { \ - snd_printk(KERN_ERR "ERROR (%s) (called from %p)\n", __ASTRING__(expr), __builtin_return_address(0));\ - args;\ - }\ + +#define snd_BUG() do { \ + snd_printk(KERN_ERR "BUG?\n"); \ + dump_stack(); \ } while (0) #else /* !CONFIG_SND_DEBUG */ #define snd_printd(fmt, args...) /* nothing */ #define snd_assert(expr, args...) (void)(expr) -#define snd_runtime_check(expr, args...) do { if (!(expr)) { args; } } while (0) +#define snd_BUG() /* nothing */ #endif /* CONFIG_SND_DEBUG */ @@ -473,30 +431,6 @@ void snd_verbose_printd(const char *file, int line, const char *format, ...) #define snd_printdd(format, args...) /* nothing */ #endif -#define snd_BUG() snd_assert(0, ) - - -static inline void snd_timestamp_now(struct timespec *tstamp, int timespec) -{ - struct timeval val; - /* FIXME: use a linear time source */ - do_gettimeofday(&val); - tstamp->tv_sec = val.tv_sec; - tstamp->tv_nsec = val.tv_usec; - if (timespec) - tstamp->tv_nsec *= 1000L; -} - -static inline void snd_timestamp_zero(struct timespec *tstamp) -{ - tstamp->tv_sec = 0; - tstamp->tv_nsec = 0; -} - -static inline int snd_timestamp_null(struct timespec *tstamp) -{ - return tstamp->tv_sec == 0 && tstamp->tv_nsec == 0; -} #define SNDRV_OSS_VERSION ((3<<16)|(8<<8)|(1<<4)|(0)) /* 3.8.1a */ diff --git a/include/sound/driver.h b/include/sound/driver.h index 0d12456ec3ae..3f0416ac24d9 100644 --- a/include/sound/driver.h +++ b/include/sound/driver.h @@ -44,21 +44,4 @@ #include <linux/module.h> -/* - * ========================================================================== - */ - -#ifdef CONFIG_SND_DEBUG_MEMORY -#include <linux/slab.h> -#include <linux/vmalloc.h> -void *snd_wrapper_kmalloc(size_t, unsigned int __nocast); -#undef kmalloc -void snd_wrapper_kfree(const void *); -#undef kfree -void *snd_wrapper_vmalloc(size_t); -#undef vmalloc -void snd_wrapper_vfree(void *); -#undef vfree -#endif - #endif /* __SOUND_DRIVER_H */ diff --git a/include/sound/emu10k1.h b/include/sound/emu10k1.h index 67bf3f18e96a..8411c7ef6f11 100644 --- a/include/sound/emu10k1.h +++ b/include/sound/emu10k1.h @@ -48,7 +48,8 @@ /* FIXME? - according to the OSS driver the EMU10K1 needs a 29 bit DMA mask */ #define EMU10K1_DMA_MASK 0x7fffffffUL /* 31bit */ -#define AUDIGY_DMA_MASK 0xffffffffUL /* 32bit */ +#define AUDIGY_DMA_MASK 0x7fffffffUL /* 31bit FIXME - 32 should work? */ + /* See ALSA bug #1276 - rlrevell */ #define TMEMSIZE 256*1024 #define TMEMSIZEREG 4 @@ -1055,11 +1056,12 @@ typedef struct { unsigned char emu10k2_chip; /* Audigy 1 or Audigy 2. */ unsigned char ca0102_chip; /* Audigy 1 or Audigy 2. Not SB Audigy 2 Value. */ unsigned char ca0108_chip; /* Audigy 2 Value */ + unsigned char ca_cardbus_chip; /* Audigy 2 ZS Notebook */ unsigned char ca0151_chip; /* P16V */ unsigned char spk71; /* Has 7.1 speakers */ unsigned char sblive51; /* SBLive! 5.1 - extout 0x11 -> center, 0x12 -> lfe */ unsigned char spdif_bug; /* Has Spdif phasing bug */ - unsigned char ac97_chip; /* Has an AC97 chip */ + unsigned char ac97_chip; /* Has an AC97 chip: 1 = mandatory, 2 = optional */ unsigned char ecard; /* APS EEPROM */ const char *driver; const char *name; diff --git a/include/sound/memalloc.h b/include/sound/memalloc.h index 3a2fd2cc9f19..83489c3abbaf 100644 --- a/include/sound/memalloc.h +++ b/include/sound/memalloc.h @@ -111,7 +111,7 @@ size_t snd_dma_get_reserved_buf(struct snd_dma_buffer *dmab, unsigned int id); int snd_dma_reserve_buf(struct snd_dma_buffer *dmab, unsigned int id); /* basic memory allocation functions */ -void *snd_malloc_pages(size_t size, unsigned int gfp_flags); +void *snd_malloc_pages(size_t size, gfp_t gfp_flags); void snd_free_pages(void *ptr, size_t size); #endif /* __SOUND_MEMALLOC_H */ diff --git a/include/sound/minors.h b/include/sound/minors.h index b7b0d8309449..a17b5c9961bb 100644 --- a/include/sound/minors.h +++ b/include/sound/minors.h @@ -27,8 +27,9 @@ #define SNDRV_MINOR(card, dev) (((card) << 5) | (dev)) #define SNDRV_MINOR_CONTROL 0 /* 0 - 0 */ -#define SNDRV_MINOR_SEQUENCER 1 -#define SNDRV_MINOR_TIMER (1+32) +#define SNDRV_MINOR_GLOBAL 1 /* 1 */ +#define SNDRV_MINOR_SEQUENCER (SNDRV_MINOR_GLOBAL + 0 * 32) +#define SNDRV_MINOR_TIMER (SNDRV_MINOR_GLOBAL + 1 * 32) #define SNDRV_MINOR_HWDEP 4 /* 4 - 7 */ #define SNDRV_MINOR_HWDEPS 4 #define SNDRV_MINOR_RAWMIDI 8 /* 8 - 15 */ @@ -39,12 +40,9 @@ #define SNDRV_DEVICE_TYPE_CONTROL SNDRV_MINOR_CONTROL #define SNDRV_DEVICE_TYPE_HWDEP SNDRV_MINOR_HWDEP -#define SNDRV_DEVICE_TYPE_MIXER SNDRV_MINOR_MIXER #define SNDRV_DEVICE_TYPE_RAWMIDI SNDRV_MINOR_RAWMIDI #define SNDRV_DEVICE_TYPE_PCM_PLAYBACK SNDRV_MINOR_PCM_PLAYBACK -#define SNDRV_DEVICE_TYPE_PCM_PLOOP SNDRV_MINOR_PCM_PLOOP #define SNDRV_DEVICE_TYPE_PCM_CAPTURE SNDRV_MINOR_PCM_CAPTURE -#define SNDRV_DEVICE_TYPE_PCM_CLOOP SNDRV_MINOR_PCM_CLOOP #define SNDRV_DEVICE_TYPE_SEQUENCER SNDRV_MINOR_SEQUENCER #define SNDRV_DEVICE_TYPE_TIMER SNDRV_MINOR_TIMER diff --git a/include/sound/pcm.h b/include/sound/pcm.h index 2b23a5967071..acc4fa9d5abe 100644 --- a/include/sound/pcm.h +++ b/include/sound/pcm.h @@ -281,7 +281,7 @@ typedef struct { struct _snd_pcm_runtime { /* -- Status -- */ snd_pcm_substream_t *trigger_master; - snd_timestamp_t trigger_tstamp; /* trigger timestamp */ + struct timespec trigger_tstamp; /* trigger timestamp */ int overrange; snd_pcm_uframes_t avail_max; snd_pcm_uframes_t hw_ptr_base; /* Position at buffer restart */ @@ -306,7 +306,6 @@ struct _snd_pcm_runtime { unsigned int rate_den; /* -- SW params -- */ - int tstamp_timespec; /* use timeval (0) or timespec (1) */ snd_pcm_tstamp_t tstamp_mode; /* mmap timestamp is updated */ unsigned int period_step; unsigned int sleep_min; /* min ticks to sleep */ diff --git a/include/sound/timer.h b/include/sound/timer.h index 1898511a0f38..b55f38ae56e1 100644 --- a/include/sound/timer.h +++ b/include/sound/timer.h @@ -88,6 +88,7 @@ struct _snd_timer_hardware { struct _snd_timer { snd_timer_class_t tmr_class; snd_card_t *card; + struct module *module; int tmr_device; int tmr_subdevice; char id[64]; diff --git a/include/sound/version.h b/include/sound/version.h index ee32af20dba9..d1bd3b723967 100644 --- a/include/sound/version.h +++ b/include/sound/version.h @@ -1,3 +1,3 @@ /* include/version.h. Generated by configure. */ -#define CONFIG_SND_VERSION "1.0.10rc1" -#define CONFIG_SND_DATE " (Mon Sep 12 08:13:09 2005 UTC)" +#define CONFIG_SND_VERSION "1.0.10rc3" +#define CONFIG_SND_DATE " (Mon Nov 07 13:30:21 2005 UTC)" |