diff options
Diffstat (limited to 'tools/perf/pmu-events/arch/x86/knightslanding/floating-point.json')
| -rw-r--r-- | tools/perf/pmu-events/arch/x86/knightslanding/floating-point.json | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/tools/perf/pmu-events/arch/x86/knightslanding/floating-point.json b/tools/perf/pmu-events/arch/x86/knightslanding/floating-point.json index ecc96f32f167..089aa3ef345d 100644 --- a/tools/perf/pmu-events/arch/x86/knightslanding/floating-point.json +++ b/tools/perf/pmu-events/arch/x86/knightslanding/floating-point.json @@ -8,18 +8,18 @@ "UMask": "0x4" }, { - "BriefDescription": "Counts the number of vector SSE, AVX, AVX2, AVX-512 micro-ops retired. More specifically, it counts packed SSE, AVX, AVX2, AVX-512 micro-ops (both floating point and integer) except for loads (memory-to-register mov-type micro-ops), packed byte and word multiplies.", + "BriefDescription": "Counts the number of packed SSE, AVX, AVX2, AVX-512 micro-ops (both floating point and integer) except for loads (memory-to-register mov-type micro-ops), packed byte and word multiplies.", "EventCode": "0xC2", "EventName": "UOPS_RETIRED.PACKED_SIMD", - "PublicDescription": "This event counts the number of packed vector SSE, AVX, AVX2, and AVX-512 micro-ops retired (floating point, integer and store) except for loads (memory-to-register mov-type micro-ops), packed byte and word multiplies.", + "PublicDescription": "The length of the packed operation (128bits, 256bits or 512bits) is not taken into account when updating the counter; all count the same (+1). \r\nMask (k) registers are ignored. For example: a micro-op operating with a mask that only enables one element or even zero elements will still trigger this counter (+1)\r\nThis event is defined at the micro-op level and not instruction level. Most instructions are implemented with one micro-op but not all.", "SampleAfterValue": "200003", "UMask": "0x40" }, { - "BriefDescription": "Counts the number of scalar SSE, AVX, AVX2, AVX-512 micro-ops retired. More specifically, it counts scalar SSE, AVX, AVX2, AVX-512 micro-ops except for loads (memory-to-register mov-type micro ops), division, sqrt.", + "BriefDescription": "Counts the number of scalar SSE, AVX, AVX2, AVX-512 micro-ops except for loads (memory-to-register mov-type micro ops), division, sqrt.", "EventCode": "0xC2", "EventName": "UOPS_RETIRED.SCALAR_SIMD", - "PublicDescription": "This event counts the number of scalar SSE, AVX, AVX2, AVX-512 micro-ops retired (floating point, integer and store) except for loads (memory-to-register mov-type micro ops), division, sqrt.", + "PublicDescription": "This event is defined at the micro-op level and not instruction level. Most instructions are implemented with one micro-op but not all.", "SampleAfterValue": "200003", "UMask": "0x20" } |