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* crypto: user - fix empty string test in report APIMathias Krause2013-02-191-1/+1
| | | | | | | | | | The current test for empty strings fails because it is testing the address of a field, not a pointer. So the test will always be true. Test the first character in the string to not be null instead. Signed-off-by: Mathias Krause <minipli@googlemail.com> Cc: Steffen Klassert <steffen.klassert@secunet.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: user - fix info leaks in report APIMathias Krause2013-02-198-30/+29
| | | | | | | | | | | | | | | | | | | | | | | | | Three errors resulting in kernel memory disclosure: 1/ The structures used for the netlink based crypto algorithm report API are located on the stack. As snprintf() does not fill the remainder of the buffer with null bytes, those stack bytes will be disclosed to users of the API. Switch to strncpy() to fix this. 2/ crypto_report_one() does not initialize all field of struct crypto_user_alg. Fix this to fix the heap info leak. 3/ For the module name we should copy only as many bytes as module_name() returns -- not as much as the destination buffer could hold. But the current code does not and therefore copies random data from behind the end of the module name, as the module name is always shorter than CRYPTO_MAX_ALG_NAME. Also switch to use strncpy() to copy the algorithm's name and driver_name. They are strings, after all. Signed-off-by: Mathias Krause <minipli@googlemail.com> Cc: Steffen Klassert <steffen.klassert@secunet.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: caam - Added property fsl,sec-era in SEC4.0 device tree binding.Vakul Garg2013-02-041-3/+9
| | | | | | | | | This new property defines the era of the particular SEC version. The compatible property in device tree "crypto" node has been updated not to contain SEC era numbers. Signed-off-by: Vakul Garg <vakul@freescale.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: use ERR_CASTJulia Lawall2013-02-0411-59/+27
| | | | | | | | | | | | | | | | | | | | Replace PTR_ERR followed by ERR_PTR by ERR_CAST, to be more concise. The semantic patch that makes this change is as follows: (http://coccinelle.lip6.fr/) // <smpl> @@ expression err,x; @@ - err = PTR_ERR(x); if (IS_ERR(x)) - return ERR_PTR(err); + return ERR_CAST(x); // </smpl> Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: atmel-aes - adjust duplicate testJulia Lawall2013-02-041-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Delete successive tests to the same location. The code tested the result of a previous allocation, that itself was already tested. It is changed to test the result of the most recent allocation. A simplified version of the semantic match that finds this problem is as follows: (http://coccinelle.lip6.fr/) // <smpl> @s exists@ local idexpression y; expression x,e; @@ *if ( \(x == NULL\|IS_ERR(x)\|y != 0\) ) { ... when forall return ...; } ... when != \(y = e\|y += e\|y -= e\|y |= e\|y &= e\|y++\|y--\|&y\) when != \(XT_GETPAGE(...,y)\|WMI_CMD_BUF(...)\) *if ( \(x == NULL\|IS_ERR(x)\|y != 0\) ) { ... when forall return ...; } // </smpl> Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr> Acked-by: David S. Miller <davem@davemloft.net> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: crc32-pclmul - Kill warning on x86-32Herbert Xu2013-01-201-1/+0
| | | | | | | | This patch removes a gratuitous warning on x86-32: arch/x86/crypto/crc32-pclmul_asm.S:87:2: warning: #warning Using 32bit code support [-Wcpp] Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: x86/twofish - assembler clean-ups: use ENTRY/ENDPROC, localize jump ↵Jussi Kivilinna2013-01-204-48/+29
| | | | | | | | labels Signed-off-by: Jussi Kivilinna <jussi.kivilinna@mbnet.fi> Acked-by: David S. Miller <davem@davemloft.net> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: x86/sha1 - assembler clean-ups: use ENTRY/ENDPROCJussi Kivilinna2013-01-201-5/+5
| | | | | | Signed-off-by: Jussi Kivilinna <jussi.kivilinna@mbnet.fi> Acked-by: David S. Miller <davem@davemloft.net> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: x86/serpent - use ENTRY/ENDPROC for assember functions and localize ↵Jussi Kivilinna2013-01-203-48/+27
| | | | | | | | jump targets Signed-off-by: Jussi Kivilinna <jussi.kivilinna@mbnet.fi> Acked-by: David S. Miller <davem@davemloft.net> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: x86/salsa20 - assembler cleanup, use ENTRY/ENDPROC for assember ↵Jussi Kivilinna2013-01-203-34/+27
| | | | | | | | functions and rename ECRYPT_* to salsa20_* Signed-off-by: Jussi Kivilinna <jussi.kivilinna@mbnet.fi> Acked-by: David S. Miller <davem@davemloft.net> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: x86/ghash - assembler clean-up: use ENDPROC at end of assember functionsJussi Kivilinna2013-01-201-0/+4
| | | | | | Signed-off-by: Jussi Kivilinna <jussi.kivilinn@mbnet.fi> Acked-by: David S. Miller <davem@davemloft.net> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: x86/crc32c - assembler clean-up: use ENTRY/ENDPROCJussi Kivilinna2013-01-201-2/+6
| | | | | | Signed-off-by: Jussi Kivilinna <jussi.kivilinna@mbnet.fi> Acked-by: David S. Miller <davem@davemloft.net> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: cast6-avx: use ENTRY()/ENDPROC() for assembler functionsJussi Kivilinna2013-01-201-24/+11
| | | | | | Signed-off-by: Jussi Kivilinna <jussi.kivilinna@mbnet.fi> Acked-by: David S. Miller <davem@davemloft.net> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: cast5-avx: use ENTRY()/ENDPROC() for assembler functions and ↵Jussi Kivilinna2013-01-201-30/+18
| | | | | | | | localize jump targets Signed-off-by: Jussi Kivilinna <jussi.kivilinna@mbnet.fi> Acked-by: David S. Miller <davem@davemloft.net> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: camellia-x86_64/aes-ni: use ENTRY()/ENDPROC() for assembler ↵Jussi Kivilinna2013-01-202-52/+36
| | | | | | | | functions and localize jump targets Signed-off-by: Jussi Kivilinna <jussi.kivilinna@mbnet.fi> Acked-by: David S. Miller <davem@davemloft.net> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: blowfish-x86_64: use ENTRY()/ENDPROC() for assembler functions and ↵Jussi Kivilinna2013-01-201-25/+14
| | | | | | | | localize jump targets Signed-off-by: Jussi Kivilinna <jussi.kivilinna@mbnet.fi> Acked-by: David S. Miller <davem@davemloft.net> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: aesni-intel - add ENDPROC statements for assembler functionsJussi Kivilinna2013-01-201-1/+22
| | | | | | Signed-off-by: Jussi Kivilinna <jussi.kivilinna@mbnet.fi> Acked-by: David S. Miller <davem@davemloft.net> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: x86/aes - assembler clean-ups: use ENTRY/ENDPROC, localize jump targetsJussi Kivilinna2013-01-202-25/+20
| | | | | | Signed-off-by: Jussi Kivilinna <jussi.kivilinna@mbnet.fi> Acked-by: David S. Miller <davem@davemloft.net> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: testmgr - add test vector for fcryptJussi Kivilinna2013-01-201-0/+15
| | | | | | | | | | fcrypt is used only as pcbc(fcrypt), but testmgr does not know this. Use the zero key, zero plaintext pcbc(fcrypt) test vector for testing plain 'fcrypt' to hide "no test for fcrypt" warnings. Signed-off-by: Jussi Kivilinna <jussi.kivilinna@mbnet.fi> Acked-by: David S. Miller <davem@davemloft.net> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: omap-sham - Fix compile errors when CONFIG_OF not definedMark A. Greer2013-01-201-1/+5
| | | | | | | | | | | Fix the compile errors created by commit 2545e8d (crypto: omap-sham - Add Device Tree Support) when CONFIG_OF is not defined. This includes changing omap_sham_get_res_dev() to omap_sham_get_res_of() and creating an empty version of omap_sham_of_match[]. Signed-off-by: Mark A. Greer <mgreer@animalcreek.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: crc32 - add crc32 pclmulqdq implementation and wrappers for table ↵Alexander Boyko2013-01-206-0/+630
| | | | | | | | | | | | | | | implementation This patch adds crc32 algorithms to shash crypto api. One is wrapper to gerneric crc32_le function. Second is crc32 pclmulqdq implementation. It use hardware provided PCLMULQDQ instruction to accelerate the CRC32 disposal. This instruction present from Intel Westmere and AMD Bulldozer CPUs. For intel core i5 I got 450MB/s for table implementation and 2100MB/s for pclmulqdq implementation. Signed-off-by: Alexander Boyko <alexander_boyko@xyratex.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: s5p-sss - Use devm_clk_get()Jingoo Han2013-01-201-3/+1
| | | | | | | | Use devm_clk_get() rather than clk_get() to make cleanup paths more simple. Signed-off-by: Jingoo Han <jg1.han@samsung.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: omap-aes - Add CTR algorithm SupportMark A. Greer2013-01-201-15/+128
| | | | | | | | | | | | | | | | | | | | | | | | | The OMAP3 and OMAP4/AM33xx versions of the AES crypto module support the CTR algorithm in addition to ECB and CBC that the OMAP2 version of the module supports. So, OMAP2 and OMAP3 share a common register set but OMAP3 supports CTR while OMAP2 doesn't. OMAP4/AM33XX uses a different register set from OMAP2/OMAP3 and also supports CTR. To add this support, use the platform_data introduced in an ealier commit to hold the list of algorithms supported by the current module. The probe routine will use that list to register the correct algorithms. Note: The code being integrated is from the TI AM33xx SDK and was written by Greg Turner <gkmturner@gmail.com> and Herman Schuurman (current email unknown) while at TI. CC: Greg Turner <gkmturner@gmail.com> CC: Dmitry Kasatkin <dmitry.kasatkin@intel.com> Signed-off-by: Mark A. Greer <mgreer@animalcreek.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: omap-aes - Add OMAP4/AM33XX AES SupportMark A. Greer2013-01-201-33/+125
| | | | | | | | | | | | | | | | | | | | | | Add support for the OMAP4 version of the AES module that is present on OMAP4 and AM33xx SoCs. The modules have several differences including register offsets and how DMA is triggered. To handle these differences, a platform_data structure is defined and contains routine pointers, register offsets, and bit offsets within registers. OMAP2/OMAP3-specific routines are suffixed with '_omap2' and OMAP4/AM33xx routines are suffixed with '_omap4'. Note: The code being integrated is from the TI AM33xx SDK and was written by Greg Turner <gkmturner@gmail.com> and Herman Schuurman (current email unknown) while at TI. CC: Greg Turner <gkmturner@gmail.com> CC: Dmitry Kasatkin <dmitry.kasatkin@intel.com> Signed-off-by: Mark A. Greer <mgreer@animalcreek.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: omap-aes - Convert to dma_request_slave_channel_compat()Mark A. Greer2013-01-201-4/+8
| | | | | | | | | | Use the dma_request_slave_channel_compat() call instead of the dma_request_channel() call to request a DMA channel. This allows the omap-aes driver use different DMA engines. CC: Dmitry Kasatkin <dmitry.kasatkin@intel.com> Signed-off-by: Mark A. Greer <mgreer@animalcreek.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: omap-aes - Add Device Tree SupportMark A. Greer2013-01-201-26/+97
| | | | | | | | | | | Add Device Tree suport to the omap-aes crypto driver. Currently, only support for OMAP2 and OMAP3 is being added but support for OMAP4 will be added in a subsequent patch. CC: Dmitry Kasatkin <dmitry.kasatkin@intel.com> Signed-off-by: Mark A. Greer <mgreer@animalcreek.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: omap-aes - Remove usage of private DMA APIMark A. Greer2013-01-201-133/+0
| | | | | | | | | | Remove usage of the private OMAP DMA API. The dmaengine API will be used instead. CC: Russell King <rmk+kernel@arm.linux.org.uk> CC: Dmitry Kasatkin <dmitry.kasatkin@intel.com> Signed-off-by: Mark A. Greer <mgreer@animalcreek.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: omap-aes - Add code to use dmaengine APIMark A. Greer2013-01-201-1/+183
| | | | | | | | | | | | Add code to use the new dmaengine API alongside the existing DMA code that uses the private OMAP DMA API. The API to use is chosen by defining or undefining 'OMAP_AES_DMA_PRIVATE'. CC: Russell King <rmk+kernel@arm.linux.org.uk> CC: Dmitry Kasatkin <dmitry.kasatkin@intel.com> Signed-off-by: Mark A. Greer <mgreer@animalcreek.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: omap-aes - Add suspend/resume supportMark A. Greer2013-01-201-0/+19
| | | | | | | | Add suspend/resume support to the OMAP AES driver. CC: Dmitry Kasatkin <dmitry.kasatkin@intel.com> Signed-off-by: Mark A. Greer <mgreer@animalcreek.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: omap-aes - Convert to use pm_runtime APIMark A. Greer2013-01-201-18/+11
| | | | | | | | | | Convert the omap-aes crypto driver to use the pm_runtime API instead of the clk API. CC: Kevin Hilman <khilman@deeprootsystems.com> CC: Dmitry Kasatkin <dmitry.kasatkin@intel.com> Signed-off-by: Mark A. Greer <mgreer@animalcreek.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: omap-aes - Don't reset controller for every operationMark A. Greer2013-01-201-27/+0
| | | | | | | | | | The AES controller only needs to be reset once and that will be done by the hwmod infrastructure, if possible. Therefore, remove the reset code from the omap-aes driver. CC: Dmitry Kasatkin <dmitry.kasatkin@intel.com> Signed-off-by: Mark A. Greer <mgreer@animalcreek.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: omap-aes - Remmove unnecessary pr_info noiseMark A. Greer2013-01-201-4/+0
| | | | | | | | | Remove the unnecessary pr_info() calls from omap_aes_probe() and omap_aes_mod_init(). CC: Dmitry Kasatkin <dmitry.kasatkin@intel.com> Signed-off-by: Mark A. Greer <mgreer@animalcreek.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: bfin_crc - reposition free_irq to avoid access to invalid dataJulia Lawall2013-01-201-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The data referenced by an interrupt handler should not be freed before the interrupt is ended. The handler is bfin_crypto_crc_handler. It may refer to crc->regs, which is released by the iounmap. Furthermore, the second argument to all calls to free_irq is incorrect. It should be the same as the last argument of request_irq, which is crc, rather than crc->dev. The semantic match that finds the first problem is as follows: (http://coccinelle.lip6.fr/) // <smpl> @fn exists@ expression list es; expression a,b; identifier f; @@ if (...) { ... when any free_irq(a,b); ... when any f(es); ... when any return ...; } @@ expression list fn.es; expression fn.a,fn.b; identifier fn.f; @@ *f(es); ... when any *free_irq(a,b); // </smpl> Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: omap-sham - Add SHA224 and SHA256 SupportMark A. Greer2013-01-051-10/+173
| | | | | | | | | | | | | | | | | | | | The OMAP4/AM33xx version of the SHAM crypto module supports SHA224 and SHA256 in addition to MD5 and SHA1 that the OMAP2 version of the module supports. To add this support, use the platform_data introduced in an ealier commit to hold the list of algorithms supported by the current module. The probe routine will use that list to register the correct algorithms. Note: The code being integrated is from the TI AM33xx SDK and was written by Greg Turner <gkmturner@gmail.com> and Herman Schuurman (current email unknown) while at TI. CC: Greg Turner <gkmturner@gmail.com> CC: Dmitry Kasatkin <dmitry.kasatkin@intel.com> Signed-off-by: Mark A. Greer <mgreer@animalcreek.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: omap-sham - Add OMAP4/AM33XX SHAM SupportMark A. Greer2013-01-051-84/+332
| | | | | | | | | | | | | | | | | | | | | | | | Add support for the OMAP4 version of the SHAM module that is present on OMAP4 and AM33xx SoCs. The modules have several differences including register offsets, hardware XORing, and how DMA is triggered. To handle these differences, a platform_data structure is defined and contains routine pointers, register offsets, bit shifts within registers, and flags to indicate whether the hardware supports XORing and provides SHA1 results in big or little endian. OMAP2/OMAP3-specific routines are suffixed with '_omap2' and OMAP4/AM33xx routines are suffixed with '_omap4'. Note: The code being integrated is from the TI AM33xx SDK and was written by Greg Turner <gkmturner@gmail.com> and Herman Schuurman (current email unknown) while at TI. CC: Greg Turner <gkmturner@gmail.com> CC: Dmitry Kasatkin <dmitry.kasatkin@intel.com> Signed-off-by: Mark A. Greer <mgreer@animalcreek.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: omap-sham - Convert to dma_request_slave_channel_compat()Mark A. Greer2013-01-051-1/+2
| | | | | | | | | | Use the dma_request_slave_channel_compat() call instead of the dma_request_channel() call to request a DMA channel. This allows the omap-sham driver use different DMA engines. CC: Dmitry Kasatkin <dmitry.kasatkin@intel.com> Signed-off-by: Mark A. Greer <mgreer@animalcreek.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: omap-sham - Add Device Tree SupportMark A. Greer2013-01-051-33/+106
| | | | | | | | | | | Add Device Tree suport to the omap-sham crypto driver. Currently, only support for OMAP2 and OMAP3 is being added but support for OMAP4 will be added in a subsequent patch. CC: Dmitry Kasatkin <dmitry.kasatkin@intel.com> Signed-off-by: Mark A. Greer <mgreer@animalcreek.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: omap-sham - Remove usage of private DMA APIMark A. Greer2013-01-051-109/+0
| | | | | | | | | | Remove usage of the private OMAP DMA API. The dmaengine API will be used instead. CC: Russell King <rmk+kernel@arm.linux.org.uk> CC: Dmitry Kasatkin <dmitry.kasatkin@intel.com> Signed-off-by: Mark A. Greer <mgreer@animalcreek.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: omap-sham - Add code to use dmaengine APIMark A. Greer2013-01-051-9/+145
| | | | | | | | | | | | | | | | Add code to use the new dmaengine API alongside the existing DMA code that uses the private OMAP DMA API. The API to use is chosen by defining or undefining 'OMAP_SHAM_DMA_PRIVATE'. This is a transitional change and the code that uses the private DMA API will be removed in an upcoming commit. CC: Russell King <rmk+kernel@arm.linux.org.uk> CC: Dmitry Kasatkin <dmitry.kasatkin@intel.com> Signed-off-by: Mark A. Greer <mgreer@animalcreek.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: omap-sham - Add suspend/resume supportMark A. Greer2013-01-051-0/+19
| | | | | | | | Add suspend/resume support to the OMAP SHAM driver. CC: Dmitry Kasatkin <dmitry.kasatkin@intel.com> Signed-off-by: Mark A. Greer <mgreer@animalcreek.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: omap-sham - Convert to use pm_runtime APIMark A. Greer2013-01-051-17/+11
| | | | | | | | | | Convert the omap-sham crypto driver to use the pm_runtime API instead of the clk API. CC: Kevin Hilman <khilman@deeprootsystems.com> CC: Dmitry Kasatkin <dmitry.kasatkin@intel.com> Signed-off-by: Mark A. Greer <mgreer@animalcreek.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: omap-sham - Remove unnecessary pr_info noiseMark A. Greer2013-01-051-2/+0
| | | | | | | | Remove the unnecessary pr_info() call in omap_sham_mod_init(). CC: Dmitry Kasatkin <dmitry.kasatkin@intel.com> Signed-off-by: Mark A. Greer <mgreer@animalcreek.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* Linux 3.8-rc1v3.8-rc1Linus Torvalds2012-12-211-2/+2
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* Merge git://www.linux-watchdog.org/linux-watchdogLinus Torvalds2012-12-2119-445/+738
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull watchdog updates from Wim Van Sebroeck: "This includes some fixes and code improvements (like clk_prepare_enable and clk_disable_unprepare), conversion from the omap_wdt and twl4030_wdt drivers to the watchdog framework, addition of the SB8x0 chipset support and the DA9055 Watchdog driver and some OF support for the davinci_wdt driver." * git://www.linux-watchdog.org/linux-watchdog: (22 commits) watchdog: mei: avoid oops in watchdog unregister code path watchdog: Orion: Fix possible null-deference in orion_wdt_probe watchdog: sp5100_tco: Add SB8x0 chipset support watchdog: davinci_wdt: add OF support watchdog: da9052: Fix invalid free of devm_ allocated data watchdog: twl4030_wdt: Change TWL4030_MODULE_PM_RECEIVER to TWL_MODULE_PM_RECEIVER watchdog: remove depends on CONFIG_EXPERIMENTAL watchdog: Convert dev_printk(KERN_<LEVEL> to dev_<level>( watchdog: DA9055 Watchdog driver watchdog: omap_wdt: eliminate goto watchdog: omap_wdt: delete redundant platform_set_drvdata() calls watchdog: omap_wdt: convert to devm_ functions watchdog: omap_wdt: convert to new watchdog core watchdog: WatchDog Timer Driver Core: fix comment watchdog: s3c2410_wdt: use clk_prepare_enable and clk_disable_unprepare watchdog: imx2_wdt: Select the driver via ARCH_MXC watchdog: cpu5wdt.c: add missing del_timer call watchdog: hpwdt.c: Increase version string watchdog: Convert twl4030_wdt to watchdog core davinci_wdt: preparation for switch to common clock framework ...
| * watchdog: mei: avoid oops in watchdog unregister code pathTomas Winkler2012-12-191-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With commit c7d3df3 "mei: use internal watchdog device registration tracking" will crash the kernel on shutdown path on systems where ME watchdog is not present. Since the watchdog was never initialized in such case the WDOG_UNREGISTERED bit is never set and the system crashes on access to uninitialized variables down the path. To solve the issue we query for NULL on watchdog driver driver_data to check whether the device is registered. This is handled in the driver and doesn't depend on watchdog core internals. Cc: Borislav Petkov <bp@alien8.de> Cc: Wanlong Gao <gaowanlong@cn.fujitsu.com> Signed-off-by: Jerry Snitselaar <jerry.snitselaar@oracle.com> Signed-off-by: Tomas Winkler <tomas.winkler@intel.com> Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
| * watchdog: Orion: Fix possible null-deference in orion_wdt_probeJason Gunthorpe2012-12-191-0/+2
| | | | | | | | | | | | | | | | If the DT does not include a regs parameter then the null res would be dereferenced. Signed-off-by: Jason Gunthorpe <jgunthorpe@obsidianresearch.com> Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
| * watchdog: sp5100_tco: Add SB8x0 chipset supportTakahisa Tanaka2012-12-192-61/+306
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current sp5100_tco driver only supports SP5100/SB7x0 chipset, doesn't support SB8x0 chipset, because current sp5100_tco driver doesn't know that the offset address for watchdog timer was changed from SB8x0 chipset. The offset address of SP5100 and SB7x0 chipsets are as follows, quote from the AMD SB700/710/750 Register Reference Guide (Page 164) and the AMD SP5100 Register Reference Guide (Page 166). WatchDogTimerControl 69h WatchDogTimerBase0 6Ch WatchDogTimerBase1 6Dh WatchDogTimerBase2 6Eh WatchDogTimerBase3 6Fh In contrast, the offset address of SB8x0 chipset is as follows, quote from AMD SB800-Series Southbridges Register Reference Guide (Page 147). WatchDogTimerEn 48h WatchDogTimerConfig 4Ch So, In the case of SB8x0 chipset, sp5100_tco reads meaningless MMIO address (for example, 0xbafe00) from wrong offset address, and the following message is logged. SP5100 TCO timer: mmio address 0xbafe00 already in use With this patch, sp5100_tco driver supports SB8x0 chipset, and can avoid iomem resource conflict. The processing of this patch is as follows. Step 1) Attempt to get the watchdog base address from indirect I/O (0xCD6 and 0xCD7). - Go to the step 7 if obtained address hasn't conflicted with other resource. But, currently, the address (0xfec000f0) conflicts with the IOAPIC MMIO address, and the following message is logged. SP5100 TCO timer: mmio address 0xfec000f0 already in use 0xfec000f0 is recommended by AMD BIOS Developer's Guide. So, go to the next step. Step 2) Attempt to get the SBResource_MMIO base address from AcpiMmioEN (for SB8x0, PM_Reg:24h) or SBResource_MMIO (SP5100/SB7x0, PCI_Reg:9Ch) register. - Go to the step 7 if these register has enabled by BIOS, and obtained address hasn't conflicted with other resource. - If above condition isn't true, go to the next step. Step 3) Attempt to get the free MMIO address from allocate_resource(). - Go to the step 7 if these register has enabled by BIOS, and obtained address hasn't conflicted with other resource. - Driver initialization has failed if obtained address has conflicted with other resource, and no 'force_addr' parameter is specified. Step 4) Use the specified address If 'force_addr' parameter is specified. - allocate_resource() function may fail, when the PCI bridge device occupies iomem resource from 0xf0000000 to 0xffffffff. To handle such a case, I added 'force_addr' parameter to sp5100_tco driver. With 'force_addr' parameter, sp5100_tco driver directly can assign MMIO address for watchdog timer from free iomem region. Note that It's dangerous to specify wrong address in the 'force_addr' parameter. Example of force_addr parameter use # cat /proc/iomem ...snip... fec00000-fec003ff : IOAPIC 0 <--- free MMIO region fec10000-fec1001f : pnp 00:0b fec20000-fec203ff : IOAPIC 1 ...snip... # cat /etc/modprobe.d/sp5100_tco.conf options sp5100_tco force_addr=0xfec00800 # modprobe sp5100_tco # cat /proc/iomem ...snip... fec00000-fec003ff : IOAPIC 0 fec00800-fec00807 : SP5100 TCO <--- watchdog timer MMIO address fec10000-fec1001f : pnp 00:0b fec20000-fec203ff : IOAPIC 1 ...snip... # - Driver initialization has failed if specified address has conflicted with other resource. Step 5) Disable the watchdog timer - To rewrite the watchdog timer register of the chipset, absolutely guarantee that the watchdog timer is disabled. Step 6) Re-program the watchdog timer MMIO address to chipset. - Re-program the obtained MMIO address in Step 3 or Step 4 to chipset via indirect I/O (0xCD6 and 0xCD7). Step 7) Enable and setup the watchdog timer This patch has worked fine on my test environment (ASUS M4A89GTD-PRO/USB3 and DL165G7). therefore I believe that it's no problem to re-program the MMIO address for watchdog timer to chipset during disabled watchdog. However, I'm not sure about it, because I don't know much about chipset programming. So, any comments will be welcome. Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=43176 Tested-by: Arkadiusz Miskiewicz <arekm@maven.pl> Tested-by: Paul Menzel <paulepanter@users.sourceforge.net> Signed-off-by: Takahisa Tanaka <mc74hc00@gmail.com> Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
| * watchdog: davinci_wdt: add OF supportMurali Karicheri2012-12-192-0/+19
| | | | | | | | | | | | | | | | This adds OF support for davinci_wdt driver. Signed-off-by: Murali Karicheri <m-karicheri2@ti.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
| * watchdog: da9052: Fix invalid free of devm_ allocated dataTushar Behera2012-12-191-4/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | It is not required to free devm_ allocated data. Since kref_put needs a valid release function, da9052_wdt_release_resources() is not deleted. Fixes following warning. drivers/watchdog/da9052_wdt.c:59:1-6: WARNING: invalid free of devm_ allocated data Signed-off-by: Tushar Behera <tushar.behera@linaro.org> Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
| * watchdog: twl4030_wdt: Change TWL4030_MODULE_PM_RECEIVER to ↵Peter Ujfalusi2012-12-191-1/+1
| | | | | | | | | | | | | | | | | | | | TWL_MODULE_PM_RECEIVER To facilitate upcoming cleanup in twl stack. No functional changes. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
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