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* Merge branch 'next' of git://git.monstr.eu/linux-2.6-microblazeLinus Torvalds2012-10-0712-80/+182
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull microblaze arch updates from Michal Simek. * 'next' of git://git.monstr.eu/linux-2.6-microblaze: Revert "microblaze_mmu_v2: Update signal returning address" microblaze: Added more support for PCI microblaze: Prefer to use pr_XXX instead of printk(KERN_XX) microblaze: Fix bug with passing command line microblaze: Remove PAGE properties duplication microblaze: Remove additional andi which has been already done microblaze: Use predefined macro for ESR_DIZ microblaze: Support 4k/16k/64k pages microblaze: Do not used hardcoded value in exception handler microblaze: Added fdt chosen capability for timer microblaze: Add support for ioreadXX/iowriteXX_rep microblaze: Improve failure handling for GPIO reset microblaze: clinkage.h
| * Revert "microblaze_mmu_v2: Update signal returning address"Michal Simek2012-10-041-8/+0
| | | | | | | | | | | | | | | | | | | | | | | | This reverts commit 8b28626a6b1522b39f75d0bf80d5dec23c931f5a. Offset -8 is wrong because when it is applied then one instruction before brki r14, 8 is called again when we return. Offset -4 is correct and brki instruction is called again. This change came from ancient MMU kernel. Signed-off-by: Michal Simek <monstr@monstr.eu>
| * microblaze: Added more support for PCIJohn Linn2012-10-042-0/+6
| | | | | | | | | | | | | | | | | | In order to use an off the shelf nic, like the intel pro card, changes are needed to support pci dma interfaces and other small changes. Signed-off-by: John Linn <john.linn@xilinx.com> Signed-off-by: Michal Simek <monstr@monstr.eu>
| * microblaze: Prefer to use pr_XXX instead of printk(KERN_XX)Michal Simek2012-10-043-15/+15
| | | | | | | | | | | | Fix reset.c, timer.c, setup.c file. Signed-off-by: Michal Simek <monstr@monstr.eu>
| * microblaze: Fix bug with passing command lineMichal Simek2012-10-042-12/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When u-boot passes control over to Linux it places the Linux command line between to the end of __init_end. When space between __init_end and __bss_start is not COMMAND_LINE_SIZE then the part of cmdline can be lost. In extreme case if __init_end == __bss_start u-boot can't pass any cmdline to Linux kernel. This patch fix this issue by copying cmd line directly to cmd_line char array which is placed in data section. Reported-by: David Mc Andrew <david.mcandrew@xilinx.com> Signed-off-by: Michal Simek <monstr@monstr.eu>
| * microblaze: Remove PAGE properties duplicationMichal Simek2012-10-041-6/+0
| | | | | | | | | | | | HWEXEC and HWWRITE is define above. Remove them. Signed-off-by: Michal Simek <monstr@monstr.eu>
| * microblaze: Remove additional andi which has been already doneMichal Simek2012-10-041-3/+0
| | | | | | | | | | | | Remove one additional step. Signed-off-by: Michal Simek <monstr@monstr.eu>
| * microblaze: Use predefined macro for ESR_DIZMichal Simek2012-10-041-2/+3
| | | | | | | | | | | | Just use macro instead of hardcoded value. Signed-off-by: Michal Simek <monstr@monstr.eu>
| * microblaze: Support 4k/16k/64k pagesMichal Simek2012-10-043-9/+10
| | | | | | | | | | | | | | | | Add support for page size which is supported by MMU. Remove 8k and 32k page size because they are not supported by MMU. Signed-off-by: Michal Simek <monstr@monstr.eu>
| * microblaze: Do not used hardcoded value in exception handlerMichal Simek2012-10-042-24/+32
| | | | | | | | | | | | Use predefined macros to support more page sizes. Signed-off-by: Michal Simek <monstr@monstr.eu>
| * microblaze: Added fdt chosen capability for timerMichal Simek2012-10-041-1/+9
| | | | | | | | | | | | | | | | | | | | This lets a dts author flag a particular timer in the system as the system timer. If the chosen node contains a "system-timer=<&foo>" entry than that handle will be used to determine the system timer. In no such entry exists then the first found timer will be used (current behaviour). Signed-off-by: Peter A. G. Crosthwaite <peter.crosthwaite@petalogix.com> Signed-off-by: Michal Simek <monstr@monstr.eu>
| * microblaze: Add support for ioreadXX/iowriteXX_repMichal Simek2012-10-041-0/+90
| | | | | | | | | | | | Reuse versions from asm-generic functions. Signed-off-by: Michal Simek <monstr@monstr.eu>
| * microblaze: Improve failure handling for GPIO resetStephan Linz2012-10-041-2/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Early exit from of_platform_reset_gpio_probe() if there was no GPIO reset line configured. Avoid kernel oops in gpio_system_reset(): [ 27.413294] Restarting system. [ 27.415674] Machine restart... [ 27.418787] Oops: kernel access of bad area, sig: 11 [ 27.423252] Registers dump: mode=83871D1C [ 27.427428] r1=00000000, r2=00000000, r3=FFFFFEF8, r4=00000000 [ 27.433310] r5=C026AED0, r6=00000001, r7=00000068, r8=00000000 [ 27.439189] r9=C3871DAC, r10=000011A5, r11=00000000, r12=0000000A [ 27.445318] r13=00000000, r14=0000000F, r15=C00029BC, r16=00000000 [ 27.451558] r17=C011DE8C, r18=80000115, r19=0000000F, r20=48184ED8 [ 27.457770] r21=00000000, r22=FFFFFFEA, r23=00000001, r24=FEE1DEAD [ 27.463982] r25=00000054, r26=1000B1C8, r27=00000000, r28=00000000 [ 27.470208] r29=00000000, r30=00000000, r31=C32D30C0, rPC=C011DE8C [ 27.476433] msr=000042A2, ear=0000004B, esr=00000872, fsr=342E3732 And remove useless dump_stack from machine_restart. Signed-off-by: Stephan Linz <linz@li-pro.net> Signed-off-by: Michal Simek <monstr@monstr.eu>
| * microblaze: clinkage.hPaul Bolle2012-10-041-1/+0
| | | | | | | | | | | | | | | | | | | | | | Nothing includes <asm/clinkage.h>. It has actually never been included since it was added to the tree in commit 9981cd94d526a300dbef58048b1d281386b7289c ("microblaze_v8: clinkage.h linkage.h sections.h kmap_types.h"). That's not surprising, since including it is indistinguishable from including <linux/linkage.h>. It can safely be removed. Signed-off-by: Paul Bolle <pebolle@tiscali.nl>
* | Merge branch 'for-linus' of ↵Linus Torvalds2012-10-072-4/+4
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/jmorris/linux-security Pull IMA bugfix (security subsystem) from James Morris. * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jmorris/linux-security: ima: fix bug in argument order
| * | ima: fix bug in argument orderDmitry Kasatkin2012-10-052-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | mask argument goes first, then func, like ima_must_measure and ima_get_action. ima_inode_post_setattr() assumes that. Signed-off-by: Dmitry Kasatkin <dmitry.kasatkin@intel.com> Signed-off-by: Mimi Zohar <zohar@linux.vnet.ibm.com> Signed-off-by: James Morris <james.l.morris@oracle.com>
* | | Merge branch 'for-next' of ↵Linus Torvalds2012-10-0735-1778/+702
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/gerg/m68knommu Pull m68knommu arch updates from Greg Ungerer: "Most of it is a cleanup of the ColdFire hardware header files. We have had a few occurrances of bugs caused by inconsistent definitions of peripheral addresses. These patches make them all consistent, and also clean out a bunch of old crap. Overall we remove about 1000 lines." * 'for-next' of git://git.kernel.org/pub/scm/linux/kernel/git/gerg/m68knommu: (27 commits) m68knommu: fix inconsistent formating in ColdFire 5407 definitions m68knommu: fix inconsistent formating in ColdFire 5307 definitions m68knommu: fix inconsistent formating in ColdFire 527x definitions m68knommu: fix inconsistent formating in ColdFire 5272 definitions m68knommu: fix inconsistent formating in ColdFire 523x definitions m68knommu: clean up ColdFire 54xx General Timer definitions m68knommu: clean up Pin Assignment definitions for the 54xx ColdFire CPU m68knommu: fix multi-function pin setup for FEC module on ColdFire 523x m68knommu: move ColdFire slice timer address defiens to 54xx header m68knommu: use read/write IO access functions in ColdFire m532x setup code m68knommu: modify ColdFire 532x GPIO register definitions to be consistent m68knommu: remove a lot of unsed definitions for 532x ColdFire m68knommu: use definitions for the ColdFire 528x FEC multi-function pins m68knommu: remove address offsets relative to IPSBAR for ColdFire 527x m68knommu: remove unused ColdFire 5282 register definitions m68knommu: fix wrong register offsets used for ColdFire 5272 multi-function pins m68knommu: make ColdFire 5249 MBAR2 register definitions absolute addresses m68knommu: make remaining ColdFire 5272 register definitions absolute addresses m68knommu: make ColdFire Park and Assignment register definitions absolute addresses m68knommu: make ColdFire Chip Select register definitions absolute addresses ...
| * | | m68knommu: fix inconsistent formating in ColdFire 5407 definitionsGreg Ungerer2012-09-271-6/+6
| | | | | | | | | | | | | | | | | | | | | | | | Fix tab broken address defines to be consistent with others in this file. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * | | m68knommu: fix inconsistent formating in ColdFire 5307 definitionsGreg Ungerer2012-09-271-6/+6
| | | | | | | | | | | | | | | | | | | | | | | | Fix tab broken address defines to be consistent with others in this file. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * | | m68knommu: fix inconsistent formating in ColdFire 527x definitionsGreg Ungerer2012-09-271-17/+17
| | | | | | | | | | | | | | | | | | | | | | | | Fix tab broken address defines to be consistent with others in this file. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * | | m68knommu: fix inconsistent formating in ColdFire 5272 definitionsGreg Ungerer2012-09-271-3/+4
| | | | | | | | | | | | | | | | | | | | | | | | Fix tab broken defines to be consistent with others in this file. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * | | m68knommu: fix inconsistent formating in ColdFire 523x definitionsGreg Ungerer2012-09-271-9/+9
| | | | | | | | | | | | | | | | | | | | | | | | Fix tab broken address defines to be consistent with others in this file. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * | | m68knommu: clean up ColdFire 54xx General Timer definitionsGreg Ungerer2012-09-273-34/+33
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Convert the ColdFire 54xx CPU General Timer register address definitions to include the MCF_MBAR peripheral region offset. This makes them consistent with all other 54xx address register definitions (in m54xxsim.h). The goal is to reduce different definitions used (some including offsets and others not) causing bugs when used incorrectly. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * | | m68knommu: clean up Pin Assignment definitions for the 54xx ColdFire CPUGreg Ungerer2012-09-273-15/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Pin Assignment register definitions for the ColdFire 54xx CPU family are inconsistently named and defined compared to the other ColdFire part definitions. Rename them with the same prefix as used on other parts, MCFGPIO_PAR_, and make their definitions include the MCF_MBAR periphperal region offset. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * | | m68knommu: fix multi-function pin setup for FEC module on ColdFire 523xGreg Ungerer2012-09-272-7/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The multi-function pin setup code for the FEC ethernet module is using just plain wrong. Looks like it was cut-and-pasted from other init code. It has hard coded register addresses that are incorrect for the 523x, and it is manipulating bits that don't make sense. Add proper register definitions for the Pin Assignment registers of the 532x, and then use them to fix the setup code for the FEC hardware module. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * | | m68knommu: move ColdFire slice timer address defiens to 54xx headerGreg Ungerer2012-09-273-9/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move the base address defines of the ColdFire 54xx CPU slice timers into the 54xx specific header (m54xxsim.h). They are CPU specific, and belong with the CPU specific defines. Also make them relative to the MBAR peripheral region, making the define the absolute address. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * | | m68knommu: use read/write IO access functions in ColdFire m532x setup codeGreg Ungerer2012-09-272-148/+139
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Get rid of the use of local IO access macros and switch to using the standard read*/write* family of access functions for the ColdFire m532x setup code. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * | | m68knommu: modify ColdFire 532x GPIO register definitions to be consistentGreg Ungerer2012-09-272-42/+48
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The ColdFire 532x CPU register definitions for the multi-function setup pins are inconsistently defined compared with other ColdFire parts. Modify the register defintions to be just the addresses, not pointers. This also fixes the erroneous use in one case of using these values in the UART setup code for the 532x. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * | | m68knommu: remove a lot of unsed definitions for 532x ColdFireGreg Ungerer2012-09-271-1032/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | There are a lot of unused and uneccessary definitions in the header to support the ColdFire 532x CPU family. Remove the junk. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * | | m68knommu: use definitions for the ColdFire 528x FEC multi-function pinsGreg Ungerer2012-09-271-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently the setup code for the FEC multi-function pins on the ColdFire 528x has the addresses hard coded in the code. Use the register defines that already exist for this. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * | | m68knommu: remove address offsets relative to IPSBAR for ColdFire 527xGreg Ungerer2012-09-272-30/+46
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove the last address definitions relative to the IPSBAR peripheral region for the ColdFire 527x family. This involved cleaning up some magic numbers used in the code part, and making them proper register definitions in the 527x specific header. This is part of the process of cleaning up the ColdFire register definitions to make them consistently use absolute addresses for the primary registers. This will reduce the occasional bugs caused by inconsistent definition of the register addresses. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * | | m68knommu: remove unused ColdFire 5282 register definitionsGreg Ungerer2012-09-271-50/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | There is a bunch of old unused and ugly register definitions in the ColdFire 5282 header. Remove them. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * | | m68knommu: fix wrong register offsets used for ColdFire 5272 multi-function pinsGreg Ungerer2012-09-272-10/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The registers used to configure and set the multifunction pins on the 5272 ColdFire are defined as absolute addresses. So the use of them does not need to be offset relative to the peripheral region address. Fix two cases of incorrect usage of these addresses. Both affect UART initialization, one in the common UART pin setup code, the other in the NETtel board specific UART signal handling. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * | | m68knommu: make ColdFire 5249 MBAR2 register definitions absolute addressesGreg Ungerer2012-09-273-26/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Make the ColdFire 5249 MBAR peripheral register definitions absolute addresses, instead of offsets into the region. The various ColdFire parts use different methods to address the internal registers, some are absolute, some are relative to peripheral regions which can be mapped at different address ranges (such as the MBAR and IPSBAR registers). We don't want to deal with this in the code when we are accessing these registers, so make all register definitions the absolute address - factoring out whether it is an offset into a peripheral region. This makes them all consistently defined, and reduces the occasional bugs caused by inconsistent definition of the register addresses. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * | | m68knommu: make remaining ColdFire 5272 register definitions absolute addressesGreg Ungerer2012-09-272-17/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Make the remaining definitions of the 5272 ColdFire registers absolute addresses. Currently some are relative to the MBAR peripheral region. The various ColdFire parts use different methods to address the internal registers, some are absolute, some are relative to peripheral regions which can be mapped at different address ranges (such as the MBAR and IPSBAR registers). We don't want to deal with this in the code when we are accessing these registers, so make all register definitions the absolute address - factoring out whether it is an offset into a peripheral region. This makes them all consistently defined, and reduces the occasional bugs caused by inconsistent definition of the register addresses. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * | | m68knommu: make ColdFire Park and Assignment register definitions absolute ↵Greg Ungerer2012-09-274-9/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | addresses Make all definitions of the ColdFire MPARK and IRQ Assignment registers absolute addresses. Currently some are relative to the MBAR peripheral region. The various ColdFire parts use different methods to address the internal registers, some are absolute, some are relative to peripheral regions which can be mapped at different address ranges (such as the MBAR and IPSBAR registers). We don't want to deal with this in the code when we are accessing these registers, so make all register definitions the absolute address - factoring out whether it is an offset into a peripheral region. This makes them all consistently defined, and reduces the occasional bugs caused by inconsistent definition of the register addresses. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * | | m68knommu: make ColdFire Chip Select register definitions absolute addressesGreg Ungerer2012-09-278-134/+134
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Make all definitions of the ColdFire Chip Select registers absolute addresses. Currently some are relative to the MBAR peripheral region. The various ColdFire parts use different methods to address the internal registers, some are absolute, some are relative to peripheral regions which can be mapped at different address ranges (such as the MBAR and IPSBAR registers). We don't want to deal with this in the code when we are accessing these registers, so make all register definitions the absolute address - factoring out whether it is an offset into a peripheral region. This makes them all consistently defined, and reduces the occasional bugs caused by inconsistent definition of the register addresses. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * | | m68knommu: make ColdFire Interrupt Source register definitions absolute ↵Greg Ungerer2012-09-2711-85/+85
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | addresses Make all definitions of the ColdFire Interrupt Source registers absolute addresses. Currently some are relative to the MBAR peripheral region. The various ColdFire parts use different methods to address the internal registers, some are absolute, some are relative to peripheral regions which can be mapped at different address ranges (such as the MBAR and IPSBAR registers). We don't want to deal with this in the code when we are accessing these registers, so make all register definitions the absolute address - factoring out whether it is an offset into a peripheral region. This makes them all consistently defined, and reduces the occasional bugs caused by inconsistent definition of the register addresses. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * | | m68knommu: make ColdFire Pin Assignment register definitions absolute addressesGreg Ungerer2012-09-274-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Make all definitions of the ColdFire Pin Assignment registers absolute addresses. Currently some are relative to the MBAR peripheral region. The various ColdFire parts use different methods to address the internal registers, some are absolute, some are relative to peripheral regions which can be mapped at different address ranges (such as the MBAR and IPSBAR registers). We don't want to deal with this in the code when we are accessing these registers, so make all register definitions the absolute address - factoring out whether it is an offset into a peripheral region. This makes them all consistently defined, and reduces the occasional bugs caused by inconsistent definition of the register addresses. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * | | m68knommu: make ColdFire watchdog register definitions absolute addressesGreg Ungerer2012-09-277-17/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Make all definitions of the ColdFire Software watchdog registers absolute addresses. Currently some are relative to the MBAR peripheral region. The various ColdFire parts use different methods to address the internal registers, some are absolute, some are relative to peripheral regions which can be mapped at different address ranges (such as the MBAR and IPSBAR registers). We don't want to deal with this in the code when we are accessing these registers, so make all register definitions the absolute address - factoring out whether it is an offset into a peripheral region. This makes them all consistently defined, and reduces the occasional bugs caused by inconsistent definition of the register addresses. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * | | m68knommu: make ColdFire SYPCR and RSR register definitions absolute addressesGreg Ungerer2012-09-276-11/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Make all definitions of the ColdFire Reset and System registers absolute addresses. Currently some are relative to the MBAR peripheral region. The various ColdFire parts use different methods to address the internal registers, some are absolute, some are relative to peripheral regions which can be mapped at different address ranges (such as the MBAR and IPSBAR registers). We don't want to deal with this in the code when we are accessing these registers, so make all register definitions the abolsute address - factoring out whether it is an offset into a peripheral region. This makes them all consistently defined, and reduces the occasional bugs caused by inconsistent definition of the register addresses. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * | | m68knommu: make ColdFire IMR and IPR register definitions absolute addressesGreg Ungerer2012-09-277-31/+31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Make all definitions of the ColdFire Interrupt Mask and Pending registers absolute addresses. Currently some are relative to the MBAR peripheral region. The various ColdFire parts use different methods to address the internal registers, some are absolute, some are relative to peripheral regions which can be mapped at different address ranges (such as the MBAR and IPSBAR registers). We don't want to deal with this in the code when we are accessing these registers, so make all register definitions the absolute address - factoring out whether it is an offset into a peripheral region. This makes them all consistently defined, and reduces the occasional bugs caused by inconsistent definition of the register addresses. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * | | m68knommu: use "r", not "i" constraint in cacheflush asm'sPhilippe De Muyter2012-09-271-11/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Let the compiler choose which register to use in the cache flushing asm statements, instead of imposing %d0. Additionally, fix two typo's. Signed-off-by: Philippe De Muyter <phdm@macqel.be> Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * | | m68k: drop unused parts of 68VZ328 MakefilePaul Bolle2012-09-271-7/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | DRAGEN2 should obviously be CONFIG_DRAGEN2, but the screen.h entry it triggers only references files that are nowhere to be found in the current tree. Besides, nothing uses screen.h. So just drop all that. Signed-off-by: Paul Bolle <pebolle@tiscali.nl> Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* | | | Merge branch 'virtio-next' of ↵Linus Torvalds2012-10-0725-106/+1391
|\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/rusty/linux Pull virtio changes from Rusty Russell: "New workflow: same git trees pulled by linux-next get sent straight to Linus. Git is awkward at shuffling patches compared with quilt or mq, but that doesn't happen often once things get into my -next branch." * 'virtio-next' of git://git.kernel.org/pub/scm/linux/kernel/git/rusty/linux: (24 commits) lguest: fix occasional crash in example launcher. virtio-blk: Disable callback in virtblk_done() virtio_mmio: Don't attempt to create empty virtqueues virtio_mmio: fix off by one error allocating queue drivers/virtio/virtio_pci.c: fix error return code virtio: don't crash when device is buggy virtio: remove CONFIG_VIRTIO_RING virtio: add help to CONFIG_VIRTIO option. virtio: support reserved vqs virtio: introduce an API to set affinity for a virtqueue virtio-ring: move queue_index to vring_virtqueue virtio_balloon: not EXPERIMENTAL any more. virtio-balloon: dependency fix virtio-blk: fix NULL checking in virtblk_alloc_req() virtio-blk: Add REQ_FLUSH and REQ_FUA support to bio path virtio-blk: Add bio-based IO path for virtio-blk virtio: console: fix error handling in init() function tools: Fix pthread flag for Makefile of trace-agent used by virtio-trace tools: Add guest trace agent as a user tool virtio/console: Allocate scatterlist according to the current pipe size ...
| * | | | lguest: fix occasional crash in example launcher.Rusty Russell2012-10-041-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We usually got away with ->next on the final entry being NULL, but it finally bit me. Signed-off-by: Rusty Russell <rusty@rustcorp.com.au> Cc: stable@kernel.org
| * | | | virtio-blk: Disable callback in virtblk_done()Asias He2012-09-281-8/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reduces unnecessary interrupts that host could send to guest while guest is in the progress of irq handling. If one vcpu is handling the irq, while another interrupt comes, in handle_edge_irq(), the guest will mask the interrupt via mask_msi_irq() which is a very heavy operation that goes all the way down to host. Here are some performance numbers on qemu: Before: ------------------------------------- seq-read : io=0 B, bw=269730KB/s, iops=67432 , runt= 62200msec seq-write : io=0 B, bw=339716KB/s, iops=84929 , runt= 49386msec rand-read : io=0 B, bw=270435KB/s, iops=67608 , runt= 62038msec rand-write: io=0 B, bw=354436KB/s, iops=88608 , runt= 47335msec clat (usec): min=101 , max=138052 , avg=14822.09, stdev=11771.01 clat (usec): min=96 , max=81543 , avg=11798.94, stdev=7735.60 clat (usec): min=128 , max=140043 , avg=14835.85, stdev=11765.33 clat (usec): min=109 , max=147207 , avg=11337.09, stdev=5990.35 cpu : usr=15.93%, sys=60.37%, ctx=7764972, majf=0, minf=54 cpu : usr=32.73%, sys=120.49%, ctx=7372945, majf=0, minf=1 cpu : usr=18.84%, sys=58.18%, ctx=7775420, majf=0, minf=1 cpu : usr=24.20%, sys=59.85%, ctx=8307886, majf=0, minf=0 vdb: ios=8389107/8368136, merge=0/0, ticks=19457874/14616506, in_queue=34206098, util=99.68% 43: interrupt in total: 887320 fio --exec_prerun="echo 3 > /proc/sys/vm/drop_caches" --group_reporting --ioscheduler=noop --thread --bs=4k --size=512MB --direct=1 --numjobs=16 --ioengine=libaio --iodepth=64 --loops=3 --ramp_time=0 --filename=/dev/vdb --name=seq-read --stonewall --rw=read --name=seq-write --stonewall --rw=write --name=rnd-read --stonewall --rw=randread --name=rnd-write --stonewall --rw=randwrite After: ------------------------------------- seq-read : io=0 B, bw=309503KB/s, iops=77375 , runt= 54207msec seq-write : io=0 B, bw=448205KB/s, iops=112051 , runt= 37432msec rand-read : io=0 B, bw=311254KB/s, iops=77813 , runt= 53902msec rand-write: io=0 B, bw=377152KB/s, iops=94287 , runt= 44484msec clat (usec): min=81 , max=90588 , avg=12946.06, stdev=9085.94 clat (usec): min=57 , max=72264 , avg=8967.97, stdev=5951.04 clat (usec): min=29 , max=101046 , avg=12889.95, stdev=9067.91 clat (usec): min=52 , max=106152 , avg=10660.56, stdev=4778.19 cpu : usr=15.05%, sys=57.92%, ctx=7710941, majf=0, minf=54 cpu : usr=26.78%, sys=101.40%, ctx=7387891, majf=0, minf=2 cpu : usr=19.03%, sys=58.17%, ctx=7681976, majf=0, minf=8 cpu : usr=24.65%, sys=58.34%, ctx=8442632, majf=0, minf=4 vdb: ios=8389086/8361888, merge=0/0, ticks=17243780/12742010, in_queue=30078377, util=99.59% 43: interrupt in total: 1259639 fio --exec_prerun="echo 3 > /proc/sys/vm/drop_caches" --group_reporting --ioscheduler=noop --thread --bs=4k --size=512MB --direct=1 --numjobs=16 --ioengine=libaio --iodepth=64 --loops=3 --ramp_time=0 --filename=/dev/vdb --name=seq-read --stonewall --rw=read --name=seq-write --stonewall --rw=write --name=rnd-read --stonewall --rw=randread --name=rnd-write --stonewall --rw=randwrite Signed-off-by: Asias He <asias@redhat.com> Signed-off-by: Rusty Russell <rusty@rustcorp.com.au>
| * | | | virtio_mmio: Don't attempt to create empty virtqueuesBrian Foley2012-09-281-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If a virtio device reports a QueueNumMax of 0, vring_new_virtqueue() doesn't check this, and thanks to an unsigned (i < num - 1) loop guard, scribbles over memory when initialising the free list. Avoid by not trying to create zero-descriptor queues, as there's no way to do any I/O with one. Signed-off-by: Brian Foley <brian.foley@arm.com> Signed-off-by: Pawel Moll <pawel.moll@arm.com> Signed-off-by: Rusty Russell <rusty@rustcorp.com.au>
| * | | | virtio_mmio: fix off by one error allocating queueBrian Foley2012-09-281-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | vm_setup_vq fails to allow VirtQueues needing only 2 pages of storage, as it should. Found with a kernel using 64kB pages, but can be provoked if a virtio device reports QueueNumMax where the descriptor table and available ring fit in one page, and the used ring on the second (<= 227 descriptors with 4kB pages and <= 3640 with 64kB pages.) Signed-off-by: Brian Foley <brian.foley@arm.com> Signed-off-by: Pawel Moll <pawel.moll@arm.com> Signed-off-by: Rusty Russell <rusty@rustcorp.com.au>
| * | | | drivers/virtio/virtio_pci.c: fix error return codePeter Senna Tschudin2012-09-281-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Convert a nonnegative error return code to a negative one, as returned elsewhere in the function. A simplified version of the semantic match that finds this problem is as follows: (http://coccinelle.lip6.fr/) // <smpl> ( if@p1 (\(ret < 0\|ret != 0\)) { ... return ret; } | ret@p1 = 0 ) ... when != ret = e1 when != &ret *if(...) { ... when != ret = e2 when forall return ret; } // </smpl> Signed-off-by: Peter Senna Tschudin <peter.senna@gmail.com> Signed-off-by: Rusty Russell <rusty@rustcorp.com.au>
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