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* MN10300: Use clockevents_calc_mult_shift()Thomas Gleixner2011-03-183-26/+3
| | | | | | | | | | | Use clockevents_calc_mult_shift() instead of the homebrewn function in mn10300/kernel/time.c. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Acked-by: John Stultz <johnstul@us.ibm.com> Cc: Koichi Yasutake <yasutake.koichi@jp.panasonic.com> Cc: Mark Salter <msalter@redhat.com> Signed-off-by: David Howells <dhowells@redhat.com>
* MN10300: Use clocksource_register_hz()Thomas Gleixner2011-03-183-21/+1
| | | | | | | | | | | clocksource_register_hz() calculates the shift/mult pair for the clocksource. Remove the mn10300 duplicate implementation. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Acked-by: John Stultz <johnstul@us.ibm.com> Cc: Koichi Yasutake <yasutake.koichi@jp.panasonic.com> Cc: Mark Salter <msalter@redhat.com> Signed-off-by: David Howells <dhowells@redhat.com>
* MN10300: Remove stale codeThomas Gleixner2011-03-183-67/+2
| | | | | | | | | | | | mn10300 implements clocksource and clockevents and selects them unconditionally in Kconfig. Remove the stale code which seems to be a leftover of the conversion. Cleanup the configuration switches as well. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Acked-by: John Stultz <johnstul@us.ibm.com> Cc: Koichi Yasutake <yasutake.koichi@jp.panasonic.com> Cc: Mark Salter <msalter@redhat.com> Signed-off-by: David Howells <dhowells@redhat.com>
* Merge git://git.kernel.org/pub/scm/linux/kernel/git/cmetcalf/linux-tileLinus Torvalds2011-03-1758-1007/+1648
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * git://git.kernel.org/pub/scm/linux/kernel/git/cmetcalf/linux-tile: (27 commits) arch/tile: support newer binutils assembler shift semantics arch/tile: fix deadlock bugs in rwlock implementation drivers/edac: provide support for tile architecture tile on-chip network driver: sync up with latest fixes arch/tile: support 4KB page size as well as 64KB arch/tile: add some more VMSPLIT options and use consistent naming arch/tile: fix some comments and whitespace arch/tile: export some additional module symbols arch/tile: enhance existing finv_buffer_remote() routine arch/tile: fix two bugs in the backtracer code arch/tile: use extended assembly to inline __mb_incoherent() arch/tile: use a cleaner technique to enable interrupt for cpu_idle() arch/tile: sync up with <arch/sim.h> and <arch/sim_def.h> changes arch/tile: fix reversed test of strict_strtol() return value arch/tile: avoid a simulator warning during bootup arch/tile: export <asm/hardwall.h> to userspace arch/tile: warn and retry if an IPI is not accepted by the target cpu arch/tile: stop disabling INTCTRL_1 interrupts during hypervisor downcalls arch/tile: fix __ndelay etc to work better arch/tile: bug fix: exec'ed task thought it was still single-stepping ... Fix up trivial conflict in arch/tile/kernel/vmlinux.lds.S (percpu alignment vs section naming convention fix)
| * arch/tile: support newer binutils assembler shift semanticsChris Metcalf2011-03-173-9/+29
| | | | | | | | | | | | | | | | This change supports building the kernel with newer binutils where a shift of greater than the word size is no longer interpreted silently as modulo the word size, but instead generates a warning. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
| * Merge tag 'v2.6.38' of ↵Chris Metcalf2011-03-17545-2464/+4801
| |\ | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6 into for-linus
| * | arch/tile: fix deadlock bugs in rwlock implementationChris Metcalf2011-03-102-141/+103
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The first issue fixed in this patch is that pending rwlock write locks could lock out new readers; this could cause a deadlock if a read lock was held on cpu 1, a write lock was then attempted on cpu 2 and was pending, and cpu 1 was interrupted and attempted to re-acquire a read lock. The write lock code was modified to not lock out new readers. The second issue fixed is that there was a narrow race window where a tns instruction had been issued (setting the lock value to "1") and the store instruction to reset the lock value correctly had not yet been issued. In this case, if an interrupt occurred and the same cpu then tried to manipulate the lock, it would find the lock value set to "1" and spin forever, assuming some other cpu was partway through updating it. The fix is to enforce an interrupt critical section around the tns/store pair. In addition, this change now arranges to always validate that after a readlock we have not wrapped around the count of readers, which is only eight bits. Since these changes make the rwlock "fast path" code heavier weight, I decided to move all the rwlock code all out of line, leaving only the conventional spinlock code with fastpath inlines. Since the read_lock and read_trylock implementations ended up very similar, I just expressed read_lock in terms of read_trylock. As part of this change I also eliminate support for the now-obsolete tns_atomic mode. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
| * | drivers/edac: provide support for tile architectureChris Metcalf2011-03-107-2/+384
| | | | | | | | | | | | | | | | | | | | | | | | Add tile support for the EDAC driver, which provides unified system error (memory, PCI, etc.) reporting. For now, the TILEPro port reports memory correctable error (CE) only. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
| * | tile on-chip network driver: sync up with latest fixesChris Metcalf2011-03-101-446/+515
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Combine the "command" and "completion" locks into a single lock, on each egress queue, to improve efficiency. Support the use of 4KB pages in the "egress queue". Delete the unused "duplicate ACK compression" code. Filter "bad" (i.e. truncated) packets. Avoid corrupting "dev->napi_list", by sequentializing modifications. Deregister for incoming packets during stop, to reduce unexpected interrupts. Also, encourage active NAPI loops to complete before we disable NAPI, which would otherwise crash. Free any pending completions after shutting down LEPP. Use a single, permanently registered, IRQ handler, to avoid situations in which the IRQ handler was firing after being freed, and ignore any "unexpected" interrupts. Drop egress packets, instead of spinning, if the hardware cannot keep up, or is disconnected. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
| * | arch/tile: support 4KB page size as well as 64KBChris Metcalf2011-03-1018-135/+235
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Tilera architecture traditionally supports 64KB page sizes to improve TLB utilization and improve performance when the hardware is being used primarily to run a single application. For more generic server scenarios, it can be beneficial to run with 4KB page sizes, so this commit allows that to be specified (by modifying the arch/tile/include/hv/pagesize.h header). As part of this change, we also re-worked the PTE management slightly so that PTE writes all go through a __set_pte() function where we can do some additional validation. The set_pte_order() function was eliminated since the "order" argument wasn't being used. One bug uncovered was in the PCI DMA code, which wasn't properly flushing the specified range. This was benign with 64KB pages, but with 4KB pages we were getting some larger flushes wrong. The per-cpu memory reservation code also needed updating to conform with the newer percpu stuff; before it always chose 64KB, and that was always correct, but with 4KB granularity we now have to pay closer attention and reserve the amount of memory that will be requested when the percpu code starts allocating. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
| * | arch/tile: add some more VMSPLIT options and use consistent namingChris Metcalf2011-03-101-3/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This renames 3G_OPT to 2_75G, and adds 2_5G and 2_25G. For memory-intensive applications that are also network-buffer intensive it can be helpful to be able to tune the virtual address of the start of kernel memory. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
| * | arch/tile: fix some comments and whitespaceChris Metcalf2011-03-107-24/+15
| | | | | | | | | | | | | | | | | | | | | | | | This is a grab bag of changes with no actual change to generated code. This includes whitespace and comment typos, plus a couple of stale comments being removed. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
| * | arch/tile: export some additional module symbolsChris Metcalf2011-03-012-0/+8
| | | | | | | | | | | | | | | | | | | | | This adds a grab bag of symbols that have been missing for various modules. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
| * | arch/tile: enhance existing finv_buffer_remote() routineChris Metcalf2011-03-014-56/+141
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It now takes an additional argument so it can be used to flush-and-invalidate pages that are cached using hash-for-home as well those that are cached with coherence point on a single cpu. This allows it to be used more widely for changing the coherence point of arbitrary pages when necessary. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
| * | arch/tile: fix two bugs in the backtracer codeChris Metcalf2011-03-011-9/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The first is that we were using an incorrect hand-rolled variant of __kernel_text_address() which didn't handle module PCs. We now just use the standard API. The second was that we weren't accounting for the three-level page table when we were trying to pre-verify the addresses on the 64-bit TILE-Gx processor; we now do that correctly. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
| * | arch/tile: use extended assembly to inline __mb_incoherent()Chris Metcalf2011-03-014-41/+20
| | | | | | | | | | | | | | | | | | | | | This avoids having to maintain an additional separate assembly file, and of course the inline is slightly more efficient as well. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
| * | arch/tile: use a cleaner technique to enable interrupt for cpu_idle()Chris Metcalf2011-03-011-11/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Previously we used iret to atomically return to kernel PL with interrupts enabled. However, it turns out that we are architecturally guaranteed that we can just set and clear the "interrupt critical section" and only interrupt on the following instruction, so we now do that instead, since it's cleaner. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
| * | arch/tile: sync up with <arch/sim.h> and <arch/sim_def.h> changesChris Metcalf2011-03-012-12/+39
| | | | | | | | | | | | | | | | | | | | | | | | | | | These headers are used by Linux but are maintained upstream. This change incorporates a few minor fixes to these headers, including a new sim_print() function, cleaner support for the sim_syscall() API, and a sim_query_cpu_speed() method. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
| * | arch/tile: fix reversed test of strict_strtol() return valueChris Metcalf2011-03-011-1/+1
| | | | | | | | | | | | | | | | | | This fixes the "initfree" boot argument. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
| * | arch/tile: avoid a simulator warning during bootupChris Metcalf2011-03-011-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | As the added comment says, we can sometimes see a coherence warning from our simulator if the "swapper_pgprot" variable on the boot cpu has not been evicted from cache by the time the other cpus come up. Force it to be evicted so we never see the warning. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
| * | arch/tile: export <asm/hardwall.h> to userspaceChris Metcalf2011-03-011-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | This should have been as part of the initial hardwall submission to LKML but was overlooked. The header provides the ioctl definitions for manipulating the hardwall fd, so needs to be available to userspace. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
| * | arch/tile: warn and retry if an IPI is not accepted by the target cpuChris Metcalf2011-03-011-14/+19
| | | | | | | | | | | | | | | | | | | | | Previously we assumed this was impossible, but in fact it can happen. Handle it gracefully by retrying after issuing a warning. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
| * | arch/tile: stop disabling INTCTRL_1 interrupts during hypervisor downcallsChris Metcalf2011-03-011-49/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The problem was that this could lead to IPIs being disabled during the softirq processing after a hypervisor downcall (e.g. for I/O), since both IPI and device interrupts use the INCTRL_1 downcall mechanism. When this happened at the wrong time, it could lead to deadlock. Luckily, we were already maintaining the per-interrupt state we need, and using it in the proper way in the hypervisor, so all we had to do was to change Linux to stop blocking downcall interrupts for the entire length of the downcall. (Now they're blocked while we're executing the downcall routine itself, but not while we're executing any subsequent softirq routines.) The hypervisor is doing a very small amount of work it no longer needs to do (masking INTCTRL_1 on entry to the client interrupt routine), but doing so means that older versions of Tile Linux will continue to work with a current hypervisor, so that seems reasonable. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
| * | arch/tile: fix __ndelay etc to work betterChris Metcalf2011-03-015-11/+34
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current implementations of __ndelay and __udelay call a hypervisor service to delay, but the hypervisor service isn't actually implemented very well, and the consensus is that Linux should handle figuring this out natively and not use a hypervisor service. By converting nanoseconds to cycles, and then spinning until the cycle counter reaches the desired cycle, we get several benefits: first, we are sensitive to the actual clock speed; second, we use less power by issuing a slow SPR read once every six cycles while we delay; and third, we properly handle the case of an interrupt by exiting at the target time rather than after some number of cycles. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
| * | arch/tile: bug fix: exec'ed task thought it was still single-steppingChris Metcalf2011-03-013-2/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | To handle single-step, tile mmap's a page of memory in the process space for each thread and uses it to construct a version of the instruction that we want to single step. If the process exec's, though, we lose that mapping, and the kernel needs to be aware that it will need to recreate it if the exec'ed process than tries to single-step as well. Also correct some int32_t to s32 for better kernel style. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
| * | arch/tile: catch up with section naming convention in 2.6.35Chris Metcalf2011-03-015-10/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The convention changed to, e.g., ".data..page_aligned". This commit fixes the places in the tile architecture that were still using the old convention. One tile-specific section (.init.page) was dropped in favor of just using an "aligned" attribute. Sam Ravnborg <sam@ravnborg.org> pointed out __PAGE_ALIGNED_BSS, etc. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
| * | arch/tile: Fix atomic_read() definition to use ACCESS_ONCEChris Metcalf2011-02-251-1/+1
| | | | | | | | | | | | | | | | | | | | | This adds the volatile cast which forces the compiler to emit the load. Suggested by Peter Zijlstra <peterz@infradead.org>. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
| * | tile: Select GENERIC_HARDIRQS_NO_DEPRECATEDThomas Gleixner2011-02-231-0/+1
| | | | | | | | | | | | | | | | | | | | | irq chip converted and proper accessor functions used. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
| * | tile: Use proper accessor functions in show_interrupt()Thomas Gleixner2011-02-231-4/+6
| | | | | | | | | | | | | | | Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
| * | tile: Convert irq_chip to new functionsThomas Gleixner2011-02-231-14/+14
| | | | | | | | | | | | | | | Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
| * | tile: Fix __pte_free_tlbPeter Zijlstra2011-02-231-13/+2
| | | | | | | | | | | | | | | | | | | | | | | | Tile's __pte_free_tlb() implementation makes assumptions about the generic mmu_gather implementation, cure this ;-) Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl> Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
| * | Readme: Add architectureTracey Dent2011-02-231-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | Add Tilera Tile architecture to the list of the architectures that Linux at least runs on. Signed-off-by: Tracey Dent <tdent48227@gmail.com> Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
* | | Merge branch 'omap-for-linus' of ↵Linus Torvalds2011-03-17225-5068/+18848
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6 * 'omap-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6: (258 commits) omap: zoom: host should not pull up wl1271's irq line arm: plat-omap: iommu: fix request_mem_region() error path OMAP2+: Common CPU DIE ID reading code reads wrong registers for OMAP4430 omap4: mux: Remove duplicate mux modes omap: iovmm: don't check 'da' to set IOVMF_DA_FIXED flag omap: iovmm: disallow mapping NULL address when IOVMF_DA_ANON is set omap2+: mux: Fix compile when CONFIG_OMAP_MUX is not selected omap4: board-omap4panda: Initialise the serial pads omap3: board-3430sdp: Initialise the serial pads omap4: board-4430sdp: Initialise the serial pads omap2+: mux: Add macro for configuring static with omap_hwmod_mux_init omap2+: mux: Remove the use of IDLE flag omap2+: Add separate list for dynamic pads to mux perf: add OMAP support for the new power events OMAP4: Add IVA OPP enteries. OMAP4: Update Voltage Rail Values for MPU, IVA and CORE OMAP4: Enable 800 MHz and 1 GHz MPU-OPP OMAP3+: OPP: Replace voltage values with Macros OMAP3: wdtimer: Fix CORE idle transition Watchdog: omap_wdt: add fine grain runtime-pm ... Fix up various conflicts in - arch/arm/mach-omap2/board-omap3evm.c - arch/arm/mach-omap2/clock3xxx_data.c - arch/arm/mach-omap2/usb-musb.c - arch/arm/plat-omap/include/plat/usb.h - drivers/usb/musb/musb_core.h
| * \ \ Merge branches 'devel-mux' and 'devel-misc' into omap-for-linusTony Lindgren2011-03-146-25/+35
| |\ \ \
| | * | | omap: zoom: host should not pull up wl1271's irq lineOhad Ben-Cohen2011-03-141-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The wl1271's irq line is completely controlled by the 1271 device, and the host does not not need to pull it up. While there's no functional effect, letting the host pull this line up is just redundant, and wastes power. Signed-off-by: Ohad Ben-Cohen <ohad@wizery.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| | * | | arm: plat-omap: iommu: fix request_mem_region() error pathAaro Koskinen2011-03-141-6/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | request_mem_region() error exit will leak ioremapped memory. Fix this by moving the ioremap() after request_mem_region(), which is the proper order to do this anyway. Signed-off-by: Aaro Koskinen <aaro.koskinen@nokia.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| | * | | OMAP2+: Common CPU DIE ID reading code reads wrong registers for OMAP4430Andy Green2011-03-141-0/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adapts the register offsets used to read the CPU DIE ID registers when run on 44XX so they match what is in the OMAP4430 Reference Manual page 269 Signed-off-by: Andy Green <andy.green@linaro.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
| | * | | omap: iovmm: don't check 'da' to set IOVMF_DA_FIXED flagDavid Cohen2011-03-142-11/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently IOVMM driver sets IOVMF_DA_FIXED/IOVMF_DA_ANON flags according to input 'da' address when mapping memory: da == 0: IOVMF_DA_ANON da != 0: IOVMF_DA_FIXED It prevents IOMMU to map first page with fixed 'da'. To avoid such issue, IOVMM will not automatically set IOVMF_DA_FIXED. It should now come from the user throught 'flags' parameter when mapping memory. As IOVMF_DA_ANON and IOVMF_DA_FIXED are mutually exclusive, IOVMF_DA_ANON can be removed. The driver will now check internally if IOVMF_DA_FIXED is set or not. Signed-off-by: David Cohen <dacohen@gmail.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| | * | | omap: iovmm: disallow mapping NULL address when IOVMF_DA_ANON is setMichael Jones2011-03-141-6/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | commit c7f4ab26e3bcdaeb3e19ec658e3ad9092f1a6ceb allowed mapping the NULL address if da_start==0, which would then not get unmapped. Disallow this again if IOVMF_DA_ANON is set. And spell variable 'alignment' correctly. Signed-off-by: Michael Jones <michael.jones@matrix-vision.de> Signed-off-by: Tony Lindgren <tony@atomide.com>
| | * | | omap: Fix H4 init_irq to not call h4_init_flashTony Lindgren2011-03-101-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There should be no reason to call h4_init_flash this early. It causes problems as things are not yet initialized. Tested-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * | | | omap4: mux: Remove duplicate mux modesTony Lindgren2011-03-141-276/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove duplicate mux modes to make the binary smaller: text data bss dec hex filename 9378 24472 0 33850 843a mux44xx.o 9378 19104 0 28482 6f42 mux44xx.o Cc: Benoit Cousson <b-cousson@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * | | | omap2+: mux: Fix compile when CONFIG_OMAP_MUX is not selectedTony Lindgren2011-03-113-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix compile when CONFIG_OMAP_MUX is not selected Signed-off-by: Tony Lindgren <tony@atomide.com>
| * | | | omap4: board-omap4panda: Initialise the serial padsR Sricharan2011-03-111-1/+68
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use the mux framework to initialise the serial pads. Signed-off-by: sricharan <r.sricharan@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * | | | omap3: board-3430sdp: Initialise the serial padsR Sricharan2011-03-111-1/+101
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use the mux framework to initialise the serial pads. Signed-off-by: sricharan <r.sricharan@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * | | | omap4: board-4430sdp: Initialise the serial padsR Sricharan2011-03-111-2/+69
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use the mux framework to initialise the serial pads. Signed-off-by: sricharan <r.sricharan@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * | | | omap2+: mux: Add macro for configuring static with omap_hwmod_mux_initTony Lindgren2011-03-111-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add macro for defining static pins in the board file. We can now start implementing pin multiplexing in the platform init code for devices that call omap_hwmod_mux_init. Currently that is only implemented for serial.c. Signed-off-by: Tony Lindgren <tony@atomide.com>
| * | | | omap2+: mux: Remove the use of IDLE flagR Sricharan2011-03-112-13/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently OMAP_DEVICE_PAD_IDLE flag is used to mux pins dynamically. This can be simplified by using the enabled state variable of each pad. This also fixes the issue of the static pads not getting muxed after idling and disable/enable state transitions. Signed-off-by: sricharan <r.sricharan@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * | | | omap2+: Add separate list for dynamic pads to muxTony Lindgren2011-03-114-16/+83
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This avoids going through the list unnecessarily when idling devices for runtime PM. Based on an earlier patch by sricharan <r.sricharan@ti.com>. Signed-off-by: sricharan <r.sricharan@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * | | | Merge branch 'for_2.6.39/pm-integration' of ↵Tony Lindgren2011-03-115-44/+84
| |\ \ \ \ | | | | | | | | | | | | | | | | | | ssh://master.kernel.org/pub/scm/linux/kernel/git/khilman/linux-omap-pm into omap-for-linus
| | * | | | perf: add OMAP support for the new power eventsJean Pihet2011-03-113-5/+39
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The patch adds the new power management trace points for the OMAP architecture. The trace points are for: - default idle handler. Since the cpuidle framework is instrumented in the generic way there is no need to add trace points in the OMAP specific cpuidle handler; - SoC clocks changes (enable, disable, set_rate), - power domain states: the desired target state and -if different- the actually hit state. Because of the generic nature of the changes, OMAP3 and OMAP4 are supported. Tested on OMAP3 with suspend/resume, cpuidle, basic DVFS. Signed-off-by: Jean Pihet <j-pihet@ti.com> Acked-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
generated by cgit v1.2.3 (git 2.25.1) at 2025-01-24 08:25:23 +0000