| Commit message (Collapse) | Author | Age | Files | Lines |
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There is no need to init .owner field.
Based on the patch from Peter Griffin <peter.griffin@linaro.org>
"mmc: remove .owner field for drivers using module_platform_driver"
This patch removes the superflous .owner field for drivers which
use the module_platform_driver API, as this is overriden in
platform_driver_register anyway."
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
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'spi/topic/rspi', 'spi/topic/sh-msiof' and 'spi/topic/sirf' into spi-next
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let "#define" statement keep same indentation. the old code layout is
pretty ugly.
Signed-off-by: Qipan Li <Qipan.Li@csr.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
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unify 'cmd_transfer' like 'pio_transfer' and 'dma_transfer' as void
function, and also change left_rx_word according to transfer result.
Signed-off-by: Qipan Li <Qipan.Li@csr.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
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the old codes check the cs-gpios, if the gpio number is 0 like:
<&gpio, 0, 0>, the driver will use the only hardware chipselect.
this is wrong because of_spi_register_master() can read property
cs-gpios from device node and set the spi master's cs number and
gpio cs automatically based on whether the cs-gpios is valid.
this patch fixes the beviour of CSR spi driver and move to a core
level supported way.
Signed-off-by: Qipan Li <Qipan.Li@csr.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
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Add support for MSIOF in:
- r8a7792 (R-Car V2H)
- r8a7793 (R-Car M2-N)
- r8a7794 (R-Car E2)
r8a7791 is now called "R-Car M2-W".
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Mark Brown <broonie@linaro.org>
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Fix tx/rx mixup, which broke transmit-only transfers.
Introduced by commit 4240305f7cbdc7782aa8bc40cc702775d9ac0839
("spi: sh-msiof: Fix leaking of unused DMA descriptors").
Reported-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
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Reported-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
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Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Mark Brown <broonie@linaro.org>
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The new Renesas R-Car Gen2 DMA Controller driver (rcar-dmac) requires
explicit configuration of the DMA slave bus width.
Hardcode the DMA transfer size to 4 bytes, as MSIOF DMA is limited to
32-bit words.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Mark Brown <broonie@linaro.org>
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Add support for QSPI in:
- r8a7792 (R-Car V2H)
- r8a7793 (R-Car M2-N)
- r8a7794 (R-Car E2)
r8a7791 is now called "R-Car M2-W".
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Mark Brown <broonie@linaro.org>
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Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Mark Brown <broonie@linaro.org>
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The new Renesas R-Car Gen2 DMA Controller driver (rcar-dmac) requires
explicit configuration of the DMA slave bus width.
Hardcode the DMA transfer size to 1 byte for both directions, as that's
the only supported configuration (16-bit DMA support was removed in
commit 9c5de2c1754c2bb3c69c4d7bf0d0edc0a61d8232 ("spi: rspi: Remove
unused 16-bit DMA support")).
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Mark Brown <broonie@linaro.org>
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Use the devm_kasprintf() helper function instead of open coding
error-prone buffer handling and string formatting.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Mark Brown <broonie@linaro.org>
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Introduced by commit 426ef76dd8a394a0e04d096941cd9acb49539a3e ("spi:
rspi: Add DT support").
Reported-by: kbuild test robot <fengguang.wu@intel.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Mark Brown <broonie@linaro.org>
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There is no need to unset driver data pointer at removal stage.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
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SPI PXA2XX core layer has dependency on common clock framework
to obtain information on host supported clock rate. Thus, we
setup the clock device in the PCI glue layer to enable PCI mode
host pass in the clock rate information.
Signed-off-by: Chew, Chiau Ee <chiau.ee.chew@intel.com>
Acked-by: Kweh, Hock Leong <hock.leong.kweh@intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
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Add support for a extended PL022 which has an extra register for controlling up
to five chip select signals. This controller is found on the AXM5516 SoC.
Unfortunately the PrimeCell identification registers are identical to a
standard ARM PL022. To work around this, the peripheral ID must be overridden
in the device tree using the "arm,primecell-periphid" property with the value
0x000b6022.
Signed-off-by: Anders Berg <anders.berg@avagotech.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Mark Brown <broonie@kernel.org>
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Currently this driver is missing a check on the return value of devm_kzalloc,
which would cause a NULL pointer dereference in a OOM situation.
This patch adds a missing check.
Signed-off-by: Kiran Padwal <kiran.padwal@smartplayin.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
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'spi/topic/mxs', 'spi/topic/omap-100k' and 'spi/topic/orion' into spi-next
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The Armada SoC family implementation of this SPI hardware module has
extended the configuration register to allow for a wider range of SPI
clock rates. Specifically the Serial Baud Rate Pre-selection bits in the
SPI Interface Configuration Register now also use bits 6 and 7 as well.
Modify the baud rate calculation to handle these differences for the
Armada case. Potentially a baud rate can be setup using a number of
different pre-scalar and scalar combinations. This code tries all
possible pre-scalar divisors (8 in total) to try and find the most
accurate set.
This change introduces (and documents) a new device tree compatible
device name "armada-370-spi" to support this.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Tested-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Reviewed-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
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Remove unused definition which cause the following warnings
drivers/spi/spi-omap-100k.c:73:0: warning: "WRITE" redefined [enabled by default]
include/linux/fs.h:193:0: note: this is the location of the previous definition
drivers/spi/spi-omap-100k.c:74:0: warning: "READ" redefined [enabled by default]
include/linux/fs.h:192:0: note: this is the location of the previous definition
Signed-off-by: Nick Krause <xerofoiffy@gmail.com>
Acked-by: Geert Uytterhoeven <geert@linux-m68k.org>
Signed-off-by: Mark Brown <broonie@linaro.org>
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Signed-off-by: Michael Heimpold <mhei@heimpold.de>
Signed-off-by: Mark Brown <broonie@kernel.org>
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Enable DMA support on i.mx6. The read speed can increase from 600KB/s
to 1.2MB/s on i.mx6q. You can disable or enable dma function in dts.
If not set "dma-names" in dts, spi will use PIO mode. This patch only
validate on i.mx6, not i.mx5, but encourage ones to apply this patch
on i.mx5 since they share the same IP.
Note:
Sometime, there is a weid data in rxfifo after one full tx/rx
transfer finish by DMA on i.mx6dl, so we disable dma functhion on
i.mx6dl.
Signed-off-by: Frank Li <Frank.Li@freescale.com>
Signed-off-by: Robin Gong <b38343@freescale.com>
Acked-by: Marek Vasut <marex@denx.de>
Signed-off-by: Mark Brown <broonie@kernel.org>
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Remove the probe info message which also has wrong output. No need to add
KERN_INFO to pr_info. Output was:
6Freescale DSPI master initialized
Signed-off-by: Alexander Stein <alexander.stein@systec-electronic.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
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git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regmap into spi-fsl-dspi
regmap: Device tree endianness support
This adds generic support for specifying endianess for register map in
the DT.
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Split regmap_get_endian() in two functions, regmap_get_reg_endian() and
regmap_get_val_endian().
This allows to:
- Get rid of the three switch()es on "type", incl. error handling in
three "default" cases,
- Get rid of the regmap_endian_type enum,
- Get rid of the non-NULL check of "config" (regmap_init() already
checks for that),
- Get rid of the "endian" output parameters, and just return the
regmap_endian enum value, as the functions can no longer fail.
This saves 21 lines of code (despite the still-present
one-comment-per-line over-documentation), and 30 bytes of code on ARM
V7.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
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Commit d647c199510c ("regmap: add DT endianness binding support") had
some issues. Commit ba1b53feb8ca ("regmap: Fix DT endianess parsing
logic") fixed the main problem. This patch fixes the other.
Specifically, restore the overall default of REGMAP_ENDIAN_BIG if none of
the config, DT, or the bus specify any endianness. Without this,
of_regmap_get_endian() could return REGMAP_ENDIAN_DEFAULT, which the
calling code can't handle. Since all busses do specify an endianness in
the current code, this makes no difference right now, but I saw no
justification in the patch description for removing this final default.
Also, clean up the code a bit:
* s/of_regmap_get_endian/regmap_get_endian/ since the function isn't DT-
specific, even if the reason it was originally added was to add some
DT-specific features.
* After potentially reading an endianess specification from DT, the code
checks whether DT did specify an endianness, and if so, returns it. Move
this test outside the whole switch statement so that if the
REGMAP_ENDIAN_REG case ever modifies *endian, this check will pick that
up. This partially reverts part of commit ba1b53feb8ca ("regmap: Fix DT
endianess parsing logic"), while maintaining the bug-fix that commit
made to this code.
* Make the comments briefer, and only refer to the specific action taken
at their location. This makes most of the comments independent of DT,
and easier to follow.
Cc: Xiubo Li <Li.Xiubo@freescale.com>
Cc: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Cc: Thierry Reding <treding@nvidia.com>
Fixes: d647c199510c ("regmap: add DT endianness binding support")
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
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Commit d647c199510c ("regmap: add DT endianness binding support.")
added support to parse the device endianness from the device tree
but unfortunately the added logic doesn't have the same semantics
than the old code. This leads to a NULL dereference pointer error
when these properties are not provided by the Device Tree:
Unable to handle kernel NULL pointer dereference at virtual address 00000044
pgd = c0004000
[00000044] *pgd=00000000
Internal error: Oops: 5 [#1] PREEMPT SMP ARM
Modules linked in:
CPU: 5 PID: 1 Comm: swapper/0 Not tainted 3.17.0-rc1-next-20140818ccu #671
task: ea412800 ti: ea484000 task.ti: ea484000
PC is at regmap_update_bits+0xc/0x5c
The problem is that platforms that rely on the default value now
gets different values due two related issues in the current code:
a) It only parses the endianness from DT for the regmap registers
and not for the regmap values but it checks unconditionally in
both cases if the resulting endiannes is REGMAP_ENDIAN_NATIVE.
b) REGMAP_ENDIAN_NATIVE is not even a valid DT property according
to the regmap DT binding documentation so it shouldn't be set.
Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Signed-off-by: Mark Brown <broonie@linaro.org>
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Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com>
Acked-by: Chao Fu <b44548@freescale.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
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git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regmap into spi-fsl-dspi
regmap: Device tree endianness support
This adds generic support for specifying endianess for register map in
the DT.
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Device-Tree binding for device endianness
Index Device Endianness properties
---------------------------------------------------
1 BE 'big-endian'
2 LE 'little-endian'
For one device driver, which will run in different scenarios above
on different SoCs using the devicetree, we need one way to simplify
this.
Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
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For many drivers which will support rich endianness of Devices
need define DT properties by itself with the binding support.
The endianness using regmap:
Index Device Properties if needs bytes-swap,
or just ignore it
-------------------------------------------------------------
1 BE 'big-endian'
2 LE 'little-endian'
The properties include all the register values and the buffers.
And these properties are very usful for the MMIO devices:
Such as: a memory-mapped device, on one SoC is in BE mode, while
in another SoC will be in LE mode, and the CPU will always in LE
mode.
For the first case, we must use cpu_to_be32/be32_to_cpu for
32-bit registers accessing, so the 'big-endian' property is needed.
For the second case, we can just ignore the bytes-swap
functions like cpu_to_le32/le32_to_cpu, so the 'little-endian'
property could be abscent.
And vice versa...
Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
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'spi/topic/dw' and 'spi/topic/fsl' into spi-next
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Sort all the include headers alphabetically for the freescale
spi drivers. If the inlcude headers sorted out of order, maybe
the best logical choice is to append new ones after the exist
ones, while this may create a lot of potential for duplicates
and conflicts for each diffenent changes will add new headers
in the same location.
Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
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Though intel-mid-dma does not follow a new DMA workflow (*) let's prepare SPI
DW driver for that.
(*) The client is obliged to call dma_async_issue_pending() which starts the
actual transfers. Old DMA drivers do not follow this, since requirement was
introduced in the discussion of [1].
[1] http://www.spinics.net/lists/arm-kernel/msg125987.html
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
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Instead of direct dereference to dmaengine callbacks we are going to use
DMAengine wrappers.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
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Instead of using magic numbers in the code we create a bit map definition of
the DMACR register and use it.
There is no functional change.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
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Make comments be surrounded by spaces and move part of code to one line where
it suits 80 characters.
There is no functional changes.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
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For testing purposes it's good to have a loopback mode enabled. The patch adds
necessary bits for that.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
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Do full clean up at exit, means terminate all ongoing DMA transfers.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Cc: stable@vger.kernel.org
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In case of 8 bit mode and DMA usage we end up with every second byte written as
0. We have to respect bits_per_word settings what this patch actually does.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Cc: stable@vger.kernel.org
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Since driver is used on other platforms and debugfs stuff would be useful there
as well let's substitute mrst_ by dw_ where it suits. Additionally let's use
SPI master device name when print registers dump.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
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git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi into spi-dw
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The FSF address is subject to change, thus remove it from the file. While here,
update a copyright line.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
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Instead of using that member we prefer to use dma_dev which represents actual
struct device of the DMA device.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
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The support of the Moorestown was removed [1] from kernel long time ago. This
is just a follow up of that change.
[1] http://www.spinics.net/lists/platform-driver-x86/msg02948.html
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
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If the driver was compiled with DMA support, but DMA channels weren't acquired
by some reason, mid_spi_dma_exit() will crash the kernel.
Fixes: 7063c0d942a1 (spi/dw_spi: add DMA support)
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
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There is no need to keep FSF address in the head of the file. While here, fix
few typos in the header.
There is no functional change.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
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