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* Merge tag 'drm-intel-fixes-2014-08-08' of ↵Linus Torvalds2014-08-0819-102/+310
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://anongit.freedesktop.org/drm-intel Pull intel drm fixes from Daniel Vetter: "So I heard that proper pull requests have a revert on top ;-) So here we go with my usual mid-merge-window pile of fixes. [ Ed. This revert thing had better not become the "in" thing ] Big fix is the duct-tape for ring init on g4x platforms, we seem to have found the magic again to make those machines as happy as before (not perfect though unfortunately, but that was never the case). Otherwise fixes all over: - tune down some overzealous debug output - VDD power sequencing fix after resume - bunch of dsi fixes for baytrail among them hw state checker de-noising - bunch of error state capture fixes for bdw - misc tiny fixes/workarounds for various platforms Last minute rebase was to kick out two patches that shouldn't have been in here - they're for the state checker, so 0 functional code affected. Jani's back from vacation, so he'll take over -fixes from here" * tag 'drm-intel-fixes-2014-08-08' of git://anongit.freedesktop.org/drm-intel: (21 commits) Revert "drm/i915: Enable semaphores on BDW" drm/i915: read HEAD register back in init_ring_common() to enforce ordering drm/i915: Fix crash when failing to parse MIPI VBT drm/i915: Bring GPU Freq to min while suspending. drm/i915: Fix DEIER and GTIER collecting for BDW. drm/i915: Don't accumulate hangcheck score on forward progress drm/i915: Add the WaCsStallBeforeStateCacheInvalidate:bdw workaround. drm/i915: Refactor Broadwell PIPE_CONTROL emission into a helper. drm/i915: Fix threshold for choosing 32 vs. 64 precisions for VLV DDL values drm/i915: Fix drain latency precision multipler for VLV drm/i915: Collect gtier properly on HSW. drm/i915: Tune down MCH_SSKPD values warning drm/i915: Tune done rc6 enabling output drm/i915: Don't require dev->struct_mutex in psr_match_conditions drm/i915: Fix error state collecting drm/i915: fix VDD state tracking after system resume drm/i915: Add correct hw/sw config check for DSI encoder drm/i915: factor out intel_edp_panel_vdd_sanitize drm/i915: wait for all DSI FIFOs to be empty drm/i915: work around warning in i915_gem_gtt ...
| * Revert "drm/i915: Enable semaphores on BDW"Rodrigo Vivi2014-08-081-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit 521e62e49a42661a4ee0102644517dbe2f100a23. Although POST_SYNC brought a bit of stability to Semaphores on BDW it didn't solved all issues and some hungs can still occour when semaphores are enabled on BDW. Also some sloweness can be found on some igt tests, althoguth it apparently doesn't affect real workloads. Besides that, no real performance gain was found on our tests with different and even multiple workloads. Let's disable it again for now. At least until we are sure it is safe to re-enable it. Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
| * drm/i915: read HEAD register back in init_ring_common() to enforce orderingJiri Kosina2014-08-081-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Withtout this, ring initialization fails reliabily during resume with [drm:init_ring_common] *ERROR* render ring initialization failed ctl 0001f001 head ffffff8804 tail 00000000 start 000e4000 This is not a complete fix, but it is verified to make the ring initialization failures during resume much less likely. We were not able to root-cause this bug (likely HW-specific to Gen4 chips) yet. This is therefore used as a ducttape before problem is fully understood and proper fix created, so that people don't suffer from completely unusable systems in the meantime. The discussion and debugging is happening at https://bugs.freedesktop.org/show_bug.cgi?id=76554 Signed-off-by: Jiri Kosina <jkosina@suse.cz> Cc: stable@vger.kernel.org Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
| * drm/i915: Fix crash when failing to parse MIPI VBTRafael Barbalho2014-08-081-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This particular nasty presented itself while trying to register the intelfb device (intel_fbdev.c). During the process of registering the device the driver will disable the crtc via i9xx_crtc_disable. These will also disable the panel using the generic mipi panel functions in dsi_mod_vbt_generic.c. The stale MIPI generic data sequence pointers would cause a crash within those functions. However, all of this is happening while console_lock is held from do_register_framebuffer inside fbcon.c. Which means that you got kernel log and just the device appearing to reboot/hang for no apparent reason. The fault started from the FB_EVENT_FB_REGISTERED event using the fb_notifier_call_chain call in fbcon.c. This regression has been introduced in commit d3b542fcfc72d7724585e3fd2c5e75351bc3df47 Author: Shobhit Kumar <shobhit.kumar@intel.com> Date: Mon Apr 14 11:00:34 2014 +0530 drm/i915: Add parsing support for new MIPI blocks in VBT Cc: Shobhit Kumar <shobhit.kumar@intel.com> Signed-off-by: Rafael Barbalho <rafael.barbalho@intel.com> Reviewed-by: Shobhit Kumar <shobhit.kumar@intel.com> [danvet: Add regression citation.] Cc: stable@vger.kernel.org Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
| * drm/i915: Bring GPU Freq to min while suspending.Deepak S2014-08-071-1/+1
| | | | | | | | | | | | | | | | | | We might be leaving the PGU Frequency (and thus vnn) high during the suspend. Flusing the delayed work queue should take care of this. Signed-off-by: Deepak S <deepak.s@linux.intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
| * drm/i915: Fix DEIER and GTIER collecting for BDW.Rodrigo Vivi2014-08-072-6/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | BDW has many other Display Engine interrupts and GT interrupts registers. Collecting it properly on gpu_error_state. On debugfs all was properly listed already but besides we were also listing old DEIER and GTIER that doesn't exist on BDW anymore. This was causing unclaimed register messages v2: Fix small issues of first version and don't read DEIER regs when pipe's power well is disabled v3: bikeshed accepted: use enum pipe pipe instead of int i for pipe interection v4: Ben notice previous version was checking for display_power_enabled without using propper locks. Using _unlocked version isn't reliable and we cannot get this registers when power well is off. So let's avoid getting all DE_IER per pipe for now. If someone think this is an useful information it can be added later. v5: Ben: put back debugfs stuff that might be coverred by pm_get and use gen >= 8 trying to predict future. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=81701 Cc: Ben Widawsky <ben@bwidawsk.net> Cc: Paulo Zanoni <paulo.r.zanoni@intel.com> Reviewed-by: Ben Widawsky <ben@bwidawsk.net> Reviewed-by: (v3) Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
| * drm/i915: Don't accumulate hangcheck score on forward progressMika Kuoppala2014-08-073-3/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If the actual head has progressed forward inside a batch (request), don't accumulate hangcheck score. As the hangcheck score in increased only by acthd jumping backwards, the result is that we only declare an active batch as stuck if it is trapped inside a loop. Or that the looping will dominate the batch progression so that it overcomes the bonus that forward progress gives. v2: Improved commit message (Chris Wilson) Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com> [danvet: s/active_loop/active (loop)/ as requested by Chris.] Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
| * drm/i915: Add the WaCsStallBeforeStateCacheInvalidate:bdw workaround.Kenneth Graunke2014-08-071-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | On Broadwell, any PIPE_CONTROL with the "State Cache Invalidate" bit set must be preceded by a PIPE_CONTROL with the "CS Stall" bit set. Documented on the BSpec 3D workarounds page. Reviewed-by: Rafael Barbalho <rafael.barbalho@intel.com> Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> [vsyrjala: add chv w/a note too] Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
| * drm/i915: Refactor Broadwell PIPE_CONTROL emission into a helper.Kenneth Graunke2014-08-071-15/+22
| | | | | | | | | | | | | | | | | | We'll want to reuse this for a workaround. Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org> [danvet: Rmove now unused int.] Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
| * drm/i915: Fix threshold for choosing 32 vs. 64 precisions for VLV DDL valuesVille Syrjälä2014-08-071-5/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The DDL registers can hold 7bit numbers. Make the most of those seven bits by adjusting the threshold where we switch between the 64 vs. 32 precision multipliers. Also we compute 'entries' to make the decision about precision, and then we recompute the same value to calculate the actual drain latency. Just use the already calculate 'entries' there. Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
| * drm/i915: Fix drain latency precision multipler for VLVZhenyu Wang2014-08-072-31/+31
| | | | | | | | | | | | Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
| * drm/i915: Collect gtier properly on HSW.Rodrigo Vivi2014-08-072-10/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | GTIER and DEIER doesn't have same interface on HSW so this "or" operation makes the information provided useless. v2: since we have gtier variable already let's split for everybody and avoid the strange | op. Also avoid overriding the value that was set for vlv. In this case I believe that we should reorganize the whole function, but I'll respect the comment that ask to not touch the order and let this organization work to be done later. v3: moving VLV check to the right place. Cc: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
| * drm/i915: Tune down MCH_SSKPD values warningDaniel Vetter2014-08-071-5/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | Users often can't do anything about this since their vendors stopped providing BIOS updates. Also we seem to be able to hack around it with increased latency values, and thus far the only reports have been for screens with really high resolutions. So tune it down to a level where only developers can see it. Also drop some of the end-user fluff. Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
| * drm/i915: Tune done rc6 enabling outputDaniel Vetter2014-08-071-6/+6
| | | | | | | | | | | | | | | | | | | | Power users spot this and then get adventurous and try to adjust module driver options. Nothing good ever came out of that, so hide it better. Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
| * drm/i915: Don't require dev->struct_mutex in psr_match_conditionsDaniel Vetter2014-08-071-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | Since I've reworked psr support to no longer require x-tiling we don't check any state protected by the Giant GEM Lock. So drop that check. Also boo for lockdep_assert_held for not yelling when lockdep is disabled. Cc: Paulo Zanoni <przanoni@gmail.com> Reported-by: Paulo Zanoni <przanoni@gmail.com> Acked-by: Paulo Zanoni <przanoni@gmail.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
| * drm/i915: Fix error state collectingRodrigo Vivi2014-08-071-1/+2
| | | | | | | | | | | | | | | | Fix signal_offset when recording semaphore state on BDW. Reviewed-by: Ben Widawsky <ben@bwidawsk.net> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
| * drm/i915: fix VDD state tracking after system resumeImre Deak2014-08-071-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Just like during booting the BIOS can leave the VDD bit enabled after system resume. So apply the same state sanitization there too. This fixes a problem where after resume the port power domain refcount gets unbalanced. v2: - unchanged v3: - call edp sanitizing from the encoder reset handler (Daniel) Reported-and-tested-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Imre Deak <imre.deak@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
| * drm/i915: Add correct hw/sw config check for DSI encoderShobhit Kumar2014-08-074-1/+106
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Check in vlv_crtc_clock_get if DPLL is enabled before calling dpio read. It will not be enabled for DSI and avoid dpio read WARN dumps. Absence of ->get_config was causing other WARN dumps as well. Update dpll_hw_state as well correctly v2: Address review comments by Daniel - Check if DPLL is enabled rather than checking pipe output type - set adjusted_mode->flags to 0 in compute_config rather than using pipe_config->quirks - Add helper function in intel_dsi_pll.c and use that in intel_dsi.c - updated dpll_hw_state correctly - Updated commit message and title v3: Address review comments by Imre - Proper masking of P1, M1 fields while computing divisors - assert in case of bpp mismatch - guard for divide by 0 while computing pclk - Use ARRAY_SIZE instead of direct calculation Signed-off-by: Shobhit Kumar <shobhit.kumar@intel.com> Reviewed-by: Imre Deak <imre.deak@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
| * drm/i915: factor out intel_edp_panel_vdd_sanitizeImre Deak2014-08-072-17/+44
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This will be needed by an upcoming patch too that needs to sanitize the VDD state during resume. The additional async disabling is only needed for the resume path, here it doesn't make a difference since we enable VDD right after the sanitize call. v2: - don't set intel_dp ptr for non-eDP encoders (Ville) Signed-off-by: Imre Deak <imre.deak@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
| * drm/i915: wait for all DSI FIFOs to be emptyShobhit Kumar2014-08-073-0/+25
| | | | | | | | | | | | | | | | | | Ensure that the DSI packets for a particular sequence are completely sent before going ahead in the enabling or disabling of the panel Signed-off-by: Shobhit Kumar <shobhit.kumar@intel.com> Reviewed-by: Imre Deak <imre.deak@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
| * drm/i915: work around warning in i915_gem_gttPavel Machek2014-08-071-5/+6
| | | | | | | | | | | | | | | | | | | | | | | | Gcc warns that addr might be used uninitialized. It may not, but I see why gcc gets confused. Additionally, hiding code with side-effects inside WARN_ON() argument seems uncool, so I moved it outside. Signed-off-by: Pavel Machek <pavel@ucw.cz> [danvet: Add obligatory /* shuts up gcc */ comment.] Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
| * drm/i915: Update DRIVER_DATE to 20140725Daniel Vetter2014-08-051-1/+1
| | | | | | | | Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
* | Merge branch 'drm-next' of git://people.freedesktop.org/~airlied/linuxLinus Torvalds2014-08-07348-7461/+26631
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull DRM updates from Dave Airlie: "Like all good pull reqs this ends with a revert, so it must mean we tested it, [ Ed. That's _one_ way of looking at it ] This pull is missing nouveau, Ben has been stuck trying to track down a very longstanding bug that revealed itself due to some other changes. I've asked him to send you a direct pull request for nouveau once he cleans things up. I'm away until Monday so don't want to delay things, you can make a decision on that when he sends it, I have my phone so I can ack things just not really merge much. It has one trivial conflict with your tree in armada_drv.c, and also the pull request contains some component changes that are already in your tree, the base tree from Russell went via Greg's tree already, but some stuff still shows up in here that doesn't when I merge my tree into yours. Otherwise all pretty standard graphics fare, one new driver and changes all over the place. New drivers: - sti kms driver for STMicroelectronics chipsets stih416 and stih407. core: - lots of cleanups to the drm core - DP MST helper code merged - universal cursor planes. - render nodes enabled by default panel: - better panel interfaces - new panel support - non-continuous cock advertising ability ttm: - shrinker fixes i915: - hopefully ditched UMS support - runtime pm fixes - psr tracking and locking - now enabled by default - userptr fixes - backlight brightness fixes - MST support merged - runtime PM for dpms - primary planes locking fixes - gen8 hw semaphore support - fbc fixes - runtime PM on SOix sleep state hw. - mmio base page flipping - lots of vlv/chv fixes. - universal cursor planes radeon: - Hawaii fixes - display scalar support for non-fixed mode displays - new firmware format support - dpm on more asics by default - GPUVM improvements - uncached and wc GTT buffers - BOs > visible VRAM exynos: - i80 interface support - module auto-loading - ipp driver consolidated. armada: - irq handling in crtc layer only - crtc renumbering - add component support - DT interaction changes. tegra: - load as module fixes - eDP bpp and sync polarity fixed - DSI non-continuous clock mode support - better support for importing buffers from nouveau msm: - mdp5/adq8084 v1.3 hw enablement - devicetree clk changse - ifc6410 board working tda998x: - component support - DT documentation update vmwgfx: - fix compat shader namespace" * 'drm-next' of git://people.freedesktop.org/~airlied/linux: (551 commits) Revert "drm: drop redundant drm_file->is_master" drm/panel: simple: Use devm_gpiod_get_optional() drm/dsi: Replace upcasting macro by function drm/panel: ld9040: Replace upcasting macro by function drm/exynos: dp: Modify driver to support drm_panel drm/exynos: Move DP setup into commit() drm/panel: simple: Add AUO B133HTN01 panel support drm/panel: simple: Support delays in panel functions drm/panel: simple: Add proper definition for prepare and unprepare drm/panel: s6e8aa0: Add proper definition for prepare and unprepare drm/panel: ld9040: Add proper definition for prepare and unprepare drm/tegra: Add support for panel prepare and unprepare routines drm/exynos: dsi: Add support for panel prepare and unprepare routines drm/exynos: dpi: Add support for panel prepare and unprepare routines drm/panel: simple: Add dummy prepare and unprepare routines drm/panel: s6e8aa0: Add dummy prepare and unprepare routines drm/panel: ld9040: Add dummy prepare and unprepare routines drm/panel: Provide convenience wrapper for .get_modes() drm/panel: add .prepare() and .unprepare() functions drm/panel: simple: Remove simple-panel compatible ...
| * | Revert "drm: drop redundant drm_file->is_master"Dave Airlie2014-08-089-27/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit 48ba813701eb14b3008edefef4a0789b328e278c. Thanks to Chris: "drm_file->is_master is not synomous with having drm_file->master == drm_file->minor->master. This is because drm_file->master is the same for all drm_files of the same generation and so when there is a master, every drm_file believes itself to be the master. Confusion ensues and things go pear shaped when one file is closed and there is no master anymore." Conflicts: drivers/gpu/drm/drm_drv.c drivers/gpu/drm/drm_stub.c
| * | Merge tag 'drm/tegra/for-3.17-rc1' of ↵Dave Airlie2014-08-0716-67/+425
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://anongit.freedesktop.org/tegra/linux into drm-next drm/tegra: Changes for v3.17-rc1 Mostly some cleanup all over the place. Pitch alignment limitations of the display controller are now honored and job submission is 64-bit safe. The SOR output (used for eDP) properly configures sync signal polarities according to the display mode rather than hard-coding them to some value and the number of bits per color is now taken from the panel rather than hard-coded to properly support 24-bit vs. 18-bit panels. The DSI controller now properly supports non-continuous clock mode. GEM objects can now have their flags and tiling mode modified via IOCTLs to allow buffers imported from Nouveau to be properly displayed. Newer generations of the Tegra display controller can also detile block linear buffers at scan-out time. Finally the driver now properly exports MODULE_DEVICE_TABLEs to allow it to be automatically loaded when built as a module. * tag 'drm/tegra/for-3.17-rc1' of git://anongit.freedesktop.org/tegra/linux: drm/tegra: add MODULE_DEVICE_TABLEs drm/tegra: dc - Reset controller on driver remove drm/tegra: Properly align stride for framebuffers drm/tegra: sor - Configure proper sync polarities drm/tegra: sor - Use bits-per-color from panel drm/tegra: Make job submission 64-bit safe drm/tegra: Allow non-authenticated processes to create buffer objects drm/tegra: Add SET/GET_FLAGS IOCTLs drm/tegra: Add SET/GET_TILING IOCTLs drm/tegra: Implement more tiling modes drm/tegra: dsi - Handle non-continuous clock flag drm/tegra: sor - missing unlock on error
| | * | drm/tegra: add MODULE_DEVICE_TABLEsStephen Warren2014-08-047-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When tegra-drm.ko is built as a module, these MODULE_DEVICE_TABLEs allow the module to be auto-loaded since the module will match the devices instantiated from device tree. (Notes for stable: in 3.14+, just git rm any conflicting file, since they are added in later kernels. For 3.13 and below, manual merging will be needed) Cc: <stable@vger.kernel.org> Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
| | * | drm/tegra: dc - Reset controller on driver removeThierry Reding2014-08-041-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since the device will no longer be used, may as well keep it in reset to potentially save some power and make sure it is in a clean state the next time it's probed. Signed-off-by: Thierry Reding <treding@nvidia.com>
| | * | drm/tegra: Properly align stride for framebuffersThierry Reding2014-08-044-1/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Tegra20 and Tegra30 both required the buffer line stride to be aligned on 8 byte boundaries. Tegra114 and Tegra124 increased the alignment to 64 bytes. Introduce a parameter to specify the alignment requirements for each display controller and round up the pitch of newly allocated framebuffers appropriately. Originally-by: Stéphane Marchesin <marcheu@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
| | * | drm/tegra: sor - Configure proper sync polaritiesThierry Reding2014-08-041-3/+13
| | | | | | | | | | | | | | | | | | | | | | | | Program the sync signal polarities according to the display mode. Signed-off-by: Thierry Reding <treding@nvidia.com>
| | * | drm/tegra: sor - Use bits-per-color from panelStéphane Marchesin2014-08-041-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This change uses the value of bits-per-color from panel to remove one more hardcoded value. Signed-off-by: Stéphane Marchesin <marcheu@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
| | * | drm/tegra: Make job submission 64-bit safeThierry Reding2014-08-043-35/+64
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Job submission currently relies on the fact that struct drm_tegra_reloc and struct host1x_reloc are the same size and uses a simple call to the copy_from_user() function to copy them to kernel space. This causes the handle to be stored in the buffer object field, which then needs a cast to a 32 bit integer to resolve it to a proper buffer object pointer and store it back in the buffer object field. On 64-bit architectures that will no longer work, since pointers are 64 bits wide whereas handles will remain 32 bits. This causes the sizes of both structures to because different and copying will no longer work. Fix this by adding a new function, host1x_reloc_get_user(), that copies the structures field by field. While at it, use substructures for the command and target buffers in struct host1x_reloc for better readability. Also use unsized types to make it more obvious that this isn't part of userspace ABI. Signed-off-by: Thierry Reding <treding@nvidia.com>
| | * | drm/tegra: Allow non-authenticated processes to create buffer objectsThierry Reding2014-08-041-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This matches what other drivers do for equivalent IOCTLs. Reviewed-by: Stéphane Marchesin <marcheu@chromium.org> Tested-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
| | * | drm/tegra: Add SET/GET_FLAGS IOCTLsThierry Reding2014-08-042-0/+70
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The DRM_TEGRA_GEM_SET_FLAGS IOCTL can be used to set the flags of a buffer object after it has been allocated or imported. Flags associated with a buffer object can be queried using the DRM_TEGRA_GEM_GET_FLAGS IOCTL. Reviewed-by: Stéphane Marchesin <marcheu@chromium.org> Tested-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
| | * | drm/tegra: Add SET/GET_TILING IOCTLsThierry Reding2014-08-042-0/+120
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently the tiling parameters of buffer objects can only be set at allocation time, and only a single tiled mode is supported. This new DRM_TEGRA_GEM_SET_TILING IOCTL allows more modes to be set and also allows the tiling mode to be changed after the allocation. This will enable the Tegra DRM driver to import buffers from a GPU and directly scan them out by configuring the display controller appropriately. To complement this, the DRM_TEGRA_GEM_GET_TILING IOCTL can query the current tiling mode of a buffer object. This is necessary when importing buffers via handle (as is done in Mesa for example) so that userspace can determine the proper parameters for the 2D or 3D engines. Reviewed-by: Stéphane Marchesin <marcheu@chromium.org> Tested-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
| | * | drm/tegra: Implement more tiling modesThierry Reding2014-08-046-24/+118
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Tegra124 supports a block-linear mode in addition to the regular pitch linear and tiled modes. Add support for these by moving the internal representation into a structure rather than a simple flag. Tested-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
| | * | drm/tegra: dsi - Handle non-continuous clock flagAlexandre Courbot2014-08-041-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Handle the MIPI_DSI_CLOCK_NONCONTINUOUS flag and only set TX-only clock behavior when this flag is present to allow panels requiring continuous clock mode to operate with this driver. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
| | * | drm/tegra: sor - missing unlock on errorDan Carpenter2014-08-041-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | We should unlock before returning the error code. Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
| | * | Merge branch 'drm/dsi/for-next' into drm/tegra/for-nextThierry Reding2014-08-041-0/+2
| | |\ \ | | | | | | | | | | | | | | | | | | | | * drm/dsi/for-next: drm/dsi: Flag for non-continuous clock behavior
| * | \ \ Merge tag 'drm/panel/for-3.17-rc1' of ↵Dave Airlie2014-08-0717-73/+447
| |\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://anongit.freedesktop.org/tegra/linux into drm-next drm/panel: Changes for v3.17-rc1 Panels can now be more finely controlled via .prepare() and .unprepare() callbacks in addition to .enable() and .disable(). New kerneldoc details what they are supposed to do and when they should be called. The simple panel driver gained support for a couple of new panels and it is now possible to specify additional delays during power up and power down sequences if panels require it. DSI devices can now advertise that they support non-continuous clock mode which will allow DSI host controllers to disable the high speed clock after transmissions to save power. * tag 'drm/panel/for-3.17-rc1' of git://anongit.freedesktop.org/tegra/linux: (30 commits) drm/panel: simple: Use devm_gpiod_get_optional() drm/dsi: Replace upcasting macro by function drm/panel: ld9040: Replace upcasting macro by function drm/exynos: dp: Modify driver to support drm_panel drm/exynos: Move DP setup into commit() drm/panel: simple: Add AUO B133HTN01 panel support drm/panel: simple: Support delays in panel functions drm/panel: simple: Add proper definition for prepare and unprepare drm/panel: s6e8aa0: Add proper definition for prepare and unprepare drm/panel: ld9040: Add proper definition for prepare and unprepare drm/tegra: Add support for panel prepare and unprepare routines drm/exynos: dsi: Add support for panel prepare and unprepare routines drm/exynos: dpi: Add support for panel prepare and unprepare routines drm/panel: simple: Add dummy prepare and unprepare routines drm/panel: s6e8aa0: Add dummy prepare and unprepare routines drm/panel: ld9040: Add dummy prepare and unprepare routines drm/panel: Provide convenience wrapper for .get_modes() drm/panel: add .prepare() and .unprepare() functions drm/panel: simple: Remove simple-panel compatible drm/panel: simple: Add Innolux N116BGE panel support ...
| | * | | | drm/panel: simple: Use devm_gpiod_get_optional()Alexandre Courbot2014-08-071-7/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use the new devm_gpiod_get_optional() to simplify the probe code. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
| | * | | | drm/dsi: Replace upcasting macro by functionThierry Reding2014-08-061-2/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Using a function instead of a macro provides proper type checking. Signed-off-by: Thierry Reding <treding@nvidia.com>
| | * | | | drm/panel: ld9040: Replace upcasting macro by functionThierry Reding2014-08-061-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Using a function instead of a macro provides proper type checking. Signed-off-by: Thierry Reding <treding@nvidia.com>
| | * | | | drm/exynos: dp: Modify driver to support drm_panelAjay Kumar2014-08-063-21/+71
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add drm_panel controls to support powerup/down of the eDP panel, if one is present at the sink side. Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Acked-by: Inki Dae <inki.dae@samsung.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
| | * | | | drm/exynos: Move DP setup into commit()Ajay Kumar2014-08-061-5/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add commit callback for exynos_dp, and move the DP link training, video configuration code from the hotplug handler into commit(). Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Acked-by: Inki Dae <inki.dae@samsung.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
| | * | | | drm/panel: simple: Add AUO B133HTN01 panel supportAjay Kumar2014-08-062-0/+37
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The AUO B133HTN01 is a 13.6" FHD TFT LCD panel connecting to an eDP interface and with an integrated LED backlight unit. This panel is used on the Samsung Chromebook 2 (XE503C32). Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
| | * | | | drm/panel: simple: Support delays in panel functionsAjay Kumar2014-08-061-0/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For most of the panels, we need to provide delays during various stages of panel power up and power down. Add a structure to hold those delay values and use them in corresponding functions. Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
| | * | | | drm/panel: simple: Add proper definition for prepare and unprepareAjay Kumar2014-08-061-10/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move out code from enable and disable routines to prepare and unprepare routines, so that functionality is properly distributed across all the panel functions. Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
| | * | | | drm/panel: s6e8aa0: Add proper definition for prepare and unprepareAjay Kumar2014-08-061-11/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move out code from enable and disable routines to prepare and unprepare routines, so that functionality is properly distributed across all the panel functions. Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
| | * | | | drm/panel: ld9040: Add proper definition for prepare and unprepareAjay Kumar2014-08-061-11/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move out code from enable and disable routines to prepare and unprepare routines, so that functionality is properly distributed across all the panel functions. Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
| | * | | | drm/tegra: Add support for panel prepare and unprepare routinesAjay Kumar2014-08-061-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Modify tegra output driver to support the new panel calls: prepare and unprepare. Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
generated by cgit v1.2.3 (git 2.25.1) at 2024-12-18 11:31:29 +0000