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* Merge branch 'linux-next' of ↵Linus Torvalds2011-07-29120-215/+294
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci-2.6 * 'linux-next' of git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci-2.6: PCI: remove printks about disabled bridge windows PCI: fold pci_calc_resource_flags() into decode_bar() PCI: treat mem BAR type "11" (reserved) as 32-bit, not 64-bit, BAR PCI: correct pcie_set_readrq write size PCI: pciehp: change wait time for valid configuration access x86/PCI: Preserve existing pci=bfsort whitelist for Dell systems PCI: ARI is a PCIe v2 feature x86/PCI: quirks: Use pci_dev->revision PCI: Make the struct pci_dev * argument of pci_fixup_irqs const. PCI hotplug: cpqphp: use pci_dev->vendor PCI hotplug: cpqphp: use pci_dev->subsystem_{vendor|device} x86/PCI: config space accessor functions should not ignore the segment argument PCI: Assign values to 'pci_obff_signal_type' enumeration constants x86/PCI: reduce severity of host bridge window conflict warnings PCI: enumerate the PCI device only removed out PCI hieratchy of OS when re-scanning PCI PCI: PCIe AER: add aer_recover_queue x86/PCI: select direct access mode for mmconfig option PCI hotplug: Rename is_ejectable which also exists in dock.c
| * PCI: remove printks about disabled bridge windowsBjorn Helgaas2011-07-222-15/+0
| | | | | | | | | | | | | | | | I don't think there's enough value in the fact of a bridge window being disabled to justify cluttering the dmesg log with it. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
| * PCI: fold pci_calc_resource_flags() into decode_bar()Bjorn Helgaas2011-07-222-30/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | decode_bar() and pci_calc_resource_flags() both looked at the PCI BAR type information, and it's simpler to just do it all in one place. decode_bar() sets IORESOURCE_IO, IORESOURCE_MEM, and IORESOURCE_MEM_64 as appropriate, so res->flags contains all the information pci_bar_type does, so we don't need to test the pci_bar_type return value. decode_bar() used to return pci_bar_type, which we no longer need. We can simplify it a bit by returning the struct resource flags rather than updating them internally. In pci_update_resource(), there's no need to decode the BAR type bits again; we can just test for IORESOURCE_MEM_64 directly. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
| * PCI: treat mem BAR type "11" (reserved) as 32-bit, not 64-bit, BARBjorn Helgaas2011-07-221-3/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This fixes a minor regression where broken PCI devices that use the reserved "11" memory BAR type worked before e354597cce but not after. The low four bits of a memory BAR are "PTT0" where P=1 for prefetchable BARs, and TT is as follows: 00 32-bit BAR, anywhere in lower 4GB 01 anywhere below 1MB (reserved as of PCI 2.2) 10 64-bit BAR 11 reserved Prior to e354597cce, we treated "0100" as a 64-bit BAR and all others, including prefetchable 64-bit BARs ("1100") as 32-bit BARs. The e354597cce fix, which appeared in 2.6.28, treats "x1x0" as 64-bit BARs, so the reserved "x110" types are treated as 64-bit instead of 32-bit. This patch returns to treating the reserved "11" type as a 32-bit BAR and adds a warning if we see it. It also logs a note if we see a 1M BAR. This is not a warning, because such hardware conforms to pre-PCI 2.2 spec, but I think it's worth noting because Linux ignores the 1M restriction if it ever has to assign the BAR. CC: Peter Chubb <peterc@gelato.unsw.edu.au> Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=35952 Reported-by: Jan Zwiegers <jan@radicalsystems.co.za> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
| * PCI: correct pcie_set_readrq write sizeJon Mason2011-07-221-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | When setting the PCI-E MRRS, pcie_set_readrq queries the current settings via a pci_read_config_word call but writes the modified result via a pci_write_config_dword. This results in writing 16 more bits than were queried. Also, the function description comment is slightly incorrect. Signed-off-by: Jon Mason <jdmason@kudzu.us> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
| * PCI: pciehp: change wait time for valid configuration accessKenji Kaneshige2011-07-222-9/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Naoki Yanagimoto reported that configuration read on some hot-added PCIe device returns invalid value. This patch fixes this problem. According to the PCIe spec, software must wait for at least 1 second to judge if the hot-added device is broken after Data Link Layer State Changed Event. This patch changes pciehp driver to wait for 1 second after the Data Link Layer State Changed Event is detected before initiating a configuration access instead of 100 ms. Signed-off-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Tested-by: Naoki Yanagimoto <yanagimoto@np.css.fujitsu.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
| * x86/PCI: Preserve existing pci=bfsort whitelist for Dell systemsNarendra_K@Dell.com2011-07-221-7/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 6e8af08dfa40b747002207d3ce8e8b43a050d99f enables pci=bfsort on future Dell systems. But the identification string 'Dell System' matches on already existing whitelist, which do not have SMBIOS type 0xB1, causing pci=bfsort not being set on existing whitelist. This patch fixes the regression by moving the type 0xB1 check beyond the existing whitelist so that existing whitelist is walked before. Signed-off-by: Shyam Iyer <shyam_iyer@dell.com> Signed-off-by: Narendra K <narendra_k@dell.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
| * PCI: ARI is a PCIe v2 featureChris Wright2011-07-221-1/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The function pci_enable_ari() may mistakenly set the downstream port of a v1 PCIe switch in ARI Forwarding mode. This is a PCIe v2 feature, and with an SR-IOV device on that switch port believing the switch above is ARI capable it may attempt to use functions 8-255, translating into invalid (non-zero) device numbers for that bus. This has been seen to cause Completion Timeouts and general misbehaviour including hangs and panics. Cc: stable@kernel.org Acked-by: Don Dutile <ddutile@redhat.com> Tested-by: Don Dutile <ddutile@redhat.com> Signed-off-by: Chris Wright <chrisw@sous-sol.org> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
| * x86/PCI: quirks: Use pci_dev->revisiontip-bot for Sergei Shtylyov2011-07-221-3/+2
| | | | | | | | | | | | | | | | | | | | | | | | This code uses PCI_CLASS_REVISION instead of PCI_REVISION_ID, so it wasn't converted by commit 44c10138fd4bbc ("PCI: Change all drivers to use pci_device->revision") before being moved to arch/x86/... Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Cc: Dave Jones <davej@redhat.com> Link: http://lkml.kernel.org/r/201107111901.39281.sshtylyov@ru.mvista.com Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
| * PCI: Make the struct pci_dev * argument of pci_fixup_irqs const.Ralf Baechle2011-07-22101-113/+130
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Aside of the usual motivation for constification, this function has a history of being abused a hook for interrupt and other fixups so I turned this function const ages ago in the MIPS code but it should be done treewide. Due to function pointer passing in varous places a few other functions had to be constified as well. Signed-off-by: Ralf Baechle <ralf@linux-mips.org> To: Anton Vorontsov <avorontsov@mvista.com> To: Chris Metcalf <cmetcalf@tilera.com> To: Colin Cross <ccross@android.com> Acked-by: "David S. Miller" <davem@davemloft.net> To: Eric Miao <eric.y.miao@gmail.com> To: Erik Gilling <konkers@android.com> Acked-by: Guan Xuetao <gxt@mprc.pku.edu.cn> To: "H. Peter Anvin" <hpa@zytor.com> To: Imre Kaloz <kaloz@openwrt.org> To: Ingo Molnar <mingo@redhat.com> To: Ivan Kokshaysky <ink@jurassic.park.msu.ru> To: Jesse Barnes <jbarnes@virtuousgeek.org> To: Krzysztof Halasa <khc@pm.waw.pl> To: Lennert Buytenhek <kernel@wantstofly.org> To: Matt Turner <mattst88@gmail.com> To: Nicolas Pitre <nico@fluxnic.net> To: Olof Johansson <olof@lixom.net> Acked-by: Paul Mundt <lethal@linux-sh.org> To: Richard Henderson <rth@twiddle.net> To: Russell King <linux@arm.linux.org.uk> To: Thomas Gleixner <tglx@linutronix.de> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: linux-alpha@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Cc: linux-mips@linux-mips.org Cc: linux-pci@vger.kernel.org Cc: linux-sh@vger.kernel.org Cc: linux-tegra@vger.kernel.org Cc: sparclinux@vger.kernel.org Cc: x86@kernel.org Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
| * PCI hotplug: cpqphp: use pci_dev->vendorSergei Shtylyov2011-07-221-2/+3
| | | | | | | | | | | | | | | | The driver reads PCI vendor ID from the PCI configuration register while it is already stored by the PCI subsystem in the 'vendor' field of 'struct pci_dev'... Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
| * PCI hotplug: cpqphp: use pci_dev->subsystem_{vendor|device}Sergei Shtylyov2011-07-221-10/+2
| | | | | | | | | | | | | | | | | | The driver reads PCI subsystem IDs from the PCI configuration registers while they are already stored by the PCI subsystem in the 'subsystem_{vendor|device}' fields of 'struct pci_dev'... Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
| * x86/PCI: config space accessor functions should not ignore the segment argumentJan Beulich2011-07-225-2/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Without this change, the majority of the raw PCI config space access functions silently ignore a non-zero segment argument, which is certainly wrong. Apart from pci_direct_conf1, all other non-MMCFG access methods get used only for non-extended accesses (i.e. assigned to raw_pci_ops only). Consequently, with the way raw_pci_{read,write}() work, it would be a coding error to call these functions with a non-zero segment (with the current call flow this cannot happen afaict). The access method 1 accessor, as it can be used for extended accesses (on AMD systems) instead gets checks added for the passed in segment to be zero. This would be the case when on such a system having multiple PCI segments (don't know whether any exist in practice) MMCFG for some reason is not usable, and method 1 gets selected for doing extended accesses. Rather than accessing the wrong device's config space, the function will now error out. v2: Convert BUG_ON() to WARN_ON(), and extend description as per Ingo's request. Signed-off-by: Jan Beulich <jbeulich@novell.com> Reviewed-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
| * PCI: Assign values to 'pci_obff_signal_type' enumeration constantsMyron Stowe2011-07-221-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | 'pci_obff_signal_type' is passed between drivers and the kernel API. This patch explicitly assigns values to the enumeration type's constants which aids in detecting any future changes or additions that would break the kernel's ABI. No functional change. Signed-off-by: Myron Stowe <myron.stowe@redhat.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
| * x86/PCI: reduce severity of host bridge window conflict warningsBjorn Helgaas2011-07-221-4/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Host bridge windows are top-level resources, so if we find a host bridge window conflict, it's probably with a hard-coded legacy reservation. Moving host bridge windows is theoretically possible, but we don't support it; we just ignore windows with conflicts, and it's not worth making this a user-visible error. Reported-and-tested-by: Jools Wills <jools@oxfordinspire.co.uk> References: https://bugzilla.kernel.org/show_bug.cgi?id=38522 Reported-by: Das <dasfox@gmail.com> References: https://bugzilla.kernel.org/show_bug.cgi?id=16497 Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
| * PCI: enumerate the PCI device only removed out PCI hieratchy of OS when ↵Tiejun Chen2011-07-221-6/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | re-scanning PCI When hot-plugging a root bridge, we always prevent assigning a bus number that already exists. This makes sure we don't step over an existing bus. But sometimes we only remove PCI device in PCI hieratchy of OS, i,e. echo 1 > /sys/bus/pci/devices/.../remove but actually don't hotplug this device out the platform, so in this case we still should re-scan this bus to enumerate this device when re-scanning PCI again. Signed-off-by: Tiejun Chen <tiejun.chen@windriver.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
| * PCI: PCIe AER: add aer_recover_queueHuang Ying2011-07-223-8/+74
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In addition to native PCIe AER, now APEI (ACPI Platform Error Interface) GHES (Generic Hardware Error Source) can be used to report PCIe AER errors too. To add support to APEI GHES PCIe AER recovery, aer_recover_queue is added to export the recovery function in native PCIe AER driver. Recoverable PCIe AER errors are reported via NMI in APEI GHES. Then APEI GHES uses irq_work to delay the error processing into an IRQ handler. But PCIe AER recovery can be very time-consuming, so aer_recover_queue, which can be used in IRQ handler, delays the real recovery action into the process context, that is, work queue. Signed-off-by: Huang Ying <ying.huang@intel.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
| * x86/PCI: select direct access mode for mmconfig optionShaohua Li2011-07-221-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | Direct access is needed in mmconf mode too. There are two reasons: 1. we need it to access first 256 bytes. We have bug before that using mmconf to access pci config space hangs system (when resizing BARs), so we use type1 config for legacy config space. 2. when doing mmconfg bar checking, we need access ACPI _CRS, which might access PCI config space. Signed-off-by: Shaohua Li <shaohua.li@intel.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
| * PCI hotplug: Rename is_ejectable which also exists in dock.cThomas Renninger2011-07-221-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | While it's declared static, etags points you to the wrong function in drivers/acpi/dock.c and acpiphp_glue.c for example also makes use of some (exported..) functions from this file. If you trust etags and oversee the static declaration (what happened to me) one gets totally confused... Signed-off-by: Thomas Renninger <trenn@suse.de> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* | Merge branch 'upstream/xen-tracing2' of ↵Linus Torvalds2011-07-292-1/+5
|\ \ | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/jeremy/xen * 'upstream/xen-tracing2' of git://git.kernel.org/pub/scm/linux/kernel/git/jeremy/xen: xen/tracing: fix compile errors when tracing is disabled.
| * | xen/tracing: fix compile errors when tracing is disabled.Jeremy Fitzhardinge2011-07-252-1/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When CONFIG_FUNCTION_TRACER is disabled, compilation fails as follows: CC arch/x86/xen/setup.o In file included from arch/x86/include/asm/xen/hypercall.h:42, from arch/x86/xen/setup.c:19: include/trace/events/xen.h:31: warning: 'struct multicall_entry' declared inside parameter list include/trace/events/xen.h:31: warning: its scope is only this definition or declaration, which is probably not what you want include/trace/events/xen.h:31: warning: 'struct multicall_entry' declared inside parameter list include/trace/events/xen.h:31: warning: 'struct multicall_entry' declared inside parameter list include/trace/events/xen.h:31: warning: 'struct multicall_entry' declared inside parameter list [...] arch/x86/xen/trace.c:5: error: '__HYPERVISOR_set_trap_table' undeclared here (not in a function) arch/x86/xen/trace.c:5: error: array index in initializer not of integer type arch/x86/xen/trace.c:5: error: (near initialization for 'xen_hypercall_names') arch/x86/xen/trace.c:6: error: '__HYPERVISOR_mmu_update' undeclared here (not in a function) arch/x86/xen/trace.c:6: error: array index in initializer not of integer type arch/x86/xen/trace.c:6: error: (near initialization for 'xen_hypercall_names') Fix this by making sure struct multicall_entry has a declaration in scope at all times, and don't bother compiling xen/trace.c when tracing is disabled. Reported-by: Randy Dunlap <rdunlap@xenotime.net> Signed-off-by: Jeremy Fitzhardinge <jeremy.fitzhardinge@citrix.com>
* | | Merge branch 'at91/cleanup' of ↵Linus Torvalds2011-07-2958-745/+696
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/linux-arm-soc * 'at91/cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/linux-arm-soc: at91: add arch specific ioremap support at91: factorize sram init at91: move register clocks to soc generic init at91: move clock subsystem init to soc generic init at91: use structure to store the current soc at91: remove AT91_DBGU offset from dbgu register macro at91: factorize at91 interrupts init to soc at91: introduce commom AT91_BASE_SYS
| * | | at91: add arch specific ioremap supportJean-Christophe PLAGNIOL-VILLARD2011-07-282-1/+29
| | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
| * | | at91: factorize sram initJean-Christophe PLAGNIOL-VILLARD2011-07-289-115/+39
| | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
| * | | at91: move register clocks to soc generic initJean-Christophe PLAGNIOL-VILLARD2011-07-289-21/+11
| | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
| * | | at91: move clock subsystem init to soc generic initJean-Christophe PLAGNIOL-VILLARD2011-07-2810-31/+18
| | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
| * | | at91: use structure to store the current socJean-Christophe PLAGNIOL-VILLARD2011-07-2810-120/+341
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | instead of reading the registers everytime the current implementation respect the following constrain: - allow 1 to n soc to be enabled - allow to have a virtual cpu type and subtype - always detect the cpu type and subtype and report it - detect if the soc support is enabled - prepare for sysfs export support - drop soc specific code via compiler when the soc not enabled (via cpu_is_xxx) Today if we read the exid we will have the same value for 9g35 and 9m11 and we will need to check the cidr too with the new implementation we just need to check the soc subtype this will also allow to have specific virtual subtype for rm9200 which the board will have to specify via at91rm9200_set_type(int) as we have no way to detect it. this implementation is inspired by the SH cpu detection support Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
| * | | at91: remove AT91_DBGU offset from dbgu register macroJean-Christophe PLAGNIOL-VILLARD2011-07-285-25/+28
| | | | | | | | | | | | | | | | | | | | | | | | to make the soc base specified at runtime instead of compiled time Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * | | at91: factorize at91 interrupts init to socJean-Christophe PLAGNIOL-VILLARD2011-07-2845-322/+61
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | they are the same except the default priority Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
| * | | at91: introduce commom AT91_BASE_SYSJean-Christophe PLAGNIOL-VILLARD2011-07-2854-173/+232
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On all at91 except rm9200 and x40 have the System Controller starts at address 0xffffc000 and has a size of 16KiB. On rm9200 it's start at 0xfffe4000 of 111KiB with non reserved data starting at 0xfffff000 This patch removes the individual definitions of AT91_BASE_SYS and replaces them with a common version at base 0xfffffc000 and size 16KiB and map the same memory space Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
* | | | Merge branch 'next/dt' of ↵Linus Torvalds2011-07-2972-281/+1963
|\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/linux-arm-soc * 'next/dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/linux-arm-soc: (21 commits) arm/dt: tegra devicetree support arm/versatile: Add device tree support dt/irq: add irq_domain_generate_simple() helper irq: add irq_domain translation infrastructure dmaengine: imx-sdma: add device tree probe support dmaengine: imx-sdma: sdma_get_firmware does not need to copy fw_name dmaengine: imx-sdma: use platform_device_id to identify sdma version mmc: sdhci-esdhc-imx: add device tree probe support mmc: sdhci-pltfm: dt device does not pass parent to sdhci_alloc_host mmc: sdhci-esdhc-imx: get rid of the uses of cpu_is_mx() mmc: sdhci-esdhc-imx: do not reference platform data after probe mmc: sdhci-esdhc-imx: extend card_detect and write_protect support for mx5 net/fec: add device tree probe support net: ibm_newemac: convert it to use of_get_phy_mode dt/net: add helper function of_get_phy_mode net/fec: gasket needs to be enabled for some i.mx serial/imx: add device tree probe support serial/imx: get rid of the uses of cpu_is_mx1() arm/dt: Add dtb make rule arm/dt: Add skeleton dtsi file ...
| * \ \ \ Merge branch 'imx/dt' into next/dtArnd Bergmann2011-07-283540-226301/+120807
| |\ \ \ \
| | * | | | dmaengine: imx-sdma: add device tree probe supportShawn Guo2011-07-272-3/+56
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It adds device tree probe support for imx-sdma driver. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Cc: Grant Likely <grant.likely@secretlab.ca> Cc: Vinod Koul <vinod.koul@intel.com> Cc: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Vinod Koul <vinod.koul@intel.com>
| | * | | | dmaengine: imx-sdma: sdma_get_firmware does not need to copy fw_nameShawn Guo2011-07-271-10/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It does not need to allocate space and copy fw_name in function sdma_get_firmware(). Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Cc: Vinod Koul <vinod.koul@intel.com> Cc: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Vinod Koul <vinod.koul@intel.com>
| | * | | | dmaengine: imx-sdma: use platform_device_id to identify sdma versionShawn Guo2011-07-2713-31/+51
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It might be not good to use software defined version to identify sdma device type, when hardware does not define such version. Instead, soc name is stable enough to define the device type. The patch uses platform_device_id rather than version number passed by platform data to identify sdma device type/version. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Cc: Vinod Koul <vinod.koul@intel.com> Cc: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Grant Likely <grant.likely@secretlab.ca> Acked-by: Vinod Koul <vinod.koul@intel.com>
| | * | | | mmc: sdhci-esdhc-imx: add device tree probe supportShawn Guo2011-07-272-9/+103
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The patch adds device tree probe support for sdhci-esdhc-imx driver. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Cc: Wolfram Sang <w.sang@pengutronix.de> Cc: Chris Ball <cjb@laptop.org> Cc: Grant Likely <grant.likely@secretlab.ca> Acked-by: Grant Likely <grant.likely@secretlab.ca> Acked-by: Chris Ball <cjb@laptop.org>
| | * | | | mmc: sdhci-pltfm: dt device does not pass parent to sdhci_alloc_hostShawn Guo2011-07-271-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Neither platform based nor dt based device needs to pass the parent to sdhci_alloc_host. There is no difference between platform and dt on this point. The patch makes the change to pass device itself than its parent to sdhci_alloc_host for dt case too. Otherwise the probe function of sdhci based drivers which is shared between platform and dt will fail on dt case. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Cc: Chris Ball <cjb@laptop.org> Acked-by: Grant Likely <grant.likely@secretlab.ca> Acked-by: Chris Ball <cjb@laptop.org>
| | * | | | mmc: sdhci-esdhc-imx: get rid of the uses of cpu_is_mx()Shawn Guo2011-07-277-27/+78
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The patch removes all the uses of cpu_is_mx(). Instead, it utilizes platform_device_id to distinguish the esdhc differences among SoCs. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Cc: Wolfram Sang <w.sang@pengutronix.de> Cc: Chris Ball <cjb@laptop.org> Acked-by: Grant Likely <grant.likely@secretlab.ca> Acked-by: Chris Ball <cjb@laptop.org>
| | * | | | mmc: sdhci-esdhc-imx: do not reference platform data after probeShawn Guo2011-07-271-9/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The patch copies platform data into pltfm_imx_data and reference the data there than platform data after probe. This work is inspired by Grant Likely and Troy Kisky. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Cc: Troy Kisky <troy.kisky@boundarydevices.com> Cc: Grant Likely <grant.likely@secretlab.ca> Cc: Wolfram Sang <w.sang@pengutronix.de> Cc: Chris Ball <cjb@laptop.org> Acked-by: Grant Likely <grant.likely@secretlab.ca> Acked-by: Chris Ball <cjb@laptop.org>
| | * | | | mmc: sdhci-esdhc-imx: extend card_detect and write_protect support for mx5Shawn Guo2011-07-279-63/+140
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The patch extends card_detect and write_protect support to get mx5 family and more scenarios supported. The changes include: * Turn platform_data from optional to mandatory * Add cd_types and wp_types into platform_data to cover more use cases * Remove the use of flag ESDHC_FLAG_GPIO_FOR_CD * Adjust some machine codes to adopt the platform_data changes * Work around the issue that software reset will get card detection circuit stop working With this patch, card_detect and write_protect gets supported on mx5 based platforms. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Cc: Chris Ball <cjb@laptop.org> Acked-by: Wolfram Sang <w.sang@pengutronix.de> Tested-by: Arnaud Patard <arnaud.patard@rtp-net.org> Acked-by: Chris Ball <cjb@laptop.org>
| | * | | | net/fec: add device tree probe supportShawn Guo2011-07-272-5/+122
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It adds device tree probe support for fec driver. Signed-off-by: Jason Liu <jason.hui@linaro.org> Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Cc: David S. Miller <davem@davemloft.net> Cc: Grant Likely <grant.likely@secretlab.ca> Acked-by: Grant Likely <grant.likely@secretlab.ca> Acked-by: David S. Miller <davem@davemloft.net>
| | * | | | net: ibm_newemac: convert it to use of_get_phy_modeShawn Guo2011-07-275-41/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The patch extends 'enum phy_interface_t' and of_get_phy_mode a little bit with PHY_INTERFACE_MODE_NA and PHY_INTERFACE_MODE_SMII added, and then converts ibm_newemac net driver to use of_get_phy_mode getting phy mode from device tree. It also resolves the namespace conflict on phy_read/write between common mdiobus interface and ibm_newemac private one. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Cc: David S. Miller <davem@davemloft.net> Cc: Grant Likely <grant.likely@secretlab.ca> Acked-by: Grant Likely <grant.likely@secretlab.ca> Acked-by: David Miller <davem@davemloft.net>
| | * | | | dt/net: add helper function of_get_phy_modeShawn Guo2011-07-272-0/+44
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It adds the helper function of_get_phy_mode getting phy interface from device tree. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Cc: Grant Likely <grant.likely@secretlab.ca> Acked-by: Grant Likely <grant.likely@secretlab.ca> Acked-by: David Miller <davem@davemloft.net>
| | * | | | net/fec: gasket needs to be enabled for some i.mxShawn Guo2011-07-277-17/+40
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On the recent i.mx (mx25/50/53), there is a gasket inside fec controller which needs to be enabled no matter phy works in MII or RMII mode. The current code enables the gasket only when phy interface is RMII. It's broken when the driver works with a MII phy. The patch uses platform_device_id to distinguish the SoCs that have the gasket and enables it on these SoCs for both MII and RMII mode. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Reported-by: Troy Kisky <troy.kisky@boundarydevices.com> Cc: David S. Miller <davem@davemloft.net> Cc: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: David S. Miller <davem@davemloft.net>
| | * | | | serial/imx: add device tree probe supportShawn Guo2011-07-272-11/+91
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It adds device tree probe support for imx tty/serial driver. Signed-off-by: Jeremy Kerr <jeremy.kerr@canonical.com> Signed-off-by: Jason Liu <jason.hui@linaro.org> Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Cc: Sascha Hauer <s.hauer@pengutronix.de> Cc: Alan Cox <alan@linux.intel.com> Cc: Cc: Greg Kroah-Hartman <gregkh@suse.de> Cc: Grant Likely <grant.likely@secretlab.ca> Acked-by: Grant Likely <grant.likely@secretlab.ca>
| | * | | | serial/imx: get rid of the uses of cpu_is_mx1()Shawn Guo2011-07-279-53/+113
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The patch removes all the uses of cpu_is_mx1(). Instead, it uses the .id_table of platform_driver to distinguish the uart device type, IMX1_UART and IMX21_UART. The IMX21_UART type runs on all i.mx except i.mx1. A couple of !cpu_is_mx1 logic gets turned into is_imx21_uart, as the codes wrapped there are really IMX21 type uart specific. It also removes macro MX1_UCR3_REF25 and MX1_UCR3_REF30 which are not used anywhere. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Cc: Sascha Hauer <s.hauer@pengutronix.de> Cc: Alan Cox <alan@linux.intel.com> Cc: Greg Kroah-Hartman <gregkh@suse.de> Acked-by: Grant Likely <grant.likely@secretlab.ca>
| * | | | | arm/dt: tegra devicetree supportGrant Likely2011-07-287-0/+368
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Everything required to populate NVIDIA Tegra devices from the device tree. This patch adds a new DT_MACHINE_DESC() which matches against a tegra20 device tree. So far it only registers the on-chip devices, but it will be refined in follow on patches to configure clocks and pin IO from the device tree also. Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
| * | | | | arm/versatile: Add device tree supportGrant Likely2011-07-2811-0/+414
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For testing the dt work, define a dt-enabled versatile platform. This patch adds a new versatile platform for when using the device tree. Add platform and amba devices are discovered and registered by parsing the device tree. Clocks and initial io mappings are still configured statically. This patch still depends on some static platform_data for a few devices which is passed via the auxdata structure to of_platform_populate(), but it is a viable starting point until the drivers can get all configuration data out of the device tree. Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
| * | | | | dt/irq: add irq_domain_generate_simple() helperGrant Likely2011-07-282-0/+68
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | irq_domain_generate_simple() is an easy way to generate an irq translation domain for simple irq controllers. It assumes a flat 1:1 mapping from hardware irq number to an offset of the first linux irq number assigned to the controller Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
| * | | | | irq: add irq_domain translation infrastructureGrant Likely2011-07-289-19/+219
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds irq_domain infrastructure for translating from hardware irq numbers to linux irqs. This is particularly important for architectures adding device tree support because the current implementation (excluding PowerPC and SPARC) cannot handle translation for more than a single interrupt controller. irq_domain supports device tree translation for any number of interrupt controllers. This patch converts x86, Microblaze, ARM and MIPS to use irq_domain for device tree irq translation. x86 is untested beyond compiling it, irq_domain is enabled for MIPS and Microblaze, but the old behaviour is preserved until the core code is modified to actually register an irq_domain yet. On ARM it works and is required for much of the new ARM device tree board support. PowerPC has /not/ been converted to use this new infrastructure. It is still missing some features before it can replace the virq infrastructure already in powerpc (see documentation on irq_domain_map/unmap for details). Followup patches will add the missing pieces and migrate PowerPC to use irq_domain. SPARC has its own method of managing interrupts from the device tree and is unaffected by this change. Acked-by: Ralf Baechle <ralf@linux-mips.org> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
generated by cgit v1.2.3 (git 2.25.1) at 2025-01-26 06:31:06 +0000