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* [MIPS] Replace board_timer_setup function pointer by plat_timer_setup.Ralf Baechle2006-07-1339-97/+40
| | | | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org> ---
* [MIPS] Nuke redeclarations of board_time_init.Ralf Baechle2006-07-132-2/+0
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Remove redeclarations of setup_irq().Ralf Baechle2006-07-134-6/+3
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Nuke redeclarations of board_timer_setup.Ralf Baechle2006-07-132-2/+2
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Print out TLB handler assembly for debugging.Thiemo Seufer2006-07-131-88/+71
| | | | | | | Small update, using pr_debug and pr_info. Signed-off-by: Thiemo Seufer <ths@networkno.de> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] SMTC: Reformat to Linux style.Ralf Baechle2006-07-131-29/+29
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] MIPSsim: Delete redeclaration of ll_local_timer_interrupt.Ralf Baechle2006-07-131-2/+0
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] IP27: Reformatting.Ralf Baechle2006-07-131-4/+4
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] IP27: Invoke setup_irq for timer interrupt so proc stats will be shown.Ralf Baechle2006-07-131-0/+4
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] IP27: irq_chip startup method returns unsigned int.Ralf Baechle2006-07-131-1/+2
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] IP27: struct irq_desc member handler was renamed to chip.Ralf Baechle2006-07-131-1/+1
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Remove vmlinux.rm200 target from makefile.Yoichi Yuasa2006-07-131-4/+2
| | | | | | | | Long ago in the dark ages this was used a MIPS a.out binary to be used with Milo which is obsolete since years. Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] vr41xx: Replace magic number for P4K bit with symbol.Yoichi Yuasa2006-07-132-1/+2
| | | | | Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] vr41xx: Changed workaround to recommended methodYoichi Yuasa2006-07-131-4/+3
| | | | | Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Oprofile: Fix build failure due to warning and -Werror.Thiemo Seufer2006-07-131-0/+2
| | | | | Signed-off-by: Thiemo Seufer <ths@networkno.de> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] TRACE_IRQFLAGS_SUPPORT support.Ralf Baechle2006-07-1315-39/+91
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Fix rdhwr_op definition.Atsushi Nemoto2006-07-131-1/+1
| | | | | Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Do not count pages in holes with sparsememAtsushi Nemoto2006-07-131-25/+40
| | | | | | | | | | | | | | | | | | With some memory model other than FLATMEM, the single node can contains some holes so there might be many invalid pages. For example, with two 256M memory and one 256M hole, some variables (num_physpage, totalpages, nr_kernel_pages, nr_all_pages, etc.) will indicate that there are 768MB on this system. This is not desired because, for example, alloc_large_system_hash() allocates too many entries. Use free_area_init_node() with counted zholes_size[] instead of free_area_init(). For num_physpages, use number of ram pages instead of max_low_pfn. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Sparsemem fixesAtsushi Nemoto2006-07-132-8/+5
| | | | | | | | | 1. MIPS should select SPARSEMEM_STATIC since allocating bootmem in memory_present() will corrupt bootmap area. 2. pfn_valid() for SPARSEMEM is defined in linux/mmzone.h Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] IP32: Fix wreckage caused by recent SA_* constant replacement.Thiemo Seufer2006-07-131-4/+4
| | | | | Signed-off-by: Thiemo Seufer <ths@networkno.de> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] VR41xx: Set VR41_CONF_BP only for PrId 0x0c80.Yoichi Yuasa2006-07-132-1/+4
| | | | | Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] MIPS MT: Fix build error.Yoichi Yuasa2006-07-131-0/+1
| | | | | Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] BCM1480: Fix fatal typo in the rewritten interrupt handler.Thiemo Seufer2006-07-131-1/+1
| | | | | Signed-off-by: Thiemo Seufer <ths@networkno.de> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Sibyte: Improve interrupt latency again for sb1250/bcm1480Thiemo Seufer2006-07-132-8/+9
| | | | | | | | | this patch restores the behaviour of the old (assembly-written) interrupt handler, the handler is left as soon as a single interrupt cause is handled. Signed-off-by: Thiemo Seufer <ths@networkno.de> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Use the proper technical term for naming some of the cache macros.Ralf Baechle2006-07-1312-18/+18
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] IP22: Remove SYS_SUPPORTS_SMP test code.Ralf Baechle2006-07-131-1/+0
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Panic on fp exception in kernel mode.Chris Dearman2006-07-131-0/+2
| | | | | | | There should never be a FP exception in kernel mode. Signed-off-by: Chris Dearman <chris@mips.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Malta: Fix build of certain configs.Ralf Baechle2006-07-131-24/+26
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* [MIPS] au1xxx: Support both YAMON and U-BootDomen Puncer2006-07-131-12/+14
| | | | | Signed-off-by: Domen Puncer <domen.puncer@ultra.si> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Save 2k text size in cpu-probeThiemo Seufer2006-07-131-1/+1
| | | | | | | | The appended patch drops the inline for decode_configs, this saves about 2k of text size. Signed-off-by: Thiemo Seufer <ths@networkno.de> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Uses MIPS_CONF_AR instead of magic constants.Thiemo Seufer2006-07-131-2/+2
| | | | | Signed-off-by: Thiemo Seufer <ths@networkno.de> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Make SPARSEMEM selectable on QEMU.Atsushi Nemoto2006-07-131-0/+4
| | | | | | | This might be helpfull to debug sparsemem on mips. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Make SPARSEMEM selectable on QEMU.Atsushi Nemoto2006-07-131-0/+4
| | | | | | | This might be helpfull to debug sparsemem on mips. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Au1000: Remove au1000 code.Yoichi Yuasa2006-07-138-609/+0
| | | | | Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] vr41xx: Removed unused definitions for NEC CMBVR4133.Yoichi Yuasa2006-07-131-3/+0
| | | | | Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Wire up vmsplice(2) and move_pages(2).Ralf Baechle2006-07-135-6/+20
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Eleminate interrupt migration helper use.Ralf Baechle2006-07-1339-95/+95
| | | | | | | | | > #define hw_interrupt_type irq_chip > typedef struct irq_chip hw_irq_controller; > #define no_irq_type no_irq_chip > typedef struct irq_desc irq_desc_t; Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Don't include obsolete <linux/config.h>.Ralf Baechle2006-07-1321-21/+0
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Default cpu_has_mipsmt to a runtime checkChris Dearman2006-07-131-5/+1
| | | | | Signed-off-by: Chris Dearman <chris@mips.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Use KERN_DEBUG to log the SDBBP messagesChris Dearman2006-07-131-3/+3
| | | | | Signed-off-by: Chris Dearman <chris@mips.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Less noise on multithreading exceptions.Chris Dearman2006-07-132-10/+8
| | | | | | | | Make the MT handler silent and output the MT exception type at debug priority. Signed-off-by: Chris Dearman <chris@mips.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Update defconfigs to 2.6.18-rc1.Ralf Baechle2006-07-1348-877/+2360
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* [MIPS] IP27: Don't destroy interrupt routing information on shutdown irq.Ralf Baechle2006-07-131-2/+0
| | | | | | | This fixes the "not syncing: Could not identify cpu/level ..." panic when a PCI irq is requested the second time. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Avoid interprocessor function calls.Ralf Baechle2006-07-131-5/+30
| | | | | | | | On the 34K where multiple virtual processors are implemented in a single core and share a single TLB, interprocessor function calls are not needed to flush a cache, so avoid them. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [PATCH] lockdep: annotate mm/slab.cArjan van de Ven2006-07-131-0/+32
| | | | | | | | | | | | | mm/slab.c uses nested locking when dealing with 'off-slab' caches, in that case it allocates the slab header from the (on-slab) kmalloc caches. Teach the lock validator about this by putting all on-slab caches into a separate class. this patch has no effect on non-lockdep kernels. Signed-off-by: Arjan van de Ven <arjan@linux.intel.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] lockdep: undo mm/slab.c annotationIngo Molnar2006-07-131-23/+10
| | | | | | | | | undo existing mm/slab.c lock-validator annotations, in preparation of a new, less intrusive annotation patch. Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Arjan van de Ven <arjan@linux.intel.com> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* Merge commit master.kernel.org:/pub/scm/linux/kernel/git/davem/sparc-2.6 of HEADLinus Torvalds2006-07-136-231/+383
|\ | | | | | | | | | | | | | | | | | | | | * HEAD: [SPARC]: Fix OF register translations under sub-PCI busses. [SPARC64]: Refine Sabre wsync logic. [SERIAL] sunsu: Handle keyboard and mouse ports directly. [SPARC64]: Fix 2 bugs in sabre_irq_build() [SPARC64]: Update defconfig. [SPARC64]: Fix make headers_install [SPARC64]: of_device_register() error checking fix
| * [SPARC]: Fix OF register translations under sub-PCI busses.David S. Miller2006-07-132-204/+271
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There is an implicit assumption in the code that ranges will translate to something that can fit in 2 32-bit cells, or a 64-bit value. For certain kinds of things below PCI this isn't necessarily true. Here is what the relevant OF device hierarchy looks like for one of the serial controllers on an Ultra5: Node 0xf005f1e0 ranges: 00000000.00000000.00000000.000001fe.01000000.00000000.01000000 01000000.00000000.00000000.000001fe.02000000.00000000.01000000 02000000.00000000.00000000.000001ff.00000000.00000001.00000000 03000000.00000000.00000000.000001ff.00000000.00000001.00000000 device_type: 'pci' model: 'SUNW,sabre' Node 0xf005f9d4 device_type: 'pci' model: 'SUNW,simba' Node 0xf0060d24 ranges: 00000010.00000000 82010810.00000000.f0000000 01000000 00000014.00000000 82010814.00000000.f1000000 00800000 name: 'ebus' Node 0xf0062dac reg: 00000014.003083f8.00000008 --> 0x1ff.f13083f8 device_type: 'serial' name: 'su' So the correct translation here is: 1) Match "su" register to second ranges entry of 'ebus', which translates into a PCI triplet "82010814.00000000.f1000000" of size 00800000, which gives us "82010814.00000000.f13083f8". 2) Pass-through "SUNW,simba" since it lacks ranges property 3) Match "82010814.00000000.f13083f8" to third ranges property of PCI controller node 'SUNW,sabre', and we arrive at the final physical MMIO address of "0x1fff13083f8". Due to the 2-cell assumption, we couldn't translate to a PCI 3-cell value, and we couldn't perform a pass-thru on it either. It was easiest to just stop splitting the ranges application operation between two methods, ->map and ->translate, and just let ->map do all the work. That way it would work purely on 32-bit cell arrays instead of having to "return" some value like a u64. It's still not %100 correct because the out-of-range check is still done using the 64 least significant bits of the range and address. But it does work for all the cases I've thrown at it so far. Signed-off-by: David S. Miller <davem@davemloft.net>
| * [SPARC64]: Refine Sabre wsync logic.David S. Miller2006-07-131-8/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | It is only needed when there is a PCI-PCI bridge sitting between the device and the PCI host controller which is not a Simba APB bridge. Add logic to handle two special cases: 1) device behind EBUS, which sits on PCI 2) PCI controller interrupts Signed-off-by: David S. Miller <davem@davemloft.net>
| * [SERIAL] sunsu: Handle keyboard and mouse ports directly.David S. Miller2006-07-131-9/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The sunsu_ports[] array exists merely to be able to easily use an integer index to get at the proper serial console port struct. We size this only for real ports, not for the keyboard and mouse, and thus keyboard and mouse port registration would fail. Fix this by dynamically allocating the port struct for the keyboard and mouse, instead of using the sunsu_ports[] array. Signed-off-by: David S. Miller <davem@davemloft.net>
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