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* sparc64: Encode huge PMDs using PTE encoding.David S. Miller2013-11-135-262/+131
| | | | | | | | | | | | | | | | | | | | | | | | | | Now that we have 64-bits for PMDs we can stop using special encodings for the huge PMD values, and just put real PTEs in there. We allocate a _PAGE_PMD_HUGE bit to distinguish between plain PMDs and huge ones. It is the same for both 4U and 4V PTE layouts. We also use _PAGE_SPECIAL to indicate the splitting state, since a huge PMD cannot also be special. All of the PMD --> PTE translation code disappears, and most of the huge PMD bit modifications and tests just degenerate into the PTE operations. In particular USER_PGTABLE_CHECK_PMD_HUGE becomes trivial. As a side effect, normal PMDs don't shift the physical address around. This also speeds up the page table walks in the TLB miss paths since they don't have to do the shifts any more. Another non-trivial aspect is that pte_modify() has to be changed to preserve the _PAGE_PMD_HUGE bits as well as the page size field of the pte. Signed-off-by: David S. Miller <davem@davemloft.net>
* sparc64: Move to 64-bit PGDs and PMDs.David S. Miller2013-11-124-31/+34
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | To make the page tables compact, we were using 32-bit PGDs and PMDs. We only had to support <= 43 bits of physical addresses so this was quite feasible. In order to support larger physical addresses we have to move to 64-bit PGDs and PMDs. Most of the changes are straight-forward: 1) {pgd,pmd}_t --> unsigned long 2) Anything that tries to use plain "unsigned int" types with pgd/pmd values needs to be adjusted. In particular things like "0U" become "0UL". 3) {PGDIR,PMD}_BITS decrease by one. 4) In the assembler page table walkers, use "ldxa" instead of "lduwa" and adjust the low bit masks to clear out the low 3 bits instead of just the low 2 bits during pgd/pmd address formation. Also, use PTRS_PER_PGD and PTRS_PER_PMD in the sizing of the swapper_{pg_dir,low_pmd_dir} arrays. This patch does not try to take advantage of having 64-bits in the PMDs to simplify the hugepage code, that will come in a subsequent change. Signed-off-by: David S. Miller <davem@davemloft.net>
* sparc64: Move from 4MB to 8MB huge pages.David S. Miller2013-11-129-85/+47
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The impetus for this is that we would like to move to 64-bit PMDs and PGDs, but that would result in only supporting a 42-bit address space with the current page table layout. It'd be nice to support at least 43-bits. The reason we'd end up with only 42-bits after making PMDs and PGDs 64-bit is that we only use half-page sized PTE tables in order to make PMDs line up to 4MB, the hardware huge page size we use. So what we do here is we make huge pages 8MB, and fabricate them using 4MB hw TLB entries. Facilitate this by providing a "REAL_HPAGE_SHIFT" which is used in places that really need to operate on hardware 4MB pages. Use full pages (512 entries) for PTE tables, and adjust PMD_SHIFT, PGD_SHIFT, and the build time CPP test as needed. Use a CPP test to make sure REAL_HPAGE_SHIFT and the _PAGE_SZHUGE_* we use match up. This makes the pgtable cache completely unused, so remove the code managing it and the state used in mm_context_t. Now we have less spinlocks taken in the page table allocation path. The technique we use to fabricate the 8MB pages is to transfer bit 22 from the missing virtual address into the PTEs physical address field. That takes care of the transparent huge pages case. For hugetlb, we fill things in at the PTE level and that code already puts the sub huge page physical bits into the PTEs, based upon the offset, so there is nothing special we need to do. It all just works out. So, a small amount of complexity in the THP case, but this code is about to get much simpler when we move the 64-bit PMDs as we can move away from the fancy 32-bit huge PMD encoding and just put a real PTE value in there. With bug fixes and help from Bob Picco. Signed-off-by: David S. Miller <davem@davemloft.net>
* sparc64: Make PAGE_OFFSET variable.David S. Miller2013-11-127-29/+138
| | | | | | | | | | | | | | | | | | | | | | | | | | | Choose PAGE_OFFSET dynamically based upon cpu type. Original UltraSPARC-I (spitfire) chips only supported a 44-bit virtual address space. Newer chips (T4 and later) support 52-bit virtual addresses and up to 47-bits of physical memory space. Therefore we have to adjust PAGE_SIZE dynamically based upon the capabilities of the chip. Note that this change alone does not allow us to support > 43-bit physical memory, to do that we need to re-arrange our page table support. The current encodings of the pmd_t and pgd_t pointers restricts us to "32 + 11" == 43 bits. This change can waste quite a bit of memory for the various tables. In particular, a future change should work to size and allocate kern_linear_bitmap[] and sparc64_valid_addr_bitmap[] dynamically. This isn't easy as we really cannot take a TLB miss when accessing kern_linear_bitmap[]. We'd have to lock it into the TLB or similar. Signed-off-by: David S. Miller <davem@davemloft.net> Acked-by: Bob Picco <bob.picco@oracle.com>
* sparc64: Fix inconsistent max-physical-address defines.David S. Miller2013-11-121-2/+4
| | | | | | | | Some parts of the code use '41' others use '42', make them all use the same value. Signed-off-by: David S. Miller <davem@davemloft.net> Acked-by: Bob Picco <bob.picco@oracle.com>
* sparc64: Document the shift counts used to validate linear kernel addresses.David S. Miller2013-11-123-6/+24
| | | | | | | | This way we can see exactly what they are derived from, and in particular how they would change if we were to use a different PAGE_OFFSET value. Signed-off-by: David S. Miller <davem@davemloft.net> Acked-by: Bob Picco <bob.picco@oracle.com>
* sparc64: Define PAGE_OFFSET in terms of physical address bits.David S. Miller2013-11-121-1/+3
| | | | | | | | | | This makes clearer the implications for a given choosen value. Based upon patches by Bob Picco. Signed-off-by: David S. Miller <davem@davemloft.net> Acked-by: Bob Picco <bob.picco@oracle.com>
* sparc64: Use PAGE_OFFSET instead of a magic constant.David S. Miller2013-11-121-7/+7
| | | | | | | | | | This pertains to all of the computations of the kernel fast TLB miss xor values. Based upon a patch by Bob Picco. Signed-off-by: David S. Miller <davem@davemloft.net> Acked-by: Bob Picco <bob.picco@oracle.com>
* sparc64: Clean up 64-bit mmap exclusion defines.David S. Miller2013-11-123-7/+15
| | | | | | | | | | | | | | Older UltraSPARC chips had an address space hole due to the MMU only supporting 44-bit virtual addresses. The top end of this hole also has the same value as the current definition of PAGE_OFFSET, so this can be confusing. Consolidate the defines for the userspace mmap exclusion range into page_64.h and use them in sys_sparc_64.c and hugetlbpage.c Signed-off-by: David S. Miller <davem@davemloft.net> Acked-by: Bob Picco <bob.picco@oracle.com>
* Merge tag 'devicetree-for-3.13' of ↵Linus Torvalds2013-11-12212-1249/+1919
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux Pull devicetree updates from Rob Herring: "DeviceTree updates for 3.13. This is a bit larger pull request than usual for this cycle with lots of clean-up. - Cross arch clean-up and consolidation of early DT scanning code. - Clean-up and removal of arch prom.h headers. Makes arch specific prom.h optional on all but Sparc. - Addition of interrupts-extended property for devices connected to multiple interrupt controllers. - Refactoring of DT interrupt parsing code in preparation for deferred probe of interrupts. - ARM cpu and cpu topology bindings documentation. - Various DT vendor binding documentation updates" * tag 'devicetree-for-3.13' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (82 commits) powerpc: add missing explicit OF includes for ppc dt/irq: add empty of_irq_count for !OF_IRQ dt: disable self-tests for !OF_IRQ of: irq: Fix interrupt-map entry matching MIPS: Netlogic: replace early_init_devtree() call of: Add Panasonic Corporation vendor prefix of: Add Chunghwa Picture Tubes Ltd. vendor prefix of: Add AU Optronics Corporation vendor prefix of/irq: Fix potential buffer overflow of/irq: Fix bug in interrupt parsing refactor. of: set dma_mask to point to coherent_dma_mask of: add vendor prefix for PHYTEC Messtechnik GmbH DT: sort vendor-prefixes.txt of: Add vendor prefix for Cadence of: Add empty for_each_available_child_of_node() macro definition arm/versatile: Fix versatile irq specifications. of/irq: create interrupts-extended property microblaze/pci: Drop PowerPC-ism from irq parsing of/irq: Create of_irq_parse_and_map_pci() to consolidate arch code. of/irq: Use irq_of_parse_and_map() ...
| * powerpc: add missing explicit OF includes for ppcRob Herring2013-11-1115-0/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit b5b4bb3f6a11f9 (of: only include prom.h on sparc) removed implicit includes of of_*.h headers by powerpc's prom.h. Some components were missed in initial clean-up patch, so add the necessary includes to fix powerpc builds. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Paul Mackerras <paulus@samba.org> Cc: Tejun Heo <tj@kernel.org> Cc: Matt Mackall <mpm@selenic.com> Cc: Herbert Xu <herbert@gondor.apana.org.au> Cc: "David S. Miller" <davem@davemloft.net> Cc: Vinod Koul <vinod.koul@intel.com> Cc: Dan Williams <dan.j.williams@intel.com> Cc: linuxppc-dev@lists.ozlabs.org Cc: linux-ide@vger.kernel.org Cc: linux-crypto@vger.kernel.org
| * dt/irq: add empty of_irq_count for !OF_IRQRob Herring2013-11-081-1/+9
| | | | | | | | | | | | | | | | | | Add an empty version of of_irq_count for !OF_IRQ. This fixes build error on sparc in linux-next: drivers/gpio/gpio-bcm-kona.c:542: undefined reference to `of_irq_count' Signed-off-by: Rob Herring <rob.herring@calxeda.com>
| * dt: disable self-tests for !OF_IRQRob Herring2013-11-081-0/+1
| | | | | | | | | | | | | | | | | | | | | | Fix OF selftest compile on sparc which does not enable OF_IRQ. drivers/of/selftest.c:177: undefined reference to `of_irq_parse_one' drivers/of/selftest.c:197: undefined reference to `of_irq_parse_one' drivers/of/selftest.c:248: undefined reference to `of_irq_parse_one' Signed-off-by: Rob Herring <rob.herring@calxeda.com> Acked-by: Grant Likely <grant.likely@linaro.org>
| * of: irq: Fix interrupt-map entry matchingTomasz Figa2013-11-071-1/+1
| | | | | | | | | | | | | | | | | | This patch fixes interrupt-map entry matching code to properly match all specifier cells with interrupt map entries. Signed-off-by: Tomasz Figa <t.figa@samsung.com> Tested-by: Sachin Kamat <sachin.kamat@linaro.org> Signed-off-by: Rob Herring <rob.herring@calxeda.com>
| * Merge remote-tracking branch 'grant/devicetree/next' into for-nextRob Herring2013-11-07505-2556/+4141
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| | * of/irq: Fix potential buffer overflowGrant Likely2013-11-031-2/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 2361613206e6, "of/irq: Refactor interrupt-map parsing" introduced a potential buffer overflow bug because it doesn't do sufficient range checking on the input data. This patch adds the appropriate checking and buffer size adjustments. If the bounds are out of range then warn loudly. MAX_PHANDLE_ARGS should be sufficient. If it is not then the value can be increased. Signed-off-by: Grant Likely <grant.likely@linaro.org> Cc: Rob Herring <rob.herring@calxeda.com>
| | * of/irq: Fix bug in interrupt parsing refactor.Grant Likely2013-11-032-13/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 2361613206e6, "of/irq: Refactor interrupt-map parsing" introduced a bug. The irq parsing will fail for some nodes that don't have a reg property. It is fixed by deferring the check for reg until it is actually needed. Also adjust the testcase data to catch the bug. Signed-off-by: Grant Likely <grant.likely@linaro.org> Tested-by: Stephen Warren <swarren@nvidia.com> Tested-by: Ming Lei <tom.leiming@gmail.com> Tested-by: Stephen Warren <swarren@nvidia.com> Cc: Rob Herring <rob.herring@calxeda.com>
| | * arm/versatile: Fix versatile irq specifications.Grant Likely2013-10-282-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | Two of the versatile irq definitions are incorrect, mostly because two devices have connections to more than one interrupt controller. Fix them by using the new interrupts-extended property to fan out without using an awful interrupt-map nexus node. Signed-off-by: Grant Likely <grant.likely@linaro.org>
| | * of/irq: create interrupts-extended propertyGrant Likely2013-10-284-11/+120
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The standard interrupts property in device tree can only handle interrupts coming from a single interrupt parent. If a device is wired to multiple interrupt controllers, then it needs to be attached to a node with an interrupt-map property to demux the interrupt specifiers which is confusing. It would be a lot easier if there was a form of the interrupts property that allows for a separate interrupt phandle for each interrupt specifier. This patch does exactly that by creating a new interrupts-extended property which reuses the phandle+arguments pattern used by GPIOs and other core bindings. Signed-off-by: Grant Likely <grant.likely@linaro.org> Acked-by: Tony Lindgren <tony@atomide.com> Acked-by: Kumar Gala <galak@codeaurora.org> [grant.likely: removed versatile platform hunks into separate patch] Cc: Rob Herring <rob.herring@calxeda.com>
| | * microblaze/pci: Drop PowerPC-ism from irq parsingGrant Likely2013-10-242-72/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Microblaze PCI code copied the PowerPC irq handling, but powerpc needs to handle broken device trees that are not present on Microblaze. This patch removes the powerpc special case and replaces it with a direct of_irq_parse_and_map_pci() call. Signed-off-by: Grant Likely <grant.likely@linaro.org> Acked-by: Michal Simek <monstr@monstr.eu>
| | * of/irq: Create of_irq_parse_and_map_pci() to consolidate arch code.Grant Likely2013-10-247-67/+31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Several architectures open code effectively the same code block for finding and mapping PCI irqs. This patch consolidates it down to a single function. Signed-off-by: Grant Likely <grant.likely@linaro.org> Acked-by: Michal Simek <monstr@monstr.eu> Cc: Russell King <linux@arm.linux.org.uk> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
| | * of/irq: Use irq_of_parse_and_map()Thierry Reding2013-10-2416-39/+35
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Replace some instances of of_irq_map_one()/irq_create_of_mapping() and of_irq_to_resource() by the simpler equivalent irq_of_parse_and_map(). Signed-off-by: Thierry Reding <treding@nvidia.com> Acked-by: Rob Herring <rob.herring@calxeda.com> [grant.likely: resolved conflicts with core code renames] Signed-off-by: Grant Likely <grant.likely@linaro.org>
| | * of/irq: Rework of_irq_count()Thierry Reding2013-10-241-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The of_irq_to_resource() helper that is used to implement of_irq_count() tries to resolve interrupts and in fact creates a mapping for resolved interrupts. That's pretty heavy lifting for something that claims to just return the number of interrupts requested by a given device node. Instead, use the more lightweight of_irq_map_one(), which, despite the name, doesn't create an actual mapping. Perhaps a better name would be of_irq_translate_one(). Signed-off-by: Thierry Reding <treding@nvidia.com> Acked-by: Rob Herring <rob.herring@calxeda.com> [grant.likely: fixup s/of_irq_map_one/of_irq_parse_one/] Signed-off-by: Grant Likely <grant.likely@linaro.org>
| | * of: Add testcases for interrupt parsingGrant Likely2013-10-243-6/+127
| | | | | | | | | | | | | | | | | | | | | This patch extends the DT selftest code with some test cases for the interrupt parsing functions. Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
| | * of: Add helper for printing an of_phandle_args structureGrant Likely2013-10-243-3/+13
| | | | | | | | | | | | | | | | | | | | | It is sometimes useful for debug to get the contents of an of_phandle_args structure out into the kernel log. Signed-off-by: Grant Likely <grant.likely@linaro.org>
| | * of/irq: Refactor interrupt-map parsingGrant Likely2013-10-244-59/+67
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | All the users of of_irq_parse_raw pass in a raw interrupt specifier from the device tree and expect it to be returned (possibly modified) in an of_phandle_args structure. However, the primary function of of_irq_parse_raw() is to check for translations due to the presence of one or more interrupt-map properties. The actual placing of the data into an of_phandle_args structure is trivial. If it is refactored to accept an of_phandle_args structure directly, then it becomes possible to consume of_phandle_args from other sources. This is important for an upcoming patch that allows a device to be connected to more than one interrupt parent. It also simplifies the code a bit. The biggest complication with this patch is that the old version works on the interrupt specifiers in __be32 form, but the of_phandle_args structure is intended to carry it in the cpu-native version. A bit of churn was required to make this work. In the end it results in tighter code, so the churn is worth it. Signed-off-by: Grant Likely <grant.likely@linaro.org> Acked-by: Tony Lindgren <tony@atomide.com> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
| | * of/irq: simplify args to irq_create_of_mappingGrant Likely2013-10-2416-30/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | All the callers of irq_create_of_mapping() pass the contents of a struct of_phandle_args structure to the function. Since all the callers already have an of_phandle_args pointer, why not pass it directly to irq_create_of_mapping()? Signed-off-by: Grant Likely <grant.likely@linaro.org> Acked-by: Michal Simek <monstr@monstr.eu> Acked-by: Tony Lindgren <tony@atomide.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Russell King <linux@arm.linux.org.uk> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
| | * of/irq: Replace of_irq with of_phandle_argsGrant Likely2013-10-2419-88/+58
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | struct of_irq and struct of_phandle_args are exactly the same structure. This patch makes the kernel use of_phandle_args everywhere. This in itself isn't a big deal, but it makes some follow-on patches simpler. Signed-off-by: Grant Likely <grant.likely@linaro.org> Acked-by: Michal Simek <monstr@monstr.eu> Acked-by: Tony Lindgren <tony@atomide.com> Cc: Russell King <linux@arm.linux.org.uk> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
| | * of/irq: Rename of_irq_map_* functions to of_irq_parse_*Grant Likely2013-10-2420-42/+42
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The OF irq handling code has been overloading the term 'map' to refer to both parsing the data in the device tree and mapping it to the internal linux irq system. This is probably because the device tree does have the concept of an 'interrupt-map' function for translating interrupt references from one node to another, but 'map' is still confusing when the primary purpose of some of the functions are to parse the DT data. This patch renames all the of_irq_map_* functions to of_irq_parse_* which makes it clear that there is a difference between the parsing phase and the mapping phase. Kernel code can make use of just the parsing or just the mapping support as needed by the subsystem. The patch was generated mechanically with a handful of sed commands. Signed-off-by: Grant Likely <grant.likely@linaro.org> Acked-by: Michal Simek <monstr@monstr.eu> Acked-by: Tony Lindgren <tony@atomide.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
| | * of/irq: Pass trigger type in IRQ resource flagsTomasz Figa2013-10-151-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some drivers might rely on availability of trigger flags in IRQ resource, for example to configure the hardware for particular interrupt type. However current code creating IRQ resources from data in device tree does not configure trigger flags in resulting resources. This patch tries to solve the problem, based on the fact that irq_of_parse_and_map() configures the trigger based on DT interrupt specifier and IRQD_TRIGGER_* flags are consistent with IORESOURCE_IRQ_*, and we can get correct trigger flags by calling irqd_get_trigger_type() after mapping the interrupt. Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com> [grant.likely: Merged the two assignments to r->flags] Signed-off-by: Grant Likely <grant.likely@linaro.org>
| | * of: Fix dereferencing node name in debug output to be safeGrant Likely2013-10-152-7/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | Several locations in the of_address and of_irq code dereference the full_name parameter from a device_node pointer without checking if the pointer is valid. This patch switches to use of_node_full_name() which always checks the pointer. Signed-off-by: Grant Likely <grant.likely@linaro.org>
| | * of: Fix iteration bug over CPU reg propertiesGrant Likely2013-10-151-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The size of each hwid in a cpu nodes 'reg' property is defined by the parents #address-cells property in the normal way. The cpu parsing code has a bug where it will overrun the end of the property if address-cells is greater than one. This commit fixes the problem by adjusting the array size by the number of address cells. It also makes sure address-cells isn't zero for that would cause an infinite loop. v2: bail if #address-cells is zero instead of forcing to OF_ROOT_NODE_ADDR_CELLS_DEFAULT. Forcing it will cause the reg property to be parsed incorrectly. Signed-off-by: Grant Likely <grant.likely@linaro.org> Cc: Rob Herring <rob.herring@calxeda.com> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
| | * of: Make cpu node handling more portable.David Miller2013-10-153-17/+84
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use for_each_node_by_type() to iterate all cpu nodes in the system. Provide and overridable function arch_find_n_match_cpu_physical_id, which sees if the given device node matches 'cpu' and if so sets '*thread' when non-NULL to the cpu thread number within the core. The default implementation behaves the same as the existing code. Add a sparc64 implementation. Signed-off-by: David S. Miller <davem@davemloft.net> Tested-by: Sudeep KarkadaNagesha <Sudeep.KarkadaNagesha@arm.com> Signed-off-by: Grant Likely <grant.likely@linaro.org>
| * | MIPS: Netlogic: replace early_init_devtree() callJayachandran C2013-11-063-5/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The early_init_devtree() API was removed in linux-next for 3.13 with commit "mips: use early_init_dt_scan". This causes Netlogic XLP compile to fail: arch/mips/netlogic/xlp/setup.c:101: undefined reference to `early_init_devtree' Add xlp_early_init_devtree() which uses the __dt_setup_arch() to handle early device tree related initialization to fix this. Signed-off-by: Jayachandran C <jchandra@broadcom.com> Signed-off-by: Rob Herring <rob.herring@calxeda.com>
| * | Merge branch 'cpu-bindings' into for-nextRob Herring2013-11-062-47/+828
| |\ \
| | * | Documentation: DT: arm: define CPU topology bindingsLorenzo Pieralisi2013-09-281-0/+474
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The advent of multi-cluster ARM systems requires a mechanism to describe how in hierarchical terms CPUs are connected in ARM SoCs so that the kernel can initialize and map resources like IRQs and memory space to specific group(s) of CPUs. The CPU topology is made up of multiple hierarchy levels whose bottom layers (aka leaf nodes in device tree syntax) contain links to the HW CPUs in the system. The topology bindings are generic for both 32-bit and 64-bit systems and lay the groundwork on top of which affinity schemes can be built. This patch provides the documentation in the kernel required to define the device tree bindings describing the CPU topology for ARM 32-bit and 64-bit systems. Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: Rob Herring <rob.herring@calxeda.com>
| | * | Documentation: devicetree: arm: cpus/cpu nodes bindings updatesLorenzo Pieralisi2013-09-281-47/+354
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In order to extend the current cpu nodes bindings to newer CPUs inclusive of AArch64 and to update support for older ARM CPUs this patch updates device tree documentation for the cpu nodes bindings. Main changes: - adds 64-bit bindings - define usage of #address-cells - defines behaviour on pre and post v7 uniprocessor systems - adds ARM 11MPcore specific reg property definition Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: Mark Rutland <mark.rutland@arm.com> Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Acked-by: Jason Cooper <jason@lakedaemon.net> Signed-off-by: Rob Herring <rob.herring@calxeda.com>
| * | | of: Add Panasonic Corporation vendor prefixThierry Reding2013-11-041-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Use "panasonic" as the vendor prefix for the Panasonic Corporation. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Rob Herring <rob.herring@calxeda.com>
| * | | of: Add Chunghwa Picture Tubes Ltd. vendor prefixThierry Reding2013-11-041-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Chunghwa Picture Tubes Ltd. isn't listed on the stock exchange, so use the generic "chunghwa" as vendor prefix. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Rob Herring <rob.herring@calxeda.com>
| * | | of: Add AU Optronics Corporation vendor prefixThierry Reding2013-11-041-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | AU Optronics is listed as AUO on the stock exchange, so use that as the vendor prefix. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Rob Herring <rob.herring@calxeda.com>
| * | | of: set dma_mask to point to coherent_dma_maskRob Herring2013-11-031-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Platform devices created by DT code don't initialize dma_mask pointer to anything. Set it to coherent_dma_mask by default if the architecture code has not set it. Signed-off-by: Rob Herring <rob.herring@calxeda.com>
| * | | of: add vendor prefix for PHYTEC Messtechnik GmbHMatt Porter2013-11-031-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Adds PHYTEC to the list of DT vendor prefixes. Signed-off-by: Matt Porter <matt.porter@linaro.org> Signed-off-by: Rob Herring <rob.herring@calxeda.com>
| * | | DT: sort vendor-prefixes.txtSilvio F2013-11-031-2/+2
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Silvio F <silvio.fricke@gmail.com> Signed-off-by: Rob Herring <rob.herring@calxeda.com>
| * | | of: Add vendor prefix for CadenceSoren Brinkmann2013-11-031-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Drivers like clocksource/cadence_ttc and net/macb already use the 'cdns' prefix for Cadence IP. Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Rob Herring <rob.herring@calxeda.com>
| * | | of: Add empty for_each_available_child_of_node() macro definitionSylwester Nawrocki2013-11-031-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add this empty macro definition so users can be compiled without excluding this macro call with preprocessor directives when CONFIG_OF is disabled. Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Rob Herring <rob.herring@calxeda.com>
| * | | of: remove empty arch prom.h headersRob Herring2013-10-096-58/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now that prom.h is optional, all the empty prom.h headers can be removed. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Acked-by: Vineet Gupta <vgupta@synopsys.com> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Acked-by: Grant Likely <grant.likely@linaro.org> Cc: Will Deacon <will.deacon@arm.com> Cc: Mark Salter <msalter@redhat.com> Cc: Aurelien Jacquiot <a-jacquiot@ti.com> Cc: James Hogan <james.hogan@imgtec.com> Cc: Jonas Bonn <jonas@southpole.se> Cc: Chris Zankel <chris@zankel.net> Cc: Max Filippov <jcmvbkbc@gmail.com>
| * | | of: only include prom.h on sparcRob Herring2013-10-091-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The dependency on prom.h by the core DT code is now removed and only sparc needs to include prom.h for the core code. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Acked-by: Grant Likely <grant.likely@linaro.org>
| * | | powerpc: add explicit OF includesRob Herring2013-10-0932-4/+49
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When removing prom.h include by of.h, several OF headers will no longer be implicitly included. Add explicit includes of of_*.h as needed. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Acked-by: Grant Likely <grant.likely@linaro.org> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Paul Mackerras <paulus@samba.org> Cc: Anatolij Gustschin <agust@denx.de> Cc: Kumar Gala <galak@kernel.crashing.org> Cc: Olof Johansson <olof@lixom.net> Cc: linuxppc-dev@lists.ozlabs.org
| * | | powerpc: clean-up include ordering in prom.hRob Herring2013-10-091-10/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now that the core OF headers don't depend on prom.h, rearrange the includes. There are still lots of implicit includes in the powerpc tree, so the includes of OF headers are still necessary. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Acked-by: Grant Likely <grant.likely@linaro.org>
| * | | of: move of_translate_dma_address to of_address.hRob Herring2013-10-092-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | of_translate_dma_address is implemented in common code, so move the declaration there too. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Acked-by: Grant Likely <grant.likely@linaro.org> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Paul Mackerras <paulus@samba.org> Cc: linuxppc-dev@lists.ozlabs.org
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