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* [ARM] 5487/1: ARM errata: Stale prediction on replaced interworking branchCatalin Marinas2009-04-302-0/+24
| | | | | | | | This patch adds the workaround for the 430973 Cortex-A8 (r1p0..r1p2) erratum. The BTAC/BTB is now flushed at every context switch. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] 5488/1: ARM errata: Invalidation of the Instruction Cache operation ↵Catalin Marinas2009-04-303-2/+63
| | | | | | | | | | can fail This patch implements the recommended workaround for erratum 411920 (ARM1136, ARM1156, ARM1176). Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* Merge branch 'fix' of ↵Russell King2009-04-288-13/+54
|\ | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/ycmiao/pxa-linux-2.6
| * [ARM] pxa/littleton: add missing da9034 touchscreen supportEric Miao2009-04-271-0/+9
| | | | | | | | Signed-off-by: Eric Miao <eric.miao@marvell.com>
| * [ARM] pxa/zylonite: configure GPIO18/19 correctly, used by 2 GPIO expandersEric Miao2009-04-271-0/+4
| | | | | | | | Signed-off-by: Eric Miao <eric.miao@marvell.com>
| * [ARM] pxa/zylonite: fix the issue of unused SDATA_IN_1 pin get AC97 not workingEric Miao2009-04-272-0/+2
| | | | | | | | | | | | | | | | | | | | GPIO17_SDATA_IN_1 and GPIO36_SDATA_IN_1 are originally designed for the 2nd codec but unused on the board, yet they are initialized incorrectly by the bootloader as the SDATA_IN_1 alternate function, thus causing AC97 fail to work. Fix this issue by configuring these pins as normal GPIO to avoid the noise from these pins being treated as signals from the 2nd codec. Signed-off-by: Eric Miao <eric.miao@marvell.com>
| * [ARM] pxa: make ads7846 on corgi and spitz to sync on HSYNCEric Miao2009-04-272-0/+20
| | | | | | | | Signed-off-by: Eric Miao <eric.miao@marvell.com>
| * [ARM] pxa: remove unused CPU_FREQ_PXA Kconfig symbolPhilipp Zabel2009-04-272-7/+0
| | | | | | | | | | | | | | | | cpufreq drivers for pxa2xx/3xx are now built-in automatically as soon as CPU_FREQ is enabled. Signed-off-by: Philipp Zabel <philipp.zabel@gmail.com> Signed-off-by: Eric Miao <eric.miao@marvell.com>
| * [ARM] pxa: remove duplicate select statements from KconfigGuennadi Liakhovetski2009-04-271-2/+0
| | | | | | | | | | | | | | | | ARCH_PXA selects HAVE_CLK and COMMON_CLKDEV twice in arch/arm/Kconfig. Remove the second entry. Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by: Eric Miao <eric.miao@marvell.com>
| * [ARM] pxa: fix issue of muxed GPIO irq_chip functions touching non-muxed GPIOsEric Miao2009-04-271-4/+19
| | | | | | | | | | | | | | | | | | | | pxa_gpio_irq_type() and pxa_unmask_muxed_gpio() will touch non-muxed GPIOs (0 and 1 on PXA2xx/PXA3xx) bits in GRERx and GFERx, which is incorrect. Actually, only those bits should get updated if the corresponding bits are set in c->irq_mask as well. Fix this by updating only those relevant bits. Reported-and-tested-by: Daniel Ribeiro <drwyrm@gmail.com> Signed-off-by: Eric Miao <eric.miao@marvell.com>
* | Merge branch 'for-rmk' of ↵Russell King2009-04-2734-510/+5323
|\ \ | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-davinci
| * | davinci: DM644x: NAND: update partitioningDavid Brownell2009-04-271-6/+36
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update NAND partitioning for the dm6446 evm, unmasking the hidden data at the beginning and letting the kernel be updated from Linux. - This is boot-compatible with TI's software (U-Boot 1.20 and both the 2.6.10 and 2.6.18 kernels), in terms of startup and loading kernels from flash. - In the same way, it's also boot-compatible with mainline U-Boot, which stores U-Boot params in block 0 not block 16. - It's not quite compatible with systems that previously used NAND partitions to hold (filesystem) data. The compatibilities are a bit different based on which kernel was used previously + Users of TI/MV kernels no longer see mtd2 "params" (mainline u-boot env is in a different place) * Filesystem is now mtd2 ... vs mtd3 + Users of GIT kernels now see mtd0 and mtd1 partitions * Filesystem partition starts 640 KBytes earlier * Filesystem is now mtd2 ... vs mtd0 * Linux now *uses* the flash-resident BBT * Removes annoying slowdown/hiccup during boot * Potentially ~64KB less space available with TI/MV kernels If you *used* NAND partitions from Linux, there is no solution that's fully compatible with all previous kernels in those respects ... ergo this "best compromise". It'd be good to back back up the filesystem data; or, carry your own backwards-compatibility patch for awhile. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * | davinci: update DM644x support in preparation for more SoCsKevin Hilman2009-04-277-39/+791
| | | | | | | | | | | | | | | | | | | | | | | | Rework DM644x code into SoC specific and board specific parts. This is also to generalize the structure a bit so it's easier to add support for new SoCs in the DaVinci family. Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * | davinci: DM644x: rename board fileKevin Hilman2009-04-271-0/+0
| | | | | | | | | | | | | | | | | | | | | Rename DM6446 EVM board file, no functional changes. Code is updated and reworked in following patch. Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * | davinci: update pin-multiplexing supportKevin Hilman2009-04-276-66/+339
| | | | | | | | | | | | | | | | | | | | | Update MUX support to be more general and useful across multiple SoCs in the DaVinci family. Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * | davinci: serial: generalize for more SoCsKevin Hilman2009-04-272-20/+96
| | | | | | | | | | | | Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * | davinci: DM355 IRQ Definitionss-paulraj@ti.com2009-04-272-0/+118
| | | | | | | | | | | | | | | | | | | | | | | | Adding IRQ defintions for DaVinci DM355 and default interrupt priorities for DM355 Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * | davinci: DM646x: add interrupt number and prioritiesSudhakar Rajashekhara2009-04-272-6/+129
| | | | | | | | | | | | | | | Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * | davinci: PSC: Clear bits in MDCTL reg before setting new bitsMark A. Greer2009-04-271-11/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Clear any set bits in the 'NEXT' field of the MDCTL register in the Power and Sleep Controller (PSC) before setting any new bits. This also allows some minor cleanup by removing some no longer needed lines of code. Signed-off-by: Mark A. Greer <mgreer@mvista.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * | davinci: gpio bugfixesDavid Brownell2009-04-272-36/+69
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update the DaVinci GPIO code to work better on non-dm6446 parts, notably the dm355: - Only handle the number of GPIOs the chip actually has. So for example on dm6467, GPIO-42 is the last GPIO, and trying to use GPIO-43 now fails cleanly; or GPIO-72 on dm6446. - Enable GPIO interrupts on each 16-bit GPIO-irq bank ... previously, only the first five were enabled, so GPIO-80 and above (on dm355) wouldn't trigger IRQs. - Use the right IRQ for each GPIO bank. The wrong values were used for dm355 chips, so GPIO IRQs got routed incorrectly. - Handle up to four pairs of 16-bit GPIO banks ... previously only three were handled, so accessing GPIO-96 and up (e.g. on dm355) would oops. - Update several comments that were dm6446-specific. Verified by receiving GPIO-1 (dm9000) and GPIO-5 (msp430) IRQs on the DM355 EVM. One thing this doesn't do is handle the way some of the GPIO numbers on dm6467 are reserved but aren't valid as GPIOs. Some bitmap logic could fix that if needed. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * | davinci: add EDMA driverKevin Hilman2009-04-273-1/+1364
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Original code for 2.6.10 and 2.6.28 series done by Texas Instruments and MontaVista, but major updates and rework done by Troy Kisky and David Brownell. Cc: Sergei Shtylyov <sshtylyov@ru.mvista.com> Cc: Sudhakar Rajashekhara <sudhakar.raj@ti.com> Cc: Troy Kisky <troy.kisky@boundarydevices.com> Cc: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * | davinci: timers: use clk_get_rate()Kevin Hilman2009-04-271-3/+21
| | | | | | | | | | | | | | | | | | | | | Use clock framework instead of hard-coded CLOCK_TICK_RATE for determining timer tick frequencies. Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * | davinci: add arch_ioremap() which uses existing static mappingsKevin Hilman2009-04-2312-98/+105
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add arch-specific ioremap() which uses any existing static mappings in place of doing a new mapping. From now on, drivers should always use ioremap() instead of IO_ADDRESS(). In addition, remove the davinci_[read|write]* macros in favor of using ioremap. Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * | davinci: major rework of clock, PLL, PSC infrastructureKevin Hilman2009-04-2310-234/+402
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is a significant rework of the low-level clock, PLL and Power Sleep Controller (PSC) implementation for the DaVinci family. The primary goal is to have better modeling if the hardware clocks and features with the aim of DVFS functionality. Highlights: - model PLLs and all PLL-derived clocks - model parent/child relationships of PLLs and clocks - convert to new clkdev layer - view clock frequency and refcount via /proc/davinci_clocks Special thanks to significant contributions and testing by David Brownell. Cc: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * | davinci: add runtime CPU detection supportKevin Hilman2009-04-232-3/+75
| | | | | | | | | | | | Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * | davinci: add default Kconfig, add HAVE_IDEKevin Hilman2009-04-232-0/+1785
| | | | | | | | | | | | Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* | | [ARM] lart: fix build errorRussell King2009-04-261-0/+1
| | | | | | | | | | | | | | | | | | arch/arm/mach-sa1100/lart.c:36: error: 'PAGE_SHIFT' undeclared here (not in a function) Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | | Merge branch 'omap-fixes' of ↵Russell King2009-04-2426-447/+136
|\ \ \ | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6
| * \ \ Merge branch 'omap-clock-fixes' into omap-fixesTony Lindgren2009-04-2410-34/+112
| |\ \ \
| | * | | OMAP2/3 GPTIMER: allow system tick GPTIMER to be changed in board-*.c filesPaul Walmsley2009-04-238-12/+91
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a function omap2_gp_clockevent_set_gptimer() for board-*.c files to use in .init_irq functions to configure the system tick GPTIMER. Practical choices at this point are GPTIMER1 or GPTIMER12. Both of these timers are in the WKUP powerdomain, and so are unaffected by chip power management. GPTIMER1 can use sys_clk as a source, for applications where a high-resolution timer is more important than power management. GPTIMER12 has the special property that it has the secure 32kHz oscillator as its source clock, which may be less prone to glitches than the off-chip 32kHz oscillator. But on HS devices, it may not be available for Linux use. It appears that most boards are fine with GPTIMER1, but BeagleBoard should use GPTIMER12 when using a 32KiHz timer source, due to hardware bugs in revisions B4 and below. Modify board-omap3beagle.c to use GPTIMER12. This patch originally used a Kbuild config option to select the GPTIMER, but was changed to allow this to be specified in board-*.c files, per Tony's request. Kalle Vallo <kalle.valo@nokia.com> found a bug in an earlier version of this patch - thanks Kalle. Tested on Beagle rev B4 ES2.1, with and without CONFIG_OMAP_32K_TIMER, and 3430SDP. Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com> Cc: Kalle Valo <kalle.valo@nokia.com>
| | * | | OMAP: dmtimer: enable all timers to be wakeup eventsKevin Hilman2009-04-231-4/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | All GP timers on OMAP2/3 can generate wakeup events. The wakeup status is cleared in the PRCM interrupt handler. Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
| | * | | OMAP3 GPTIMER: fix GPTIMER12 IRQPaul Walmsley2009-04-231-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | GPTIMER12 IRQ is at IRQ 95 on OMAP3, unlike OMAP2. (ref: OMAP34xx Multimedia High Security (HS) Device Silicon Revision 3.0 Security Addendum Rev. B, SWPU119B) Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| | * | | OMAP1: clock: Typo fix for clock in omap1Arun KS2009-04-231-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Typo error when requesting for clock for dsp in omap1 Signed-off-by: Arun KS <arunks@mistralsolutions.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
| | * | | OMAP3: clock: Camera module doesn't have IDLEST bitSergio Aguirre2009-04-231-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch avoids waiting for the camera module to become ready, since it doesn't have IDLEST bit. Based on a earlier hack done by Paul Walmsley on Sep 9 2008 on linux-omap tree. Signed-off-by: Sergio Aguirre <saaguirre@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
| | * | | OMAP2xxx clock: fix broken cpu_mask codePaul Walmsley2009-04-231-9/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 8ad8ff6548f1c0bcbeaa02f274b3927c5015a921 breaks the OMAP2xxx cpu_mask code, which causes OMAP2xxx to panic on boot. Fix by removing the cpu_mask auto variable and by changing CK_242X and CK_243X to use RATE_IN_242X/RATE_IN_243X. Resolves <1>Unable to handle kernel NULL pointer dereference at virtual address 0000000c <1>pgd = c0004000 <1>[0000000c] *pgd=00000000 Internal error: Oops: 5 [#1] Modules linked in: CPU: 0 Not tainted (2.6.29-omap1 #32) PC is at omap2_clk_set_parent+0x104/0x120 LR is at omap2_clk_set_parent+0x28/0x120 Signed-off-by: Paul Walmsley <paul@pwsan.com> Tested-by: Jarkko Nikula <jarkko.nikula@nokia.com> Cc: Russell King <rmk+kernel@arm.linux.org.uk>
| | * | | OMAP2xxx clock: pre-initialize struct clks earlyPaul Walmsley2009-04-222-3/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 3f0a820c4c0b4670fb5f164baa5582e23c2ef118 breaks OMAP2xxx boot during initial propagate_rate() on osc_ck and sys_ck. Fix by pre-initializing all struct clks before running any other clock init code. Incorporates review comments from Russell King <rmk+kernel@arm.linux.org.uk>. Resolves <1>Unable to handle kernel NULL pointer dereference at virtual address 00000000 <1>pgd = c0004000 <1>[00000000] *pgd=00000000 Internal error: Oops: 5 [#1] Modules linked in: CPU: 0 Not tainted (2.6.29-omap1 #37) PC is at propagate_rate+0x10/0x60 LR is at omap2_clk_init+0x30/0x218 ... Signed-off-by: Paul Walmsley <paul@pwsan.com> Tested-by: Jarkko Nikula <jarkko.nikula@nokia.com> Cc: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | | ARM: OMAP3: Clean up spurious interrupt check logicRoger Quadros2009-04-231-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | SPURIOUSIRQ is contained in bits 31:7 of INTC_SIR, so INTC_SIR must be right shifted by 7, not 6. No change in logic, only changes for better readability. Refer to register definition of INTCPS_SIR_IRQ in OMAP3 Manual. Signed-off-by: Roger Quadros <ext-roger.quadros@nokia.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * | | | ARM: OMAP3: Fixed spurious IRQ issue for GPIO interruptsRoger Quadros2009-04-231-1/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Flush posted write to IRQSTATUS register in GPIO IRQ handler. This eliminates the below error for all peripherals that use GPIO interrupts. <4>Spurious irq 95: 0xffffffdf, please flush posted write for irq 31 Signed-off-by: Roger Quadros <ext-roger.quadros@nokia.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * | | | ARM: OMAP3: remove duplicated #includeHuang Weiyi2009-04-231-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Removed duplicated #include in arch/arm/mach-omap2/board-rx51.c. Signed-off-by: Huang Weiyi <weiyi.huang@gmail.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * | | | ARM: OMAP2/3: GPIO: do not attempt to wake-enableKevin Hilman2009-04-231-10/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The GPIO IRQ enable/disable path attempts to also enable IRQ wake support for the parent GPIO bank IRQ as well. However, since there is no 'set_wake' hook for the bank IRQs, these calls will always fail. Also, since the enable will fail on the suspend path, the disable on the resume path will trigger unbalanced enable/disable warnings. This was discovered in the suspend/resume path on OMAP3/Beagle using the gpio-keys driver which disables/re-enables GPIO IRQ wakeups in the suspend/resume path. Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * | | | ARM: OMAP2: possible division by 0Roel Kluin2009-04-231-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In linus' git tree the functions can be found at: vi arch/arm/mach-omap2/usb-tusb6010.c +200 - tusb6010_platform_retime() vi arch/arm/mach-omap2/gpmc.c +94 - gpmc_get_fclk_period() vi arch/arm/mach-omap2/usb-tusb6010.c +53 - tusb_set_async_mode() vi arch/arm/mach-omap2/usb-tusb6010.c +111 - tusb_set_sync_mode() is -ENODEV appropriate when sysclk_ps == 0? This was found by code analysis, please review. ------------------------------>8-------------8<--------------------------------- gpmc_get_fclk_period() may return 0 when gpmc_l3_clk is not enabled. This is not checked in tusb6010_platform_retime() nor in tusb_set_async_mode() it seems. In tusb_set_sync_mode() this may result in a division by zero. Signed-off-by: Roel Kluin <roel.kluin@gmail.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * | | | ARM: OMAP2: Remove defines and resource init for OMAP24XX EACJarkko Nikula2009-04-232-133/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There is no anymore legacy driver for OMAP24XX Enhanced Audio Controller in linux-omap and it was newer in mainline so cleanup these unneeded defines and initialization code. Signed-off-by: Jarkko Nikula <jarkko.nikula@nokia.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * | | | ARM: OMAP1: Fix mmc_set_power GPIO usageLadislav Michl2009-04-232-10/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Simple simplification... Signed-off-by: Ladislav Michl <ladis@linux-mips.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * | | | ARM: OMAP1: Simplify board-h2 MMC setupLadislav Michl2009-04-231-10/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Simplify board-h2 MMC setup Signed-off-by: Ladislav Michl <ladis@linux-mips.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * | | | ARM: OMAP: MMC: Remove unused power_pinLadislav Michl2009-04-232-3/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove unused power_pin Signed-off-by: Ladislav Michl <ladis@linux-mips.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * | | | ARM: OMAP: Remove old dead gpio expander codeTony Lindgren2009-04-234-235/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This should be done with GPIO calls. Patches against the mainline tree welcome to add the necessary working functionality back. Signed-off-by: Tony Lindgren <tony@atomide.com>
| * | | | ARM: OMAP: Fix for possible race condition in omap_free_dma()Santosh Shilimkar2009-04-231-7/+6
| | |/ / | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix the possible race condition in omap_free_dma(). Function omap_free_dma() sets the dev_id = -1 and then accesses the channel afterwards to clear it. But setting the dev_id=-1 makes the channel available for allocation again. So it is possible someone else can grab it and results are unpredictable. To avod this DMA channle is cleared first and then the dev_id = -1 is set. Thanks to McNeil, Sean <sean.mcneil@ti.com> for ointing out this issue. Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* | | | Merge branch 'fixes-for-linus' of git://git.monstr.eu/linux-2.6-microblazeLinus Torvalds2009-04-2418-51/+60
|\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'fixes-for-linus' of git://git.monstr.eu/linux-2.6-microblaze: microblaze: add parameter to microblaze_read() microblaze: Use CFLAGS_KERNEL instead of CFLAGS microblaze: Add STATE_SAVE_ARG_SPACE for noMMU kernel too microblaze: Do not check use_dcache microblaze: Do not use PVR configuration for broken MB version microblaze: Fix USR1/2 pvr printing message microblaze: iowrite upon timeout microblaze: Correspond CONFIG...PCMP in Makefile/Kconfig microblaze: Remove redundant variable microblaze: Move start_thread to process.c microblaze: Add missing preadv and pwritev syscalls microblaze: Add missing declaration for die and _exception func microblaze: Remove sparse error in traps.c microblaze: Move task_pt_regs up microblaze: Rename kernel_mode to pt_mode in pt_regs microblaze: Remove uncache shadow condition microblaze: Remove while(1) loop from show_regs function microblaze: Remove unneded per cpu SYSCALL_SAVE variable
| * | | | microblaze: add parameter to microblaze_read()Coly Li2009-04-231-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch modifies parameter of microblaze_read() from 'void' to 'struct clocksource *cs', which fixes compile warning for incompatible parameter type. Signed-off-by: Coly Li <coly.li@suse.de> Cc: Michal Simek <monstr@monstr.eu> Cc: Ingo Molnar <mingo@elte.hu> Signed-off-by: Michal Simek <monstr@monstr.eu>
| * | | | microblaze: Use CFLAGS_KERNEL instead of CFLAGSMichal Simek2009-04-231-4/+2
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Michal Simek <monstr@monstr.eu>
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