| Commit message (Collapse) | Author | Age | Files | Lines |
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Indent using tabs, not spaces.
Signed-off-by: Antonio Ospite <ospite@studenti.unina.it>
Acked-by: Riku Voipio <riku.voipio@iki.fi>
Signed-off-by: Richard Purdie <rpurdie@linux.intel.com>
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Remove an orphan Kconfig entry (LEDS_LP5521)
Signed-off-by: Richard Purdie <rpurdie@linux.intel.com>
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The documentation for the parameters of blink_set() was a bit hard
to find so put some where I'd expected to find it.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Richard Purdie <rpurdie@linux.intel.com>
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Add initialisation of GPIO ports for compatibility with boards with Award
BIOS (e.g. ALIX.3D3).
Signed-off-by: Tobias Mueller <Tobias_Mueller@twam.info>
Reviewed-by: Constantin Baranov <const@mimas.ru>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Richard Purdie <rpurdie@linux.intel.com>
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WARNING: drivers/leds/leds-gpio.o(.text+0x153): Section mismatch in reference from the function gpio_led_probe() to the function .devinit.text:create_gpio_led()
The function gpio_led_probe() references the function __devinit
create_gpio_led(). This is often because gpio_led_probe lacks a __devinit
annotation or the annotation of create_gpio_led is wrong.
Signed-off-by: Zhenwen Xu <helight.xu@gmail.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Richard Purdie <rpurdie@linux.intel.com>
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pattern and led current.
Allow the user application to change the wave pattern and led current by
'wave_pattern' and 'rgb_current' sysfs files.
Signed-off-by: Kim Kyuwon <q1.kim@samsung.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Richard Purdie <rpurdie@linux.intel.com>
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Change the license to 'GPL v2'
Signed-off-by: Kim Kyuwon <q1.kim@samsung.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Richard Purdie <rpurdie@linux.intel.com>
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LED_CORE_SUSPENDRESUME flag is not needed in the bd2802 driver, because
all works for suspend/resume is done in bd2802_suspend and bd2802_suspend
functions. And this patch allows bd2802 to be configured again when it
resumes from suspend.
Signed-off-by: Kim Kyuwon <q1.kim@samsung.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Richard Purdie <rpurdie@linux.intel.com>
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git://git.kernel.org/pub/scm/linux/kernel/git/vapier/blackfin
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/vapier/blackfin: (27 commits)
Blackfin: fix dma-mapping build errors
Blackfin: hook up new perf_counter_open syscall
Blackfin: drop BF535-specific text for exception 0x2A (unaligned instruction)
Blackfin: fix early crash when booting on wrong cpu
Blackfin: fix GPTMR0_CLOCKSOURCE dependency on BFIN_GPTIMERS
Blackfin: drop unused ISP1760 port1_disable from board resources
Blackfin: bf526-ezbrd: handle different SDRAM chips
Blackfin: fix typo in TRAS define in mem_init.h header
Blackfin: unify memory map headers
Blackfin: stick the CPU name into boot image name
Blackfin: update defconfigs
Blackfin: decouple unrelated cache settings to get exact behavior
Blackfin: update I-pipe patch level
Blackfin: remove obsolete mcount support from I-pipe code
Blackfin: allow CONFIG_TICKSOURCE_GPTMR0 with interrupt pipeline
Blackfin: convert interrupt pipeline to irqflags
Blackfin: allow people to select BF51x-0.1 silicon rev
Blackfin: bf526-ezbrd: set SPI flash resources to SST device
Blackfin: fix accidental reset in some boot modes
Blackfin: abstract irq14 lowering in do_irq
...
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The recent deprecation of dma_sync_{sg,single} ironically broke Blackfin
systems. This is because we don't define dma_sync_sg_for_cpu at all, so
until the DMA asm-generic conversion/cleanup is done after the next
release, simply stub out the dma_sync_sg_for_{cpu,device} functions.
Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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We don't support the BF535 at all, and the exception 0x2A text specific to
it is pretty verbose and confusing (since the behavior is simply odd), so
punt it to keep the noise down.
Signed-off-by: Yi Li <yi.li@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Make sure we process the kernel command line before poking the hardware,
so that we can process early printk. This helps ensure that if you boot
a kernel configured for a different processor, something will be left in
the log buffer.
Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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The GPTMR0_CLOCKSOURCE Kconfig option requires the gptimers framework, so
make sure it is selected when this option is enabled.
Reported-by: Peter Meerwald <pmeerw@pmeerw.net>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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The port1 disable stuff was dropped from the USB ISP1760, so update the
Blackfin boards accordingly.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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The BF526-EZBRD changed SDRAM chips between board revisions, so create a
timing table that can accommodate both.
Signed-off-by: Graf Yang <graf.yang@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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We defined SDRAM_tRAS to TRAS_4, but then wrongly defined SDRAM_tRAS_num
to 3.
Signed-off-by: Graf Yang <graf.yang@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Many aspects of the Blackfin memory map is exactly the same across all
variants. Rather than copy and paste all of these duplicated values in
each header, unify all of these into the common Blackfin memory map header
file. In the process, push down BF561 SMP specific stuff to the BF561
specific header to keep the noise down.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Rather than use "Linux" in the boot image name (as this is redundant --
the image type is already set to "linux"), use the CPU name. This makes
it fairly obvious when a wrong image is accidentally booted. Otherwise
there is no kernel output and you waste time scratching your head
wondering wtf just happened.
Signed-off-by: Robin Getz <rgetz@blackfin.uclinux.org>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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The current cache options don't really represent the hardware features.
They end up setting different aspects of the hardware so that the end
result is to turn on/off the cache. Unfortunately, when we hit cache
problems with the hardware, it's difficult to test different settings to
root cause the problem. The current settings also don't cleanly allow for
different caching behaviors with different regions of memory.
So split the configure options such that they properly reflect the settings
that are applied to the hardware.
Signed-off-by: Jie Zhang <jie.zhang@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Signed-off-by: Philippe Gerum <rpm@xenomai.org>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Signed-off-by: Philippe Gerum <rpm@xenomai.org>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Signed-off-by: Philippe Gerum <rpm@xenomai.org>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Signed-off-by: Philippe Gerum <rpm@xenomai.org>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Now that 0.1 of the BF51x is coming out, allow people to build for it.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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The BF526-EZBRD has a SST SPI flash on it, not a ST Micro.
Signed-off-by: Graf Yang <graf.yang@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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We read the SWRST (Software Reset) register to get at the last reset
state, and then we may configure the DOUBLE_FAULT bit to control behavior
when a double fault occurs. But if the lower bits of the register is
already set (like UART boot mode on a BF54x), we inadvertently make the
system reset by writing to the SYSTEM_RESET field at the same time. So
make sure the lower 4 bits are always cleared.
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Split out the optional IRQ14 lowering code to further simplify the
asm_do_IRQ() function and keep the ifdef nest under control.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Take a page from x86 and abstract the stack checking out of the
asm_do_IRQ() function so that the result is easier to digest.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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With the common IRQ code initializing much more of the irq_desc state, we
can't blindly initialize it ourselves to the local bad_irq state. If we
do, we end up wrongly clobbering many fields. So punt most of the bad irq
code as the common layers will handle the default state, and simply call
handle_bad_irq() directly when the IRQ we are processing is invalid.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Update anomaly headers to match latest released anomaly sheets.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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The BF533-EZKIT has two Flash In-System Programming devices hooked up to
the async memory bus, so add resources for the primary flashes and the
SRAMs on the devices.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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The common DSA code changed structure layout, so update the BF518F-EZBRD
resources accordingly.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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The kgdb (in multiple places) and traps code developed pretty much
identical checks for how to access different regions of the Blackfin
memory map, but each wasn't 100%, so unify them to avoid duplication,
bitrot, and bugs with edge cases.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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* git://git.infradead.org/~dwmw2/iommu-2.6.31:
intel-iommu: Fix one last ia64 build problem in Pass Through Support
VT-d: support the device IOTLB
VT-d: cleanup iommu_flush_iotlb_psi and flush_unmaps
VT-d: add device IOTLB invalidation support
VT-d: parse ATSR in DMA Remapping Reporting Structure
PCI: handle Virtual Function ATS enabling
PCI: support the ATS capability
intel-iommu: dmar_set_interrupt return error value
intel-iommu: Tidy up iommu->gcmd handling
intel-iommu: Fix tiny theoretical race in write-buffer flush.
intel-iommu: Clean up handling of "caching mode" vs. IOTLB flushing.
intel-iommu: Clean up handling of "caching mode" vs. context flushing.
VT-d: fix invalid domain id for KVM context flush
Fix !CONFIG_DMAR build failure introduced by Intel IOMMU Pass Through Support
Intel IOMMU Pass Through Support
Fix up trivial conflicts in drivers/pci/{intel-iommu.c,intr_remapping.c}
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On ia64 with CONFIG_DMAR=n and CONFIG_SWIOTLB=y (as used in
arch/ia64/configs/tiger_defconfig) there is still a link
error with iommu_pass_through listed as an undefined symbol:
arch/ia64/kernel/built-in.o: In function `pci_swiotlb_init':
(.init.text+0x7f70): undefined reference to `iommu_pass_through'
Fix it by #defining iommu_pass_through away in asm/iommu.h
Signed-off-by: Tony Luck <tony.luck@intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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Enable the device IOTLB (i.e. ATS) for both the bare metal and KVM
environments.
Signed-off-by: Yu Zhao <yu.zhao@intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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Make iommu_flush_iotlb_psi() and flush_unmaps() more readable.
Signed-off-by: Yu Zhao <yu.zhao@intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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Support device IOTLB invalidation to flush the translation cached
in the Endpoint.
Signed-off-by: Yu Zhao <yu.zhao@intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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Parse the Root Port ATS Capability Reporting Structure in the DMA
Remapping Reporting Structure ACPI table.
Signed-off-by: Yu Zhao <yu.zhao@intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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The SR-IOV spec requires that the Smallest Translation Unit and
the Invalidate Queue Depth fields in the Virtual Function ATS
capability are hardwired to 0. If a function is a Virtual Function,
then and set its Physical Function's STU before enabling the ATS.
Signed-off-by: Yu Zhao <yu.zhao@intel.com>
Acked-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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The PCIe ATS capability makes the Endpoint be able to request the
DMA address translation from the IOMMU and cache the translation
in the device side, thus alleviate IOMMU pressure and improve the
hardware performance in the I/O virtualization environment.
Signed-off-by: Yu Zhao <yu.zhao@intel.com>
Acked-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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dmar_set_interrupt feigns success when arch_setup_dmar_msi
fails, return error value.
Signed-off-by: Chris Wright <chrisw@sous-sol.org>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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In iommu_flush_write_buffer() we read iommu->gcmd before taking the
register_lock, and then we mask in the WBF bit and write it to the
register.
There is a tiny chance that something else could have _changed_
iommu->gcmd before we take the lock, but after we read it. So we could
be undoing that change.
Never actually going to have happened in practice, since nothing else
changes that register at runtime -- aside from the write-buffer flush
it's only ever touched at startup for enabling translation, etc.
But worth fixing anyway.
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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As we just did for context cache flushing, clean up the logic around
whether we need to flush the iotlb or just the write-buffer, depending
on caching mode.
Fix the same bug in qi_flush_iotlb() that qi_flush_context() had -- it
isn't supposed to be returning an error; it's supposed to be returning a
flag which triggers a write-buffer flush.
Remove some superfluous conditional write-buffer flushes which could
never have happened because they weren't for non-present-to-present
mapping changes anyway.
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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It really doesn't make a lot of sense to have some of the logic to
handle caching vs. non-caching mode duplicated in qi_flush_context() and
__iommu_flush_context(), while the return value indicates whether the
caller should take other action which depends on the same thing.
Especially since qi_flush_context() thought it was returning something
entirely different anyway.
This patch makes qi_flush_context() and __iommu_flush_context() both
return void, removes the 'non_present_entry_flush' argument and makes
the only call site which _set_ that argument to 1 do the right thing.
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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The domain->id is a sequence number associated with the KVM guest
and should not be used for the context flush. This patch replaces
the domain->id with a proper id value for both bare metal and KVM.
Signed-off-by: Yu Zhao <yu.zhao@intel.com>
Acked-by: Weidong Han <weidong.han@intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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