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* Merge branch 'devel' of master.kernel.org:/home/rmk/linux-2.6-armLinus Torvalds2009-06-2257-222/+5269
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm: (49 commits) [ARM] idle: clean up pm_idle calling, obey hlt_counter [ARM] S3C: Fix gpio-config off-by-one bug [ARM] S3C64XX: add to_irq() support for EINT() GPIO [ARM] S3C64XX: clock.c: fix typo in usb-host clock ctrlbit [ARM] S3C64XX: fix HCLK gate defines [ARM] Update mach-types [ARM] wire up rt_tgsigqueueinfo and perf_counter_open OMAP2 clock/powerdomain: off by 1 error in loop timeout comparisons OMAP3 SDRC: set FIXEDDELAY when disabling SDRC DLL OMAP3: Add support for DPLL3 divisor values higher than 2 OMAP3 SRAM: convert SRAM code to use macros rather than magic numbers OMAP3 SRAM: add more comments on the SRAM code OMAP3 clock/SDRC: program SDRC_MR register during SDRC clock change OMAP3 clock: add a short delay when lowering CORE clk rate OMAP3 clock: initialize SDRC timings at kernel start OMAP3 clock: remove wait for DPLL3 M2 clock to stabilize [ARM] Add old Feroceon support to compressed/head.S [ARM] 5559/1: Limit the stack unwinding caused by a kthread exit [ARM] 5558/1: Add extra checks to ARM unwinder to avoid tracing corrupt stacks [ARM] 5557/1: Discard some ARM.ex*.*exit.text sections when !HOTPLUG or !HOTPLUG_CPU ...
| * [ARM] idle: clean up pm_idle calling, obey hlt_counterRussell King2009-06-221-26/+32
| | | | | | | | | | | | | | | | | | | | | | | | pm_idle is used by infrastructure (eg, cpuidle) which expects architectures to call it in a certain way. Arrange for ARM to follow x86's lead on this and call pm_idle() with interrupts already disabled. However, we expect pm_idle() to enable interrupts before it returns. Also, OMAP wants to be able to disable hlt-ing, so allow hlt_counter to prevent all calls to pm_idle. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * Merge branch 'next-s3c' of git://aeryn.fluff.org.uk/bjdooks/linux into develRussell King2009-06-224-7/+13
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| | * [ARM] S3C: Fix gpio-config off-by-one bugMarek Szyprowski2009-06-221-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | Fix gpio-config off-by-one bug. Without this patch, touching GPA0 pin on S3C64XX platform causes kernel oops. Reviewed-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
| | * [ARM] S3C64XX: add to_irq() support for EINT() GPIOMarek Szyprowski2009-06-221-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | N group Add to_irq() function to onvert gpio to irq for external interrupt group (GPN). Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
| | * [ARM] S3C64XX: clock.c: fix typo in usb-host clock ctrlbitPeter Korsgaard2009-06-221-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | The usb-host clock was using the wrong define (the SCLK enable for the usb-host-bus) to change the HCLK register instead of the HCLK_UHOST bit. Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
| | * [ARM] S3C64XX: fix HCLK gate definesPeter Korsgaard2009-06-221-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | A few typos seems to have sneaked into the HCLK gate defines, causing the usb host clock to not get enabled. Fix them according to the reference manual and throw in the 3d accel bit for good measure. Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
| * | [ARM] Update mach-typesRussell King2009-06-201-2/+37
| | | | | | | | | | | | Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | [ARM] wire up rt_tgsigqueueinfo and perf_counter_openRussell King2009-06-202-0/+4
| | | | | | | | | | | | Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | Merge branch 'omap-clock-for-next' of git://git.pwsan.com/linux-2.6 into develRussell King2009-06-207-62/+163
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| | * | OMAP2 clock/powerdomain: off by 1 error in loop timeout comparisonsRoel Kluin2009-06-192-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | with while (i++ < MAX_CLOCK_ENABLE_WAIT); i can reach MAX_CLOCK_ENABLE_WAIT + 1 after the loop, so if (i == MAX_CLOCK_ENABLE_WAIT) that's still success. Signed-off-by: Roel Kluin <roel.kluin@gmail.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
| | * | OMAP3 SDRC: set FIXEDDELAY when disabling SDRC DLLPaul Walmsley2009-06-191-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Correspondence with the TI OMAP hardware team indicates that SDRC_DLLA_CTRL.FIXEDDELAY should be initialized to 0x0f. This number was apparently derived from process validation. This is only used when the SDRC DLL is unlocked (e.g., SDRC clock frequency less than 83MHz). Signed-off-by: Paul Walmsley <paul@pwsan.com>
| | * | OMAP3: Add support for DPLL3 divisor values higher than 2Tero Kristo2009-06-194-14/+15
| | | | | | | | | | | | | | | | | | | | | | | | Previously only 1 and 2 was supported. This is needed for DVFS VDD2 control. Signed-off-by: Tero Kristo <tero.kristo@nokia.com>
| | * | OMAP3 SRAM: convert SRAM code to use macros rather than magic numbersPaul Walmsley2009-06-191-15/+38
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Convert omap3_sram_configure_core_dpll() to use macros rather than magic numbers. Signed-off-by: Paul Walmsley <paul@pwsan.com>
| | * | OMAP3 SRAM: add more comments on the SRAM codePaul Walmsley2009-06-191-21/+24
| | | | | | | | | | | | | | | | | | | | | | | | Clean up comments and copyrights on the CORE DPLL3 M2 divider change code. Signed-off-by: Paul Walmsley <paul@pwsan.com>
| | * | OMAP3 clock/SDRC: program SDRC_MR register during SDRC clock changePaul Walmsley2009-06-194-8/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Program the SDRC_MR_0 register as well during SDRC clock changes. This register allows selection of the memory CAS latency. Some SDRAM chips, such as the Qimonda HYB18M512160AF6, have a lower CAS latency at lower clock rates. Signed-off-by: Paul Walmsley <paul@pwsan.com>
| | * | OMAP3 clock: add a short delay when lowering CORE clk ratePaul Walmsley2009-06-194-18/+44
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When changing the SDRAM clock from 166MHz to 83MHz via the CORE DPLL M2 divider, add a short delay before returning to SDRAM to allow the SDRC time to stabilize. Without this delay, the system is prone to random panics upon re-entering SDRAM. This time delay varies based on MPU frequency. At 500MHz MPU frequency at room temperature, 64 loops seems to work okay; so add another 32 loops for environmental and process variation. Signed-off-by: Paul Walmsley <paul@pwsan.com>
| | * | OMAP3 clock: initialize SDRC timings at kernel startPaul Walmsley2009-06-192-3/+36
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On the OMAP3, initialize SDRC timings when the kernel boots. This ensures that the kernel is running with known, optimized SDRC timings, rather than whatever was configured by the bootloader. Signed-off-by: Paul Walmsley <paul@pwsan.com>
| | * | OMAP3 clock: remove wait for DPLL3 M2 clock to stabilizePaul Walmsley2009-06-191-3/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The original CDP kernel that this code comes from waited for 0x800 loops after switching the CORE DPLL M2 divider. This does not appear to be necessary. Signed-off-by: Paul Walmsley <paul@pwsan.com>
| * | | Merge branch 'for-rmk' of git://git.marvell.com/orion into develRussell King2009-06-194-3/+19
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| | * | | [ARM] Add old Feroceon support to compressed/head.SJoonyoung Shim2009-06-191-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch supports the cache handling for some old Feroceon cores for which the CPU ID is like 0x41159260. This is a complement to commit ab6d15d50637fc25ee941710b23fed09ceb28db3. Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com> Signed-off-by: Nicolas Pitre <nico@marvell.com>
| | * | | [ARM] orion5x: register the crypto device on SOCs that support itNicolas Pitre2009-06-152-2/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Not all Orion variants do implement the crypto unit. Signed-off-by: Nicolas Pitre <nico@marvell.com>
| | * | | [ARM] orion5x: increment window counter after adding sram mappingSebastian Andrzej Siewior2009-06-151-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Without incrementing the counter the next window setup will overwrite the SRAM mapping. Signed-off-by: Sebastian Andrzej Siewior <sebastian@breakpoint.cc> Signed-off-by: Nicolas Pitre <nico@marvell.com>
| * | | | [ARM] 5559/1: Limit the stack unwinding caused by a kthread exitCatalin Marinas2009-06-191-1/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When a kthread function returns, it branches to do_exit(). However, the unwinding information isn't valid anymore and any stack trace caused by do_exit() may be incorrect. This patch adds a kernel_thread_exit() function and annotated with '.cantunwind' so that the unwinder stops when reaching it. Tested-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | | [ARM] 5558/1: Add extra checks to ARM unwinder to avoid tracing corrupt stacksCatalin Marinas2009-06-191-10/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There are situations where the unwinder goes beyond stack boundaries and unwinds random data. This patch moves the stack boundaries check after the unwind_exec_insn() call and adds an extra check for possible infinite loops (like "mov pc, lr" with pc == lr). The patch also fixes a bug in the unwind instructions interpreter. The 0xb0 instruction can only set PC to LR if this wasn't already set by a previous instruction (this is used on exceptions taken while in kernel mode where svc_entry is annotated with ".save {r0 - pc}"). Tested-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | | [ARM] 5557/1: Discard some ARM.ex*.*exit.text sections when !HOTPLUG or ↵Catalin Marinas2009-06-191-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | !HOTPLUG_CPU Not discarding these sections when hotplug isn't available prevents the kernel from building. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | | [ARM] 5540/1: 32-bit Thumb-2 {ld,st}{m,rd} alignment fault fixup supportGeorge G. Davis2009-06-191-20/+119
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | From: Min Zhang <mzhang@mvista.com> Add alignment fault fixup support for 32-bit Thumb-2 LDM, LDRD, POP, PUSH, STM and STRD instructions. Alignment fault fixup support for the remaining 32-bit Thumb-2 load/store instruction cases is not included since ARMv6 and later processors include hardware support for loads and stores of unaligned words and halfwords. Signed-off-by: Min Zhang <mzhang@mvista.com> Signed-off-by: George G. Davis <gdavis@mvista.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | | [ARM] 5556/1: Fix the irq_desc.cpu referencesCatalin Marinas2009-06-192-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The cpu member of struct irq_desc was recently renamed to node. The patch renames the ARM references to the old member. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | | [ARM] 5555/1: RealView: Include asm/smp_twd.h in realview-pbx.cCatalin Marinas2009-06-191-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This header file is needed for twd_base. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | | Merge branch 'next-s3c' of git://aeryn.fluff.org.uk/bjdooks/linux into develRussell King2009-06-1819-6/+3931
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| | * | | [ARM] S3C2440: Merge branch next-mini2440 into next-s3cBen Dooks2009-06-165-0/+2832
| | |\ \ \ | | | | | | | | | | | | | | | | | | Merge branch 'next-mini2440' into next-s3c
| | | * | | [ARM] MINI2440: Cleanup duplicated header includesBen Dooks2009-06-151-3/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove duplicate mach headers for gpio. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
| | | * | | [ARM] MINI2440: Create a mini2440_defconfig fileMichel Pollet2009-06-151-0/+2097
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Just a working, starting point config file for the board. Signed-off-by: Michel Pollet <buserror@gmail.com> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
| | | * | | [ARM] MINI2440: Document the mini2440= kernel parameterMichel Pollet2009-06-151-0/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Also explains why the touchscreen support is not present, and were to find a working one... Signed-off-by: Michel Pollet <buserror@gmail.com> [ben-linux@fluff.org: Fix header description] Signed-off-by: Ben Dooks <ben-linux@fluff.org>
| | | * | | [ARM] MINI2440: Add machine supportMichel Pollet2009-06-153-0/+717
| | | |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The MINI2440 is a chinese made s3c2440 development board with a large set of peripherals. This patch provides machine support for almost all the features of the board. Since it can come with various "options" fitted, a kernel parameter is used to specify the lcd size, backlight control and touchscreen. Signed-off-by: Michel Pollet <buserror@gmail.com> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
| | * | | [ARM] GTA02/FreeRunner: Add machine definitionAndy Green2009-06-165-0/+751
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch introduces the Openmoko GTA02 machine definition. Much of the code is based on Harald Welte's work, although it has been largely rewritten several times. This is intended to be the minimum machine definition to boot and be able to run a rootfs from NAND on GTA02 / FreeRunner. It does not bring up the framebuffer / Glamo and lacks many other peripheral drivers from outside the SoC. But once we have this basis in mainline kernel, we will be able to introduce the other drivers and add them here. Thanks to Sven Rebhan <odinshorse@googlemail.com> for his fixes to this patch (Kconfig and defconfig files). Signed-off-by: Andy Green <andy@warmcat.com> Signed-off-by: Nelson Castillo <arhuaco@freaks-unidos.net> [ben-linux@fluff.org: Fix the GPIO definitions] Signed-off-by: Ben Dooks <ben-linux@fluff.org>
| | * | | [ARM] S3C64XX: Initial support for DVFSMark Brown2009-06-163-1/+268
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch provides initial support for CPU frequency scaling on the Samsung S3C ARM processors. Currently only S3C6410 processors are supported, though addition of another data table with supported clock rates should be sufficient to enable support for further CPUs. Use the regulator framework to provide optional support for DVFS in the S3C cpufreq driver. When a software controllable regulator is configured the driver will use it to lower the supply voltage when running at a lower frequency, giving improved power savings. When regulator support is disabled or no regulator can be obtained for VDDARM the driver will fall back to scaling only the frequency. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
| | * | | [ARM] S3C64XX: Add device for IISv4 portMark Brown2009-06-162-0/+17
| | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
| | * | | [ARM] S3C64XX: Provide device for IIS portsMark Brown2009-06-163-1/+56
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This allows the S3C64XX IIS drivers to be converted to the standard driver model and allows fixes there for problems with attempting to acquire the clocks for the IIS blocks via the clock API. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
| | * | | [ARM] S3C24XX: remove duplicated #includeHuang Weiyi2009-06-161-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove duplicated #include in arch/arm/mach-s3c2410/usb-simtec.c. Signed-off-by: Huang Weiyi <weiyi.huang@gmail.com> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
| | * | | [ARM] VIC: Fix resume sources usageBen Dooks2009-06-161-2/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The resume_mask wasn't being checked in vic_set_wake() to see if the IRQ was a valid wakeup source. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
| | * | | s3cmci: fix dma configuration callBen Dooks2009-06-151-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This was missed in the DMA changes during the s3c24xx updates in commit 8970ef47d56fd3db28ee798b9d400caf08abd924. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
| * | | | Merge branch 'for-rmk' of ↵Russell King2009-06-1815-82/+912
| |\ \ \ \ | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/ycmiao/pxa-linux-2.6 into devel
| | * | | | MAINTAINERS: add entry for Mitac Mio A701 boardRobert Jarzmik2009-06-161-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add maintainer entry for Mitac Mio A701 board. Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
| | * | | | MAINTAINERS: Update entry with file and SCM for EZXStefan Schmidt2009-06-161-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add file entry for easier mainatiner detection and make SCM more visible. Signed-off-by: Stefan Schmidt <stefan@datenfreihafen.org> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
| | * | | | MAINTAINERS: add entry for Palm Treo680Tomas 'Sleep_Walker' Cech2009-06-161-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Tomáš Čech <sleep_walker@suse.cz> Signed-off-by: Eric Miao <eric.miao@marvell.com>
| | * | | | [ARM] pxa: register wm8731 explicitly for corgi and poodleMark Brown2009-06-164-72/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The wm8731 driver has been converted to register using the standard I2C device registration mechanism so we can now do the registration in the arch/arm code as normal. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
| | * | | | [ARM] pxa/mioa701: add V3 gain configuration for Maxim 1586 voltage regulatorPhilipp Zabel2009-06-161-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Maxim 1586 V3 gain can be configured by external resistors (R24, R25) connected to the FB3 pin. To avoid accidental overvoltage, it now requires this gain to be configured explicitly. Signed-off-by: Philipp Zabel <philipp.zabel@gmail.com> Acked-by: Robert Jarzmik <robert.jarzmik@free.fr> Signed-off-by: Eric Miao <eric.miao@marvell.com>
| | * | | | [ARM] pxa/mioa701: add Maxim 1586 voltage regulatorRobert Jarzmik2009-06-161-0/+41
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On this board, the PXA272 CPU voltage VCC_CORE is provided by a Maxim 1586 voltage regulator. Use the regulator framework to provide VCC_CORE control. When cpufreq will be updated to ask for vcc_core, this will optimize power drained by the board. Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr> Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Eric Miao <eric.miao@marvell.com>
| | * | | | [ARM] pxa/hx4700: add Maxim 1587A voltage regulatorPhilipp Zabel2009-06-161-0/+41
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On this board, the PXA270 CPU voltage VCC_CORE is provided by a Maxim 1587A voltage regulator configured to provide 1.55 V maximum voltage for 624 MHz operation. Signed-off-by: Philipp Zabel <philipp.zabel@gmail.com> Signed-off-by: Eric Miao <eric.miao@marvell.com>
generated by cgit v1.2.3 (git 2.25.1) at 2024-07-15 13:04:09 +0000