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Besides the PPC SoCs, the QorIQ DPAA FMan is also present on ARM SoCs,
moving the device tree binding document into the bindings/net folder.
Signed-off-by: Madalin Bucur <madalin.bucur@nxp.com>
Signed-off-by: Rob Herring <robh@kernel.org>
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Signed-off-by: Otto Kekäläinen <otto@seravo.fi>
Signed-off-by: Rob Herring <robh@kernel.org>
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The FMan contains internal PHY devices used for SGMII connections
to external PHYs. When these PHYs are in use a reference is needed
for both the external PHY and the internal one. For the external
PHY phy-handle provides the reference. For the internal PHY a new
handle is required.
In dTSEC, the internal PHY is a TBI (Ten Bit Interface) PHY,
the handle used will be tbi-handle.
In mEMAC, the internal PHY is a PCS (Physical Coding Sublayer) PHY,
the handle used will be pcsphy-handle.
Signed-off-by: Igal Liberman <igal.liberman@freescale.com>
Signed-off-by: Scott Wood <oss@buserror.net>
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This patch adds two boolean properties to FMan Port.
FMan has 3 types of ports:
- 1G ports
By default, all ports support 1G rate
- 10G Ports
Port which use 10G hardware, and configured as 10G
- 10G Best effort ports
Ports which use 1G hardware, configured as 10G, in this case,
the rate is not guaranteed.
The new properties help to distinguish the different type of ports.
Signed-off-by: Igal Liberman <igal.liberman@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
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This binding is for FMan MDIO, it covers FMan v2 & FMan v3.
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
[scottwood@freescale.com: mark interrupts required only for external]
Signed-off-by: Scott Wood <scottwood@freescale.com>
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The clock name "fmanclk" was given in the example, but not specified
in the binding itself. Made clock-names mandatory as otherwise there's
not much point having it.
Added a reference to the fsl,qman and fsl,bman properties proposed
in http://patchwork.ozlabs.org/patch/407034/ and
http://patchwork.ozlabs.org/patch/407035/
Signed-off-by: Scott Wood <scottwood@freescale.com>
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The Frame Manager (FMan) combines the Ethernet network interfaces with
packet distribution logic to provide intelligent distribution and
queuing decisions for incoming traffic at line rate.
This binding document describes Freescale's Frame Manager hardware
attributes that are used by the Frame Manager driver for its basic
initialization and configuration.
Signed-off-by: Igal Liberman <Igal.Liberman@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
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