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* ARC: Fix typosBjorn Helgaas2024-04-011-2/+2
| | | | | | | | Fix typos, most reported by "codespell arch/arc". Only touches comments, no code changes. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Signed-off-by: Vineet Gupta <vgupta@kernel.org>
* ARC: -Wmissing-prototype warning fixesVineet Gupta2023-08-131-0/+2
| | | | | | | | | | | Anrd reported [1] new compiler warnings due to -Wmissing-protype. These are for non static functions mostly used in asm code hence not exported already. Fix this by adding the prototypes. [1] https://lore.kernel.org/lkml/20230810141947.1236730-1-arnd@kernel.org Reviewed-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Vineet Gupta <vgupta@kernel.org>
* ARC: switch to generic bitopsVineet Gupta2021-08-241-14/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | - !LLSC now only needs a single spinlock for atomics and bitops - Some codegen changes (slight bloat) with generic bitops 1. code increase due to LD-check-atomic paradigm vs. unconditonal atomic (but dirty'ing the cache line even if set already). So despite increase, generic is right thing to do. 2. code decrease (but use of costlier instructions such as DIV vs. shifts based math) due to signed arithmetic. This needs to be revisited seperately. arc: static inline int test_bit(unsigned int nr, const volatile unsigned long *addr) ^^^^^^^^^^^^ generic: static inline int test_bit(int nr, const volatile unsigned long *addr) ^^^ Link: https://lore.kernel.org/r/20180830135749.GA13005@arm.com Signed-off-by: Will Deacon <will@kernel.org> Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org> [vgupta: wrote patch based on Will's poc, analysed codegen diffs] Signed-off-by: Vineet Gupta <vgupta@kernel.org>
* treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500Thomas Gleixner2019-06-191-4/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | Based on 2 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation # extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 4122 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Enrico Weigelt <info@metux.net> Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Reviewed-by: Allison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190604081206.933168790@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* ARC: IRQ: Do not use hwirq as virq and vice versaYuriy Kolerov2016-11-081-2/+2
| | | | | | | | | | | | | | | | | This came up when reviewing code to address missing IRQ affinity setting in AXS103 platform and/or implementing hierarchical IRQ domains - smp_ipi_irq_setup() callers pass hwirq but in turn calls request_percpu_irq() which expects a linux virq. So invoke irq_find_mapping() to do the conversion (also explicitify this in code by renaming the args appropriately) - idu_of_init()/idu_cascade_isr() were similarly using linux virq where hwirq is expected, so do the conversion using irqd_to_hwirq() helper Signed-off-by: Yuriy Kolerov <yuriy.kolerov@synopsys.com> [vgupta: made changelog a bit concise a bit] Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* Fix typosAndrea Gelmini2016-05-301-1/+1
| | | | | Signed-off-by: Andrea Gelmini <andrea.gelmini@gelma.net> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* ARC: rename smp operation init_irq_cpu() to init_per_cpu()Noam Camus2015-12-171-2/+2
| | | | | | | | | This will better reflect its description i.e. "any needed setup..." and not just do an "IPI request". Signed-off-by: Noam Camus <noamc@ezchip.com> Acked-by: Vineet Gupta <vgupta@synopsys.com> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* ARC: smp: Introduce smp hook @init_irq_cpu called for all coresVineet Gupta2015-10-281-0/+3
| | | | | | | | | | | Note this is not part of platform owned static machine_desc, but more of device owned plat_smp_ops (rather misnamed) which a IPI provider or some such typically defines. This will help us seperate out the IPI registration from platform specific init_cpu_smp() into device specific init_irq_cpu() Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* ARC: smp: Introduce smp hook @init_early_smp for Master coreVineet Gupta2015-10-281-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds a platform agnostic early SMP init hook which is called on Master core before calling setup_processor() setup_arch() smp_init_cpus() smp_ops.init_early_smp() ... setup_processor() How this helps: - Used for one time init of certain SMP centric IP blocks, before calling setup_processor() which probes various bits of core, possibly including this block - Currently platforms need to call this IP block init from their init routines, which doesn't make sense as this is specific to ARC core and not platform and otherwise requires copy/paste in all (and hence a possible point of failure) e.g. MCIP init is called from 2 platforms currently (axs10x and sim) which will go away once we have this. This change only adds the hooks but they are empty for now. Next commit will populate them and remove the explicit init calls from platforms. Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* ARC: Allow SMP kernel to build/boot on UP-only infrastructureVineet Gupta2014-09-271-1/+9
| | | | | | | | | | | | | In light of recent SNAFU with SMP build, allow simple platform to build as SMP but run UP. * Remove the dependence on simulation SMP extension to enable quick build/test iterations of SMP kernel. * In absence of platform SMP registration, prevent the NULL smp feature name from borkign the system Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* ARC: [SMP] IPI ACK interface doesn't need "self" cpu-idVineet Gupta2013-12-231-2/+2
| | | | | | | | The interface is confusing, it feels like we are getting "sender" info, whereas it is the "receiver", which can very well be retrived by smp_processor_id(), if need be. Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* ARC: [SMP] cpumask not needed in IPI send pathVineet Gupta2013-12-231-2/+2
| | | | | | | | | | | | | | | The current IPI sending callstack needlessly involves cpumask. arch_send_call_function_single_ipi(cpu) / smp_send_reschedule(cpu) ipi_send_msg(cpumask_of(cpu)) --> [cpu to cpumask] plat_smp_ops.ipi_send(callmap) for_each_cpu(callmap) --> [cpuask to cpu] do_plat_specific_ipi_PER_CPU Given that current backends are not capable of 1:N IPIs, lets simplify the interface for now, by keeping "a" cpu all along. Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* arc: remove '__init' for first_lines_of_secondary()Chen Gang2013-11-061-1/+1
| | | | | | | | | | | | | | | | | first_lines_of_secondary() is a '__init' function, but it may be called by __cpu_up() by _cpu_up() by cpu_up() which is a normal export symbol function. So recommend to remove '__init'. The related warning (with allmodconfig): MODPOST vmlinux.o WARNING: vmlinux.o(.text+0x315c): Section mismatch in reference from the function __cpu_up() to the function .init.text:first_lines_of_secondary() The function __cpu_up() references the function __init first_lines_of_secondary(). This is often because __cpu_up lacks a __init annotation or the annotation of first_lines_of_secondary is wrong. Signed-off-by: Chen Gang <gang.chen@asianux.com>
* ARC: [Review] Multi-platform image #7: SMP common code to use callbacksVineet Gupta2013-02-151-21/+15
| | | | | | | | | | | | This again is for switch from singleton platform SMP API to multi-platform paradigm Platform code is not yet setup to populate the callbacks, that happens in next commit Signed-off-by: Vineet Gupta <vgupta@synopsys.com> Cc: Arnd Bergmann <arnd@arndb.de> Acked-by: Arnd Bergmann <arnd@arndb.de>
* ARC: [Review] Multi-platform image #3: switch to board callbackVineet Gupta2013-02-151-5/+0
| | | | | | | | -platform API is retired and instead callbacks are used Signed-off-by: Vineet Gupta <vgupta@synopsys.com> Cc: Arnd Bergmann <arnd@arndb.de> Acked-by: Arnd Bergmann <arnd@arndb.de>
* ARC: SMP supportVineet Gupta2013-02-151-0/+107
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ARC common code to enable a SMP system + ISS provided SMP extensions. ARC700 natively lacks SMP support, hence some of the core features are are only enabled if SoCs have the necessary h/w pixie-dust. This includes: -Inter Processor Interrupts (IPI) -Cache coherency -load-locked/store-conditional ... The low level exception handling would be completely broken in SMP because we don't have hardware assisted stack switching. Thus a fair bit of this code is repurposing the MMU_SCRATCH reg for event handler prologues to keep them re-entrant. Many thanks to Rajeshwar Ranga for his initial "major" contributions to SMP Port (back in 2008), and to Noam Camus and Gilad Ben-Yossef for help with resurrecting that in 3.2 kernel (2012). Note that this platform code is again singleton design pattern - so multiple SMP platforms won't build at the moment - this deficiency is addressed in subsequent patches within this series. Signed-off-by: Vineet Gupta <vgupta@synopsys.com> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Rajeshwar Ranga <rajeshwar.ranga@gmail.com> Cc: Noam Camus <noamc@ezchip.com> Cc: Gilad Ben-Yossef <gilad@benyossef.com>
* ARC: Atomic/bitops/cmpxchg/barriersVineet Gupta2013-02-111-0/+34
This covers the UP / SMP (with no hardware assist for atomic r-m-w) as well as ARC700 LLOCK/SCOND insns based. Signed-off-by: Vineet Gupta <vgupta@synopsys.com>