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* ARC: mm: compute TLB size as needed from ways * setsVineet Gupta2015-10-172-7/+6
* ARC: mm: MMU v1..v3 only selectable for ARCompact ISA based coresVineet Gupta2015-10-171-0/+4
* ARC: make write_aux_reg safer against macro substitutionVineet Gupta2015-10-171-1/+1
* ARC: [arcompact] entry.S: Elide extra check/branch in exception ret pathVineet Gupta2015-10-171-12/+6
* ARC: [arcompact] entry.S: Document preemption games for L2 intrVineet Gupta2015-10-171-1/+14
* ARC: [arcompact] entry.S: Improve early return from exceptionVineet Gupta2015-10-172-7/+8
* ARC: [arcompact] don't check for hard isr calling local_irq_enable()Vineet Gupta2015-10-172-69/+18
* ARCv2: mm: THP: flush_pmd_tlb_range make SMP safeVineet Gupta2015-10-172-2/+30
* ARCv2: mm: THP: Implement flush_pmd_tlb_range() optimizationVineet Gupta2015-10-172-0/+24
* ARCv2: mm: THP: boot validation/reportingVineet Gupta2015-10-171-1/+7
* ARCv2: mm: THP supportVineet Gupta2015-10-176-6/+192
* ARC: mm: Introduce PTE_SPECIALVineet Gupta2015-10-091-2/+5
* ARC: mm: pte flags comsetic cleanups, commentsVineet Gupta2015-10-092-22/+17
* ARC: mm: switch pgtable_to to pte_t *Vineet Gupta2015-10-092-5/+5
* Merge branch 'strscpy' of git://git.kernel.org/pub/scm/linux/kernel/git/cmetc...Linus Torvalds2015-10-041-0/+1
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| * Make asm/word-at-a-time.h available on all architecturesChris Metcalf2015-07-081-0/+1
* | genirq: Remove irq argument from irq flow handlersThomas Gleixner2015-09-161-1/+1
* | ARCv2: [axs103_smp] Reduce clk for SMP FPGA configsVineet Gupta2015-09-111-0/+2
* | Merge branch 'locking-core-for-linus' of git://git.kernel.org/pub/scm/linux/k...Linus Torvalds2015-09-031-2/+6
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| * | atomic: Collapse all atomic_{set,clear}_mask definitionsPeter Zijlstra2015-07-271-10/+0
| * | atomic: Provide atomic_{or,xor,and}Peter Zijlstra2015-07-271-1/+0
| * | arc: Provide atomic_{or,xor,and}Peter Zijlstra2015-07-271-2/+17
* | | Merge branch 'irq-core-for-linus' of git://git.kernel.org/pub/scm/linux/kerne...Linus Torvalds2015-09-011-1/+2
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| * | | arc/irq: Prepare idu_cascade_isr for irq argument removalThomas Gleixner2015-07-311-1/+2
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* | | ARCv2: entry: Fix reserved handlerVineet Gupta2015-08-271-7/+2
* | | ARCv2: perf: Finally introduce HS perf unitVineet Gupta2015-08-272-2/+6
* | | ARCv2: perf: SMP supportAlexey Brodkin2015-08-271-15/+54
* | | ARCv2: perf: implement exclusion of event counting in user or kernel modeAlexey Brodkin2015-08-272-2/+17
* | | ARCv2: perf: Support sampling events using overflow interruptsAlexey Brodkin2015-08-272-10/+126
* | | ARCv2: perf: implement "event_set_period"Alexey Brodkin2015-08-271-16/+63
* | | ARC: perf: cap the number of counters to hardware max of 32Vineet Gupta2015-08-272-5/+6
* | | ARC: Eliminate some ARCv2 specific code for ARCompact buildVineet Gupta2015-08-212-28/+34
* | | ARC: add/fix some comments in code - no functional changeVineet Gupta2015-08-206-22/+23
* | | ARC: change some branchs to jumps to resolve linkage errorsYuriy Kolerov2015-08-203-9/+9
* | | ARC: ensure futex ops are atomic in !LLSC configVineet Gupta2015-08-201-0/+12
* | | ARC: Enable HAVE_FUTEX_CMPXCHGVineet Gupta2015-08-201-0/+1
* | | ARC: make futex_atomic_cmpxchg_inatomic() return bimodalVineet Gupta2015-08-201-9/+11
* | | ARC: futex cosmeticsVineet Gupta2015-08-201-8/+9
* | | ARC: add barriers to futex codeVineet Gupta2015-08-201-11/+10
* | | ARCv2: IOC: Allow boot time disableAlexey Brodkin2015-08-201-3/+4
* | | ARCv2: SLC: Allow boot time disableVineet Gupta2015-08-201-2/+19
* | | ARCv2: Support IO Coherency and permutations involving L1 and L2 cachesAlexey Brodkin2015-08-204-16/+125
* | | ARC: Enable optimistic spinning for LLSC configVineet Gupta2015-08-111-0/+1
* | | ARCv2: spinlock/rwlock/atomics: reduce 1 instruction in exponential backoffVineet Gupta2015-08-072-4/+2
* | | ARC: Make pt_regs regs unsignedVineet Gupta2015-08-052-37/+37
* | | ARCv2: spinlock/rwlock: Reset retry delay when starting a new spin-wait cycleVineet Gupta2015-08-041-3/+3
* | | ARCv2: spinlock/rwlock/atomics: Delayed retry of failed SCOND with exponentia...Vineet Gupta2015-08-044-4/+347
* | | ARC: LLOCK/SCOND based rwlockVineet Gupta2015-08-042-10/+166
* | | ARC: LLOCK/SCOND based spin_lockVineet Gupta2015-08-041-7/+69
* | | ARC: refactor atomic inline asm operands with symbolic namesVineet Gupta2015-08-041-15/+17
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