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* ARM: mvebu: Relocate Armada 370/XP PCIe device tree nodesEzequiel Garcia2013-08-061-34/+33
| | | | | | | | | | | | | | | | | | Now that mbus has been added to the device tree, it's possible to move the PCIe nodes out of internal registers, placing it directly below the mbus. This is a more accurate representation of the hardware. Moving the PCIe nodes, we now need to introduce an extra cell to encode the window target ID and attribute. Since this depends on the PCIe port, we split the ranges translation entries, to correspond to each MBus window. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-by: Andrew Lunn <andrew@lunn.ch> Tested-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* ARM: mvebu: Relocate Armada 370/XP DeviceBus device tree nodesEzequiel Garcia2013-08-061-29/+30
| | | | | | | | | | | Now that mbus has been added to the device tree, it's possible to move the DeviceBus out of internal registers, placing it directly below the mbus. This is a more accurate representation of the hardware. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-by: Andrew Lunn <andrew@lunn.ch> Tested-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* ARM: mvebu: Add BootROM to Armada 370/XP device treeEzequiel Garcia2013-08-061-1/+2
| | | | | | | | | | | In order to access the SoC BootROM, we need to declare a mapping (through a ranges property). The mbus driver will use this property to allocate a suitable address decoding window. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-by: Andrew Lunn <andrew@lunn.ch> Tested-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* ARM: mvebu: Add MBus to Armada 370/XP device treeEzequiel Garcia2013-08-061-3/+1
| | | | | | | | | | | | | | | | | | | | The Armada 370/XP SoC family has a completely configurable address space handled by the MBus controller. This patch introduces the device tree layout of MBus, making the 'soc' node as mbus-compatible. Since every peripheral/controller is a child of this 'soc' node, this makes all of them sit behind the mbus, thus describing the hardware accurately. A translation entry has been added for the internal-regs mapping. This can't be done in the common armada-370-xp.dtsi because A370 and AXP have different addressing width. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-by: Andrew Lunn <andrew@lunn.ch> Tested-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* ARM: mvebu: Use the preprocessor on Armada 370/XP device tree filesEzequiel Garcia2013-08-061-1/+1
| | | | | | | Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-by: Andrew Lunn <andrew@lunn.ch> Tested-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* arm: mvebu: armada-xp-db: ensure PCIe range is specifiedThomas Petazzoni2013-06-061-0/+1
| | | | | | | | | | | | | | The ranges DT entry needed by the PCIe controller is defined at the SoC .dtsi level. However, some boards have a NOR flash, and to support it, they need to override the SoC-level ranges property to add an additional range. Since PCIe and NOR support came separately, some boards were not properly changed to include the PCIe range in their ranges property at the .dts level. This commit fixes those platforms. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* ARM: mvebu: Add support for NOR flash device on Armada XP-DB boardEzequiel Garcia2013-05-191-0/+32
| | | | | | | | | | | | | | | | The Armada XP Development Board (DB-78460-BP) has a NOR flash device connected to the Device Bus. This commit adds the device tree node to support this device. This SoC supports a flexible and dynamic decoding window allocation scheme; but since this feature is still not implemented we need to specify the window base address in the device tree node itself. This base address has been selected in a completely arbitrary fashion. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* ARM: mvebu: Use standard MMC binding for all users of mvsdioSimon Baatz2013-05-151-0/+1
| | | | | | | | | In order to prepare the switch to the standard MMC device tree parser for mvsdio, adapt all current uses of mvsdio in the dts files to the standard format. Signed-off-by: Simon Baatz <gmbnomis@gmail.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* ARM: dts: mvebu: Convert mvebu device tree files to 64 bitsGregory CLEMENT2013-04-151-1/+1
| | | | | | | | | | | | | | | | In order to be able to use more than 4GB of RAM when the LPAE is activated, the dts must be converted in 64 bits. Only Armada XP is LPAE capable, but as it shares a common dtsi file with Armada 370, then the common file include the skeleton64. Thanks to the use of the overload capability of the device tree format, armada-370 include the 32 bit skeleton and all the armada 370 based dts can remain the same. This was heavily based on the work of Lior Amsalem. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* ARM: dts: mvebu: introduce internal-regs nodeGregory CLEMENT2013-04-151-99/+101
| | | | | | | | | | | Introduce a 'internal-regs' subnode, under which all devices are moved. This is not really needed for now, but will be for the mvebu-mbus driver. This generates a lot of code movement since it's indenting by one more tab all the devices. So it was a good opportunity to fix all the bad indentation. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* ARM: dts: mvebu: Convert all the mvebu files to use the range propertyGregory CLEMENT2013-04-151-14/+14
| | | | | | | | | | This conversion will allow to keep 32 bits addresses for the internal registers whereas the memory of the system will be 64 bits. Later it will also ease the move of the mvebu-mbus driver to the device tree support. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* arm: mvebu: PCIe Device Tree informations for Armada XP DBThomas Petazzoni2013-04-151-0/+33
| | | | | | | | | The Marvell evaluation board (DB) for the Armada XP SoC has 6 physicals full-size PCIe slots, so we enable the corresponding PCIe interfaces in the Device Tree. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* arm: mvebu: Add SPI flash on Armada XP-DB boardGregory CLEMENT2013-02-281-0/+12
| | | | | | | | | This patch add support for the SPI flash M25P64 which is present on the Armada XP DB board. This flash stores the bootloader and its environment. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* arm: mvebu: Enable USB controllers on Armada 370/XP boardsEzequiel Garcia2013-02-281-0/+12
| | | | | | | | | | | | | | | This patch activates every USB port provided by each SoC. Except for Armada XP Openblocks AX3-4 board, where we enable only the first two USB ports until we have more information on the third one usage. Cc: Lior Amsalem <alior@marvell.com> Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Cc: Gregory CLEMENT <gregory.clement@free-electrons.com> Tested-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Tested-by: Florian Fainelli <florian@openwrt.org> Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* arm: mvebu: enable the SD card slot on Armada XP DB boardThomas Petazzoni2013-02-281-0/+7
| | | | | | | | | | The Armada XP DB evaluation board has one SD card slot, directly connected to the SDIO IP of the SoC, so we enable this IP. Unfortunately, there are no GPIOs for card-detect and write-protect. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* Merge tag 'marvell-neta-dt-clk-updates-3.8' of ↵Thomas Petazzoni2012-11-201-4/+0
|\ | | | | | | | | | | github.com:MISL-EBU-System-SW/mainline-public into test-the-merge Marvell Ethernet DT update for clk support
| * arm: mvebu: remove 'clock-frequency' properties from Armada 370/XP Ethernet ↵Thomas Petazzoni2012-11-201-4/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | nodes The mvneta driver for the Marvell Armada 370/XP Ethernet devices has gained proper clock framework integration, and the corresponding Device Tree nodes now have a correct 'clocks' pointer. The 'clock-frequency' properties in the various .dts files for Armada 370/XP boards have therefore become useless. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
| * Merge tag 'marvell-boards-net-for-3.8' of ↵Thomas Petazzoni2012-11-201-0/+43
| |\ | | | | | | | | | | | | | | | | | | | | | | | | | | | github.com:MISL-EBU-System-SW/mainline-public into test-the-merge Marvell boards changes related to Ethernet, for 3.8 Conflicts: arch/arm/boot/dts/armada-370-xp.dtsi arch/arm/boot/dts/armada-xp-db.dts
* | \ Merge tag 'marvell-boards-net-for-3.8' of ↵Thomas Petazzoni2012-11-201-0/+44
|\ \ \ | |/ / |/| / | |/ | | | | | | | | | | | | | | | | github.com:MISL-EBU-System-SW/mainline-public into test-the-merge Marvell boards changes related to Ethernet, for 3.8 Conflicts: arch/arm/boot/dts/armada-370-xp.dtsi arch/arm/boot/dts/armada-xp-db.dts Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
| * arm: mvebu: enable Ethernet controllers on Armada 370/XP eval boardsThomas Petazzoni2012-11-161-0/+43
| | | | | | | | | | | | | | | | This patch enables the two network interfaces of the Armada 370 official Marvell evaluation platform, and the four network interfaces of the Armada XP official Marvell evaluation platform. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
* | arm: mvebu: SATA support: board-level DT data for Armada 370/XP boardsGregory CLEMENT2012-11-201-0/+4
|/ | | | | | | | | | Add the SATA device tree bindings for - Armada XP evaluation board (DB-78460-BP) - Armada 370 evaluation board (DB-88F6710-BP-DDR3) Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Lior Amsalem <alior@marvell.com> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
* ARM: mvebu: adjust Armada XP evaluation board DTSThomas Petazzoni2012-09-221-2/+2
| | | | | | | | | | | | | | The Armada XP evaluation board is based on the MV78460 Armava XP SoC. Now that we have separate .dtsi files for the three different SoCs of the Armada XP family, use the appropriate one as include for the Armada XP evaluation board .dts file. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Reviewed-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* arm: mach-mvebu: add support for Armada 370 and Armada XP with DTThomas Petazzoni2012-07-101-0/+50
[ben.dooks@codethink.co.uk: ensure error check on of_property_read_u32] [ben.dooks@codethink.co.uk: use mpic address instead of bus-unit's ] [ben.dooks@codethink.co.uk: BUG_ON() if the of_iomap() fails for mpic] [ben.dooks@codethink.co.uk: move mpic per-cpu register base ] [ben.dooks@codethink.co.uk: number fetch should use irqd_to_hwirq()] Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Lior Amsalem <alior@marvell.com> Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk> Acked-by: Andrew Lunn <andrew@lunn.ch> Tested-by: Yehuda Yitschak <yehuday@marvell.com> Tested-by: Lior Amsalem <alior@marvell.com>
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