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* Merge tag 'dt-for-linus' of ↵Linus Torvalds2013-05-021-0/+33
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC device-tree updates from Olof Johansson: "Part 1 of device-tree updates for 3.10. The bulk of the churn in this branch is due to i.MX moving from C-defined pin control over to device tree, which is a one-time conversion that will allow greater flexibility down the road. Besides that, there's PCI-e bindings for Marvell mvebu platforms and a handful of cleanups to tegra due to the new include file functionality of the device tree compiler" * tag 'dt-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (113 commits) arm: mvebu: PCIe Device Tree informations for Armada XP GP arm: mvebu: PCIe Device Tree informations for Armada 370 DB arm: mvebu: PCIe Device Tree informations for Armada 370 Mirabox arm: mvebu: PCIe Device Tree informations for Armada XP DB arm: mvebu: PCIe Device Tree informations for OpenBlocks AX3-4 arm: mvebu: add PCIe Device Tree informations for Armada XP arm: mvebu: add PCIe Device Tree informations for Armada 370 ARM: sunxi: unify osc24M_fixed and osc24M arm: vt8500: Add SDHC support to WM8505 DT ARM: dts: Add a 64 bits version of the skeleton device tree ARM: mvebu: Add Device Bus and CFI flash memory support to defconfig ARM: mvebu: Add support for NOR flash device on Openblocks AX3 board ARM: mvebu: Add support for NOR flash device on Armada XP-GP board ARM: mvebu: Add Device Bus support for Armada 370/XP SoC ARM: dts: imx6dl-wandboard: Add USB Host support ARM: dts: imx51 cpu node ARM: dts: Add missing imx27-phytec-phycore dtb target ARM: dts: Add NFC support for i.MX27 Phytec PCM038 module ARM: i.MX51: Add PATA support ARM: dts: Add initial support for Wandboard Dual-Lite ...
| * arm: orion5x: enable xor for orion5x platformAlexander Clouter2013-03-311-0/+19
| | | | | | | | | | | | | | | | The orion5x SoC includes DMA functionality, so lets enable that and turn it on by default. Signed-off-by: Alexander Clouter <alex@digriz.org.uk> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
| * arm: orion5x: add ehci bindings to dtsiAlexander Clouter2013-03-311-0/+14
| | | | | | | | | | | | | | | | The orion5x SoC also includes a USB EHCI componment so lets add that to the dtsi (disable by default incase the pins are not broken out). Signed-off-by: Alexander Clouter <alex@digriz.org.uk> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* | arm: orion5x: correct IRQ used in dtsi for mv_cesaAlexander Clouter2013-03-281-1/+1
| | | | | | | | | | | | | | | | | | | | | | The crypto functionality in the orion5x dtsi uses the Ethernet IRQ and so things do not work and there is much grumbling at boot time. The IRQ for the crypto should be 28, and not 22, and that is what this patch corrects. Signed-off-by: Alexander Clouter <alex@digriz.org.uk> Acked-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* | arm: orion5x: fix orion5x.dtsi gpio parametersAlexander Clouter2013-03-281-1/+6
|/ | | | | | | | | | | orion5x.dtsi is missing the gpio alias as well as including a typo ('ngpio' instead of 'ngpios') that prevented the orion-gpio driver from loading. Also missing were the interrupt-controller properties. This patches resolves those glitches. Signed-off-by: Alexander Clouter <alex@digriz.org.uk> Acked-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* arm: orion5x: basic Device Tree supportThomas Petazzoni2012-11-211-0/+98
This commit adds basic DT support for the Orion5x SoC family. It adds an orion5x.dtsi description of the Orion5x SoC as well as the needed DT_MACHINE structure to support boards converted to DT in the future. So far, the Device Tree contains the interrupt controller, the GPIO bank, the UART controllers, the SPI controller, the watchdog, the SATA controller, the I2C controller and the cryptographic engine. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Tested by: Maxime Hadjinlian <mhadjinlian@lacie.com> Acked-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Jason Cooper <jason@lakedaemon.net>