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| | * | | | | | | | ARM: dts: sun9i: cubieboard4: Enable VGA display outputChen-Yu Tsai2018-03-191-0/+68
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Cubieboard4 has a dumb VGA DAC connected to the output of LCD0, providing VGA output through the onboard VGA connector. The DDC lines are connected to i2c3. The VGA DAC is a GM7123, which is compatible with Analog Devices' ADV7123, except it only takes 3.3V power, and has a lower standby power consumption. The datasheet found online lists "Chengdu GoldTel Electronical Technology Co., Ltd." as its designer. The company changed its name in 2014 to "Chengdu Corpro Technology Co., Ltd.". Their website lists similar ICs, but not actually the GM7123. Enable the display pipeline with the VGA DAC and connector, and i2c3 for DDC. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
| | * | | | | | | | ARM: dts: sun9i: Add pinmux settings for LCD0 RGB888 output.Chen-Yu Tsai2018-03-191-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The A80 supports RGB888 with H/V sync from LCD0. Add a pinmux setting for the needed pins. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
| | * | | | | | | | ARM: dts: sun9i: Add device nodes for documented display pipelines for A80Chen-Yu Tsai2018-03-191-0/+381
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Allwinner A80 SoC has 3 display pipelines, of which some parts are documented: - 3x display front ends (FE), documented - 2x display enhancement units (DEU), undocumented - 3x display back ends (BE), documented - 2x dynamic range controller (DRC), undocumented - 2x LCDC/TCONs, documented - 1x LCDC/TCON, undocumented, and probably not useable - 1x HDMI transmitter, undocumented but DesignWare compatible - 1x MERGE block, function unknown This patch adds device nodes for the first 2 documented pipelines: FE0 - DEU0 - - BE0 - DRC0 - TCON0 x FE1 - DEU1 - - BE1 - DRC1 - TCON1 Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
| | * | | | | | | | ARM: dts: sun8i: reference tablet design: Enable PMIC power suppliesChen-Yu Tsai2018-03-121-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The A23/A33 reference tablet design has a DC barrel tied to the ACIN of the PMIC. And being a tablet, it has a Li-Po battery. Enable both power supplies in the device tree. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
| | * | | | | | | | ARM: dts: sun8i: a33: Enable A33 internal audio codec on A33-OLinuXinoChen-Yu Tsai2018-03-121-0/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The A33-OLinuXino routes the SoC's headphone output to a headphone jack, and the microphone input to a microphone jack. Power to the microphone is provided by MBIAS. This patch enables the various parts of the codec, and adds widgets and routes for simple-card. HBIAS is connected to the microphone jack as well, but in a manner that is confusing and likely does not provide power. This part is left out of this patch. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
| | * | | | | | | | ARM: dts: sun8i: a33: Enable PMIC power supplies on A33-OLinuXinoChen-Yu Tsai2018-03-121-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The A33-OLinuXino has a DC jack wired to the onboard PMIC's ACIN pins. There is also a battery connector, wired to the PMIC's battery charger. Enable the power supplies for both these components. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
| | * | | | | | | | ARM: dts: sun8i: a33: Drop sunxi-common-regulators.dtsi for A33-OLinuXinoChen-Yu Tsai2018-03-121-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | None of the common regulators defined in sunxi-common-regulators.dtsi are used for the A33-OLinuXino. Drop the include. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
| | * | | | | | | | ARM: dts: sun8i: a33: Drop GPIO pinmux settings for A33-OLinuXinoChen-Yu Tsai2018-03-121-22/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Normal GPIO usage does not need an additional pinmix setting. Exclusive usage of the pin will be guaranteed by the driver. Drop the extra pinmux settings. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
| | * | | | | | | | ARM: dts: sun9i: Add enable-method for SMP support for the A80 SoCChen-Yu Tsai2018-03-101-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Using the enable-method property for SMP support would allow future PSCI implementations to override any in-OS support. This is better than just matching against the machine compatible, and then having to determine whether other methods are available or not. This adds enable-method properties to all CPU nodes. Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Signed-off-by: Chen-Yu Tsai <wens@csie.org>
| | * | | | | | | | ARM: dts: sun8i: h3: Add eMMC for NanoPi M1 PlusEmmanuel Vadot2018-03-081-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The NanoPi-M1-Plus have a 8GB eMMC, add a node for it. This eMMC is always powered with 3.3V. Signed-off-by: Emmanuel Vadot <manu@freebsd.org> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com> [wens@csie.org: Fixed "mmc2_8bits_pins" label typo; added subject prefixes] Signed-off-by: Chen-Yu Tsai <wens@csie.org>
| | * | | | | | | | ARM: dts: sun8i: a711: set regulator for each cluster of CPUsQuentin Schulz2018-02-281-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Allwinner A83T is a SoC with two clusters of 4 A7 which have a different clock and regulator. Set the CPU regulator. Signed-off-by: Quentin Schulz <quentin.schulz@bootlin.com> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
| | * | | | | | | | ARM: dts: sun8i: a83t: add stable OPP tables and CPUfreqQuentin Schulz2018-02-281-0/+118
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Allwinner A83T is an octacore A7 divided in two clusters of 4 A7, each cluster having its own regulator and clock. The operating points were found in Allwinner BSP and fex files. Note that there are a few OPPs that are missing: 1608000000Hz with 920000mV 1800000000Hz with 1000000mV 2016000000Hz with 1080000mV These OPPs are pretty unstable but it might be due to the SoC quickly overheating (till the board completely shuts down). It seems impossible to reach those frequencies with none or passive cooling, so better leave them out by default. It's still possible to add those OPPs on a per-board basis though. Signed-off-by: Quentin Schulz <quentin.schulz@bootlin.com> [maxime: Reordered the nodes alphabetically] Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
| | * | | | | | | | ARM: dts: sun8i: a83t: add cpu0 and cpu100 labelsQuentin Schulz2018-02-281-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Allwinner A83T is a SoC with two clusters of 4 A7, each cluster having its own regulator and clock. The regulators are board-specific, thus we need labels for cpu0 and cpu100 so that we can use references to these nodes from the board header file. Signed-off-by: Quentin Schulz <quentin.schulz@bootlin.com> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
| | * | | | | | | | ARM: dtsi: axp81x: remove IP name from DT node nameQuentin Schulz2018-02-211-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The DT node should be named after its functionality and not after the IP it's defining. Signed-off-by: Quentin Schulz <quentin.schulz@bootlin.com> Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
| | * | | | | | | | ARM: dtsi: sun8i: a711: enable battery power supply subnodeQuentin Schulz2018-02-211-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The TBS A711 has an AXP813 PMIC and a soldered battery, thus, we enable the battery power supply subnode in its Device Tree. Signed-off-by: Quentin Schulz <quentin.schulz@bootlin.com> Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
| | * | | | | | | | ARM: dtsi: axp81x: add battery power supply subnodeQuentin Schulz2018-02-211-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The X-Powers AXP81X PMIC exposes battery supply various data such as the battery status (charging, discharging, full, dead), current max limit, current current, battery capacity (in percentage), voltage max and min limits, current voltage, and battery capacity (in Ah). This adds the battery power supply subnode for AXP81X PMIC. Signed-off-by: Quentin Schulz <quentin.schulz@bootlin.com> Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
| | * | | | | | | | ARM: dtsi: axp81x: add node for ADCQuentin Schulz2018-02-211-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds a DT node for the ADC of the PMIC so that there can be consumers of its IIO channels declaring their consumptions via DT. Signed-off-by: Quentin Schulz <quentin.schulz@bootlin.com> Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
| | * | | | | | | | ARM: dtsi: axp22x: add node for ADCQuentin Schulz2018-02-211-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds a DT node for the ADC of the PMIC so that there can be consumers of its IIO channels declaring their consumptions via DT. Signed-off-by: Quentin Schulz <quentin.schulz@bootlin.com> Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
| | * | | | | | | | ARM: dtsi: axp209: add node for ADCQuentin Schulz2018-02-211-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds a DT node for the ADC of the PMIC so that there can be consumers of its IIO channels declaring their consumptions via DT. Signed-off-by: Quentin Schulz <quentin.schulz@bootlin.com> Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
| | * | | | | | | | ARM: dts: sun7i: Enable HDMI support on the Orange Pi miniStefan Monnier2018-02-191-0/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable the display pipeline and HDMI output for the Orange Pi mini Signed-off-by: Stefan Monnier <monnier@iro.umontreal.ca> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
| | * | | | | | | | ARM: dts: sun7i: Enable HDMI support on the Banana PiStefan Monnier2018-02-161-0/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable the display pipeline and HDMI output Signed-off-by: Stefan Monnier <monnier@iro.umontreal.ca> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
| | * | | | | | | | ARM: dts: sun8i: a83t: Enable HDMI on BananaPi M3Jernej Skrabec2018-02-161-0/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | BananaPi M3 includes HDMI connector, so add support for it. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
| | * | | | | | | | ARM: dts: sun8i: a83t: Add HDMI display pipelineJernej Skrabec2018-02-161-1/+107
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit adds all bits necessary for HDMI on A83T - mixer1, tcon1, hdmi, hdmi phy and hdmi pinctrl entries. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
| | * | | | | | | | ARM: dts: sun9i: Add secure SRAM node used for SMP hotplugChen-Yu Tsai2018-02-161-0/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The A80 stores some magic flags in a portion of the secure SRAM. The BROM jumps directly to the software entry point set by the SMP code if the flags are set. This is required for CPU0 hotplugging. Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Chen-Yu Tsai <wens@csie.org>
| | * | | | | | | | ARM: dts: sun9i: Add PRCM device node for the A80 dtsiChen-Yu Tsai2018-02-161-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The PRCM is a collection of clock controls, reset controls, and various power switches/gates. Some of these can be independently listed and supported, while a number of CPU related ones are used in tandem with CPUCFG for SMP bringup and CPU hotplugging. Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Chen-Yu Tsai <wens@csie.org>
| | * | | | | | | | ARM: dts: sun9i: Add CPUCFG device node for A80 dtsiChen-Yu Tsai2018-02-161-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CPUCFG is a collection of registers that are mapped to the SoC's signals from each individual processor core and associated peripherals, such as resets for processors, L1/L2 cache and other things. These registers are used for SMP bringup and CPU hotplugging. Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Chen-Yu Tsai <wens@csie.org>
| | * | | | | | | | ARM: dts: sun9i: Add CCI-400 device nodes for A80Chen-Yu Tsai2018-02-161-0/+46
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The A80 includes an ARM CCI-400 interconnect to support multi-cluster CPU caches. Also add the maximum clock frequency for the CPUs, as listed in the A80 Optimus Board FEX file. Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Chen-Yu Tsai <wens@csie.org>
| | * | | | | | | | ARM: dts: sun7i: Add Mali nodeGiulio Benetti2018-02-151-0/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The A20 has an ARM Mali 400 GPU, so add binding to our DT. Signed-off-by: Giulio Benetti <giulio.benetti@micronovasrl.com> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
| | * | | | | | | | ARM: dts: sun8i: a83t: bananapi-m3: Add LED device nodesChen-Yu Tsai2018-02-131-0/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Bananapi M3 has two controllable LEDs, blue and green, that are tied to the PMIC's two GPIO pins. Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Chen-Yu Tsai <wens@csie.org>
| | * | | | | | | | ARM: dts: sun[4-7]i: Remove "cooling-{min|max}-level" for CPU nodesViresh Kumar2018-02-135-9/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The "cooling-min-level" and "cooling-max-level" properties are not parsed by any part of the kernel currently and the max cooling state of a CPU cooling device is found by referring to the cpufreq table instead. Remove the unused properties from the CPU nodes. Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com> Signed-off-by: Chen-Yu Tsai <wens@csie.org>
| | * | | | | | | | ARM: dts: sun6i: a31: Enable HDMI support on the Mele I7Marcus Cooper2018-02-131-0/+29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Mele I7 has an HDMI connector wired to the HDMI pins on the SoC. Enable the display pipeline and HDMI output. Signed-off-by: Marcus Cooper <codekipper@gmail.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> [wens@csie.org: Added "dts" prefix] Signed-off-by: Chen-Yu Tsai <wens@csie.org>
| | * | | | | | | | ARM: dts: sun7i: Enable HDMI support on the Olimex EVBMarcus Cooper2018-02-131-0/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable the display pipeline and HDMI output on the Olimex A20-SOM-EVB. Signed-off-by: Marcus Cooper <codekipper@gmail.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
| | * | | | | | | | ARM: dts: sun7i: include correct ccu clock headerGiulio Benetti2018-02-131-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Including sun4i header instead of sun7i prevents using sun7i specific defines. Substitute header inclusion in sun7i-a20.dtsi using right one. Signed-off-by: Giulio Benetti <giulio.benetti@micronovasrl.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
| | * | | | | | | | ARM: dts: sunxi: Add Olimex A20-SOM204-EVB-eMMC boardStefan Mavrodiev2018-02-132-0/+37
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A20-SOM204 board has option with onboard 16GB eMMC. The chip is wired to MMC2 slot. Signed-off-by: Stefan Mavrodiev <stefan@olimex.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
| | * | | | | | | | ARM: dts: sunxi: Add Olimex A20-SOM204-EVB boardStefan Mavrodiev2018-02-132-0/+336
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is new System-On-Module platform with universal dimm socket for easy insertation. The EVB board is designed to be universal with future modules. Product page is located here [1]. There are two dts files - one for base model and another for eMMC variant. Base features of A20-SOM204 board includes: * 1GB DDR3 RAM * AXP209 PMU * KSZ9031 Gigabit PHY * AT24C16 EEPROM * Status LED * LCD connector * GPIO connector There will be variants with the following options: * Second LAN8710A Megabit PHY * 16MB SPI Flash memory * eMMC card * ATECC508 crypto device The EVB board has: * Debug UART * MicroSD card connector * USB-OTG connector * Two USB host * RTL8723BS WiFi/BT combo * IrDA transceiver/receiver * HDMI connector * VGA connector * Megabit ethernet transceiver * Gigabit ethernet transceiver * SATA connector * CAN driver * CSI camera * MIC and HP connectors * PCIe x4 connector * USB3 connector * Two UEXT connectors * Two user LEDs Some of the features are multiplexed and cannot be used the same time: CAN and Megabit PHY. Others are not usable with A20 SoC: PCIe and USB3. [1] https://www.olimex.com/Products/SOM204/ Signed-off-by: Stefan Mavrodiev <stefan@olimex.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
| | * | | | | | | | ARM: dts: sun4i: Enable HDMI support on the MK802Marcus Cooper2018-02-131-0/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable the display pipeline and HDMI output. Signed-off-by: Marcus Cooper <codekipper@gmail.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
| | * | | | | | | | ARM: dts: sun7i: Enable HDMI support on the MK808CMarcus Cooper2018-02-131-0/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable the display pipeline and HDMI output Signed-off-by: Marcus Cooper <codekipper@gmail.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
| | * | | | | | | | ARM: dts: sun8i: a33 Enable our display frontendMaxime Ripard2018-02-121-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The display frontend can be used to do hardware scaling, colorspaces conversion or to implement the buffer format output by the Cedar VPU. Since we're starting to have some support for it in the DRM driver, let's enable its DT node. Reviewed-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
| | * | | | | | | | ARM: dts: sun8i: activate SPI on Orange Pi R1Hauke Mehrtens2018-02-121-0/+8
| | |/ / / / / / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This board has a SPI flash, activate it also in device tree by default. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
| * | | | | | | | Merge tag 'at91-ab-4.17-dt2' of ↵Arnd Bergmann2018-03-2713-87/+87
| |\ \ \ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/abelloni/linux into next/dt Pull "AT91 DT for 4.17 #2" from Alexandre Belloni: Pinctrl fixes, the UART pullups were discussed back in 2016. * tag 'at91-ab-4.17-dt2' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/abelloni/linux: ARM: dts: at91sam9260: pullup rx on usart0 ARM: dts: at91rm9200: pullup rx on uart0 ARM: dts: at91: fixes uart pinctrl, set pullup on rx, clear pullup on tx ARM: dts: at91: at91sam9g25: fix mux-mask pinctrl property
| | * | | | | | | | ARM: dts: at91sam9260: pullup rx on usart0Peter Rosin2018-03-211-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For consistency with all other serial pins, add this pullup. It also prevents the signal from floating and so consuming a useless extra amount of power in crowbarred state if nothing is connected to RX. Signed-off-by: Peter Rosin <peda@axentia.se> Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
| | * | | | | | | | ARM: dts: at91rm9200: pullup rx on uart0Peter Rosin2018-03-211-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For consistency with all other serial pins, add this pullup. It also prevents the signal from floating and so consuming a useless extra amount of power in crowbarred state if nothing is connected to RX. Signed-off-by: Peter Rosin <peda@axentia.se> Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
| | * | | | | | | | ARM: dts: at91: fixes uart pinctrl, set pullup on rx, clear pullup on txPeter Rosin2018-03-2112-82/+82
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove pullup on uart TX signals, they are push-pull outputs thus pullups are pointless. Add pullup on uart RX signals, they prevent the RX signals to be left floating and so consuming a useless extra amount of power in crowbarred state if nothing is connected to RX. Signed-off-by: Peter Rosin <peda@axentia.se> Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
| | * | | | | | | | ARM: dts: at91: at91sam9g25: fix mux-mask pinctrl propertyNicolas Ferre2018-03-211-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There are only 19 PIOB pins having primary names PB0-PB18. Not all of them have a 'C' function. So the pinctrl property mask ends up being the same as the other SoC of the at91sam9x5 series. Reported-by: Marek Sieranski <marek.sieranski@microchip.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com> Cc: <stable@vger.kernel.org> # v3.8+ Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
| * | | | | | | | | Merge tag 'amlogic-dt-1' of ↵Arnd Bergmann2018-03-273-4/+152
| |\ \ \ \ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into next/dt Pull "Amlogic 32-bit DT updates for v4.17" from Kevin Hilman: - odroid-c1: add microSD, ethernet, USB reset - add reset controller - fix requesting GPIOs greater than GPIOZ_3 * tag 'amlogic-dt-1' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic: ARM: dts: meson8b: the CBUS GPIO controller only has 83 GPIOs ARM: dts: meson8b-odroidc1: add microSD support ARM: dts: meson8b: add the I2C clocks ARM: dts: meson8b-odroidc1: ethernet support ARM: dts: meson8b: extend ethernet controller description ARM: dts: meson8: add the USB reset line ARM: dts: meson8: add the reset controller ARM: dts: meson8b: grow the reset controller memory zone
| | * | | | | | | | | ARM: dts: meson8b: the CBUS GPIO controller only has 83 GPIOsMartin Blumenstingl2018-03-201-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update the "gpio-ranges" property of the CBUS GPIO controller on Meson8b because it only provides 83 GPIOs. The GPIO definitions in include/dt-bindings/gpio/meson8b-gpio.h inherited all GPIOs from Meson8 until recently. However, Meson8b does not support all GPIOs which are supported by Meson8 (Meson8b doesn't have a GPIOZ bank, most of the pins from the GPIODV bank are missing on Meson8b - just to name a few differences). The actual number of GPIOs is only 83, instead of 120 from Meson8 plus the 10 GPIOs from the DIF bank on Meson8b. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Reviewed-by: Jerome Brunet <jbrunet@baylibre.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
| | * | | | | | | | | ARM: dts: meson8b-odroidc1: add microSD supportLinus Lüssing2018-03-202-0/+66
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Odroid C1 features a microSD slot. This patch adds the necessary DT bindings to support it. Signed-off-by: Linus Lüssing <linus.luessing@c0d3.blue> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
| | * | | | | | | | | ARM: dts: meson8b: add the I2C clocksMartin Blumenstingl2018-03-071-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add the I2C clocks so the I2C busses can be used. The clock input is not device specific (the AO I2C bus uses clk81 as input, while the two I2C busses in CBUS have a separate "CLKID_I2C" gate, provided by the clock controller. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
| | * | | | | | | | | ARM: dts: meson8b-odroidc1: ethernet supportEmiliano Ingrassia2018-02-121-0/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Odroid-C1+ board is equipped with an RTL8211F ethernet PHY which supports 10/100/1000 Mbps ethernet. The PHY reset and interrupt lines are controlled by the SoC via two GPIO lines (GPIOH_4 and GPIOH_3 respectively). The PHY energy efficient ethernet (eee) mode is marked as broken using "eee-broken-1000t" because, during tests, high packet losses were experienced without it. Signed-off-by: Emiliano Ingrassia <ingrassia@epigenesys.com> Tested-by: Linus Lüssing <linus.luessing@c0d3.blue> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
| | * | | | | | | | | ARM: dts: meson8b: extend ethernet controller descriptionEmiliano Ingrassia2018-02-121-2/+33
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable S805 (aka Meson8b) ethernet pin multiplexing and extend the controller description. The programmable ethernet (PRG_ETHERNET) register address value (0xc1108108), contained in meson.dtsi, is overridden according to the value found in S805 SoC manual. This also required to switch to "amlogic,meson8b-dwmac" compatible to correctly configure that register. The two clock sources "clkin0" and "clkin1" are both equals to MPLL2 because, as reported in bit 9-7 register description, that is the only Meson8b ethernet clock source. Signed-off-by: Emiliano Ingrassia <ingrassia@epigenesys.com> Tested-by: Linus Lüssing <linus.luessing@c0d3.blue> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
generated by cgit v1.2.3 (git 2.25.1) at 2024-10-08 20:24:49 +0000