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* Merge branch 'next-spi' of git://git.secretlab.ca/git/linux-2.6Linus Torvalds2011-01-071-6/+46
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'next-spi' of git://git.secretlab.ca/git/linux-2.6: (77 commits) spi/omap: Fix DMA API usage in OMAP MCSPI driver spi/imx: correct the test on platform_get_irq() return value spi/topcliff: Typo fix threhold to threshold spi/dw_spi Typo change diable to disable. spi/fsl_espi: change the read behaviour of the SPIRF spi/mpc52xx-psc-spi: move probe/remove to proper sections spi/dw_spi: add DMA support spi/dw_spi: change to EXPORT_SYMBOL_GPL for exported APIs spi/dw_spi: Fix too short timeout in spi polling loop spi/pl022: convert running variable spi/pl022: convert busy flag to a bool spi/pl022: pass the returned sglen to the DMA engine spi/pl022: map the buffers on the DMA engine spi/topcliff_pch: Fix data transfer issue spi/imx: remove autodetection spi/pxa2xx: pass of_node to spi device and set a parent device spi/pxa2xx: Modify RX-Tresh instead of busy-loop for the remaining RX bytes. spi/pxa2xx: Add chipselect support for Sodaville spi/pxa2xx: Consider CE4100's FIFO depth spi/pxa2xx: Add CE4100 support ...
| * spi: davinci: add additional commentsBrian Niebuhr2010-11-181-0/+32
| | | | | | | | | | | | | | | | | | | | | | | | Add comments describing the platform data members and per-chip-select SPI configuration structure. Also, add some comments describing the what happens during the driver probe. Signed-off-by: Brian Niebuhr <bniebuhr@efjohnson.com> Tested-By: Michael Williamson <michael.williamson@criticallink.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
| * spi: davinci: remove non-useful "clk_internal" platform dataBrian Niebuhr2010-11-181-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | The "clk_internal" platform data member which contols the CLKMOD bit in Global Control Register 1 is not useful since CLKMOD needs be set to 1 *always* to ensure master mode operation. Remove this platform data. Signed-off-by: Brian Niebuhr <bniebuhr@efjohnson.com> Tested-By: Michael Williamson <michael.williamson@criticallink.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
| * spi: davinci: let DMA operation be specified on per-device basisBrian Niebuhr2010-11-181-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | Let DMA operation be specified on a per-device basis instead of selecting it once during probe. A side effect of this is the need to combine the PIO and DMA buffer txrx_bufs routine. This is good since they anyway share some common functionality. Signed-off-by: Brian Niebuhr <bniebuhr@efjohnson.com> Tested-By: Michael Williamson <michael.williamson@criticallink.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
| * spi: davinci: do not allocate DMA channels during SPI device setupSekhar Nori2010-11-181-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Do not allocate (and de-allocate) SPI DMA channels during setup (and cleanup) for each SPI device. Instead, allocate the DMA channels once duing probe and use them for the life time of the driver. This makes sense since there are dedicated DMA channels meant for SPI use. This also helps remove the unnecessary DMA "sync_dev" variables being used to store DMA channel information. Also, the "use_dma" platform variable is now eliminated since it is possible to check if the platform supports DMA or not based upon whether DMA resources can be found or not. Tested-By: Michael Williamson <michael.williamson@criticallink.com> Tested-By: Brian Niebuhr <bniebuhr@efjohnson.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
| * spi: davinci: always start transmit DMABrian Niebuhr2010-11-181-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Due to the full duplex nature of the SPI bus, the SPI master on DaVinci needs transmit to be active even if the tranfer is only meant to collect receive data. The current code achieves this by using a temporary zeroed buffer to provide DMA data in case the transfer does not have a transmit buffer provided. However, the transmit DMA is started only if transmit buffer is provided rendering the temporary buffer unused. Instead the code relies on a write to SPIDAT1 register to trigger transmit operation. This however only sends two bytes of data. Fix this by starting transmit DMA always. This changes exposes a bug on DM355 where the CSHOLD bit in SPIDAT1 needs to be written to in between transfers. Handle that by introducing a "cshold_bug" platform data which is set to true for DM355. Signed-off-by: Brian Niebuhr <bniebuhr@efjohnson.com> Tested-By: Michael Williamson <michael.williamson@criticallink.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
| * spi: davinci: add support for interrupt modeBrian Niebuhr2010-11-181-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for SPI interrupt mode operation. Define a per chip-select "io type" variable which specifies if the transfers on this chip-select should happen in interrupt mode or polled mode. Introduce a new function davinci_spi_process_events() to help consolidate the code between interrupt mode processing and polled mode processing. Signed-off-by: Brian Niebuhr <bniebuhr@efjohnson.com> Tested-By: Michael Williamson <michael.williamson@criticallink.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
| * spi: davinci: remove non-useful interrupt mode supportBrian Niebuhr2010-11-181-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The interrupt mode support as it stands is another version of poll mode. Even when interrupt mode is selected, the code tight loops on interrupt status register, rendering it totally useless. A completion variable is initialized, but never used. Remove this fake interrupt mode since users can anyway use poll mode with no functional difference. A usefully implemented interrupt mode support can be added later. Signed-off-by: Brian Niebuhr <bniebuhr@efjohnson.com> Tested-By: Michael Williamson <michael.williamson@criticallink.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
| * spi: davinci: add support for wait enable timeoutsBrian Niebuhr2010-11-181-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Just enabling WAITENA in SPIFMTn register waits for the enable signal from the slave indefinitely. Allow support for finite waiting by adding support for c2e delay (maximum time for addressed slave to respond) and t2e delay (maximum time for slave to respond after transmit data finished). While at it, modify the T2C and C2T defines by prepending the register name as is the convention followed for other register field elsewhere in the driver. Signed-off-by: Brian Niebuhr <bniebuhr@efjohnson.com> Tested-By: Michael Williamson <michael.williamson@criticallink.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
| * spi: davinci: make chip-slect specific parameters really chip-select specificBrian Niebuhr2010-11-181-5/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Some chip-select specific paramterers like wdelay, parity, usage of chip-select timers (and the actual timer values) are included in platform data forcing the same behaviour across all chip-selects. Create a new davinci_spi_config data structure which can be passed along using controller_data member of spi_device data structure on a per-device basis. Signed-off-by: Brian Niebuhr <bniebuhr@efjohnson.com> Tested-By: Michael Williamson <michael.williamson@criticallink.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
| * spi: davinci: remove 'wait_enable' platform data memberBrian Niebuhr2010-11-181-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | The SPI_READY bit of struct spi_device:mode serves the purpose of letting the SPI master know if the slave can signal if it is ready for transfer or not. The 'wait_enable' platform data was duplicating this functionality. Use the framework provided method of indicating this capability. Signed-off-by: Brian Niebuhr <bniebuhr@efjohnson.com> Tested-By: Michael Williamson <michael.williamson@criticallink.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
| * spi: davinci: enable GPIO lines to be used as chip selectsBrian Niebuhr2010-11-181-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Sometimes, the chip selects provided by SPI module are muxed with other functionality and cannot be used in some designs. In such cases, it becomes convenient to use an available GPIO line as chip select. This patch enables the DaVinci SPI driver to treat specific GPIO lines as chip selects based on information provided in platform data. Signed-off-by: Brian Niebuhr <bniebuhr@efjohnson.com> Tested-By: Michael Williamson <michael.williamson@criticallink.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
| * spi: davinci: enable both activation and deactivation of chip-selectsBrian Niebuhr2010-11-181-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Let davinci_spi_chipselect() perform both activation and deactivation of chip selects. This lets spi_bitbang fully control chip select activation, as intended by the SPI API. With this change, the chip select activation code need not be duplicated in davinci_spi_bufs_{pio|dma}(). Also, keeping chip select active control is removed as a platform data and simply controlled using information from spi_bitbang on whether chip slect should be activated or de-activated. Signed-off-by: Brian Niebuhr <bniebuhr@efjohnson.com> Tested-By: Michael Williamson <michael.williamson@criticallink.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
* | Merge branch 'devel-stable' into develRussell King2011-01-061-0/+7
|\ \ | | | | | | | | | | | | | | | Conflicts: arch/arm/mach-pxa/clock.c arch/arm/mach-pxa/clock.h
| * | davinci: am18x/da850/omap-l138: add support for higher speed gradesSekhar Nori2010-12-221-0/+7
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | AM18x/DA850/OMAP-L138 SoCs have variants that can operate at a maximum of 456 MHz at 1.3V operating point. Also the 1.2V operating point has a variant that can support a maximum of 375 MHz. This patch adds three new OPPs (456 MHz, 408 MHz and 372 MHz) to the list of DA850 OPPs. Not all silicon is qualified to run at higher speeds and unfortunately the maximum speed the chip can support can only be determined from the label on the package (not software readable). Because of this, we depend on the maximum speed grade information to be provided to us in some board specific way. The board informs the maximum speed grade information by setting the da850_max_speed variable. Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* / ARM: io: make iounmap() a simple macroRussell King2010-12-081-2/+2
|/ | | | | | | | | | Defining iounmap() with arguments prevents it from being used as a function pointer, causing platforms to work around this. Instead, define it to be a simple macro. Do the same for __arch_io(re|un)map too. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* Merge branch 'davinci-next' into davinci-for-linusKevin Hilman2010-10-219-10/+51
|\ | | | | | | | | | | Conflicts: arch/arm/mach-davinci/board-da830-evm.c arch/arm/mach-davinci/board-da850-evm.c
| * davinci: Initial support for Omapl138-HawkboardVictor Rodriguez2010-09-241-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds initial support for the Hawkboard-L138 system It is under the machine name "omapl138_hawkboard". This system is based on the da850 davinci CPU architecture. Information on these system may be found at http://www.hawkboard.org. Basic support for the UART console is included in this patch. It's tested with latest Angstrom File Systems like ramdisk from http://alturl.com/imb45. Signed-off-by: Victor Rodriguez <victor.rodriguez@sasken.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * davinci: add tnetv107x keypad platform deviceCyril Chemparathy2010-09-241-0/+3
| | | | | | | | | | | | | | | | This patch adds a platform device definition for tnetv107x's keypad controller. Signed-off-by: Cyril Chemparathy <cyril@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * davinci: cleanup mdio arch code and switch to phy_idCyril Chemparathy2010-09-243-3/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | This patch removes davinci architecture code that has now been rendered useless by the previous patches in the MDIO separation series. In addition, the earlier phy_mask definitions have been replaced with corresponding phy_id definitions. Signed-off-by: Cyril Chemparathy <cyril@ti.com> Tested-by: Michael Williamson <michael.williamson@criticallink.com> Tested-by: Caglar Akyuz <caglarakyuz@gmail.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * davinci: add mdio platform devicesCyril Chemparathy2010-09-243-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds mdio platform devices on SoCs that have the necessary hardware. Clock lookup entries (aliases) have also been added, so that the MDIO and EMAC drivers can independently enable/disable a shared underlying clock. Further, the EMAC MMR region has been split down into separate MDIO and EMAC regions. Signed-off-by: Cyril Chemparathy <cyril@ti.com> Acked-by: David S. Miller <davem@davemloft.net> Tested-by: Michael Williamson <michael.williamson@criticallink.com> Tested-by: Caglar Akyuz <caglarakyuz@gmail.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * davinci: Initial support for MityDSP-L138/MityARM-1808Michael Williamson2010-09-241-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds initial support for the MityDSP-L138 and MityDSP-1808 system on Module (SOM) under the machine name "mityomapl138". These SOMs are based on the da850 davinci CPU architecture. Information on these SOMs may be found at http://www.mitydsp.com. Basic support for the console UART, NAND, and EMAC (MII interface) is included in this patch. Signed-off-by: Michael Williamson <michael.williamson@criticallink.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * nand: davinci: add support for timing configurationSekhar Nori2010-09-241-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch modifies the DaVinci NAND driver to use the new AEMIF timing setup API to configure the NAND access timings. Earlier, AEMIF configuration was being done as a special case for DM644x board, but now more boards emerge which have capability to boot for other media (SPI flash, NOR flash) and have the kernel access NAND flash. This means that kernel cannot always depend on the bootloader to setup the NAND. Also, on platforms such as da850/omap-l138, the aemif input frequency changes as cpu frequency changes; necessiating re-calculation of timimg values as part of cpufreq transtitions. This patch forms the basis for adding that support. Signed-off-by: Sekhar Nori <nsekhar@ti.com> Acked-by: Kevin Hilman <khilman@deeprootsystems.com> Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@nokia.com>
| * davinci: add support for aemif timing configurationSekhar Nori2010-09-242-3/+36
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support to configure the AEMIF interface with supplied timing values. Since this capability is useful both from NOR and NAND flashes, it is provided as a new interface and in a file of its own. AEMIF timing configuration is required in cases: 1) Where the AEMIF clock rate can change at runtime (a side affect of cpu frequency change). 2) Where U-Boot does not support NAND/NOR but supports other media like SPI Flash or MMC/SD and thus does not care about setting up the AEMIF timing for kernel to use. 3) Where U-Boot just hasn't configured the timing values and cannot be upgraded because the box is already in the field. Since there is now a header file for AEMIF interface, the common (non-NAND specific) defines for AEMIF registers have been moved from nand.h into the newly created aemif.h Signed-off-by: Sekhar Nori <nsekhar@ti.com> Acked-by: Kevin Hilman <khilman@deeprootsystems.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * DA850: Add MMCSD1 resources, platform device and convenience registration ↵Juha Kuikka2010-09-241-0/+1
| | | | | | | | | | | | | | | | | | function Add resources, platform device and convenience registration function for DA850's second MMC/SD controller (MMCSD1). Signed-off-by: Juha Kuikka <juha.kuikka@elektrobit.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * DA850: Add LPSC id for MMCSD1 peripheralJuha Kuikka2010-09-241-0/+1
| | | | | | | | | | | | | | Add LPSC id for DA850's MMCSD1 peripheral. Signed-off-by: Juha Kuikka <juha.kuikka@elektrobit.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * DA850: move MII/RMII pin lists to the board fileSergei Shtylyov2010-09-241-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | The CPGMAC pin list in da850.c was incorrectly split into two MII/RMII mode specific pin lists, while what pin group is used is a function of how the board is wired. Copy the pin lists to board-da850-evm.c, renaming them accordingly, and merge the two lists in da850.c into one, da850_cpgmac_pins[], representing the CPGMAC module as a whole... Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Tested-by: Ben Gardiner <bengardiner@nanometrics.ca> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * DA850: move NAND/NOR pin lists to the board fileSergei Shtylyov2010-09-241-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The NAND/NOR flash pin lists (da850_nand_pins/da850_nor_pins) are purely board specific and as such shouldn't be in da850.c -- copy them to board-da850-evm.c, renaming to da850_evm_nand_pins/da850_evm_nor_pins respectively, and merge the two lists in da850.c into one, representing the EMIF 2.5 module as a whole, just like we have it in da830.c... While at it, remove the '__init' modifier from da850_evm_setup_nor_nand() as this function is called from non '__init' code... Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Tested-by: Ben Gardiner <bengardiner@nanometrics.ca> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * davinci: am18x/da850/omap-l138: keep async clock constant with cpufreqSekhar Nori2010-09-241-1/+1
| | | | | | | | | | | | | | | | | | Keep PLL0 SYSCLK3 at a constant rate of 100MHz. This enables the AEMIF timing to remain valid even as the PLL0 output is changed by cpufreq driver to save power. Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* | arm: return both physical and virtual addresses from addruartJeremy Kerr2010-10-201-21/+25
|/ | | | | | | | | | | | | | | | | | | | Rather than checking the MMU status in every instance of addruart, do it once in kernel/debug.S, and change the existing addruart macros to return both physical and virtual addresses. The main debug code can then select the appropriate address to use. This will also allow us to retreive the address of a uart for the MMU state that we're not current in. Updated with fixes for OMAP from Jason Wang <jason77.wang@gmail.com> and Tony Lindgren <tony@atomide.com>, and fix for versatile express from Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>. Signed-off-by: Jeremy Kerr <jeremy.kerr@canonical.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: Jason Wang <jason77.wang@gmail.com> Signed-off-by: Tony Lindgren <tony@atomide.com> Tested-by: Kevin Hilman <khilman@deeprootsystems.com>
* Merge branch 'davinci-for-linus' of ↵Linus Torvalds2010-08-088-40/+210
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-davinci * 'davinci-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-davinci: davinci: dm646x EVM: Specify reserved EDMA channel/slots davinci: da8xx/omapl EVM: Specify reserved channels/slots davinci: support for EDMA resource sharing davinci: edma: provide ability to detect insufficient CC info data davinci: da8xx: sparse cleanup: remove duplicate entries in irq priorities davinci: DM365: fixed second serial port Davinci: tnetv107x evm board initial support Davinci: tnetv107x initial gpio support Davinci: tnetv107x soc support Davinci: tnetv107x decompresser uart definitions Davinci: generalized debug macros
| * davinci: dm646x EVM: Specify reserved EDMA channel/slotsRajashekhara, Sudhakar2010-08-051-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | Not all the channels and slots available on the DM646x EVM are used by the devices on the EVM. These resources can be used by the DSP to speed up codec operations. This patch reserves these channels for the DSP. Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * davinci: da8xx/omapl EVM: Specify reserved channels/slotsRajashekhara, Sudhakar2010-08-051-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | The drivers on da8xx/omapl EVMs do not utilize all the channels and slots provided by EDMA. Some of these are better utilitzed by the DSP on the SoC for speeding up codec operations. Reserve these channels/slots for the DSP. Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * davinci: support for EDMA resource sharingRajashekhara, Sudhakar2010-08-051-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Current EDMA driver is not taking care of EDMA channels/slots which are allocated from other processor, say DSP. If a channel/slot is allocated from DSP, the existing EDMA driver can still allocate the same resource on ARM. This patch enables the user to pass the channel/slots reserved for DSP as platform data. EDMA driver scans this list during probe and prepares a bitmap of channel/slots which can be used on ARM side. Trying to reserve channels by doing a 'pre-allocate' using edma_alloc_{slot|channel}() API does not work because 1) The reservation should be done in probe() to avoid race with other ARM side driver trying to use EDMA 2) The alloc channel API sets up the access through shadow region 0 which will be incorrect for DSP usage. It also sets up the channel <-> queue number mapping which is not required as DSP will likely do its own mapping anyway. 3) (minor) There is no API to allocate channels in bulk. Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com> Cc: David Brownell <david-b@pacbell.net> Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * davinci: edma: provide ability to detect insufficient CC info dataSekhar Nori2010-08-051-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch modifies the EDMA driver to expect the channel controller (CC) infomation passed on by the platform as a fixed size (EDMA_MAX_CC) array of pointers to structures. Doing so helps catch errors of the sort where the resource structure has information for more channel controllers than the number channel controller info structures defined. Such insufficient platform data would lead to illegal memory accesses. Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * Davinci: tnetv107x initial gpio supportCyril Chemparathy2010-06-211-7/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for the tnetv107x gpio controller. Key differences between davinci and tnetv107x controllers: - register map - davinci's controller is organized into banks of 32 gpios, tnetv107x has a single space with arrays of registers for in, out, direction, etc. - davinci's controller has separate set/clear registers for output, tnetv107x has a single direct mapped register. This patch does not yet add gpio irq support on this controller. Signed-off-by: Cyril Chemparathy <cyril@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * Davinci: tnetv107x soc supportCyril Chemparathy2010-06-211-0/+55
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | TNETV107X is a Texas Instruments SOC that shares a number of common features with the Davinci architecture. Some of the key differences between traditional Davincis and this new SOC are as follow: 1. The SOCs clock architecture includes a new spread-spectrum PLL. Some elements of the clock architecture are reused from Davinci (e.g. LPSC), but the PLL related code is overridden using existing interfaces in "struct clk". 2. The MMR layout on this SOC is substantially different from Davinci. Consequently, the fixed I/O map is a whole lot more convoluted (more so than DA8xx). The net impact here is that IO_ADDRESS() will not work on this SoC, and therefore all mappings have to be through ioremap(). Signed-off-by: Cyril Chemparathy <cyril@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * Davinci: tnetv107x decompresser uart definitionsCyril Chemparathy2010-06-212-0/+15
| | | | | | | | | | | | | | | | Added definitions for tnetv107x uart base addresses, and modified base address selection for kernel decompressor to check for tnetv107x machine type. Signed-off-by: Cyril Chemparathy <cyril@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * Davinci: generalized debug macrosCyril Chemparathy2010-06-213-32/+111
| | | | | | | | | | | | | | | | | | | | | | This patch adopts a debug uart selection similar to the OMAP model. During the boot process, the uncompress code determines the physical and virtual base addresses of the board-specific debug uart. These addresses are then passed on to the in-kernel debug macros through a small chunk of memory placed just below the page tables (@0x80003ff8). Signed-off-by: Cyril Chemparathy <cyril@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* | Merge branch 'for-linus' of ↵Linus Torvalds2010-08-071-1/+50
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound-2.6 * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound-2.6: (214 commits) ALSA: hda - Add pin-fix for HP dc5750 ALSA: als4000: Fix potentially invalid DMA mode setup ALSA: als4000: enable burst mode ALSA: hda - Fix initial capsrc selection in patch_alc269() ASoC: TWL4030: Capture route runtime DAPM ordering fix ALSA: hda - Add PC-beep whitelist for an Intel board ALSA: hda - More relax for pending period handling ALSA: hda - Define AC_FMT_* constants ALSA: hda - Fix beep frequency on IDT 92HD73xx and 92HD71Bxx codecs ALSA: hda - Add support for HDMI HBR passthrough ALSA: hda - Set Stream Type in Stream Format according to AES0 ALSA: hda - Fix Thinkpad X300 so SPDIF is not exposed ALSA: hda - FIX to not expose SPDIF on Thinkpad X301, since it does not have the ability to use SPDIF ASoC: wm9081: fix resource reclaim in wm9081_register error path ASoC: wm8978: fix a memory leak if a wm8978_register fail ASoC: wm8974: fix a memory leak if another WM8974 is registered ASoC: wm8961: fix resource reclaim in wm8961_register error path ASoC: wm8955: fix resource reclaim in wm8955_register error path ASoC: wm8940: fix a memory leak if wm8940_register return error ASoC: wm8904: fix resource reclaim in wm8904_register error path ...
| * | ASoC: davinci: let platform data define edma queue numbersSekhar Nori2010-07-201-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently the EDMA queue to be used by for servicing ASP through internal RAM is fixed to EDMAQ_0 and that to service internal RAM from external RAM is fixed to EDMAQ_1. This may not be the desirable configuration on all platforms. For example, on DM365, queue 0 has large fifo size and is more suitable for video transfers. Having audio and video transfers on the same queue may lead to starvation on audio side. platform data as defined currently passes a queue number to the driver but that remains unused inside the driver. Fix this by defining one queue each for ASP and RAM transfers in the platform data and using it inside the driver. Since EDMAQ_0 maps to 0, thats the queue that will be used if the asp queue number is not initialized. None of the platforms currently utilize ping-pong transfers through internal RAM so that functionality remains unchanged too. This patch has been tested on DM644x and OMAP-L138 EVMs. Signed-off-by: Sekhar Nori <nsekhar@ti.com> Acked-by: Liam Girdwood <lrg@slimlogic.co.uk> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
| * | ASoC: DaVinci: More accurate continuous serial clock for McBSP (I2S)Raffaele Recalcati2010-07-061-0/+33
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | i2s_accurate_sck switch can be used to have a better approximate sampling frequency. The clock is an externally visible bit clock and it is named i2s continuous serial clock (I2S_SCK). The trade off is between more accurate clock (fast clock) and less accurate clock (slow clock). The waveform will be not symmetric. Probably it is possible to get a better algorithm for calculating the divider, trying to keep a slower clock as possible. This patch has been developed against the http://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-davinci.git git tree and has been tested on bmx board (similar to dm365 evm, but using uda1345 as external audio codec). Signed-off-by: Raffaele Recalcati <raffaele.recalcati@bticino.it> Signed-off-by: Davide Bonfanti <davide.bonfanti@bticino.it> Acked-by: Liam Girdwood <lrg@slimlogic.co.uk> Acked-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
| * | ASoC: DaVinci: Added selection of clk input pin for McBSPRaffaele Recalcati2010-07-061-0/+15
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When McBSP peripheral gets the clock from an external pin, there are three possible chooses, MCBSP_CLKX, MCBSP_CLKR and MCBSP_CLKS. evm-dm365 uses MCBSP_CLKR, instead in bmx board I have a different hardware connection and I use MCBSP_CLKS, so I have added this possibility. This patch has been developed against the: http://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-davinci.git git tree and has been tested on bmx board (similar to dm365 evm) Signed-off-by: Raffaele Recalcati <raffaele.recalcati@bticino.it> Signed-off-by: Davide Bonfanti <davide.bonfanti@bticino.it> Acked-by: Liam Girdwood <lrg@slimlogic.co.uk> Acked-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
* / ARM: Remove 'node' argument form arch_adjust_zones()Russell King2010-07-161-6/+3
|/ | | | | | | Since we no longer support discontigmem, node is always zero, so remove this argument. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* davinci: mmc: pass number of SG segments as platform dataSudhakar Rajashekhara2010-05-271-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | On some platforms like DM355, the number of EDMA parameter slots available for EDMA_SLOT_ANY usage are few. In such cases, if MMC/SD uses 16 slots for each instance of MMC controller, then the number of slots available for other modules will be very few. By passing the number of EDMA slots to be used in MMC driver from platform data, EDMA slots available for other purposes can be controlled. Most of the platforms will not use this platform data variable. But on DM355, as the number of EDMA resources available is limited, the number of scatter- gather segments used inside the MMC driver can be 8 (passed as platform data) instead of 16. On DM355, when the number of scatter-gather segments was reduced to 8, I saw a performance difference of about 0.25-0.4 Mbytes/sec during write. Read performance variations were negligible. Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com> Acked-by: Kevin Hilman <khilman@deeprootsystems.com> Cc: <linux-mmc@vger.kernel.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* DM365: Added more PINMUX configurations for AEMIFThomas Koeller2010-05-131-1/+4
| | | | | | | More complete AEMIF support for boards. Signed-off-by: Thomas Koeller <thomas.koeller@baslerweb.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* DM365: Make CLKOUTx availableThomas Koeller2010-05-131-0/+5
| | | | | | | | Added PINMUX configurations for the CLKOUT0 .. CLKOUT2 functions, for boards that want to use these clocks. Signed-off-by: Thomas Koeller <thomas.koeller@baslerweb.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* DM365: Added PINMUX definitions for GPIO30..32Thomas Koeller2010-05-131-0/+3
| | | | | | | Board code may want to use them. Signed-off-by: Thomas Koeller <thomas.koeller@baslerweb.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* Davinci: iotable based ioremap() interceptionCyril Chemparathy2010-05-131-1/+7
| | | | | | | | | | | | | | This patch allows for a more flexible ioremap() interception based on iotable contents. With this patch, the ioremap() interception code can properly translate addresses only after davinci_soc_info has been initialized. Consequently, in soc-specific init functions, davinci_common_init() has to happen before any ioremap() attempts. The da8xx init sequence has been suitably modified to meet this restriction. Signed-off-by: Cyril Chemparathy <cyril@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* Davinci: pinmux - use ioremap()Cyril Chemparathy2010-05-131-1/+1
| | | | | | | | This patch modifies the pinmux implementation so as to ioremap() the pinmux register area on first use. Signed-off-by: Cyril Chemparathy <cyril@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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