linux.git - Linux kernel mainline tree

	Commit message (Collapse)	Author	Age	Files	Lines
*	ARM: Remove dependency of plat-orion time code on mach directory includes.	Lennert Buytenhek	2011-03-03	1	-0/+1
\| \| \| \| \| \| \| \| \| \| \|	This patch makes the various mach dirs that use the plat-orion time code pass in timer and bridge addresses explicitly, instead of having plat-orion get those values by including a mach dir include file -- the latter mechanism is problematic if you want to support multiple ARM platforms in the same kernel image. Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca> Signed-off-by: Nicolas Pitre <nico@fluxnic.net>
*	[ARM] mv78xx0: wire i2c support	Riku Voipio	2009-03-03	1	-0/+1
\| \| \| \| \| \| \| \|	All the pieces were ready, just matter of assembling them together. Signed-off-by: Riku Voipio <riku.voipio@iki.fi> Signed-off-by: Nicolas Pitre <nico@marvell.com>
*	[ARM] mv78xx0: distinguish between different chip steppings	Lennert Buytenhek	2009-02-19	1	-0/+2
\| \| \| \| \| \| \| \|	During boot, identify which chip stepping we're running on (determined by looking at the first PCIe unit's device ID and revision registers), and print a message with the details about what we found. Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
*	[ARM] add Marvell 78xx0 ARM SoC support	Stanislav Samsonov	2008-06-22	1	-0/+49
	The Marvell Discovery Duo (MV78xx0) is a family of ARM SoCs featuring (depending on the model) one or two Feroceon CPU cores with 512K of L2 cache and VFP coprocessors running at (depending on the model) between 800 MHz and 1.2 GHz, and features a DDR2 controller, two PCIe interfaces that can each run either in x4 or quad x1 mode, three USB 2.0 interfaces, two 3Gb/s SATA II interfaces, a SPI interface, two TWSI interfaces, a crypto accelerator, IDMA/XOR engines, a SPI interface, four UARTs, and depending on the model, two or four gigabit ethernet interfaces. This patch adds basic support for the platform, and allows booting on the MV78x00 development board, with functional UARTs, SATA, PCIe, GigE and USB ports. Signed-off-by: Stanislav Samsonov <samsonov@marvell.com> Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>