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* ARM: OMAP3/4: cpuidle: fix sparse and checkpatch warningsPaul Walmsley2012-12-151-5/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | Fix the following sparse warnings in the OMAP3/4 CPUIdle code: arch/arm/mach-omap2/cpuidle34xx.c:272:1: warning: symbol 'omap3_idle_dev' was not declared. Should it be static? arch/arm/mach-omap2/cpuidle34xx.c:274:23: warning: symbol 'omap3_idle_driver' was not declared. Should it be static? arch/arm/mach-omap2/cpuidle44xx.c:164:1: warning: symbol 'omap4_idle_dev' was not declared. Should it be static? arch/arm/mach-omap2/cpuidle44xx.c:166:23: warning: symbol 'omap4_idle_driver' was not declared. Should it be static? Also fix the following checkpatch warnings: WARNING: please, no space before tabs #44: FILE: arch/arm/mach-omap2/cpuidle34xx.c:105: +^I.name = ^I"omap3_idle",$ WARNING: please, no space before tabs #45: FILE: arch/arm/mach-omap2/cpuidle34xx.c:106: +^I.owner = ^ITHIS_MODULE,$ ERROR: code indent should use tabs where possible #211: FILE: arch/arm/mach-omap2/cpuidle44xx.c:74: + /* C2 - CPU0 OFF + CPU1 OFF + MPU CSWR */$ Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Kevin Hilman <khilman@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
* ARM: OMAP2+: PRCM: remove obsolete prcm.[ch]Paul Walmsley2012-11-081-1/+0
| | | | | | | | arch/arm/mach-omap2/prcm.c and arch/arm/plat-omap/include/plat/prcm.h are now completely unused and can be removed. Signed-off-by: Paul Walmsley <paul@pwsan.com> Tested-by: Vaibhav Hiremath <hvaibhav@ti.com>
* ARM: OMAP2+: Prepare for irqs.h removalTony Lindgren2012-09-121-1/+0
| | | | | | | | | | | | | | | | | | | | | | | As the interrupts should only be defined in the platform_data, and eventually coming from device tree, there's no need to define them in header files. Let's remove the hardcoded references to irqs.h and fix up the includes so we don't rely on headers included in irqs.h. Note that we're defining OMAP_INTC_START as 0 to the interrupts. This will be needed when we enable SPARSE_IRQ. For some drivers we need to add #include <plat/cpu.h> for now until these drivers are fixed to remove cpu_is_omapxxxx() usage. While at it, sort som of the includes the standard way, and add the trailing commas where they are missing in the related data structures. Note that for drivers/staging/tidspbridge we just define things locally. Cc: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* Merge tag 'pm' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-socLinus Torvalds2012-07-231-44/+27
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull arm-soc power management changes from Arnd Bergmann: "These are various power management related changes, mainly concerning cpuidle on i.MX and OMAP, as well as a the move of the omap smartreflex driver to live in the power subsystem." Fix up conflicts in arch/arm/mach-{imx/mach-imx6q.c,omap2/prm2xxx_3xxx.h} * tag 'pm' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (37 commits) ARM: OMAP2+: PM: fix IRQ_NOAUTOEN removal by mis-merge ARM: OMAP2+: do not allow SmartReflex to be built as a module ARM: OMAP2: Use hwmod to initialize mmc for 2420 ARM: OMAP3: PM: cpuidle: optimize the clkdm idle latency in C1 state ARM: OMAP3: PM: cpuidle: optimize the PER latency in C1 state ARM: OMAP3: PM: cpuidle: default to C1 in next_valid_state ARM: OMAP3: PM: cleanup cam_pwrdm leftovers ARM: OMAP3: PM: call pre/post transition per powerdomain ARM: OMAP2+: powerdomain: allow pre/post transtion to be per pwrdm ARM: OMAP3: PM: Remove IO Daisychain control from cpuidle ARM: OMAP3PLUS: hwmod: reconfigure IO Daisychain during hwmod mux ARM: OMAP3+: PRM: Enable IO wake up ARM: OMAP4: PRM: Add IO Daisychain support ARM: OMAP3: PM: Move IO Daisychain function to omap3 prm file ARM: OMAP3: PM: correct enable/disable of daisy io chain ARM: OMAP2+: PRM: fix compile for OMAP4-only build W1: OMAP HDQ1W: use runtime PM ARM: OMAP2+: HDQ1W: use omap_device W1: OMAP HDQ1W: use 32-bit register accesses W1: OMAP HDQ1W: allow driver to be built on all OMAP2+ ...
| * ARM: OMAP3: PM: cpuidle: optimize the clkdm idle latency in C1 stateJean Pihet2012-06-251-18/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | For a power domain to idle all the clock domains in it must idle. This patch implements an optimization of the cpuidle code by denying and later allowing only the first registered clock domain of a power domain, and so optimizes the latency of the low power code. The functions _cpuidle_allow_idle and _cpuidle_deny_idle are not used anymore and so are removed. Signed-off-by: Jean Pihet <j-pihet@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
| * ARM: OMAP3: PM: cpuidle: optimize the PER latency in C1 stateJean Pihet2012-06-251-19/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | One of the main contributors of the low power code latency is the PER power domain. To optimize the high-performance and low-latency C1 state, prevent any PER state which is lower than the CORE state in C1. Reported and suggested by Kevin Hilman. Reported-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Jean Pihet <j-pihet@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
| * ARM: OMAP3: PM: cpuidle: default to C1 in next_valid_stateJean Pihet2012-06-251-7/+1
| | | | | | | | | | | | | | | | | | | | If the next state is no found in the next_valid_state function, fallback to the default value of C1 (which is state 0). This prevents the use of a bogus state -1 in the rest of the cpuidle code. Signed-off-by: Jean Pihet <j-pihet@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
* | ARM: OMAP3/4: consolidate cpuidle MakefileDaniel Lezcano2012-06-191-8/+0
|/ | | | | | | | | | | | | | | | | | | | | | The current Makefile compiles the cpuidle34xx.c and cpuidle44xx.c files even if the cpuidle option is not set in the kernel. This patch fixes this by creating a section in the Makefile where these files are compiled only if the CONFIG_CPU_IDLE option is set. This modification breaks an implicit dependency between CPU_IDLE and PM as they belong to the same block in the Makefile. This is fixed in the Kconfig by selecting explicitely PM is CPU_IDLE is set. The linux coding style recommend to use no-op functions in the headers when the subsystem is disabled instead of adding big section in C files. This patch fix this also. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Reviewed-by: Jean Pihet <j-pihet@ti.com> Reviewed-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
* ARM: OMAP3: cpuidle - check the powerdomain lookupDaniel Lezcano2012-05-041-0/+3
| | | | | | | | | | | At init time, check the powerdomains lookup is successful otherwise exit the cpuidle driver init function with -ENODEV like what is done for the omap3 cpuidle driver. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Reviewed-by: Jean Pihet <j-pihet@ti.com> Tested-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
* ARM: OMAP3: cpuidle - set global variables staticDaniel Lezcano2012-05-031-1/+1
| | | | | | | | | | | | struct powerdomain varialbes are all file local, make them static. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Reviewed-by: Jean Pihet <j-pihet@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Kevin Hilman <khilman@ti.com> [khilman@ti.com: update changelog, drop error check in fast path] Signed-off-by: Kevin Hilman <khilman@ti.com>
* ARM: OMAP3: set omap3_idle_data as staticDaniel Lezcano2012-05-031-1/+1
| | | | | | | | | | | | Reduce the scope of the omap3_idle_data to the file as it is only used in cpuidle34xx.c. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Reviewed-by: Jean Pihet <j-pihet@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
* ARM: OMAP3: cpuidle - simplify next_valid_stateDaniel Lezcano2012-05-031-34/+19
| | | | | | | | | | | | | Simplify the indentation by removing the useless 'else' statement. Remove the first loop for the 'idx' search as we have it already with the 'index' passed as parameter. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Reviewed-by: Jean Pihet <j-pihet@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
* ARM: OMAP3: cpuidle - use omap3_idle_data directlyDaniel Lezcano2012-05-031-57/+6
| | | | | | | | | | | | | | | | We are storing the 'omap3_idle_data' in the private data field of the cpuidle device. As we are using this variable only in this file, that does not really make sense. Let's use the global variable directly. As the table is initialized statically, let's remove the initialization at startup too. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Reviewed-by: Jean Pihet <j-pihet@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
* ARM: OMAP3: define statically the omap3_idle_dataDaniel Lezcano2012-05-031-5/+32
| | | | | | | | | | | | Initialize the omap3_idle_data array at compile time, that will allow to remove the initialization at boot time. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Reviewed-by: Jean Pihet <j-pihet@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
* ARM: OMAP3: cpuidle - remove cpuidle_params_tableDaniel Lezcano2012-05-031-25/+3
| | | | | | | | | | | | | | | We do not longer need the ''cpuidle_params_table' array as we defined the states in the driver and we checked they are all valid. We also remove the structure definition as it is no longer used. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Reviewed-by: Jean Pihet <j-pihet@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
* ARM: OMAP3: cpuidle - remove the 'valid' fieldDaniel Lezcano2012-05-031-9/+2
| | | | | | | | | | | | | | With the previous changes all the states are valid, except the last state which is now handled at runtime by next_valid_state() based on the errata flags. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Reviewed-by: Jean Pihet <j-pihet@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Kevin Hilman <khilman@ti.com> [khilman@ti.com: minor changelog rework] Signed-off-by: Kevin Hilman <khilman@ti.com>
* ARM: OMAP3: cpuidle - remove errata check in the init functionDaniel Lezcano2012-05-031-10/+0
| | | | | | | | | | | The errata check is done in the next_valid_state function, no need to check that in the omap3_idle_init function. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
* ARM: OMAP3: define cpuidle staticallyDaniel Lezcano2012-05-031-26/+60
| | | | | | | | | | | Use the new cpuidle API and define in the driver the states. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Reviewed-by: Jean Pihet <j-pihet@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
* ARM: OMAP3: cpuidle - remove rx51 cpuidle parameters tableDaniel Lezcano2012-05-031-17/+0
| | | | | | | | | | | | | | | | | | | As suggested, this table is an optimized version for rx51 and we remove it in order to consolidate the cpuidle code between omap3 and omap4, we remove this specific data definition which is used to override the default omap3 latencies but at the cost of extra code and complexity. In order to not lose the values which probably took time to be measured, the table is converted into a comment with an array description. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Reviewed-by: Jean Pihet <j-pihet@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
* ARM: omap: Consolidate OMAP3 time keeping and irq enableRobert Lee2012-03-211-25/+17
| | | | | | | | | | | | Use core cpuidle timekeeping and irqen wrapper and remove that handling from this code. Signed-off-by: Robert Lee <rob.lee@linaro.org> Reviewed-by: Kevin Hilman <khilman@ti.com> Reviewed-by: Daniel Lezcano <daniel.lezcano@linaro.org> Tested-by: Jean Pihet <j-pihet@ti.com> Acked-by: Jean Pihet <j-pihet@ti.com> Signed-off-by: Len Brown <len.brown@intel.com>
* Merge branch 'for_3.3/uart/runtime-pm' of ↵Tony Lindgren2011-12-161-6/+0
|\ | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-omap-pm into uart Conflicts: arch/arm/mach-omap2/pm34xx.c
| * ARM: OMAP2+: UART: Remove omap_uart_can_sleep and add pm_qosGovindraj.R2011-12-141-6/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Omap_uart_can_sleep function blocks system wide low power state until uart is active remove this func and add qos requests to prevent MPU from transitioning. Keep qos request to default value which will allow MPU to transition and while uart baud rate is available calculate the latency value from the baudrate and use the same to hold constraint while uart clocks are enabled, and if uart is auto-idled the constraint is updated with default constraint value allowing MPU to transition. Qos requests are blocking notifier calls so put these requests to work queue, also the driver uses irq_safe version of runtime API's and callbacks can be called in interrupt disabled context. So to avoid warn on slow path warning while using qos update API's from runtime callbacks use the qos_work_queue. During bootup the runtime_resume call backs might not be called and runtime callback gets called only after uart is idled by setting the autosuspend timeout. So qos_request from runtime resume callback might not activated during boot if uart baudrate is calculated during bootup for console uart, so schedule the qos_work queue once we calc_latency while configuring the uart port. Flush and complete any pending qos jobs in work queue while suspending. Signed-off-by: Govindraj.R <govindraj.raja@ti.com> Acked-by: Greg Kroah-Hartman <gregkh@suse.de> (for drivers/tty changes) Signed-off-by: Kevin Hilman <khilman@ti.com>
* | ARM: OMAP3: CPUidle: Make use of CPU PM notifiersSantosh Shilimkar2011-12-081-0/+15
|/ | | | | | | | | | Save VFP CPU context using CPU PM notifier chain. VFP context is lost when CPU hits OFF state. Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Tested-by: Vishwanath BS <vishwanath.bs@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
* Merge branch 'for-rmk' of ↵Russell King2011-12-051-0/+1
|\ | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/will/linux into devel-stable Conflicts: arch/arm/common/gic.c arch/arm/plat-omap/include/plat/common.h
| * Merge branch 'fixes-v3.2-rc2' into fixesTony Lindgren2011-11-231-48/+85
| |\
| * | ARM: OMAP3: CPUidle: include <linux/export.h>Kevin Hilman2011-11-071-0/+1
| | | | | | | | | | | | | | | | | | | | | The CPUidle use THIS_MODULE, so needs <linux/export.h> Signed-off-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* | | ARM: 7189/1: OMAP3: Fix build break in cpuidle34xx.c because of irq functionSantosh Shilimkar2011-12-051-0/+1
| |/ |/| | | | | | | | | | | | | | | | | | | | | Fix the below build break by including common.h arch/arm/mach-omap2/cpuidle34xx.c: In function 'omap3_enter_idle': arch/arm/mach-omap2/cpuidle34xx.c:117: error: implicit declaration of function 'omap_irq_pending' make[1]: *** [arch/arm/mach-omap2/cpuidle34xx.o] Error 1 make: *** [arch/arm/mach-omap2] Error 2 Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | cpuidle: Single/Global registration of idle statesDeepthi Dharwar2011-11-061-24/+49
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch makes the cpuidle_states structure global (single copy) instead of per-cpu. The statistics needed on per-cpu basis by the governor are kept per-cpu. This simplifies the cpuidle subsystem as state registration is done by single cpu only. Having single copy of cpuidle_states saves memory. Rare case of asymmetric C-states can be handled within the cpuidle driver and architectures such as POWER do not have asymmetric C-states. Having single/global registration of all the idle states, dynamic C-state transitions on x86 are handled by the boot cpu. Here, the boot cpu would disable all the devices, re-populate the states and later enable all the devices, irrespective of the cpu that would receive the notification first. Reference: https://lkml.org/lkml/2011/4/25/83 Signed-off-by: Deepthi Dharwar <deepthi@linux.vnet.ibm.com> Signed-off-by: Trinabh Gupta <g.trinabh@gmail.com> Tested-by: Jean Pihet <j-pihet@ti.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Acked-by: Arjan van de Ven <arjan@linux.intel.com> Acked-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Len Brown <len.brown@intel.com>
* | cpuidle: Split cpuidle_state structure and move per-cpu statistics fieldsDeepthi Dharwar2011-11-061-6/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is the first step towards global registration of cpuidle states. The statistics used primarily by the governor are per-cpu and have to be split from rest of the fields inside cpuidle_state, which would be made global i.e. single copy. The driver_data field is also per-cpu and moved. Signed-off-by: Deepthi Dharwar <deepthi@linux.vnet.ibm.com> Signed-off-by: Trinabh Gupta <g.trinabh@gmail.com> Tested-by: Jean Pihet <j-pihet@ti.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Acked-by: Arjan van de Ven <arjan@linux.intel.com> Acked-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Len Brown <len.brown@intel.com>
* | cpuidle: Move dev->last_residency update to driver enter routine; remove ↵Deepthi Dharwar2011-11-061-28/+39
|/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | dev->last_state Cpuidle governor only suggests the state to enter using the governor->select() interface, but allows the low level driver to override the recommended state. The actual entered state may be different because of software or hardware demotion. Software demotion is done by the back-end cpuidle driver and can be accounted correctly. Current cpuidle code uses last_state field to capture the actual state entered and based on that updates the statistics for the state entered. Ideally the driver enter routine should update the counters, and it should return the state actually entered rather than the time spent there. The generic cpuidle code should simply handle where the counters live in the sysfs namespace, not updating the counters. Reference: https://lkml.org/lkml/2011/3/25/52 Signed-off-by: Deepthi Dharwar <deepthi@linux.vnet.ibm.com> Signed-off-by: Trinabh Gupta <g.trinabh@gmail.com> Tested-by: Jean Pihet <j-pihet@ti.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Acked-by: Arjan van de Ven <arjan@linux.intel.com> Acked-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Len Brown <len.brown@intel.com>
* OMAP3: cpuidle: change the power domains modes determination logicJean Pihet2011-05-201-34/+24
| | | | | | | | | | | | | | The achievable power modes of the power domains in cpuidle depends on the system wide 'enable_off_mode' knob in debugfs. Upon changing enable_off_mode, do not change the C-states 'valid' field but instead dynamically restrict the power modes when entering idle. The C-states 'valid' field is just used to enable/disable some C-states at init and shall not be changed later on. Signed-off-by: Jean Pihet <j-pihet@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
* OMAP3: cpuidle: code rework for improved readabilityJean Pihet2011-05-201-33/+19
| | | | | | | | | | | | - fix single and multi-lines comments format - removed the omap3_idle_bm_check function and replaced the test in omap3_enter_idle_bm by the equivalent code - re-organize omap3_enter_idle_bm code path, assign local variables only when needed - reword some comments Signed-off-by: Jean Pihet <j-pihet@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
* OMAP3: cpuidle: re-organize the C-states dataJean Pihet2011-05-201-204/+101
| | | | | | | | | | | | | | | | | | | | | The current implementation defines an internal structure and a C-states array. Using those structures is redundant to the structs used by the cpuidle framework. This patch provides a clean-up of the internal struct, removes the internal C-states array, stores the data using the existing cpuidle per C-state struct and registers the mach specific data to cpuidle C-state driver_data (accessed using cpuidle_[gs]et_statedata). Also removes unused macros, fields and code and compacts the repeating code using an inline helper function. The result is more compact and more readable code as well as reduced data RAM usage. Also retain C1 as the only always valid C-state and system safe state. Signed-off-by: Jean Pihet <j-pihet@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
* OMAP3: clean-up mach specific cpuidle data structuresJean Pihet2011-05-201-60/+43
| | | | | | | | | | | | - sleep_latency and wake_latency are not used, replace them by exit_latency which is used by cpuidle. exit_latency simply is the sum of sleep_latency and wake_latency, - replace threshold by target_residency, - changed the OMAP3 specific cpuidle code accordingly, - changed the OMAP3 board code accordingly. Signed-off-by: Jean Pihet <j-pihet@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
* Fix common misspellingsLucas De Marchi2011-03-311-2/+2
| | | | | | Fixes generated by 'codespell' and manually reviewed. Signed-off-by: Lucas De Marchi <lucas.demarchi@profusion.mobi>
* Merge branch 'integration-2.6.39-for-tony' of ↵Tony Lindgren2011-03-111-2/+2
|\ | | | | | | | | | | | | git://git.pwsan.com/linux-integration into omap-for-linus Conflicts: arch/arm/mach-omap2/pm34xx.c
| * OMAP: clockdomain: Arch specific funcs for hwsup control of clkdmRajendra Nayak2011-02-251-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Define the following architecture specific funtions for omap2/3/4 .clkdm_allow_idle .clkdm_deny_idle Convert the platform-independent framework to call these functions. Also rename the api's by removing the omap2_ preamble. Hence call omap2_clkdm_allow_idle as clkdm_allow_idle and omap2_clkdm_deny_idle as clkdm_deny_idle. Make the _clkdm_add_autodeps and _clkdm_del_autodeps as non-static so they can be accessed from OMAP2/3 platform specific code. Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
* | omap3: cpuidle: Add description field to each C-state.Santosh Shilimkar2011-03-091-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | Add a description field to each idle C-state. This helps to give better data with PowerTop and one don't have to refer to the code to link what Cx means from system point of view while analysing PowerTop data. No functional change. Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Cc: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
* | OMAP3630: PM: don't warn the user with a trace in case of PM34XX_ERRATUMRicardo Salveti de Araujo2011-03-091-1/+1
|/ | | | | | | | | | In case in user has a OMAP3630 < ES1.2 the kernel should warn the user about the ERRATUM, but using pr_warn instead of WARN_ON is already enough, as there is nothing else the user can do besides changing the board. Signed-off-by: Ricardo Salveti de Araujo <ricardo.salveti@canonical.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
* Merge branch 'idle-release' of ↵Linus Torvalds2011-01-131-0/+2
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/lenb/linux-idle-2.6 * 'idle-release' of git://git.kernel.org/pub/scm/linux/kernel/git/lenb/linux-idle-2.6: cpuidle/x86/perf: fix power:cpu_idle double end events and throw cpu_idle events from the cpuidle layer intel_idle: open broadcast clock event cpuidle: CPUIDLE_FLAG_CHECK_BM is omap3_idle specific cpuidle: CPUIDLE_FLAG_TLB_FLUSHED is specific to intel_idle cpuidle: delete unused CPUIDLE_FLAG_SHALLOW, BALANCED, DEEP definitions SH, cpuidle: delete use of NOP CPUIDLE_FLAGS_SHALLOW cpuidle: delete NOP CPUIDLE_FLAG_POLL ACPI: processor_idle: delete use of NOP CPUIDLE_FLAGs cpuidle: Rename X86 specific idle poll state[0] from C0 to POLL ACPI, intel_idle: Cleanup idle= internal variables cpuidle: Make cpuidle_enable_device() call poll_idle_init() intel_idle: update Sandy Bridge core C-state residency targets
| * Merge branch 'linus' into idle-testLen Brown2011-01-121-12/+28
| |\
| * | cpuidle: CPUIDLE_FLAG_CHECK_BM is omap3_idle specificLen Brown2011-01-121-0/+2
| | | | | | | | | | | | Signed-off-by: Len Brown <len.brown@intel.com>
* | | Merge branch 'for-next' of ↵Linus Torvalds2011-01-131-1/+1
|\ \ \ | |_|/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial * 'for-next' of git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial: (43 commits) Documentation/trace/events.txt: Remove obsolete sched_signal_send. writeback: fix global_dirty_limits comment runtime -> real-time ppc: fix comment typo singal -> signal drivers: fix comment typo diable -> disable. m68k: fix comment typo diable -> disable. wireless: comment typo fix diable -> disable. media: comment typo fix diable -> disable. remove doc for obsolete dynamic-printk kernel-parameter remove extraneous 'is' from Documentation/iostats.txt Fix spelling milisec -> ms in snd_ps3 module parameter description Fix spelling mistakes in comments Revert conflicting V4L changes i7core_edac: fix typos in comments mm/rmap.c: fix comment sound, ca0106: Fix assignment to 'channel'. hrtimer: fix a typo in comment init/Kconfig: fix typo anon_inodes: fix wrong function name in comment fix comment typos concerning "consistent" poll: fix a typo in comment ... Fix up trivial conflicts in: - drivers/net/wireless/iwlwifi/iwl-core.c (moved to iwl-legacy.c) - fs/ext4/ext4.h Also fix missed 'diabled' typo in drivers/net/bnx2x/bnx2x.h while at it.
| * | tree-wide: fix comment/printk typosUwe Kleine-König2010-11-011-1/+1
| |/ | | | | | | | | | | | | | | | | | | "gadget", "through", "command", "maintain", "maintain", "controller", "address", "between", "initiali[zs]e", "instead", "function", "select", "already", "equal", "access", "management", "hierarchy", "registration", "interest", "relative", "memory", "offset", "already", Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Jiri Kosina <jkosina@suse.cz>
* | OMAP2+: powerdomain: move header file from plat-omap to mach-omap2Paul Walmsley2010-12-211-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The OMAP powerdomain code and data is all OMAP2+-specific. This seems unlikely to change any time soon. Move plat-omap/include/plat/powerdomain.h to mach-omap2/powerdomain.h. The primary point of doing this is to remove the temptation for unrelated upper-layer code to access powerdomain code and data directly. As part of this process, remove the references to powerdomain data from the GPIO "driver" and the OMAP PM no-op layer, both in plat-omap. Change the DSPBridge code to point to the new location for the powerdomain headers. The DSPBridge code should not be including the powerdomain headers; these should be removed. Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Kevin Hilman <khilman@deeprootsystems.com> Cc: Omar Ramirez Luna <omar.ramirez@ti.com> Cc: Felipe Contreras <felipe.contreras@gmail.com> Cc: Greg Kroah-Hartman <greg@kroah.com>
* | OMAP2+: clockdomain: move header file from plat-omap to mach-omap2Paul Walmsley2010-12-211-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The OMAP clockdomain code and data is all OMAP2+-specific. This seems unlikely to change any time soon. Move plat-omap/include/plat/clockdomain.h to mach-omap2/clockdomain.h. The primary point of doing this is to remove the temptation for unrelated upper-layer code to access clockdomain code and data directly. DSPBridge also uses the clockdomain headers for some reason, so, modify it also. The DSPBridge code should not be including the clockdomain headers; these should be removed. Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Kevin Hilman <khilman@deeprootsystems.com> Cc: Omar Ramirez Luna <omar.ramirez@ti.com> Cc: Felipe Contreras <felipe.contreras@gmail.com> Cc: Greg Kroah-Hartman <greg@kroah.com> Tested-by: Rajendra Nayak <rnayak@ti.com> Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
* | OMAP3630: PM: Erratum i583: disable coreoff if < ES1.2Eduardo Valentin2010-12-211-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Limitation i583: Self_Refresh Exit issue after OFF mode Issue: When device is waking up from OFF mode, then SDRC state machine sends inappropriate sequence violating JEDEC standards. Impact: OMAP3630 < ES1.2 is impacted as follows depending on the platform: CS0: for 38.4MHz as internal sysclk, DDR content seen to be stable, while for all other sysclk frequencies, varied levels of instability seen based on varied parameters. CS1: impacted This patch takes option #3 as recommended by the Silicon erratum: Avoid core power domain transitioning to OFF mode. Power consumption impact is expected in this case. To do this, we route core OFF requests to RET request on the impacted revisions of silicon. Acked-by: Jean Pihet <j-pihet@ti.com> [nm@ti.com: rebased the code to 2.6.37-rc2- short circuit code changed a bit] Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Eduardo Valentin <eduardo.valentin@nokia.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* | OMAP3: PM: make omap3_cpuidle_update_states independent of enable_off_modeNishanth Menon2010-12-211-10/+14
|/ | | | | | | | | | | | | | Currently omap3_cpuidle_update_states makes whole sale decision on which C states to update based on enable_off_mode variable Instead, achieve the same functionality by independently providing mpu and core deepest states the system is allowed to achieve and update the idle states accordingly. Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Jean Pihet <j-pihet@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> [khilman: fixed additional user of this API in OMAP CPUidle driver] Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* OMAP: control: move plat-omap/control.h to mach-omap2/control.hPaul Walmsley2010-10-081-1/+1
| | | | | | | | | | | | | | | | | Only OMAP2+ platforms have the System Control Module (SCM) IP block. In the past, we've kept the SCM header file in plat-omap. This has led to abuse - device drivers including it; includes being added that create implicit dependencies on OMAP2+ builds; etc. In response, move the SCM headers into mach-omap2/. As part of this, remove the direct SCM access from the OMAP UDC driver. It was clearly broken. The UDC code needs an indepth review for use on OMAP2+ chips. Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Cory Maccarrone <darkstar6262@gmail.com> Cc: Kyungmin Park <kyungmin.park@samsung.com>
* OMAP3: CPUidle: remove redundant setting of PER next power stateKevin Hilman2010-10-011-3/+1
| | | | | | | | | When checking how to program the next powerstate for the PER powerdomain, the next state of PER powerdomain was written twice. Remove the duplicate write. Reported-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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