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path: root/arch/arm/mach-orion5x/common.c
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* [ARM] orion5x: pass dram mbus data to xor driverSaeed Bishara2009-03-031-0/+7
| | | | | | | | | | This data should be passed to the xor driver in order to initialize the address decoding windows of the xor unit. without this patch, the self tests of the xor will fail unless the address decoding windows were initialized by the boot loader. Signed-off-by: Saeed Bishara <saeed@marvell.com> Signed-off-by: Nicolas Pitre <nico@marvell.com>
* [ARM] Orion: add the option to support different ehci phy initializationRonen Shitrit2008-12-041-0/+1
| | | | | | | | | The Orion ehci driver serves the Orion, kirkwood and DD Soc families. Since each of those integrate a different USB phy we should have the ability to use few initialization sequences or to leave the boot loader phy settings as is. Signed-off-by: Ronen Shitrit <rshitrit@marvell.com>
* [ARM] Orion: activate workaround for 88f6183 SPI clock erratumNicolas Pitre2008-10-191-1/+2
| | | | | | | | | Commit 2ede90ca78500ca0ffeee19d7812d345f8ad152d adds 6183 support, but the SPI support in there doesn't work since it depends on a 6183 SPI unit erratum fix that only just went upstream, via commit 2bec19feabd53cba75e9dab0e79afbe868a37113. Signed-off-by: Nicolas Pitre <nico@marvell.com>
* [ARM] Orion: instantiate the dsa switch driverLennert Buytenhek2008-10-191-0/+35
| | | | | | | | | | | | | This adds DSA switch instantiation hooks to the orion5x and the kirkwood ARM SoC platform code, and instantiates the DSA switch driver on the 88F5181L FXO RD, the 88F5181L GE RD, the 6183 AP GE RD, the Linksys WRT350n v2, and the 88F6281 RD boards. Signed-off-by: Lennert Buytenhek <buytenh@marvell.com> Tested-by: Nicolas Pitre <nico@marvell.com> Tested-by: Peter van Valderen <linux@ddcrew.com> Tested-by: Dirk Teurlings <dirk@upexia.nl> Signed-off-by: Nicolas Pitre <nico@marvell.com>
* [ARM] Orion: add 88F6183 (Orion-1-90) supportLennert Buytenhek2008-09-251-0/+47
| | | | | | | | | | | The Orion-1-90 (88F6183) is another member of the Orion SoC family, which has a 16 bit DDR2 interface, one x1 PCIe port (configurable as Root Complex or Endpoint), one 10/100/1000 ethernet interface, one USB 2.0 port with PHY, one SPDIF/I2S interface, one SDIO interface, one TWSI interface, two UARTs, one SPI interface, a NAND controller, a crypto engine, and a 4-channel DMA engine. Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
* [ARM] Orion: prepare for runtime-determined timer tick rateLennert Buytenhek2008-09-251-5/+16
| | | | | | | | | | Currently, orion5x uses a hardcoded timer tick rate of 166 MHz, but the actual timer tick rate varies between different members of the SoC family (and can vary based on strap pin settings). This patch prepares for runtime determination of the timer tick rate. Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
* [ARM] Orion: wire up ethernet error interruptLennert Buytenhek2008-09-251-1/+5
| | | | | | | | Wire up the ethernet port's error interrupt so that the mv643xx_eth driver can sleep for SMI event completion instead of having to busy-wait for it. Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
* [ARM] Orion: Instantiate mv_xor driver for 5182Saeed Bishara2008-08-091-0/+98
| | | | | Signed-off-by: Saeed Bishara <saeed@marvell.com> Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
* [ARM] Orion: support D0 5281 siliconLennert Buytenhek2008-08-091-0/+11
| | | | | | | | | On D0 5281 SoCs, we need to disable the wait-for-interrupt instruction due to an erratum. Signed-off-by: Lennert Buytenhek <buytenh@marvell.com> Signed-off-by: Nicolas Pitre <nico@marvell.com> Acked-by: Martin Michlmayr <tbm@cyrius.com>
* [ARM] Move include/asm-arm/plat-orion to arch/arm/plat-orion/include/platLennert Buytenhek2008-08-091-3/+3
| | | | | | | This patch performs the equivalent include directory shuffle for plat-orion, and fixes up all users. Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
* [ARM] Move include/asm-arm/arch-* to arch/arm/*/include/machRussell King2008-08-071-2/+2
| | | | | | This just leaves include/asm-arm/plat-* to deal with. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] Orion: add 88F5181L (Orion-VoIP) supportLennert Buytenhek2008-06-221-1/+3
| | | | | Signed-off-by: Lennert Buytenhek <buytenh@marvell.com> Acked-by: Russell King <linux@arm.linux.org.uk>
* [ARM] Orion: move EHCI/I2C/UART peripheral init into board codeLennert Buytenhek2008-06-221-90/+136
| | | | | | | | | | | | | | | | | This patch moves initialisation of EHCI/I2C/UART platform devices from the common orion5x_init() into the board support code. The rationale behind this is that only the board support code knows whether certain peripherals have been brought out on the board, and not initialising peripherals that haven't been brought out is desirable for example: - to reduce user confusion (e.g. seeing both 'eth0' and 'eth1' appear while there is only one ethernet port on the board); and - to allow for future power savings (peripherals that have not been brought out can be clock gated off entirely). Signed-off-by: Lennert Buytenhek <buytenh@marvell.com> Acked-by: Russell King <linux@arm.linux.org.uk>
* [ARM] Orion: fix various whitespace and coding style issuesLennert Buytenhek2008-06-221-51/+40
| | | | | | | | | | More cosmetic cleanup: - Replace 8-space indents by proper tab indents. - In structure initialisers, use a trailing comma for every member. - Collapse "},\n{" in structure initialiers to "}, {". Signed-off-by: Lennert Buytenhek <buytenh@marvell.com> Acked-by: Russell King <linux@arm.linux.org.uk>
* [ARM] Orion: pass proper t_clk into mv643xx_ethLennert Buytenhek2008-05-091-0/+1
| | | | | | | Pass the Orion TCLK tick rate into the ethernet driver. Signed-off-by: Lennert Buytenhek <buytenh@marvell.com> Signed-off-by: Nicolas Pitre <nico@marvell.com>
* [ARM] Orion: use mv643xx_eth driver mbus window handlingLennert Buytenhek2008-05-091-1/+7
| | | | | | | | | | | Make the Orion 5x platform code use the mbus window handling code that's in the mv643xx_eth driver, instead of programming the GigE block's mbus window registers by hand. Signed-off-by: Lennert Buytenhek <buytenh@marvell.com> Reviewed-by: Tzachi Perelstein <tzachi@marvell.com> Acked-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Nicolas Pitre <nico@marvell.com>
* Merge branch 'for-2.6.26' of ↵Jeff Garzik2008-05-061-0/+2
|\ | | | | | | git://git.farnsworth.org/dale/linux-2.6-mv643xx_eth into upstream
| * mv643xx_eth: get rid of static variables, allow multiple instancesLennert Buytenhek2008-04-281-0/+2
| | | | | | | | | | | | | | | | | | | | | | Move mv643xx_eth's static state (ethernet register block base address and MII management interface spinlock) into a struct hanging off the shared platform device. This is necessary to support chips that contain multiple mv643xx_eth silicon blocks. Signed-off-by: Lennert Buytenhek <buytenh@marvell.com> Acked-by: Nicolas Pitre <nico@marvell.com> Signed-off-by: Dale Farnsworth <dale@farnsworth.org>
* | [ARM] Orion: catch a couple more alternative spellings of PCIeLennert Buytenhek2008-04-281-1/+1
| | | | | | | | | | | | | | Unify a couple more spellings of "PCIe" ("PCI-E", "PCIE".) Signed-off-by: Lennert Buytenhek <buytenh@marvell.com> Signed-off-by: Nicolas Pitre <nico@marvell.com>
* | [ARM] Orion: fix orion-ehci platform resource end addressesLennert Buytenhek2008-04-281-2/+2
|/ | | | | | | | | End addresses in 'struct resource' are inclusive -- fix the common orion5x code to pass in the proper end addresses when instantiating the two on-chip EHCI controllers. Signed-off-by: Lennert Buytenhek <buytenh@marvell.com> Signed-off-by: Nicolas Pitre <nico@marvell.com>
* Orion: orion -> orion5x renameLennert Buytenhek2008-03-271-0/+391
Do a global s/orion/orion5x/ of the Orion 5x-specific bits (i.e. not the plat-orion bits.) Signed-off-by: Lennert Buytenhek <buytenh@marvell.com> Reviewed-by: Tzachi Perelstein <tzachi@marvell.com> Acked-by: Saeed Bishara <saeed@marvell.com> Acked-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Nicolas Pitre <nico@marvell.com>
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