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* ARM: shmobile: sh73a0: Remove obsolete inclusion of <asm/smp_twd.h>Geert Uytterhoeven2018-11-161-1/+0
| | | | | | | | As of commit 9a9863987bf7307f ("ARM: shmobile: Remove legacy SoC code for SH-Mobile AG5"), this header file is no longer used. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: shmobile: convert to SPDX identifiersKuninori Morimoto2018-09-111-9/+1
| | | | | | | | | This patch updates license to use SPDX-License-Identifier instead of verbose license text. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: shmobile: Consolidate SCU mapping codeGeert Uytterhoeven2016-02-171-2/+1
| | | | | | | | | | | | | | | | | | | | | | | Currently the SCU registers are mapped in SoC-specific code, using different methods, all involving the static mapping set up from machine_desc.map_io(): - On emev2, a static (non-identity) mapping is used, with ioremap(). As the static mapping uses the MT_DEVICE type, ioremap() reuses it, and the returned virtual address is suitable for passing to shmobile_smp_hook(), - On sh73a0 and r8a7779, a static identity mapping is used, with the legacy IOMEM() macro. As the static mapping uses the MT_DEVICE_NONSHARED type, replacing IOMEM() by ioremap() would create a new mapping, whose virtual address cannot be passed to shmobile_smp_hook(). Move the mapping of the SCU registers from SoC-specific code to common code, always using ioremap(). To work in the absence of a static mapping, this requires passing the physical SCU base address to shmobile_smp_hook(). Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: use const and __initconst for smp_operationsMasahiro Yamada2015-12-011-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | These smp_operations structures are not over-written, so add "const" qualifier and replace __initdata with __initconst. Also, add "static" where it is possible. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Moritz Fischer <moritz.fischer@ettus.com> Acked-by: Stephen Boyd <sboyd@codeaurora.org> # qcom part Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Acked-by: Patrice Chotard <patrice.chotard@st.com> Acked-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Wei Xu <xuwei5@hisilicon.com> Acked-by: Florian Fainelli <f.fainelli@gmail.com> Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Acked-by: Shawn Guo <shawnguo@kernel.org> Acked-by: Matthias Brugger <matthias.bgg@gmail.com> Acked-by: Thierry Reding <treding@nvidia.com> Acked-by: Nicolas Pitre <nico@linaro.org> Acked-by: Liviu Dudau <Liviu.Dudau@arm.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* Merge branch 'for-linus' of git://ftp.arm.linux.org.uk/~rmk/linux-armLinus Torvalds2015-09-031-1/+1
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull ARM development updates from Russell King: "Included in this update: - moving PSCI code from ARM64/ARM to drivers/ - removal of some architecture internals from global kernel view - addition of software based "privileged no access" support using the old domains register to turn off the ability for kernel loads/stores to access userspace. Only the proper accessors will be usable. - addition of early fixup support for early console - re-addition (and reimplementation) of OMAP special interconnect barrier - removal of finish_arch_switch() - only expose cpuX/online in sysfs if hotpluggable - a number of code cleanups" * 'for-linus' of git://ftp.arm.linux.org.uk/~rmk/linux-arm: (41 commits) ARM: software-based priviledged-no-access support ARM: entry: provide uaccess assembly macro hooks ARM: entry: get rid of multiple macro definitions ARM: 8421/1: smp: Collapse arch_cpu_idle_dead() into cpu_die() ARM: uaccess: provide uaccess_save_and_enable() and uaccess_restore() ARM: mm: improve do_ldrd_abort macro ARM: entry: ensure that IRQs are enabled when calling syscall_trace_exit() ARM: entry: efficiency cleanups ARM: entry: get rid of asm_trace_hardirqs_on_cond ARM: uaccess: simplify user access assembly ARM: domains: remove DOMAIN_TABLE ARM: domains: keep vectors in separate domain ARM: domains: get rid of manager mode for user domain ARM: domains: move initial domain setting value to asm/domains.h ARM: domains: provide domain_mask() ARM: domains: switch to keeping domain value in register ARM: 8419/1: dma-mapping: harmonize definition of DMA_ERROR_CODE ARM: 8417/1: refactor bitops functions with BIT_MASK() and BIT_WORD() ARM: 8416/1: Feroceon: use of_iomap() to map register base ARM: 8415/1: early fixmap support for earlycon ...
| * ARM: 8392/3: smp: Only expose /sys/.../cpuX/online if hotpluggableStephen Boyd2015-07-311-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Writes to /sys/.../cpuX/online fail if we determine the platform doesn't support hotplug for that CPU. Furthermore, if the cpu_die op isn't specified the system hangs when we try to offline a CPU and it comes right back online unexpectedly. Let's figure this stuff out before we make the sysfs nodes so that the online file doesn't even exist if it isn't (at least sometimes) possible to hotplug the CPU. Add a new 'cpu_can_disable' op and repoint all 'cpu_disable' implementations at it because all implementers use the op to indicate if a CPU can be hotplugged or not in a static fashion. With PSCI we may need to add a 'cpu_disable' op so that the secure OS can be migrated off the CPU we're trying to hotplug. In this case, the 'cpu_can_disable' op will indicate that all CPUs are hotpluggable by returning true, but the 'cpu_disable' op will make a PSCI migration call and occasionally fail, denying the hotplug of a CPU. This shouldn't be any worse than x86 where we may indicate that all CPUs are hotpluggable but occasionally we can't offline a CPU due to check_irq_vectors_for_cpu_disable() failing to find a CPU to move vectors to. Cc: Mark Rutland <mark.rutland@arm.com> Cc: Nicolas Pitre <nico@linaro.org> Cc: Dave Martin <Dave.Martin@arm.com> Acked-by: Simon Horman <horms@verge.net.au> [shmobile portion] Tested-by: Simon Horman <horms@verge.net.au> Cc: Magnus Damm <magnus.damm@gmail.com> Cc: <linux-sh@vger.kernel.org> Tested-by: Tyler Baker <tyler.baker@linaro.org> Cc: Geert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | ARM: shmobile: Remove legacy SoC code for SH-Mobile AG5Geert Uytterhoeven2015-07-061-8/+0
|/ | | | | | | | The last user of the SH-Mobile AG5 (sh73a0) legacy SoC code was the KZM-A9-GT legacy board code, which has been removed. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: shmobile: sh73a0: Add Multiplatform supportMagnus Damm2015-02-241-1/+1
| | | | | | | | | | Enable sh73a0 Multiplatform support for the generic sh73a0 machine vector. No board support is enabled, and the board code for KZM9G DT Reference is left by itself. Signed-off-by: Magnus Damm <damm+renesas@opensource.se> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: shmobile: Remove FSF address from copyright headersLaurent Pinchart2014-10-271-4/+0
| | | | | | | | | | The information is already included in the COPYING file in the kernel sources root directory, we don't want to modify all source files when the FSF will move to a new address, and I'm tired of seeing the related checkpatch.pl warnings. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: shmobile: Move sh73a0.hGeert Uytterhoeven2014-06-251-1/+3
| | | | | | | | Change location of sh73a0.h so it can be included as "sh73a0.h" instead of the old style <mach/sh73a0.h> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: shmobile: Move common.hMagnus Damm2014-06-171-1/+1
| | | | | | | | | | Change location for common.h so it can be used as #include "common.h" instead of the old style #include <mach/common.h>. Signed-off-by: Magnus Damm <damm+renesas@opensource.se> Acked-by: Geert Uytterhoeven <geert@linux-m68k.org> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: shmobile: Let sh73a0 rely on SCU CPU notifierMagnus Damm2013-09-301-5/+0
| | | | | | | | | Now when CPU notifiers are used for SCU boot vector setup shmobile_smp_scu_boot_secondary() is no longer needed. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: shmobile: Use shmobile_smp_cpu_disable() on sh73a0Magnus Damm2013-09-201-8/+1
| | | | | | | | Use shmobile_smp_cpu_disable() on sh73a0 since it allows CPU Hotplug of any CPU. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* Merge tag 'renesas-smp-for-v3.12' of ↵Olof Johansson2013-08-281-51/+16
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/renesas From Simon Horman: Renesas ARM based SoC SMP updates for v3.12 * Per-CPU SMP boot and sleep code on SoCs that use SCU * Shared SCU CPU Hotplug code on r8a7779 and sh73a0 SoCs * Shared SCU CPU boot code on emev2, r8a7779 and sh73a0 SoCs * tag 'renesas-smp-for-v3.12' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: ARM: shmobile: Per-CPU SMP boot / sleep code for SCU SoCs ARM: shmobile: Introduce per-CPU SMP boot / sleep code ARM: shmobile: Use shared SCU CPU Hotplug code on r8a7779 ARM: shmobile: Use shared SCU CPU Hotplug code on sh73a0 ARM: shmobile: Add shared SCU CPU Hotplug code ARM: shmobile: Use shared SCU SMP boot code on emev2 ARM: shmobile: Use shared SCU SMP boot code on r8a7779 ARM: shmobile: Use shared SCU SMP boot code on sh73a0 ARM: shmobile: Introduce shared SCU SMP boot code Signed-off-by: Olof Johansson <olof@lixom.net>
| * ARM: shmobile: Use shared SCU CPU Hotplug code on sh73a0Magnus Damm2013-08-061-38/+3
| | | | | | | | | | | | | | | | | | | | | | Update the sh73a0 specific CPU Hotplug code to make use of the recently introduced shared SCU functions. The sh73a0 power control hardware relies on SCU_PM_POWEROFF with WFI so the shared SCU code will as-is power down the hardware as expected. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| * ARM: shmobile: Use shared SCU SMP boot code on sh73a0Magnus Damm2013-08-061-13/+13
| | | | | | | | | | | | | | Use shared SCU code on sh73a0 for SMP boot. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* | Merge tag 'renesas-cleanup3-for-v3.12' of ↵Olof Johansson2013-08-281-9/+2
|\| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/renesas From Simon Horman: Third round of Renesas ARM based SoC cleanups for v3.12 * Remove global GPIO_NR definition from sh73a0 SoC * Remove unnecessary nfsroot settings from bootargs of kzm9d and armadillo800eva * Rename irq initialisation functions of r8a7779 SoC to make them consistent with other SoCs * Simplify irq initialisation of r8a7740 SoC * Add missing __initdata annotations to bockw board, and r8a7790 and r8a7779 SoCs * Refactor time initialisation and remove shmobile_init_time. - This affects the following boards: kzm9g, marzen, ape6evm, armadillo800eva and bockw - This affects the following SoCs: r8a7790, r8a7779, r7a7740, r7a73a4 * Cleanup device registration code of r8a7778 SoC * tag 'renesas-cleanup3-for-v3.12' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (45 commits) ARM: shmobile: sh73a0: Remove global GPIO_NR definition ARM: shmobile: kzm9d: remove nfsroot settings from bootargs ARM: shmobile: armadillo800eva: remove nfsroot settings from bootargs ARM: shmobile: r8a7779: move r8a7779_init_irq_xxx() to setup ARM: shmobile: r8a7740: move r8a7740_init_irq_of() to setup ARM: shmobile: bockw: add missing __initdata ARM: shmobile: r8a7790: add missing __initdata ARM: shmobile: r8a7779: add missing __initdata ARM: shmobile: Remove unused shmobile_init_time() ARM: shmobile: Use clocksource_of_init() on r8a7790 ARM: shmobile: Use default ->init_time() on KZM9G DT ref ARM: shmobile: Use default ->init_time() on Marzen DT ref ARM: shmobile: Use default ->init_time() on APE6EVM DT ref ARM: shmobile: Use default ->init_time() on APE6EVM ARM: shmobile: Use default ->init_time() on Armadillo DT ref ARM: shmobile: Use default ->init_time() on Bockw DT ref ARM: shmobile: Use default ->init_time() on Bockw ARM: shmobile: Use default ->init_time() on r8a7779 ARM: shmobile: Use default ->init_time() on r8a7778 ARM: shmobile: Use default ->init_time() on r8a7740 ... Signed-off-by: Olof Johansson <olof@lixom.net>
| * ARM: shmobile: sh73a0: Rely on DT for SMP CPU infoMagnus Damm2013-07-261-9/+2
| | | | | | | | | | | | | | | | | | | | | | | | Remove sh73a0 specific ->smp_init_cpus() callback and instead of relying on shmobile_smp_init_cpus() simply use DT for CPU core information. This assumes that DT_MACHINE_START is used which is the case when AG5EVM and Kota2 are removed. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* | arm: delete __cpuinit/__CPUINIT usage from all ARM usersPaul Gortmaker2013-07-141-1/+1
|/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The __cpuinit type of throwaway sections might have made sense some time ago when RAM was more constrained, but now the savings do not offset the cost and complications. For example, the fix in commit 5e427ec2d0 ("x86: Fix bit corruption at CPU resume time") is a good example of the nasty type of bugs that can be created with improper use of the various __init prefixes. After a discussion on LKML[1] it was decided that cpuinit should go the way of devinit and be phased out. Once all the users are gone, we can then finally remove the macros themselves from linux/init.h. Note that some harmless section mismatch warnings may result, since notify_cpu_starting() and cpu_up() are arch independent (kernel/cpu.c) and are flagged as __cpuinit -- so if we remove the __cpuinit from the arch specific callers, we will also get section mismatch warnings. As an intermediate step, we intend to turn the linux/init.h cpuinit related content into no-ops as early as possible, since that will get rid of these warnings. In any case, they are temporary and harmless. This removes all the ARM uses of the __cpuinit macros from C code, and all __CPUINIT from assembly code. It also had two ".previous" section statements that were paired off against __CPUINIT (aka .section ".cpuinit.text") that also get removed here. [1] https://lkml.org/lkml/2013/5/20/589 Cc: Russell King <linux@arm.linux.org.uk> Cc: Will Deacon <will.deacon@arm.com> Cc: linux-arm-kernel@lists.infradead.org Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
* ARM: shmobile: sh73a0 SMP with SCU boot fn and argsMagnus Damm2013-06-171-2/+4
| | | | | | | | Let sh73a0 make use of shmobile_boot_fn and shmobile_boot_arg together with shmobile_boot_scu and the SCU base address. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* Merge branch 'for-linus' of git://git.linaro.org/people/rmk/linux-armLinus Torvalds2013-05-031-8/+0
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull ARM updates from Russell King: "The major items included in here are: - MCPM, multi-cluster power management, part of the infrastructure required for ARMs big.LITTLE support. - A rework of the ARM KVM code to allow re-use by ARM64. - Error handling cleanups of the IS_ERR_OR_NULL() madness and fixes of that stuff for arch/arm - Preparatory patches for Cortex-M3 support from Uwe Kleine-König. There is also a set of three patches in here from Hugh/Catalin to address freeing of inappropriate page tables on LPAE. You already have these from akpm, but they were already part of my tree at the time he sent them, so unfortunately they'll end up with duplicate commits" * 'for-linus' of git://git.linaro.org/people/rmk/linux-arm: (77 commits) ARM: EXYNOS: remove unnecessary use of IS_ERR_VALUE() ARM: IMX: remove unnecessary use of IS_ERR_VALUE() ARM: OMAP: use consistent error checking ARM: cleanup: OMAP hwmod error checking ARM: 7709/1: mcpm: Add explicit AFLAGS to support v6/v7 multiplatform kernels ARM: 7700/2: Make cpu_init() notrace ARM: 7702/1: Set the page table freeing ceiling to TASK_SIZE ARM: 7701/1: mm: Allow arch code to control the user page table ceiling ARM: 7703/1: Disable preemption in broadcast_tlb*_a15_erratum() ARM: mcpm: provide an interface to set the SMP ops at run time ARM: mcpm: generic SMP secondary bringup and hotplug support ARM: mcpm_head.S: vlock-based first man election ARM: mcpm: Add baremetal voting mutexes ARM: mcpm: introduce helpers for platform coherency exit/setup ARM: mcpm: introduce the CPU/cluster power API ARM: multi-cluster PM: secondary kernel entry code ARM: cacheflush: add synchronization helpers for mixed cache state accesses ARM: cpu hotplug: remove majority of cache flushing from platforms ARM: smp: flush L1 cache in cpu_die() ARM: tegra: remove tegra specific cpu_disable() ...
| * ARM: cpu hotplug: remove majority of cache flushing from platformsRussell King2013-04-181-8/+0
| | | | | | | | | | | | | | Remove the majority of cache flushing calls from the individual platform files. This is now handled by the core code. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | Merge branch 'gic/cleanup' into next/socOlof Johansson2013-04-281-7/+0
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Merge in the gic cleanup since it has a handful of annoying internal conflicts with soc development branches. All of them are delete/delete conflicts. * gic/cleanup: irqchip: vic: add include of linux/irq.h irqchip: gic: Perform the gic_secondary_init() call via CPU notifier irqchip: gic: Call handle_bad_irq() directly arm: Move chained_irq_(enter|exit) to a generic file arm: Move the set_handle_irq and handle_arch_irq declarations to asm/irq.h Signed-off-by: Olof Johansson <olof@lixom.net> Conflicts: arch/arm/mach-shmobile/smp-emev2.c arch/arm/mach-shmobile/smp-r8a7779.c arch/arm/mach-shmobile/smp-sh73a0.c arch/arm/mach-socfpga/platsmp.c
| * | irqchip: gic: Perform the gic_secondary_init() call via CPU notifierCatalin Marinas2013-03-261-7/+0
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | All the calls to gic_secondary_init() pass 0 as the first argument. Since this function is called on each CPU when starting, it can be done in a platform-independent way via a CPU notifier registered by the GIC code. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Acked-by: Stephen Warren <swarren@nvidia.com> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Rob Herring <rob.herring@calxeda.com> Acked-by: Simon Horman <horms+renesas@verge.net.au> Tested-by: Simon Horman <horms+renesas@verge.net.au> Acked-by: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com> Tested-by: Dinh Nguyen <dinguyen@altera.com> Acked-by: Nicolas Pitre <nico@linaro.org> Tested-by: Marc Zyngier <marc.zyngier@arm.com> Cc: Russell King <linux@arm.linux.org.uk> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Kukjin Kim <kgene.kim@samsung.com> Cc: Sascha Hauer <kernel@pengutronix.de> Cc: David Brown <davidb@codeaurora.org> Cc: Bryan Huntsman <bryanh@codeaurora.org> Cc: Tony Lindgren <tony@atomide.com> Cc: Magnus Damm <magnus.damm@gmail.com> Cc: Shiraz Hashim <shiraz.hashim@st.com> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Will Deacon <will.deacon@arm.com> Cc: Kukjin Kim <kgene.kim@samsung.com> Cc: Barry Song <baohua.song@csr.com>
* | ARM: shmobile: Use sh73a0-specific cpu disable codeMagnus Damm2013-03-131-1/+6
| | | | | | | | | | | | | | | | | | | | Convert the sh73a0 CPU Hotplug code to use a local implementation of ->cpu_disable(). With this change in place the sh73a0 SMP code does no longer depend on hotplug.c. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* | ARM: shmobile: Rework SH73A0_SCU_BASE IOMEM() usageMagnus Damm2013-03-131-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Rework the IOMEM() usage for the SCU base address in the case of sh73a0. Removes recently introduced build warnings: arch/arm/mach-shmobile/smp-sh73a0.c:45:15: warning: initialization makes integer from pointer without a cast [enabled by default] arch/arm/mach-shmobile/smp-sh73a0.c:45:15: warning: (near initialization for 'twd_local_timer.res[0].start') [enabled by default] arch/arm/mach-shmobile/smp-sh73a0.c:45:15: warning: initialization makes integer from pointer without a cast [enabled by default] /arch/arm/mach-shmobile/smp-sh73a0.c:45:15: warning: (near initialization for 'twd_local_timer.res[0].end') [enabled by default] Reported-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* | ARM: shmobile: Common shmobile_scu_base in headsmp-scu.SMagnus Damm2013-03-131-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update the code in headsmp-scu.S to use a global shmobile_scu_base variable both for convenient SCU base address storage and for the early SCU setup code in shmobile_secondary_vector_scu. With this patch applied r8a7779, sh73a0 and EMEV2 all make use of the global shmobile_scu_base variable. However only sh73a0 makes use of the SCU bring up code in shmobile_secondary_vector_scu. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* | ARM: shmobile: Move headsmp-sh73a0.S to headsmp-scu.SMagnus Damm2013-03-131-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Rename headsmp-sh73a0.S into headsmp-scu.S and introduce shmobile_secondary_vector_scu(). The goal is to be able to share the function above between all mach-shmobile SoCs that use SCU for SMP. So far only sh73a0 use this. At this time the SCU base address is still hard coded in headsmp-scu.S to 0xf0000000, but this will be changed in the future. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* | ARM: shmobile: Kill off sh73a0 scu_base_addr() functionMagnus Damm2013-03-131-10/+10
| | | | | | | | | | | | | | | | | | | | | | Replace scu_base_addr() with a static shmobile_scu_base variable and introduce SH73A0_SCU_BASE. Later in the series the shmobile_scu_base variable will be made into a global variable so this is preparation only. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* | ARM: shmobile: Remove sh73a0_get_core_count()Magnus Damm2013-03-131-8/+1
|/ | | | | | | | Reduce the number of lines of code in smp-sh73a0.c by getting rid of the sh73a0_get_core_count() function. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: mach-shmobile: sh73a0: allow unplugging of CPU0Ulrich Hecht2013-01-301-1/+1
| | | | | | | sh73a0 deals fine with disabling any core, so we should permit it. Signed-off-by: Ulrich Hecht <ulrich.hecht@gmail.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: SH-Mobile: sh73a0: Add CPU HotplugBastian Hecht2013-01-251-6/+30
| | | | | | | | | | | Add the capability to add and remove CPUs on the fly. The Cortex-A9 offers the possibility to take single cores out of the MP Core. We add this capabilty taking care that caches are kept coherent. For verifying the shutdown we rely on the internal SH73A0 Power Status Register PSTR. Signed-off-by: Bastian Hecht <hechtb+renesas@gmail.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: SH-Mobile: sh73a0: Secondary CPUs handle own SCU flagsBastian Hecht2013-01-251-26/+4
| | | | | | | | | | | | | | | | When booting secondary CPUs we have used the main CPU to set up the Snoop Control Unit flags of these CPUs. It is a cleaner approach if every CPU takes care of its own flags. We avoid the need for locking and the program logic is more concise. With this patch the file headsmp-sh73a0.S is added that contains a startup vector for secondary CPUs that sets up its own SCU flags. Further in sh73a0_smp_prepare_cpus() we can rely on the generic ARM helper scu_power_mode(). This is possible as we don't cross borders anymore (every CPU handles its own flags) and need no locking. So we can throw out the needless function modify_scu_cpu_psr(). Signed-off-by: Bastian Hecht <hechtb+renesas@gmail.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* irqchip: Move ARM gic.h to include/linux/irqchip/arm-gic.hRob Herring2013-01-121-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | Now that we have GIC moved to drivers/irqchip and all GIC DT init for platforms using irqchip_init, move gic.h and update the remaining includes. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Russell King <linux@arm.linux.org.uk> Cc: Anton Vorontsov <avorontsov@mvista.com> Cc: Kukjin Kim <kgene.kim@samsung.com> Cc: Sascha Hauer <kernel@pengutronix.de> Cc: David Brown <davidb@codeaurora.org> Cc: Daniel Walker <dwalker@fifo99.com> Cc: Bryan Huntsman <bryanh@codeaurora.org> Cc: Tony Lindgren <tony@atomide.com> Cc: Paul Mundt <lethal@linux-sh.org> Cc: Magnus Damm <magnus.damm@gmail.com> Cc: Viresh Kumar <viresh.linux@gmail.com> Cc: Shiraz Hashim <shiraz.hashim@st.com> Cc: Stephen Warren <swarren@wwwdotorg.org> Cc: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Samuel Ortiz <sameo@linux.intel.com>
* Revert "ARM: shmobile: sh73a0: Replace modify_scu_cpu_psr with scu_power_mode"Simon Horman2012-11-131-2/+21
| | | | | | | | | | This reverts commit e721295185535ed6ef4711eba156fbf5c24f9c5e. The code changes the flags of the wrong cpus - which breaks the whole bootup of secondary CPUs. Cc: Bastian Hecht <hechtb@gmail.com> Signed-off-by: Simon Horman <horms@verge.net.au>
* ARM: shmobile: sh73a0: Replace modify_scu_cpu_psr with scu_power_modeBastian Hecht2012-11-061-21/+2
| | | | | | | | | | We can remove the extra code of modify_scu_cpu_psr() and use the cleaner generic ARM helper scu_power_mode(). As every CPU only deals with its own power register and scu_power_mode() operates with 8-bit accesses, we save the locking overhead too. Signed-off-by: Bastian Hecht <hechtb@gmail.com> Signed-off-by: Simon Horman <horms@verge.net.au>
* ARM: SoC: convert shmobile SMP to SMP operationsMarc Zyngier2012-09-141-4/+44
| | | | | | | | | | | Convert shmobile SMP platforms to use struct smp_operations to provide their SMP and CPU hotplug operations. Cc: Paul Mundt <lethal@linux-sh.org> Cc: Magnus Damm <magnus.damm@gmail.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Acked-by: Nicolas Pitre <nico@linaro.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* ARM / mach-shmobile: sh73a0 SMP TWD boot regression fixKuninori Morimoto2012-05-121-1/+6
| | | | | | | | | | | | | | | | | | | | | Fix SMP TWD boot regression on sh73a0 based platforms caused by: 4200b16 ARM: shmobile: convert to twd_local_timer_register() interface After the merge of the above commit it has been impossible to boot sh73a0 based SoCs with SMP enabled and CONFIG_HAVE_ARM_TWD=y. The kernel crashes at smp_init_cpus() timing which is before the console has been initialized, so to the user this looks like a kernel lock up without any particular error message. This patch fixes the regression on sh73a0 by moving the TWD registration code from smp_init_cpus() to sys_timer->init() time. This patch removed shmobile_twd_init() which is no longer needed Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
* Merge tag 'cleanup2' of ↵Linus Torvalds2012-03-291-10/+10
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull "ARM: cleanups of io includes" from Olof Johansson: "Rob Herring has done a sweeping change cleaning up all of the mach/io.h includes, moving some of the oft-repeated macros to a common location and removing a bunch of boiler plate. This is another step closer to a common zImage for multiple platforms." Fix up various fairly trivial conflicts (<mach/io.h> removal vs changes around it, tegra localtimer.o is *still* gone, yadda-yadda). * tag 'cleanup2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (29 commits) ARM: tegra: Include assembler.h in sleep.S to fix build break ARM: pxa: use common IOMEM definition ARM: dma-mapping: convert ARCH_HAS_DMA_SET_COHERENT_MASK to kconfig symbol ARM: __io abuse cleanup ARM: create a common IOMEM definition ARM: iop13xx: fix missing declaration of iop13xx_init_early ARM: fix ioremap/iounmap for !CONFIG_MMU ARM: kill off __mem_pci ARM: remove bunch of now unused mach/io.h files ARM: make mach/io.h include optional ARM: clps711x: remove unneeded include of mach/io.h ARM: dove: add explicit include of dove.h to addr-map.c ARM: at91: add explicit include of hardware.h to uncompressor ARM: ep93xx: clean-up mach/io.h ARM: tegra: clean-up mach/io.h ARM: orion5x: clean-up mach/io.h ARM: davinci: remove unneeded mach/io.h include [media] davinci: remove includes of mach/io.h ARM: OMAP: Remove remaining includes for mach/io.h ARM: msm: clean-up mach/io.h ...
| * ARM: __io abuse cleanupRob Herring2012-03-131-10/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Several platforms incorrectly use __io() for casting to 'void __iomem *'. This converts all of those uses to use the common IOMEM macro. Reported-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Rob Herring <rob.herring@calxeda.com> Acked-by: Anton Vorontsov <cbouatmailru@gmail.com> Cc: Russell King <linux@arm.linux.org.uk> Cc: Paul Mundt <lethal@linux-sh.org> Cc: Magnus Damm <magnus.damm@gmail.com> Cc: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Cc: linux-sh@vger.kernel.org Acked-by: Arnd Bergmann <arnd@arndb.de>
* | Merge branch 'renesas/timer' into next/timerArnd Bergmann2012-03-201-1/+1
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Conflicts: arch/arm/mach-shmobile/timer.c This resolves a nonobvious merge conflict between renesas timer changes in the global timer changes with those from the renesas soc branch and last minute bug fixes that went into v3.3. Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| * | ARM: mach-shmobile: sh73a0 PSTR 32-bit access fixMagnus Damm2012-02-241-1/+1
| |/ | | | | | | | | | | | | | | | | Convert the sh73a0 SMP code to use 32-bit PSTR access. This fixes wakeup from deep sleep for sh73a0 secondary CPUs. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* / ARM: shmobile: convert to twd_local_timer_register() interfaceMarc Zyngier2012-03-131-5/+3
|/ | | | | | | | | Add support for the new smp_twd runtime registration interface to the shmobile platforms, and remove the old compile-time support. Cc: Magnus Damm <magnus.damm@gmail.com> Cc: Paul Mundt <lethal@linux-sh.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
* ARM: 7293/1: logical_cpu_map: decouple CPU mapping from SMPWill Deacon2012-01-231-0/+1
| | | | | | | | | | | | | | | | | It turns out that the logical CPU mapping is useful even when !CONFIG_SMP for manipulation of devices like interrupt and power controllers when running a UP kernel on a CPU other than 0. This can happen when kexecing a UP image from an SMP kernel. In the future, multi-cluster systems running AMP configurations will require something similar for mapping cluster IDs, so it makes sense to decouple this logic in preparation for this support. Acked-by: Yang Bai <hamo.by@gmail.com> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Reported-by: Joerg Roedel <joerg.roedel@amd.com> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: shmobile: convert logical CPU numbers to physical numbersWill Deacon2011-10-171-1/+5
| | | | | | | | | | This patch uses the new cpu_logical_map() macro for converting logical CPU numbers into physical numbers when dealing with the SCU in the SMP boot path for sh73a0. Cc: Magnus Damm <magnus.damm@gmail.com> Cc: Paul Mundt <lethal@linux-sh.org> Signed-off-by: Will Deacon <will.deacon@arm.com>
* ARM: mach-shmobile: sh73a0 twd_base fixMagnus Damm2011-05-241-4/+5
| | | | | | | | | | | | | | | Fix the case of too late twd_base initialization for SMP on sh73a0 which bas been broken because sh73a0 specific smp_prepare_cpu() and percpu_timer_setup() changed order in the commits: 05c74a6cbcfb416286a947668ba32f63d99fe74a c413521eb4e2d7ffd5ce432a144708d479054bd3 Without this fix the sh73a0 SMP kernel panics on boot. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* ARM: mach-shmobile: update for GIC changes.Paul Mundt2011-01-071-1/+1
| | | | | | This fixes up the SMP support to use the refactored GIC APIs. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* ARM: mach-shmobile: sh73a0 SMP supportMagnus Damm2010-12-141-0/+97
Add SMP support for ag5evm and the sh73a0 processor. Onlining and offlining works well, but at this point offlined processor cores are not put into sleep mode. There is no spinlock for syncing the secondary core with the first one in this implementation. The code instead relies on the cpu_online() check in __cpu_up(). Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Paul Mundt <lethal@linux-sh.org>