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* arm: zynq: Add smp supportMichal Simek2013-04-041-0/+1
| | | | | | | | | Zynq is dual core Cortex A9 which starts always at zero. Using simple trampoline ensure long jump to secondary_startup code. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
* arm: zynq: Get rid of xilinx function prefixMichal Simek2013-04-041-11/+11
| | | | | | | | | | | Xilinx is vendor name not SoC name. Use zynq instead. Also remove one checkpatch warning: WARNING: static const char * array should probably be static const char * const +static const char *xilinx_dt_match[] = { Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* arm: zynq: Add support for system resetMichal Simek2013-04-041-0/+6
| | | | | | Do system reset via slcr registers. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* arm: zynq: Move slcr initialization to separate fileMichal Simek2013-04-041-9/+1
| | | | | | Create separate slcr driver instead of polluting common code. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* arm: zynq: Load scu baseaddress at run timeMichal Simek2013-04-041-12/+22
| | | | | | Use Cortex a9 cp15 to read scu baseaddress. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* arm: zynq: Move timer to clocksource interfaceMichal Simek2013-04-041-1/+1
| | | | | | Use clocksource timer initialization. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* arm: zynq: Use standard timer bindingMichal Simek2013-04-041-0/+1
| | | | | | | | | | | | Use cdns,ttc because this driver is Cadence Rev06 Triple Timer Counter and everybody can use it without xilinx specific function name or probing. Also use standard dt description for timer and also prepare for moving to clocksource initialization. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* arm: zynq: timer: Replace PSS through PSSoren Brinkmann2013-01-281-1/+1
| | | | | | | | | | | The acronym PSS is deprecated by Xilinx. The correct term, which is also used in Xilinx documentation is PS (processing system). This is just a search and replace: - s/PSS/PS/g - s/pss/ps/g Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Tested-by: Josh Cartwright <josh.cartwright@ni.com>
* arm: zynq: Add missing irqchip.h to common.cMichal Simek2013-01-281-0/+1
| | | | | | | | | | | | The patch: "ARM: use common irqchip_init for GIC init" (sha1: 0529e315bbda5d502c93df2cfafba9bb337fbdf4) should also add linux/irqchip.h header. Error message: arch/arm/mach-zynq/common.c:99:14: error: 'irqchip_init' undeclared here (not in a function) Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* Merge tag 'gic-vic-to-irqchip' of git://sources.calxeda.com/kernel/linux ↵Olof Johansson2013-01-141-16/+1
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | into next/cleanup From Rob Herring: Initial irqchip init infrastructure and GIC and VIC clean-ups This creates irqchip initialization infrastructure from Thomas Petazzoni. The VIC and GIC irqchip code is moved to drivers/irqchips and adapted to use the new infrastructure. All DT enabled platforms using GIC and VIC are converted over to use the new irqchip_init. * tag 'gic-vic-to-irqchip' of git://sources.calxeda.com/kernel/linux: irqchip: Move ARM vic.h to include/linux/irqchip/arm-vic.h ARM: picoxcell: use common irqchip_init function ARM: spear: use common irqchip_init function irqchip: Move ARM VIC to drivers/irqchip ARM: samsung: remove unused tick.h ARM: remove unneeded vic.h includes ARM: remove mach .handle_irq for VIC users ARM: VIC: set handle_arch_irq in VIC initialization ARM: VIC: shrink down vic.h irqchip: Move ARM gic.h to include/linux/irqchip/arm-gic.h ARM: use common irqchip_init for GIC init irqchip: Move ARM GIC to drivers/irqchip ARM: remove mach .handle_irq for GIC users ARM: GIC: set handle_arch_irq in GIC initialization ARM: GIC: remove direct use of gic_raise_softirq ARM: GIC: remove assembly ifdefs from gic.h ARM: mach-ux500: use SGI0 to wake up the other core arm: add set_handle_irq() to register the parent IRQ controller handler function irqchip: add basic infrastructure irqchip: add to the directories part of the IRQ subsystem in MAINTAINERS Fixed up massive merge conflicts with the timer cleanup due to adjacent changes: Signed-off-by: Olof Johansson <olof@lixom.net> Conflicts: arch/arm/mach-bcm/board_bcm.c arch/arm/mach-cns3xxx/cns3420vb.c arch/arm/mach-ep93xx/adssphere.c arch/arm/mach-ep93xx/edb93xx.c arch/arm/mach-ep93xx/gesbc9312.c arch/arm/mach-ep93xx/micro9.c arch/arm/mach-ep93xx/simone.c arch/arm/mach-ep93xx/snappercl15.c arch/arm/mach-ep93xx/ts72xx.c arch/arm/mach-ep93xx/vision_ep9307.c arch/arm/mach-highbank/highbank.c arch/arm/mach-imx/mach-imx6q.c arch/arm/mach-msm/board-dt-8960.c arch/arm/mach-netx/nxdb500.c arch/arm/mach-netx/nxdkn.c arch/arm/mach-netx/nxeb500hmi.c arch/arm/mach-nomadik/board-nhk8815.c arch/arm/mach-picoxcell/common.c arch/arm/mach-realview/realview_eb.c arch/arm/mach-realview/realview_pb1176.c arch/arm/mach-realview/realview_pb11mp.c arch/arm/mach-realview/realview_pba8.c arch/arm/mach-realview/realview_pbx.c arch/arm/mach-socfpga/socfpga.c arch/arm/mach-spear13xx/spear1310.c arch/arm/mach-spear13xx/spear1340.c arch/arm/mach-spear13xx/spear13xx.c arch/arm/mach-spear3xx/spear300.c arch/arm/mach-spear3xx/spear310.c arch/arm/mach-spear3xx/spear320.c arch/arm/mach-spear3xx/spear3xx.c arch/arm/mach-spear6xx/spear6xx.c arch/arm/mach-tegra/board-dt-tegra20.c arch/arm/mach-tegra/board-dt-tegra30.c arch/arm/mach-u300/core.c arch/arm/mach-ux500/board-mop500.c arch/arm/mach-ux500/cpu-db8500.c arch/arm/mach-versatile/versatile_ab.c arch/arm/mach-versatile/versatile_dt.c arch/arm/mach-versatile/versatile_pb.c arch/arm/mach-vexpress/v2m.c include/asm-generic/vmlinux.lds.h
| * ARM: use common irqchip_init for GIC initRob Herring2013-01-121-15/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Convert all GIC DT initialization over to use common irqchip_init function. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Cc: Russell King <linux@arm.linux.org.uk> Cc: Kukjin Kim <kgene.kim@samsung.com> Acked-by: Shawn Guo <shawn.guo@linaro.org> Cc: Sascha Hauer <kernel@pengutronix.de> Cc: David Brown <davidb@codeaurora.org> Cc: Daniel Walker <dwalker@fifo99.com> Cc: Bryan Huntsman <bryanh@codeaurora.org> Cc: Tony Lindgren <tony@atomide.com> Cc: Paul Mundt <lethal@linux-sh.org> Cc: Magnus Damm <magnus.damm@gmail.com> Cc: Dinh Nguyen <dinguyen@altera.com> Cc: Viresh Kumar <viresh.linux@gmail.com> Cc: Shiraz Hashim <shiraz.hashim@st.com> Cc: Stephen Warren <swarren@wwwdotorg.org> Cc: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com> Cc: Linus Walleij <linus.walleij@linaro.org>
| * ARM: remove mach .handle_irq for GIC usersRob Herring2013-01-121-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now that the GIC initialization sets up the handle_arch_irq pointer, we can remove it for all machines and make it static. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Cc: Russell King <linux@arm.linux.org.uk> Cc: Anton Vorontsov <avorontsov@mvista.com> Cc: Kyungmin Park <kyungmin.park@samsung.com> Cc: Sascha Hauer <kernel@pengutronix.de> Cc: David Brown <davidb@codeaurora.org> Cc: Daniel Walker <dwalker@fifo99.com> Cc: Bryan Huntsman <bryanh@codeaurora.org> Acked-by: Tony Lindgren <tony@atomide.com> Cc: Paul Mundt <lethal@linux-sh.org> Cc: Magnus Damm <magnus.damm@gmail.com> Cc: Dinh Nguyen <dinguyen@altera.com> Cc: Shiraz Hashim <shiraz.hashim@st.com> Acked-by: Stephen Warren <swarren@nvidia.com> Cc: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com> Cc: Linus Walleij <linus.walleij@linaro.org> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Acked-by: Kukjin Kim <kgene.kim@samsung.com> Acked-by: Shawn Guo <shawn.guo@linaro.org> Acked-by: Olof Johansson <olof@lixom.net> Acked-by: Arnd Bergmann <arnd@arndb.de>
* | ARM: delete struct sys_timerStephen Warren2012-12-241-8/+1
|/ | | | | | | | | | | | | | | | | | Now that the only field in struct sys_timer is .init, delete the struct, and replace the machine descriptor .timer field with the initialization function itself. This will enable moving timer drivers into drivers/clocksource without having to place a public prototype of each struct sys_timer object into include/linux; the intent is to create a single of_clocksource_init() function that determines which timer driver to initialize by scanning the device dtree, much like the proposed irqchip_init() at: http://www.spinics.net/lists/arm-kernel/msg203686.html Includes mach-omap2 fixes from Igor Grinberg. Tested-by: Robert Jarzmik <robert.jarzmik@free.fr> Signed-off-by: Stephen Warren <swarren@nvidia.com>
* ARM: zynq: add support for ARCH_MULTIPLATFORMJosh Cartwright2012-11-211-4/+4
| | | | | | | | | | | | | | | | | | | | The majority of changes are necessary to remove dependencies on header files within arch/arm/mach-zynq/include/mach: uncompress.h - Deleted. It is unused for ARCH_MULTIPLATFORM builds. uart.h: - Move uart definitions out of uart.h into debug/zynq.S, which is now the only user zynq_soc.h: - Move SCU address definitions into common.c. - Other #defines, such as PERIPHERAL_CLOCK_RATE, TTC0_BASE, etc, are unused and can be dropped Signed-off-by: Josh Cartwright <josh.cartwright@ni.com> Tested-by: Michal Simek <michal.simek@xilinx.com>
* ARM: zynq: make use of debug_ll_io_init()Josh Cartwright2012-11-211-18/+7
| | | | | | | | Convert low-level debugging routines to make use of debug_ll_io_init(). This is part of the preparation for ARCH_MULTIPLATFORM support for Zynq. Signed-off-by: Josh Cartwright <josh.cartwright@ni.com> Tested-by: Michal Simek <michal.simek@xilinx.com>
* ARM: zynq: remove TTC early mappingJosh Cartwright2012-11-211-5/+0
| | | | | | | | | | | | Now that the TTC driver has proper support for DT bindings, it is not necessary for the registers to be mapped early. They will be mapped during clock initialization using of_iomap(). Remove the early mapping. In addition, remove the extraneous zynq_soc.h include from the timer driver. Signed-off-by: Josh Cartwright <josh.cartwright@ni.com> Tested-by: Michal Simek <michal.simek@xilinx.com>
* ARM: zynq: use zynq clk bindingsJosh Cartwright2012-11-141-0/+11
| | | | | | | Make the Zynq platform use the newly created zynq clk bindings. Signed-off-by: Josh Cartwright <josh.cartwright@ni.com> Acked-by: Michal Simek <michal.simek@xilinx.com>
* ARM: zynq: dts: split up device treeJosh Cartwright2012-11-121-1/+2
| | | | | | | | | | | | The purpose of the created zynq-7000.dtsi file is to describe the hardware common to all Zynq 7000-based boards. Also, get rid of the zynq-ep107 device tree, since it is not hardware anyone can purchase. Add a zc702 dts file based on the zynq-7000.dtsi. Add it to the dts/Makefile so it is built with the 'dtbs' target. Signed-off-by: Josh Cartwright <josh.cartwright@ni.com> Acked-by: Michal Simek <michal.simek@xilinx.com>
* ARM: zynq: Allow UART1 to be used as DEBUG_LL console.Nick Bowler2012-11-071-3/+3
| | | | | | | | | | | | | | The main UART on the Xilinx ZC702 board is UART1, located at address e0001000. Add a Kconfig option to select this device as the low-level debugging port. This allows the really early boot printouts to reach the USB serial adaptor on this board. For consistency's sake, add a choice entry for UART0 even though it is the the default if UART1 is not selected. Signed-off-by: Nick Bowler <nbowler@elliptictech.com> Tested-by: Josh Cartwright <josh.cartwright@ni.com> Acked-by: Michal Simek <michal.simek@xilinx.com>
* ARM: zynq: move arm-specific sys_timer out of ttcJosh Cartwright2012-11-051-0/+13
| | | | | | | | | Move the sys_timer definition out of ttc driver and make it part of the common zynq code. This is preparation for renaming and COMMON_CLK support. Signed-off-by: Josh Cartwright <josh.cartwright@ni.com> Tested-by: Michal Simek <michal.simek@xilinx.com>
* zynq: move static peripheral mappingsJosh Cartwright2012-10-291-3/+3
| | | | | | | | | | | | | | | | | | Shifting them up into the vmalloc region prevents the following warning, when booting a zynq qemu target with more than 512mb of RAM: BUG: mapping for 0xe0000000 at 0xe0000000 out of vmalloc space In addition, it allows for reuse of these mappings when the proper drivers issue requests via ioremap(). There are currently unknown issues with the early uart mapping. For now, the uart will be mapped to a known working address. Signed-off-by: Josh Cartwright <josh.cartwright@ni.com> Cc: John Linn <john.linn@xilinx.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Tested-by: Michal Simek <michal.simek@xilinx.com>
* zynq: remove use of CLKDEV_LOOKUPJosh Cartwright2012-10-291-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Zynq support in mainline does not (yet) make use of any of the generic clk or clk lookup functionality. Remove what is upstream for now, until the out-of-tree implementation is in suitable form for merging. An important side effect of this patch is that it allows the building of a Zynq kernel without running into unresolved symbol problems: drivers/built-in.o: In function `amba_get_enable_pclk': clkdev.c:(.text+0x444): undefined reference to `clk_enable' drivers/built-in.o: In function `amba_remove': clkdev.c:(.text+0x488): undefined reference to `clk_disable' drivers/built-in.o: In function `amba_probe': clkdev.c:(.text+0x540): undefined reference to `clk_disable' drivers/built-in.o: In function `amba_device_add': clkdev.c:(.text+0x77c): undefined reference to `clk_disable' drivers/built-in.o: In function `enable_clock': clkdev.c:(.text+0x29738): undefined reference to `clk_enable' drivers/built-in.o: In function `disable_clock': clkdev.c:(.text+0x29778): undefined reference to `clk_disable' drivers/built-in.o: In function `__pm_clk_remove': clkdev.c:(.text+0x297f8): undefined reference to `clk_disable' drivers/built-in.o: In function `pm_clk_suspend': clkdev.c:(.text+0x29bc8): undefined reference to `clk_disable' drivers/built-in.o: In function `pm_clk_resume': clkdev.c:(.text+0x29c28): undefined reference to `clk_enable' make[2]: *** [vmlinux] Error 1 make[1]: *** [sub-make] Error 2 make: *** [all] Error 2 In addition, eliminate Zynq's "use" of the versatile platform, as it is no longer needed. As Nick Bowler points out: For the record, I think this was introduced by commit 56a34b03ff427 ("ARM: versatile: Make plat-versatile clock optional") which forgot to select PLAT_VERSATILE_CLOCK on Zynq. This is not all that surprising, because the fact that Zynq "uses" PLAT_VERSATILE is secretly hidden in the Makefile. Nevertheless, the only feature from versatile that Zynq needed was the clock support, so this patch should *also* delete the secret use of plat-versatile by removing this line from arch/arm/Makefile: plat-$(CONFIG_ARCH_ZYNQ) += versatile Signed-off-by: Josh Cartwright <josh.cartwright@ni.com> Cc: John Linn <john.linn@xilinx.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Tested-by: Michal Simek <michal.simek@xilinx.com>
* zynq: use pl310 device tree bindingsJosh Cartwright2012-10-291-8/+1
| | | | | | | | | | The Zynq has a PL310 L2 cache controller. Convert in-tree uses to using the device tree. Signed-off-by: Josh Cartwright <josh.cartwright@ni.com> Cc: John Linn <john.linn@xilinx.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Tested-by: Michal Simek <michal.simek@xilinx.com>
* zynq: use GIC device tree bindingsJosh Cartwright2012-10-291-1/+6
| | | | | | | | | | The Zynq uses the cortex-a9-gic. This eliminates the need to hardcode register addresses. Signed-off-by: Josh Cartwright <josh.cartwright@ni.com> Cc: John Linn <john.linn@xilinx.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Tested-by: Michal Simek <michal.simek@xilinx.com>
* ARM: zynq: convert to CONFIG_MULTI_IRQ_HANDLERMarc Zyngier2011-11-151-0/+1
| | | | | | | | Convert the zynq platform to be using the gic_handle_irq function as its primary interrupt handler. Acked-by: John Linn <john.linn@xilinx.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
* ARM: Xilinx: merge board file into main platform codeArnd Bergmann2011-07-071-3/+19
| | | | | | | | | | The zynq platform will never have board files other than the device tree one, so there is no point splitting it from common.c. This makes the code more compact. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Acked-by: John Linn <john.linn@xilinx.com>
* ARM: Xilinx: Adding Xilinx board supportJohn Linn2011-06-201-0/+102
The 1st board support is minimal to get a system up and running on the Xilinx platform. This platform reuses the clock implementation from plat-versatile, and it depends entirely on CONFIG_OF support. There is only one board support file which obtains all device information from a device tree dtb file which is passed to the kernel at boot time. Signed-off-by: John Linn <john.linn@xilinx.com>
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