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* ARM: l2c: provide enable methodRussell King2014-05-301-18/+62
* ARM: l2c: group implementation specific code togetherRussell King2014-05-301-251/+251
* ARM: l2c: move l2c save function to __l2c_init()Russell King2014-05-301-3/+7
* ARM: l2c: pass iomem address into data->save functionRussell King2014-05-301-16/+16
* ARM: l2c: clean up OF initialisation a bitRussell King2014-05-301-26/+40
* ARM: l2c: add and use L2C revision constantsRussell King2014-05-301-5/+5
* ARM: l2c: rename cache_wait_way()Russell King2014-05-301-3/+3
* ARM: l2c: provide generic helper for way-based operationsRussell King2014-05-301-6/+9
* ARM: l2c: split out cache unlock codeRussell King2014-05-301-7/+16
* ARM: l2c: provide generic function for calling set_debug methodRussell King2014-05-301-1/+11
* ARM: l2c: rename OF specific things, making l2x0_of_data available to allRussell King2014-05-301-32/+32
* ARM: l2c: tidy up l2x0_of_data declarationsRussell King2014-05-301-16/+14
* ARM: l2c: add helper for L2 cache controller DT IDsRussell King2014-05-301-13/+10
* ARM: l2c: remove outer_inv_all() methodRussell King2014-05-221-5/+0
* ARM: 7922/1: l2x0: add Marvell Tauros3 supportSebastian Hesselbarth2013-12-291-8/+40
*-. Merge branches 'debug-choice', 'devel-stable' and 'misc' into for-linusRussell King2013-09-051-5/+7
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| | * ARM: 7821/1: DT: binding fixup to align with vendor-prefixes.txtChristian Daudt2013-08-201-1/+3
| | * ARM: 7820/1: mm: cache-l2x0: Print the cache size in kBFabio Estevam2013-08-201-3/+3
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| * ARM: l2x0: use -st dsb option for ordering writel_relaxed with unlockWill Deacon2013-08-121-1/+1
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* ARM: 7716/1: bcm281xx: Add L2 support for Rev A2 chipsChristian Daudt2013-05-151-0/+158
* ARM: 7682/1: cache-l2x0: fix masking of RTL revision numbering and set_debug ...Rob Herring2013-04-031-7/+4
* ARM: 7616/1: cache-l2x0: aurora: Use writel_relaxed instead of writelGregory CLEMENT2013-01-071-4/+5
* ARM: 7615/1: cache-l2x0: aurora: Invalidate during clean operation with WT en...Gregory CLEMENT2013-01-071-8/+14
* ARM: 7608/1: l2x0: Only set .set_debug on PL310 r3p0 and earlierRob Herring2013-01-021-1/+2
* ARM: 7547/4: cache-l2x0: add support for Aurora L2 cache ctrlGregory CLEMENT2012-11-061-13/+210
* ARM: 7545/1: cache-l2x0: make outer_cache_fns a field of l2x0_of_dataGregory CLEMENT2012-10-181-15/+40
* Merge branch 'for-linus' of git://git.linaro.org/people/rmk/linux-armLinus Torvalds2012-10-071-2/+6
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| * ARM: 7507/1: cache-l2x0.c: save the final aux ctrl value for resumingYilu Mao2012-09-151-2/+6
* | ARM: cache-l2x0: add a const qualifierUwe Kleine-König2012-09-111-1/+1
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* ARM: 7398/1: l2x0: only write to debug registers on PL310Will Deacon2012-04-231-5/+8
* ARM: 7397/1: l2x0: only apply workaround for erratum #753970 on PL310Will Deacon2012-04-231-6/+6
* ARM: cache-l2x0.c: consistently use u32Russell King2012-01-201-11/+11
* ARM: 7162/1: errata: tidy up Kconfig options for PL310 errata workaroundsWill Deacon2011-11-211-1/+1
* Merge branch 'core-locking-for-linus' of git://git.kernel.org/pub/scm/linux/k...Linus Torvalds2011-10-261-23/+23
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| * locking, ARM: Annotate low level hw locks as rawThomas Gleixner2011-09-131-23/+23
* | ARM: 7114/1: cache-l2x0: add resume entry for l2 in secure modeBarry Song2011-10-171-10/+119
* | ARM: 7090/1: CACHE-L2X0: filter start address can be 0 and is often 0Barry Song2011-10-171-1/+1
* | ARM: 7089/1: L2X0: add explicit cpu_relax() for busy wait loopBarry Song2011-10-171-1/+1
* | ARM: 7009/1: l2x0: Add OF based initializationRob Herring2011-10-171-0/+103
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* ARM: 7080/1: l2x0: make sure I&D are not locked down on initLinus Walleij2011-09-071-0/+21
* ARM: 6987/1: l2x0: fix disabling function to avoid deadlockWill Deacon2011-07-061-6/+13
* Merge branch 'misc' into develRussell King2011-03-161-14/+18
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| * ARM: 6795/1: l2x0: Errata fix for flush by Way operation can cause data corruptiSantosh Shilimkar2011-03-091-14/+18
* | ARM: 6741/1: errata: pl310 cache sync operation may be faultySrinidhi Kasagar2011-02-191-0/+6
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* ARM: l2x0: Optimise the range based operationsSantosh Shilimkar2010-10-261-0/+22
* ARM: l2x0: Determine the cache sizeSantosh Shilimkar2010-10-261-2/+11
* arm: Implement l2x0 cache disable functionsThomas Gleixner2010-10-261-1/+27
* ARM: Improve the L2 cache performance when PL310 is usedCatalin Marinas2010-10-261-3/+12
* ARM: 6272/1: Convert L2x0 to use the IO relaxed operationsCatalin Marinas2010-07-291-13/+13
* ARM: 6210/1: Do not rely on reset defaults of L2X0_AUX_CTRLSascha Hauer2010-07-091-2/+3
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