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path: root/arch/arm/mm/cache-v7.S
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* ARM: 8729/1: Hook B15 readahead cache functions based on processorFlorian Fainelli2017-12-171-0/+21
* scripts/spelling.txt: add "swith" pattern and fix typo instancesMasahiro Yamada2017-02-271-1/+1
* ARM: cache-v7: optimise test for Cortex A9 r0pX devicesRussell King2015-04-141-4/+3
* ARM: cache-v7: optimise branches in v7_flush_cache_louisRussell King2015-04-141-9/+10
* ARM: cache-v7: consolidate initialisation of cache level indexRussell King2015-04-141-2/+2
* ARM: cache-v7: shift CLIDR to extract appropriate field before maskingRussell King2015-04-141-7/+6
* ARM: cache-v7: use movw/movt instructionsRussell King2015-04-141-5/+6
* ARM: convert all "mov.* pc, reg" to "bx reg" for ARMv6+Russell King2014-07-181-15/+15
* ARM: 8055/1: cacheflush: use -st dsb option for ensuring completionWill Deacon2014-05-251-6/+6
* ARM: 7919/1: mm: refactor v7 cache cleaning ops to use way/index sequenceLorenzo Pieralisi2013-12-291-7/+7
* ARM: mm: use inner-shareable barriers for TLB and user cache operationsWill Deacon2013-08-121-2/+2
* ARM: 7752/1: errata: LoUIS bit field in CLIDR register is incorrectJon Medhurst2013-06-171-0/+8
* arm: Add v7_invalidate_l1 to cache-v7.SDinh Nguyen2013-02-111-0/+46
* ARM: 7606/1: cache: flush to LoUU instead of LoUIS on uniprocessor CPUsWill Deacon2012-12-201-2/+4
* Merge branch 'fixes' into for-linusRussell King2012-10-111-0/+3
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| * ARM: 7541/1: Add ARM ERRATA 775420 workaroundSimon Horman2012-09-281-0/+3
* | ARM: mm: rename jump labels in v7_flush_dcache_all functionLorenzo Pieralisi2012-09-251-7/+7
* | ARM: mm: implement LoUIS API for cache maintenance opsLorenzo Pieralisi2012-09-251-0/+36
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* ARM: 7408/1: cacheflush: return error to userspace when flushing syscall failsWill Deacon2012-05-021-6/+4
* ARM: 7325/1: fix v7 boot with lockdep enabledRabin Vincent2012-02-151-1/+1
* ARM: 7321/1: cache-v7: Disable preemption when reading CCSIDRStephen Boyd2012-02-091-0/+6
* ARM: 7091/1: errata: D-cache line maintenance operation by MVA may not succeedWill Deacon2011-09-171-0/+20
* ARM: mm: cache-v7: Use the new processor struct macrosDave Martin2011-07-071-13/+2
* ARM: 6941/1: cache: ensure MVA is cacheline aligned in flush_kern_dcache_areaWill Deacon2011-05-261-0/+2
* Fix common misspellingsLucas De Marchi2011-03-311-1/+1
* ARM: 6528/1: Use CTR for the I-cache line size on ARMv7Catalin Marinas2010-12-121-10/+17
* ARM: 6405/1: Handle __flush_icache_all for CONFIG_SMP_ON_UPTony Lindgren2010-10-041-0/+16
* ARM: Allow SMP kernels to boot on UP systemsRussell King2010-10-041-10/+4
* ARM: 6139/1: ARMv7: Use the Inner Shareable I-cache on MPSantosh Shilimkar2010-05-201-0/+4
* ARM: 6112/1: Use the Inner Shareable I-cache and BTB ops on ARMv7 SMPCatalin Marinas2010-05-081-0/+4
* ARM: dma-mapping: fix for speculative prefetchingRussell King2010-02-151-4/+6
* ARM: dma-mapping: remove dmac_clean_range and dmac_inv_rangeRussell King2010-02-151-4/+2
* ARM: dma-mapping: provide per-cpu type map/unmap functionsRussell King2010-02-151-0/+26
* ARM: add size argument to __cpuc_flush_dcache_pageRussell King2009-12-141-6/+7
* ARM: 5746/1: Handle possible translation errors in ARMv6/v7 coherent_user_rangeCatalin Marinas2009-10-071-2/+17
* Thumb-2: Implement the unified arch/arm/mm supportCatalin Marinas2009-07-241-5/+11
* ARMv7: Add extra barriers for flush_cache_all compressed/head.SCatalin Marinas2008-11-061-0/+2
* [ARM] 5227/1: Add the ENDPROC declarations to the .S filesCatalin Marinas2008-09-011-0/+10
* [ARM] armv7: add support for ARMv7 cores.Catalin Marinas2007-05-081-0/+253
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