linux.git - Linux kernel mainline tree

	Commit message (Collapse)	Author	Age	Files	Lines
*	[ARM] 3356/1: Workaround for the ARM1136 I-cache invalidation problem	Catalin Marinas	2006-03-10	1	-2/+4
\| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \|	Patch from Catalin Marinas ARM1136 erratum 371025 (category 2) specifies that, under rare conditions, an invalidate I-cache by MVA (line or range) operation can fail to invalidate a cache line. The recommended workaround is to either invalidate the entire I-cache or invalidate the range by set/way rather than MVA. Note that for a 16K cache size, invalidating a 4K page by set/way is equivalent to invalidating the entire I-cache. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
*	[ARM SMP] Disable lazy flush_dcache_page for SMP	Russell King	2005-11-30	1	-1/+6
\| \| \| \| \| \| \|	Lazy flush_dcache_page() causes userspace instability on SMP platforms, so disable it for now. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
*	[ARM] 2939/1: Fix compilation error in arch/arm/mm/flush.c	Catalin Marinas	2005-09-30	1	-18/+18
\| \| \| \| \| \| \| \| \| \| \|	Patch from Catalin Marinas When CONFIG_CPU_CACHE_VIPT is defined, the flush_pfn_alias() function is implicitely declared and it later conflicts with its actual definition. This patch moves the function definition to the beginning of the file. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
*	[ARM] Fix ARMv6 VIPT cache >= 32K	Russell King	2005-09-08	1	-0/+52
\| \| \| \| \| \| \|	This adds the necessary changes to ensure that we flush the caches correctly with aliasing VIPT caches. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
*	[PATCH] ARM: Fix delayed dcache flush for ARMv6 non-aliasing caches	Russell King	2005-06-20	1	-26/+18
\| \| \| \| \| \| \| \|	flush_dcache_page() did nothing for these caches, but since they suffer from I/D cache coherency issues, we need to ensure that data is written back to RAM. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
*	[PATCH] ARM: Add V6 aliasing cache flush	Russell King	2005-05-10	1	-2/+35
\| \| \| \| \| \| \|	Add cache flushing support for aliased V6 caches to flush_dcache_page. Signed-off-by: Russell King <rmk@arm.linux.org.uk>
*	Linux-2.6.12-rc2v2.6.12-rc2	Linus Torvalds	2005-04-16	1	-0/+94
	Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!