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* arm64: dts: marvell: Convert 7k/8k usb-phy properties to phy-supplyMiquel Raynal2019-08-271-6/+7
| | | | | | | | | | | | | | | Update Aramda 7k/8k DTs to use the phy-supply property of the (recent) generic PHY framework instead of the (legacy) usb-phy preperty. Both enable the supply when the PHY is enabled. The COMPHY nodes only provide SERDES lanes configuration. The power supply that is represented by the phy-supply property is just a regulator wired to the USB connector, hence the creation of connector nodes as child of the COMPHY nodes and the supply attached to it. Cc: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
* arm64: dts: marvell: Add 7k/8k PHYs in PCIe nodesMiquel Raynal2019-08-271-0/+10
| | | | | | | | | | | | Fill-in the missing PCIe phys/phy-names DT properties of Armada 7k/8k based boards. The MacchiatoBin is a bit particular as the Armada8k-PCI IP supports x4 link widths and in this case the PHY for each lane must be referenced. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
* arm64: dts: marvell: Add 7k/8k PHYs in USB3 nodesMiquel Raynal2019-08-271-0/+2
| | | | | | | | | | Fill-in the missing USB3 phys/phy-names DT properties of Armada 7k/8k based boards. Only update nodes actually enabling USB3 in the default (mainline) configuration. A few USB nodes are enabled but there is only USB2 working on them. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
* arm64: dts: marvell: Add 7k/8k per-port PHYs in SATA nodesMiquel Raynal2019-08-271-0/+18
| | | | | | | | Fill-in the missing SATA phys/phy-names DT properties of Armada 7k/8k based boards. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
* arm64: dts: marvell: Disable AP I2C on Armada-8040-DBKonstantin Porotchkin2019-06-031-5/+2
| | | | | | | | | | | | | | | While AP I2C bus was available to users in early revisions of the SoC, this is not the case anymore since eMMC was connected to the AP. Most users do not have access to this I2C bus so do not enable it in the board device tree. As there are three I2C buses enabled on this board, add an alias to be sure the two other buses keep their initial numbering. Signed-off-by: Konstantin Porotchkin <kostap@marvell.com> [<miquel.raynal@bootlin.com>: Reword commit message, add alias] Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
* arm64: dts: marvell: Remove unnecessary #address-cells/#size-cells under flashesGregory CLEMENT2019-02-081-4/+0
| | | | | | | By using the new binding for the partitions for the flashes we don't need anymore to use #size-cells and #address-cells at the flash node level. Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
* arm64: dts: marvell: 8040-db: describe the 10G interfaces as fixed-linkAntoine Tenart2018-05-171-0/+10
| | | | | | | | | | | This patch adds a fixed-link node to both 10G interfaces of the 8040-db board. This is required as the mvpp2 driver now uses phylink. The best solution would have been to describe the SFP cages but they are not wired correctly, and thus unusable, so we chose to use fixed-link instead. Signed-off-by: Antoine Tenart <antoine.tenart@bootlin.com> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
* arm64: dts: marvell: use reworked NAND controller driver on Armada 8KMiquel Raynal2018-02-271-19/+27
| | | | | | | | | | | | | | Use the new bindings of the reworked Marvell NAND controller driver. Also adapt the nand controller node organization to distinguish which property is relevant for the controller, and which one is NAND chip specific. Expose the partitions as a subnode of the NAND chip. Remove the 'marvell,nand-enable-arbiter' property, not needed anymore as the driver activates the arbiter by default for all boards (either needed or harmless). Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
* arm64: dts: marvell: armada-8040-db: use SPDX-License-IdentifierGregory CLEMENT2018-02-141-40/+1
| | | | | | | | | | | | | | | Follow the recent trend for the license description, and also fix the wrongly stated X11 to MIT. As already pointed on the DT ML, the X11 license text [1] is explicitly for the X Consortium and has a couple of extra clauses. The MIT license text [2] is actually what the current DT files claim. [1] https://spdx.org/licenses/X11.html [2] https://spdx.org/licenses/MIT.html Cc: Thomas Petazzoni <thomas.petazzoni@bootlin.com> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
* arm64: dts: marvell: add Ethernet aliasesYan Markman2018-01-051-0/+7
| | | | | | | | | | | This patch adds Ethernet aliases in the Marvell Armada 7040 DB, 8040 DB and 8040 mcbin device trees so that the bootloader setup the MAC addresses correctly. Signed-off-by: Yan Markman <ymarkman@marvell.com> [Antoine: commit message, small fixes] Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
* arm64: dts: marvell: replace cpm by cp0, cps by cp1Thomas Petazzoni2018-01-051-40/+40
| | | | | | | | | | | | | | | | | In preparation for the introduction of more than 2 CPs in upcoming SoCs, it makes sense to move away from the "CP master" (cpm) and "CP slave" (cps) naming, and use instead cp0/cp1. This commit is the result of: sed 's%cpm%cp0g%' arch/arm64/boot/dts/marvell/* sed 's%cps%cp1g%' arch/arm64/boot/dts/marvell/* So it is a purely mechaninal change. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Suggested-by: Hanna Hawa <hannah@marvell.com> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
* arm64: dts: marvell: add NAND support on the 8040-DB boardMiquel Raynal2017-12-181-0/+28
| | | | | | | | | | | | | Add NAND support on the Armada-8040-DB by adding the same tree as for the Armada-7040-DB by using the same compatible string "marvell,armada-8k-nand". Do not enable the NAND node as enabling it (and changing manually the proper DPR-76 switch) would disable MDIO from CP1 (and thus disable CPS Ethernet PHY). Signed-off-by: Miquel Raynal <miquel.raynal@free-electrons.com> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
* Merge tag 'mvebu-dt64-4.15-1' of git://git.infradead.org/linux-mvebu into ↵Arnd Bergmann2017-10-301-0/+57
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | next/dt Pull "mvebu dt64 for 4.15 (part 1)" from Gregory CLEMENT: On Armada 7K/8k: - Improve network support at SoC and board level - Enable watchdog - Add UART muxing - On 7040 DB: add CD SDIO and NAND support - On 8040 DB: add PCIE more ports and SPI1 On Armada 37xx: - Fix UART register size - Add vmmc regulator for SD on 3720 DB * tag 'mvebu-dt64-4.15-1' of git://git.infradead.org/linux-mvebu: arm64: dts: marvell: 7040-db: Add the carrier detect pin for SD card on CP arm64: dts: marvell: 7040-db: Document the gpio expander arm64: dts: marvell: enable additional PCIe ports on Armada 8040 DB arm64: dts: marvell: add NAND support on the 7040-DB board arm64: dts: marvell: Enable Armada-8040-DB CPS SPI1 arm64: dts: marvell: 8040-db: enable the SFP ports arm64: dts: marvell: 7040-db: enable the SFP port arm64: dts: marvell: 7040-db: add comphy reference to Ethernet port arm64: dts: marvell: mcbin: add comphy references to Ethernet ports arm64: dts: marvell: 37xx: remove empty line arm64: dts: marvell: cp110: add PPv2 port interrupts arm64: dts: marvell: add comphy nodes on cp110 master and slave arm64: dts: marvell: extend the cp110 syscon register area length arm64: dts: marvell: enable AP806 watchdog arm64: dts: marvell: Fix A37xx UART0 register size arm64: dts: marvell: armada-3720-db: Add vmmc regulator for SD slot arm64: dts: marvell: add UART muxing on Armada 7K/8K
| * arm64: dts: marvell: enable additional PCIe ports on Armada 8040 DBThomas Petazzoni2017-10-021-0/+14
| | | | | | | | | | | | | | | | | | The Armada 8040 DB has numerous PCIe ports, so let's enable a few more of those PCIe ports that are enabled in the default bootloader configuration. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
| * arm64: dts: marvell: Enable Armada-8040-DB CPS SPI1Christine Gharzuzi2017-09-251-0/+31
| | | | | | | | | | | | | | | | | | | | | | Add the DT node enabling Armada-8040-DB CPS SPI controller driver. Add the SPI NAND flash device connected on the bus. Fill the MTD partitions layout. Signed-off-by: Christine Gharzuzi <chrisg@marvell.com> Signed-off-by: Miquel Raynal <miquel.raynal@free-electrons.com> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
| * arm64: dts: marvell: 8040-db: enable the SFP portsAntoine Tenart2017-09-221-0/+10
| | | | | | | | | | | | | | | | | | This patch enables the SFP ports on the Armada 8040 DB as these ports are now supported by the PPv2 driver (since the PHY is now optional). Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Tested-by: Marcin Wojtas <mw@semihalf.com> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
| * arm64: dts: marvell: add UART muxing on Armada 7K/8KThomas Petazzoni2017-09-191-0/+2
| | | | | | | | | | | | | | | | | | | | | | This commit adds the relevant details in the Armada 7K/8K Device Tree to properly mux the UART used for the serial console. Since there is basically only one possible muxing for the UART0 on the AP, the muxing configuration is described in armada-ap806.dtsi, and selected from the individual boards (other boards could be using a different UART). Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
* | arm64: dts: fix unit-address leading 0sRob Herring2017-10-201-1/+1
|/ | | | | | | | | | Fix dtc warnings for 'simple_bus_reg' due to leading 0s. Converted using the following command: perl -p -i -e 's/\@0+([0-9a-f])/\@$1/g' `find arch/arm64/boot/dts -type -f -name '*.dts*' Signed-off-by: Rob Herring <robh@kernel.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* ARM64: dts: marvell: enable USB host on Armada-8040-DBGrzegorz Jaszczyk2017-08-141-0/+65
| | | | | | | | | | | | | | Enable USB host on Armada-8040-DB by adding USB PHY nodes for the following ports: - host 0 and 1 of CPM - host 0 of CPS These PHY are enabled by lanes coming from regulators based on two I2C expanders. Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com> Signed-off-by: Miquel Raynal <miquel.raynal@free-electrons.com> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
* arm64: dts: marvell: remove cpm crypto nodes from dts filesAntoine Tenart2017-06-171-4/+0
| | | | | | | | The cryptographic engine on the master cp110 is now enabled by default at the SoC level. Remove its dts nodes that were only enabling it. Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
* arm64: dts: marvell: explicitly enable the mdio nodes for 7k/8k DBAntoine Tenart2017-06-171-0/+4
| | | | | | | | | Explicitly enable the MDIO nodes in the Marvell Armada 7k DB and Marvell Armada 8k DB. This is needed as the MDIO nodes will be disabled in the CP 110 slave and master dtsi by a following up patch. Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
* arm64: dts: marvell: add second 1G port on the Armada 8040 DBMarcin Wojtas2017-06-171-0/+16
| | | | | | | | | | Armada 8040 DB is equipped with 4 (2x 10G SFI + 2x 1G RGMII) ethernet ports of which only one was hitherto enabled. Because currently mvpp2 driver is capable of supporting only 1G RGMII/SGMII, enable second port from CP slave HW block. Signed-off-by: Marcin Wojtas <mw@semihalf.com> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
* arm64: marvell: dts: enable the crypto engine on the Armada 8040 DBAntoine Tenart2017-04-121-0/+4
| | | | | | | | | Enable the cryptographic engine available in the CP110 master on the Armada 8040 DB. Do not enable the one in the CP110 salve for now, as we do not support multiple cryptographic engines yet. Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
* arm64: dts: marvell: add sdhci support for Armada 7K/8KGregory CLEMENT2017-04-111-0/+12
| | | | | | Also enable it on the Armada 7040 DB and Armada 8040 DB boards. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
* arm64: marvell: dts: add PPv2.2 description to Armada 7K/8KThomas Petazzoni2017-03-231-0/+16
| | | | | | | | | This commit adds the description of the PPv2.2 hardware block for the Marvell Armada 7K and Armada 8K processors, and their corresponding Armada 7040 and 8040 Development boards. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
* arm64: dts: marvell: add description for the Armada 8040 dev boardThomas Petazzoni2016-08-081-0/+150
This commit adds a Device Tree description for the Marvell Armada 8040 Development Board. It features a quad-core Cortex A72 Armada 8040 SoC, with a large number of peripherals: dual Gigabit, dual 10 GBit, 6 PCIe interfaces, 6 SATA ports, 4 USB 3.0 ports, and more. Only a subset of the functionalities are supported so far, and additional features will be progressively enabled in the future. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
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