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New bindings impose to declare the thermal IP from within a new syscon.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
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git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/dt
Freescale arm64 device tree update for 4.20:
- Add the second Dual UART device for LS208xA SoCs.
- Add necessary big-endian property for NOR device on LS104xA based
boards, remove unneeded big-endian property from IFC controller.
- DTC has new checks for I2C and SPI buses to land into 4.20. A patch
from Rob to fix the bus node names and warnings in unit-addresses.
* tag 'imx-dt64-4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
arm64: dts: fsl: Fix I2C and SPI bus warnings
arm64: dts: ls208xa: add second duart
arm64: dts: fsl: remove big-endian field from IFC controller
arm64: dts: Add big-endian in nor node for ls104xa
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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dtc has new checks for I2C and SPI buses. Fix the SPI bus node names
and warnings in unit-addresses.
arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb.dtb: Warning (i2c_bus_reg): /soc/i2c@2180000/eeprom@57: I2C bus unit address format error, expected "53"
arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb.dtb: Warning (i2c_bus_reg): /soc/i2c@2180000/eeprom@56: I2C bus unit address format error, expected "52"
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Li Yang <leoyang.li@nxp.com>
Signed-off-by: Rob Herring <robh@kernel.org>
Acked-by: Li Yang <leoyang.li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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The NXP LS208xA SoCs have two dual uarts. Thus, add the second one.
Signed-off-by: Kurt Kanzenbach <kurt@linutronix.de>
Acked-by: Li Yang <leoyang.li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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As per IFC binding, Absence of "little-endian" field causes registers
access in big-endian mode.
So no need to set explicit big-endian field IFC node for LS1043A and
LS1046A.
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Acked-by: Li Yang <leoyang.li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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NOR and IFC controller connectivity is big-endian.
So add big-endian field in nor device tree node allowing
IFC controller to read/write data from/to the flash correctly.
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Acked-by: Li Yang <leoyang.li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux into next/dt
Qualcomm ARM64 Updates for v4.20
* Update Coresight for MSM8916
* Switch to use mailbox for smp2p and smd on MSM8996
* Add dispcc, dsp, USB, regulator, and other nodes for SDM845
* Drop model/compatible from MSM8916 and MSM8996
* Add compat for db820c
* Add MSM8998 SoC and board support along with associated nodes
* Add RESIN/PON for Qualcomm PM8916 and PM8994
* tag 'qcom-arm64-for-4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux: (31 commits)
Revert "dt-bindings: thermal: qcom-spmi-temp-alarm: Fix documentation of 'reg'"
Revert "dt-bindings: iio: vadc: Fix documentation of 'reg'"
arm64: dts: msm8916: Update coresight bindings for hardware ports
arm64: dts: msm8996: Transition smp2p and smd to mailbox
arm64: dts: qcom: pm8998: Add pm8998 thermal zone
arm64: dts: qcom: pm8998: Add spmi-temp-alarm node
dt-bindings: thermal: qcom-spmi-temp-alarm: Fix documentation of 'reg'
arm64: dts: sdm845: Add dispcc node
arm64: dts: qcom: sdm845: Add adsp, cdsp and slpi smp2p
arm64: dts: qcom: sdm845-mtp: Add nodes for USB
arm64: dts: qcom: sdm845-mtp: Add RPMh VRM/XOB regulators
arm64: dts: qcom: sdm845: Add USB-related nodes
arm64: dts: qcom: Add AOSS reset driver node for SDM845
arm64: dts: msm8996: Drop model
arm64: dts: msm8916: Drop model and compatible
arm64: dts: db820c: Add qcom,apq8096 to compatible string
arm64: dts: qcom: Populate pm8998 with additional nodes
arm64: dts: qcom: msm8998: Add smp2p nodes
arm64: dts: qcom: msm8998: Add the qfprom node
arm64: dts: qcom: msm8998: Add firmware node
...
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Switch to updated coresight bindings for hw ports
Cc: Andy Gross <andy.gross@linaro.org>
Cc: David Brown <david.brown@linaro.org>
Cc: Ivan T. Ivanov <ivan.ivanov@linaro.org>
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
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The smd and smp2p drivers now support accessing the APCS GLOBAL IPC
register through the mailbox framework, so migrate the msm8996 dts to
use this and remove the syscon based APCS node.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
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The thermal zone uses spmi-temp-alarm as sensor, the trip points
correspond to the PMIC thermal stages 1 and 2. The critical trip
point at 125°C disables the partial PMIC shutdown at stage 2.
Without an IIO input the sensor only reports a limited number of
temperatures:
- 37°C for temperatures below 105°C
- 107°C for temperatures >= 105°C and < 125°C
- 127°C for temperatures >= 125°C
(the numbers correspond to a stage 1 threshold of 105°C)
Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
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This adds the spmi-temp-alarm node to pm8998 based on the examples in the
bindings.
Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
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This adds the display clock controller node to sdm845 based on the
examples in the bindings.
Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
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Add the SMP2P nodes for the remoteproc states for adsp, cdsp and slpi.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
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Set the various nodes to "okay" and hook up the regulators.
NOTE: For now the main USB port (the one that goes out the Type C
connector) is forced to host. Eventually someone will need to get the
Type C detection hooked up and get this all integrated with the
PMI8998 PMIC. The reason for forcing to "host" in the meantime is
that this will leave us with one "host" and one "peripheral" port.
In order for host mode this to work, we assume that the bootloader
left things configured enough for us. Apparently the magic for that
is is to do these writes on pmi8998:
- pm_comm_write_byte(2, 0x1153, 0x2C, 0);
- pm_comm_write_byte(2, 0x1152, 0x07, 0);
- pm_comm_write_byte(2, 0x1140, 0x00, 0);
- pm_comm_write_byte(2, 0x1140, 0x01, 0);
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
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Add regulator devices for PMIC regulators managed via VRM and XOB
RPMh accelerators.
A few notes here:
- Regulators are added directly to the board file. While it's true
that this will mean a bunch of copy/pasting for other boards that
are very similar, this is probably the right call since boards
could make changes to the way these regulators are hooked up and
trying to find a way to avoid duplication will result in some
confusing node overrides.
- Regulators that are hooked up to supply pins on the SoC are given
an alias matching the name of that pin (pin name comes from the
Qualcomm SoC "device specification" doc).
- Other regulator labels are based on the schematic. If there is
more than one logical name on the schematic for the same rail the
secondary names are also listed and should be referred to as
appropriate.
- Regulators all default to HPM mode w/ no ability to switch modes.
Future patches can switch things to LPM and possibly add
dynamic load switching if we have determined there's a benefit.
This should only be done for rails where we'll actually be able
to take advantage of the lower power modes so we don't need to
churn with lots of patches adding regulator_set_load() calls
to drivers.
NOTE: This patch is loosely based on one originally shared to me by
David Collins.
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
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This adds nodes for USB and related PHYs.
Signed-off-by: Manu Gautam <mgautam@codeaurora.org>
[dianders: reworked quite a bit]
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
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This patch adds the node to support AOSS reset driver on
SDM845
Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
[bjorn: Updated addresses to match the binding that was merged]
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
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DTS board files should always specify model and compatible.
All DTS board files that includes msm8996.dtsi
already specifies model and compatible, and will thus
override the model and compatible in msm8996.dtsi.
Drop model from msm8916.dtsi, since it is only a source of confusion.
Signed-off-by: Niklas Cassel <niklas.cassel@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
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DTS board files should always specify model and compatible.
All DTS board files that includes msm8916.dtsi
already specifies model and compatible, and will thus
override the model and compatible in msm8916.dtsi.
Drop model and compatible from msm8916.dtsi,
since they are only a source of confusion.
Signed-off-by: Niklas Cassel <niklas.cassel@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
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Add qcom,apq8096 to compatible string.
This compatible is defined in Documentation/devicetree/bindings/arm/qcom.txt
and is needed for e.g. drivers/cpufreq/qcom-cpufreq-kryo.c to be probed
correctly (and for drivers/cpufreq/cpufreq-dt-platdev.c to work properly).
Signed-off-by: Niklas Cassel <niklas.cassel@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
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Add pon, coincell and rtc to the first pm8998 sid.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
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Add the adsp, modem and slpi smp2p nodes to msm8998.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
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Add the QFPROM nvmem node to msm8998
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
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Add the firmware and scm nodes for msm8998
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
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Add reserve-memory nodes, tcsr-mutex nodes and the smem node.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
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Add new dtsi file for the PMI8998, with its gpios and include all three
PMICs in the MSM8998 MTP dts.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
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Add the two tsens instances and the thermal zones for CPUs, GPUs,
battery and skin sensors.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
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Add nodes for RPM communication for MSM8998 and the regulator nodes for
the MTP.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
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Add initial device tree support for the Qualcomm MSM8998 SoC and
MTP8998 evaluation board.
Signed-off-by: Joonwoo Park <joonwoop@codeaurora.org>
Signed-off-by: Imran Khan <kimran@codeaurora.org>
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
[bjorn: Restructured, removed its node and moved to SPDX headers]
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
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This adds the adc node to pm8998 based on the examples in the
bindings. It also fixes the order of the included headers.
Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
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Resin is board specific, so add the resin node in apq8096-db820c dtsi
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
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Resin is board specific so add the resin node in apq8016-sbc dtsi
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
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Add PON and pwrkey as child nodes for PON driver.
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
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Add PON and pwrkey as child nodes for PON device. Also
add additional properties for pwrkey i.e., linux,code
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
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git://git.kernel.org/pub/scm/linux/kernel/git/afaerber/linux-actions into next/dt
Actions Semi arm64 based SoC DT for v4.20
This updates SPDX headers for remaining files.
For S900 it adds clock, pinctrl, i2c and dma nodes.
S900 SPS is added via topic branch (shared with driver).
For S700 it adds clock nodes.
* tag 'actions-arm64-dt-for-4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/afaerber/linux-actions:
arm64: dts: actions: s700: Set UART clock references from CMU
arm64: dts: actions: s700: Add Clock Management Unit
arm64: dts: actions: s900: Add DMA Controller
arm64: dts: actions: s900-bubblegum-96: Enable I2C1 and I2C2
arm64: dts: actions: s900: Add I2C controller nodes
arm64: dts: actions: s900-bubblegum-96: Add gpio line names
arm64: dts: actions: s900: Add gpio properties to pinctrl node
arm64: dts: actions: s900: Add pinctrl node
arm64: dts: actions: s900: Add SPS node
arm64: dts: actions: s900: Source CMU clock for UARTs
arm64: dts: actions: s900: Add Clock Management Unit nodes
dt-bindings: power: Add Actions Semi S900 SPS
arm64: dts: actions: Convert to new-style SPDX license identifiers
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Remove fixed clock in Cubieboard 7 and use Clock Management Unit clocks
for all UART nodes in Actions Semi S700 SoC.
Signed-off-by: Parthiban Nallathambi <pn@denx.de>
Signed-off-by: Saravanan Sekar <sravanhome@gmail.com>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
[AF: Moved/added to SoC]
Signed-off-by: Andreas Färber <afaerber@suse.de>
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Add Clock Management Unit for Actions Semi S700 SoC.
Signed-off-by: Parthiban Nallathambi <pn@denx.de>
Signed-off-by: Saravanan Sekar <sravanhome@gmail.com>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Andreas Färber <afaerber@suse.de>
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Add DMA controller node for Actions Semi S900 SoC.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Andreas Färber <afaerber@suse.de>
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Add pinctrl definitions for Actions Semiconductor S900 I2C controllers.
Pinctrl definitions are only available for I2C0, I2C1, and I2C2.
Enable I2C1 and I2C2 exposed on the low speed expansion connector in
Bubblegum-96 board.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
[AF: Squashed]
Signed-off-by: Andreas Färber <afaerber@suse.de>
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Add I2C controller nodes for Actions Semiconductor S900 SoC.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
[AF: Squashed/added clocks, dropped pinctrl properties for now]
Signed-off-by: Andreas Färber <afaerber@suse.de>
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Add gpio line names to Actions Semi S900 based Bubblegum-96 board.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Andreas Färber <afaerber@suse.de>
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Add gpio properties to pinctrl node for Actions Semi S900 SoC.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Andreas Färber <afaerber@suse.de>
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Add pinctrl nodes for Actions Semi S900 SoC.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Andreas Färber <afaerber@suse.de>
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Add Actions Semi S900 Smart Power System (SPS) node.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Andreas Färber <afaerber@suse.de>
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Remove fixed clock in Bubblegum-96 board and source CMU (Clock
Management Unit) clock for UART nodes in Actions Semi S900 SoC.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
[AF: Move/add clocks to SoC]
Signed-off-by: Andreas Färber <afaerber@suse.de>
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Add Actions Semi S900 Clock Management Unit (CMU) nodes.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Andreas Färber <afaerber@suse.de>
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Move SPDX-License-Identifier to the top and add one for the Makefile.
Signed-off-by: Andreas Färber <afaerber@suse.de>
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git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux into next/dt
mt2712 - add spi slave node
mt7622:
- add timer node
- add CCI node
- add PMU node
- add bluetooth node
- add SPI slave node
- fix reference board (rfb1) memory and sort node alphabetically
- add support for Bananapi-R64
* tag 'v4.19-next-dts64' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux:
arm64: dts: Add spi slave dts
arm64: dts: mt7622: add bananapi BPI-R64 board
arm64: dts: mt7622: fix ram size for rfb1
arm64: dts: mt7622: add a bluetooth 5 device node
arm64: dts: mt7622: add timer, CCI-400 and PMU nodes
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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This patch adds MT2712 spi slave into device tree.
Signed-off-by: Leilk Liu <leilk.liu@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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Add support for the bananapi R64 (BPI-R64) development board from
BIPAI KEJI. Detailed hardware information for BPI-R64 which could be
found on http://wiki.banana-pi.org/Banana_Pi_BPI-R64
Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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