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* arm64/sysreg: Generate definitions for FAR_ELxMark Brown2022-05-201-0/+12
* arm64/sysreg: Generate definitions for DACR32_EL2Mark Brown2022-05-201-0/+20
* arm64/sysreg: Generate definitions for CSSELR_EL1Mark Brown2022-05-201-0/+7
* arm64/sysreg: Generate definitions for CPACR_ELxMark Brown2022-05-201-0/+20
* arm64/sysreg: Generate definitions for CONTEXTIDR_ELxMark Brown2022-05-201-0/+17
* arm64/sysreg: Generate definitions for CLIDR_EL1Mark Brown2022-05-201-0/+16
* arm64/sve: Generate ZCR definitionsMark Brown2022-05-161-0/+18
* arm64/sme: Generate defintions for SVCRMark Brown2022-05-161-0/+6
* arm64/sme: Generate SMPRI_EL1 definitionsMark Brown2022-05-161-0/+5
* arm64/sme: Automatically generate SMPRIMAP_EL2 definitionsMark Brown2022-05-161-0/+19
* arm64/sme: Automatically generate SMIDR_EL1 definesMark Brown2022-05-161-0/+9
* arm64/sme: Automatically generate defines for SMCRMark Brown2022-05-161-0/+20
* arm64/sysreg: Support generation of RAZ fieldsMark Brown2022-05-161-0/+7
* Merge branch 'for-next/sme' into for-next/sysreg-genCatalin Marinas2022-05-161-0/+2
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| * arm64/sme: Basic enumeration supportMark Brown2022-04-221-0/+2
* | arm64/sysreg: fix odd line spacingMark Rutland2022-05-151-3/+3
* | arm64/sysreg: improve comment for regs without fieldsMark Rutland2022-05-151-1/+1
* | arm64/sysreg: Generate definitions for SCTLR_EL1Mark Brown2022-05-041-0/+71
* | arm64/sysreg: Generate definitions for TTBRn_EL1Mark Brown2022-05-041-0/+14
* | arm64/sysreg: Generate definitions for ID_AA64ISAR0_EL1Mark Brown2022-05-041-0/+67
* | arm64/sysreg: Enable automatic generation of system register definitionsMark Brown2022-05-041-1/+7
* | arm64: Add sysreg header generation scriptingMark Rutland2022-05-042-0/+309
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* Merge branch 'for-next/spectre-bhb' into for-next/coreWill Deacon2022-03-141-0/+1
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| * arm64: Mitigate spectre style branch history side channelsJames Morse2022-02-241-0/+1
* | Merge branch 'for-next/pauth' into for-next/coreWill Deacon2022-03-141-2/+4
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| * | arm64: Add support of PAuth QARMA3 architected algorithmVladimir Murzin2022-02-251-0/+2
| * | arm64: cpufeature: Mark existing PAuth architected algorithm as QARMA5Vladimir Murzin2022-02-251-2/+2
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* / arm64: clean up tools MakefileMasahiro Yamada2022-03-081-7/+3
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* KVM: arm64: Workaround Cortex-A510's single-step and PAC trap errataJames Morse2022-02-031-2/+3
* arm64: errata: Add detection for TRBE trace data corruptionAnshuman Khandual2022-01-271-0/+1
* arm64: errata: Add detection for TRBE invalid prohibited statesAnshuman Khandual2022-01-271-0/+1
* arm64: errata: Add detection for TRBE ignored system register writesAnshuman Khandual2022-01-271-0/+1
* Merge branch 'for-next/trbe-errata' into for-next/coreWill Deacon2021-10-291-0/+3
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| * arm64: errata: Add detection for TRBE write to out-of-rangeSuzuki K Poulose2021-10-211-0/+1
| * arm64: errata: Add workaround for TSB flush failuresSuzuki K Poulose2021-10-211-0/+1
| * arm64: errata: Add detection for TRBE overwrite in FILL modeSuzuki K Poulose2021-10-211-0/+1
* | Merge branch 'for-next/mte' into for-next/coreWill Deacon2021-10-291-0/+1
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| * | arm64: mte: CPU feature detection for Asymm MTEVincenzo Frascino2021-10-071-0/+1
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* / arm64: Add a capability for FEAT_ECVMarc Zyngier2021-10-191-0/+1
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* arm64: Allow mismatched 32-bit EL0 supportWill Deacon2021-06-111-1/+2
* arm64: tools: Add __ASM_CPUCAPS_H to the endif in cpucaps.hMark Brown2021-05-131-1/+1
* arm64: Generate cpucaps.hMark Brown2021-05-103-0/+127