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* Merge branch 'linus' into x86/apicIngo Molnar2009-02-2222-83/+62
|\ | | | | | | | | | | | | | | | | | | Conflicts: arch/x86/mach-default/setup.c Semantic conflict resolution: arch/x86/kernel/setup.c Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * [ARM] 5405/1: ep93xx: remove unused gesbc9312.h headerHartley Sweeten2009-02-192-4/+0
| | | | | | | | | | | | | | Remove the gesbc9312.h header since it is unused. Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * [ARM] 5404/1: Fix condition in arm_elf_read_implies_exec() to set ↵Makito SHIOKAWA2009-02-191-2/+2
| | | | | | | | | | | | | | | | | | | | | | READ_IMPLIES_EXEC READ_IMPLIES_EXEC must be set when: o binary _is_ an executable stack (i.e. not EXSTACK_DISABLE_X) o processor architecture is _under_ ARMv6 (XN bit is supported from ARMv6) Signed-off-by: Makito SHIOKAWA <lkhmkt@gmail.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * [ARM] omap: fix clock reparenting in omap2_clk_set_parent()Russell King2009-02-191-4/+4
| | | | | | | | | | | | | | | | | | When changing the parent of a clock, it is necessary to keep the clock use counts balanced otherwise things the parent state will get corrupted. Since we already disable and re-enable the clock, we might as well use the recursive versions instead. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * [ARM] 5402/1: fix a case of wrap-around in sanity_check_meminfo()Nicolas Pitre2009-02-191-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | In the non highmem case, if two memory banks of 1GB each are provided, the second bank would evade suppression since its virtual base would be 0. Fix this by disallowing any memory bank which virtual base address is found to be lower than PAGE_OFFSET. Reported-by: Lennert Buytenhek <buytenh@marvell.com> Signed-off-by: Nicolas Pitre <nico@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * [ARM] 5401/1: Orion: fix edge triggered GPIO interrupt supportNicolas Pitre2009-02-175-53/+29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The GPIO interrupts can be configured as either level triggered or edge triggered, with a default of level triggered. When an edge triggered interrupt is requested, the gpio_irq_set_type method is called which currently switches the given IRQ descriptor between two struct irq_chip instances: orion_gpio_irq_level_chip and orion_gpio_irq_edge_chip. This happens via __setup_irq() which also calls irq_chip_set_defaults() to assign default methods to uninitialized ones. The problem is that irq_chip_set_defaults() is called before the irq_chip reference is switched, leaving the new irq_chip (orion_gpio_irq_edge_chip in this case) with uninitialized methods such as chip->startup() causing a kernel oops. Many solutions are possible, such as making irq_chip_set_defaults() global and calling it from gpio_irq_set_type(), or calling __irq_set_trigger() before irq_chip_set_defaults() in __setup_irq(). But those require modifications to the generic IRQ code which might have adverse effect on other architectures, and that would still be a fragile arrangement. Manually copying the missing methods from within gpio_irq_set_type() would be really ugly and it would break again the day new methods with automatic defaults are added. A better solution is to have a single irq_chip instance which can deal with both edge and level triggered interrupts. It is also a good idea to switch the IRQ handler instead, as the edge IRQ handler allows for one edge IRQ event to be queued as the IRQ is actually masked only when that second IRQ is received, at which point the hardware can queue an additional IRQ event, making edge triggered interrupts a bit more reliable. Tested-by: Martin Michlmayr <tbm@cyrius.com> Signed-off-by: Nicolas Pitre <nico@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * [ARM] 5400/1: Add support for inverted rdy_busy pin for Atmel nand device ↵Gregory CLEMENT2009-02-161-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | controller Add support for inverted rdy_busy pin for Atmel nand device controller It will fix building error on NeoCore926 board. Acked-by: Andrew Victor <linux@maxim.org.za> Acked-by: David Woodhouse <David.Woodhouse@intel.com> Signed-off-by: Gregory CLEMENT <gclement@adeneo.adetelgroup.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * [ARM] 5391/1: AT91: Enable GPIO clocks earlierAndrew Victor2009-02-141-5/+10
| | | | | | | | | | | | | | | | | | Enable the GPIO clocks earlier in the initialization sequence. This allow the board-setup code to read and set GPIO pins. Signed-off-by: Marc Pignat <marc.pignat@hevs.ch> Signed-off-by: Andrew Victor <linux@maxim.org.za> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * [ARM] 5390/1: AT91: Watchdog fixesAndrew Victor2009-02-1410-10/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The recently merged AT91SAM9 watchdog driver uses the AT91SAM9X_WATCHDOG config variable, whereas the original version of the driver (and the platform support code) used AT91SAM9_WATCHDOG. This causes the watchdog platform_device to never be registered, and therefore the driver not to be initialized. This patch: - updates the platform support code to use AT91SAM9X_WATCHDOG. - includes <linux/io.h> to fix compile error (same fix as was applied to at91rm9200_wdt.c) - fixes comment regarding watchdog clock-rates in at91rm9200. Signed-off-by: Andrew Victor <linux@maxim.org.za> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * [ARM] omap: fix _omap2_clksel_get_src_field()Russell King2009-02-141-1/+1
| | | | | | | | | | | | | | | | _omap2_clksel_get_src_field() was returning the first entry which was either the default _or_ applicable to the SoC. This is wrong - we should be returning the first default which is applicable to the SoC. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * [ARM] omap: fix omap2_divisor_to_clksel() error return valueRussell King2009-02-141-3/+3
| | | | | | | | | | | | | | | | The error checks for omap2_divisor_to_clksel() and comment disagree with the actual value returned on error. Fix this to return the correct error value. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | Merge branch 'core/header-fixes' into x86/headersIngo Molnar2009-02-133-3/+3
|\ \ | | | | | | | | | | | | Conflicts: arch/x86/include/asm/setup.h
| * | headers_check fix: arm, swab.hJaswinder Singh Rajput2009-02-011-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | fix the following 'make headers_check' warnings: usr/include/asm-arm/swab.h:19: include of <linux/types.h> is preferred over <asm/types.h> usr/include/asm-arm/swab.h:25: found __[us]{8,16,32,64} type without #include <linux/types.h> Signed-off-by: Jaswinder Singh Rajput <jaswinderrajput@gmail.com>
| * | headers_check fix: arm, setup.hJaswinder Singh Rajput2009-02-011-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | fix the following 'make headers_check' warnings: usr/include/asm-arm/setup.h:17: include of <linux/types.h> is preferred over <asm/types.h> usr/include/asm-arm/setup.h:25: found __[us]{8,16,32,64} type without #include <linux/types.h> Signed-off-by: Jaswinder Singh Rajput <jaswinderrajput@gmail.com>
| * | headers_check fix: arm, a.out.hJaswinder Singh Rajput2009-02-011-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | fix the following 'make headers_check' warnings: usr/include/asm-arm/a.out.h:5: include of <linux/types.h> is preferred over <asm/types.h> usr/include/asm-arm/a.out.h:9: found __[us]{8,16,32,64} type without #include <linux/types.h> Signed-off-by: Jaswinder Singh Rajput <jaswinderrajput@gmail.com>
* | | Merge branch 'linus' into x86/apicIngo Molnar2009-02-1326-258/+138
|\ \ \ | | |/ | |/| | | | | | | | | | Conflicts: arch/x86/kernel/acpi/boot.c arch/x86/mm/fault.c
| * | [ARM] Storage class should be before const qualifierTobias Klauser2009-02-101-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The C99 specification states in section 6.11.5: The placement of a storage-class specifier other than at the beginning of the declaration specifiers in a declaration is an obsolescent feature. Signed-off-by: Tobias Klauser <tklauser@distanz.ch> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | Merge branch 'fix' of ↵Russell King2009-02-095-11/+18
| |\ \ | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/ycmiao/pxa-linux-2.6
| | * | [ARM] pxa: stop and disable IRQ for each DMA channels at startupEric Miao2009-01-211-8/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Some broken bootloaders will leave the DMA channel state unclean, which we should really initialize correctly here. Signed-off-by: Eric Miao <eric.miao@marvell.com>
| | * | [ARM] pxa: make more SSCR0 bit definitions visible on multiple processorsEric Miao2009-01-191-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The only exclusive definitions are SSCR0_SCR and SSCR0_SerClkDiv(), loosen that exclusive #ifdef .. #else .. #endif to allow other definitions to be visible when slected multiple processors. This helps to pass the building of pxa-ssp.c. Signed-off-by: Eric Miao <eric.miao@marvell.com>
| | * | [ARM] pxa: fix missing of __REG() definition for ac97 registers accessEric Miao2009-01-191-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | This currently happens for 'drivers/input/touch/mainstone-wm97xx.c'. Signed-off-by: Eric Miao <eric.miao@marvell.com>
| | * | [ARM] pxa: fix NAND and MMC clock initialization for pxa3xxMike Rapoport2009-01-192-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | After commit 8c3abc7d903df492a7394b0adae4349d9a381aaf ("[ARM] pxa: convert to clkdev and match clocks by struct device where possible") get_clk in pxa3xx_nand fails with -ENOENT. Apparently, clk_get in pxamci will also fail for MCI2 on PXA310. The 'clk_find' and therefore 'clk_get' require driver to supply both 'dev_id' and 'con_id' if they are not NULL in the 'strcut clk_lookup', but neither pxa3xx_nand nor pxamci supply 'con_id'. This patch sets 'con_id' to NULL in NAND clock and MCI2 clock registration. Signed-off-by: Mike Rapoport <mike@compulab.co.il> Signed-off-by: Eric Miao <eric.miao@marvell.com>
| * | | Merge master.kernel.org:/home/rmk/linux-2.6-armLinus Torvalds2009-02-0320-245/+118
| |\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * master.kernel.org:/home/rmk/linux-2.6-arm: NVRAM depends on RTC_DRV_CMOS rename platform_driver name "flash" to "sa1100-mtd" annotate that [fp, #-4] is the saved lr Use __SPIN_LOCK_UNLOCKED to initialize bad_irq_desc.lock ARM: OMAP: fix fault in enter_full_retention() ARM: OMAP: Mask interrupts when disabling interrupts, v2 ARM: OMAP: gptimer min_delta_ns corrected ARM: OMAP: Fix hsmmc init, v2 ARM: OMAP: Fix omap34xx revision detection for ES3.1 ARM: OMAP: DMA: Fix uninitialized channel flags ARM: OMAP: Fix race in OMAP2/3 DMA IRQ handling ARM: OMAP: Fix McBSP spin_lock deadlock [ARM] 5366/1: fix shared memory coherency with VIVT L1 + L2 caches [ARM] call undefined instruction exception handler with irqs enabled [ARM] msm: fix build errors [ARM] etherh: continue fixing build failure
| | * \ \ Merge branch 'omap-fixes' of ↵Russell King2009-02-0114-241/+109
| | |\ \ \ | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6
| | | * | | ARM: OMAP: fix fault in enter_full_retention()Kevin Hilman2009-01-291-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In omap24xx_cpu_suspend assembly routine, the r2 register which holds the address of the SDRC_POWER reg is set to zero before the value is written back triggering a fault due to writing to address zero. It's hard to tell where this change was introduced since this file has been moved and merged. While this fix prevents a crash, suspend on my n810 is broken with current kernels. I never come out of suspend. Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| | | * | | ARM: OMAP: Mask interrupts when disabling interrupts, v2김규원2009-01-291-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | By Ingo Molnar, interrupts are not masked by default. (refer to 76d2160147f43f982dfe881404cfde9fd0a9da21) But if interrupts are not masked, the processor can wake up while in Suspend-to-RAM state by an external interrupt. For example, if an OMAP3 board is connected to Host PC by USB and entered to Suspend-to-RAM state, it wake up automatically by M_IRQ_92. The disable_irq() function can't disable the interrupt in H/W level, So I modified arch/arm/mach-omap2/irq.c Signed-off-by: Kim Kyuwon <chammoru@gmail.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| | | * | | ARM: OMAP: gptimer min_delta_ns correctedAaro Koskinen2009-01-291-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When 32 kHz timer is used the min_delta_ns should be initialized so that it reflects the timer programming cost. A write to the timer device will be usually posted, but it takes roughly 3 cycles before it is effective. If the timer is reprogrammed before that, the CPU will stall until the previous write completes. This was pointed out by Richard Woodruff. Since the lower bound for min_delta_ns is 1000, the change is visible only with tick rates less than 3 MHz. Also note that the old value is incorrect for 32 kHz also due to a rounding error, and it can cause the timer queue to hang (due to clockevent code trying to program the timer with zero ticks). Signed-off-by: Aaro Koskinen <Aaro.Koskinen@nokia.com> Reviewed-by: Richard Woodruff <r-woodruff2@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| | | * | | ARM: OMAP: Fix hsmmc init, v2Tony Lindgren2009-01-294-12/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The naming accidentally broke while changing the name for the driver to not to conflict with the other mmc driver. Signed-off-by: Tony Lindgren <tony@atomide.com>
| | | * | | ARM: OMAP: Fix omap34xx revision detection for ES3.1Tony Lindgren2009-01-292-1/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix omap34xx revision detection for ES3.1 Signed-off-by: Tony Lindgren <tony@atomide.com>
| | | * | | ARM: OMAP: DMA: Fix uninitialized channel flagsJarkko Nikula2009-01-291-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This has similar symptoms than 66c23551b1b774e2be3c7bdf91c0ebf2c7a3519e where just omap_request_dma, omap_dma_link_lch and omap_dma_unlink_lch can cause incorrect dump_stack(). Here it can happen if channel has been used before and the channel flags variable holds old status. Signed-off-by: Jarkko Nikula <jarkko.nikula@nokia.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| | | * | | ARM: OMAP: Fix race in OMAP2/3 DMA IRQ handlingJuha Yrjola2009-01-291-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CSR must be cleared before invoking the callback. If the callback function starts a new, fast DMA transfer on the same channel, the completion status might lost if CSR is cleared after the callback invocation. Signed-off-by: Juha Yrjola <juha.yrjola@solidboot.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| | | * | | ARM: OMAP: Fix McBSP spin_lock deadlockStanley.Miao2009-01-294-223/+78
| | | | |/ | | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A spin_lock deadlock will occur when omap_mcbsp_request() is invoked. omap_mcbsp_request() \- clk_enable(mcbsp->clk) [takes and holds clockfw_lock] \- omap2_clk_enable() \- _omap2_clk_enable() \- omap_mcbsp_clk_enable() \- clk_enable(child clock) [tries for clockfw_lock again] mcbsp_clk is a virtual clock and it comprises several child clocks. when enable mcbsp_clk in omap_mcbsp_request(), the enable function of mcbsp_clk will enable its child clocks, then the deadlock occurs. The solution is to remove the virtual clock and enable these child clocks in omap_mcbsp_request() directly. Signed-off-by: Stanley.Miao <stanley.miao@windriver.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| | * | | rename platform_driver name "flash" to "sa1100-mtd"Uwe Kleine-König2009-01-311-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | "flash" is a very generic name for a platform_driver that is only available on SA11x0. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Cc: Nicolas Pitre <nico@marvell.com>
| | * | | annotate that [fp, #-4] is the saved lrUwe Kleine-König2009-01-311-1/+1
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
| | * | | Use __SPIN_LOCK_UNLOCKED to initialize bad_irq_desc.lockUwe Kleine-König2009-01-311-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | SPIN_LOCK_UNLOCKED is deprecated as lockdep cannot properly work with locks initialized with it. This fix is necessary to compile the linux-rt tree for ARM. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Cc: Steven Rostedt <srostedt@redhat.com>
| | * | | [ARM] 5366/1: fix shared memory coherency with VIVT L1 + L2 cachesNicolas Pitre2009-01-281-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When there are multiple L1-aliasing userland mappings of the same physical page, we currently remap each of them uncached, to prevent VIVT cache aliasing issues. (E.g. writes to one of the mappings not being immediately visible via another mapping.) However, when we do this remapping, there could still be stale data in the L2 cache, and an uncached mapping might bypass L2 and go straight to RAM. This would cause reads from such mappings to see old data (until the dirty L2 line is eventually evicted.) This issue is solved by forcing a L2 cache flush whenever the shared page is made L1 uncacheable. Ideally, we would make L1 uncacheable and L2 cacheable as L2 is PIPT. But Feroceon does not support that combination, and the TEX=5 C=0 B=0 encoding for XSc3 doesn't appear to work in practice. Signed-off-by: Nicolas Pitre <nico@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * | | [ARM] call undefined instruction exception handler with irqs enabledRussell King2009-01-281-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Aaro says: > With spinlock debugs enabled I get might_sleep() warnings when using > ptrace. tracked down to a missing enable_irq before calling do_undefinstr(). Reported-by: Aaro Koskinen <aaro.koskinen@nokia.com> Tested-by: Aaro Koskinen <aaro.koskinen@nokia.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * | | [ARM] msm: fix build errorsRussell King2009-01-281-0/+1
| | |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | arch/arm/mach-msm/board-halibut.c:45: error: implicit declaration of function 'MSM_GPIO_TO_INT' arch/arm/mach-msm/board-halibut.c:45: error: initializer element is not constant arch/arm/mach-msm/board-halibut.c:45: error: (near initialization for 'smc91x_resources[1].start') arch/arm/mach-msm/board-halibut.c:46: error: initializer element is not constant arch/arm/mach-msm/board-halibut.c:46: error: (near initialization for 'smc91x_resources[1].end') Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | | | Merge branch 'x86/urgent' into x86/apicIngo Molnar2009-02-051-0/+36
|\| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Conflicts: arch/x86/mach-default/setup.c Semantic merge: arch/x86/kernel/irqinit_32.c Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * | | mmc: Add a MX2/MX3 specific SDHC driverSascha Hauer2009-02-021-0/+36
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds a MX2/MX3 specific SDHC driver. The hardware is basically the same as in the MX1, but unlike the MX1 controller the MX2 controller just works as expected. Since the MX1 driver has more workarounds for bugs than anything else I had no success with supporting MX1 and MX2 in a sane way in one driver. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
* | | Merge branch 'core/percpu' into x86/coreIngo Molnar2009-01-283-7/+14
|\ \ \ | |/ / |/| | | | | | | | Conflicts: kernel/irq/handle.c
| * | Merge branch 'linus' into core/percpuIngo Molnar2009-01-27100-654/+414
| |\ \ | | | | | | | | | | | | | | | | Conflicts: arch/x86/kernel/setup_percpu.c
| * \ \ Merge branch 'x86/mm' into core/percpuIngo Molnar2009-01-213-4/+1
| |\ \ \ | | | |/ | | |/| | | | | | | | | Conflicts: arch/x86/mm/fault.c
| * | | linker script: add missing .data.percpu.page_alignedTejun Heo2009-01-171-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | arm, arm/mach-integrator and powerpc were missing .data.percpu.page_aligned in their percpu output section definitions. Add it. Signed-off-by: Tejun Heo <tj@kernel.org>
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| *-. \ \ Merge branches 'cpus4096', 'x86/cleanups' and 'x86/urgent' into x86/percpuIngo Molnar2009-01-152-7/+13
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| | * | | | irq: update all arches for new irq_descMike Travis2009-01-122-7/+13
| | |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Impact: cleanup, update to new cpumask API Irq_desc.affinity and irq_desc.pending_mask are now cpumask_var_t's so access to them should be using the new cpumask API. Signed-off-by: Mike Travis <travis@sgi.com>
* | | | | Merge git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb-2.6Linus Torvalds2009-01-271-23/+0
|\ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb-2.6: (36 commits) USB: Driver for Freescale QUICC Engine USB Host Controller USB: option: add QUANTA HSDPA Data Card device ids USB: storage: Add another unusual_dev for off-by-one bug USB: unusual_dev: usb-storage needs to ignore a device USB: GADGET: fix !x & y USB: new id for ti_usb_3410_5052 driver USB: cdc-acm: Add another conexant modem to the quirks USB: 'option' driver - onda device MT503HS has wrong id USB: Remove ZTE modem from unusual_devices USB: storage: support of Dane-Elec MediaTouch USB device USB: usbmon: Implement compat_ioctl USB: add kernel-doc for wusb_dev in struct usb_device USB: ftdi_sio driver support of bar code scanner from Diebold USB: ftdi_sio: added Alti-2 VID and Neptune 3 PID USB: cp2101 device USB: usblp.c: add USBLP_QUIRK_BIDIR to Brother HL-1440 USB: remove vernier labpro from ldusb USB: CDC-ACM quirk for MTK GPS USB: cdc-acm: support some gps data loggers USB: composite: Fix bug: low byte of w_index is the usb interface number not the whole 2 bytes of w_index ...
| * | | | | USB: musb_hdrc: another davinci buildfix (otg related)David Brownell2009-01-271-23/+0
| | |_|_|/ | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The DaVinci code had an implementation of the OTG transceiver glue too; make it use the new-standard one. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Acked-by: Felipe Balbi <felipe.balbi@nokia.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* | | | | Merge branch 'upstream-linus' of ↵Linus Torvalds2009-01-271-0/+0
|\ \ \ \ \ | |/ / / / |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/jgarzik/libata-dev * 'upstream-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jgarzik/libata-dev: pata-rb532-cf: remove set_irq_type from finish_io [libata] pata_via: support VX855, future chips whose IDE controller use 0x0571 sata_mv: no longer experimental (v2) sata_mv: msi masking fix (v2) sata_mv: Properly initialize main irq mask sata_mv: remove bogus nsect restriction sata_mv: don't read hc_irq_cause sata_mv: fix 8-port timeouts on 508x/6081 chips sata_nv: fix MCP5x reset sata_nv: rename nv_nf2_hardreset() libata: set NODEV_HINT for 0x7f status libata-sff: fix incorrect EH message
| * | | | libata-sff: fix incorrect EH messageTejun Heo2009-01-261-0/+0
| | |_|/ | |/| | | | | | | | | | | | | | | | | | | | | | | | | | The EH message for NODEV_HINT path was describing the opposite condition. Fix it. Signed-off-by: Tejun Heo <tj@kernel.org> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
generated by cgit v1.2.3 (git 2.25.1) at 2025-02-01 12:29:12 +0000