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* ARM: 7299/1: ftrace: clear zero bit in reported IPs for Thumb-2Rabin Vincent2012-01-251-6/+9
| | | | | | | | | | | | | | | | | | | | | The dynamic ftrace ops startup test currently fails on Thumb-2 kernels: Testing tracer function: PASSED Testing dynamic ftrace: PASSED Testing dynamic ftrace ops #1: (0 0 0 0 0) FAILED! This is because while the addresses in the mcount records do not have the zero bit set, the IP reported by the mcount call does have it set (because it is copied from the LR). This mismatch causes the ops filtering in ftrace_ops_list_func() to not call the relevant tracers. Fix this by clearing the zero bit before adjusting the LR for the mcount instruction size. Also, combine the mov+sub into a single sub instruction. Acked-by: Dave Martin <dave.martin@linaro.org> Signed-off-by: Rabin Vincent <rabin@rab.in> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: 7298/1: realview: fix mapping of MPCore private memory regionMarc Zyngier2012-01-254-25/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since commit 0536bdf33faf (ARM: move iotable mappings within the vmalloc region), the RealView PB11MP cannot boot anymore. This is caused by the way the mappings are described on this platform (define replaced by hex values for clarity): { /* GIC CPU interface mapping */ .virtual = IO_ADDRESS(0x1F000100), .pfn = __phys_to_pfn(0x1F000100), .length = SZ_4K, .type = MT_DEVICE, }, { /* GIC distributor mapping */ .virtual = IO_ADDRESS(0x1F001000), .pfn = __phys_to_pfn(0x1F001000), .length = SZ_4K, .type = MT_DEVICE, } The first mapping ends up reserving two pages, and clashes with the second one, which triggers a BUG_ON in vm_area_add_early(). In order to solve this problem, treat the MPCore private memory region (containing the SCU, the GIC and the TWD) as a single region, as described in the TRM: http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0360f/CACGDJJC.html The EB11MP is converted the same way, even if it manages to avoid the problem. Tested on both PB11MP and EB11MP. Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: 7288/1: mach-sa1100: add missing module_init() callLinus Walleij2012-01-231-0/+2
| | | | | | | | | | | The Jornada SSP driver is supposed to be initialized by a module_init() call, but it was missed at some merge point. Since the driver mostly pass calls through it magically works anyway, but needs to be rectified. Cc: Kristoffer Ericson <kristoffer.ericson@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: 7297/1: smp_twd: make sure timer is stopped before registering itMarc Zyngier2012-01-231-0/+2
| | | | | | | | | | | | | | | | On secondary CPUs, the Timer Control Register is not reset to a sane value before the timer is registered, and the TRM doesn't seem to indicate any reset value either. In some cases, the kernel will take an interrupt too early, depending on what junk was present in the registers at reset time. The fix is to set the Timer Control Register to 0 before registering the clock_event_device and enabling the interrupt. Problem seen on VE (Cortex A5) and Tegra. Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: 7296/1: proc-v7.S: remove HARVARD_CACHE preprocessor guardsWill Deacon2012-01-231-6/+0
| | | | | | | | | | | | | | | | On v7, we use the same cache maintenance instructions for data lines as for unified lines. This was not the case for v6, where HARVARD_CACHE was defined to indicate the L1 cache topology. This patch removes the erroneous compile-time check for HARVARD_CACHE in proc-v7.S, ensuring that we perform I-side invalidation at boot. Reported-and-Acked-by: Shawn Guo <shawn.guo@linaro.org> Cc: stable <stable@vger.kernel.org> Acked-by: Catalin Marinas <Catalin.Marinas@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: 7295/1: cortex-a7: move proc_info out of !CONFIG_ARM_LPAE blockWill Deacon2012-01-231-10/+10
| | | | | | | | | | | | | | | | The merging of commits 1b6ba46b ("ARM: LPAE: MMU setup for the 3-level page table format") and b4244738 ("ARM: 7202/1: Add Cortex-A7 proc info") during the merge window ended up putting the Cortex-A7 proc_info into a code block guarded by !CONFIG_ARM_LPAE. This makes Cortex-A7 platforms unbootable when LPAE is enabled. This patch moves the proc_info structure for Cortex-A7 outside of the guarded block. Cc: Pawel Moll <pawel.moll@arm.com> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: 7293/1: logical_cpu_map: decouple CPU mapping from SMPWill Deacon2012-01-2318-31/+35
| | | | | | | | | | | | | | | | | It turns out that the logical CPU mapping is useful even when !CONFIG_SMP for manipulation of devices like interrupt and power controllers when running a UP kernel on a CPU other than 0. This can happen when kexecing a UP image from an SMP kernel. In the future, multi-cluster systems running AMP configurations will require something similar for mapping cluster IDs, so it makes sense to decouple this logic in preparation for this support. Acked-by: Yang Bai <hamo.by@gmail.com> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Reported-by: Joerg Roedel <joerg.roedel@amd.com> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: 7291/1: cache: assume 64-byte L1 cachelines for ARMv7 CPUsWill Deacon2012-01-234-6/+1
| | | | | | | | | | | | | | | To ensure correct alignment of cacheline-aligned data, the maximum cacheline size needs to be known at compile time. Since Cortex-A8 and Cortex-A15 have 64-byte cachelines (and it is likely that there will be future ARMv7 implementations with the same line size) then it makes sense to assume that CPU_V7 implies a 64-byte L1 cacheline size. For CPUs with smaller caches, this will result in some harmless padding but will help with single zImage work and avoid hitting subtle bugs with misaligned data structures. Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: 7290/1: vmlinux.lds.S: align the exception fixup table to a 4-byte boundaryWill Deacon2012-01-231-1/+1
| | | | | | | | | | | | | | The exception fixup table is currently aligned to a 32-byte boundary. Whilst this won't cause any problems, the exception_table_entry structures contain only a pair of unsigned longs, so 4-byte alignment is all that is required. If the table was walked from start to end, cacheline alignment may bring some performance benefits, but since a binary search is used, the access pattern is random and will not benefit from a stricter alignment. Acked-by: Nicolas Pitre <nico@linaro.org> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: 7289/1: vmlinux.lds.S: do not hardcode cacheline size as 32 bytesWill Deacon2012-01-231-3/+4
| | | | | | | | | | | The linker script assumes a cacheline size of 32 bytes when aligning the .data..cacheline_aligned and .data..percpu sections. This patch updates the script to use L1_CACHE_BYTES, which should be set to 64 on platforms that require it. Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: 7277/1: setup.c: Fix build warning by removing unneeded header fileFabio Estevam2012-01-191-1/+0
| | | | | | | | | | | | | | | | | | Fix the following build warning: CC arch/arm/kernel/setup.o In file included from arch/arm/kernel/setup.c:39: arch/arm/include/asm/elf.h:102:1: warning: "vmcore_elf64_check_arch" redefined In file included from arch/arm/kernel/setup.c:24: include/linux/crash_dump.h:30:1: warning: this is the location of the previous definition Since commit 93a72052 (crash_dump: export is_kdump_kernel to modules, consolidate elfcorehdr_addr, setup_elfcorehdr and saved_max_pfn) the inclusion of <linux/crash_dump.h> is no longer needed. Remove the inclusion of <linux/crash_dump.h> and the build warning is fixed. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: 7279/1: standardize /proc/iomem "Kernel code" nameKees Cook2012-01-191-1/+1
| | | | | | | | | All other ports use "Kernel code" to identify the Kernel text segment in /proc/iomem. Change the ARM resources to do the same. Signed-off-by: Kees Cook <keescook@chromium.org> Acked-by: Nicolas Pitre <nico@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: fix rcu stalls on SMP platformsRussell King2012-01-191-2/+8
| | | | | | | | | | We can stall RCU processing on SMP platforms if a CPU sits in its idle loop for a long time. This happens because we don't call irq_enter() and irq_exit() around generic_smp_call_function_interrupt() and friends. Add the necessary calls, and remove the one from within ipi_timer(), so that they're all in a common place. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: vexpress: fix two section mismatch warningsRussell King2012-01-191-2/+2
| | | | | | | | | | | | WARNING: vmlinux.o(.text+0x1bc9c): Section mismatch in reference from the function ct_ca9x4_init_cpu_map() to the function .init.text:scu_get_core_count() The function ct_ca9x4_init_cpu_map() references the function __init scu_get_core_count(). WARNING: vmlinux.o(.text+0x1bce8): Section mismatch in reference from the function ct_ca9x4_init_cpu_map() to the function .init.text:set_smp_cross_call() The function ct_ca9x4_init_cpu_map() references the function __init set_smp_cross_call(). Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: fix a section mismatch warning with our use of memblockRussell King2012-01-191-1/+1
| | | | | | | | | | | | Commit 716a3dc2008 (ARM: Add arm_memblock_steal() to allocate memory away from the kernel) added a function which calls memblock_alloc(). This causes a section conflict: WARNING: vmlinux.o(.text+0xc614): Section mismatch in reference from the function arm_memblock_steal() to the function .init.text:memblock_alloc() The function arm_memblock_steal() references the function __init memblock_alloc(). Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: sa11x0: fix section mismatch in cpu-sa1100.cRussell King2012-01-191-1/+1
| | | | | | | | | | | WARNING: arch/arm/mach-sa1100/built-in.o(.data+0x11b8): Section mismatch in reference from the variable sa1100_driver to the function .init.text:sa1100_cpu_init() The variable sa1100_driver references the function __init sa1100_cpu_init() If the reference is valid then annotate the variable with __init* or __refdata (see linux/init.h) or name the variable: *_template, *_timer, *_sht, *_ops, *_probe, *_probe_one, *_console Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: sa11x0: fix collie build errorRussell King2012-01-191-3/+2
| | | | | | | | | | | | | | f408c985cefc (GPIO: sa1100: implement proper gpiolib gpio_to_irq conversion) made gpio_to_irq() a function. This breaks collie where it's used to initialize some static data. Fix that by moving the initialization to the init code. arch/arm/mach-sa1100/collie.c:139: error: initializer element is not constant arch/arm/mach-sa1100/collie.c:139: error: (near initialization for 'collie_power_resource[0].start') arch/arm/mach-sa1100/collie.c:140: error: initializer element is not constant arch/arm/mach-sa1100/collie.c:140: error: (near initialization for 'collie_power_resource[0].end') Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* Revert "RTC: sa1100: support sa1100, pxa and mmp soc families"Russell King2012-01-192-40/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit 7cea00657dd4daef66ad95e976d5d67ed94cb97e. The sa1100 cleanups fatally broke the SA1100 RTC driver - the first hint that something is wrong are these compiler warnings: drivers/rtc/rtc-sa1100.c:42:1: warning: "RCNR" redefined In file included from arch/arm/mach-sa1100/include/mach/hardware.h:73, from drivers/rtc/rtc-sa1100.c:35: arch/arm/mach-sa1100/include/mach/SA-1100.h:877:1: warning: this is the location of the previous definition drivers/rtc/rtc-sa1100.c:43:1: warning: "RTAR" redefined arch/arm/mach-sa1100/include/mach/SA-1100.h:876:1: warning: this is the location of the previous definition drivers/rtc/rtc-sa1100.c:44:1: warning: "RTSR" redefined arch/arm/mach-sa1100/include/mach/SA-1100.h:879:1: warning: this is the location of the previous definition drivers/rtc/rtc-sa1100.c:45:1: warning: "RTTR" redefined arch/arm/mach-sa1100/include/mach/SA-1100.h:878:1: warning: this is the location of the previous definition drivers/rtc/rtc-sa1100.c:47:1: warning: "RTSR_HZE" redefined arch/arm/mach-sa1100/include/mach/SA-1100.h:891:1: warning: this is the location of the previous definition drivers/rtc/rtc-sa1100.c:48:1: warning: "RTSR_ALE" redefined arch/arm/mach-sa1100/include/mach/SA-1100.h:890:1: warning: this is the location of the previous definition drivers/rtc/rtc-sa1100.c:49:1: warning: "RTSR_HZ" redefined arch/arm/mach-sa1100/include/mach/SA-1100.h:889:1: warning: this is the location of the previous definition drivers/rtc/rtc-sa1100.c:50:1: warning: "RTSR_AL" redefined arch/arm/mach-sa1100/include/mach/SA-1100.h:888:1: warning: this is the location of the previous definition and the second problem, which is far more severe, are the different register layouts, resulting in the wrong registers being read on SA11x0 platforms. This patch adds: #define RCNR 0x00 /* RTC Count Register */ #define RTAR 0x04 /* RTC Alarm Register */ #define RTSR 0x08 /* RTC Status Register */ #define RTTR 0x0c /* RTC Timer Trim Register */ but the SA11x0 registers are: #define RTAR __REG(0x90010000) /* RTC Alarm Reg. */ #define RCNR __REG(0x90010004) /* RTC CouNt Reg. */ #define RTTR __REG(0x90010008) /* RTC Trim Reg. */ #define RTSR __REG(0x90010010) /* RTC Status Reg. */
* Revert "ARM: pxa: add dummy clock for sa1100-rtc"Russell King2012-01-196-8/+0
| | | | | | | This reverts commit 7557c175f60d8d40baf16b22caf79beadef8f081. This revert is necessary to revert the broken "RTC: sa1100: support sa1100, pxa and mmp soc families" change.
* Revert "ARM: sa1100: clean up of the clock support"Russell King2012-01-192-67/+26
| | | | | | | This reverts commit edf3ff5bac2582b57de4e7c6569fee5d7c1c0a42. This revert is necessary to revert the broken "RTC: sa1100: support sa1100, pxa and mmp soc families" change.
* Merge tag 'arm-soc-fixes' of ↵Linus Torvalds2012-01-1719-40/+30
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc ARM: fixes for ARM platforms Some fallout from the 3.3. merge window as well as a couple bug fixes for older preexisting bugs that seem valid to include at this time: * sched_clock changes broke picoxcell, fix included * BSYM bugs causing issues with thumb2-built kernels on SMP * Missing module.h include on msm. * A collection of bugfixes for samsung platforms that didn't make it into the first pull requests. * tag 'arm-soc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: ARM: make BSYM macro assembly only ARM: highbank: remove incorrect BSYM usage ARM: imx: remove incorrect BSYM usage ARM: exynos: remove incorrect BSYM usage ARM: ux500: add missing ENDPROC to headsmp.S ARM: msm: Add missing ENDPROC to headsmp.S ARM: versatile: Add missing ENDPROC to headsmp.S ARM: EXYNOS: Invert VCLK polarity for framebuffer on ORIGEN ARM: S3C64XX: Fix interrupt configuration for PCA935x on Cragganmore ARM: S3C64XX: Fix the memory mapped GPIOs on Cragganmore ARM: S3C64XX: Remove hsmmc1 from Cragganmore ARM: S3C64XX: Remove unconditional power domain disables ARM: SAMSUNG: Declare struct platform_device in plat/s3c64xx-spi.h ARM: SAMSUNG: dma-ops.h needs mach/dma.h ARM: SAMSUNG: Guard against multiple inclusion of plat/dma.h ARM: picoxcell: fix sched_clock() cleanup fallout ARM: msm: vreg is a module and so needs module.h
| * Merge branch 'samsung-fixes' of ↵Olof Johansson2012-01-167-25/+14
| |\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into fixes * 'samsung-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: ARM: EXYNOS: Invert VCLK polarity for framebuffer on ORIGEN ARM: S3C64XX: Fix interrupt configuration for PCA935x on Cragganmore ARM: S3C64XX: Fix the memory mapped GPIOs on Cragganmore ARM: S3C64XX: Remove hsmmc1 from Cragganmore ARM: S3C64XX: Remove unconditional power domain disables ARM: SAMSUNG: Declare struct platform_device in plat/s3c64xx-spi.h ARM: SAMSUNG: dma-ops.h needs mach/dma.h ARM: SAMSUNG: Guard against multiple inclusion of plat/dma.h
| | * ARM: EXYNOS: Invert VCLK polarity for framebuffer on ORIGENTushar Behera2012-01-121-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | Framebuffer driver needs to fetch the video data during the rising edge of the VCLK. Otherwise, there are some glitches in the LCD display. Signed-off-by: Tushar Behera <tushar.behera@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| | * ARM: S3C64XX: Fix interrupt configuration for PCA935x on CragganmoreMark Brown2012-01-121-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | 0 is a valid IRQ but the interrupt line for the pca935x certainly isn't connected there which causes it to fail to probe. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| | * ARM: S3C64XX: Fix the memory mapped GPIOs on CragganmoreMark Brown2012-01-122-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | Rather than letting them get allocated dynamically where we don't know where they are, and also name the data line resource as gpio-generic requires that. Without these changes the GPIOs are useless. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| | * ARM: S3C64XX: Remove hsmmc1 from CragganmoreMark Brown2012-01-121-8/+0
| | | | | | | | | | | | | | | | | | | | | | | | The second MMC slot was only present on revision 1 of Cragganmore so remove it. Only MMC0 and MMC2 are there on production systems. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| | * ARM: S3C64XX: Remove unconditional power domain disablesMark Brown2012-01-121-13/+0
| | | | | | | | | | | | | | | | | | | | | | | | Now that we have software runtime power management support this code is redundant. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| | * ARM: SAMSUNG: Declare struct platform_device in plat/s3c64xx-spi.hMark Brown2012-01-121-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | The function declarations in plat/s3c64xx-spi.h rely on struct platform_device but it's not declared by the header causing compiler warnings if it is included prior to another header which does that. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| | * ARM: SAMSUNG: dma-ops.h needs mach/dma.hMark Brown2012-01-121-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | dma-ops.h uses samsung_dma_is_dmadev so it needs to have mach/dma.h included. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| | * ARM: SAMSUNG: Guard against multiple inclusion of plat/dma.hMark Brown2012-01-121-1/+5
| | | | | | | | | | | | | | | | | | | | | Otherwise it'll generate errors if included twice. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| * | Merge branch 'fixes-for-arm-soc' of git://sources.calxeda.com/kernel/linux ↵Olof Johansson2012-01-1610-14/+14
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | into fixes * 'fixes-for-arm-soc' of git://sources.calxeda.com/kernel/linux: ARM: make BSYM macro assembly only ARM: highbank: remove incorrect BSYM usage ARM: imx: remove incorrect BSYM usage ARM: exynos: remove incorrect BSYM usage ARM: ux500: add missing ENDPROC to headsmp.S ARM: msm: Add missing ENDPROC to headsmp.S ARM: versatile: Add missing ENDPROC to headsmp.S
| | * | ARM: make BSYM macro assembly onlyRob Herring2012-01-161-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | BSYM macro is only needed for assembly files and its usage in c files is wrong, so only define it for assembly. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Acked-by: Dave Martin <dave.martin@linaro.org>
| | * | ARM: highbank: remove incorrect BSYM usageRob Herring2012-01-161-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | BSYM macro is only needed for assembly files and its usage in c files is wrong, so remove it. The linker will correctly set bit 0 for Thumb2 kernels. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Acked-by: Dave Martin <dave.martin@linaro.org>
| | * | ARM: imx: remove incorrect BSYM usageRob Herring2012-01-161-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | BSYM macro is only needed for assembly files and its usage in c files is wrong, so remove it. The linker will correctly set bit 0 for Thumb2 kernels. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Cc: Sascha Hauer <kernel@pengutronix.de> Acked-by: Shawn Guo <shawn.guo@linaro.org> Acked-by: Dave Martin <dave.martin@linaro.org>
| | * | ARM: exynos: remove incorrect BSYM usageRob Herring2012-01-162-3/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | BSYM macro is only needed for assembly files and its usage in c files is wrong, so remove it. The linker will correctly set bit 0 for Thumb2 kernels. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Cc: Dave Martin <dave.martin@linaro.org> Cc: Kukjin Kim <kgene.kim@samsung.com>
| | * | ARM: ux500: add missing ENDPROC to headsmp.SRob Herring2012-01-161-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Once the ENDPROC is in place, BSYM() in not longer necessary to get correct pointer to u8500_secondary_startup(). Signed-off-by: Rob Herring <rob.herring@calxeda.com> Cc: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com> Cc: Linus Walleij <linus.walleij@stericsson.com>
| | * | ARM: msm: Add missing ENDPROC to headsmp.SRob Herring2012-01-161-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Once the ENDPROC is in place, BSYM() in not longer necessary to get correct pointer to msm_secondary_startup(). Signed-off-by: Rob Herring <rob.herring@calxeda.com> Cc: David Brown <davidb@codeaurora.org> Cc: Daniel Walker <dwalker@fifo99.com>
| | * | ARM: versatile: Add missing ENDPROC to headsmp.SPawel Moll2012-01-163-5/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Once the ENDPROC is in place, BSYM() in not longer necessary to get correct pointer to versatile_secondary_startup(). Tested-by: Jon Medhurst <tixy@linaro.org> Signed-off-by: Pawel Moll <pawel.moll@arm.com> Acked-by: Dave Martin <dave.martin@linaro.org>
| * | | Merge branch 'msm-fix' of git://codeaurora.org/quic/kernel/davidb/linux-msm ↵Olof Johansson2012-01-161-0/+1
| |\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | into fixes * 'msm-fix' of git://codeaurora.org/quic/kernel/davidb/linux-msm: ARM: msm: vreg is a module and so needs module.h
| | * | | ARM: msm: vreg is a module and so needs module.hDavid Brown2012-01-061-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The MSM7201 vreg appears to have gotten missed in the module.h cleanup. Signed-off-by: David Brown <davidb@codeaurora.org>
| * | | | Merge branch 'picoxcell-fixes' of git://github.com/jamieiles/linux-2.6-ji ↵Olof Johansson2012-01-161-1/+1
| |\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | into fixes * 'picoxcell-fixes' of git://github.com/jamieiles/linux-2.6-ji: ARM: picoxcell: fix sched_clock() cleanup fallout
| | * | | | ARM: picoxcell: fix sched_clock() cleanup falloutJamie Iles2012-01-091-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 2f0778afa (ARM: 7205/2: sched_clock: allow sched_clock to be selected at runtime) replaced the picoxcell specific sched_clock() with a generic runtime selectable version but replaced "unsigned long long notrace sched_clock(void)" with "unsigned u32 notrace picoxcell_read_sched_clock(void)" fix this up to return a u32 as expected. Cc: Marc Zyngier <Marc.Zyngier@arm.com> Signed-off-by: Jamie Iles <jamie@jamieiles.com>
* | | | | | Merge branch 'next' of git://git.infradead.org/users/vkoul/slave-dmaLinus Torvalds2012-01-176-13/+42
|\ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'next' of git://git.infradead.org/users/vkoul/slave-dma: (53 commits) ARM: mach-shmobile: specify CHCLR registers on SH7372 dma: shdma: fix runtime PM: clear channel buffers on reset dma/imx-sdma: save irq flags when use spin_lock in sdma_tx_submit dmaengine/ste_dma40: clear LNK on channel startup dmaengine: intel_mid_dma: remove legacy pm interface ASoC: mxs: correct 'direction' of device_prep_dma_cyclic dmaengine: intel_mid_dma: error path fix dmaengine: intel_mid_dma: locking and freeing fixes mtd: gpmi-nand: move to dma_transfer_direction mtd: fix compile error for gpmi-nand mmc: mxs-mmc: fix the dma_transfer_direction migration dmaengine: add DMA_TRANS_NONE to dma_transfer_direction dma: mxs-dma: Don't use CLKGATE bits in CTRL0 to disable DMA channels dma: mxs-dma: make mxs_dma_prep_slave_sg() multi user safe dma: mxs-dma: Always leave mxs_dma_init() with the clock disabled. dma: mxs-dma: fix a typo in comment DMA: PL330: Remove pm_runtime_xxx calls from pl330 probe/remove video i.MX IPU: Fix display connections i.MX IPU DMA: Fix wrong burstsize settings dmaengine/ste_dma40: allow fixed physical channel ... Fix up conflicts in drivers/dma/{Kconfig,mxs-dma.c,pl330.c} The conflicts looked pretty trivial, but I'll ask people to verify them.
| * | | | | | ARM: mach-shmobile: specify CHCLR registers on SH7372Guennadi Liakhovetski2012-01-061-3/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
| * | | | | | video i.MX IPU: Fix display connectionsSascha Hauer2011-12-081-0/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The IPU internally works on 32bit colors. It can arbitrarily map between pixel formats and internal representation and also between internal representation and the physical connection to the display. The driver used to change the mapping between internal representation and display connection depending on the user selected bpp which is wrong. Instead, the mapping is specified by the hardware, so an additional field in platform data is added to describe the connection between i.MX and the display. The default for this field is RGB666 which seems to be the only configuration which works without this patch, so I assumed that all in Kernel boards are connected this way. This patch has been tested on a RGB666 connected display and a RGB888 connected display in both 16bpp and 32bpp modes. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
| * | | | | | dmaengine/ste_dma40: allow fixed physical channelNarayanan G2011-12-051-1/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Allow logical channels to specify the physical channel they want to use. This is needed to avoid two peripherals operating on the same physical channel during some special use-cases. (like mmc and usb during a usb mass storage case). Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com> Signed-off-by: Narayanan G <narayanan.gopalakrishnan@stericsson.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
| * | | | | | dmaengine/ste_dma40: Add support to use lcla area from esramNarayanan G2011-11-281-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch provides an option of having the lcla (link address) in ESRAM instead of allocating it. The bool value (use_esram_lcla) in the stedma40_platform_data if set to true, then the lcla address would be taken from platform resources. Also, the corresponding esram regulator is managed in the suspend/resume functions. Signed-off-by: Narayanan G <narayanan.gopalakrishnan@stericsson.com> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
| * | | | | | Merge branch 'dma_slave_direction' into next_test_dirnVinod Koul2011-11-174-9/+9
| |\ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | resolved conflicts: drivers/media/video/mx3_camera.c
| | * | | | | | plat-samsung: move to dma_transfer_directionVinod Koul2011-10-312-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | fixup usage of dma direction by introducing dma_transfer_direction, this patch moves samsung drivers to use new enum Cc: Ben Dooks <ben-linux@fluff.org> Cc: Kukjin Kim <kgene.kim@samsung.com> Cc: Boojin Kim <boojin.kim@samsung.com> Acked-by: Kukjin Kim <kgene.kim@samsung.com> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
| | * | | | | | dmaengine: move drivers to dma_transfer_directionVinod Koul2011-10-272-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | fixup usage of dma direction by introducing dma_transfer_direction, this patch moves dma/drivers/* to use new enum Cc: Jassi Brar <jaswinder.singh@linaro.org> Cc: Russell King <rmk+kernel@arm.linux.org.uk> Cc: Viresh Kumar <viresh.kumar@st.com> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: Mika Westerberg <mika.westerberg@iki.fi> Cc: H Hartley Sweeten <hartleys@visionengravers.com> Cc: Li Yang <leoli@freescale.com> Cc: Zhang Wei <zw@zh-kernel.org> Cc: Sascha Hauer <s.hauer@pengutronix.de> Cc: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Cc: Shawn Guo <shawn.guo@freescale.com> Cc: Yong Wang <yong.y.wang@intel.com> Cc: Tomoya MORINAGA <tomoya-linux@dsn.lapis-semi.com> Cc: Boojin Kim <boojin.kim@samsung.com> Cc: Barry Song <Baohua.Song@csr.com> Acked-by: Mika Westerberg <mika.westerberg@iki.fi> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Viresh Kumar <viresh.kumar@st.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
generated by cgit v1.2.3 (git 2.25.1) at 2024-12-28 18:33:30 +0000