| Commit message (Collapse) | Author | Age | Files | Lines |
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Make sure that MX51_PAD_GPIO1_1 does not remain configure as
ALT0/SD1_WP (it is out of reset). This is needed because of external
pull-up resistor attached to that pad that, when left unchanged, will
drive SD1_WP high preventing eSDHC1/eMMC from working correctly.
To fix that add a pinmux configuration line configureing the pad to
function as a GPIO. While we are at it, add a corresponding
output-high GPIO hog in an effort to minimize current consumption.
Cc: Nikita Yushchenko <nikita.yoush@cogentembedded.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Lucas Stach <l.stach@pengutronix.de>
Cc: Chris Healy <cphealy@gmail.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: linux-arm-kernel@lists.infradead.org
Cc: devicetree@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Tested-By: Nikita Yushchenko <nikita.yoush@cogentembedded.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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This adds rave-sp powerbutton and backlight devices to RDU1 device tree.
Signed-off-by: Nikita Yushchenko <nikita.yoush@cogentembedded.com>
Tested-by: Chris Healy <cphealy@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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This commit provides support for HSC and DDC boards from
Kieback&Peter GmbH vendor.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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The touchscreen driver no longer configures the device as wakeup source by
default. A "wakeup-source" property is needed.
Signed-off-by: Daniel Mack <daniel@zonque.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Add dts file support for imx6sll EVK board.
Signed-off-by: Bai Ping <ping.bai@nxp.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Dong Aisheng <Aisheng.dong@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Add dtsi file for imx6sll.
Signed-off-by: Bai Ping <ping.bai@nxp.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Dong Aisheng <Aisheng.dong@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/dt
i.MX device tree changes with clock dependency:
- Add clock for i.MX6UL GPIO blocks
* tag 'imx-dt-clkdep-4.19' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
ARM: dts: imx6ul: add GPIO clocks
clk: imx6ul: remove clks_init_on array
clk: imx6ul: add GPIO clock gates
dt-bindings: clock: imx6ul: Do not change the clock definition order
Signed-off-by: Olof Johansson <olof@lixom.net>
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i.MX6UL has GPIO clock gates in CCM CCGR, add
clock property for GPIO driver to make sure all
GPIO banks work as expected.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux into next/dt
AT91 DT for 4.19:
- New boards from Laird: WB45N, WB50N, SOM60 modules and DVK, Gatwick
- fix the PMC compatibles
* tag 'at91-ab-4.19-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux:
ARM: dts: at91: fix typos for SSC TD functions
ARM: dts: add support for Laird SOM60 module and DVK boards
ARM: dts: add support for Gatwick board based on WB50N
ARM: dts: add support for Laird WB50N cpu module and DVK
ARM: dts: add support for Laird WB45N cpu module and DVK
ARM: dts: at91: add labels to soc dtsi for derivative boards
dt-bindings: add laird and giantec vendor prefix
ARM: dts: fix PMC compatible
ARM: at91: fix USB clock detection handling
dt-bindings: clk: at91: Document all the PMC compatibles
dt-bindings: arm: remove PMC bindings
Signed-off-by: Olof Johansson <olof@lixom.net>
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Fix typo for TD function of pins PIN_PB22 and PIN_PC14
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
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This adds support for Lairds upcoming SOM module, featuring Marvell WiFi
and Bluetooth, 2Gb NAND / 1Gb LPDDR SDRAM, and an Atmel SAMA5D3 CPU.
Signed-off-by: Ben Whitten <ben.whitten@lairdtech.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
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Add support for the LoRa gateway from Laird, the RG1xx.
This board houses the WB50NBT CPU module along with a Semtech SX1301 based
concentrator card.
https://www.lairdtech.com/products/rg1xx-lora-gateway
Signed-off-by: Ben Whitten <ben.whitten@lairdtech.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
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This adds support for Lairds CPU module, featuring Atheros wifi, CSR
Bluetooth and, Atmel SAMA5D3 CPU.
https://www.lairdtech.com/products/wb50nbt-wi-fi-bluetooth-module
Signed-off-by: Ben Whitten <ben.whitten@lairdtech.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
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This adds support for Lairds combo CPU module, featuring on board
Atheros wifi, CSR Bluetooth radio and, Atmel CPU.
https://www.lairdtech.com/products/wb45nbt
Signed-off-by: Ben Whitten <ben.whitten@lairdtech.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
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This adds labels to commonly used device-tree nodes so that derivative
boards can avoid ahb/apb hierarchy.
Signed-off-by: Ben Whitten <ben.whitten@lairdtech.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
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Make each SoC dtsi use its soc specific PMc compatible string. This solves
a potential issue on at91sam9261 and at91sam9263 when using suspend to RAM
Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
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Add more compatibles to be able to correct the USB clock detection.
at91sam9261 and at91sam9263 have the same PMC_SCSR layout as at91sam9260.
at91sam9rl doesn't have any USB clock.
Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
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The OPP properties, like "operating-points", should either be present
for all the CPUs of a cluster or none. If these are present only for a
subset of CPUs of a cluster then things will start falling apart as soon
as the CPUs are brought online in a different order. For example, this
will happen because the operating system looks for such properties in
the CPU node it is trying to bring up, so that it can create an OPP
table.
Add such missing properties.
Fix other missing properties (clocks, clock latency) as well to
make it all work.
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
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into next/dt
ARM: dts: zynq: DT changes for v4.19
- Add Z-turn board
- Add mmc aliases
- Fix model information
- Sort out documentatio
- Update Zybo Z7
- Fix gpio-keys
* tag 'zynq-dt-for-v4.19-v2' of https://github.com/Xilinx/linux-xlnx:
ARM: dts: zynq: Remove #address/#size-cells from gpio-keys
ARM: dts: zynq: Add LEDs to the Zybo Z7 board
ARM: dts: zynq: Use gpio constants for the Zybo Z7 board
ARM: dts: zynq: Fix memory size on the Zybo Z7 board
dt-bindings: xilinx: zynq: Add missing boards
dt-bindings: xilinx: zynq: Move Paralella board to Xilinx
dt-bindings: xilinx: zynq: Sort entries alphabetically
dt-bindings: xilinx: zynq: Improve boards description
ARM: dts: zynq: correct and improve the model property of dt files
ARM: dts: zynq: Set correct manufacturer for ZedBoard and MicroZed boards
ARM: dts: zynq: Add mmc alias for zc702/zc706/zed/zybo
ARM: dts: zynq: Add support for Z-turn board
Signed-off-by: Olof Johansson <olof@lixom.net>
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dts reports incorrect usage of these properties in gpio-keys node.
Warning (avoid_unnecessary_addr_size): /gpio-keys: unnecessary
The patch is removing these useless properties.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Add an LED node, connected to the Processing System (PS)
Signed-off-by: Luis Araneda <luaraneda@gmail.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Include GPIO dt-bindings and use GPIO_ACTIVE_* constants
to improve readability
Signed-off-by: Luis Araneda <luaraneda@gmail.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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According to the reference manual, the board has two Micron
MT41K256M16HA-125 DDR3L memory ICs, which have 512 MiB each
Tested on a ZYBO-Z7-20 board
Signed-off-by: Luis Araneda <luaraneda@gmail.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Replace the current value of the model property by a more accurate
description of each board (which includes the manufacturer), as some
of the boards had the same value ("Xilinx Zynq")
Signed-off-by: Luis Araneda <luaraneda@gmail.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Both boards are made by Avnet, Inc. So add an additional
value to the compatible property
Signed-off-by: Luis Araneda <luaraneda@gmail.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Add missing mmc alias.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Add a dts for MYIR Z-turn board and respective target in Makefile.
Signed-off-by: Anton Gerasimov <tossel@gmail.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-uniphier into next/dt
UniPhier ARM SoC DT updates for v4.19
- Add missing #cooling-cells properties
* tag 'uniphier-dt-v4.19' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-uniphier:
ARM: dts: uniphier: Add missing cooling device properties for CPUs
Signed-off-by: Olof Johansson <olof@lixom.net>
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The cooling device properties, like "#cooling-cells" and
"dynamic-power-coefficient", should either be present for all the CPUs
of a cluster or none. If these are present only for a subset of CPUs of
a cluster then things will start falling apart as soon as the CPUs are
brought online in a different order. For example, this will happen
because the operating system looks for such properties in the CPU node
it is trying to bring up, so that it can register a cooling device.
Add such missing properties.
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt
Few more beaglebone variants for v4.19 merge window
This adds dts files for two new beaglebone variants for
Octavo Systems OSD3358-SM-RED and Sancloud am335x-sancloud-bbe.
* tag 'omap-for-v4.19/dt-pt2-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: dts: am335x: add am335x-sancloud-bbe board support
dt-bindings: Add vendor prefix for Sancloud
ARM: dts: Add DT support for Octavo Systems OSD3358-SM-RED based on TI AM335x
Signed-off-by: Olof Johansson <olof@lixom.net>
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The "Beaglebone Enhanced" by Sancloud is based on the Beaglebone Black,
but with the following differences:
* Gigabit capable PHY
* Extra USB hub, optional i2c control
* lps3331ap barometer connected over i2c
* MPU6050 6 axis MEMS accelerometer/gyro connected over i2c
* 1GiB DDR3 RAM
* RTL8723 Wifi/Bluetooth connected over USB
Tested on a revision G board.
Signed-off-by: Koen Kooi <koen@dominion.thruhere.net>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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OSD3358-SM-RED is a dev board for OSD335x System-in-Package(SiP) devices from
Octavo Systems.
This board family can be indentified by the A335BNLTOS00 in the at24 eeprom:
A2: [aa 55 33 ee 41 33 33 35 42 4e 4c 54 4f 53 30 30 |.U3.A335BNLTOS00|]
https://octavosystems.com/octavo_products/osd3358-sm-red/
Signed-off-by: Neeraj Dantu <neeraj.dantu@octavosystems.com>
CC: Tony Lindgren <tony@atomide.com>
CC: Robert Nelson <robertcnelson@gmail.com>
CC: Jason Kridner <jkridner@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik into next/dt
Gemini DTS updates for v4.19:
- Add Vitesse switch chips
- Add a new DT for a reference design
* tag 'gemini-dts-v4.19' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik:
ARM: dts: Add devicetree for Storlink/Storm SL93512R
ARM: dts: Add Vitesse G5e switch to the Gemini SQ201
ARM: dts: Add WAN ethernet port to the SQ201
Signed-off-by: Olof Johansson <olof@lixom.net>
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The Storlink Gemini324 EV-Board also known as Storm
Semiconductor SL93512R_BRD is ground zero for the Gemini
devices. We add a device tree so we can support it, it
turns out to be pretty trivial.
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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This adds the Vitesse G5e ethernet switch to the Square
One Itian SQ201 router device tree.
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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This sets up the ethernet interface and PHY for the
WAN ethernet port which uses a Marvell PHY.
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt
Fix for a new warning from dtc in graph node unit addresses.
* tag 'v4.18-rockchip-dts32fixes-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
ARM: dts: rockchip: fix graph node unit address error from dtc
Signed-off-by: Olof Johansson <olof@lixom.net>
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The updated dtc emits a warning for the edp-panel of two rk3288 boards:
Warning (graph_endpoint): /dp@ff970000/ports/port@1/endpoint: graph node unit address error, expected "0"
Fix this by adding the necessary @0 to the endpoint node.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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After the work done by Thomas Petazzoni, the NAND chip timings
can be read out from the chip instead of open coded in the
device tree, so let's just remove the timing information.
Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
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git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into next/dt
STM32 DT updates for v4.19, round 1
Highlights:
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-MCU platforms update:
-Update RTC syscfg bindings on stm32f746 and stm32f429
-Update IWDG node with LSI clock name on stm32f429
-MPU STM32MP157 platform update:
-Add HASH support
-Add m_can support and enable it on EV1 board
-Add RTC suppoort and enable it on ED1 board
-Add USB OTG HS support and enable it on EV1 board
-Enable USB Host EHCI on EV1 board
-Add DFSDM support
-Add SPI support
-Add ETH support and enable it on EV1 board
-Add IWDG support and enable it on ED1 board
-Fix useless GPIO aliases and reorder nodes
* tag 'stm32-dt-for-v4.19-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32: (22 commits)
ARM: dts: stm32: update iwdg with lsi clock name for stm32f429
ARM: dts: stm32: add iwdg2 support for stm32mp157c-ed1
ARM: dts: stm32: add iwdg2 support for stm32mp157c
ARM: dts: stm32: Reorder nodes in stm32mp157c-ed1
ARM: dts: stm32: remove gpio aliases for stm32mp157c
ARM: dts: stm32: add support of ethernet on stm32mp157c-ev1
ARM: dts: stm32: Add ethernet dwmac on stm32mp1
ARM: dts: stm32: Add syscfg on stm32mp1
ARM: dts: stm32: add SPI1 support on stm32mp157c-ev1
ARM: dts: stm32: add SPI support on stm32mp157c
ARM: dts: stm32: Add DFSDM support to stm32mp157c
ARM: dts: stm32: Add ADC support to stm32mp157c
ARM: dts: stm32: enable USB OTG HS on stm32mp157c-ev1
ARM: dts: stm32: add USB OTG HS support for stm32mp157c SoC
ARM: dts: stm32: enable USB Host (USBH) EHCI controller on stm32mp157c-ev1
ARM: dts: stm32: enable RTC on stm32mp157c-ed1
ARM: dts: stm32: add RTC support to stm32mp157c
ARM: dts: stm32: m_can activation on stm32mp157c-ev1
ARM: dts: stm32: m_can support to stm32mp157c
ARM: dts: stm32: Add HASH support on stm32mp157c
...
Signed-off-by: Olof Johansson <olof@lixom.net>
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This patch updates iwdg watchdog to use lsi clock name.
Signed-off-by: Ludovic Barre <ludovic.barre@st.com>
Acked-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
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This patch activates independent watchdog support for
stm32mp157c board.
Signed-off-by: Ludovic Barre <ludovic.barre@st.com>
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
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This patch adds independent watchdog support for stm32mp157c.
Signed-off-by: Ludovic Barre <ludovic.barre@st.com>
Acked-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
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Nodes should be ordered in alphabetic order.
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
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GPIO aliases are not used by stm32 pinctrl driver.
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
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MAC is connected to a PHY in RGMII mode.
Signed-off-by: Christophe Roullier <christophe.roullier@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
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Add Ethernet support (Synopsys MAC IP 4.20a) on stm32mp1 SOC.
Enable feature supported by the stmmac driver, such as TSO.
Signed-off-by: Christophe Roullier <christophe.roullier@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
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System configuration controller is mainly used to manage
the compensation cell and other IOs and system related
settings.
Signed-off-by: Christophe Roullier <christophe.roullier@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
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This patch adds SPI1 support on stm32mp157c-ev1 board.
SPI1 is available on GPIO expansion connector but kept disabled
so these pins can be used as GPIOs by default.
Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
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This patch adds all SPI instances on stm32mp157c.
Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
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