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There is a bug in Turris Omnia's schematics, whereupon the MPP[26] pin,
which is routed to CN11 pin header, is documented as SPI CS1, but
MPP[26] pin does not support this function. Instead it controls chip
select 2 if in "spi0" mode.
Fix the name of the pin node in pinctrl node and fix the comment in SPI
node.
Fixes: 26ca8b52d6e1 ("ARM: dts: add support for Turris Omnia")
Signed-off-by: Marek Behún <kabel@kernel.org>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
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git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/dt
Devicetree changes for omaps
A series of changes for am335x baltos and netcom devices to update nand
transfer type and configure gpio-line-names.
* tag 'omap-for-6.1/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: dts: am335x-netcom: add GPIO names for NetCom Plus 2-port devices
ARM: dts: am335x-netcom: add GPIO names for NetCom Plus 8-port devices
ARM: dts: am335x-netcan: add GPIO names for NetCAN Plus device
ARM: dts: am335x-baltos: add GPIO names for ir2110 device
ARM: dts: am335x-baltos: add GPIO names for ir3220 and ir5221 devices
ARM: dts: am335x-baltos: change nand-xfer-type
Link: https://lore.kernel.org/r/pull-1663587735-853102@atomide.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Add GPIO names for SoC lines.
Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com>
Message-Id: <20220726083444.10159-5-yegorslists@googlemail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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Add GPIO names for both SoC and TCA6416 lines.
Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com>
Message-Id: <20220726083444.10159-4-yegorslists@googlemail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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Add GPIO names for SoC lines.
Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com>
Message-Id: <20220726083444.10159-3-yegorslists@googlemail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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Add GPIO names for SoC lines.
Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com>
Message-Id: <20220726083444.10159-2-yegorslists@googlemail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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Add GPIO names for both SoC and TCA6416 lines.
Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com>
Message-Id: <20220726083444.10159-1-yegorslists@googlemail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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Use "prefetch-dma" instead of "polled".
Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com>
Message-Id: <20220705122355.14854-1-yegorslists@googlemail.com>
Acked-by: Roger Quadros <rogerq@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/dt
Qualcomm ARM64 DTS updates for 6.1
Support for Samsung Galaxy E5, E7 and Grand Max is added, with support
for both 32-bit and 64-bit variants. The Samsung Galaxy S4 Mini Value
Edition gains magnetometer support.
MSM8996-based Xiaomi devices gains descriptions of the LPG-based LEDs.
On SA8295P ADP problems arising from regulators being switched into
low-power mode is worked around by removing this ability, for now.
The onboard USB Hub on SC7180 Trogdor is finally described and a few ADC
related updates are introduced.
On SC7280 support for the CPU and LLC bwmon instances are introduced.
Soundwire, audio codecs and sound introduced for a variety of boards.
Using required-opps the USB controllers votes for a minimum corner on
VDD_CX.
The onboard USB Hub Herobrine is described. A new board, the Google
Evoker is added, as is another revision of Herobrine Villager.
On SC8280XP the USB controllers are marked as wakeup-sources, to keep
them powered during suspend. The CRD has HID devices marked as
wakeup-sources to enable resuming the system. In addition to these
changes the alternative touchpad is introduced on the Lenovo ThinkPad
X13s.
SDM845 gains RPMh stats support and the LLCC BWMON is added. For SM6350
interconnect providers and GPI DMA is introduced. A description of the
PM7280b PMIC is added to Fairphone FP4 on SM7225.
With the multi-MSI support added in the PCIe controller, SM8250 gets all
its MSI interrupts added.
UFS ICE and the second SDHCI controller is introduced on SM8450. Support
for the Sony Xperia 1 IV is introduced.
Throughout a variety of platforms the TCSR mutex syscon is replaced with
the MMIO-based binding. TCSR nodes gained proper compatibles and halt
syscon nodes are split out from the mutex ranges.
A range of fixes to align with DT bindings are introduced. Among these
are the changes to the follow the TLMM binding and suffix pinctrl states
with -state and subnodes thereof with -pins, another is a number of
changes transitioning to use -gpios and introduction of proper parent
clock references in various clock providers.
* tag 'qcom-arm64-for-6.1' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (136 commits)
arm64: dts: qcom: sc7280: Add required-opps for USB
arm64: dts: qcom: sm8450: fix UFS PHY serdes size
arm64: dts: qcom: ipq8074: fix PCIe PHY serdes size
arm64: dts: qcom: sa8295p-adp: add missing gpio-ranges in PMIC GPIOs
arm64: dts: qcom: sa8295p-adp: add fallback compatible to PMIC GPIOs
arm64: dts: qcom: msm8996-xiaomi: align PMIC GPIO pin configuration with DT schema
arm64: dts: qcom: msm8994-msft-lumia-octagon: align resin node name with bindings
arm64: dts: qcom: pmi8994: add missing MPP compatible fallback
dt-bindings: pci: QCOM Add missing sc7280 aggre0, aggre1 clocks
arm64: dts: qcom: sc7280: Add missing aggre0, aggre1 clocks
arm64: dts: qcom: sc7280-villager: Adjust LTE SKUs
dt-bindings: arm: qcom: Adjust LTE SKUs for sc7280-villager
arm64: dts: qcom: sc7280-herobrine: Add nodes for onboard USB hub
arm64: dts: qcom: sc7180-trogdor: Add nodes for onboard USB hub
arm64: dts: qcom: align SDHCI reg-names with DT schema
arm64: dts: qcom: sm8250: provide additional MSI interrupts
arm64: dts: qcom: msm8996: add #clock-cells and XO clock to the HDMI PHY node
arm64: dts: qcom: Use WCD9335 DT bindings
arm64: dts: qcom: msm8994: switch TCSR mutex to MMIO
arm64: dts: qcom: ipq6018: switch TCSR mutex to MMIO
...
Link: https://lore.kernel.org/r/20220921234854.1343238-1-andersson@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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After adding all necessary support for MSM8916 SMP/cpuidle without PSCI
on ARM32, build the Samsung Galaxy E5/E7/Grand Max device trees from the
arm64 tree together with the ARM32 include to allow booting this device on
ARM32.
The approach to include device tree files from other architectures is
inspired from e.g. the Raspberry Pi (bcm2711-rpi-4-b.dts) where this is
used to build the device tree for both ARM32 and ARM64.
Signed-off-by: Lin, Meng-Bo <linmengbo0689@protonmail.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220724095413.14135-1-linmengbo0689@protonmail.com
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https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/dt
Qualcomm ARM DTS updates for 6.1
This adds extends the IPQ8064 support with the two variants IPQ8062 and
IPQ8065. MSM8974 and APQ8084 gained RPM stats support.
The Audio DSP remoteproc was added to MSM8226 and enabled for ASUS
ZenWatch 2 and LG G Watch R.
MSM8660 gained one I2C and one SPI bus and the APQ8060 Dragonboard got
the TMA340 Touchscreen described.
A wide range of improvements are done throughout the DTS files to align
with bindings, fix issues and improve structure on things.
* tag 'qcom-dts-for-6.1' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (35 commits)
ARM: dts: qcom: apq8026-lg-lenok: Enable ADSP
ARM: dts: qcom: apq8026-asus-sparrow: Enable ADSP
ARM: dts: qcom: msm8226: Add ADSP node
ARM: dts: qcom: ipq8064: pad addresses to 8 digit
ARM: dts: qcom: ipq8064: reorganize node order and sort them
ARM: dts: qcom: align SDHCI clocks with DT schema
ARM: dts: qcom: align SDHCI reg-names with DT schema
ARM: dts: qcom: msm8960: add clocks to the MMCC device node
ARM: dts: qcom: apq8064: add clocks to the MMCC device node
ARM: dts: qcom: msm8960: add clocks to the GCC device node
ARM: dts: qcom: apq8064: add clocks to the GCC device node
ARM: dts: qcom: msm8960: add clocks to the LCC device node
ARM: dts: qcom: apq8064: add clocks to the LCC device node
ARM: dts: qcom: msm8226: switch TCSR mutex to MMIO
ARM: dts: qcom: apq8084: switch TCSR mutex to MMIO
ARM: dts: qcom: msm8660: fix node names for fixed clocks
ARM: dts: qcom: msm8660: add pxo/cxo clocks to the GCC node
ARM: dts: qcom: apq8060-dragonboard: Add TMA340 to APQ8060 DragonBoard
ARM: dts: qcom: msm8660: Add GSBI3 I2C bus
ARM: dts: qcom: msm8660: Add GSBI1 SPI bus
...
Link: https://lore.kernel.org/r/20220921222619.1338380-1-andersson@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Configure the reserved memory for ADSP and enable it.
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220423155059.660387-5-luca@z3ntu.xyz
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The customized reserved memory for ADSP is already configured, so we
just need to enable the node.
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220423155059.660387-4-luca@z3ntu.xyz
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Add a node for the adsp found on msm8226.
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220423155059.660387-3-luca@z3ntu.xyz
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Pad reg addresses to 8 digit to make sorting easier.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220718153815.29414-2-ansuelsmth@gmail.com
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Reorganize node order and sort them by address.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220718153815.29414-1-ansuelsmth@gmail.com
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The DT schema expects clocks iface-core order. No functional change.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220712144245.17417-6-krzysztof.kozlowski@linaro.org
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DT schema requires SDHCI reg names to be hc/core without "_mem" suffix,
just like TXT bindings were expecting before the conversion.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220712144245.17417-5-krzysztof.kozlowski@linaro.org
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As we are converting this platform to use DT clock bindings, add clocks
and clock-names properties to the MMCC device tree node.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Tested-by: David Heidelberg <david@ixit.cz> # tested on Nexus 7 (2013)
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220623120418.250589-16-dmitry.baryshkov@linaro.org
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As we are converting this platform to use DT clock bindings, add clocks
and clock-names properties to the MMCC device tree node.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Tested-by: David Heidelberg <david@ixit.cz> # tested on Nexus 7 (2013)
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220623120418.250589-15-dmitry.baryshkov@linaro.org
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As we are converting this platform to use DT clock bindings, add clocks
and clock-names properties to the GCC device tree node.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Tested-by: David Heidelberg <david@ixit.cz> # tested on Nexus 7 (2013)
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220623120418.250589-14-dmitry.baryshkov@linaro.org
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As we are converting this platform to use DT clock bindings, add clocks
and clock-names properties to the GCC device tree node.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Tested-by: David Heidelberg <david@ixit.cz> # tested on Nexus 7 (2013)
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220623120418.250589-13-dmitry.baryshkov@linaro.org
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As we are converting this platform to use DT clock bindings, add clocks
and clock-names properties to the LCC device tree node.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Tested-by: David Heidelberg <david@ixit.cz> # tested on Nexus 7 (2013)
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220623120418.250589-12-dmitry.baryshkov@linaro.org
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As we are converting this platform to use DT clock bindings, add clocks
and clock-names properties to the LCC device tree node.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Tested-by: David Heidelberg <david@ixit.cz> # tested on Nexus 7 (2013)
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220623120418.250589-11-dmitry.baryshkov@linaro.org
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The TCSR mutex bindings allow device to be described only with address
space (so it uses MMIO, not syscon regmap). This seems reasonable as
TCSR mutex is actually a dedicated IO address space and it also fixes DT
schema checks:
qcom-msm8226-samsung-s3ve3g.dtb: hwlock: 'reg' is a required property
qcom-msm8226-samsung-s3ve3g.dtb: hwlock: 'syscon' does not match any of the regexes: 'pinctrl-[0-9]+'
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220909092035.223915-16-krzysztof.kozlowski@linaro.org
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The TCSR mutex bindings allow device to be described only with address
space (so it uses MMIO, not syscon regmap). This seems reasonable as
TCSR mutex is actually a dedicated IO address space and it also fixes DT
schema checks:
qcom-apq8084-mtp.dtb: hwlock: 'reg' is a required property
qcom-apq8084-mtp.dtb: hwlock: 'syscon' does not match any of the regexes: 'pinctrl-[0-9]+'
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220909092035.223915-15-krzysztof.kozlowski@linaro.org
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Fix node names for three fixed clocks to follow the
no-underscores-in-name rule. To remain compatible with the drivers
expecting to find the old clock names, add clock-output-names
properties.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220909105136.3733919-6-dmitry.baryshkov@linaro.org
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Add pxo/cxo clocks to the GCC device tree node.
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220909105136.3733919-5-dmitry.baryshkov@linaro.org
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This adds the CY8CTMA340 Touchscreen to the APQ8060 DragonBoard.
Tested without display by issuing cat /dev/input/input/event3
which produces appropriate noise and interrupts on the dedicated
GPIO line.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220913132846.305716-3-linus.walleij@linaro.org
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GSBI3 can be used to enable an external I2C bus on e.g. the
APQ8060. On the DragonBoard APQ8060 this I2C bus is used to
talk to the Cypress CY8CTMA340 CYTTSP touchscreen.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220913132846.305716-2-linus.walleij@linaro.org
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GSBI1 can be used to enable an external SPI bus on e.g. the
APQ8060. On the DragonBoard APQ8060 this SPI bus is used to
talk to the LCD display.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
[bjorn: Moved status properties last]
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220913132846.305716-1-linus.walleij@linaro.org
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Bindings expect Power-on node name to be "pon":
'power-on@800' do not match any of the regexes
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: David Heidelberg <david@ixit.cz>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220828084341.112146-4-krzysztof.kozlowski@linaro.org
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Bindings expect LPG/PWM node name to be "pwm":
pmic@5: 'lpg' does not match any of the regexes
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: David Heidelberg <david@ixit.cz>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220828084341.112146-3-krzysztof.kozlowski@linaro.org
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Bindings expect VADC node name to be "adc":
pmic@0: 'vadc@3100' does not match any of the regexes
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: David Heidelberg <david@ixit.cz>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220828084341.112146-2-krzysztof.kozlowski@linaro.org
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Use respective GPIO_ACTIVE_LOW/HIGH flags for tlmm GPIOs. Include
gpio.h header if this is first usage of that flag.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220802153947.44457-5-krzysztof.kozlowski@linaro.org
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Fixed regulators, like stub for SDCC Power, are not part of SoC, so they
should be outside of the soc node.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220810080516.166866-4-krzysztof.kozlowski@linaro.org
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Using node paths to extend or override a device tree node is error
prone. If there was a typo error, a new node will be created instead of
extending the existing node. This will lead to run-time errors that
could be hard to detect.
A mistyped label on the other hand, will cause a dtc compile error
(during build time). This also reduces the indentation making the code
easier to read.
The pre/post DTBS are the same.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220810080516.166866-3-krzysztof.kozlowski@linaro.org
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| | | | | | | | |
| | | | | | | | |
| | | | | | | | |
| | | | | | | | | |
Using node paths to extend or override a device tree node is error
prone. If there was a typo error, a new node will be created instead of
extending the existing node. This will lead to run-time errors that
could be hard to detect.
A mistyped label on the other hand, will cause a dtc compile error
(during build time). This also reduces the indentation making the code
easier to read.
The pre/post DTBS are the same.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220810080516.166866-2-krzysztof.kozlowski@linaro.org
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| | | | | | | | |
| | | | | | | | |
| | | | | | | | |
| | | | | | | | | |
Using node paths to extend or override a device tree node is error
prone. If there was a typo error, a new node will be created instead of
extending the existing node. This will lead to run-time errors that
could be hard to detect.
A mistyped label on the other hand, will cause a dtc compile error
(during build time). This also reduces the indentation making the code
easier to read.
The pre/post DTBS are the same.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220810080516.166866-1-krzysztof.kozlowski@linaro.org
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ipq8065 SoC is based on ipq8064-v2.0 with a more clocked CPU and
an increased voltage output with the smb208 regulators.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220718161826.4943-3-ansuelsmth@gmail.com
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ipq8062 SoC is based on ipq8064-v2.0 with lower supported freq, lack of
usb port and a reduced voltage output with the smb208 regulators.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220718161826.4943-2-ansuelsmth@gmail.com
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Add ipq8064-v2.0 dtsi variant that differ from original ipq8064 SoC for
some additional pcie, sata and usb configuration values, additional
reserved memory and serial output.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220718161826.4943-1-ansuelsmth@gmail.com
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Replace deprecated perst-gpio properties with up-to-date perst-gpios
in the arm32 Qualcomm Snapdragon device trees.
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220506152107.1527552-8-dmitry.baryshkov@linaro.org
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Qualcomm PCIe devices are not really compatible with the snps,dw-pcie.
Unlike the generic IP core, they have special requirements regarding
enabling clocks, toggling resets, using the PHY, etc.
This is not to mention that platform snps-dw-pcie driver expects to find
two IRQs declared, while Qualcomm platforms use just one.
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220506152107.1527552-7-dmitry.baryshkov@linaro.org
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Add device node for the rpm-stats pseudo device.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220726205355.598874-2-dmitry.baryshkov@linaro.org
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Add device node for the rpm-stats pseudo device.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220726205355.598874-1-dmitry.baryshkov@linaro.org
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git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/dt
Renesas ARM DT updates for v6.1 (take two)
- Merge Renesas ARM/ARM64 maintainers entries,
- CAN support for the RZ/N1 SoC and the RZN1D-DB development board,
- Watchdog, pin control, I2C (EEPROM), GPIO (LEDS/switches), and
Ethernet support for the R-Car V4H SoC and the White Hawk
development board,
- Miscellaneous fixes and improvements.
* tag 'renesas-arm-dt-for-v6.1-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: (26 commits)
arm64: dts: renesas: Adjust whitespace around '{'
arm64: dts: renesas: rzg2ul-smarc: Include SoM DTSI into board DTS
arm64: dts: renesas: rzg2ul-smarc-som: Drop enabling wdt2
ARM: dts: renesas: Fix USB PHY device and child node names
arm64: dts: renesas: r8a779a0: Update to R-Car Gen4 compatible values
arm64: dts: renesas: white-hawk-cpu: Add missing bootargs
arm64: dts: renesas: spider-cpu: Add missing bootargs
arm64: dts: renesas: spider: Move aliases and chosen
arm64: dts: renesas: white-hawk-cpu: Add Ethernet support
arm64: dts: renesas: white-hawk: Move aliases and chosen
arm64: dts: renesas: r8a779g0: Add RAVB nodes
arm64: dts: renesas: white-hawk-cpu: Add push switches
arm64: dts: renesas: white-hawk-cpu: Add GP LEDs
arm64: dts: renesas: r8a779g0: Add GPIO nodes
arm64: dts: renesas: white-hawk: Add Ethernet sub-board
arm64: dts: renesas: white-hawk: Add CSI/DSI sub-board
arm64: dts: renesas: white-hawk: Add I2C0 and EEPROMs
arm64: dts: renesas: r8a779g0: Add I2C nodes
arm64: dts: renesas: white-hawk-cpu: Add serial port pin control
arm64: dts: renesas: r8a779g0: Add pinctrl device node
...
Link: https://lore.kernel.org/r/cover.1663588776.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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make dtbs_check:
usb-phy@e6590100: '#phy-cells' is a required property
From schema: dtschema/schemas/phy/phy-provider.yaml
The R-Car Gen2 USB PHY device nodes do not represent USB PHYs
theirselves, and thus do not have "#phy-cells" properties. Fix the
warning by renaming them from "usb-phy" to "usb-phy-controller".
Rename their child nodes from "usb-channel" to "usb-phy", as these do
represent USB PHYs.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/6442b4042e26537abc8632c4772f8201685f1f1f.1663165098.git.geert+renesas@glider.be
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The CN10/CN11 on RZ/N1-EB board are headers to add jumpers to select which
CAN interface to route to the real CAN connector J16.
For a normal use case either we need to wire CAN1 or CAN2, but not both.
This patch enables CAN1 and disables CAN2 by default assuming CN10/CN11
is wired for CAN1.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20220902062752.56841-1-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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Add CAN{0,1} nodes to R9A06G032 (RZ/N1) SoC DTSI.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20220830164518.1381632-3-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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