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* arm/arm64: KVM: Advertise SMCCC v1.1Marc Zyngier2018-02-061-1/+1
| | | | | | | | | | | | | The new SMC Calling Convention (v1.1) allows for a reduced overhead when calling into the firmware, and provides a new feature discovery mechanism. Make it visible to KVM guests. Tested-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
* arm/arm64: KVM: Consolidate the PSCI include filesMarc Zyngier2018-02-062-28/+1
| | | | | | | | | | | As we're about to update the PSCI support, and because I'm lazy, let's move the PSCI include file to include/kvm so that both ARM architectures can find it. Acked-by: Christoffer Dall <christoffer.dall@linaro.org> Tested-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
* arm: KVM: Fix SMCCC handling of unimplemented SMC/HVC callsMarc Zyngier2018-02-061-2/+11
| | | | | | | | | | | | | | | KVM doesn't follow the SMCCC when it comes to unimplemented calls, and inject an UNDEF instead of returning an error. Since firmware calls are now used for security mitigation, they are becoming more common, and the undef is counter productive. Instead, let's follow the SMCCC which states that -1 must be returned to the caller when getting an unknown function number. Cc: <stable@vger.kernel.org> Tested-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
* KVM: arm64: Handle RAS SErrors from EL1 on guest exitJames Morse2018-01-161-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | We expect to have firmware-first handling of RAS SErrors, with errors notified via an APEI method. For systems without firmware-first, add some minimal handling to KVM. There are two ways KVM can take an SError due to a guest, either may be a RAS error: we exit the guest due to an SError routed to EL2 by HCR_EL2.AMO, or we take an SError from EL2 when we unmask PSTATE.A from __guest_exit. For SError that interrupt a guest and are routed to EL2 the existing behaviour is to inject an impdef SError into the guest. Add code to handle RAS SError based on the ESR. For uncontained and uncategorized errors arm64_is_fatal_ras_serror() will panic(), these errors compromise the host too. All other error types are contained: For the fatal errors the vCPU can't make progress, so we inject a virtual SError. We ignore contained errors where we can make progress as if we're lucky, we may not hit them again. If only some of the CPUs support RAS the guest will see the cpufeature sanitised version of the id registers, but we may still take RAS SError on this CPU. Move the SError handling out of handle_exit() into a new handler that runs before we can be preempted. This allows us to use this_cpu_has_cap(), via arm64_is_ras_serror(). Acked-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: James Morse <james.morse@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
* KVM: arm/arm64: mask/unmask daif around VHE guestsJames Morse2018-01-161-0/+2
| | | | | | | | | | | | | | | | | | | | | | | Non-VHE systems take an exception to EL2 in order to world-switch into the guest. When returning from the guest KVM implicitly restores the DAIF flags when it returns to the kernel at EL1. With VHE none of this exception-level jumping happens, so KVMs world-switch code is exposed to the host kernel's DAIF values, and KVM spills the guest-exit DAIF values back into the host kernel. On entry to a guest we have Debug and SError exceptions unmasked, KVM has switched VBAR but isn't prepared to handle these. On guest exit Debug exceptions are left disabled once we return to the host and will stay this way until we enter user space. Add a helper to mask/unmask DAIF around VHE guests. The unmask can only happen after the hosts VBAR value has been synchronised by the isb in __vhe_hyp_call (via kvm_call_hyp()). Masking could be as late as setting KVMs VBAR value, but is kept here for symmetry. Acked-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: James Morse <james.morse@arm.com> Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
* arm64: KVM: Use per-CPU vector when BP hardening is enabledMarc Zyngier2018-01-081-0/+10
| | | | | | | | Now that we have per-CPU vectors, let's plug then in the KVM/arm64 code. Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
* arm64: allow ID map to be extended to 52 bitsKristina Martsenko2017-12-221-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently, when using VA_BITS < 48, if the ID map text happens to be placed in physical memory above VA_BITS, we increase the VA size (up to 48) and create a new table level, in order to map in the ID map text. This is okay because the system always supports 48 bits of VA. This patch extends the code such that if the system supports 52 bits of VA, and the ID map text is placed that high up, then we increase the VA size accordingly, up to 52. One difference from the current implementation is that so far the condition of VA_BITS < 48 has meant that the top level table is always "full", with the maximum number of entries, and an extra table level is always needed. Now, when VA_BITS = 48 (and using 64k pages), the top level table is not full, and we simply need to increase the number of entries in it, instead of creating a new table level. Tested-by: Suzuki K Poulose <suzuki.poulose@arm.com> Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com> Reviewed-by: Marc Zyngier <marc.zyngier@arm.com> Tested-by: Bob Picco <bob.picco@oracle.com> Reviewed-by: Bob Picco <bob.picco@oracle.com> Signed-off-by: Kristina Martsenko <kristina.martsenko@arm.com> [catalin.marinas@arm.com: reduce arguments to __create_hyp_mappings()] [catalin.marinas@arm.com: reworked/renamed __cpu_uses_extended_idmap_level()] Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
* arm64: handle 52-bit addresses in TTBRKristina Martsenko2017-12-221-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | The top 4 bits of a 52-bit physical address are positioned at bits 2..5 in the TTBR registers. Introduce a couple of macros to move the bits there, and change all TTBR writers to use them. Leave TTBR0 PAN code unchanged, to avoid complicating it. A system with 52-bit PA will have PAN anyway (because it's ARMv8.1 or later), and a system without 52-bit PA can only use up to 48-bit PAs. A later patch in this series will add a kconfig dependency to ensure PAN is configured. In addition, when using 52-bit PA there is a special alignment requirement on the top-level table. We don't currently have any VA_BITS configuration that would violate the requirement, but one could be added in the future, so add a compile-time BUG_ON to check for it. Tested-by: Suzuki K Poulose <suzuki.poulose@arm.com> Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com> Reviewed-by: Marc Zyngier <marc.zyngier@arm.com> Tested-by: Bob Picco <bob.picco@oracle.com> Reviewed-by: Bob Picco <bob.picco@oracle.com> Signed-off-by: Kristina Martsenko <kristina.martsenko@arm.com> [catalin.marinas@arm.com: added TTBR_BADD_MASK_52 comment] Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
* Merge tag 'armsoc-fixes' of ↵Linus Torvalds2017-12-1053-97/+117
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC fixes from Olof Johansson: - A revert of all SCPI changes from the 4.15 merge window. They had regressions on the Amlogic platforms, and the submaintainer isn't around to fix these bugs due to vacation, etc. So we agreed to revert and revisit in next release cycle. - A series fixing a number of bugs for ARM CCN interconnect, around module unload, smp_processor_id() in preemptable context, and fixing some memory allocation failure checks. - A handful of devicetree fixes for different platforms, fixing warnings and errors that were previously ignored by the compiler. - The usual set of mostly minor fixes for different platforms. * tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (42 commits) ARM64: dts: meson-gx: fix UART pclk clock name ARM: omap2: hide omap3_save_secure_ram on non-OMAP3 builds arm: dts: nspire: Add missing #phy-cells to usb-nop-xceiv ARM: dts: Fix dm814x missing phy-cells property ARM: dts: Fix elm interrupt compiler warning bus: arm-ccn: fix module unloading Error: Removing state 147 which has instances left. bus: arm-cci: Fix use of smp_processor_id() in preemptible context bus: arm-ccn: Fix use of smp_processor_id() in preemptible context bus: arm-ccn: Simplify code bus: arm-ccn: Check memory allocation failure bus: arm-ccn: constify attribute_group structures. firmware: arm_scpi: Revert updates made during v4.15 merge window arm: dts: marvell: Add missing #phy-cells to usb-nop-xceiv arm64: dts: sort vendor subdirectories in Makefile alphabetically meson-gx-socinfo: Fix package id parsing ARM: meson: fix spelling mistake: "Couln't" -> "Couldn't" ARM: dts: meson: fix the memory region of the GPIO interrupt controller ARM: dts: meson: correct the sort order for the the gpio_intc node MAINTAINERS: exclude other Socionext SoC DT files from ARM/UNIPHIER entry arm64: dts: uniphier: remove unnecessary interrupt-parent ...
| * Merge tag 'amlogic-fixes-1' of ↵Olof Johansson2017-12-092-10/+10
| |\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into fixes Amlogic fixes for v4.15-rc - GPIO interrupt fixes - socinfo fix for GX series - fix typo * tag 'amlogic-fixes-1' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic: ARM64: dts: meson-gx: fix UART pclk clock name meson-gx-socinfo: Fix package id parsing ARM: meson: fix spelling mistake: "Couln't" -> "Couldn't" ARM: dts: meson: fix the memory region of the GPIO interrupt controller ARM: dts: meson: correct the sort order for the the gpio_intc node Signed-off-by: Olof Johansson <olof@lixom.net>
| | * ARM: meson: fix spelling mistake: "Couln't" -> "Couldn't"Colin Ian King2017-11-301-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | Trivial fix to spelling mistake in pr_err error message Signed-off-by: Colin Ian King <colin.king@canonical.com> Acked-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
| | * ARM: dts: meson: fix the memory region of the GPIO interrupt controllerMartin Blumenstingl2017-11-301-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | commit 200a575b68d2 ("ARM: dts: meson: organize devices in their corresponding busses") organized all peripherals in busses so that the base register offset of the bus doesn't have to be included in all child-nodes anymore. The GPIO interrupt controller however specifies the register offset without subtracting the "cbus" base address. This leads to a problem where of_iomap inside the irq-meson-gpio driver fails because it actually tries to map 0x182209880 (cbus base = 0xc1100000 + 0xc1109880 for the GPIO interrupt controller). Fix this by using 0x9880 as register offset. Fixes: 7d32bc03bcfb ("ARM: dts: meson8b: enable gpio interrupt controller") Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Acked-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
| | * ARM: dts: meson: correct the sort order for the the gpio_intc nodeMartin Blumenstingl2017-11-301-9/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Nodes are sorted by their register start address. Move gpio_intc to the correct position. No functional changes intended. Fixes: 7d32bc03bcfb ("ARM: dts: meson8b: enable gpio interrupt controller") Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Acked-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
| * | Merge tag 'omap-for-v4.15/fixes-dt-warnings' of ↵Olof Johansson2017-12-092-1/+2
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes Two fixes for dts compiler warnings These recently started showing up with better dtc checks being introduced. * tag 'omap-for-v4.15/fixes-dt-warnings' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: ARM: dts: Fix dm814x missing phy-cells property ARM: dts: Fix elm interrupt compiler warning Signed-off-by: Olof Johansson <olof@lixom.net>
| | * | ARM: dts: Fix dm814x missing phy-cells propertyTony Lindgren2017-12-051-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We have phy-cells for usb_phy0, but it's missing for usb_phy1 and we get: Warning (phys_property): Missing property '#phy-cells' in node /ocp/l4ls@48000000/control@140000/usb-phy@1b00 or bad phandle (referred from /ocp/usb@47400000/usb@47401800:phys[0]) Signed-off-by: Tony Lindgren <tony@atomide.com>
| | * | ARM: dts: Fix elm interrupt compiler warningTony Lindgren2017-12-051-1/+1
| | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | Looks like the interrupt property is missing the controller and level information causing: Warning (interrupts_property): interrupts size is (4), expected multiple of 12 in /ocp/elm@48078000 Signed-off-by: Tony Lindgren <tony@atomide.com>
| * | ARM: omap2: hide omap3_save_secure_ram on non-OMAP3 buildsArnd Bergmann2017-12-071-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In configurations without CONFIG_OMAP3 but with secure RAM support, we now run into a link failure: arch/arm/mach-omap2/omap-secure.o: In function `omap3_save_secure_ram': omap-secure.c:(.text+0x130): undefined reference to `save_secure_ram_context' The omap3_save_secure_ram() function is only called from the OMAP34xx power management code, so we can simply hide that function in the appropriate #ifdef. Fixes: d09220a887f7 ("ARM: OMAP2+: Fix SRAM virt to phys translation for save_secure_ram_context") Acked-by: Tony Lindgren <tony@atomide.com> Tested-by: Dan Murphy <dmurphy@ti.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| * | arm: dts: nspire: Add missing #phy-cells to usb-nop-xceivRob Herring2017-12-071-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | "usb-nop-xceiv" is using the phy binding, but is missing #phy-cells property. This is probably because the binding was the precursor to the phy binding. Fixes the following warning in nspire dts files: Warning (phys_property): Missing property '#phy-cells' in node ... Signed-off-by: Rob Herring <robh@kernel.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| * | Merge tag 'omap-for-v4.15/fixes-v2-signed' of ↵Olof Johansson2017-12-0336-66/+88
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes Fixes for omaps for v4.15-rc cycle with two fixes for hangs with the rest being compiler warning fixes and fixes for power states and devices on various boards: - Fix smatch issue introduced by recent omap device changes for legacy resources - Fix SRAM virt to phys related boot hang affecting n900 and other omap3 hs devices found by pending CMA changes. While it seems that we have not hit this in other use cases, let's fix it to avoid a nasty and hard to find suprise as right now there is just luck keeping the SRAM virtual address to physical address translation working with the 0xffff high_mask. - Fix am335x reading of domain state registers that only exist for the PM_CEFUSE domain and produce wrong results for other domains - Fix missing setting for error code for omap device if allocation fails - Fix missing modules_offs for omap3 MMC3 affecting n9/n950 - Fix cm_split_idlest() reading reserved registers showing wrong idlestatus - Fixes to correct #phy-cells property for compiler warnings that recently started happening - Add a missing OHCI remote-wakeup-connected property that I was supposed to merge after the ohci-omap3 to ohci-platform changes but somehow managed to drop. I only noticed this was missing while debugging the OHCI/EHCI GPS and modem hang - Fix a system hang with GPS or modem connected to the OHCI/EHCI bus that typically happened within 20 - 40 minutes on an idle system. This turned out to be an issue caused by using the parent interrupt controller directly with the WUGEN + GIC stacked interrupt controller domains - Fixes for logicpd-somlv GPMC for Ethernet and NAND that clearly have been broken since we changed GPMC to use the interrupt controller binding for some pins. And fix the wrong pin muxing for WLAN while at it - Fixes for am437x interrupt and dma properties to fix compiler warnings that recently started happening * tag 'omap-for-v4.15/fixes-v2-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: ARM: dts: am437x-cm-t43: Correct the dmas property of spi0 ARM: dts: am4372: Correct the interrupts_properties of McASP ARM: dts: logicpd-somlv: Fix wl127x pinmux ARM: dts: logicpd-som-lv: Fix gpmc addresses for NAND and enet ARM: dts: Fix omap4 hang with GPS connected to USB by using wakeupgen ARM: OMAP2+: Missing error code in omap_device_build() ARM: AM33xx: PRM: Remove am33xx_pwrdm_read_prev_pwrst function ARM: OMAP2+: Fix SRAM virt to phys translation for save_secure_ram_context ARM: dts: Add remote-wakeup-connected for omap OHCI ARM: dts: am33xx: Add missing #phy-cells to ti,am335x-usb-phy ARM: dts: omap: Add missing #phy-cells to usb-nop-xceiv ARM: OMAP2+: Fix smatch found issue for omap_device ARM: OMAP2/3: CM: fix cm_split_idlest functionality ARM: OMAP3: hwmod_data: add missing module_offs for MMC3 Signed-off-by: Olof Johansson <olof@lixom.net>
| | * \ Merge branch 'omap-for-v4.15/fixes-dt' into omap-for-v4.15/fixes-v2Tony Lindgren2017-11-2826-13/+45
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| | | * \ Merge branch 'dts-fixes' into omap-for-v4.15/fixes-dtTony Lindgren2017-11-281261-15719/+26232
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| | | | * | ARM: dts: am437x-cm-t43: Correct the dmas property of spi0Peter Ujfalusi2017-11-281-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The DMA binding for eDMA needs 2 parameters, not 1. The second, missing parameter is the tptc to be used for the channel. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| | | | * | ARM: dts: am4372: Correct the interrupts_properties of McASPPeter Ujfalusi2017-11-281-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fixes the following warnings: arch/arm/boot/dts/am437x-cm-t43.dtb: Warning (interrupts_property): interrupts size is (8), expected multiple of 12 in /ocp@44000000/mcasp@48038000 arch/arm/boot/dts/am437x-cm-t43.dtb: Warning (interrupts_property): interrupts size is (8), expected multiple of 12 in /ocp@44000000/mcasp@4803C000 Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| | | | * | ARM: dts: logicpd-somlv: Fix wl127x pinmuxAdam Ford2017-11-281-5/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The pin assignment for the wl127x interrupt was incorrect. I am not sure how this every worked. This also eliminates a conflict with the SMC911x ethernet driver and properly moves pinmuxes for the related gpio to omap3_pmx_wkup from omap3_pmx_core. Fixes: ab8dd3aed011 ("ARM: DTS: Add minimal Support for Logic PD DM3730 SOM-LV") Signed-off-by: Adam Ford <aford173@gmail.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| | | | * | ARM: dts: logicpd-som-lv: Fix gpmc addresses for NAND and enetAdam Ford2017-11-282-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch fixes and issue where the NAND and GPMC based ethernet controller stopped working. This also updates the GPMC settings to be consistent with the Logic PD Torpedo development from the commit listed above. Fixes: 44e4716499b8 ("ARM: dts: omap3: Fix NAND device nodes") Signed-off-by: Adam Ford <aford173@gmail.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| | | | * | ARM: dts: Fix omap4 hang with GPS connected to USB by using wakeupgenTony Lindgren2017-11-281-2/+0
| | | | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There's been a reproducable USB OHCI/EHCI cpuidle related hang on omap4 for a while that happens after about 20 - 40 minutes on an idle system with some data feeding device being connected, like a USB GPS device or a cellular modem. This issue happens in cpuidle states C2 and C3 and does not happen if cpuidle is limited to C1 state only. The symptoms are that the whole system hangs and never wakes up from idle, and if a watchdog is configured the system reboots after a while. Turns out that OHCI/EHCI devices on omap4 are trying to use the GIC interrupt controller directly as a parent instead of the WUGEN. We need to pass the interrupts through WUGEN to GIC to provide the wakeup events for the processor. Let's fix the issue by removing the gic interrupt-parent and use the default interrupt-parent wakeupgen instead. Note that omap5.dtsi had this already fixes earlier by commit 7136d457f365 ("ARM: omap: convert wakeupgen to stacked domains") but we somehow missed omap4 at that point. Fixes: 7136d457f365 ("ARM: omap: convert wakeupgen to stacked domains") Cc: Dave Gerlach <d-gerlach@ti.com> Cc: Nishanth Menon <nm@ti.com> Cc: Marc Zyngier <marc.zyngier@arm.com> Cc: Sebastian Reichel <sebastian.reichel@collabora.co.uk> Reviewed-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| | | * | ARM: dts: Add remote-wakeup-connected for omap OHCITony Lindgren2017-11-103-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add remote-wakeup-connected for omap OHCI as that's needed by ohci-platform driver. Cc: devicetree@vger.kernel.org Cc: Hans de Goede <hdegoede@redhat.com> Cc: Rob Herring <robh@kernel.org> Cc: Sebastian Reichel <sebastian.reichel@collabora.co.uk> Cc: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Acked-by: Alan Stern <stern@rowland.harvard.edu> Acked-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| | | * | ARM: dts: am33xx: Add missing #phy-cells to ti,am335x-usb-phyRob Herring2017-11-102-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | "ti,am335x-usb-phy" is using the phy binding, but is missing #phy-cells property. Fixes the following warning in TI dts files: Warning (phys_property): Missing property '#phy-cells' in node ... Signed-off-by: Rob Herring <robh@kernel.org> Cc: "Benoît Cousson" <bcousson@baylibre.com> Cc: Tony Lindgren <tony@atomide.com> Cc: linux-omap@vger.kernel.org Signed-off-by: Tony Lindgren <tony@atomide.com>
| | | * | ARM: dts: omap: Add missing #phy-cells to usb-nop-xceivRob Herring2017-11-1018-0/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | "usb-nop-xceiv" is using the phy binding, but is missing #phy-cells property. This is probably because the binding was the precursor to the phy binding. Fixes the following warning in OMAP dts files: Warning (phys_property): Missing property '#phy-cells' in node ... Signed-off-by: Rob Herring <robh@kernel.org> Cc: "Benoît Cousson" <bcousson@baylibre.com> Cc: Tony Lindgren <tony@atomide.com> Cc: Enric Balletbo i Serra <eballetbo@gmail.com> Cc: Javier Martinez Canillas <javier@dowhile0.org> Cc: linux-omap@vger.kernel.org Signed-off-by: Tony Lindgren <tony@atomide.com>
| | * | | Merge branch 'omap-for-v4.14/fixes' into omap-for-v4.15/fixes-v2Tony Lindgren2017-11-283-1/+7
| | |\ \ \
| | | * | | ARM: OMAP2/3: CM: fix cm_split_idlest functionalityTero Kristo2017-10-302-1/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | cm_split_idlest doesn't take the CM base offset into account right now, causing it to read reserved registers which show idlestatus as active always. This will cause the wait_module_ready functionality to be effectively an expensive NOP, which will cause problems if the module hasn't really activated during its execution. Fix by adding the CM offset into the calculation so the wait_module_ready will access correct register. Signed-off-by: Tero Kristo <t-kristo@ti.com> Reported-by: Filip Matijevic <filip.matijevic.pz@gmail.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| | | * | | ARM: OMAP3: hwmod_data: add missing module_offs for MMC3Tero Kristo2017-10-301-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | MMC3 hwmod data is missing the module_offs definition. MMC3 belongs under core, so add CORE_MOD for it. Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| | * | | | Merge branch 'soc-fixes' into omap-for-v4.15/fixesTony Lindgren2017-11-281236-13978/+25981
| | |\ \ \ \
| | | * | | | ARM: OMAP2+: Missing error code in omap_device_build()Dan Carpenter2017-11-281-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We need to set the error code if omap_device_alloc() fails. Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| | | * | | | ARM: AM33xx: PRM: Remove am33xx_pwrdm_read_prev_pwrst functionKeerthy2017-11-281-12/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Referring TRM Am335X series: http://www.ti.com/lit/ug/spruh73p/spruh73p.pdf The LastPowerStateEntered bitfield is present only for PM_CEFUSE domain. This is not present in any of the other power domains. Hence remove the generic am33xx_pwrdm_read_prev_pwrst hook which wrongly reads the reserved bit fields for all the other power domains. Reading the reserved bits leads to wrongly interpreting the low power transitions for various power domains that do not have the LastPowerStateEntered field. The pm debug counters values are wrong currently as we are incrementing them based on the reserved bits. Signed-off-by: Keerthy <j-keerthy@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| | | * | | | ARM: OMAP2+: Fix SRAM virt to phys translation for save_secure_ram_contextTony Lindgren2017-11-285-35/+31
| | | | |_|/ | | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With the CMA changes from Joonsoo Kim <iamjoonsoo.kim@lge.com>, it was noticed that n900 stopped booting. After investigating it turned out that n900 save_secure_ram_context does some whacky virtual to physical address translation for the SRAM data address. As we now only have minimal parts of omap3 idle code copied to SRAM, running save_secure_ram_context() in SRAM is not needed. It only gets called on PM init. And it seems there's no need to ever call this from SRAM idle code. So let's just keep save_secure_ram_context() in DDR, and pass it the physical address of the parameters. We can do everything else in omap-secure.c like we already do for other secure code. And since we don't have any documentation, I still have no clue what the values for 0, 1 and 1 for the parameters might be. If somebody has figured it out, please do send a patch to add some comments. Debugged-by: Joonsoo Kim <iamjoonsoo.kim@lge.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| | * | | | ARM: OMAP2+: Fix smatch found issue for omap_deviceTony Lindgren2017-10-301-4/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The patch d85a2d61432a: "ARM: OMAP2+: Populate legacy resources for dma and smartreflex" from Oct 10, 2017, leads to the following Smatch complaint: arch/arm/mach-omap2/omap_device.c:453 omap_device_copy_resources() error: we previously assumed 'oh' could be null (see line 394) Fixes: d85a2d61432a: ("ARM: OMAP2+: Populate legacy resources for dma and smartreflex") Reported-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * | | | | Merge tag 'imx-fixes-4.15' of ↵Olof Johansson2017-12-022-10/+1
| |\ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into fixes i.MX fixes for 4.15: - A fix for vf610-zii-dev-rev-c board which correct the unit-address of I2C EEPROM node to match the 'reg' property. - We thought the RTC block on i.MX53 is compatible with the one found on i.MX25, and added the device for i.MX53 device tree. But it turns out that's not the case, and we have to revert the change. * tag 'imx-fixes-4.15' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: Revert "ARM: dts: imx53: add srtc node" ARM: dts: vf610-zii-dev-rev-c: Fix the I2C EEPROM address Signed-off-by: Olof Johansson <olof@lixom.net>
| | * | | | | Revert "ARM: dts: imx53: add srtc node"Fabio Estevam2017-11-291-9/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit 5b725054147deaf966b3919e10a86c6bfe946a18. The rtc block on i.MX53 is a completely different hardware than the one found on i.MX25. Cc: <stable@vger.kernel.org> #4.14 Reported-by: Noel Vellemans <Noel.Vellemans@visionbms.com> Suggested-by: Juergen Borleis <jbe@pengutronix.de> Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
| | * | | | | ARM: dts: vf610-zii-dev-rev-c: Fix the I2C EEPROM addressFabio Estevam2017-11-291-1/+1
| | | |/ / / | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | at24mac602 should be at the I2C address 0x50, so that it matches the 'reg' property. Fixes: d4cd158176c3 ("ARM: dts: vf610-zii-dev: Add .dts file for rev. C") Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
| * | | | | Merge tag 'arm-soc/for-4.15/devicetree-fixes-1' of ↵Olof Johansson2017-12-024-10/+3
| |\ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | http://github.com/Broadcom/stblinux into fixes This pull request contains Broadcom ARM-based SoCs Device Tree fixes for 4.15, please pull the following: - Stefan provides a fix for the BCM2835 (Raspberry Pi) to fix warnings about missing "#phy-cells" properties - Florian provides two fixes for Nortsthar Plus, one that uses the correct interrupt specifiers for the timer/watchdog and one that disables SATA on BCM9582**HR boards since that leads to unidentified hangs right now * tag 'arm-soc/for-4.15/devicetree-fixes-1' of http://github.com/Broadcom/stblinux: ARM: dts: NSP: Fix PPI interrupt types ARM: dts: NSP: Disable AHCI controller for HR NSP boards ARM: dts: bcm283x: Fix DTC warnings about missing phy-cells Signed-off-by: Olof Johansson <olof@lixom.net>
| | * \ \ \ \ Merge tag 'bcm2835-dt-next-fixes-2017-11-15' into devicetree/fixesFlorian Fainelli2017-11-271-0/+1
| | |\ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This pull request brings in a fix for a warning that started occuring when dtc from -next got merged. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
| | | * | | | | ARM: dts: bcm283x: Fix DTC warnings about missing phy-cellsStefan Wahren2017-11-151-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch fixes the DTC warnings about missing property #phy-cells. Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com> Signed-off-by: Eric Anholt <eric@anholt.net> Reviewed-by: Eric Anholt <eric@anholt.net>
| | * | | | | | ARM: dts: NSP: Fix PPI interrupt typesFlorian Fainelli2017-11-271-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Booting a kernel results in the kernel warning us about the following PPI interrupts configuration: [ 0.105127] smp: Bringing up secondary CPUs ... [ 0.110545] GIC: PPI11 is secure or misconfigured [ 0.110551] GIC: PPI13 is secure or misconfigured Fix this by using the appropriate edge configuration for PPI11 and PPI13, this is similar to what was fixed for Northstar (BCM5301X) in commit 0e34079cd1f6 ("ARM: dts: BCM5301X: Correct GIC_PPI interrupt flags"). Fixes: 7b2e987de207 ("ARM: NSP: add minimal Northstar Plus device tree") Fixes: 1a9d53cabaf4 ("ARM: dts: NSP: Add TWD Support to DT") Acked-by: Jon Mason <jon.mason@broadcom.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
| | * | | | | | ARM: dts: NSP: Disable AHCI controller for HR NSP boardsFlorian Fainelli2017-11-272-8/+0
| | | |/ / / / | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The AHCI controller is currently enabled for all of these boards: bcm958623hr and bcm958625hr would result in a hard hang on boot that we cannot get rid of. Since this does not appear to have an easy and simple fix, just disable the AHCI controller for now until this gets resolved. Fixes: 70725d6e97ac ("ARM: dts: NSP: Enable SATA on bcm958625hr") Fixes: d454c3762437 ("ARM: dts: NSP: Add new DT file for bcm958623hr") Acked-by: Jon Mason <jon.mason@broadcom.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
| * | | | | | Merge tag 'renesas-dt-fixes-for-v4.15' of ↵Olof Johansson2017-12-024-0/+4
| |\ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into fixes Renesas ARM Based SoC DT Fixes for v4.15 Add missing '#reset-cells' property to cpg nodes. This flagged by recent dtc. * tag 'renesas-dt-fixes-for-v4.15' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: ARM: dts: r8a779x: Add '#reset-cells' in cpg-mssr Signed-off-by: Olof Johansson <olof@lixom.net>
| | * | | | | | ARM: dts: r8a779x: Add '#reset-cells' in cpg-mssrArnd Bergmann2017-11-204-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With the latest dtc, we get many warnings about the missing '#reset-cells' property in these controllers, e.g.: arch/arm/boot/dts/r8a7790-lager.dtb: Warning (resets_property): Missing property '#reset-cells' in node /clock-controller@e6150000 or bad phandle (referred from /can@e6e80000:resets[0]) arch/arm/boot/dts/r8a7792-blanche.dtb: Warning (resets_property): Missing property '#reset-cells' in node /soc/clock-controller@e6150000 or bad phandle (referred from /soc/dma-controller@e6700000:resets[0]) arch/arm/boot/dts/r8a7792-wheat.dtb: Warning (resets_property): Missing property '#reset-cells' in node /soc/clock-controller@e6150000 or bad phandle (referred from /soc/ethernet@e6800000:resets[0]) arch/arm/boot/dts/r8a7793-gose.dtb: Warning (resets_property): Missing property '#reset-cells' in node /clock-controller@e6150000 or bad phandle (referred from /gpio@e6050000:resets[0]) arch/arm/boot/dts/r8a7794-alt.dtb: Warning (resets_property): Missing property '#reset-cells' in node /clock-controller@e6150000 or bad phandle (referred from /i2c@e6500000:resets[0]) arch/arm/boot/dts/r8a7794-silk.dtb: Warning (resets_property): Missing property '#reset-cells' in node /clock-controller@e6150000 or bad phandle (referred from /interrupt-controller@e61c0000:resets[0]) This adds it for the three r8a779x chips that were lacking it. The binding mandates this as <1>, so this is the value I use. Signed-off-by: Arnd Bergmann <arnd@arndb.de> [geert: Add fix for r8a7793.dtsi] Fixes: 34fbd2b12761d111 ("ARM: dts: r8a7790: Add reset control properties") Fixes: 6e11a322f1d7505d ("ARM: dts: r8a7792: Add reset control properties") Fixes: 84fb19e1d201ba86 ("ARM: dts: r8a7793: Add reset control properties") Fixes: 615beb759ca494a4 ("ARM: dts: r8a7794: Add reset control properties") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| * | | | | | | arm: dts: marvell: Add missing #phy-cells to usb-nop-xceivRob Herring2017-12-024-0/+6
| | |/ / / / / | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | "usb-nop-xceiv" is using the phy binding, but is missing #phy-cells property. This is probably because the binding was the precursor to the phy binding. Fixes the following warning in Marvell dts files: Warning (phys_property): Missing property '#phy-cells' in node ... Signed-off-by: Rob Herring <robh@kernel.org> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Olof Johansson <olof@lixom.net>
* | | | | | | Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvmLinus Torvalds2017-12-102-2/+6
|\ \ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull KVM fixes from Radim Krčmář: "ARM: - A number of issues in the vgic discovered using SMATCH - A bit one-off calculation in out stage base address mask (32-bit and 64-bit) - Fixes to single-step debugging instructions that trap for other reasons such as MMMIO aborts - Printing unavailable hyp mode as error - Potential spinlock deadlock in the vgic - Avoid calling vgic vcpu free more than once - Broken bit calculation for big endian systems s390: - SPDX tags - Fence storage key accesses from problem state - Make sure that irq_state.flags is not used in the future x86: - Intercept port 0x80 accesses to prevent host instability (CVE) - Use userspace FPU context for guest FPU (mainly an optimization that fixes a double use of kernel FPU) - Do not leak one page per module load - Flush APIC page address cache from MMU invalidation notifiers" * tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm: (28 commits) KVM: x86: fix APIC page invalidation KVM: s390: Fix skey emulation permission check KVM: s390: mark irq_state.flags as non-usable KVM: s390: Remove redundant license text KVM: s390: add SPDX identifiers to the remaining files KVM: VMX: fix page leak in hardware_setup() KVM: VMX: remove I/O port 0x80 bypass on Intel hosts x86,kvm: remove KVM emulator get_fpu / put_fpu x86,kvm: move qemu/guest FPU switching out to vcpu_run KVM: arm/arm64: Fix broken GICH_ELRSR big endian conversion KVM: arm/arm64: kvm_arch_destroy_vm cleanups KVM: arm/arm64: Fix spinlock acquisition in vgic_set_owner kvm: arm: don't treat unavailable HYP mode as an error KVM: arm/arm64: Avoid attempting to load timer vgic state without a vgic kvm: arm64: handle single-step of hyp emulated mmio instructions kvm: arm64: handle single-step during SError exceptions kvm: arm64: handle single-step of userspace mmio instructions kvm: arm64: handle single-stepping trapped instructions KVM: arm/arm64: debug: Introduce helper for single-step arm: KVM: Fix VTTBR_BADDR_MASK BUG_ON off-by-one ...
| * \ \ \ \ \ \ Merge tag 'kvm-arm-fixes-for-v4.15-1' of ↵Radim Krčmář2017-12-052-2/+6
| |\ \ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/kvmarm/kvmarm KVM/ARM Fixes for v4.15. Fixes: - A number of issues in the vgic discovered using SMATCH - A bit one-off calculation in out stage base address mask (32-bit and 64-bit) - Fixes to single-step debugging instructions that trap for other reasons such as MMMIO aborts - Printing unavailable hyp mode as error - Potential spinlock deadlock in the vgic - Avoid calling vgic vcpu free more than once - Broken bit calculation for big endian systems
generated by cgit v1.2.3 (git 2.25.1) at 2024-12-19 14:08:13 +0000