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* [PATCH] x86: fix PDA variables to work during bootJames Bottomley2007-01-221-4/+9
| | | | | | | | | | | | | | | | | | | The current PDA code, which went in in post 2.6.19 has a flaw in that it doesn't correctly cycle the GDT and %GS segment through the boot PDA, the CPU PDA and finally the per-cpu PDA. The bug generally doesn't show up if the boot CPU id is zero, but everything falls apart for a non zero boot CPU id. The basically kills voyager which is perfectly capable of doing non zero CPU id boots, so voyager currently won't boot without this. The fix is to be careful and actually do the GDT setups correctly. Signed-off-by: James Bottomley <James.Bottomley@SteelEye.com> Cc: Andi Kleen <ak@suse.de> Cc: Jeremy Fitzhardinge <jeremy@goop.org> Cc: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* [PATCH] fix typo in geode_configre()@cyrix.ctakada2007-01-111-1/+1
| | | | | | | | | We write back the wrong register when configuring the Geode processor. Instead of storing to CCR4, it stores to CCR3. Cc: Jordan Crouse <jordan.crouse@amd.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] i386: fix another modpost warningVivek Goyal2007-01-051-1/+1
| | | | | | | | | | | | | | | o MODPOST generates warning for i386 if kernel is compiled with CONFIG_RELOCATABLE=y WARNING: vmlinux - Section mismatch: reference to .init.data: from .data between 'this_cpu' (at offset 0xc05194d0) and 'cpuinfo_op' o this_cpu pointer should be of type __cpuinitdata. Signed-off-by: Vivek Goyal <vgoyal@in.ibm.com> Cc: Andi Kleen <ak@suse.de> Cc: "Eric W. Biederman" <ebiederm@xmission.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [CPUFREQ] longhaul: Kill off warnings introduced by recent changes.Dave Jones2007-01-021-4/+1
| | | | | | Bunch of unused vars + one case where gcc isn't smart enough. Signed-off-by: Dave Jones <davej@redhat.com>
* [CPUFREQ] Uninitialized use of cmd.val in ↵Guillaume Chazarain2007-01-021-0/+1
| | | | | | | | | | arch/i386/kernel/cpu/cpufreq/acpi-cpufreq.c:acpi_cpufreq_target() cmd.val was used uninitialized on the line below. Signed-off-by: Guillaume Chazarain <guichaz@yahoo.fr> Acked-by: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com> Signed-off-by: Dave Jones <davej@redhat.com>
* [CPUFREQ] Longhaul - Always guess FSBRafał Bilski2007-01-021-30/+14
| | | | | | | | | | | | | | | | | | | | This is patch that solves Ebox mini PC issue and make FSB code more specification compilant. At start guess_fsb function is guessing 200MHz FSB too. It is better to make it in this way because, thanks to this function, driver will fail for bogus FSB values caused by bogus multiplier value. For PowerSaver processors we can't depend on Max / MinMHzFSB because these values are only used for PowerSaver 2.0 and 3.0. Most processors on which Longhaul is used are PowerSaver 1.0 only. I'm changing code for older CPU's too, but not so much as previously, and this code was already used for Ezra. Using MinMHzBR for Ezra-T is outside spec. It is for voltage scaling purpose and don't have to be equal to minmult (but it is). Same for Nehemiah (it isn't for sure). Added mult - current multiplier value. Signed-off-by: Rafał Bilski <rafalbilski@interia.pl> Signed-off-by: Dave Jones <davej@redhat.com>
* [CPUFREQ] Longhaul - Fix up powersaver assumptions.Rafał Bilski2006-12-291-33/+38
| | | | | | | | | | | | | | | | | | | | | | ACPI PM2 register was fallback for "Longhaul ver. 1" CPU's. My assumption that this register isn't present at "PowerSaver" motherboards is so far true, but current code will not work correctly in other case. There are three possible supports: ACPI C3, PM2 and northbridge. That was my assumption that ACPI C3 and northbridge is for PS and northbridge and PM2 is for V1. In current code we can only check if it is ACPI support or not by port22_en. So remove port22_en and add longhaul_flags. If USE_ACPI_C3 and USE_NORTHBRIDGE are both clear then it means ACPI PM2 support. Also change order of support probe from ACPI C3, PM2, northbridge to ACPI C3, northbridge, ACPI PM2. Paranoid protection against port 0x22 cast as ACPI PM2 register. Bit 1 clear in such case - lockup on AGP DMA. And obvious (now) fixup for do_powersaver. Use cx->address only for ACPI C3 ("PowerSaver" processor using PM2 support). Signed-off-by: Rafaż Bilski <rafalbilski@interia.pl> Signed-off-by: Dave Jones <davej@redhat.com>
* [CPUFREQ] longhaul: Fix up unreachable code.Dave Jones2006-12-281-1/+1
| | | | | Signed-off-by: Rafał Bilski <rafalbilski@interia.pl> Signed-off-by: Dave Jones <davej@redhat.com>
* [CPUFREQ] speedstep-centrino: missing space and bracketBrice Goglin2006-12-221-3/+3
| | | | | | | A space and a bracket are missing (and indentation is wrong). Signed-off-by: Brice Goglin <Brice.Goglin@ens-lyon.org> Signed-off-by: Dave Jones <davej@redhat.com>
* [CPUFREQ] Bug fix for acpi-cpufreq and cpufreq_stats oops on frequency ↵Venkatesh Pallipadi2006-12-221-4/+5
| | | | | | | | | | | | | | | | | | | | | change notification Fixes the oops in cpufreq_stats with acpi_cpufreq driver. The issue was that the frequency was reported as 0 in acpi-cpufreq.c. The bug is due to different indicies for freq_table and ACPI perf table. Also adds a check in cpufreq_stats to check for error return from freq_table_get_index() and avoid using the error return value. Patch fixes the issue reported at http://www.ussg.iu.edu/hypermail/linux/kernel/0611.2/0629.html and also other similar issue here http://bugme.osdl.org/show_bug.cgi?id=7383 comment 53 Signed-off-by: Dhaval Giani <dhaval.giani@gmail.com> Signed-off-by: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Dave Jones <davej@redhat.com>
* [CPUFREQ] longhaul compile fix.Dave Jones2006-12-171-0/+1
| | | | | | | Some gcc's are more anal than others about empty switch labels. error: label at end of compound statement Signed-off-by: Dave Jones <davej@redhat.com>
* [CPUFREQ] Advise not to use longhaul on VIA C7.Dave Jones2006-12-171-1/+2
| | | | | | C7's are centrino speedstep-alike. Signed-off-by: Dave Jones <davej@redhat.com>
* [CPUFREQ] set policy->curfreq on initializationMattia Dongili2006-12-171-2/+2
| | | | | | | | | | Check the correct variable and set policy->cur upon acpi-cpufreq initialization to allow the userspace governor to be used as default. Signed-off-by: Mattia Dongili <malattia@linux.it> Acked-by: "Pallipadi, Venkatesh" <venkatesh.pallipadi@intel.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Dave Jones <davej@redhat.com>
* [CPUFREQ] Trivial cleanup for acpi read/write port in acpi-cpufreq.cVenkatesh Pallipadi2006-12-131-23/+6
| | | | | | | Small cleanup in acpi-cpufreq. Signed-off-by: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com> Signed-off-by: Dave Jones <davej@redhat.com>
* Merge ../linusDave Jones2006-12-1215-161/+373
|\ | | | | | | | | | | Conflicts: drivers/cpufreq/cpufreq.c
| * Merge branch 'for-linus' of git://one.firstfloor.org/home/andi/git/linux-2.6Linus Torvalds2006-12-0713-156/+369
| |\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'for-linus' of git://one.firstfloor.org/home/andi/git/linux-2.6: (156 commits) [PATCH] x86-64: Export smp_call_function_single [PATCH] i386: Clean up smp_tune_scheduling() [PATCH] unwinder: move .eh_frame to RODATA [PATCH] unwinder: fully support linker generated .eh_frame_hdr section [PATCH] x86-64: don't use set_irq_regs() [PATCH] x86-64: check vector in setup_ioapic_dest to verify if need setup_IO_APIC_irq [PATCH] x86-64: Make ix86 default to HIGHMEM4G instead of NOHIGHMEM [PATCH] i386: replace kmalloc+memset with kzalloc [PATCH] x86-64: remove remaining pc98 code [PATCH] x86-64: remove unused variable [PATCH] x86-64: Fix constraints in atomic_add_return() [PATCH] x86-64: fix asm constraints in i386 atomic_add_return [PATCH] x86-64: Correct documentation for bzImage protocol v2.05 [PATCH] x86-64: replace kmalloc+memset with kzalloc in MTRR code [PATCH] x86-64: Fix numaq build error [PATCH] x86-64: include/asm-x86_64/cpufeature.h isn't a userspace header [PATCH] unwinder: Add debugging output to the Dwarf2 unwinder [PATCH] x86-64: Clarify error message in GART code [PATCH] x86-64: Fix interrupt race in idle callback (3rd try) [PATCH] x86-64: Remove unwind stack pointer alignment forcing again ... Fixed conflict in include/linux/uaccess.h manually Signed-off-by: Linus Torvalds <torvalds@osdl.org>
| | * [PATCH] i386: replace kmalloc+memset with kzallocBurman Yan2006-12-071-8/+3
| | | | | | | | | | | | | | | Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Andi Kleen <ak@suse.de>
| | * [PATCH] x86-64: replace kmalloc+memset with kzalloc in MTRR codeBurman Yan2006-12-072-6/+3
| | | | | | | | | | | | | | | | | | Cc: Andi Kleen <ak@suse.de> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Andi Kleen <ak@suse.de>
| | * [PATCH] i386: remove duplicate printkDave Jones2006-12-071-4/+1
| | | | | | | | | | | | | | | | | | | | | | | | We do the exact same printk about a dozen lines above with no intermediate printk's. Signed-off-by: Dave Jones <davej@redhat.com> Signed-off-by: Andi Kleen <ak@suse.de>
| | * [PATCH] i386: i386 add Intel BTS cpufeature bit and detection (take 2)Stephane Eranian2006-12-071-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Here is a small patch for i386 which adds a cpufeature flag and detection code for Intel's Branch Trace Store (BTS) feature. This feature can be found on Intel P4 and Core 2 processors among others. It can also be used by perfmon. changelog: - add CPU_FEATURE_BTS - add Branch Trace Store detection signed-off-by: stephane eranian <eranian@hpl.hp.com> Signed-off-by: Andi Kleen <ak@suse.de>
| | * [PATCH] i386: alloc_gdt() staticAdrian Bunk2006-12-071-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Make the needlessly global alloc_gdt() static. (against) pda-percpu-init Signed-off-by: Adrian Bunk <bunk@stusta.de> Signed-off-by: Andi Kleen <ak@suse.de> Cc: Andi Kleen <ak@muc.de> Cc: Jeremy Fitzhardinge <jeremy@goop.org> Signed-off-by: Andrew Morton <akpm@osdl.org>
| | * [PATCH] i386: fix MTRR codeJan Beulich2006-12-077-60/+162
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Until not so long ago, there were system log messages pointing to inconsistent MTRR setup of the video frame buffer caused by the way vesafb and X worked. While vesafb was fixed meanwhile, I believe fixing it there only hides a shortcoming in the MTRR code itself, in that that code is not symmetric with respect to the ordering of attempts to set up two (or more) regions where one contains the other. In the current shape, it permits only setting up sub-regions of pre-exisiting ones. The patch below makes this symmetric. While working on that I noticed a few more inconsistencies in that code, namely - use of 'unsigned int' for sizes in many, but not all places (the patch is converting this to use 'unsigned long' everywhere, which specifically might be necessary for x86-64 once a processor supporting more than 44 physical address bits would become available) - the code to correct inconsistent settings during secondary processor startup tried (if necessary) to correct, among other things, the value in IA32_MTRR_DEF_TYPE, however the newly computed value would never get used (i.e. stored in the respective MSR) - the generic range validation code checked that the end of the to-be-added range would be above 1MB; the value checked should have been the start of the range - when contained regions are detected, previously this was allowed only when the old region was uncacheable; this can be symmetric (i.e. the new region can also be uncacheable) and even further as per Intel's documentation write-trough and write-back for either region is also compatible with the respective opposite in the other Signed-off-by: Jan Beulich <jbeulich@novell.com> Signed-off-by: Andi Kleen <ak@suse.de>
| | * [PATCH] i386: conditionalize inclusion of some MTRR flavorsJan Beulich2006-12-072-3/+7
| | | | | | | | | | | | | | | | | | | | | Avoid inclusion of code that's dead for x86-64. Signed-off-by: Jan Beulich <jbeulich@novell.com> Signed-off-by: Andi Kleen <ak@suse.de>
| | * [PATCH] paravirt: Allow selected bug checks to beRusty Russell2006-12-071-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Allow selected bug checks to be skipped by paravirt kernels. The two most important are the F00F workaround (which is either done by the hypervisor, or not required), and the 'hlt' instruction check, which can break under some hypervisors. Signed-off-by: Zachary Amsden <zach@vmware.com> Signed-off-by: Chris Wright <chrisw@sous-sol.org> Signed-off-by: Andi Kleen <ak@suse.de> Cc: Rusty Russell <rusty@rustcorp.com.au> Cc: Jeremy Fitzhardinge <jeremy@goop.org> Signed-off-by: Andrew Morton <akpm@osdl.org>
| | * [PATCH] i386: cpu_detect extractionRusty Russell2006-12-071-16/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Both lhype and Xen want to call the core of the x86 cpu detect code before calling start_kernel. (extracted from larger patch) AK: folded in start_kernel header patch Signed-off-by: Jeremy Fitzhardinge <jeremy@xensource.com> Signed-off-by: Rusty Russell <rusty@rustcorp.com.au> Signed-off-by: Andi Kleen <ak@suse.de> Cc: Jeremy Fitzhardinge <jeremy@goop.org> Cc: Andi Kleen <ak@suse.de> Signed-off-by: Andrew Morton <akpm@osdl.org>
| | * [PATCH] i386: Retrieve CLFLUSH size from CPUIDAndi Kleen2006-12-072-1/+5
| | | | | | | | | | | | | | | | | | | | | | | | Also report it in /proc/cpuinfo similar to x86-64. Needed for followon patch Signed-off-by: Andi Kleen <ak@suse.de>
| | * [PATCH] i386: Implement "current" with the PDAJeremy Fitzhardinge2006-12-071-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use the pcurrent field in the PDA to implement the "current" macro. This ends up compiling down to a single instruction to get the current task. Signed-off-by: Jeremy Fitzhardinge <jeremy@xensource.com> Signed-off-by: Andi Kleen <ak@suse.de> Cc: Chuck Ebbert <76306.1226@compuserve.com> Cc: Zachary Amsden <zach@vmware.com> Cc: Jan Beulich <jbeulich@novell.com> Cc: Andi Kleen <ak@suse.de> Signed-off-by: Andrew Morton <akpm@osdl.org>
| | * [PATCH] i386: Implement smp_processor_id() with the PDAJeremy Fitzhardinge2006-12-071-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use the cpu_number in the PDA to implement raw_smp_processor_id. This is a little simpler than using thread_info, though the cpu field in thread_info cannot be removed since it is used for things other than getting the current CPU in common code. Signed-off-by: Jeremy Fitzhardinge <jeremy@xensource.com> Signed-off-by: Andi Kleen <ak@suse.de> Cc: Chuck Ebbert <76306.1226@compuserve.com> Cc: Zachary Amsden <zach@vmware.com> Cc: Jan Beulich <jbeulich@novell.com> Cc: Andi Kleen <ak@suse.de> Signed-off-by: Andrew Morton <akpm@osdl.org>
| | * [PATCH] i386: Use %gs as the PDA base-segment in the kernelJeremy Fitzhardinge2006-12-071-2/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch is the meat of the PDA change. This patch makes several related changes: 1: Most significantly, %gs is now used in the kernel. This means that on entry, the old value of %gs is saved away, and it is reloaded with __KERNEL_PDA. 2: entry.S constructs the stack in the shape of struct pt_regs, and this is passed around the kernel so that the process's saved register state can be accessed. Unfortunately struct pt_regs doesn't currently have space for %gs (or %fs). This patch extends pt_regs to add space for gs (no space is allocated for %fs, since it won't be used, and it would just complicate the code in entry.S to work around the space). 3: Because %gs is now saved on the stack like %ds, %es and the integer registers, there are a number of places where it no longer needs to be handled specially; namely context switch, and saving/restoring the register state in a signal context. 4: And since kernel threads run in kernel space and call normal kernel code, they need to be created with their %gs == __KERNEL_PDA. Signed-off-by: Jeremy Fitzhardinge <jeremy@xensource.com> Signed-off-by: Andi Kleen <ak@suse.de> Cc: Chuck Ebbert <76306.1226@compuserve.com> Cc: Zachary Amsden <zach@vmware.com> Cc: Jan Beulich <jbeulich@novell.com> Cc: Andi Kleen <ak@suse.de> Signed-off-by: Andrew Morton <akpm@osdl.org>
| | * [PATCH] i386: Initialize the per-CPU data areaJeremy Fitzhardinge2006-12-071-43/+134
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When a CPU is brought up, a PDA and GDT are allocated for it. The GDT's __KERNEL_PDA entry is pointed to the allocated PDA memory, so that all references using this segment descriptor will refer to the PDA. This patch rearranges CPU initialization a bit, so that the GDT/PDA are set up as early as possible in cpu_init(). Also for secondary CPUs, GDT+PDA are preallocated and initialized so all the secondary CPU needs to do is set up the ldt and load %gs. This will be important once smp_processor_id() and current use the PDA. In all cases, the PDA is set up in head.S, before a CPU starts running C code, so the PDA is always available. Signed-off-by: Jeremy Fitzhardinge <jeremy@xensource.com> Signed-off-by: Andi Kleen <ak@suse.de> Cc: Chuck Ebbert <76306.1226@compuserve.com> Cc: Zachary Amsden <zach@vmware.com> Cc: Jan Beulich <jbeulich@novell.com> Cc: Andi Kleen <ak@suse.de> Cc: James Bottomley <James.Bottomley@SteelEye.com> Cc: Matt Tolentino <matthew.e.tolentino@intel.com> Signed-off-by: Andrew Morton <akpm@osdl.org>
| | * [PATCH] i386: espfix cleanupStas Sergeev2006-12-071-11/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Clean up the espfix code: - Introduced PER_CPU() macro to be used from asm - Introduced GET_DESC_BASE() macro to be used from asm - Rewrote the fixup code in asm, as calling a C code with the altered %ss appeared to be unsafe - No longer altering the stack from a .fixup section - 16bit per-cpu stack is no longer used, instead the stack segment base is patched the way so that the high word of the kernel and user %esp are the same. - Added the limit-patching for the espfix segment. (Chuck Ebbert) [jeremy@goop.org: use the x86 scaling addressing mode rather than shifting] Signed-off-by: Stas Sergeev <stsp@aknet.ru> Signed-off-by: Andi Kleen <ak@suse.de> Acked-by: Zachary Amsden <zach@vmware.com> Acked-by: Chuck Ebbert <76306.1226@compuserve.com> Acked-by: Jan Beulich <jbeulich@novell.com> Cc: Andi Kleen <ak@muc.de> Signed-off-by: Jeremy Fitzhardinge <jeremy@goop.org> Signed-off-by: Andrew Morton <akpm@osdl.org>
| | * [PATCH] i386: i386 add X86_FEATURE_PEBS and detectionStephane Eranian2006-12-071-1/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Here is a patch (used by perfmon2) to detect the presence of the Precise Event Based Sampling (PEBS) feature for i386. The patch also adds the cpu_has_pebs macro. - adds X86_FEATURE_PEBS - adds cpu_has_pebs to test for X86_FEATURE_PEBS Signed-off-by: stephane eranian <eranian@hpl.hp.com> Signed-off-by: Andi Kleen <ak@suse.de> Cc: Andi Kleen <ak@suse.de> Signed-off-by: Andrew Morton <akpm@osdl.org>
| | * [PATCH] i386: fix buggy MTRR address checksAndreas Mohr2006-12-072-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix checks that failed to realize that values are 4-kB-unit-sized (note the format strings in this same diff context which *do* realize the unit size, via appended "000"!). Also fix an incorrect below-1MB area check (as gathered from Jan Beulich's unapplied patch at http://www.ussg.iu.edu/hypermail/linux/kernel/0411.1/1378.html ) Update mtrr_add_page() docu to make 4-kB-sized calculation more obvious. Given several further items mentioned in Jan's patch mail, all in all MTRR code seems surprisingly buggy, for a surprisingly long period of time (many years). Further work/investigation would be useful. TBD Note that my patch is pretty much UNTESTED, since I can only verify that it TBD successfully boots my machine, but I cannot test against actual buggy TBD hardware which would require these (formerly broken) checks. Long -mm TBD simmering would make sense, especially since these now-working checks might TBD turn out to have adverse effects on unaffected hardware. Signed-off-by: Andreas Mohr <andi@lisas.de> Signed-off-by: Andi Kleen <ak@suse.de> Acked-by: Jan Beulich <jbeulich@novell.com> Cc: Andi Kleen <ak@muc.de> Signed-off-by: Andrew Morton <akpm@osdl.org>
| * | [PATCH] hotplug CPU: clean up hotcpu_notifier() useIngo Molnar2006-12-071-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There was lots of #ifdef noise in the kernel due to hotcpu_notifier(fn, prio) not correctly marking 'fn' as used in the !HOTPLUG_CPU case, and thus generating compiler warnings of unused symbols, hence forcing people to add #ifdefs. the compiler can skip truly unused functions just fine: text data bss dec hex filename 1624412 728710 3674856 6027978 5bfaca vmlinux.before 1624412 728710 3674856 6027978 5bfaca vmlinux.after [akpm@osdl.org: topology.c fix] Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
| * | Merge branch 'master' of ↵David Howells2006-12-051-0/+1
| |\| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6 Conflicts: drivers/ata/libata-scsi.c include/linux/libata.h Futher merge of Linus's head and compilation fixups. Signed-Off-By: David Howells <dhowells@redhat.com>
| | * [PATCH] severing module.h->sched.hAl Viro2006-12-041-0/+1
| | | | | | | | | | | | Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
| * | WorkStruct: make allyesconfigDavid Howells2006-11-221-3/+3
| |/ | | | | | | | | | | Fix up for make allyesconfig. Signed-Off-By: David Howells <dhowells@redhat.com>
* | [CPUFREQ] Longhaul - Add support for CN400Rafał Bilski2006-12-121-1/+5
| | | | | | | | | | | | | | | | Support for CN400 northbridge when ACPI C3 isn't available. Tested on Epia SP13000. Thanks to Robert for testing it. Signed-off-by: Rafał Bilski <rafalbilski@interia.pl> Signed-off-by: Dave Jones <davej@redhat.com>
* | [CPUFREQ] Longhaul - fix 200MHz FSBRafał Bilski2006-12-121-1/+1
| | | | | | | | | | | | | | | | On board of Epia SP13000 is 10x133Mhz VIA Nehemiah. It is reported as 10x200MHz. This patch is fixing this issue. Signed-off-by: Rafał Bilski <rafalbilski@interia.pl> Signed-off-by: Dave Jones <davej@redhat.com>
* | [CPUFREQ] p4-clockmod: fix support for CoreDominik Brodowski2006-12-121-10/+7
| | | | | | | | | | | | | | | | | | | | Support for Core CPUs was broken in two ways in speedstep-lib: for x86_64, we missed a MSR definition; for both x86_64 and i386, the FSB calculation was wrong by four (it's a quad-pumped bus). Also increase the accuracy of the calculation. Signed-off-by: Dominik Brodowski <linux@dominikbrodowski.net> Signed-off-by: Dave Jones <davej@redhat.com>
* | [CPUFREQ] Fix the bug in duplicate freq elimination code in acpi-cpufreqVenkatesh Pallipadi2006-12-121-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | Fix the bug in duplicate states elimination in acpi-cpufreq. Bug: Due to duplicate state elimiation in the loop earlier, the number of valid_states can be less than perf->state_count, in which case freq_table was ending up with some garbage/uninitialized entries in the table. Signed-off-by: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com> From: Alexey Starikovskiy <alexey.y.starikovskiy@intel.com> Signed-off-by: Dave Jones <davej@redhat.com>
* | [CPUFREQ] speedstep-centrino should ignore upper performance control bitsGary Hade2006-12-121-3/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | On some systems there could be bits set in the upper half of the control value provided by the _PSS object. These bits are only relevant for cpufreq drivers that use IO ports which are not currently supported by the speedstep-centrino driver. The current MSR oriented code assumes that upper bits are not set and thus fails to work correctly when they are. e.g. the control and status value equality check failed on the IBM x3650 even though the ACPI spec allows inequality. Signed-off-by: Gary Hade <garyhade@us.ibm.com> Signed-off-by: Dave Jones <davej@redhat.com>
* | [CPUFREQ] Optimize gx-suspmod revision ID fetchingJean Delvare2006-12-121-3/+1
| | | | | | | | | | | | | | We don't need a temporary variable to get the PCI revision ID. Signed-off-by: Jean Delvare <khali@linux-fr.org> Signed-off-by: Dave Jones <davej@redhat.com>
* | Revert "[CPUFREQ] speedstep-centrino should ignore upper performance control ↵Dave Jones2006-11-081-4/+0
| | | | | | | | | | | | bits" This reverts commit d7a1944e8da5e91859b98259189aaaa4d8b7fa07.
* | [CPUFREQ] gx-suspmod: fix "&& 0xff" typoAlexey Dobriyan2006-11-081-1/+1
| | | | | | | | | | Signed-off-by: Alexey Dobriyan <adobriyan@gmail.com> Signed-off-by: Dave Jones <davej@redhat.com>
* | [CPUFREQ] Fix build failure on x86-64akpm@osdl.org2006-11-081-1/+4
| | | | | | | | | | | | | | arch/x86_64/kernel/cpufreq/../../../i386/kernel/cpu/cpufreq/speedstep-lib.c:131: error: 'MSR_FSB_FREQ' undeclared (first use in this function) Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Dave Jones <davej@redhat.com>
* | [CPUFREQ] speedstep-centrino should ignore upper performance control bitsGary Hade2006-11-081-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | On some systems such as the IBM x3650 there are bits set in the upper half of the control values provided by the _PSS object. These bits are only relevant for cpufreq drivers that use IO ports which are not currently supported by the speedstep-centrino driver. The current MSR oriented code assumes that upper bits are not set and thus fails to work correctly when they are. e.g. the control and status value equality check fails even though the ACPI spec allows the inequality. Signed-off-by: Gary Hade <garyh@us.ibm.com> Signed-off-by: Dave Jones <davej@redhat.com>
* | [CPUFREQ] p4-clockmod: add more CPUsDominik Brodowski2006-11-063-20/+51
| | | | | | | | | | | | | | | | | | Several more Intel CPUs are now capable using the p4-clockmod cpufreq driver. As it is of limited use most of the time, print a big bold warning if a better cpufreq driver might be available. Signed-off-by: Dominik Brodowski <linux@dominikbrodowski.net> Signed-off-by: Dave Jones <davej@redhat.com>
* | [CPUFREQ] ifdef more unused on !SMP code.Dave Jones2006-10-212-1/+3
| | | | | | | | | | | | | | | | acpi-cpufreq needs the same patch as the previous speedstep-centrino change. Additionally, the centrino driver can have its ifdef moved out a little further to eliminate some more code/variables. Signed-off-by: Dave Jones <davej@redhat.com>
* | [CPUFREQ] speedstep-centrino: remove dead codeAndrew Morton2006-10-211-2/+2
| | | | | | | | | | | | | | arch/i386/kernel/cpu/cpufreq/speedstep-centrino.c:396: warning: 'sw_any_bug_dmi_table' defined but not used Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Dave Jones <davej@redhat.com>
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