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* sched: remove printk_clock references from ia64Ingo Molnar2008-01-252-15/+0
| | | | | | remove remaining printk_clock references from ia64. Signed-off-by: Ingo Molnar <mingo@elte.hu>
* sched: remove printk_clock()Ingo Molnar2008-01-251-27/+0
| | | | | | printk_clock() is obsolete - it has been replaced with cpu_clock(). Signed-off-by: Ingo Molnar <mingo@elte.hu>
* Kobject: convert arch/* from kobject_unregister() to kobject_put()Greg Kroah-Hartman2008-01-241-5/+4
| | | | | | | | | | | There is no need for kobject_unregister() anymore, thanks to Kay's kobject cleanup changes, so replace all instances of it with kobject_put(). Cc: Kay Sievers <kay.sievers@vrfy.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* Kobject: change arch/ia64/kernel/topology.c to use kobject_init_and_addGreg Kroah-Hartman2008-01-241-8/+9
| | | | | | | | | | Stop using kobject_register, as this way we can control the sending of the uevent properly, after everything is properly initialized. Cc: Tony Luck <tony.luck@intel.com> Cc: Kay Sievers <kay.sievers@vrfy.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* [IA64] Fix unaligned handler for floating point instructions with base updateLuck, Tony2008-01-151-4/+7
| | | | | | | | | | | | | | | | | | | | | | The compiler team did the hard work for this distilling a problem in large fortran application which showed up when applied to a 290MB input data set down to this instruction: ldfd f34=[r17],-8 Which they noticed incremented r17 by 0x10 rather than decrementing it by 8 when the value in r17 caused an unaligned data fault. I tracked it down to some bad instruction decoding in unaligned.c. The code assumes that the 'x' bit can determine whether the instruction is an "ldf" or "ldfp" ... which it is for opcode=6 (see table 4-29 on page 3:302 of the SDM). But for opcode=7 the 'x' bit is irrelevent, all variants are "ldf" instructions (see table 4-36 on page 3:306). Note also that interpreting the instruction as "ldfp" means that the "paired" floating point register (f35 in the example here) will also be corrupted. Signed-off-by: Tony Luck <tony.luck@intel.com>
* [IA64] Update Altix nofault codeRuss Anderson2008-01-031-3/+7
| | | | | | | | | | | Montecito and Montvale behaves slightly differently than previous Itanium processors, resulting in the MCA due to a failed PIO read to sometimes surfacing outside the nofault code. This code is based on discussions with Intel CPU architects and verified at customer sites. Signed-off-by: Russ Anderson <rja@sgi.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
* [IA64] Adjust CMCI mask on CPU hotplugHidetoshi Seto2007-12-191-0/+33
| | | | | | | | | Currently CMCI mask of hot-added CPU is always disabled after CPU hotplug. We should adjust this mask depending on CMC polling state. Signed-off-by: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com> Signed-off-by: Satoru Takeuchi <takeuchi_satoru@jp.fujitsu.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
* [IA64] make flush_tlb_kernel_range() an inline functionJan Beulich2007-12-191-1/+1
| | | | | | | | | | This fixes an unused variable warning in mm/vmalloc.c. Tony: also fix resulting fallout in uncached.c with a typo in args to flush_tlb_kernel_range(). Signed-off-by: Jan Beulich <jbeulich@novell.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
* [IA64] Guard elfcorehdr_addr with #if CONFIG_PROC_FSSimon Horman2007-12-191-1/+2
| | | | | | | | | | | | | | Access to elfcorehdr_addr needs to be guarded by #if CONFIG_PROC_FS as well as the existing #if guards. Fixes the following build problem: arch/ia64/hp/common/built-in.o: In function `sba_init':arch/ia64/hp/common/sba_iommu.c:2043: undefined reference to `elfcorehdr_addr' :arch/ia64/hp/common/sba_iommu.c:2043: undefined reference to `elfcorehdr_addr' Signed-off-by: Simon Horman <horms@verge.net.au> Signed-off-by: Tony Luck <tony.luck@intel.com>
* [IA64] Fix Altix BTE error return statusRuss Anderson2007-12-192-4/+8
| | | | | | | | | | | | | The Altix shub2 BTE error detail bits are in a different location than on shub1. The current code does not take this into account resulting in all shub2 BTE failures mapping to "unknown". This patch reads the error detail bits from the proper location, so the correct BTE failure reason is returned for both shub1 and shub2. Signed-off-by: Russ Anderson <rja@sgi.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
* [IA64] Remove assembler warnings on head.SHidetoshi Seto2007-12-191-0/+1
| | | | | | | | | | | | | | | | | | | | This patch removes the following assembler warning messages. AS arch/ia64/kernel/head.o arch/ia64/kernel/head.S: Assembler messages: arch/ia64/kernel/head.S:1179: Warning: Use of 'ld8' violates RAW dependency 'CR[PTA]' (data) arch/ia64/kernel/head.S:1179: Warning: Only the first path encountering the conflict is reported arch/ia64/kernel/head.S:1178: Warning: This is the location of the conflicting usage arch/ia64/kernel/head.S:1180: Warning: Use of 'ld8' violates RAW dependency 'CR[PTA]' (data) arch/ia64/kernel/head.S:1180: Warning: Only the first path encountering the conflict is reported arch/ia64/kernel/head.S:1178: Warning: This is the location of the conflicting usage : arch/ia64/kernel/head.S:1213: Warning: Use of 'ldf.fill.nta' violates RAW dependency 'CR[PTA]' (data) arch/ia64/kernel/head.S:1213: Warning: Only the first path encountering the conflict is reported arch/ia64/kernel/head.S:1178: Warning: This is the location of the conflicting usage Signed-off-by: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
* [IA64] Remove compiler warinings about uninitialized variable in irq_ia64.cKenji Kaneshige2007-12-191-2/+2
| | | | | | | | | | | | | This patch removes the following compiler warning messages. CC arch/ia64/kernel/irq_ia64.o arch/ia64/kernel/irq_ia64.c: In function 'create_irq': arch/ia64/kernel/irq_ia64.c:343: warning: 'domain.bits[0u]' may be used uninitialized in this function arch/ia64/kernel/irq_ia64.c: In function 'assign_irq_vector': arch/ia64/kernel/irq_ia64.c:203: warning: 'domain.bits[0u]' may be used uninitialized in this function Signed-off-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
* [IA64] set_thread_area fails in IA32 chrootIan Wienand2007-12-191-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | I tried to upgrade an IA32 chroot on my IA64 to a new glibc with TLS. It kept dying because set_thread_area was returning -ESRCH (bugs.debian.org/451939). I instrumented arch/ia64/ia32/sys_ia32.c:get_free_idx() and ended up seeing output like [pid] idx desc->a desc->b ----------------------------- [2710] 0 -> c6b0ffff 40dff31b [2710] 1 -> 0 0 [2710] 2 -> 0 0 [2710] 0 -> c6b0ffff 40dff31b [2710] 1 -> c6b0ffff 40dff31b [2710] 2 -> 0 0 [2711] 0 -> c6b0ffff 40dff31b [2711] 1 -> c6b0ffff 40dff31b [2711] 2 -> 48c0ffff 40dff317 which suggested to me that TLS pointers were surviving exec() calls, leading to GDT pointers filling up and the eventual failure of get_free_idx(). I think the solution is flushing the tls array on exec. Signed-Off-By: Ian Wienand <ianw@gelato.unsw.edu.au> Signed-off-by: Tony Luck <tony.luck@intel.com>
* [IA64] print kernel release in OOPS to make kerneloops.org happyLuck, Tony2007-12-181-2/+4
| | | | | | | | The ia64 oops message doesn't include the kernel version, which makes it hard to automatically categorize oops messages scraped from mailing lists and bug databases. Signed-off-by: Tony Luck <tony.luck@intel.com>
* [IA64] Two trivial spelling fixesJoe Perches2007-12-181-1/+1
| | | | | | | | s/addres/address/ s/performanc/performance/ Signed-off-by: Joe Perches <joe@perches.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
* [IA64] Avoid unnecessary TLB flushes when allocating memoryde Dinechin, Christophe (Integrity VM)2007-12-181-3/+15
| | | | | | | | | | | | | | | | | | | Improve performance of memory allocations on ia64 by avoiding a global TLB purge to purge a single page from the file cache. This happens whenever we evict a page from the buffer cache to make room for some other allocation. Test case: Run 'find /usr -type f | xargs cat > /dev/null' in the background to fill the buffer cache, then run something that uses memory, e.g. 'gmake -j50 install'. Instrumentation showed that the number of global TLB purges went from a few millions down to about 170 over a 12 hours run of the above. The performance impact is particularly noticeable under virtualization, because a virtual TLB is generally both larger and slower to purge than a physical one. Signed-off-by: Christophe de Dinechin <ddd@hp.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
* [IA64] ia32 nopageNick Piggin2007-12-181-16/+12
| | | | | | | | Convert ia64's ia32 support from nopage to fault. Signed-off-by: Nick Piggin <npiggin@suse.de> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Tony Luck <tony.luck@intel.com>
* [IA64] signal: remove redundant code in setup_sigcontext()Shi Weihua2007-12-181-9/+1
| | | | | | | | | | | | This patch removes some redundant code in the function setup_sigcontext(). The registers ar.ccv,b7,r14,ar.csd,ar.ssd,r2-r3 and r16-r31 are not restored in restore_sigcontext() when (flags & IA64_SC_FLAG_IN_SYSCALL) is true. So we don't need to zero those variables in setup_sigcontext(). Signed-off-by: Shi Weihua <shiwh@cn.fujitsu.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Tony Luck <tony.luck@intel.com>
* [IA64] Fix iosapic interrupt delivery mode for CPEKenji Kaneshige2007-12-071-1/+1
| | | | | | | | | | If "CPEI Processor Override" bit is not set in "Platform Interrupt Source Flags" in "Platform Interrupt Sources Structure" in ACPI MADT, the target processor of CPEI is restricted to a specific CPU. Because of this, the delivery mode for CPEI should be IOSAPIC_FIXED. Signed-off-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
* [IA64] kprobe: make kreturn probe handler stack unwind correctShaohua Li2007-12-071-2/+17
| | | | | | | | | | Restore regs->ccr_iip before kreturn probe handler runs. In this way, if probe handler does unwind, unwind can correctly get the stack trace. Fixes: http://sourceware.org/bugzilla/show_bug.cgi?id=5051 Signed-off-by: Shaohua Li <shaohua.li@intel.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
* [IA64] operator priority fix in acpi_map_lsapic()Roel Kluin2007-12-071-1/+1
| | | | | | | | | | '!' has a higher priority than '&', so as was this won't test the first bit, but rather evaluates to false for any non-zero lsapic->lapic_flags. Signed-off-by: Roel Kluin <12o3l@tiscali.nl> Acked-by: Simon Horman <horms@verge.net.au> Signed-off-by: Tony Luck <tony.luck@intel.com>
* [IA64] Add missing "space" to concatenated stringsJoe Perches2007-12-073-7/+7
| | | | | Signed-off-by: Joe Perches <joe@perches.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
* [IA64] make full use of macro efi_md_sizeLi Zefan2007-12-071-5/+5
| | | | | | | | | | Macro efi_md_size is defined in efi.c, and here we apply it throughout efi.c. Signed-off-by: Li Zefan <lizf@cn.fujitsu.com> Acked-by: Simon Horman <horms@verge.net.au> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Tony Luck <tony.luck@intel.com>
* [IA64] rename _bss to __bss_startBernhard Walle2007-12-073-4/+5
| | | | | | | | | | | Rename _bss to __bss_start as on other architectures. That makes it possible to use the <linux/sections.h> instead of own declarations. Also add __bss_stop because that symbol exists on other architectures. Signed-off-by: Bernhard Walle <bwalle@suse.de> Cc: "Luck, Tony" <tony.luck@intel.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Tony Luck <tony.luck@intel.com>
* [IA64] SGI Altix : fix bug in sn_io_late_init()Mike Habeck2007-12-071-6/+5
| | | | | | | | | When initializing pci_controller->node to point to the closest node we need to take into consideration that a PIC PCI Bridge ASIC can be connected to a headless/memless node just like the TIOCP and TIOCE Bridge ASICs Signed-off-by: Mike Habeck <habeck@sgi.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
* [IA64] iosapic cleanupSimon Horman2007-12-071-16/+3
| | | | | | | Make some IOSAPIC functions static and remove one that is unused. Signed-off-by: Simon Horman <horms@verge.net.au> Signed-off-by: Tony Luck <tony.luck@intel.com>
* [IA64] signal : fix missing error checkingsShi Weihua2007-12-071-4/+4
| | | | | | | | Not all the return value of __copy_from_user and __put_user is checked.This patch fixed it. Signed-off-by: Shi Weihua <shiwh@cn.fujitsu.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
* [IA64] export copy_page() to modulesAndrew Morton2007-12-073-3/+6
| | | | | | | | | | | | | | | | | With the unionfs patch applied I get ERROR: "copy_page" [fs/unionfs/unionfs.ko] undefined! the other architectures (some, at least) export copy_page() so I guess ia64 should also do so. To do this we need to move the copy_page() functions out of lib.a and into built-in.o and add the EXPORT_SYMBOL(). Cc: Sam Ravnborg <sam@ravnborg.org> Cc: Kyle McMartin <kyle@mcmartin.ca> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Tony Luck <tony.luck@intel.com>
* [IA64] don't assume that unwcheck.py is executableAndrew Morton2007-12-072-1/+1
| | | | | | | | Don't assume that this file has execute permissions. For example, patch(1) loses that information. Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Tony Luck <tony.luck@intel.com>
* [IA64] increase .data.patch offsetAndrew Morton2007-12-071-1/+1
| | | | | | | | | | | | /opt/crosstool/gcc-3.4.5-glibc-2.3.6/ia64-unknown-linux-gnu/lib/gcc/ia64-unknown-linux-gnu/3.4.5/../../../../ia64-unknown-linux-gnu/bin/ld: section .data.patch [a000000000000500 -> a000000000000507] overlaps section .dynamic [a0000000000003c8 -> a000000000000507] This only appears to be a problem with strangely configured cross-compilation ... native compilers don't have this issue. But in the interests of helping others at least compile for ia64, this can go in. -Tony Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Tony Luck <tony.luck@intel.com>
* Add IORESOUCE_BUSY flag for System RAMYasunori Goto2007-11-141-4/+2
| | | | | | | | | | | | | | | | | | | | | i386 and x86-64 registers System RAM as IORESOURCE_MEM | IORESOURCE_BUSY. But ia64 registers it as IORESOURCE_MEM only. In addition, memory hotplug code registers new memory as IORESOURCE_MEM too. This difference causes a failure of memory unplug of x86-64. This patch fixes it. This patch adds IORESOURCE_BUSY to avoid potential overlap mapping by PCI device. Signed-off-by: Yasunori Goto <y-goto@jp.fujitsu.com> Signed-off-by: Badari Pulavarty <pbadari@us.ibm.com> Cc: Luck, Tony" <tony.luck@intel.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Ingo Molnar <mingo@elte.hu> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* [IA64] IOSAPIC bogus error cleanupGeorge Beshers2007-11-091-3/+5
| | | | | | | | | | | On Altix (sn2) machines the "Error parsing MADT" message is misleading because the lack of IOSAPIC entries is expected. Since I am sure someone will ask, I have been told that the chance of this changing anytime soon is close to nil. Signed-off-by: George Beshers <gbeshers@sgi.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
* [IA64] Update printing of feature set bitsRuss Anderson2007-11-091-12/+79
| | | | | | | | | | | Newer Itanium versions have added additional processor feature set bits. This patch prints all the implemented feature set bits. Some bit descriptions have not been made public. For those bits, a generic "Feature set X bit Y" message is printed. Bits that are not implemented will no longer be printed. Signed-off-by: Russ Anderson <rja@sgi.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
* [IA64] Fix IOSAPIC delivery mode settingKenji Kaneshige2007-11-091-3/+15
| | | | | | | | | Fix the problem that redirect hit bit in I/O SAPIC RTE is set even when it must be disabled (e.g. nointroute boot option is set, CPU hotplug is enabled or percpu vector is enabled). Signed-off-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
* [IA64] XPC heartbeat timer function must run on CPU 0Dean Nelson2007-11-091-9/+3
| | | | | | | | | | | | Currently, XPC's heartbeat timer function runs on whatever CPU modprobe/insmod ran on when XPC was started. To avoid the heartbeat from being delayed for long periods the timer function must run on CPU 0. N.B. Altix doesn't currently allow cpu0 to be taken offline, so this is safe for now. This code must be revised when offline of cpu0 is enabled. Signed-off-by: Dean Nelson <dcn@sgi.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
* [IA64] Clean up /proc/interrupts outputKenji Kaneshige2007-11-061-2/+4
| | | | | | | | Clean up /proc/interrupts output on the system that has 10 or more CPUs. Signed-off-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
* [IA64] Disable/re-enable CPE interrupts on AltixRuss Anderson2007-11-062-2/+8
| | | | | | | | | | | | When the CPE handler encounters too many CPEs (such as a solid single bit memory error), it sets up a polling timer and disables the CPE interrupt (to avoid excessive overhead logging the stream of single bit errors). disable_irq_nosync() calls chip->disable() to provide a chipset specifiec interface for disabling the interrupt. This patch adds the Altix specific support to disable and re-enable the CPE interrupt. Signed-off-by: Russ Anderson (rja@sgi.com) Signed-off-by: Tony Luck <tony.luck@intel.com>
* [IA64] Clean-up McKinley Errata messageRuss Anderson2007-11-061-3/+0
| | | | | | | | No need to print "McKinley Errata 9 workaround not needed; disabling it" on every non-McKinley Itanium, which at this point is almost all of them. Signed-off-by: Russ Anderson (rja@sgi.com) Signed-off-by: Tony Luck <tony.luck@intel.com>
* [IA64] Add gate.lds to list of files ignored by GitPeter Chubb2007-11-061-0/+1
| | | | | | | | | | | If you build the kernel `in-place' then do a git update, git complains about arch/ia64/kernel/gate.lds being modified and untracked. Add that (generated) file to a .gitignore file. Signed-off-by: Peter Chubb <peterc@gelato.unsw.edu.au> Signed-off-by: Tony Luck <tony.luck@intel.com>
* [IA64] Fix section mismatch in contig.c version of per_cpu_init()Tony Luck2007-11-061-33/+41
| | | | | | | | | | | | | | | | | | | | | There is a section mismatch when building CONFIG_FLATMEM=y kernels that also have CONFIG_HOTPLUG_CPU=y WARNING: vmlinux.o(.text+0x5a902): Section mismatch: reference to \ .init.text:__alloc_bootmem (between 'per_cpu_init' and 'count_pages') The issue occurs because per_cpu_init() in mm/contig.c is marked __cpuinit (which is #define'd to nothing on a hot plug cpu configuration) call __alloc_bootmem() (which is an __init function). The usage is actually safe because the __alloc_bootmem() is inside an "if (first_time)" test so that the call is only made while it is still legal to do so. But the warning is irritating. Move the allocation to find_memory(). Signed-off-by: Tony Luck <tony.luck@intel.com>
* [IA64] Wrong args to memset in efi_gettimeofday()Li Zefan2007-11-061-2/+3
| | | | | | | | | | Not sizeof(ptr) ... we meant to say sizeof(*ptr). Also moved the memset to the error path (the normal path overwrites every field in the structure anyway) -Tony Signed-off-by: Li Zefan <lizf@cn.fujitsu.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
* [IA64] Remove duplicate includes from ia32priv.hLucas Woods2007-11-061-1/+0
| | | | | | | Don't need asm/processor.h twice Signed-off-by: Lucas Woods <woodzy@gmail.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
* [IA64] fix number of bytes zeroed by sys_fw_init() in ↵Roel Kluin2007-11-061-1/+1
| | | | | | | | | | | arch/ia64/hp/sim/boot/fw-emu.c The sizeof a pointer is constant, we want the sizeof what is pointed to. Zero out 'sizeof(*efi_systab)' bytes of the efi_system_table_t pointer 'efi_systab' instead. Signed-off-by: Roel Kluin <12o3l@tiscali.nl> Signed-off-by: Tony Luck <tony.luck@intel.com>
* [IA64] Fix perfmon sysctl directory modesTony Luck2007-11-061-2/+2
| | | | | | | | | | New sanity checks in sysctl_check_table() complain about a couple of mode 0755 that should be 0555 in the perfmon code: sysctl table check failed: /kernel .1 Writable sysctl directory sysctl table check failed: /kernel/perfmon Writable sysctl directory Signed-off-by: Tony Luck <tony.luck@intel.com>
* [IA64] Fix incorrect return value from ia64_setup_msi_irq()Kenji Kaneshige2007-10-301-1/+1
| | | | | | | | | Fix the problem that pci_enable_msi() fails on ia64 platform. The cause of this problem is incorrect return value of ia64_setup_msi_irq(). It must return 0 on success, instead of irq number. Signed-off-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
* [IA64] arch/ia64/sn/kernel/mca.c: undo lock when sn_oemdata can't be extendedRoel Kluin2007-10-291-0/+1
| | | | | | | | | | Clean up locking state in failure path. Signed-off-by: Roel Kluin <12o3l@tiscali.nl> Cc: Jes Sorensen <jes@trained-monkey.org> Cc: "Luck, Tony" <tony.luck@intel.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Tony Luck <tony.luck@intel.com>
* [IA64] update sn2 defconfig to 64kb pagesJes Sorensen2007-10-291-52/+54
| | | | | | | | Update sn2_defconfig to select 64KB page size, as well as include new config options. Signed-off-by: Jes Sorensen <jes@sgi.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
* [IA64] /proc/cpuinfo "physical id" field cleanupsAlex Chiang2007-10-292-48/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Clean up the process for presenting the "physical id" field in /proc/cpuinfo. - remove global smp_num_cpucores, as it is mostly useless - remove check_for_logical_procs(), since we do the same functionality in identify_siblings() - reflow logic in identify_siblings(). If an older CPU does not implement PAL_LOGICAL_TO_PHYSICAL, we may still be able to get useful information from SAL_PHYSICAL_ID_INFO - in identify_siblings(), threads/cores are a property of the CPU, not the platform - remove useless printk's about multi-core / thread capability in identify_siblings(), as that information is readily available in /proc/cpuinfo, and printing for the BSP only adds little value - smp_num_siblings is now meaningful if any CPU in the system supports threads, not just the BSP - expose "physical id" field, even on CPUs that are not multi-core / multi-threaded (as long as we have a valid value). Now we know what sockets Madisons live in too. Signed-off-by: Alex Chiang <achiang@hp.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
* [IA64] vDSO vs --build-idRoland McGrath2007-10-291-0/+3
| | | | | | | | When gcc uses --build-id by default, the gate.lds.S linker script runs afoul of the new note section and produces a bad DSO image. This fixes it. Signed-off-by: Roland McGrath <roland@redhat.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
* [IA64] check-segrel.lds vs --build-idRoland McGrath2007-10-291-0/+1
| | | | | | | | | Some versions of ld with --build-id support will crash when using the flag with a linker script that discards notes. This bites ia64's check-segrel.lds. The bug is easy to avoid. Signed-off-by: Roland McGrath <roland@redhat.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-16 13:08:04 +0000