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* m68knommu: set multi-function pins for ethernet when enabledGreg Ungerer2009-09-161-0/+15
| | | | | | | | | | The ethernet pins on the 532x ColdFire CPU family are multi-function pins. We need to enable them as ethernet pins when using the FEC ethernet driver. Bug report, and older patch, from timothee@manaud.net. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* m68knommu: remove ColdFire direct interrupt register accessGreg Ungerer2009-09-161-57/+8
| | | | | | | | Now that the ColdFire 5272 has full interrupt controller functionality we can remove all the interrupt masking and acking code from the FEC ethernet driver. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* m68knommu: create a speciailized ColdFire 5272 interrupt controllerGreg Ungerer2009-09-163-2/+140
| | | | | | | | The ColdFire 5272 CPU has a very different interrupt controller than any of the other ColdFire parts. It needs its own controller code to correctly setup and ack interrupts. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* m68knommu: add support for second interrupt controller of ColdFire 5249Greg Ungerer2009-09-162-1/+60
| | | | | | | | | The ColdFire 5249 CPU has a second (compleletly different) interrupt controller. It is the only ColdFire CPU that has this type. It controlls GPIO interrupts amongst a number of interrupts from other internal peripherals. Add support code for it. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* m68knommu: clean up old ColdFire timer irq setupGreg Ungerer2009-09-161-7/+2
| | | | | | | | The recent changes to the old ColdFire interrupt controller code means we no longer need to manually unmask the timer interrupt. That is now done in the interrupt controller code proper. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* m68knommu: map ColdFire interrupts to correct masking bitsGreg Ungerer2009-09-166-33/+74
| | | | | | | | | The older simple ColdFire interrupt controller has no one-to-one mapping of interrupt numbers to bits in the interrupt mask register. Create a mapping array that each ColdFire CPU type can populate with its available interrupts and the bits that each use in the interrupt mask register. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* m68knommu: clean up ColdFire 532x CPU timer setupGreg Ungerer2009-09-161-16/+1
| | | | | | | | | The newer ColdFire 532x family of CPU's uses the old timer, but has a newer interrupt controller. It doesn't need the special timer setup that was required when using the older interrupt controller. Remove the dead timer irq and level setting code, and define the hard coded vector. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* m68knommu: simplify ColdFire "timers" clock initializationGreg Ungerer2009-09-167-121/+68
| | | | | | | | | The ColdFire "timers" clock setup can be simplified. There is really no need for the flexible per-platform setup code. The clock interrupt can be hard defined per CPU platform (in CPU include files). This makes the actual timer code simpler. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* m68knommu: support code to mask external interrupts on old ColdFire CPU'sGreg Ungerer2009-09-161-0/+4
| | | | | | | | The external interrupts used on the old Coldfire parts with the old style interrupt controller can be properly mask/unmasked in the interrupt handling code. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* m68knommu: merge old ColdFire interrupt controller masking macrosGreg Ungerer2009-09-166-34/+83
| | | | | | | | | | Currently the code that supports setting the old style ColdFire interrupt controller mask registers is macros in the include files of each of the CPU types. Merge all these into a set of real masking functions in the old Coldfire interrupt controller code proper. All the macros are basically the same (excepting a register size difference on really early parts). Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* m68knommu: remove duplicate ColdFire mcf_autovector() codeGreg Ungerer2009-09-167-83/+27
| | | | | | | | | Each of the ColdFire CPU platform code that used the old style interrupt controller had its own copy of the mcf_autovector() function. They are all the same, remove them all and create a single function in the common coldfire/intc.c code. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* m68knommu: mask off all interrupts in ColdFire intc-simr controllerGreg Ungerer2009-09-161-0/+5
| | | | | | | | The ColdFire intc-simr interrupt controller should mask off all interrupt sources at init time. Doing it here instead of separately in each platform setup. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* m68knommu: remove timer device interrupt setup for ColdFire 532xGreg Ungerer2009-09-161-14/+0
| | | | | | | | With fully implemented interrupt controller code we don't need to do the custom interrupt setup for the timer device of the ColdFire 532x. Remove that code. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* m68knommu: remove interrupt masking from ColdFire pit timerGreg Ungerer2009-09-161-8/+0
| | | | | | | | With proper interrupt controller code in place there is no need for devices like the timers to have custom interrupt masking code. Remove it (and the defines that go along with it). Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* m68knommu: remove unecessary interrupt level setting in ColdFire 520x setupGreg Ungerer2009-09-161-9/+0
| | | | | | | | | The new code for the interrupt controller in the ColdFire 520x takes care of all the interrupt controller setup. No manual config of the level registers (ICR) is required by the platform device setup code. So remove it. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* m68knommu: complete interrupt controller code for the 68360 CPUGreg Ungerer2009-09-161-15/+29
| | | | | | | | Define the interrupt controller structures along with the interrupt controller code for the 68360 CPU. This brings the interrupt setup and control into one place for this CPU family. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* m68knommu: complete interrupt controller code for the 68328 CPU'sGreg Ungerer2009-09-161-32/+40
| | | | | | | | Define the interrupt controller structures along with the interrupt controller code for the 68328 CPU family. This brings the interrupt setup and control into one place for this CPU family. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* m68knommu: use common interrupt controller code for older ColdFire CPU'sGreg Ungerer2009-09-163-25/+62
| | | | | | | | | The old ColdFire CPU's (5206, 5307, 5407, 5249 etc) use a simple interrupt controller. Use common setup code for them. This addition means that all ColdFire CPU's now have some specific type of interrupt controller code. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* m68knommu: clean up ColdFire 532x interrupt setupGreg Ungerer2009-09-161-18/+0
| | | | | | | | With the common intc-simr interrupt controller code in place the ColdFire 532x family startup code can be greatly simplified. Remove all the interrupt masking code, and the per-device interrupt config here. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* m68knommu: general interrupt controller for ColdFire 532x partsGreg Ungerer2009-09-162-7/+19
| | | | | | | | | The ColdFire 532x family of parts uses 2 of the same INTC interrupt controlers used in the ColdFire 520x family. So modify the code to support both parts. The extra code for the second INTC controler in the case of the 520x is easily optimized away to nothing. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* m68knommu: clean up ColdFire 523x interrupt setupGreg Ungerer2009-09-161-63/+0
| | | | | | | | With the common intc-2 interrupt controller code in place the ColdFire 523x family startup code can be greatly simplified. Remove all the interrupt masking code, and the per-device interrupt config here. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* m68knommu: clean up ColdFire 528x interrupt setupGreg Ungerer2009-09-161-49/+2
| | | | | | | | With the common intc-2 interrupt controller code in place the ColdFire 528x family startup code can be greatly simplified. Remove all the interrupt masking code, and the per-device interrupt config here. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* m68knommu: clean up ColdFire 527x interrupt setupGreg Ungerer2009-09-161-49/+0
| | | | | | | | With the common intc-2 interrupt controller code in place the ColdFire 527x family startup code can be greatly simplified. Remove all the interrupt masking code, and the per-device interrupt config here. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* m68knommu: general interrupt controller for ColdFire many 52xx partsGreg Ungerer2009-09-162-3/+96
| | | | | | | | | | | | Create general interrupt controller code for the many ColdFire version 2 cores that use the two region INTC interrupt controller. This includes the 523x family, 5270, 5271, 5274, 5275, and the 528x families. This code does proper masking and unmasking of interrupts. With this in place some of the driver hacks in place to support ColdFire interrupts can finally go away. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* m68knommu: remove per device interrupt mask setting for ColdFire 520xGreg Ungerer2009-09-161-21/+0
| | | | | | | With general interrupt controller code in place we don't need specific unmasking code for the internal ColdFire 520x UARTs or ethernet (FEC). Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* m68knommu: use general interrupt controller for ColdFire 520x familyGreg Ungerer2009-09-162-1/+62
| | | | | | | | | | | | | | | | | | Create general interrupt controller code for the ColdFire 520x family, that does proper masking and unmasking of interrupts. With this in place some of the driver hacks in place to support ColdFire interrupts can finally go away. Within the ColdFire family there is a variety of different interrupt controllers in use. Some are used on multiple parts, some on only one. There is quite some differences in some varients, so much so that common code for all ColdFire parts would be impossible. This commit introduces code to support one of the newer interrupt controllers in the ColdFire 5208 and 5207 parts. It has very simple mask and unmask operations, so is one of the easiest to support. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* generic GPIO support for the Freescale Coldfire 5407.sfking@fdwdc.com2009-09-102-1/+50
| | | | | | | Add support for the 5407. Signed-off-by: Steven King <sfking@fdwdc.com> Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* generic GPIO support for the Freescale Coldfire 532x.sfking@fdwdc.com2009-09-103-3/+340
| | | | | | | Add support for the 532x. Signed-off-by: Steven King <sfking@fdwdc.com> Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* generic GPIO support for the Freescale Coldfire 5307.sfking@fdwdc.com2009-09-102-1/+50
| | | | | | | Add support for the 5307. Signed-off-by: Steven King <sfking@fdwdc.com> Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* generic GPIO support for the Freescale Coldfire 528x.sfking@fdwdc.com2009-09-102-1/+439
| | | | | | | Add support for the 528x. Signed-off-by: Steven King <sfking@fdwdc.com> Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* generic GPIO support for the Freescale Coldfire 5272.sfking@fdwdc.com2009-09-102-1/+82
| | | | | | | Add support for the 5272. Signed-off-by: Steven King <sfking@fdwdc.com> Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* generic GPIO support for the Freescale Coldfire 527x.sfking@fdwdc.com2009-09-102-1/+608
| | | | | | | Add support for the 5271 & 5275. Signed-off-by: Steven King <sfking@fdwdc.com> Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* generic GPIO support for the Freescale Coldfire 5249.sfking@fdwdc.com2009-09-102-1/+66
| | | | | | | Add support for the 5249. Signed-off-by: Steven King <sfking@fdwdc.com> Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* generic GPIO support for the Freescale Coldfire 523x.sfking@fdwdc.com2009-09-102-1/+284
| | | | | | | Add support for the 523x. Signed-off-by: Steven King <sfking@fdwdc.com> Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* generic GPIO support for the Freescale Coldfire 520x.sfking@fdwdc.com2009-09-102-1/+212
| | | | | | | Add support for the 520x. Signed-off-by: Steven King <sfking@fdwdc.com> Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* generic GPIO support for the Freescale Coldire 5206e.sfking@fdwdc.com2009-09-103-1/+51
| | | | | | | Add support for the 5206e. Signed-off-by: Steven King <sfking@fdwdc.com> Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* generic GPIO support for the Freescale Coldfire 5206.sfking@fdwdc.com2009-09-102-1/+50
| | | | | | | Add support for the 5206. Signed-off-by: Steven King <sfking@fdwdc.com> Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* core generic GPIO support for Freescale Coldfire processors.sfking@fdwdc.com2009-09-103-0/+156
| | | | | | | This adds the basic infrastructure used by all of the different Coldfire CPUs. Signed-off-by: Steven King <sfking@fdwdc.com> Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* m68knommu: remove obsolete reset codeGreg Ungerer2009-06-111-7/+0
| | | | | | | All ColdFire and non-MMU 68k code has custom reset routines. Remove the obsolete and now un-used reset macros. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* m68knommu: move CPU reset code for the 5272 ColdFire into its platform codeGreg Ungerer2009-06-111-4/+14
| | | | Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* m68knommu: move CPU reset code for the 528x ColdFire into its platform codeGreg Ungerer2009-06-111-4/+9
| | | | Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* m68knommu: move CPU reset code for the 527x ColdFire into its platform codeGreg Ungerer2009-06-111-6/+9
| | | | Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* m68knommu: move CPU reset code for the 523x ColdFire into its platform codeGreg Ungerer2009-06-111-6/+8
| | | | Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* m68knommu: move CPU reset code for the 520x ColdFire into its platform codeGreg Ungerer2009-06-111-6/+9
| | | | Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* m68knommu: add CPU reset code for the 532x ColdFireGreg Ungerer2009-06-111-3/+9
| | | | Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* m68knommu: add CPU reset code for the 5249 ColdFireGreg Ungerer2009-06-111-6/+12
| | | | Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* m68knommu: add CPU reset code for the 5206e ColdFireGreg Ungerer2009-06-111-6/+12
| | | | Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* m68knommu: add CPU reset code for the 5206 ColdFireGreg Ungerer2009-06-111-6/+12
| | | | Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* m68knommu: add CPU reset code for the 5407 ColdFireGreg Ungerer2009-06-111-4/+12
| | | | Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* m68knommu: add CPU reset code for the 5307 ColdFireGreg Ungerer2009-06-111-4/+12
| | | | Signed-off-by: Greg Ungerer <gerg@uclinux.org>
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