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* MIPS: dts: align gpio-key node names with dtschemaKrzysztof Kozlowski2022-07-141-1/+1
| | | | | | | | | The node names should be generic and DT schema expects certain pattern (e.g. with key/button/switch). Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Arınç ÜNAL <arinc.unal@arinc9.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
* MIPS: dts: correct gpio-keys names and propertiesKrzysztof Kozlowski2022-07-142-27/+22
| | | | | | | | gpio-keys children do not use unit addresses. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Arınç ÜNAL <arinc.unal@arinc9.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
* mips: dts: ingenic: Add TCU clock to x1000/x1830 tcu device nodeAidan MacDonald2022-06-212-4/+6
| | | | | | | | | | This clock is a gate for the TCU hardware block on these SoCs, but it wasn't included in the device tree since the ingenic-tcu driver erroneously did not request it. Reviewed-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Aidan MacDonald <aidanmacdonald.0x0@gmail.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
* Merge tag 'usb-5.19-rc1' of ↵Linus Torvalds2022-06-033-3/+3
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb Pull USB / Thunderbolt updates from Greg KH: "Here is the "big" set of USB and Thunderbolt driver changes for 5.18-rc1. For the most part it's been a quiet development cycle for the USB core, but there are the usual "hot spots" of development activity. Included in here are: - Thunderbolt driver updates: - fixes for devices without displayport adapters - lane bonding support and improvements - other minor changes based on device testing - dwc3 gadget driver changes. It seems this driver will never be finished given that the IP core is showing up in zillions of new devices and each implementation decides to do something different with it... - uvc gadget driver updates as more devices start to use and rely on this hardware as well - usb_maxpacket() api changes to remove an unneeded and unused parameter. - usb-serial driver device id updates and small cleanups - typec cleanups and fixes based on device testing - device tree updates for usb properties - lots of other small fixes and driver updates. All of these have been in linux-next for weeks with no reported problems" * tag 'usb-5.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb: (154 commits) USB: new quirk for Dell Gen 2 devices usb: dwc3: core: Add error log when core soft reset failed usb: dwc3: gadget: Move null pinter check to proper place usb: hub: Simplify error and success path in port_over_current_notify usb: cdns3: allocate TX FIFO size according to composite EP number usb: dwc3: Fix ep0 handling when getting reset while doing control transfer usb: Probe EHCI, OHCI controllers asynchronously usb: isp1760: Fix out-of-bounds array access xhci: Don't defer primary roothub registration if there is only one roothub USB: serial: option: add Quectel BG95 modem USB: serial: pl2303: fix type detection for odd device xhci: Allow host runtime PM as default for Intel Alder Lake N xHCI xhci: Remove quirk for over 10 year old evaluation hardware xhci: prevent U2 link power state if Intel tier policy prevented U1 xhci: use generic command timer for stop endpoint commands. usb: host: xhci-plat: omit shared hcd if either root hub has no ports usb: host: xhci-plat: prepare operation w/o shared hcd usb: host: xhci-plat: create shared hcd after having added main hcd xhci: prepare for operation w/o shared hcd xhci: factor out parts of xhci_gen_setup() ...
| * MIPS: Ingenic: Refresh USB nodes to match driver changes.周琰杰 (Zhou Yanjie)2022-04-213-3/+3
| | | | | | | | | | | | | | | | Refresh USB nodes in the jz4780.dtsi, x1000.dtsi, and x1830.dtsi files. Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com> Link: https://lore.kernel.org/r/1649964337-114337-4-git-send-email-zhouyanjie@wanyeetech.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* | MIPS: Ingenic: Refresh device tree for Ingenic SoCs and boards.周琰杰 (Zhou Yanjie)2022-05-234-74/+138
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 1.Add SSI nodes for X1000 SoC and X1830 SoC from Ingenic. 2.Refresh SSI related nodes in CU1000-Neo and CU1830-Neo. 3.The X1830 SoC used by the CU1830-Neo and the X1000 SoC used by the CU1000-Neo are both single-core processors, therefore the "OST_CLK_PERCPU_TIMER" ABI should not be used in the OST nodes of the CU1830-Neo and CU1000-Neo, it is just a coincidence that there is no problem now. So replace the misused "OST_CLK_PERCPU_TIMER" ABI with the correct "OST_CLK_EVENT_TIMER" ABI. Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
* | MIPS: Ingenic: Add PWM nodes for X1830.周琰杰 (Zhou Yanjie)2022-05-231-0/+14
| | | | | | | | | | | | | | Add PWM node for X1830 SoC from Ingenic. Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
* | mips: dts: ingenic: x1000: Add PWM device tree nodeAidan MacDonald2022-04-271-0/+12
|/ | | | | | | | | Copied from the jz4740 devicetree and trimmed to 5 timers, which is what the hardware supports. Signed-off-by: Aidan MacDonald <aidanmacdonald.0x0@gmail.com> Tested-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
* Merge tag 'mips_5.18' of ↵Linus Torvalds2022-03-251-1/+1
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux Pull MIPS updates from Thomas Bogendoerfer: - added support for QCN550x (ath79) - enabled KCSAN - removed TX39XX support - various cleanups and fixes * tag 'mips_5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux: (31 commits) MIPS: Fix build error for loongson64 and sgi-ip27 MIPS: ingenic: correct unit node address MIPS: Fix wrong comments in asm/prom.h MIPS: Remove redundant definitions of device_tree_init() MIPS: Remove redundant check in device_tree_init() MIPS: pgalloc: fix memory leak caused by pgd_free() MIPS: RB532: fix return value of __setup handler MIPS: Only use current_stack_pointer on GCC MIPS: boot/compressed: Use array reference for image bounds mips: cdmm: Fix refcount leak in mips_cdmm_phys_base mips: remove reference to "newer Loongson-3" mips: Always permit to build u-boot images MIPS: Sanitise Cavium switch cases in TLB handler synthesizers DEC: Limit PMAX memory probing to R3k systems mips: DEC: honor CONFIG_MIPS_FP_SUPPORT=n MIPS: fix fortify panic when copying asm exception handlers mips: ralink: fix a refcount leak in ill_acc_of_setup() mips: Implement "current_stack_pointer" MIPS: Remove TX39XX support MIPS: Modernize READ_IMPLIES_EXEC ...
| * MIPS: ingenic: correct unit node addressKrzysztof Kozlowski2022-03-181-1/+1
| | | | | | | | | | | | | | | | | | | | Unit node addresses should not have leading 0x: Warning (unit_address_format): /nemc@13410000/efuse@d0/eth-mac-addr@0x22: unit name should not have leading "0x" Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Reviewed-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
* | MIPS: DTS: CI20: fix how ddc power is enabledH. Nikolaus Schaller2022-02-091-13/+2
|/ | | | | | | | | | | | | | Originally we proposed a new hdmi-5v-supply regulator reference for CI20 device tree but that was superseded by a better idea to use the already defined "ddc-en-gpios" property of the "hdmi-connector". Since "MIPS: DTS: CI20: Add DT nodes for HDMI setup" has already been applied to v5.17-rc1, we add this on top. Fixes: ae1b8d2c2de9 ("MIPS: DTS: CI20: Add DT nodes for HDMI setup") Signed-off-by: H. Nikolaus Schaller <hns@goldelico.com> Reviewed-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
* MIPS: DTS: Ingenic: adjust register size to available registersH. Nikolaus Schaller2021-12-093-3/+3
| | | | | | | | | | | | | After getting the regmap size from the device tree we should reduce the ranges to the really available registers. This allows to read only existing registers from the debug fs and makes the regmap check out-of-bounds access. For the jz4780 we have done this already. Suggested-for: Paul Cercueil <paul@crapouillou.net> Signed-off-by: H. Nikolaus Schaller <hns@goldelico.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
* MIPS: DTS: CI20: Add DT nodes for HDMI setupPaul Boddie2021-12-091-2/+70
| | | | | | | | | | | | | We need to hook up * HDMI connector * HDMI power regulator * JZ4780_CLK_HDMI @ 27 MHz * DDC pinmux * HDMI and LCDC endpoint connections Signed-off-by: Paul Boddie <paul@boddie.org.uk> Signed-off-by: H. Nikolaus Schaller <hns@goldelico.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
* MIPS: DTS: jz4780: Account for Synopsys HDMI driver and LCD controllersPaul Boddie2021-12-091-0/+40
| | | | | | | | | | | | A specialisation of the generic Synopsys HDMI driver is employed for JZ4780 HDMI support. This requires a new driver, plus device tree and configuration modifications. Here we add jz4780 device tree setup. Signed-off-by: Paul Boddie <paul@boddie.org.uk> Signed-off-by: H. Nikolaus Schaller <hns@goldelico.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
* dt-bindings: Rename Ingenic CGU headers to ingenic,*.hPaul Cercueil2021-11-116-6/+6
| | | | | | | | | | | Tidy up a bit the tree, by prefixing all include/dt-bindings/clock/ files related to Ingenic SoCs with 'ingenic,'. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20211016133322.40771-1-paul@crapouillou.net
* MIPS: JZ4780: CI20: DTS: add SPI controller configArtur Rojek2021-09-132-15/+38
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | 1. Add nodes for the two SPI controllers found in MIPS Creator CI20. 2. Reparent SPI clock source to effectively use MPLL and set its clock rate to 54MHz. NOTE: To use the SPI controllers, `pinctrl-0` property must be set in order to configure the used pins. As SPI functionality is multiplexed on multiple pin groups, this choice is left to the user. An example configuration: ``` &spi0 { pinctrl-0 = <&pins_spi0>; } pins_spi0: spi0 { function = "ssi0"; groups = "ssi0-dt-e", "ssi0-dr-e", "ssi0-clk-e", "ssi0-ce0-e", "ssi0-ce1-e"; bias-disable; }; ``` Consult the CI20 pinout description for more details. Signed-off-by: Artur Rojek <contact@artur-rojek.eu> Link: https://lore.kernel.org/r/20210830230139.21476-4-contact@artur-rojek.eu Signed-off-by: Mark Brown <broonie@kernel.org>
* MIPS: CI20: Add second percpu timer for SMP.周琰杰 (Zhou Yanjie)2021-06-301-10/+14
| | | | | | | | | | | | | 1.Add a new TCU channel as the percpu timer of core1, this is to prepare for the subsequent SMP support. The newly added channel will not adversely affect the current single-core state. 2.Adjust the position of TCU node to make it consistent with the order in jz4780.dtsi file. Tested-by: Nikolaus Schaller <hns@goldelico.com> # on CI20 Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com> Acked-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
* MIPS: CI20: Reduce clocksource to 750 kHz.周琰杰 (Zhou Yanjie)2021-06-301-2/+2
| | | | | | | | | | | The original clock (3 MHz) is too fast for the clocksource, there will be a chance that the system may get stuck. Reported-by: Nikolaus Schaller <hns@goldelico.com> Tested-by: Nikolaus Schaller <hns@goldelico.com> # on CI20 Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com> Acked-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
* MIPS: Ingenic: Add MAC syscon nodes for Ingenic SoCs.周琰杰 (Zhou Yanjie)2021-06-302-0/+14
| | | | | | | | Add MAC syscon nodes for X1000 SoC and X1830 SoC from Ingenic. Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com> Acked-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
* MIPS: X1830: Respect cell count of common properties.周琰杰 (Zhou Yanjie)2021-06-301-5/+4
| | | | | | | | | | If N fields of X cells should be provided, then that's what the devicetree should represent, instead of having one single field of (N * X) cells. Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com> Acked-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
* MIPS: ingenic: rs90: Add dedicated VRAM memory regionPaul Cercueil2021-06-011-0/+14
| | | | | | | | | Add a 1 MiB memory area dedicated to the video driver. This area will be managed by Linux' CMA, so that the ingenic-drm driver can be sure to always be able to allocate contiguous buffers. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
* MIPS: ingenic: gcw0: Set codec to cap-less mode for FM radioPaul Cercueil2021-06-011-3/+2
| | | | | | | | | | | | When using the FM radio, we must not have capacitors on the headphones line, since it is used as the antenna. The "FM Radio" widget is removed so that the cap-less mode can be enabled dynamically through DAPM when the line input is used. This widget was useless anyway. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
* MIPS: ingenic: jz4780: Fix I2C nodes to match DT docPaul Cercueil2021-06-011-5/+5
| | | | | | | | | The "ingenic,jz4780-i2c" should have "ingenic,jz4770-i2c" as a fallback compatible, as per the Device Tree documentation found in Documentation/devicetree/bindings/i2c/ingenic,i2c.yaml. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
* MIPS: ingenic: gcw0: SPI panel does not require active-high CSPaul Cercueil2021-03-121-1/+0
| | | | | | | | | | | | | | The NT39016 panel is a fun beast, even though the documentation states that the CS line is active-low, it will work just fine if the CS line is configured as active-high, but it won't work if the CS line is forced low or forced high. Since it did actually work with the spi-cs-high property, this is not a bugfix, but we should nonetheless remove that property to match the documentation. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
* MIPS: Ingenic: Add missing nodes for Ingenic SoCs and boards.周琰杰 (Zhou Yanjie)2020-11-176-19/+313
| | | | | | | | | | | | | 1.Add OTG/OTG PHY/RNG nodes for JZ4780, CGU/OTG nodes for CI20. 2.Add OTG/OTG PHY/RNG/OST nodes for X1000, SSI/CGU/OST/OTG/SC16IS752 nodes for CU1000-Neo. 3.Add OTG/OTG PHY/DTRNG/OST nodes for X1830, SSI/CGU/OST/OTG/SC16IS752 nodes for CU1830-Neo. Tested-by: 周正 (Zhou Zheng) <sernia.zhou@foxmail.com> Tested by: H. Nikolaus Schaller <hns@goldelico.com> # CI20/jz4780 Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
* mips: dts: jz47x: Harmonize EHCI/OHCI DT nodes nameSerge Semin2020-11-122-2/+2
| | | | | | | | | | | | | In accordance with the Generic EHCI/OHCI bindings the corresponding node name is suppose to comply with the Generic USB HCD DT schema, which requires the USB nodes to have the name acceptable by the regexp: "^usb(@.*)?" . Make sure the "generic-ehci" and "generic-ohci"-compatible nodes are correctly named. Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru> Acked-by: Paul Cercueil <paul@crapouillou.net> Acked-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
* MIPS: Ingenic: Add CPU nodes for Ingenic SoCs.周琰杰 (Zhou Yanjie)2020-09-216-1/+93
| | | | | | | | | | | Add 'cpus' node to the jz4725b.dtsi, jz4740.dtsi, jz4770.dtsi, jz4780.dtsi, x1000.dtsi, and x1830.dtsi files. Tested-by: H. Nikolaus Schaller <hns@goldelico.com> Tested-by: Paul Boddie <paul@boddie.org.uk> Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com> Reviewed-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
* MIPS: dts/ingenic: Cleanup qi_lb60.dtsPaul Cercueil2020-09-071-69/+68
| | | | | | | | | | | | | | Cleanup a bit the Device Tree file: 1. Respect the number of cells in GPIO descriptors and keyboard matrix; 2. Use 'ecc-engine' instead of deprecated 'ingenic,bch-controller' property; 3. The NAND's rb-gpios is actually active high; 3. The FRE/FWE pins must be configured in the proper mode for the NAND to work if it was not already done by the bootloader. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
* Merge tag 'mips_5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linuxLinus Torvalds2020-08-068-123/+1274
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull MIPS upates from Thomas Bogendoerfer: - improvements for Loongson64 - extended ingenic support - removal of not maintained paravirt system type - cleanups and fixes * tag 'mips_5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux: (81 commits) MIPS: SGI-IP27: always enable NUMA in Kconfig MAINTAINERS: Update KVM/MIPS maintainers MIPS: Update default config file for Loongson-3 MIPS: KVM: Add kvm guest support for Loongson-3 dt-bindings: mips: Document Loongson kvm guest board MIPS: handle Loongson-specific GSExc exception MIPS: add definitions for Loongson-specific CP0.Diag1 register MIPS: only register FTLBPar exception handler for supported models MIPS: ingenic: Hardcode mem size for qi,lb60 board MIPS: DTS: ingenic/qi,lb60: Add model and memory node MIPS: ingenic: Use fw_passed_dtb even if CONFIG_BUILTIN_DTB MIPS: head.S: Init fw_passed_dtb to builtin DTB of: address: Fix parser address/size cells initialization of_address: Guard of_bus_pci_get_flags with CONFIG_PCI MIPS: DTS: Fix number of msi vectors for Loongson64G MIPS: Loongson64: Add ISA node for LS7A PCH MIPS: Loongson64: DTS: Fix ISA and PCI I/O ranges for RS780E PCH MIPS: Loongson64: Enlarge IO_SPACE_LIMIT MIPS: Loongson64: Process ISA Node in DeviceTree of_address: Add bus type match for pci ranges parser ...
| * MIPS: DTS: ingenic/qi,lb60: Add model and memory nodePaul Cercueil2020-07-311-0/+6
| | | | | | | | | | | | | | | | | | Add a memory node, which was missing until now, and use the retail name "Ben Nanonote" as the model, as it is way more known under that name than under the name "LB60". Signed-off-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
| * MIPS: qi_lb60: Fix routing to audio amplifierPaul Cercueil2020-07-281-1/+1
| | | | | | | | | | | | | | | | | | | | | | The ROUT (right channel output of audio codec) was connected to INL (left channel of audio amplifier) instead of INR (right channel of audio amplifier). Fixes: 8ddebad15e9b ("MIPS: qi_lb60: Migrate to devicetree") Cc: stable@vger.kernel.org # v5.3 Signed-off-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
| * MIPS: ingenic: JZ4725B: Add IPU nodePaul Cercueil2020-07-262-1/+35
| | | | | | | | | | | | | | | | | | | | Add a devicetree node for the Image Processing Unit (IPU) found in the JZ4725B. Connect it with graph nodes to the LCD node. The LCD driver will expect the IPU node to be accessed through graph port #8, as stated in the bindings documentation. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
| * MIPS: Ingenic: Fix bugs and add missing LED node for X1000.周琰杰 (Zhou Yanjie)2020-07-162-122/+118
| | | | | | | | | | | | | | | | | | | | | | | | | | | | 1.The CU1000-Neo board actually uses X1000E instead of X1000, so the wrongly written "ingenic,x1000" in compatible should be changed to "ingenic,x1000e". 2.Adjust the order of nodes according to the corresponding address value. 3.Drop unnecessary node in "wlan_pwrseq". 4.Add the leds node to "cu1000-neo.dts". Tested-by: 周正 (Zhou Zheng) <sernia.zhou@foxmail.com> Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
| * MIPS: Ingenic: Add YSH & ATIL CU Neo board support.周琰杰 (Zhou Yanjie)2020-07-162-0/+169
| | | | | | | | | | | | | | | | | | Add a device tree and a defconfig for the Ingenic X1830 based YSH & ATIL CU Neo board. Tested-by: 周正 (Zhou Zheng) <sernia.zhou@foxmail.com> Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
| * MIPS: Ingenic: Add Ingenic X1830 support.周琰杰 (Zhou Yanjie)2020-07-161-0/+300
| | | | | | | | | | | | | | | | | | | | Support the Ingenic X1830 SoC using the code under arch/mips/jz4740. This is left unselectable in Kconfig until a X1830 based board is added in a later commit. Tested-by: 周正 (Zhou Zheng) <sernia.zhou@foxmail.com> Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
| * MIPS: ingenic: Add support for the RS90 boardPaul Cercueil2020-07-162-0/+312
| | | | | | | | | | | | | | | | | | The RS-90, better known as RetroMini, is a small and pocketable handheld gaming console from YLMChina. It has little more than a JZ4725B SoC, a NAND, a screen, some buttons and a speaker. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
| * MIPS: ingenic: Add support for the JZ4725B SoCPaul Cercueil2020-07-161-0/+334
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Add preliminary support for boards based on the JZ4725B SoC from Ingenic. The JZ4725B SoC is supposed to be older than the JZ4740 SoC, but its internals are much closer to what can be found on the JZ4750 and newer SoCs. It is low-power SoC with a MIPS32r1 SoC running at ~360 MHz, and no FPU. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
* | MIPS: ingenic: gcw0: Fix HP detection GPIO.João H. Spies2020-06-251-1/+1
|/ | | | | | | | | | | Previously marked as active high, but is in reality active low. Cc: stable@vger.kernel.org Fixes: b1bfdb660516 ("MIPS: ingenic: DTS: Update GCW0 support") Signed-off-by: João H. Spies <jhlspies@gmail.com> Tested-by: Paul Cercueil <paul@crapouillou.net> Reviewed-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
* MIPS: ingenic: Add support for GCW Zero prototypePaul Cercueil2020-05-271-0/+13
| | | | | | | | | Add support for the GCW Zero prototype. The only (?) difference is that it only has 256 MiB of RAM, compared to the 512 MiB of RAM of the retail device. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
* MIPS: ingenic: DTS: Add memory info of GCW ZeroPaul Cercueil2020-05-271-0/+6
| | | | | | | | | | Add memory info of the GCW Zero in its devicetree. The bootloader generally provides this information, but since it is fixed to 512 MiB, it doesn't hurt to have it in devicetree. It allows the kernel to boot without any parameter passed as argument. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
* MIPS: ingenic: DTS: Update GCW0 supportPaul Cercueil2020-04-291-15/+484
| | | | | | | | | | | | Add support for the face buttons, the ACT8600 PMUC, the LCD panel with backlight, the rumble, internal/external SD readers, and other things. Note that the otg-phy node was dropped in the process as it was neither useful nor used, and was inside a non-compliant board "bus". Signed-off-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
* MIPS: ingenic: DTS: Update JZ4770 supportPaul Cercueil2020-04-291-7/+170
| | | | | | | | Add support for the RTC, AIC, CODEC, MMC 0/1/2, ADC, GPU, LCD, USB OTG, USB PHY controllers. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
* MIPS: ingenic: DTS: Add nodes for the watchdog/PWM/OSTPaul Cercueil2020-04-293-0/+72
| | | | | | | Add the TCU nodes to the JZ4780, JZ4770 and JZ4740 devicetree files. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
* MIPS: ingenic: DTS: Respect cell count of common propertiesPaul Cercueil2020-04-294-36/+30
| | | | | | | | | If N fields of X cells should be provided, then that's what the devicetree should represent, instead of having one single field of (N*X) cells. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
* MIPS: ingenic: DTS: Fix invalid value in #dma-cellsPaul Cercueil2020-04-291-2/+2
| | | | | | | | | | The driver requires two cells and not just one. Since these nodes are both disabled as no hardware currently use them, this fix does not really requires a Fixes: tag. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
* MIPS: DTS: CI20: make DM9000 Ethernet controller use NVMEM to find the ↵H. Nikolaus Schaller2020-04-191-0/+3
| | | | | | | | | | | | | default MAC address There is a unique MAC address programmed into the eFuses of the JZ4780 chip in the CI20 factory. By using this for initializing the DM9000 Ethernet controller, every CI20 board has an individual - but stable - MAC address and DHCP can assign stable IP addresses. Signed-off-by: H. Nikolaus Schaller <hns@goldelico.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
* MIPS: DTS: JZ4780: define node for JZ4780 efusePrasannaKumar Muralidharan2020-04-191-2/+17
| | | | | | | | | | | | | | | | This patch brings support for the JZ4780 efuse. Currently it only exposes a read only access to the entire 8K bits efuse memory and the ethernet mac address for the davicom dm9000 chip on the CI20 board. It also changes the nemc ranges definition to give the driver access to the efuse registers, which are in the middle of the nemc reg range. Tested-by: Mathieu Malaterre <malat@debian.org> Signed-off-by: PrasannaKumar Muralidharan <prasannatsmkumar@gmail.com> Signed-off-by: Mathieu Malaterre <malat@debian.org> Signed-off-by: H. Nikolaus Schaller <hns@goldelico.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
* MIPS: DTS: CI20: multiple DTS improvementsH. Nikolaus Schaller2020-03-231-0/+14
| | | | | | | | | | | | | | | | | | a) add DT node for SW1 as Enter button The SW1 button can be used as a simple one-button keyboard and is connected to PD17. Note: SW1 has a second meaning to change the boot sequence when pressed while powering on. b) give eth0_power a defined voltage. This is a 3.3V power switch (DVNET3.3V). Signed-off-by: H. Nikolaus Schaller <hns@goldelico.com> Reviewed-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
* MIPS: DTS: CI20: add DT node for IR sensorAlex Smith2020-03-231-0/+5
| | | | | | | | | | | The infrared sensor on the CI20 board is connected to a GPIO and can be operated by using the gpio-ir-recv driver. Add a DT node for the sensor to allow that driver to be used. Signed-off-by: Alex Smith <alex.smith@imgtec.com> Signed-off-by: H. Nikolaus Schaller <hns@goldelico.com> Reviewed-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
* MIPS: DTS: CI20: fix interrupt for pcf8563 RTCH. Nikolaus Schaller2020-03-071-1/+4
| | | | | | | | | | | Interrupts should not be specified by interrupt line but by gpio parent and reference. Fixes: 73f2b940474d ("MIPS: CI20: DTS: Add I2C nodes") Cc: stable@vger.kernel.org Signed-off-by: H. Nikolaus Schaller <hns@goldelico.com> Reviewed-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
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