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* tree-wide: replace config_enabled() with IS_ENABLED()Masahiro Yamada2016-08-041-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The use of config_enabled() against config options is ambiguous. In practical terms, config_enabled() is equivalent to IS_BUILTIN(), but the author might have used it for the meaning of IS_ENABLED(). Using IS_ENABLED(), IS_BUILTIN(), IS_MODULE() etc. makes the intention clearer. This commit replaces config_enabled() with IS_ENABLED() where possible. This commit is only touching bool config options. I noticed two cases where config_enabled() is used against a tristate option: - config_enabled(CONFIG_HWMON) [ drivers/net/wireless/ath/ath10k/thermal.c ] - config_enabled(CONFIG_BACKLIGHT_CLASS_DEVICE) [ drivers/gpu/drm/gma500/opregion.c ] I did not touch them because they should be converted to IS_BUILTIN() in order to keep the logic, but I was not sure it was the authors' intention. Link: http://lkml.kernel.org/r/1465215656-20569-1-git-send-email-yamada.masahiro@socionext.com Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Kees Cook <keescook@chromium.org> Cc: Stas Sergeev <stsp@list.ru> Cc: Matt Redfearn <matt.redfearn@imgtec.com> Cc: Joshua Kinard <kumba@gentoo.org> Cc: Jiri Slaby <jslaby@suse.com> Cc: Bjorn Helgaas <bhelgaas@google.com> Cc: Borislav Petkov <bp@suse.de> Cc: Markos Chandras <markos.chandras@imgtec.com> Cc: "Dmitry V. Levin" <ldv@altlinux.org> Cc: yu-cheng yu <yu-cheng.yu@intel.com> Cc: James Hogan <james.hogan@imgtec.com> Cc: Brian Gerst <brgerst@gmail.com> Cc: Johannes Berg <johannes@sipsolutions.net> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Al Viro <viro@zeniv.linux.org.uk> Cc: Will Drewry <wad@chromium.org> Cc: Nikolay Martynov <mar.kolya@gmail.com> Cc: Huacai Chen <chenhc@lemote.com> Cc: "H. Peter Anvin" <hpa@zytor.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Daniel Borkmann <daniel@iogearbox.net> Cc: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com> Cc: Rafal Milecki <zajec5@gmail.com> Cc: James Cowgill <James.Cowgill@imgtec.com> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Alex Smith <alex.smith@imgtec.com> Cc: Adam Buchbinder <adam.buchbinder@gmail.com> Cc: Qais Yousef <qais.yousef@imgtec.com> Cc: Jiang Liu <jiang.liu@linux.intel.com> Cc: Mikko Rapeli <mikko.rapeli@iki.fi> Cc: Paul Gortmaker <paul.gortmaker@windriver.com> Cc: Denys Vlasenko <dvlasenk@redhat.com> Cc: Brian Norris <computersforpeace@gmail.com> Cc: Hidehiro Kawai <hidehiro.kawai.ez@hitachi.com> Cc: "Luis R. Rodriguez" <mcgrof@do-not-panic.com> Cc: Andy Lutomirski <luto@amacapital.net> Cc: Ingo Molnar <mingo@redhat.com> Cc: Dave Hansen <dave.hansen@linux.intel.com> Cc: "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> Cc: Roland McGrath <roland@hack.frob.com> Cc: Paul Burton <paul.burton@imgtec.com> Cc: Kalle Valo <kvalo@qca.qualcomm.com> Cc: Viresh Kumar <viresh.kumar@linaro.org> Cc: Tony Wu <tung7970@gmail.com> Cc: Huaitong Han <huaitong.han@intel.com> Cc: Sumit Semwal <sumit.semwal@linaro.org> Cc: Alexei Starovoitov <ast@kernel.org> Cc: Juergen Gross <jgross@suse.com> Cc: Jason Cooper <jason@lakedaemon.net> Cc: "David S. Miller" <davem@davemloft.net> Cc: Oleg Nesterov <oleg@redhat.com> Cc: Andrea Gelmini <andrea.gelmini@gelma.net> Cc: David Woodhouse <dwmw2@infradead.org> Cc: Marc Zyngier <marc.zyngier@arm.com> Cc: Rabin Vincent <rabin@rab.in> Cc: "Maciej W. Rozycki" <macro@imgtec.com> Cc: David Daney <david.daney@cavium.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* mips: Remove unnecessary of_platform_populate with default match tableKefeng Wang2016-06-231-8/+0
| | | | | | | | | | | | | | | After patch "of/platform: Add common method to populate default bus", it is possible for arch code to remove unnecessary callers of of_platform_populate with default match table. Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Alban Bedel <albeu@free.fr> Cc: Paul Burton <paul.burton@imgtec.com> Cc: James Hogan <james.hogan@imgtec.com> Cc: Joshua Henderson <joshua.henderson@microchip.com> Cc: Zubair Lutfullah Kakakhel <Zubair.Kakakhel@imgtec.com> Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com> Signed-off-by: Rob Herring <robh@kernel.org>
* Merge tag 'for-linus-20160523' of git://git.infradead.org/linux-mtdLinus Torvalds2016-05-241-36/+51
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull MTD updates from Brian Norris: "First cycle with Boris as NAND maintainer! Many (most) bullets stolen from him. Generic: - Migrated NAND LED trigger to be a generic MTD trigger NAND: - Introduction of the "ECC algorithm" concept, to avoid overloading the ECC mode field too much more - Replaced the nand_ecclayout infrastructure with something a little more flexible (finally!) and future proof - Rework of the OMAP GPMC and NAND drivers; the TI folks pulled some of this into their own tree as well - Prepare the sunxi NAND driver to receive DMA support - Handle bitflips in erased pages on GPMI revisions that do not support this in hardware. SPI NOR: - Start using the spi_flash_read() API for SPI drivers that support it (i.e., SPI drivers with special memory-mapped flash modes) And other small scattered improvments" * tag 'for-linus-20160523' of git://git.infradead.org/linux-mtd: (155 commits) mtd: spi-nor: support GigaDevice gd25lq64c mtd: nand_bch: fix spelling of "probably" mtd: brcmnand: respect ECC algorithm set by NAND subsystem gpmi-nand: Handle ECC Errors in erased pages Documentation: devicetree: deprecate "soft_bch" nand-ecc-mode value mtd: nand: add support for "nand-ecc-algo" DT property mtd: mtd: drop NAND_ECC_SOFT_BCH enum value mtd: drop support for NAND_ECC_SOFT_BCH as "soft_bch" mapping mtd: nand: read ECC algorithm from the new field mtd: nand: fsmc: validate ECC setup by checking algorithm directly mtd: nand: set ECC algorithm to Hamming on fallback staging: mt29f_spinand: set ECC algorithm explicitly CRIS v32: nand: set ECC algorithm explicitly mtd: nand: atmel: set ECC algorithm explicitly mtd: nand: davinci: set ECC algorithm explicitly mtd: nand: bf5xx: set ECC algorithm explicitly mtd: nand: omap2: Fix high memory dma prefetch transfer mtd: nand: omap2: Start dma request before enabling prefetch mtd: nandsim: add __init attribute mtd: nand: move of_get_nand_xxx() helpers into nand_base.c ...
| * mtd: nand: jz4740: switch to mtd_ooblayout_opsBoris Brezillon2016-05-051-36/+51
| | | | | | | | | | | | | | | | Implementing the mtd_ooblayout_ops interface is the new way of exposing ECC/OOB layout to MTD users. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Lars-Peter Clausen <lars@metafoo.de>
* | MIPS: JZ4740: Probe OHCI platform device via DTMaarten ter Huurne2016-05-131-25/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The DT fragment will select the ohci-platform driver, since that can handle the JZ4740 OHCI just fine. While I don't have a JZ4740-based board with anything connected to the USB host controller, I did test the generic OHCI driver successfully on a JZ4770-based board. The device is disabled by default; boards that want to use it can override the "status" property. The mass-production Qi LB60 boards don't use the USB host controller. Signed-off-by: Maarten ter Huurne <maarten@treewalker.org> Cc: Lars-Peter Clausen <lars@metafoo.de> Cc: Paul Cercueil <paul@crapouillou.net> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/13104/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | MIPS: JZ4740: Qi LB60: Remove support for AVT2 variantMaarten ter Huurne2016-05-131-50/+2
|/ | | | | | | | | | | | | AVT2 was a prototype board of which about 5 were made, none of which are in use anymore. Signed-off-by: Maarten ter Huurne <maarten@treewalker.org> Acked-by: Lars-Peter Clausen <lars@metafoo.de> Cc: Paul Cercueil <paul@crapouillou.net> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/13103/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: jz4740: use gpiochip data pointerLinus Walleij2016-02-191-4/+6
| | | | | | | | | | This makes the driver use the data pointer added to the gpio_chip to store a pointer to the state container instead of relying on container_of(). Cc: linux-mips@linux-mips.org Acked-by: Ralf Baechle <ralf@linux-mips.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* MIPS: jz4740: Fix surviving instance of irq_to_gpio()Ralf Baechle2016-02-191-1/+1
| | | | | | | | This is fallout from commit 832f5dacfa0b ("MIPS: Remove all the uses of custom gpio.h"). Signed-off-by: Ralf Baechle <ralf@linux-mips.org> Suggested-by: Lars-Peter Clausen <lars@metafoo.de>
* MIPS: JZ4740: Remove unused linux/leds_pwm.h includeThierry Reding2015-10-261-2/+0
| | | | | | | | | | | | | The board code never sets up a leds-pwm device, so including the header is not necessary. Signed-off-by: Thierry Reding <thierry.reding@gmail.com> Acked-by: Lars-Peter Clausen <lars@metafoo.de> Cc: Lars-Peter Clausen <lars@metafoo.de> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/11262/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: JZ4740: Use PWM lookup tableThierry Reding2015-10-261-3/+8
| | | | | | | | | | | | | Associate the PWM with the pwm-beeper device using a PWM lookup table. This will eventually allow the legacy function calls to pwm_request() to be removed from all consumer drivers. Signed-off-by: Thierry Reding <thierry.reding@gmail.com> Cc: Lars-Peter Clausen <lars@metafoo.de> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/11261/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Fix the build on jz4740 after removing the custom gpio.hAlban Bedel2015-10-012-0/+2
| | | | | | | | | | | | | | | | | | Somehow the wrong version of the patch to remove the use of custom gpio.h on mips has been merged. This patch add the missing fixes for a build error on jz4740 because linux/gpio.h doesn't provide any machine specfics definitions anymore. Signed-off-by: Alban Bedel <albeu@free.fr> Cc: Paul Burton <paul.burton@imgtec.com> Cc: Lars-Peter Clausen <lars@metafoo.de> Cc: Brian Norris <computersforpeace@gmail.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/11089/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* genirq: Remove irq argument from irq flow handlersThomas Gleixner2015-09-161-1/+1
| | | | | | | | | | | | | | Most interrupt flow handlers do not use the irq argument. Those few which use it can retrieve the irq number from the irq descriptor. Remove the argument. Search and replace was done with coccinelle and some extra helper scripts around it. Thanks to Julia for her help! Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Julia Lawall <Julia.Lawall@lip6.fr> Cc: Jiang Liu <jiang.liu@linux.intel.com>
* MIPS: Remove all the uses of custom gpio.hAlban Bedel2015-09-031-12/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently CONFIG_ARCH_HAVE_CUSTOM_GPIO_H is defined for all MIPS machines, and each machine type provides its own gpio.h. However only a handful really implement the GPIO API, most just forward everythings to gpiolib. The Alchemy machine is notable as it provides a system to allow implementing the GPIO API at the board level. But it is not used by any board currently supported, so it can also be removed. For most machine types we can just remove the custom gpio.h, as well as the custom wrappers if some exists. Some of the code found in the wrappers must be moved to the respective GPIO driver. A few more fixes are need in some drivers as they rely on linux/gpio.h to provides some machine specific definitions, or used asm/gpio.h instead of linux/gpio.h for the gpio API. Signed-off-by: Alban Bedel <albeu@free.fr> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Cc: linux-mips@linux-mips.org Cc: Hauke Mehrtens <hauke@hauke-m.de> Cc: Rafał Miłecki <zajec5@gmail.com> Cc: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> Cc: Tejun Heo <tj@kernel.org> Cc: Alexandre Courbot <gnurou@gmail.com> Cc: Dmitry Torokhov <dmitry.torokhov@gmail.com> Cc: Florian Fainelli <florian@openwrt.org> Cc: Manuel Lauss <manuel.lauss@gmail.com> Cc: Joe Perches <joe@perches.com> Cc: Daniel Walter <dwalter@google.com> Cc: Sergey Ryazanov <ryazanov.s.a@gmail.com> Cc: Huacai Chen <chenhc@lemote.com> Cc: James Hartley <james.hartley@imgtec.com> Cc: Andrew Bresticker <abrestic@chromium.org> Cc: Paul Burton <paul.burton@imgtec.com> Cc: Jiri Kosina <jkosina@suse.cz> Cc: Bjorn Helgaas <bhelgaas@google.com> Cc: Wolfram Sang <wsa@the-dreams.de> Cc: Randy Dunlap <rdunlap@infradead.org> Cc: Varka Bhadram <varkabhadram@gmail.com> Cc: Masanari Iida <standby24x7@gmail.com> Cc: Tomi Valkeinen <tomi.valkeinen@ti.com> Cc: Michael Buesch <m@bues.ch> Cc: abdoulaye berthe <berthe.ab@gmail.com> Cc: linux-kernel@vger.kernel.org Cc: linux-ide@vger.kernel.org Cc: linux-gpio@vger.kernel.org Cc: linux-input@vger.kernel.org Cc: netdev@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/10828/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: jz4740: Migrate to new 'set-state' interfaceViresh Kumar2015-09-031-19/+27
| | | | | | | | | | | | | | | | | | | Migrate jz4740 driver to the new 'set-state' interface provided by clockevents core, the earlier 'set-mode' interface is marked obsolete now. This also enables us to implement callbacks for new states of clockevent devices, for example: ONESHOT_STOPPED. Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Cc: Paul Burton <paul.burton@imgtec.com> Cc: Deng-Cheng Zhu <dengcheng.zhu@imgtec.com> Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: linux-mips@linux-mips.org Cc: linaro-kernel@lists.linaro.org Cc: Thomas Gleixner <tglx@linutronix.de> Patchwork: https://patchwork.linux-mips.org/patch/10601/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: jz4740: Consolidate chained IRQ handler install/removeThomas Gleixner2015-08-261-2/+2
| | | | | | | | | | | | | | | | | Chained irq handlers usually set up handler data as well. We now have a function to set both under irq_desc->lock. Replace the two calls with one. Search and conversion was done with coccinelle. Reported-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Julia Lawall <Julia.Lawall@lip6.fr> Cc: linux-mips@linux-mips.org Cc: LKML <linux-kernel@vger.kernel.org> Cc: Jiang Liu <jiang.liu@linux.intel.com> Patchwork: https://patchwork.linux-mips.org/patch/10695/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: ingenic: Initial MIPS Creator CI20 supportPaul Burton2015-06-211-0/+4
| | | | | | | | | | | | | | | | | | | Add an initial device tree for the Ingenic JZ4780 based MIPS Creator CI20 board. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: Ian Campbell <ijc+devicetree@hellion.org.uk> Cc: Kumar Gala <galak@codeaurora.org> Cc: Lars-Peter Clausen <lars@metafoo.de> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: devicetree@vger.kernel.org Cc: linux-mips@linux-mips.org Cc: Andrew Bresticker <abrestic@chromium.org> Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/10162/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: ingenic: Initial JZ4780 supportPaul Burton2015-06-214-2/+18
| | | | | | | | | | | | | | | | | | | | | | | Support the Ingenic JZ4780 SoC using the existing code under arch/mips/jz4740 now that it has been generalised sufficiently. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: Ian Campbell <ijc+devicetree@hellion.org.uk> Cc: Kumar Gala <galak@codeaurora.org> Cc: Lars-Peter Clausen <lars@metafoo.de> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: devicetree@vger.kernel.org Cc: linux-mips@linux-mips.org Cc: Joshua Kinard <kumba@gentoo.org> Cc: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com> Cc: Deng-Cheng Zhu <dengcheng.zhu@imgtec.com> Cc: linux-kernel@vger.kernel.org Cc: Markos Chandras <markos.chandras@imgtec.com> Cc: Andreas Herrmann <andreas.herrmann@caviumnetworks.com> Patchwork: https://patchwork.linux-mips.org/patch/10164/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: JZ4740: use Ingenic SoC UART driverPaul Burton2015-06-216-117/+1
| | | | | | | | | | | | | | | | | | | | | | | | Remove the serial support from arch/mips/jz4740 & make use of the new Ingenic SoC UART driver. This is done for both regular & early console output. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: Ian Campbell <ijc+devicetree@hellion.org.uk> Cc: Kumar Gala <galak@codeaurora.org> Cc: Lars-Peter Clausen <lars@metafoo.de> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: devicetree@vger.kernel.org Cc: linux-mips@linux-mips.org Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Stephen Warren <swarren@wwwdotorg.org> Cc: linux-kernel@vger.kernel.org Cc: Brian Norris <computersforpeace@gmail.com> Cc: Apelete Seketeli <apelete@seketeli.net> Cc: Alexandre Courbot <gnurou@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/10160/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: JZ4740: only detect RAM size if not specified in DTPaul Burton2015-06-212-1/+9
| | | | | | | | | | | | | | | Allow a devicetree to specify the memory present in the system rather than probing it from the memory controller. This both saves the probing for systems where the amount of memory is fixed, and will simplify the bringup of later Ingenic SoCs where the memory controller register layout differs. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: Lars-Peter Clausen <lars@metafoo.de> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/10163/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: JZ4740: remove clock.hPaul Burton2015-06-212-27/+0
| | | | | | | | | | | | | | The only thing remaining in arch/mips/jz4740/clock.h is declarations of the jz4740_clock_{suspend,resume} functions. Move these to arch/mips/include/asm/mach-jz4740/clock.h for consistency with similar functions, and remove the redundant arch/mips/jz4740/clock.h header. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: Lars-Peter Clausen <lars@metafoo.de> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/10156/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS, clk: move jz4740 clock suspend, resume functions to jz4740-cguPaul Burton2015-06-213-97/+1
| | | | | | | | | | | | | | | | | | | The jz4740-cgu driver already has access to the CGU, so it makes sense to move the few remaining accesses to the CGU from arch/mips/jz4740 there too. Move the jz4740_clock_{suspend,resume} functions there for such consistency. The arch/mips/jz4740/clock.c file now contains nothing more of use & so is removed. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: Lars-Peter Clausen <lars@metafoo.de> Cc: Mike Turquette <mturquette@linaro.org> Cc: Stephen Boyd <sboyd@codeaurora.org> Cc: linux-clk@vger.kernel.org Cc: linux-mips@linux-mips.org Cc: Deng-Cheng Zhu <dengcheng.zhu@imgtec.com> Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/10158/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS, clk: move jz4740 UDC auto suspend functions to jz4740-cguPaul Burton2015-06-211-13/+0
| | | | | | | | | | | | | | | | | The jz4740-cgu driver already has access to the CGU, so it makes sense to move the few remaining accesses to the CGU from arch/mips/jz4740 there too. Move the jz4740_clock_udc_{dis,en}able_auto_suspend functions there for such consistency. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: Lars-Peter Clausen <lars@metafoo.de> Cc: Mike Turquette <mturquette@linaro.org> Cc: Stephen Boyd <sboyd@codeaurora.org> Cc: linux-clk@vger.kernel.org Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/10154/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS,clk: move jz4740_clock_set_wait_mode to jz4740-cguPaul Burton2015-06-211-16/+0
| | | | | | | | | | | | | | | | The jz4740-cgu driver already has access to the CGU, so it makes sense to move the few remaining accesses to the CGU from arch/mips/jz4740 there too. Move jz4740_clock_set_wait_mode for such consistency. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: Lars-Peter Clausen <lars@metafoo.de> Cc: Mike Turquette <mturquette@linaro.org> Cc: Stephen Boyd <sboyd@codeaurora.org> Cc: linux-clk@vger.kernel.org Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/10153/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS,clk: migrate JZ4740 to common clock frameworkPaul Burton2015-06-216-967/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Migrate the JZ4740 & the qi_lb60 board to use common clock framework via the new Ingenic SoC CGU driver. Note that the JZ4740-specific debugfs code is removed since common clock framework provides its own debug capabilities. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Co-authored-by: Paul Cercueil <paul@crapouillou.net> Cc: Ian Campbell <ijc+devicetree@hellion.org.uk> Cc: Kumar Gala <galak@codeaurora.org> Cc: Lars-Peter Clausen <lars@metafoo.de> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Mike Turquette <mturquette@linaro.org> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: Stephen Boyd <sboyd@codeaurora.org> Cc: devicetree@vger.kernel.org Cc: linux-clk@vger.kernel.org Cc: linux-mips@linux-mips.org Cc: Fabian Frederick <fabf@skynet.be> Cc: Deng-Cheng Zhu <dengcheng.zhu@imgtec.com> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Stephen Warren <swarren@wwwdotorg.org> Cc: linux-kernel@vger.kernel.org Cc: Brian Norris <computersforpeace@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/10151/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: JZ4740: replace use of jz4740_clock_bdataPaul Burton2015-06-213-4/+29
| | | | | | | | | | | | | | | Replace uses of the jz4740_clock_bdata struct with calls to clk_get_rate for the appropriate clock. This is in preparation for migrating the clocks towards common clock framework & devicetree. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: Lars-Peter Clausen <lars@metafoo.de> Cc: linux-mips@linux-mips.org Cc: Deng-Cheng Zhu <dengcheng.zhu@imgtec.com> Cc: linux-kernel@vger.kernel.org Cc: Apelete Seketeli <apelete@seketeli.net> Patchwork: https://patchwork.linux-mips.org/patch/10149/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: JZ4740: Call jz4740_clock_init earlierPaul Burton2015-06-212-2/+3
| | | | | | | | | | | | | | | Call jz4740_clock_init before any uses of jz4740_clock_bdata occur. This is in preparation for replacing uses of that struct with calls to clk_get_rate, which will allow the clocks to be migrated towards common clock framework & devicetree. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: Lars-Peter Clausen <lars@metafoo.de> Cc: linux-mips@linux-mips.org Cc: Deng-Cheng Zhu <dengcheng.zhu@imgtec.com> Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/10148/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS/IRQCHIP: Move Ingenic SoC intc driver to drivers/irqchipPaul Burton2015-06-214-204/+2
| | | | | | | | | | | | | | | Move the driver for Ingenic SoC interrupt controllers into drivers/irqchip where it belongs. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: Lars-Peter Clausen <lars@metafoo.de> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Jason Cooper <jason@lakedaemon.net> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Cc: Brian Norris <computersforpeace@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/10147/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: JZ4740: support newer SoC interrupt controllersPaul Burton2015-06-211-0/+9
| | | | | | | | | | | | | | | Allow the interrupt controllers of the JZ4770, JZ4775 & JZ4780 SoCs to be probed via devicetree, supporting the 64 interrupts they provide. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: Lars-Peter Clausen <lars@metafoo.de> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Jason Cooper <jason@lakedaemon.net> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Cc: Brian Norris <computersforpeace@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/10155/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: JZ4740: Avoid JZ4740-specific namingPaul Burton2015-06-213-16/+16
| | | | | | | | | | | | | | Rename the functions including jz4740 in their names to be more generic in preparation for supporting further SoCs, and for moving this interrupt controller code to drivers/irqchip. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Cc: Brian Norris <computersforpeace@gmail.com> Cc: Lars-Peter Clausen <lars@metafoo.de> Patchwork: https://patchwork.linux-mips.org/patch/10146/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: JZ4740: read intc base address from DTPaul Burton2015-06-211-3/+6
| | | | | | | | | | | | | | | | Read the base address of the SoC interrupt controller from the device tree rather than relying upon the JZ4740_INTC_BASE_ADDR macro, in order to remove the dependency on the asm/mach-jz4740/base.h header. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: Lars-Peter Clausen <lars@metafoo.de> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Jason Cooper <jason@lakedaemon.net> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Cc: Brian Norris <computersforpeace@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/10145/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: JZ4740: support >32 interruptsPaul Burton2015-06-211-25/+46
| | | | | | | | | | | | | | | | | | | On newer Ingenic SoCs the interrupt controller supports more than 32 interrupts, which it does by duplicating the registers at intervals of 0x20 bytes within its address space. Add support for an arbitrary number of interrupts using multiple generic chips, and provide the number of chips to register from the interrupt controller probe function. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: Lars-Peter Clausen <lars@metafoo.de> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Jason Cooper <jason@lakedaemon.net> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Cc: Brian Norris <computersforpeace@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/10141/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: JZ4740: Remove jz_intc_base globalPaul Burton2015-06-211-8/+31
| | | | | | | | | | | | | | | Avoid the need for the global variable jz_intc_base by introducing a struct ingenic_intc_data and passing it around as the IRQ handler data. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: Lars-Peter Clausen <lars@metafoo.de> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Jason Cooper <jason@lakedaemon.net> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Cc: Brian Norris <computersforpeace@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/10144/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: JZ4740: drop intc debugfs codePaul Burton2015-06-211-42/+0
| | | | | | | | | | | | | | | | | The debugfs code becomes a nuisance when attempting to avoid globals, since the interrupt controller probe function run too early for it to be safe to create the debugfs files. Drop it. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: Lars-Peter Clausen <lars@metafoo.de> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Jason Cooper <jason@lakedaemon.net> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Cc: Brian Norris <computersforpeace@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/10139/ Acked-by: Lars-Peter Clausen <lars@metafoo.de> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: JZ4740: register an irq_domain for the interrupt controllerPaul Burton2015-06-211-0/+6
| | | | | | | | | | | | | | | | When probing the interrupt controller, register an IRQ domain such that the interrupts can be translated by devicetree code & thus used from devicetree. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: Lars-Peter Clausen <lars@metafoo.de> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Jason Cooper <jason@lakedaemon.net> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Cc: Brian Norris <computersforpeace@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/10140/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: JZ4740: parse SoC interrupt controller parent IRQ from DTPaul Burton2015-06-211-1/+6
| | | | | | | | | | | | | | | | Rather than hardcoding the IRQ number used to cascade interrupts from the SoC interrupt controller to the CPU interrupt controller, read that IRQ number from the DT describing the system. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: Lars-Peter Clausen <lars@metafoo.de> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Jason Cooper <jason@lakedaemon.net> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Cc: Brian Norris <computersforpeace@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/10137/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: JZ4740: probe interrupt controller via DTPaul Burton2015-06-212-3/+7
| | | | | | | | | | | | | | | | | | | | | | Declare the JZ4740 interrupt controller for probe via DT using the standard irqchip_init function, and make use of that function to probe the controller by adding the appropriate node to the JZ4740 dtsi. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: Ian Campbell <ijc+devicetree@hellion.org.uk> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Kumar Gala <galak@codeaurora.org> Cc: Lars-Peter Clausen <lars@metafoo.de> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: devicetree@vger.kernel.org Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Cc: Brian Norris <computersforpeace@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/10135/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: JZ4740: Move arch_init_irq out of arch/mips/jz4740/irq.cPaul Burton2015-06-212-4/+9
| | | | | | | | | | | | | | In preparation for moving the JZ4740 interrupt controller driver to drivers/irqchip, move arch_init_irq into setup.c such that everything remaining in irq.c is related to said JZ4740 interrupt controller. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: Lars-Peter Clausen <lars@metafoo.de> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Cc: Brian Norris <computersforpeace@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/10136/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: JZ4740: use generic plat_irq_dispatchPaul Burton2015-06-211-12/+0
| | | | | | | | | | | | | | Make use of the generic plat_irq_dispatch function introduced by commit 85f7cdacbb81 "MIPS: Provide a generic plat_irq_dispatch", in order to reduce unnecessary code duplication. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: Lars-Peter Clausen <lars@metafoo.de> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Cc: Brian Norris <computersforpeace@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/10138/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: JZ4740: probe CPU interrupt controller via DTPaul Burton2015-06-211-2/+2
| | | | | | | | | | | | | | | | | | | | | Use the generic irqchip_init function to probe irqchip drivers using DT, and add the appropriate node to the JZ4740 devicetree in place of the call to mips_cpu_irq_init. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: Ian Campbell <ijc+devicetree@hellion.org.uk> Cc: Kumar Gala <galak@codeaurora.org> Cc: Lars-Peter Clausen <lars@metafoo.de> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: devicetree@vger.kernel.org Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Cc: Brian Norris <computersforpeace@gmail.com> Cc: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Patchwork: https://patchwork.linux-mips.org/patch/10166/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: JZ4740: require & include DTPaul Burton2015-06-211-0/+19
| | | | | | | | | | | | | | | | | | | | Require a DT for JZ4740 based systems, and add a stub one for the qi_lb60 (Ben NanoNote) board. Devices will be migrated to being probed via this DT over time. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: Ian Campbell <ijc+devicetree@hellion.org.uk> Cc: Kumar Gala <galak@codeaurora.org> Cc: Lars-Peter Clausen <lars@metafoo.de> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: devicetree@vger.kernel.org Cc: linux-mips@linux-mips.org Cc: Andrew Bresticker <abrestic@chromium.org> Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/10132/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: JZ4740: introduce CONFIG_MACH_INGENICPaul Burton2015-06-212-5/+10
| | | | | | | | | | | | | | In preparation for supporting Ingenic SoCs other than the JZ4740, introduce MACH_INGENIC to Kconfig & move MACH_JZ4740 to a separate entry selected by the board when appropriate. This allows MACH_INGENIC to be used to enable things generic across Ingenic SoCs. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Cc: Andrew Bresticker <abrestic@chromium.org> Patchwork: https://patchwork.linux-mips.org/patch/10130/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: jz4740: Implement read_sched_clockDeng-Cheng Zhu2015-04-011-0/+8
| | | | | | | | | | | Use jz4740 timer counter for sched_clock source. This implementation will give high resolution cputime accounting. Signed-off-by: Deng-Cheng Zhu <dengcheng.zhu@imgtec.com> Cc: linux-mips@linux-mips.org Cc: macro@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/9485/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Allow platforms to specify the decompressor load addressAndrew Bresticker2015-03-311-0/+1
| | | | | | | | | | | | | | | | | | | | Platforms which use raw zboot images may need to link the image at a fixed address if there is no other way to communicate the load address to the bootloader. Allow the per-platform Kbuild files to specify an optional zboot image load address (zload-y) and fall back to calc_vmlinuz_load_addr if unset. Signed-off-by: Andrew Bresticker <abrestic@chromium.org> Cc: Lars-Peter Clausen <lars@metafoo.de> Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: linux-mips@linux-mips.org Cc: Andrew Bresticker <abrestic@chromium.org> Cc: Ezequiel Garcia <ezequiel.garcia@imgtec.com> Cc: James Hartley <james.hartley@imgtec.com> Cc: James Hogan <james.hogan@imgtec.com> Patchwork: https://patchwork.linux-mips.org/patch/9566/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* Merge tag 'for-linus-20150216' of git://git.infradead.org/linux-mtdLinus Torvalds2015-02-181-1/+10
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull MTD updates from Brian Norris: "NAND: - Add new Hisilicon NAND driver for Hip04 - Add default reboot handler, to ensure all outstanding erase transactions complete in time - jz4740: convert to use GPIO descriptor API - Atmel: add support for sama5d4 - Change default bitflip threshold to 75% of correction strength - Miscellaneous cleanups and bugfixes SPI NOR: - Freescale QuadSPI: - Fix a few probe() and remove() issues - Add a MAINTAINERS entry for this driver - Tweak transfer size to increase read performance - Add suspend/resume support - Add Micron quad I/O support - ST FSM SPI: miscellaneous fixes JFFS2: - gracefully handle corrupted 'offset' field found on flash Other: - bcm47xxpart: add tweaks for a few new devices - mtdconcat: set return lengths properly for mtd_write_oob() - map_ram: enable use with mtdoops - maps: support fallback to ROM/UBI for write-protected NOR flash" * tag 'for-linus-20150216' of git://git.infradead.org/linux-mtd: (46 commits) mtd: hisilicon: && vs & typo jffs2: fix handling of corrupted summary length mtd: hisilicon: add device tree binding documentation mtd: hisilicon: add a new NAND controller driver for hisilicon hip04 Soc mtd: avoid registering reboot notifier twice mtd: concat: set the return lengths properly mtd: kconfig: replace PPC_OF with PPC mtd: denali: remove unnecessary stubs mtd: nand: remove redundant local variable MAINTAINERS: add maintainer entry for FREESCALE QUAD SPI driver mtd: fsl-quadspi: improve read performance by increase AHB transfer size mtd: fsl-quadspi: Remove unnecessary 'map_failed' label mtd: fsl-quadspi: Remove unneeded success/error messages mtd: fsl-quadspi: Fix the error paths mtd: nand: omap: drop condition with no effect mtd: nand: jz4740: Convert to GPIO descriptor API mtd: nand: Request strength instead of bytes for soft BCH mtd: nand: default bitflip-reporting threshold to 75% of correction strength mtd: atmel_nand: introduce a new compatible string for sama5d4 chip mtd: atmel_nand: return max bitflips in all sectors in pmecc_correction() ...
| * mtd: nand: jz4740: Convert to GPIO descriptor APILars-Peter Clausen2015-02-021-1/+10
| | | | | | | | | | | | | | | | | | | | | | | | Use the GPIO descriptor API instead of the deprecated legacy GPIO API to manage the busy GPIO. The patch updates both the jz4740 nand driver and the only user of the driver the qi-lb60 board driver. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Acked-by: Ralf Baechle <ralf@linux-mips.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* | MIPS: JZ4740: Fixup #include's (sparse)Brian Norris2015-01-131-0/+3
|/ | | | | | | | | | | | | | | | | | Fixes sparse warnings: arch/mips/jz4740/irq.c:63:6: warning: symbol 'jz4740_irq_suspend' was not declared. Should it be static? arch/mips/jz4740/irq.c:69:6: warning: symbol 'jz4740_irq_resume' was not declared. Should it be static? Also, I've seen some elusive build errors on my automated build test where JZ4740_IRQ_BASE and NR_IRQS are missing, but I can't reproduce them manually for some reason. Anyway, mach-jz4740/irq.h should help us avoid relying on some implicit include. Signed-off-by: Brian Norris <computersforpeace@gmail.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/8724/ Acked-by: Lars-Peter Clausen <lars@metafoo.de> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Replace use of phys_t with phys_addr_t.Ralf Baechle2014-11-241-1/+1
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* Merge tag 'gpio-v3.17-1' of ↵Linus Torvalds2014-08-081-0/+1
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio Pull GPIO update from Linus Walleij: "This is the bulk of GPIO changes for the v3.17 development cycle, and this time we got a lot of action going on and it will continue: - The core GPIO library implementation has been split up in three different files: - gpiolib.c for the latest and greatest and shiny GPIO library code using GPIO descriptors only - gpiolib-legacy.c for the old integer number space API that we are phasing out gradually - gpiolib-sysfs.c for the sysfs interface that we are not entirely happy with, but has to live on for ABI compatibility - Add a flags argument to *gpiod_get* functions, with some backward-compatibility macros to ease transitions. We should have had the flags there from the beginning it seems, now we need to clean up the mess. There is a plan on how to move forward here devised by Alexandre Courbot and Mark Brown - Split off a special <linux/gpio/machine.h> header for the board gpio table registration, as per example from the regulator subsystem - Start to kill off the return value from gpiochip_remove() by removing the __must_check attribute and removing all checks inside the drivers/gpio directory. The rationale is: well what were we supposed to do if there is an error code? Not much: print an error message. And gpiolib already does that. So make this function return void eventually - Some cleanups of hairy gpiolib code, make some functions not to be used outside the library private and make sure they are not exported, remove gpiod_lock/unlock_as_irq() as the existing function is for driver-internal use and fine as it is, delete gpio_ensure_requested() as it is not meaningful anymore - Support the GPIOF_ACTIVE_LOW flag from gpio_request_one() function calls, which is logical since this is already supported when referencing GPIOs from e.g. device trees - Switch STMPE, intel-mid, lynxpoint and ACPI (!) to use the gpiolib irqchip helpers cutting down on GPIO irqchip boilerplate a bit more - New driver for the Zynq GPIO block - The usual incremental improvements around a bunch of drivers - Janitorial syntactic and semantic cleanups by Jingoo Han, and Rickard Strandqvist especially" * tag 'gpio-v3.17-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio: (37 commits) MAINTAINERS: update GPIO include files gpio: add missing includes in machine.h gpio: add flags argument to gpiod_get*() functions MAINTAINERS: Update Samsung pin control entry gpio / ACPI: Move event handling registration to gpiolib irqchip helpers gpio: lynxpoint: Convert to use gpiolib irqchip gpio: split gpiod board registration into machine header gpio: remove gpio_ensure_requested() gpio: remove useless check in gpiolib_sysfs_init() gpiolib: Export gpiochip_request_own_desc and gpiochip_free_own_desc gpio: move gpio_ensure_requested() into legacy C file gpio: remove gpiod_lock/unlock_as_irq() gpio: make gpiochip_get_desc() gpiolib-private gpio: simplify gpiochip_export() gpio: remove export of private of_get_named_gpio_flags() gpio: Add support for GPIOF_ACTIVE_LOW to gpio_request_one functions gpio: zynq: Clear pending interrupt when enabling a IRQ gpio: drop retval check enforcing from gpiochip_remove() gpio: remove all usage of gpio_remove retval in driver/gpio devicetree: Add Zynq GPIO devicetree bindings documentation ...
| * gpio: split gpiod board registration into machine headerLinus Walleij2014-07-281-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As per example from the regulator subsystem: put all defines and functions related to registering board info for GPIO descriptors into a separate <linux/gpio/machine.h> header. Cc: Andrew Victor <linux@maxim.org.za> Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: Jean-Christophe Plagniol-Villard <plagnioj@jcrosoft.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Thierry Reding <thierry.reding@gmail.com> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Reviewed-by: Alexandre Courbot <gnurou@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | Merge branch '3.16-fixes' into mips-for-linux-nextRalf Baechle2014-08-021-1/+1
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