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path:
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arch
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mips
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kernel
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octeon_switch.S
Commit message (
Expand
)
Author
Age
Files
Lines
*
MIPS: Fix octeon FP context switch handling
Paul Burton
2015-10-02
1
-25
/
+1
*
MIPS: OCTEON: Delete unused COP2 saving code
Aleksey Makarov
2015-02-20
1
-26
/
+0
*
MIPS: OCTEON: Use correct instruction to read 64-bit COP0 register
Chandrakala Chavva
2015-02-20
1
-3
/
+3
*
MIPS: OCTEON: Save and restore CP2 SHA3 state
David Daney
2015-02-20
1
-11
/
+32
*
MIPS: OCTEON: Fix FP context save.
David Daney
2015-02-20
1
-12
/
+7
*
MIPS: OCTEON: Save/Restore wider multiply registers in OCTEON III CPUs
David Daney
2015-02-20
1
-30
/
+98
*
MIPS: OCTEON: Enable use of FPU
David Daney
2014-05-30
1
-23
/
+61
*
MIPS: stack protector: Fix per-task canary switch
James Hogan
2013-10-07
1
-1
/
+1
*
MIPS: r4k,octeon,r2300: stack protector: change canary per task
Gregory Fong
2013-07-01
1
-0
/
+7
*
MIPS: Move cop2 save/restore to switch_to()
Jayachandran C
2013-06-13
1
-27
/
+0
*
MIPS: Whitespace cleanup.
Ralf Baechle
2013-02-01
1
-52
/
+52
*
MIPS: Don't include <asm/page.h> unnecessarily.
Ralf Baechle
2012-12-28
1
-1
/
+0
*
MIPS: Fix race condition with FPU thread task flag during context switch.
Leonid Yegoshin
2012-07-19
1
-1
/
+1
*
update David Miller's old email address
Justin P. Mattock
2011-04-06
1
-1
/
+1
*
MIPS: Nuke trailing blank lines
Ralf Baechle
2010-02-27
1
-1
/
+0
*
MIPS: Consolidate all CONFIG_CPU_HAS_LLSC use in a single C file.
Ralf Baechle
2009-09-17
1
-3
/
+0
*
MIPS: Add Cavium OCTEON processor support files to arch/mips/cavium-octeon.
David Daney
2009-01-11
1
-0
/
+506