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| * MIPS: Loongson-3: Fast TLB refill handlerHuacai Chen2016-05-131-1/+1
| * MIPS: Loongson: Invalidate special TLBs when neededHuacai Chen2016-05-131-0/+3
| * MIPS: Loongson: Add Loongson-3A R2 basic supportHuacai Chen2016-05-133-2/+44
| * MIPS: Add and use watch register field definitionsJames Hogan2016-05-132-36/+45
| * MIPS: Add and use CAUSEF_WP definitionJames Hogan2016-05-131-4/+1
| * MIPS: module: fix incorrect IS_ERR_VALUE macro usagesAndrzej Hajda2016-05-132-2/+2
| * MIPS: BMIPS: Pretty print BMIPS5200 processor nameFlorian Fainelli2016-05-131-1/+4
| * MIPS: KASLR: Print relocation Information on bootMatt Redfearn2016-05-131-0/+9
| * MIPS: Kernel: Implement KASLR using CONFIG_RELOCATABLEMatt Redfearn2016-05-131-0/+146
| * MIPS: bootmem: When relocatable, free memory below kernelMatt Redfearn2016-05-131-0/+14
| * MIPS: Call relocate_kernel if CONFIG_RELOCATABLE=yMatt Redfearn2016-05-131-0/+20
| * MIPS: Kernel: Add relocate.cMatt Redfearn2016-05-132-0/+242
| * MIPS: Reserve space for relocation tableMatt Redfearn2016-05-131-0/+21
| * MIPS: scall: Handle seccomp filters which redirect syscallsMatt Redfearn2016-05-134-18/+24
| * MIPS: Support sending SIG_SYS to 32bit userspace from 64bit kernelMatt Redfearn2016-05-131-0/+6
| * MIPS: Detect DSP v3 supportZubair Lutfullah Kakakhel2016-05-132-1/+5
| * MIPS: BMIPS: Add early CPU initialization codeFlorian Fainelli2016-05-131-0/+87
| * MIPS: Make flush_threadRalf Baechle2016-05-131-4/+0
| * MIPS: Support R_MIPS_PC{16,21,26} rel-style relocsPaul Burton2016-05-131-1/+50
| * MIPS: Support R_MIPS_PC{21,26} rela-style relocsPaul Burton2016-05-131-1/+47
| * MIPS: module: Make consistent use of pr_*()Steven J. Hill2016-05-132-9/+6
| * MIPS: Probe the M6250 CPUPaul Burton2016-05-131-0/+4
| * MIPS: Probe the P6600 corePaul Burton2016-05-131-0/+4
| * MIPS: Add P6600 cases to CPU switch statementsPaul Burton2016-05-134-0/+9
| * MIPS: smp-cps: Stop printing EJTAG exceptions to UARTPaul Burton2016-05-131-1/+0
| * MIPS: smp-cps: Add nothreads kernel parameterPaul Burton2016-05-131-0/+11
| * MIPS: smp-cps: Support MIPSr6 Virtual ProcessorsPaul Burton2016-05-132-6/+82
| * MIPS: smp-cps: Skip core setup if coherentPaul Burton2016-05-131-15/+24
| * MIPS: smp-cps: Pull boot config retrieval out of mips_cps_boot_vpesPaul Burton2016-05-132-30/+51
| * MIPS: smp-cps: Pull cache init into a functionPaul Burton2016-05-131-67/+76
| * MIPS: smp-cps: Ensure our VP ident calculation is correctPaul Burton2016-05-131-0/+11
| * MIPS: pm-cps: Avoid offset overflow on MIPSr6Markos Chandras2016-05-131-4/+11
| * MIPS: traps: Make sure secondary cores have a sane ebase registerMarkos Chandras2016-05-131-0/+7
| * MIPS: Detect MIPSr6 Virtual Processor supportPaul Burton2016-05-131-0/+2
| * MIPS: panic immediately when panic_on_oopsAaro Koskinen2016-05-131-4/+1
| * MIPS: Add CPU identifiers and probing for Cavium CN73xx and CNF75xx processors.David Daney2016-05-131-0/+2
| * MIPS: Use copy_s.fmt rather than copy_u.fmtPaul Burton2016-05-091-5/+5
| * MIPS64: R6: R2 emulation bugfixLeonid Yegoshin2016-05-091-52/+53
| * MIPS: Reserve nosave data for hibernationHuacai Chen2016-05-091-0/+3
| * MIPS: Fix watchpoint restorationJames Hogan2016-05-092-4/+3
| * MIPS: Avoid using unwind_stack() with usermodeJames Hogan2016-05-091-1/+1
| * MIPS: Don't unwind to user mode with EVAJames Hogan2016-05-091-1/+1
| * MIPS: BMIPS: Fill in current_cpu_data.coreFlorian Fainelli2016-05-091-0/+1
| * MIPS: BMIPS: Make whitespacely correct.Ralf Baechle2016-05-091-136/+136
| * MIPS: BMIPS: Add Whirlwind (BMIPS5200) initialization codeFlorian Fainelli2016-05-093-4/+792
| * MIPS: BMIPS: Fix PRID_IMP_BMIPS5000 masking for BMIPS5200Florian Fainelli2016-05-091-2/+7
| * MIPS: Don't BUG_ON when no IPI domain is foundPaul Burton2016-05-091-13/+11
| * MIPS: Fix crash registers on non-crashing CPUsCorey Minyard2016-05-091-3/+13
* | perf core: Allow setting up max frame stack depth via sysctlArnaldo Carvalho de Melo2016-04-271-2/+2
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* MIPS: traps.c: Verify the ISA for microMIPS RDHWR emulationMaciej W. Rozycki2016-04-041-13/+13
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