| Commit message (Expand) | Author | Age | Files | Lines |
* | MIPS: math-emu: Add support for the MIPS R6 MAX{, A} FPU instruction | Markos Chandras | 2015-09-03 | 1 | -0/+48 |
* | MIPS: math-emu: Add support for the MIPS R6 MIN{, A} FPU instruction | Markos Chandras | 2015-09-03 | 1 | -0/+48 |
* | MIPS: math-emu: Add support for the MIPS R6 CLASS FPU instruction | Markos Chandras | 2015-09-03 | 1 | -0/+24 |
* | MIPS: math-emu: Add support for the MIPS R6 RINT FPU instruction | Markos Chandras | 2015-09-03 | 1 | -0/+24 |
* | MIPS: math-emu: Add support for the MIPS R6 MSUBF FPU instruction | Markos Chandras | 2015-09-03 | 1 | -0/+26 |
* | MIPS: math-emu: Add support for the MIPS R6 MADDF FPU instruction | Markos Chandras | 2015-09-03 | 1 | -0/+26 |
* | MIPS: math-emu: Add support for the MIPS R6 SELNEZ FPU instruction | Markos Chandras | 2015-09-03 | 1 | -0/+22 |
* | MIPS: math-emu: Add support for the MIPS R6 SELEQZ FPU instruction | Markos Chandras | 2015-09-03 | 1 | -0/+23 |
* | MIPS: math-emu: Add support for the CMP.condn.fmt R6 instruction | Markos Chandras | 2015-09-03 | 1 | -9/+121 |
* | MIPS: math-emu: Emulate missing BC1{EQ,NE}Z instructions | Markos Chandras | 2015-09-03 | 1 | -1/+19 |
* | MIPS: math-emu: Allow m{f,t}hc emulation on MIPS R6 | Markos Chandras | 2015-09-03 | 1 | -2/+2 |
* | MIPS: cp1emu: Fix closing bracket for the d_fmt case | Markos Chandras | 2015-09-03 | 1 | -1/+4 |
* | MIPS: Fix erroneous JR emulation for MIPS R6 | Markos Chandras | 2015-07-09 | 1 | -1/+1 |
* | MIPS: Fix branch emulation for BLTC and BGEC instructions | Markos Chandras | 2015-07-09 | 1 | -2/+2 |
* | MIPS: Fix a preemption issue with thread's FPU defaults | Maciej W. Rozycki | 2015-05-12 | 1 | -2/+2 |
* | MIPS: Respect the ISA level in FCSR handling | Maciej W. Rozycki | 2015-04-08 | 1 | -3/+4 |
* | MIPS: math-emu: Define IEEE 754-2008 feature control bits | Maciej W. Rozycki | 2015-04-08 | 1 | -2/+3 |
* | MIPS: math-emu: Implement the FCCR, FEXR and FENR registers | Maciej W. Rozycki | 2015-04-08 | 1 | -15/+91 |
* | MIPS: math-emu: Set FIR feature flags for full emulation | Maciej W. Rozycki | 2015-04-08 | 1 | -1/+2 |
* | MIPS: math-emu: Correct delay-slot exception propagation | Maciej W. Rozycki | 2015-04-08 | 1 | -5/+29 |
* | MIPS: Correct FP ISA requirements | Maciej W. Rozycki | 2015-04-08 | 1 | -28/+27 |
* | MIPS: math-emu: Factor out CFC1/CTC1 emulation | Maciej W. Rozycki | 2015-04-08 | 1 | -28/+48 |
* | MIPS: math-emu: Remove `modeindex' macro | Maciej W. Rozycki | 2015-04-08 | 1 | -18/+8 |
* | MIPS: math-emu: Reindent `bc_op' emulation | Maciej W. Rozycki | 2015-04-08 | 1 | -11/+11 |
* | MIPS: Handle MIPS IV, V and R2 FPU instructions on MIPS R6 as well | Markos Chandras | 2015-02-17 | 1 | -4/+4 |
* | MIPS: kernel: mips-r2-to-r6-emul: Add R2 emulator for MIPS R6 | Leonid Yegoshin | 2015-02-17 | 1 | -1/+2 |
* | MIPS: Emulate the new MIPS R6 BNEZC and JIALC instructions | Markos Chandras | 2015-02-17 | 1 | -0/+9 |
* | MIPS: Emulate the new MIPS R6 BEQZC and JIC instructions | Markos Chandras | 2015-02-17 | 1 | -0/+7 |
* | MIPS: Emulate the new MIPS R6 BALC instruction | Markos Chandras | 2015-02-17 | 1 | -0/+8 |
* | MIPS: Emulate the new MIPS R6 BNVC, BNEC and BNEZLAC instructions | Markos Chandras | 2015-02-17 | 1 | -0/+1 |
* | MIPS: Emulate the new MIPS R6 BOVC, BEQC and BEQZALC instructions | Markos Chandras | 2015-02-17 | 1 | -0/+9 |
* | MIPS: Emulate the new MIPS R6 branch compact (BC) instruction | Markos Chandras | 2015-02-17 | 1 | -0/+13 |
* | MIPS: Emulate the new MIPS R6 B{L,G}T{Z,}{AL,}C instructions | Markos Chandras | 2015-02-17 | 1 | -0/+25 |
* | MIPS: Emulate the new MIPS R6 B{L,G}Ε{Z,}{AL,}C instructions | Markos Chandras | 2015-02-17 | 1 | -0/+24 |
* | MIPS: Emulate the BC1{EQ,NE}Z FPU instructions | Markos Chandras | 2015-02-17 | 1 | -0/+27 |
* | MIPS: kernel: branch: Do not emulate the branch likelies on MIPS R6 | Markos Chandras | 2015-02-17 | 1 | -6/+26 |
* | MIPS: kernel: Prepare the JR instruction for emulation on MIPS R6 | Markos Chandras | 2015-02-17 | 1 | -0/+3 |
* | MIPS: Support for hybrid FPRs | Paul Burton | 2014-11-24 | 1 | -2/+7 |
* | MIPS: Fix build with binutils 2.24.51+ | Manuel Lauss | 2014-11-07 | 1 | -5/+1 |
* | MIPS: cp1emu: Fix ISA restrictions for cop1x_op instructions | Markos Chandras | 2014-10-21 | 1 | -2/+2 |
* | MIPS: Fix MFC1 & MFHC1 emulation for 64-bit MIPS systems | Paul Burton | 2014-09-26 | 1 | -3/+3 |
* | MIPS: math-emu: Fix instruction decoding. | Rob Kendrick | 2014-07-30 | 1 | -1/+1 |
* | MIPS: OCTEON: Enable use of FPU | David Daney | 2014-05-30 | 1 | -1/+5 |
* | MIPS: math-emu: Add IEEE754 exception statistics to debugfs | Deng-Cheng Zhu | 2014-05-30 | 1 | -9/+27 |
* | MIPS: math-emu: Reduce microMIPS bloat. | Ralf Baechle | 2014-05-23 | 1 | -0/+7 |
* | MIPS: math-emu: Switch to using the MIPS rounding modes. | Ralf Baechle | 2014-05-23 | 1 | -28/+7 |
* | MIPS: Sort out mm_isBranchInstr. | Ralf Baechle | 2014-05-23 | 1 | -201/+0 |
* | MIPS: math-emu: Cleanup coding style. | Ralf Baechle | 2014-05-23 | 1 | -177/+121 |
* | MIPS: math-emu: Convert debug printks to pr_debug getting. | Ralf Baechle | 2014-05-23 | 1 | -10/+6 |
* | MIPS: math-emu: Remove most ifdefery. | Ralf Baechle | 2014-05-21 | 1 | -76/+128 |