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path:
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arch
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mips
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mm
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tlb-r4k.c
Commit message (
Expand
)
Author
Age
Files
Lines
*
MIPS: Only write c0_framemask on CPUs which have this register.
Ralf Baechle
2009-01-11
1
-1
/
+4
*
[MIPS] All MIPS32 processors support64-bit physical addresses.
Chris Dearman
2008-04-28
1
-1
/
+1
*
[MIPS] Fix loads of section missmatches
Ralf Baechle
2008-03-12
1
-4
/
+4
*
[MIPS] Fix typo in comment
Thiemo Seufer
2008-03-12
1
-1
/
+1
*
[MIPS] Fix "no space between function name and open parenthesis" warnings.
Ralf Baechle
2007-10-11
1
-1
/
+1
*
[MIPS] define Hit_Invalidate_I to Index_Invalidate_I for loongson2
Fuxin Zhang
2007-07-10
1
-1
/
+22
*
[MIPS] Delete duplicate call to load_irq_save.
Ralf Baechle
2007-01-19
1
-1
/
+0
*
[MIPS] Replace BARRIER with more appropriate hazard barrier.
Ralf Baechle
2006-09-27
1
-13
/
+8
*
Remove obsolete #include <linux/config.h>
Jörn Engel
2006-06-30
1
-1
/
+0
*
[MIPS] Remove prototype for non-existing function.
Ralf Baechle
2006-06-19
1
-1
/
+0
*
[MIPS] MT: Improved multithreading support.
Ralf Baechle
2006-04-19
1
-17
/
+68
*
[MIPS] Kill tlb-andes.c.
Thiemo Seufer
2006-03-21
1
-0
/
+5
*
Rename CONFIG_CPU_MIPS{32,64} to CONFIG_CPU_MIPS{32|64}_R1.
Ralf Baechle
2005-10-29
1
-1
/
+1
*
Fix race conditions for read_c0_entryhi. Remove broken ASID masks in
Thiemo Seufer
2005-10-29
1
-20
/
+29
*
Update MIPS to use the 4-level pagetable code thereby getting rid of
Ralf Baechle
2005-10-29
1
-1
/
+3
*
Formatting fixes.
Maciej W. Rozycki
2005-10-29
1
-9
/
+10
*
Linux-2.6.12-rc2
v2.6.12-rc2
Linus Torvalds
2005-04-16
1
-0
/
+419