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path: root/arch/mips/mm/tlbex.c
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* MIPS: Add support for the M14Kc core.Steven J. Hill2012-07-061-0/+2
* Disintegrate asm/system.h for MIPSDavid Howells2012-03-281-0/+1
* MIPS: No branches in delay slots for huge pages in handle_tlblDavid Daney2011-09-211-1/+2
* MIPS: tlbex: Fix build error in R3000 code.Ralf Baechle2011-09-211-2/+1
* MIPS: Close races in TLB modify handlers.David Daney2011-07-261-98/+194
* MIPS: Netlogic: Cache, TLB support and feature overrides for XLRJayachandran C2011-05-191-0/+1
* MIPS: tlbex: Fix GCC 4.6.0 build errorRalf Baechle2011-05-101-2/+2
* Fix common misspellingsLucas De Marchi2011-03-311-1/+1
* MIPS: Add an unreachable return statement to satisfy buggy GCCs.David Daney2011-03-141-0/+2
* MIPS: Optimize TLB handlers for Octeon CPUsDavid Daney2011-01-181-51/+310
* MIPS: Use BBIT instructions in TLB handlersDavid Daney2011-01-181-29/+90
* MIPS: Use C0_KScratch (if present) to hold PGD pointer.David Daney2011-01-181-10/+106
* MIPS: Decouple BMIPS CPU support from bcm47xx/bcm63xx SoC codeKevin Cernekee2010-10-291-6/+5
* MIPS: JZ4740: Add base support for Ingenic JZ4740 System-on-a-ChipLars-Peter Clausen2010-08-051-0/+5
* MIPS: Check for accesses beyond the end of the PGD.David Daney2010-04-301-23/+87
* MIPS: Use uasm_i_ds{r,l}l_safe() instead of uasm_i_ds{r,l}l() in tlbex.cDavid Daney2010-04-301-16/+14
* MIPS: Sibyte: Fix M3 TLB exception handler workaround.Ralf Baechle2010-04-121-6/+16
* MIPS: Implement Read Inhibit/eXecute InhibitDavid Daney2010-02-271-28/+141
* MIPS: Use 64-bit stores to c0_entrylo on 64-bit kernels.David Daney2010-02-271-10/+10
* MIPS: Move arch/mips/mm/uasm.h to arch/mips/include/asm/uasm.hFlorian Fainelli2010-02-271-2/+1
* MIPS: Two-level pagetables for 64-bit kernels with 64KB pages.David Daney2010-02-271-0/+2
* MIPS: Cleanup forgotten label_module_alloc in tlbex.cDavid Daney2010-01-121-8/+0
* MIPS: Put PGD in C0_CONTEXT for 64-bit R2 processors.David Daney2009-12-171-3/+25
* MIPS: BCM63xx: Add Broadcom 63xx CPU definitions.Maxime Bizon2009-09-171-0/+4
* MIPS: Shrink the size of tlb handlerWu Fei2009-09-171-49/+0
* MIPS: Build fix - include <linux/smp.h> into all smp_processor_id() users.Ralf Baechle2009-06-241-0/+1
* MIPS: TLB support for hugetlbfs.David Daney2009-06-171-1/+164
* MIPS: Remove unused parameters from iPTE_LW.David Daney2009-06-171-14/+14
* MIPS: Remove dead case label.David Daney2009-06-171-1/+0
* MIPS: Allow R2 CPUs to turn off generation of 'ehb' instructions.David Daney2009-06-171-1/+2
* MIPS: Fold the TLB refill at the vmalloc path if possible.David Daney2009-06-171-24/+49
* MIPS: Replace some magic numbers with symbolic values in tlbex.cDavid Daney2009-06-171-8/+26
* MIPS: Alchemy: MIPS hazard workarounds are not required.Manuel Lauss2009-03-301-1/+1
* MIPS: Alchemy: unify CPU model constants.Manuel Lauss2009-03-301-7/+1
* MIPS: NEC VR5500 processor support fixupShinya Kuribayashi2009-03-111-0/+1
* MIPS: Add Cavium OCTEON slot into proper tlb category.David Daney2009-01-111-0/+1
* [MIPS] Fix WARNING: at kernel/smp.c:290Thomas Bogendoerfer2008-09-051-3/+3
* [MIPS] R4700: Fix build_tlb_probe_entryThomas Bogendoerfer2008-06-051-1/+2
* [MIPS] Add missing 4KEC TLB refill handlerThomas Bogendoerfer2008-04-011-0/+1
* [MIPS] Fix loads of section missmatchesRalf Baechle2008-03-121-35/+35
* [MIPS] Split the micro-assembler from tlbex.c.Thiemo Seufer2008-02-011-959/+341
* [MIPS] Alchemy: Au1210/Au1250 CPU supportManuel Lauss2008-01-291-0/+2
* [MIPS] tlbex.c: cleanup debug codeFranck Bui-Huu2008-01-291-57/+26
* [MIPS] tlbex.c: use __cacheline_aligned instead of __tlb_handler_align Franck Bui-Huu2008-01-291-6/+3
* [MIPS] tlbex.c: cleanup include filesFranck Bui-Huu2008-01-291-6/+0
* [MIPS] tlbex.c: Cleanup __init usages.Franck Bui-Huu2008-01-291-49/+49
* [MIPS] R4000/R4400 daddiu erratum workaroundMaciej W. Rozycki2008-01-291-12/+30
* [MIPS] tlbex: Cleanup handling of R2 hazards in TLB handlers.Ralf Baechle2008-01-291-8/+6
* [MIPS] Revert "[MIPS] tlbex.c: Cleanup __init usage."Ralf Baechle2007-10-131-48/+48
* [MIPS] tlbex.c: Cleanup __init usage.Franck Bui-Huu2007-10-111-48/+48
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