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* MIPS: of/pci: Use of_pci_range_parserAndrew Murray2013-10-291-32/+18
| | | | | | | | | | | | | | | | | This patch converts the pci_load_of_ranges function to use the new common of_pci_range_parser. Signed-off-by: Andrew Murray <amurray@embedded-bits.co.uk> Signed-off-by: Andrew Murray <Andrew.Murray@arm.com> Signed-off-by: Liviu Dudau <Liviu.Dudau@arm.com> Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Reviewed-by: Rob Herring <rob.herring@calxeda.com> Reviewed-by: Grant Likely <grant.likely@secretlab.ca> Tested-by: Linus Walleij <linus.walleij@linaro.org> Cc: linux-mips@linux-mips.org Cc: jason@lakedaemon.net Patchwork: https://patchwork.linux-mips.org/patch/5625/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* PCI: Delay enabling bridges until they're neededYinghai Lu2013-07-251-1/+0
| | | | | | | | | | | | | We currently enable PCI bridges after scanning a bus and assigning resources. This is often done in arch code. This patch changes this so we don't enable a bridge until necessary, i.e., until we enable a PCI device behind the bridge. We do this in the generic pci_enable_device() path, so this also removes the arch-specific code to enable bridges. [bhelgaas: changelog] Signed-off-by: Yinghai Lu <yinghai@kernel.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
* MIPS/PCI: Implement pcibios_get_phb_of_nodeGabor Juhos2013-04-101-1/+7
| | | | | | | | | | | | | | | | | The of_node field of the device assigned to a PCI bus is used during scanning of the PCI bus. However on MIPS, the of_node field is assigned only after the bus has been scanned. Implement the architecture specific version of 'pcibios_get_phb_of_node'. Which ensures that the PCI driver core will initialize the of_node field before starting the scan. Also remove the local assignment of bus->dev.of_node, it is not needed after the patch. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
* Merge branch 'mips-next-3.9' of ↵Ralf Baechle2013-02-211-2/+13
|\ | | | | | | git://git.linux-mips.org/pub/scm/john/linux-john into mips-for-linux-next
| * MIPS: avoid possible resource conflict in register_pci_controllerGabor Juhos2013-02-171-2/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The IO and memory resources of a PCI controller might already have a parent resource set when they are passed to 'register_pci_controller'. If the parent resource is set, the request_resource call will fail due to resource conflict and the current code will not be able to register the PCI controller. Use the parent resource if it is available in the request_resource call to avoid the isssue. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4910/ Signed-off-by: John Crispin <blogic@openwrt.org>
* | MIPS: Whitespace cleanup.Ralf Baechle2013-02-011-2/+2
|/ | | | | | | | Having received another series of whitespace patches I decided to do this once and for all rather than dealing with this kind of patches trickling in forever. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: drivers: remove __dev* attributes.Greg Kroah-Hartman2013-01-031-5/+4
| | | | | | | | | | | | | | CONFIG_HOTPLUG is going away as an option. As a result, the __dev* markings need to be removed. This change removes the use of __devinit, __devexit_p, __devinitdata, and __devexit from these drivers. Based on patches originally written by Bill Pemberton, but redone by me in order to handle some of the coding style issues better, by hand. Cc: Bill Pemberton <wfp5p@virginia.edu> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* mips/PCI: Remove CONFIG_HOTPLUG ifdefsBill Pemberton2012-11-281-2/+0
| | | | | | | | | | | | Remove conditional code based on CONFIG_HOTPLUG being false. It's always on now in preparation of it going away as an option. Signed-off-by: Bill Pemberton <wfp5p@virginia.edu> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Grant Likely <grant.likely@secretlab.ca> Cc: Rob Herring <rob.herring@calxeda.com> Acked-by: Bjorn Helgaas <bhelgaas@google.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* PCI: Provide a default pcibios_update_irq()Thierry Reding2012-09-181-6/+0
| | | | | | | | | Most architectures implement this in exactly the same way. Instead of having each architecture duplicate this function, provide a single implementation in the core and make it a weak symbol so that it can be overridden on architectures where it is required. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
* PCI: Discard __init annotations for pci_fixup_irqs() and related functionsThierry Reding2012-09-181-1/+1
| | | | | | | | | | | Remove the __init annotations in order to keep pci_fixup_irqs() around after init (e.g. for hotplug). This requires the same change for the implementation of pcibios_update_irq() on all architectures. While at it, all __devinit annotations are removed as well, since they will be useless now that HOTPLUG is always on. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* Merge branch 'pci/myron-pcibios_setup' into nextBjorn Helgaas2012-07-051-2/+2
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * pci/myron-pcibios_setup: xtensa/PCI: factor out pcibios_setup() x86/PCI: adjust section annotations for pcibios_setup() unicore32/PCI: adjust section annotations for pcibios_setup() tile/PCI: factor out pcibios_setup() sparc/PCI: factor out pcibios_setup() sh/PCI: adjust section annotations for pcibios_setup() sh/PCI: factor out pcibios_setup() powerpc/PCI: factor out pcibios_setup() parisc/PCI: factor out pcibios_setup() MIPS/PCI: adjust section annotations for pcibios_setup() MIPS/PCI: factor out pcibios_setup() microblaze/PCI: factor out pcibios_setup() ia64/PCI: factor out pcibios_setup() cris/PCI: factor out pcibios_setup() alpha/PCI: factor out pcibios_setup() PCI: pull pcibios_setup() up into core
| * MIPS/PCI: adjust section annotations for pcibios_setup()Myron Stowe2012-07-051-2/+2
| | | | | | | | | | | | Make pcibios_setup() consistently use the "__init" section annotation. Signed-off-by: Myron Stowe <myron.stowe@redhat.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
* | PCI: replace struct pci_bus secondary/subordinate with busn_resYinghai Lu2012-06-131-1/+1
|/ | | | | | | | | Replace the struct pci_bus secondary/subordinate members with the struct resource busn_res. Later we'll build a resource tree of these bus numbers. [bhelgaas: changelog] Signed-off-by: Yinghai Lu <yinghai@kernel.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
* MIPS: pci: parse memory ranges from devicetreeJohn Crispin2012-05-151-0/+55
| | | | | | | | | | | Implement pci_load_of_ranges on MIPS. Due to lack of test hardware only 32bit bus width is supported. This function is based on pci_process_bridge_OF_ranges from powerpc. Signed-off-by: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3729/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* mips/PCI: get rid of device resource fixupsBjorn Helgaas2012-02-231-67/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Tell the PCI core about host bridge address translation so it can take care of bus-to-resource conversion for us. Here's the wrinkle on Cobalt: we can't generate normal I/O port addresses on PCI because the GT-64111 doesn't do any address translation, so we have this: CPU I/O port addresses [io 0x0000-0xffffff] PCI bus I/O port addresses [io 0x10000000-0x10ffffff] Legacy-mode IDE controllers start out with the legacy bus addresses, e.g., 0x1f0, assigned by pci_setup_device(). These are outside the range of addresses GT-64111 can generate on PCI, but pcibios_fixup_device_resources() converted them to CPU addresses anyway by adding io_offset. Therefore, we had to pre-adjust them in cobalt_legacy_ide_fixup(). With io_offset = 0xf0000000, we had this: res->start = 0x1f0 initialized in pci_setup_device() res->start = 0x100001f0 -= io_offset in cobalt_legacy_ide_fixup() res->start = 0x1f0 += io_offset in pcibios_fixup_device_resources() The difference after this patch is that the generic pci_bus_to_resource() only adds the offset if the bus address is inside a host bridge window. Since 0x1f0 is not a valid bus address and is not inside any windows, it is unaffected, so we now have this: region->start = 0x1f0 initialized in pci_setup_device() res->start = 0x1f0 no offset by pci_bus_to_resource() That means we can remove both pcibios_fixup_device_resources() and cobalt_legacy_ide_fixup(). I would *rather* set the host bridge offset to zero (which corresponds to what the GT-64111 actually does), and have both CPU and PCI addresses of [io 0x10000000-0x10ffffff]. However, that would require changes to generic code that assumes legacy I/O addresses, such as pic1_io_resource ([io 0x0020-0x00021]), and we'd have to keep a Cobalt IDE fixup. Of course, none of this changes the fact that references to I/O port 0x1f0 actually go to port 0x100001f0, not 0x1f0, on the Cobalt PCI bus. Fortunately the VT82C586 IDE controller only decodes the low 24 address bits, so it does work. CC: Ralf Baechle <ralf@linux-mips.org> CC: Yoichi Yuasa <yuasa@linux-mips.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
* mips/PCI: removed unused pci_probe configurabilityBjorn Helgaas2012-02-231-5/+1
| | | | | | | | | | | We never assign anything other than PCI_ASSIGN_ALL_BUSSES to pci_probe, so just remove the indirection. If configurability is required in the future, please use the pci_flags/PCI_REASSIGN_ALL_BUS functionality as is done for powerpc. CC: Ralf Baechle <ralf@linux-mips.org> CC: linux-mips@linux-mips.org Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
* mips/PCI: replace pci_probe_only with pci_flagsBjorn Helgaas2012-02-231-8/+5
| | | | | | | | | | | Some architectures (alpha, mips, powerpc) have an arch-specific "pci_probe_only" flag. Others use PCI_PROBE_ONLY in pci_flags for the same purpose. This moves mips to the pci_flags approach so generic code can use the same test across all architectures. CC: Ralf Baechle <ralf@linux-mips.org> CC: linux-mips@linux-mips.org Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
* Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linusLinus Torvalds2012-01-141-1/+28
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (119 commits) MIPS: Delete unused function add_temporary_entry. MIPS: Set default pci cache line size. MIPS: Flush huge TLB MIPS: Octeon: Remove SYS_SUPPORTS_HIGHMEM. MIPS: Octeon: Add support for OCTEON II PCIe MIPS: Octeon: Update PCI Latency timer and enable more error reporting. MIPS: Alchemy: Update cpu-feature-overrides MIPS: Alchemy: db1200: Improve PB1200 detection. MIPS: Alchemy: merge Au1000 and Au1300-style IRQ controller code. MIPS: Alchemy: chain IRQ controllers to MIPS IRQ controller MIPS: Alchemy: irq: register pm at irq init time MIPS: Alchemy: Touchscreen support on DB1100 MIPS: Alchemy: Hook up IrDA on DB1000/DB1100 net/irda: convert au1k_ir to platform driver. MIPS: Alchemy: remove unused board headers MTD: nand: make au1550nd.c a platform_driver MIPS: Netlogic: Mark Netlogic chips as SMT capable MIPS: Netlogic: Add support for XLP 3XX cores MIPS: Netlogic: Merge some of XLR/XLP wakup code MIPS: Netlogic: Add default XLP config. ... Fix up trivial conflicts in arch/mips/kernel/{perf_event_mipsxx.c, traps.c} and drivers/tty/serial/Makefile
| * MIPS: Set default pci cache line size.Ralf Baechle2012-01-111-1/+28
| | | | | | | | | | | | | | | | | | | | | | | | On MIPS the generic PCI code has always defaulted to L1_CACHE_BYTES because the architecutre PCI code did not provide a better default. In particular on systems with S-caches or T-caches this was suboptimal. Provide a better default by setting pci_dfl_cache_line_size based on the size of the line size of the lowest level of the cache hierarchy. Signed-off-by: Ralf Baechle <ralf@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/2982/
* | mips/PCI: convert to pci_scan_root_bus() for correct root bus resourcesBjorn Helgaas2012-01-061-7/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Convert from pci_scan_bus() to pci_scan_root_bus() and remove root bus resource fixups. This fixes the problem of "early" and "header" quirks seeing incorrect root bus resources. Based on original patch by Deng-Cheng Zhu. Reference: https://lkml.org/lkml/2011/8/26/89 CC: Ralf Baechle <ralf@linux-mips.org> Signed-off-by: Deng-Cheng Zhu <dczhu@mips.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* | PCI: MIPS: use generic pcibios_set_master()Myron Stowe2012-01-061-15/+0
| | | | | | | | | | | | | | | | | | | | | | | | This patch removes MIPS' architecture-specific 'pcibios_set_master()' routine and lets the default PCI core based implementation handle PCI device 'latency timer' setup. No functional change. Acked-by: Ralf Baechle <ralf@linux-mips.org> Signed-off-by: Myron Stowe <myron.stowe@redhat.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* | PCI: Pull PCI 'latency timer' setup up into the coreMyron Stowe2012-01-061-6/+0
|/ | | | | | | | | | | | | | | | | | | | The 'latency timer' of PCI devices, both Type 0 and Type 1, is setup in architecture-specific code [see: 'pcibios_set_master()']. There are two approaches being taken by all the architectures - check if the 'latency timer' is currently set between 16 and 255 and if not bring it within bounds, or, do nothing (and then there is the gratuitously different PA-RISC implementation). There is nothing architecture-specific about PCI's 'latency timer' so this patch pulls its setup functionality up into the PCI core by creating a generic 'pcibios_set_master()' function using the '__weak' attribute which can be used by all architectures as a default which, if necessary, can then be over-ridden by architecture-specific code. No functional change. Signed-off-by: Myron Stowe <myron.stowe@redhat.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* mips: add export.h to files using EXPORT_SYMBOL/THIS_MODULEPaul Gortmaker2011-10-311-0/+1
| | | | | | | | | | Or else we get lots of variations on this: arch/mips/pci/pci.c:330: warning: type defaults to 'int' in declaration of 'EXPORT_SYMBOL' scattered throughout the build. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
* Fix common misspellingsLucas De Marchi2011-03-311-1/+1
| | | | | | Fixes generated by 'codespell' and manually reviewed. Signed-off-by: Lucas De Marchi <lucas.demarchi@profusion.mobi>
* MIPS: Cobalt: convert legacy port addresses to GT-64111 bus addressesBjorn Helgaas2010-02-271-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | The GT-64111 PCI host bridge has no address translation mechanism, so it can't generate legacy port accesses. This quirk fixes legacy device port resources to contain the bus addresses actually generated by the GT-64111. I think this is the approach Ben Herrenschmidt suggested long ago: http://marc.info/?l=linux-kernel&m=119733290624544&w=2 This allows us to remove the IORESOURCE_PCI_FIXED hack from pcibios_fixup_device_resources(), which converts bus addresses to CPU addresses. IORESOURCE_PCI_FIXED denotes resources that can't be moved; it has nothing to do with converting bus to CPU addresses. Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com> Cc: Yoichi Yuasa <yuasa@linux-mips.org> Cc: Thomas Bogendoerfer <tsbogend@alpha.franken.de> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: linux-mips@linux-mips.org Tested-by: Yoichi Yuasa <yuasa@linux-mips.org> Patchwork: http://patchwork.linux-mips.org/patch/998/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* resource/PCI: mark struct resource as constDominik Brodowski2010-02-221-1/+1
| | | | | | | | | | | Now that we return the new resource start position, there is no need to update "struct resource" inside the align function. Therefore, mark the struct resource as const. Cc: Bjorn Helgaas <bjorn.helgaas@hp.com> Cc: Yinghai Lu <yhlu.kernel@gmail.com> Signed-off-by: Dominik Brodowski <linux@dominikbrodowski.net> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* resource/PCI: align functions now return start of resourceDominik Brodowski2010-02-221-2/+2
| | | | | | | | | | | As suggested by Linus, align functions should return the start of a resource, not void. An update of "res->start" is no longer necessary. Cc: Bjorn Helgaas <bjorn.helgaas@hp.com> Cc: Yinghai Lu <yhlu.kernel@gmail.com> Signed-off-by: Dominik Brodowski <linux@dominikbrodowski.net> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* MIPS: Remove useless zero initializations.Ralf Baechle2009-09-171-2/+2
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* PCI: mips: use generic INTx swizzle from PCI coreBjorn Helgaas2009-01-071-16/+1
| | | | | | | | | | | Use the generic pci_common_swizzle() instead of arch-specific code. Note that pci_common_swizzle() loops based on dev->bus->self, not dev->bus->parent as the mips common_swizzle() did. I think they are equivalent for this purpose. Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* PCI: mips: use generic pci_swizzle_interrupt_pin()Bjorn Helgaas2009-01-071-8/+1
| | | | | | | | Use the generic pci_swizzle_interrupt_pin() instead of arch-specific code. Acked-by: Ralf Baechle <ralf@linux-mips.org> Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* MIPS: Better than nothing implementation of PCI mmap to fix X.Ralf Baechle2008-12-091-0/+24
| | | | | | | | | | | | Certain X11 servers such as the SIS server will only work if PCI mmap is implemented. This patch implements PCI mmap but to be on the same side so close to a release it only supports uncached mappings so performance will not be optimal for some uses such as framebuffers. Thanks to Zhang Le <r0bertz@gentoo.org> for the original report and testing. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: PCI: Scan busses when they are registeredAurelien Jarno2008-10-151-27/+53
| | | | | | | | | | | The patch below changes register_pci_controller() such that controllers being added after pcibios_init() has run are be scanned immediately. This is needed for example by the BCM47xx PCI controller, which is located on the SSB bus, which is now initialized after the PCI subsystem. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Introduce pcibios_plat_setupAtsushi Nemoto2008-07-301-1/+5
| | | | | | | Introduce pcibios_plat_setup for platform-specific pcibios_setup. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] PCI: Make the pcibios_max_latency variable staticDmitri Vorobiev2008-07-201-1/+1
| | | | | | | | | | The pcibios_max_latency variable is needlessly defined global, and this patch makes it static. Build-tested using malta_defconfig. Signed-off-by: Dmitri Vorobiev <dmitri.vorobiev@movial.fi> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Namespace clean-up in arch/mips/pci/pci.cDmitri Vorobiev2008-07-151-2/+1
| | | | | | | | | | | | | | | | | | | The following symbols hose_head hose_tail are needlessly defined global in arch/mips/pci/pci.c, and this patch makes them static. The variable pci_isa_hose is not used, and is removed by this patch. Spotted by namespacecheck. Tested by booting a Malta 4Kc board up to the shell prompt. Signed-off-by: Dmitri Vorobiev <dmitri.vorobiev@movial.fi> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Fix loads of section missmatchesRalf Baechle2008-03-121-1/+1
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] PCI: Coding style fixes for pcibios_enable_resources.Ralf Baechle2008-02-191-2/+5
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] PCI: Port i386 PCI fixes.Ralf Baechle2008-02-191-2/+5
| | | | | | | | The MIPS version of pcibios_enalbe_resources did not have the fixes from ed6d14f9760857c745206c978b80352fc09cfd19 yet which under circumstances similar to x86 might result in failures. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] PCI: Make pcibios_fixup_device_resources ignore legacy resources.Ralf Baechle2007-12-141-0/+2
| | | | | | | | There might be other reasons why a resource might be marked as fixed such as a PCI UART holding the system console but until we use IORESOURCE_PCI_FIXED that way also this will work. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] PCI: Set need_domain_info if controller domain index is non-zero.Ralf Baechle2007-09-101-0/+1
| | | | | | | | | | | | | | This fixes this little funny: bigsur:/proc/bus/pci# ls -l total 0 dr-xr-xr-x 2 root root 0 Aug 28 19:31 00 dr-xr-xr-x 2 root root 0 Aug 28 19:31 00 dr-xr-xr-x 2 root root 0 Aug 28 19:31 01 dr-xr-xr-x 2 root root 0 Aug 28 19:31 03 -r--r--r-- 1 root root 0 Aug 28 19:31 devices Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] HOTPLUG: Make register_pci_controller __devinit.Ralf Baechle2007-08-271-1/+1
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] PCI: Remove __devinit attribute from pcibios_fixup_bus.Ralf Baechle2007-08-271-3/+2
| | | | | | | | | | | | | | | | | | | | | Since 96bde06a2df1b363206d3cdef53134b84ff37813 several callers of pcibios_resource_to_bus are no longer marked __devinit resulting in a pile of modpost warnings if PCI && !HOTPLUG: MODPOST vmlinux.o WARNING: vmlinux.o(.text+0x15dde8): Section mismatch: reference to .init.text:pcibios_resource_to_bus (between 'pci_map_rom' and 'pci_map_rom_copy') WARNING: vmlinux.o(.text+0x15e140): Section mismatch: reference to .init.text:pcibios_resource_to_bus (between 'pci_update_resource' and 'pci_claim_resource') WARNING: vmlinux.o(.text+0x15f0cc): Section mismatch: reference to .init.text:pcibios_resource_to_bus (between 'pci_setup_cardbus' and 'pci_bus_assign_resources') WARNING: vmlinux.o(.text+0x15f0f0): Section mismatch: reference to .init.text:pcibios_resource_to_bus (between 'pci_setup_cardbus' and 'pci_bus_assign_resources') WARNING: vmlinux.o(.text+0x15f114): Section mismatch: reference to .init.text:pcibios_resource_to_bus (between 'pci_setup_cardbus' and 'pci_bus_assign_resources') WARNING: vmlinux.o(.text+0x15f138): Section mismatch: reference to .init.text:pcibios_resource_to_bus (between 'pci_setup_cardbus' and 'pci_bus_assign_resources') WARNING: vmlinux.o(.text+0x15f438): Section mismatch: reference to .init.text:pcibios_resource_to_bus (between 'pci_bus_assign_resources' and 'pbus_size_mem') WARNING: vmlinux.o(.text+0x15f4f4): Section mismatch: reference to .init.text:pcibios_resource_to_bus (between 'pci_bus_assign_resources' and 'pbus_size_mem') Removing __devinit from pcibios_resource_to_bus make the same necessary for pcibios_fixup_device_resources as well. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] PCI: Remove __devinit attribute from pcibios_fixup_bus.Ralf Baechle2007-08-271-1/+1
| | | | | | | | | | | Since 96bde06a2df1b363206d3cdef53134b84ff37813 pcibios_fixup_bus's caller pci_scan_child_bus is no longer marked __devinit resulting in this modpost warning if PCI && !HOTPLUG: MODPOST vmlinux.o WARNING: vmlinux.o(.text+0x158b9c): Section mismatch: reference to .init.text:pcibios_fixup_bus (between 'pci_scan_child_bus' and 'pci_scan_bus_parented') Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Fix a sparse warning in arch/mips/pci/pci.cAtsushi Nemoto2007-07-121-1/+1
| | | | | | | | | | Fixes this warning: arch/mips/pci/pci.c:284:18: warning: symbol 'dev' shadows an earlier one arch/mips/pci/pci.c:272:17: originally declared here Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Register PCI host bridge resource earlierThomas Bogendoerfer2007-04-271-13/+12
| | | | | | | | | | | | | | | PCI based SNI RM machines have their EISA bus behind an Intel PCI/EISA bridge. So the PCI IO range must start at 0x0000. Changing that will break the PCI bus, because i8259.c already has registered it's IO addresses before the PCI bus gets initialized. Below is a patch, which will register the PCI host bridge resources inside register_pci_controller(). It also changes i8259.c to use insert_region(), because request_resource() will fail, if the IO space of the PIT hanging of the PCI host bridge (maybe passing the resource parent to init_i8259_irqs() is a cleaner fix for that). Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Mark pcibios_fixup_device_resources() as __devinitAtsushi Nemoto2007-02-261-1/+1
| | | | | | | | pcibios_fixup_device_resources() is called by pcibios_fixup_bus() which is marked as __devinit. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Iomap implementation.Ralf Baechle2007-02-181-0/+8
| | | | | | | | | | | This implementation has support for the concept of one separate ioport address space by PCI domain. A pointer to the virtual address where the port space of a domain has been mapped has been added to struct pci_controller and systems should be fixed to fill in this value. For single domain systems this will be the same value as passed to set_io_port_base(). Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* Remove obsolete #include <linux/config.h>Jörn Engel2006-06-301-1/+0
| | | | | Signed-off-by: Jörn Engel <joern@wohnheim.fh-wedel.de> Signed-off-by: Adrian Bunk <bunk@stusta.de>
* [PATCH] 64bit resource: change pci core and arch code to use resource_size_tGreg Kroah-Hartman2006-06-271-2/+2
| | | | | | | | Based on a patch series originally from Vivek Goyal <vgoyal@in.ibm.com> Cc: Vivek Goyal <vgoyal@in.ibm.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* [MIPS] Remove unused function alloc_pci_controller.Ralf Baechle2006-06-191-5/+0
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
generated by cgit v1.2.3 (git 2.25.1) at 2024-09-16 06:20:27 +0000