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* MIPS: ralink: mt7621: add memory detection supportChuanhong Guo2021-03-291-0/+1
| | | | | | | | | | | | | | | | | | | | | | | mt7621 has the following memory map: 0x0-0x1c000000: lower 448m memory 0x1c000000-0x2000000: peripheral registers 0x20000000-0x2400000: higher 64m memory detect_memory_region in arch/mips/kernel/setup.c only adds the first memory region and isn't suitable for 512m memory detection because it may accidentally read the memory area for peripheral registers. This commit adds memory detection capability for mt7621: 1. Add the highmem area when 512m is detected. 2. Guard memcmp from accessing peripheral registers: This only happens when a user decided to change kernel load address to 256m or higher address. Since this is a quite unusual case, we just skip 512m testing and return 256m as memory size. Signed-off-by: Chuanhong Guo <gch981213@gmail.com> [Minor commit message reword, make mt7621_memory_detect static] Signed-off-by: Ilya Lipnitskiy <ilya.lipnitskiy@gmail.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
* MIPS: ralink: annotate prom_soc_init() with __initIlya Lipnitskiy2021-03-291-1/+1
| | | | | | | | | prom_soc_init is only called from prom_init in arch/mips/ralink/prom.c, which is already annotated with __init, so annotate prom_soc_init with __init too. Signed-off-by: Ilya Lipnitskiy <ilya.lipnitskiy@gmail.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
* treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500Thomas Gleixner2019-06-191-3/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | Based on 2 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation # extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 4122 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Enrico Weigelt <info@metux.net> Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Reviewed-by: Allison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190604081206.933168790@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* MIPS: Change my email addressJohn Crispin2016-05-131-1/+1
| | | | | | | | | The old address is no longer valid. Use the my new one instead. Signed-off-by: John Crispin <john@phrozen.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/13201/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: ralink: cleanup the soc specific pinmux dataJohn Crispin2014-11-241-19/+0
| | | | | | | | | | Before we had a pinctrl driver we used a custom OF api. This patch converts the soc specific pinmux data to a new set of structs. We also add some new pinmux setings. Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/8009/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: ralink: Add support for reset-controller APIJohn Crispin2013-09-041-0/+2
| | | | | | | | | | Add a helper for reseting different devices on the SoC. Signed-off-by: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5804/ Patchwork: https://patchwork.linux-mips.org/patch/5797/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: ralink: add memory definition to struct ralink_soc_infoJohn Crispin2013-05-081-0/+5
| | | | | | | | Depending on the actual SoC we have a different base address as well as minimum and maximum size for RAM. Add these fields to the per SoC structure. Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/5179/
* MIPS: ralink: add uart mask to struct ralink_pinmuxJohn Crispin2013-05-081-0/+1
| | | | | | | Add a field for the uart muxing mask and set it inside the rt305x setup code. Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/5744/
* MIPS: ralink: add pci group to struct ralink_pinmuxGabor Juhos2013-05-081-0/+3
| | | | | | | | This will be used for RT3662/RT3883. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Acked-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/5173/
* MIPS: ralink: rename gpio_pinmux to rt_gpio_pinmuxJohn Crispin2013-05-081-1/+1
| | | | | | | Add proper namespacing to the variable. Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/5171/
* MIPS: ralink: adds include filesJohn Crispin2013-02-171-0/+44
Before we start adding the platform code we add the common include files. Signed-off-by: John Crispin <blogic@openwrt.org> Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4893/
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