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| | | | | * | | | | MIPS: Clean up whitespace warning in hazards.hKevin Cernekee2011-12-071-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use a tab on second and subsequent lines of multiline #if's, for consistency with the next commit. Signed-off-by: Kevin Cernekee <cernekee@gmail.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2954/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| | | | | * | | | | MIPS: BMIPS: Fix up Kconfig settingsKevin Cernekee2011-12-071-20/+14
| | | | | |/ / / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Factor out common BMIPS options into "CPU_BMIPS". Add L2 cache for BMIPS5000. Add CPU_MIPS32 to satisfy checks in page.h, r4k_switch.S, tlb-r4k.c, etc. Signed-off-by: Kevin Cernekee <cernekee@gmail.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2953/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| | | | * | | | | MIPS: BCM63XX: generate WLAN MAC address after registering ethernet devices.Florian Fainelli2011-12-071-12/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In case the MAC address pool is not big enough to also register a WLAN device prefer registering the Ethernet devices. [ralf@linux-mips.org: Fixed formatting as per Sergei's complaint.] Signed-off-by: Florian Fainelli <florian@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3013/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| | | | * | | | | MIPS: BCM63xx: Fix GPIO set/get for BCM6345Florian Fainelli2011-12-072-5/+37
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On BCM6345, the register offsets for the set/get GPIO registers is wrong. Use the same logic as the one present in arch/mips/bcm63xx/irq.c to define the correct gpio_out_low_reg value when support for BCM6345 is compiled in. Signed-off-by: Florian Fainelli <florian@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3010/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| | | | * | | | | MIPS: BCM63xx: Remove BCM6345 hacks to read base boot addressFlorian Fainelli2011-12-072-16/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Though BCM6345 does not technically have the same MPI register layout than the other SoCs, reading the chip-select registers is done the same way, and particularly for chip-select 0, which is the boot flash. Signed-off-by: Florian Fainelli <florian@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3009/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| | | | * | | | | MIPS: BCM63xx: Fix SDRAM size computation for BCM6345Florian Fainelli2011-12-072-2/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Instead of hardcoding the amount of available RAM, read the number of effective multiples of 8MB from SDRAM_MBASE_REG. Signed-off-by: Florian Fainelli <florian@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3008/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| | | | * | | | | MIPS: BCM63XX: Add support for bcm6368 CPU.Maxime Bizon2011-12-0711-27/+377
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Maxime Bizon <mbizon@freebox.fr> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2892/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| | | | * | | | | MIPS: BCM63XX: Add external irq support for non 6348 CPUs.Maxime Bizon2011-12-073-43/+149
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Maxime Bizon <mbizon@freebox.fr> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2899/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| | | | * | | | | MIPS: BCM63XX: Handle 64 bits irq stat register in irq code.Maxime Bizon2011-12-071-6/+76
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | bcm6368 has larger irq registers, prepare for this. Signed-off-by: Maxime Bizon <mbizon@freebox.fr> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2898/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| | | | * | | | | MIPS: BCM63XX: Introduce bcm_readq & bcm_writeq.Maxime Bizon2011-12-071-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Needed for upcoming 6368 CPU support. [ralf@linux-mips.org: Changed function names as per Sergei's comments.] Signed-off-by: Maxime Bizon <mbizon@freebox.fr> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2896/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| | | | * | | | | MIPS: BCM63XX: Prepare irq code to handle different external irq hardware ↵Maxime Bizon2011-12-073-44/+79
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | implementation. External irq only works for 6348, change code to prepare support of other CPUs. Signed-off-by: Maxime Bizon <mbizon@freebox.fr> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2895/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| | | | * | | | | MIPS: BCM63XX: Change irq code to prepare for per-cpu peculiarity.Maxime Bizon2011-12-072-11/+85
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | No functionnal change is introduced by this patch. Signed-off-by: Maxime Bizon <mbizon@freebox.fr> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2894/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| | | | * | | | | MIPS: BCM63XX: Add more register sets & missing register definitions.Maxime Bizon2011-12-072-2/+261
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Needed for upcoming 6368 CPU support. Signed-off-by: Maxime Bizon <mbizon@freebox.fr> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2893/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| | | | * | | | | MIPS: BCM63XX: Cleanup cpu registers.Maxime Bizon2011-12-072-366/+125
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use preprocessor when possible to avoid duplicated and error-prone code. Signed-off-by: Maxime Bizon <mbizon@freebox.fr> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2897/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| | | | * | | | | MIPS: BCM63XX: Call board_register_device from device_initcall()Maxime Bizon2011-12-071-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some device registration (eg leds), expect subsystem initcall to be run first, so move board device registration to device_initcall(). Signed-off-by: Maxime Bizon <mbizon@freebox.fr> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2891/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| | | | * | | | | MIPS: BCM63XX: Hook up plat_ioremap to intercept soc registers remapping.Maxime Bizon2011-12-071-0/+38
| | | | |/ / / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Internal SOC registers can be directly accessed, no need to waste a TLB entry. Signed-off-by: Maxime Bizon <mbizon@freebox.fr> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2890/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| | | * | | | | MIPS: ath79: Rename dev-ar913x-wmac.c to dev-wmac.cGabor Juhos2011-12-072-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Rename the file as a last step of the 'ar913x' removal changes. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Imre Kaloz <kaloz@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3034/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| | | * | | | | MIPS: ath79: Rename dev-ar913x-wmac.h to dev-wmac.hGabor Juhos2011-12-074-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The 'ar913x' part was removed from the common variable and function names, so remove that from the relevant header file name as well. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Imre Kaloz <kaloz@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3033/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| | | * | | | | MIPS: ath79: Register the wireless MAC device on the AP121 boardGabor Juhos2011-12-071-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Imre Kaloz <kaloz@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3032/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| | | * | | | | MIPS: ath79: Rename ATH79_DEV_AR913X_WMAC option to ATH79_DEV_WMACGabor Juhos2011-12-072-6/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The ATH79_DEV_AR913X_WMAC option was used to select the AR913x specific wireless MAC registration code. The registration code now supports the AR933X SoCs as well. Rename the option to reflect the changes. Also make the new option depends on SOC_AR933X. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Imre Kaloz <kaloz@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3031/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| | | * | | | | MIPS: ath79: Add AR933x specific WMAC setup codeGabor Juhos2011-12-073-5/+46
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The wireless MAC of the AR933x SoCs uses different base address, and requires different setup code. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Imre Kaloz <kaloz@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3030/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| | | * | | | | MIPS: ath79: Separate AR913x SoC specific WMAC setup codeGabor Juhos2011-12-071-7/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The device registration code can be shared between the different SoCs, but the required setup code varies Move AR913x specific setup code into a separate function in order to make adding support for another SoCs easier. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Imre Kaloz <kaloz@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3029/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| | | * | | | | MIPS: ath79: Remove 'ar913x' from common variable and function namesGabor Juhos2011-12-073-15/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The wireless MAC specific variables and the registration code can be shared between multiple SoCs. Remove the 'ar913x' part from the function and variable names to avoid confusions. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Imre Kaloz <kaloz@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3028/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| | | * | | | | MIPS: ath79: Store the SoC revision in a global variableGabor Juhos2011-12-073-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Knowing the exact revision of the SoC is required to make runtime decisions in various code paths. We have determined the SoC revision already, so we only need to store that in a global variable. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Imre Kaloz <kaloz@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3027/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| | | * | | | | Initial support for the Ubiquiti Networks XM board (rev 1.0).Rene Bolldorf2011-12-074-0/+132
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Rene Bolldorf <xsecute@googlemail.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/3020/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| | | * | | | | MIPS: Initial PCI support for Atheros 724x SoCs.Rene Bolldorf2011-12-073-0/+196
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | [ralf@linux-mips.org: Fixed the odd formatting of all break statements.] Signed-off-by: Rene Bolldorf <xsecute@googlemail.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/3019/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| | | * | | | | MIPS: ath79: Add initial support for the Atheros AP121 reference boardGabor Juhos2011-12-074-0/+101
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: linux-mips@linux-mips.org Cc: Kathy Giori <kgiori@qca.qualcomm.com> Cc: "Luis R. Rodriguez" <rodrigue@qca.qualcomm.com> Patchwork: https://patchwork.linux-mips.org/patch/2531/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| | | * | | | | MIPS: ath79: register UART device for the AR933X SoCsGabor Juhos2011-12-071-2/+36
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The AR933X SoCs does not have a 8250 compatible UART, they are using a different UART core. Register a different platform device for the different UART. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: linux-mips@linux-mips.org Cc: Kathy Giori <kgiori@qca.qualcomm.com> Cc: "Luis R. Rodriguez" <rodrigue@qca.qualcomm.com> Patchwork: https://patchwork.linux-mips.org/patch/2528/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| | | * | | | | SERIAL: AR933X: Add driver for the built-in UART of the SoCGabor Juhos2011-12-071-0/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds the driver for the built-in UART of the Atheros AR933X SoCs. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: linux-mips@linux-mips.org Cc: Kathy Giori <kgiori@qca.qualcomm.com> Cc: "Luis R. Rodriguez" <rodrigue@qca.qualcomm.com> Cc: Alan Cox <alan@lxorguk.ukuu.org.uk> Cc: linux-serial@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/2526/ Signed-off-by: Alan Cox <alan@linux.intel.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| | | * | | | | MIPS: ath79: add AR933X specific USB platform device registrationGabor Juhos2011-12-073-0/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Also select the USB_ARCH_HAS_EHCI symbol in order to make the EHCI driver available. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: linux-mips@linux-mips.org Cc: Kathy Giori <kgiori@qca.qualcomm.com> Cc: "Luis R. Rodriguez" <rodrigue@qca.qualcomm.com> Patchwork: https://patchwork.linux-mips.org/patch/2527/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| | | * | | | | MIPS: ath79: Add config symbol for the AR933X SoCsGabor Juhos2011-12-071-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: linux-mips@linux-mips.org Cc: Kathy Giori <kgiori@qca.qualcomm.com> Cc: "Luis R. Rodriguez" <rodrigue@qca.qualcomm.com> Patchwork: https://patchwork.linux-mips.org/patch/2525/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| | | * | | | | MIPS: ath79: add AR933X specific GPIO initializationGabor Juhos2011-12-072-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: linux-mips@linux-mips.org Cc: Kathy Giori <kgiori@qca.qualcomm.com> Cc: "Luis R. Rodriguez" <rodrigue@qca.qualcomm.com> Patchwork: https://patchwork.linux-mips.org/patch/2524/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| | | * | | | | MIPS: ath79: Add AR933X specific IRQ initializationGabor Juhos2011-12-072-1/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: linux-mips@linux-mips.org Cc: Kathy Giori <kgiori@qca.qualcomm.com> Cc: "Luis R. Rodriguez" <rodrigue@qca.qualcomm.com> Patchwork: https://patchwork.linux-mips.org/patch/2530/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| | | * | | | | MIPS: ath79: Add AR933X specific glue for ath79_device_reset_{set,clear}Gabor Juhos2011-12-072-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: linux-mips@linux-mips.org Cc: Kathy Giori <kgiori@qca.qualcomm.com> Cc: "Luis R. Rodriguez" <rodrigue@qca.qualcomm.com> Patchwork: https://patchwork.linux-mips.org/patch/2523/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| | | * | | | | MIPS: ath79: add AR933X specific clock initGabor Juhos2011-12-073-0/+83
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: linux-mips@linux-mips.org Cc: Kathy Giori <kgiori@qca.qualcomm.com> Cc: "Luis R. Rodriguez" <rodrigue@qca.qualcomm.com> Patchwork: https://patchwork.linux-mips.org/patch/2522/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| | | * | | | | MIPS: ath79: Add early printk support for the AR933X SoCsGabor Juhos2011-12-073-9/+137
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The AR933X SoCs are using a different UART, thus require different code for early printk support. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: linux-mips@linux-mips.org Cc: Kathy Giori <kgiori@qca.qualcomm.com> Cc: "Luis R. Rodriguez" <rodrigue@qca.qualcomm.com> Patchwork: https://patchwork.linux-mips.org/patch/2521/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| | | * | | | | MIPS: ath79: add revision id for the AR933X SoCsGabor Juhos2011-12-073-1/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: linux-mips@linux-mips.org Cc: Kathy Giori <kgiori@qca.qualcomm.com> Cc: "Luis R. Rodriguez" <rodrigue@qca.qualcomm.com> Patchwork: https://patchwork.linux-mips.org/patch/2538/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| | | * | | | | MIPS: ath79: Remove superfluous parenthesesGabor Juhos2011-12-071-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: linux-mips@linux-mips.org Cc: Kathy Giori <kgiori@qca.qualcomm.com> Cc: "Luis R. Rodriguez" <rodrigue@qca.qualcomm.com> Patchwork: https://patchwork.linux-mips.org/patch/2519/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| | | * | | | | MIPS: ath79: add common USB Host Controller deviceGabor Juhos2011-12-077-1/+236
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add common platform_device and helper code to make the registration of the built-in USB controllers easier on the board which are using them. Also register the USB controller on the AP81 and PB44 boards. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Signed-off-by: Imre Kaloz <kaloz@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2442/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| | | * | | | | MIPS: ath79: Handle more MISC IRQsGabor Juhos2011-12-073-0/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The AR724X SoCs have more IRQ sources hooked into the MISC IRQ controller. The patch adds support for them. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2440/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| | | * | | | | MIPS: ath79: Change number of available IRQsGabor Juhos2011-12-071-2/+2
| | | |/ / / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The status register of the miscellaneous interrupt controller is 32 bits wide, but the actual value of NR_IRQS covers only 8 of them. Change NR_IRQS in order to make all of those interrupt lines usable. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2441/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| | * | | | | MIPS: AR7: add LEDs layout for the Actiontec GT701 routerFlorian Fainelli2011-12-071-0/+37
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Florian Fainelli <florian@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2981/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| | * | | | | MIPS: AR7: constify some arrays in gpio and prom codeFlorian Fainelli2011-12-072-3/+3
| | |/ / / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Florian Fainelli <florian@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2980/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | | | Merge branch 'next/alchemy' into mips-for-linux-nextRalf Baechle2012-01-1178-3738/+5259
| |\ \ \ \ \
| | * | | | | MIPS: Alchemy: Update cpu-feature-overridesManuel Lauss2011-12-081-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3006/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| | * | | | | MIPS: Alchemy: db1200: Improve PB1200 detection.Manuel Lauss2011-12-081-8/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The PB1200 has the CPLD located at an address which on the DB1200 is RAM; reading the Board-ID sometimes results in a PB1200 being detected instead (especially during reboots after long uptimes). On the other hand, the address of the DB1200's CPLD is hosting Flash chips on the PB1200. Test for the DB1200 first and additionally do a quick write-test to the hexleds register to make sure we're writing to the CPLD. Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3005/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| | * | | | | MIPS: Alchemy: merge Au1000 and Au1300-style IRQ controller code.Manuel Lauss2011-12-083-587/+550
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With a generic plat_irq_dispatch (for Alchemy at least) code for both interrupt controller types can coexist in a single kernel image and be autodetected at runtime. Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2935/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| | * | | | | MIPS: Alchemy: chain IRQ controllers to MIPS IRQ controllerManuel Lauss2011-12-082-49/+39
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | IC and GPIC are now chain handlers of the traditional MIPS IRQ controller. Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2933/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| | * | | | | MIPS: Alchemy: irq: register pm at irq init timeManuel Lauss2011-12-082-96/+91
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | No need for a device_initcall. Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2934/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| | * | | | | MIPS: Alchemy: Touchscreen support on DB1100Manuel Lauss2011-12-081-0/+56
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Wire up the ADS7846 touchscreen controller on the DB1100. Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2879/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
generated by cgit v1.2.3 (git 2.25.1) at 2024-12-26 17:46:40 +0000